Trying 192.168.56.21... Connected to conserv1. Escape character is '^]'. ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux) G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0. bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 L0:00000000 L1:20000703 L2:00008067 L3:14000000 B2:00402000 B1:e0f83180 TE: 58159 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz Board ID = 1 Set A53 clk to 24M Set A73 clk to 24M Set clk81 to 24M A53 clk: 1200 MHz A73 clk: 1200 MHz CLK81: 166.6M smccc: 00012ab5 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01 board id: 1 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 266 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg LPDDR4 probe ddr clk to 1584MHz Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of CA training INFO : End of initialization INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of Write leveling coarse delay INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! channel==0 RxClkDly_Margin_A0==88 ps 9 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==98 ps 10 TrainedVREFDQ_A0==74 TrainedVREFDQ_A1==74 VrefDac_Margin_A0==25 DeviceVref_Margin_A0==40 VrefDac_Margin_A1==25 DeviceVref_Margin_A1==40 channel==1 RxClkDly_Margin_A0==98 ps 10 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==88 ps 9 TrainedVREFDQ_A0==77 TrainedVREFDQ_A1==77 VrefDac_Margin_A0==22 DeviceVref_Margin_A0==37 VrefDac_Margin_A1==24 DeviceVref_Margin_A1==37 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00e00024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass 100bdlr_step_size ps== 420 result report boot times 0Enable ddr reg access Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz] OPS=0x10 ring efuse init chipver efuse init 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 [0.018961 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:58:17, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC Model: Libre Computer AML-A311D-CC Alta SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2) DRAM: 2 GiB (effective 3.8 GiB) Core: 408 devices, 31 uclasses, devicetree: separate WDT: Not starting watchdog@f0d0 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0 Loading Environment from FAT... Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Couldn't find partition mmc 0 Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Couldn't find partition mmc 0 Error: could not access storage. G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0. bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 L0:00000000 L1:20000703 L2:00008067 L3:14000000 B2:00402000 B1:e0f83180 TE: 58124 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz Board ID = 1 Set A53 clk to 24M Set A73 clk to 24M Set clk81 to 24M A53 clk: 1200 MHz A73 clk: 1200 MHz CLK81: 166.6M smccc: 00012a91 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01 board id: 1 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 266 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg LPDDR4 probe ddr clk to 1584MHz Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of CA training INFO : End of initialization INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of Write leveling coarse delay INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! channel==0 RxClkDly_Margin_A0==88 ps 9 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==98 ps 10 TrainedVREFDQ_A0==74 TrainedVREFDQ_A1==74 VrefDac_Margin_A0==25 DeviceVref_Margin_A0==40 VrefDac_Margin_A1==25 DeviceVref_Margin_A1==40 channel==1 RxClkDly_Margin_A0==98 ps 10 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==98 ps 10 TxDqDly_Margin_A1==88 ps 9 TrainedVREFDQ_A0==77 TrainedVREFDQ_A1==77 VrefDac_Margin_A0==22 DeviceVref_Margin_A0==37 VrefDac_Margin_A1==22 DeviceVref_Margin_A1==37 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00e00024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass 100bdlr_step_size ps== 420 result report boot times 0Enable ddr reg access Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz] OPS=0x10 ring efuse init chipver efuse init 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 [0.018960 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:58:17, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC Model: Libre Computer AML-A311D-CC Alta SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2) DRAM: 2 GiB (effective 3.8 GiB) Core: 408 devices, 31 uclasses, devicetree: separate WDT: Not starting watchdog@f0d0 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0 Loading Environment from FAT... Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Couldn't find partition mmc 0 Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Couldn't find partition mmc 0 Error: could not access storage. Net: eth0: ethernet@ff3f0000 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0. bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 L0:00000000 L1:20000703 L2:00008067 L3:14000000 B2:00402000 B1:e0f83180 TE: 58159 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz Board ID = 1 Set A53 clk to 24M Set A73 clk to 24M Set clk81 to 24M A53 clk: 1200 MHz A73 clk: 1200 MHz CLK81: 166.6M smccc: 00012ab4 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01 board id: 1 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 266 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg LPDDR4 probe ddr clk to 1584MHz Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of CA training INFO : End of initialization INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of Write leveling coarse delay INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! channel==0 RxClkDly_Margin_A0==88 ps 9 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==88 ps 9 TrainedVREFDQ_A0==74 TrainedVREFDQ_A1==74 VrefDac_Margin_A0==25 DeviceVref_Margin_A0==40 VrefDac_Margin_A1==25 DeviceVref_Margin_A1==40 channel==1 RxClkDly_Margin_A0==88 ps 9 TxDqDly_Margin_A0==88 ps 9 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==88 ps 9 TrainedVREFDQ_A0==76 TrainedVREFDQ_A1==77 VrefDac_Margin_A0==22 DeviceVref_Margin_A0==38 VrefDac_Margin_A1==24 DeviceVref_Margin_A1==37 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000019 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00e00024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass 100bdlr_step_size ps== 420 result report boot times 0Enable ddr reg access Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz] OPS=0x10 ring efuse init chipver efuse init 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 [0.018961 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:58:17, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC Model: Libre Computer AML-A311D-CC Alta SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2) DRAM: 2 GiB (effective 3.8 GiB) Core: 408 devices, 31 uclasses, devicetree: separate WDT: Not starting watchdog@f0d0 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0 Loading Environment from FAT... Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Couldn't find partition mmc 0 Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Couldn't find partition mmc 0 Error: could not access storage. Net: eth0: ethernet@ff3f0000 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0. bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 L0:00000000 L1:20000703 L2:00008067 L3:14000000 B2:00402000 B1:e0f83180 TE: 58159 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz Board ID = 1 Set A53 clk to 24M Set A73 clk to 24M Set clk81 to 24M A53 clk: 1200 MHz A73 clk: 1200 MHz CLK81: 166.6M smccc: 00012ab5 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01 board id: 1 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 266 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg LPDDR4 probe ddr clk to 1584MHz Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of CA training INFO : End of initialization INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of Write leveling coarse delay INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! channel==0 RxClkDly_Margin_A0==88 ps 9 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==98 ps 10 TrainedVREFDQ_A0==74 TrainedVREFDQ_A1==75 VrefDac_Margin_A0==25 DeviceVref_Margin_A0==40 VrefDac_Margin_A1==25 DeviceVref_Margin_A1==39 channel==1 RxClkDly_Margin_A0==98 ps 10 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==88 ps 9 TrainedVREFDQ_A0==77 TrainedVREFDQ_A1==77 VrefDac_Margin_A0==22 DeviceVref_Margin_A0==37 VrefDac_Margin_A1==24 DeviceVref_Margin_A1==37 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000019 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00e00024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass 100bdlr_step_size ps== 420 result report boot times 0Enable ddr reg access Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz] OPS=0x10 ring efuse init chipver efuse init 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 [0.018961 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:58:17, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC Model: Libre Computer AML-A311D-CC Alta SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2) DRAM: 2 GiB (effective 3.8 GiB) Core: 408 devices, 31 uclasses, devicetree: separate WDT: Not starting watchdog@f0d0 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0 Loading Environment from FAT... Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Couldn't find partition mmc 0 Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Couldn't find partition mmc 0 Error: could not access storage. Net: eth0: ethernet@ff3f0000 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0. bl2_stage_init 0x01 bl2_stage_init 0x81 hw id: 0x0000 - pwm id 0x01 bl2_stage_init 0xc1 bl2_stage_init 0x02 L0:00000000 L1:20000703 L2:00008067 L3:14000000 B2:00402000 B1:e0f83180 TE: 58124 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz Board ID = 1 Set A53 clk to 24M Set A73 clk to 24M Set clk81 to 24M A53 clk: 1200 MHz A73 clk: 1200 MHz CLK81: 166.6M smccc: 00012a92 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01 board id: 1 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0 fw parse done Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0 PIEI prepare done fastboot data load fastboot data verify verify result: 266 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg LPDDR4 probe ddr clk to 1584MHz Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0 dmc_version 0001 Check phy result INFO : End of CA training INFO : End of initialization INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read enable training INFO : End of fine write leveling INFO : End of Write leveling coarse delay INFO : Training has run successfully! Check phy result INFO : End of initialization INFO : End of read dq deskew training INFO : End of MPR read delay center optimization INFO : End of write delay center optimization INFO : End of read delay center optimization INFO : End of max read latency training INFO : Training has run successfully! 1D training succeed Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0 Check phy result INFO : End of initialization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D read delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : End of 2D write delay Voltage center optimization INFO : Training has run successfully! channel==0 RxClkDly_Margin_A0==88 ps 9 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==78 ps 8 TxDqDly_Margin_A1==98 ps 10 TrainedVREFDQ_A0==74 TrainedVREFDQ_A1==74 VrefDac_Margin_A0==25 DeviceVref_Margin_A0==40 VrefDac_Margin_A1==25 DeviceVref_Margin_A1==40 channel==1 RxClkDly_Margin_A0==78 ps 8 TxDqDly_Margin_A0==98 ps 10 RxClkDly_Margin_A1==88 ps 9 TxDqDly_Margin_A1==98 ps 10 TrainedVREFDQ_A0==77 TrainedVREFDQ_A1==77 VrefDac_Margin_A0==23 DeviceVref_Margin_A0==37 VrefDac_Margin_A1==24 DeviceVref_Margin_A1==37 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000019 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060 2D training succeed aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19 auto size-- 65535DDR cs0 size: 2048MB DDR cs1 size: 2048MB DMC_DDR_CTRL: 00e00024DDR size: 3928MB cs0 DataBus test pass cs1 DataBus test pass cs0 AddrBus test pass cs1 AddrBus test pass 100bdlr_step_size ps== 420 result report boot times 0Enable ddr reg access Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0 0.0;M3 CHK:0;cm4_sp_mode 0 MVN_1=0x00000000 MVN_2=0x00000000 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz] OPS=0x10 ring efuse init chipver efuse init 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50 [0.018961 Inits done] secure task start! high task start! low task start! run into bl31 NOTICE: BL31: v1.3(release):4fc40b1 NOTICE: BL31: Built : 15:58:17, May 22 2019 NOTICE: BL31: G12A normal boot! NOTICE: BL31: BL33 decompress pass ERROR: Error initializing runtime service opteed_fast U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC Model: Libre Computer AML-A311D-CC Alta SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2) DRAM: 2 GiB (effective 3.8 GiB) Core: 408 devices, 31 uclasses, devicetree: separate WDT: Not starting watchdog@f0d0 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0 Loading Environment from FAT... Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Couldn't find partition mmc 0 Card did not respond to voltage select! : -110 ** Bad device specification mmc 0 ** Couldn't find partition mmc 0 Error: could not access storage. Net: eth0: ethernet@ff3f0000 starting USB... Bus usb@ff500000: Register 3000140 NbrPorts 3 Starting the controller USB XHCI 1.10 scanning bus usb@ff500000 for devices... 3 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 1  0 => setenv autoload no setenv autoload no => setenv initrd_high 0xffffffff setenv initrd_high 0xffffffff => setenv fdt_high 0xffffffff setenv fdt_high 0xffffffff => dhcp dhcp Speed: 1000, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.6.27 (3 ms) => setenv serverip 192.168.6.2 setenv serverip 192.168.6.2 => tftpboot 0x01080000 957169/tftp-deploy-u1wl1aey/kernel/uImage tftpboot 0x01080000 957169/tftp-deploy-u1wl1aey/kernel/uImage Speed: 1000, full duplex Using ethernet@ff3f0000 device TFTP from server 192.168.6.2; our IP address is 192.168.6.27 Filename '957169/tftp-deploy-u1wl1aey/kernel/uImage'. Load address: 0x1080000 Loading: *################################################## 63.4 MiB 14.3 MiB/s done Bytes transferred = 66443840 (3f5da40 hex) => tftpboot 0x08000000 957169/tftp-deploy-u1wl1aey/ramdisk/ramdisk.cpio.gz.uboot tftpboot 0x08000000 957169/tftp-deploy-u1wl1aey/ramdisk/ramdisk.cpio.gz.uboot Speed: 1000, full duplex Using ethernet@ff3f0000 device TFTP from server 192.168.6.2; our IP address is 192.168.6.27 Filename '957169/tftp-deploy-u1wl1aey/ramdisk/ramdisk.cpio.gz.uboot'. Load address: 0x8000000 Loading: *################################################## 32 MiB 15.4 MiB/s done Bytes transferred = 33576412 (20055dc hex) => tftpboot 0x01070000 957169/tftp-deploy-u1wl1aey/dtb/meson-g12b-a311d-libretech-cc.dtb tftpboot 0x01070000 957169/tftp-deploy-u1wl1aey/dtb/meson-g12b-a311d-libretech-cc.dtb Speed: 1000, full duplex Using ethernet@ff3f0000 device TFTP from server 192.168.6.2; our IP address is 192.168.6.27 Filename '957169/tftp-deploy-u1wl1aey/dtb/meson-g12b-a311d-libretech-cc.dtb'. Load address: 0x1070000 Loading: *################################################## 53.4 KiB 3.1 MiB/s done Bytes transferred = 54703 (d5af hex) => setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp' setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp' => bootm 0x01080000 0x08000000 0x01070000 bootm 0x01080000 0x08000000 0x01070000 ## Booting kernel from Legacy Image at 01080000 ... Image Name: Image Type: AArch64 Linux Kernel Image (uncompressed) Data Size: 66443776 Bytes = 63.4 MiB Load Address: 01080000 Entry Point: 01080000 Verifying Checksum ... OK ## Loading init Ramdisk from Legacy Image at 08000000 ... Image Name: Image Type: AArch64 Linux RAMDisk Image (uncompressed) Data Size: 33576348 Bytes = 32 MiB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK ## Flattened Device Tree blob at 01070000 Booting using the fdt blob at 0x1070000 Working FDT set to 1070000 Loading Kernel Image Loading Ramdisk to 7dffa000, end 7ffff59c ... OK Loading Device Tree to 000000007dfe9000, end 000000007dff95ae ... OK Working FDT set to 7dfe9000 Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034] [ 0.000000] Linux version 6.12.0-rc6 (KernelCI@build-j367778-arm64-gcc-12-defconfig-kselftest-464rv) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Fri Nov 8 01:16:55 UTC 2024 [ 0.000000] KASLR disabled due to lack of seed [ 0.000000] Machine model: Libre Computer AML-A311D-CC Alta [ 0.000000] efi: UEFI not found. [ 0.000000] [Firmware Bug]: Kernel image misaligned at boot, please fix your bootloader! [ 0.000000] OF: reserved mem: Reserved memory: failed to reserve memory for node 'secmon@5000000': base 0x0000000005000000, size 3 MiB [ 0.000000] Reserved memory: created CMA memory pool at 0x00000000e4c00000, size 256 MiB [ 0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool [ 0.000000] OF: reserved mem: 0x00000000e4c00000..0x00000000f4bfffff (262144 KiB) map reusable linux,cma [ 0.000000] OF: reserved mem: 0x0000000005000000..0x00000000052fffff (3072 KiB) nomap non-reusable secmon@5000000 [ 0.000000] OF: reserved mem: 0x0000000005300000..0x00000000072fffff (32768 KiB) nomap non-reusable secmon@5300000 [ 0.000000] earlycon: meson0 at MMIO 0x00000000ff803000 (options '115200n8') [ 0.000000] printk: legacy bootconsole [meson0] enabled [ 0.000000] NUMA: Faking a node at [mem 0x0000000000000000-0x00000000f4e5afff] [ 0.000000] NODE_DATA(0) allocated [mem 0xe4669980-0xe466c0bf] [ 0.000000] Zone ranges: [ 0.000000] DMA [mem 0x0000000000000000-0x00000000f4e5afff] [ 0.000000] DMA32 empty [ 0.000000] Normal empty [ 0.000000] Movable zone start for each node [ 0.000000] Early memory node ranges [ 0.000000] node 0: [mem 0x0000000000000000-0x00000000052fffff] [ 0.000000] node 0: [mem 0x0000000005300000-0x00000000072fffff] [ 0.000000] node 0: [mem 0x0000000007300000-0x00000000f4e5afff] [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x00000000f4e5afff] [ 0.000000] On node 0, zone DMA: 12709 pages in unavailable ranges [ 0.000000] psci: probing for conduit method from DT. [ 0.000000] psci: PSCIv1.0 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] psci: SMC Calling Convention v1.1 [ 0.000000] percpu: Embedded 34 pages/cpu s100568 r8192 d30504 u139264 [ 0.000000] Detected VIPT I-cache on CPU0 [ 0.000000] CPU features: detected: ARM erratum 845719 [ 0.000000] alternatives: applying boot alternatives [ 0.000000] Kernel command line: console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear) <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear) <6>[ 0.000000] Fallback order for Node 0: 0 <6>[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1003099 <6>[ 0.000000] Policy zone: DMA <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:on, heap free:on <6>[ 0.000000] mem auto-init: clearing system memory may take some time... <6>[ 0.000000] stackdepot: allocating hash table via alloc_large_system_hash <6>[ 0.000000] stackdepot hash table entries: 262144 (order: 10, 4194304 bytes, linear) <6>[ 0.000000] software IO TLB: SWIOTLB bounce buffer size adjusted to 3MB <6>[ 0.000000] software IO TLB: area num 8. <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000df800000-0x00000000dfc00000] (4MB) <4>[ 0.000000] ********************************************************** <4>[ 0.000000] ** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE ** <4>[ 0.000000] ** ** <4>[ 0.000000] ** This system shows unhashed kernel memory addresses ** <4>[ 0.000000] ** via the console, logs, and other interfaces. This ** <4>[ 0.000000] ** might reduce the security of your system. ** <4>[ 0.000000] ** ** <4>[ 0.000000] ** If you see this message and you are not debugging ** <4>[ 0.000000] ** the kernel, report this immediately to your system ** <4>[ 0.000000] ** administrator! ** <4>[ 0.000000] ** ** <4>[ 0.000000] ** NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE NOTICE ** <4>[ 0.000000] ********************************************************** <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=6, Nodes=1 <6>[ 0.000000] ftrace: allocating 76410 entries in 299 pages <6>[ 0.000000] ftrace: allocated 299 pages with 5 groups <6>[ 0.000000] trace event string verifier disabled <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation. <6>[ 0.000000] rcu: RCU event tracing is enabled. <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=512 to nr_cpu_ids=6. <6>[ 0.000000] Trampoline variant of Tasks RCU enabled. <6>[ 0.000000] Rude variant of Tasks RCU enabled. <6>[ 0.000000] Tracing variant of Tasks RCU enabled. <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies. <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=6 <6>[ 0.000000] RCU Tasks: Setting shift to 3 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=6. <6>[ 0.000000] RCU Tasks Rude: Setting shift to 3 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=6. <6>[ 0.000000] RCU Tasks Trace: Setting shift to 3 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=6. <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0 <6>[ 0.000000] Root IRQ handler: gic_handle_irq <6>[ 0.000000] GIC: Using split EOI/Deactivate mode <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention. <6>[ 0.000000] arch_timer: cp15 timer(s) running at 24.00MHz (phys). <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x588fe9dc0, max_idle_ns: 440795202592 ns <6>[ 0.000000] sched_clock: 56 bits at 24MHz, resolution 41ns, wraps every 4398046511097ns <6>[ 0.009025] Console: colour dummy device 80x25 <6>[ 0.013064] Calibrating delay loop (skipped), value calculated using timer frequency.. 48.00 BogoMIPS (lpj=24000) <6>[ 0.023304] pid_max: default: 32768 minimum: 301 <6>[ 0.028551] LSM: initializing lsm=capability,landlock,bpf,ima <6>[ 0.034354] landlock: Up and running. <6>[ 0.038873] LSM support for eBPF active <6>[ 0.042543] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear) <6>[ 0.049615] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear) <6>[ 0.067034] rcu: Hierarchical SRCU implementation. <6>[ 0.067085] rcu: Max phase no-delay instances is 400. <6>[ 0.072597] Timer migration: 1 hierarchy levels; 8 children per group; 1 crossnode level <6>[ 0.091627] EFI services will not be available. <6>[ 0.093735] smp: Bringing up secondary CPUs ... <6>[ 0.098479] Detected VIPT I-cache on CPU1 <6>[ 0.098619] CPU1: Booted secondary processor 0x0000000001 [0x410fd034] <6>[ 0.101632] CPU features: detected: Spectre-v2 <6>[ 0.101649] CPU features: detected: Spectre-v4 <6>[ 0.101654] CPU features: detected: Spectre-BHB <6>[ 0.101660] CPU features: detected: ARM erratum 858921 <6>[ 0.101670] Detected VIPT I-cache on CPU2 <6>[ 0.101749] arch_timer: Enabling local workaround for ARM erratum 858921 <6>[ 0.101769] arch_timer: CPU2: Trapping CNTVCT access <6>[ 0.101780] CPU2: Booted secondary processor 0x0000000100 [0x410fd092] <6>[ 0.104446] Detected VIPT I-cache on CPU3 <6>[ 0.104496] arch_timer: Enabling local workaround for ARM erratum 858921 <6>[ 0.104507] arch_timer: CPU3: Trapping CNTVCT access <6>[ 0.104515] CPU3: Booted secondary processor 0x0000000101 [0x410fd092] <6>[ 0.107489] Detected VIPT I-cache on CPU4 <6>[ 0.107541] arch_timer: Enabling local workaround for ARM erratum 858921 <6>[ 0.107552] arch_timer: CPU4: Trapping CNTVCT access <6>[ 0.107560] CPU4: Booted secondary processor 0x0000000102 [0x410fd092] <6>[ 0.109512] Detected VIPT I-cache on CPU5 <6>[ 0.109566] arch_timer: Enabling local workaround for ARM erratum 858921 <6>[ 0.109577] arch_timer: CPU5: Trapping CNTVCT access <6>[ 0.109585] CPU5: Booted secondary processor 0x0000000103 [0x410fd092] <6>[ 0.109795] smp: Brought up 1 node, 6 CPUs <6>[ 0.231077] SMP: Total of 6 processors activated. <6>[ 0.235953] CPU: All CPU(s) started at EL2 <6>[ 0.240286] CPU features: detected: 32-bit EL0 Support <6>[ 0.245598] CPU features: detected: 32-bit EL1 Support <6>[ 0.251001] CPU features: detected: CRC32 instructions <6>[ 0.256398] alternatives: applying system-wide alternatives <6>[ 0.265565] Memory: 3521224K/4012396K available (24512K kernel code, 7862K rwdata, 14736K rodata, 17600K init, 865K bss, 221524K reserved, 262144K cma-reserved) <6>[ 0.278880] devtmpfs: initialized <6>[ 0.327928] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns <6>[ 0.332300] futex hash table entries: 2048 (order: 5, 131072 bytes, linear) <6>[ 0.399162] 16304 pages in range for non-PLT usage <6>[ 0.399179] 507824 pages in range for PLT usage <6>[ 0.399776] pinctrl core: initialized pinctrl subsystem <6>[ 0.415150] DMI not present or invalid. <6>[ 0.419614] NET: Registered PF_NETLINK/PF_ROUTE protocol family <6>[ 0.422882] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations <6>[ 0.428210] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations <6>[ 0.436605] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations <6>[ 0.443600] audit: initializing netlink subsys (disabled) <5>[ 0.449545] audit: type=2000 audit(0.250:1): state=initialized audit_enabled=0 res=1 <6>[ 0.453980] thermal_sys: Registered thermal governor 'step_wise' <6>[ 0.456995] thermal_sys: Registered thermal governor 'power_allocator' <6>[ 0.463424] cpuidle: using governor menu <6>[ 0.474853] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. <6>[ 0.481260] ASID allocator initialised with 65536 entries <6>[ 0.495395] Serial: AMBA PL011 UART driver <6>[ 0.521734] platform ff600000.hdmi-tx: Fixed dependency cycle(s) with /soc/vpu@ff900000 <6>[ 0.586052] platform ff600000.hdmi-tx: Fixed dependency cycle(s) with /soc/vpu@ff900000 <6>[ 0.588897] platform ff900000.vpu: Fixed dependency cycle(s) with /soc/bus@ff600000/hdmi-tx@0 <6>[ 0.617723] platform ff900000.vpu: Fixed dependency cycle(s) with /cvbs-connector <6>[ 0.620054] platform cvbs-connector: Fixed dependency cycle(s) with /soc/vpu@ff900000 <6>[ 0.629632] platform ff600000.hdmi-tx: Fixed dependency cycle(s) with /hdmi-connector <6>[ 0.636069] platform hdmi-connector: Fixed dependency cycle(s) with /soc/bus@ff600000/hdmi-tx@0 <6>[ 0.663745] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages <6>[ 0.665165] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page <6>[ 0.671638] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages <6>[ 0.678617] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page <6>[ 0.685087] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages <6>[ 0.692072] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page <6>[ 0.698542] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages <6>[ 0.705526] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page <6>[ 0.718392] ACPI: Interpreter disabled. <6>[ 0.730819] iommu: Default domain type: Translated <6>[ 0.730858] iommu: DMA domain TLB invalidation policy: strict mode <5>[ 0.738468] SCSI subsystem initialized <6>[ 0.742106] usbcore: registered new interface driver usbfs <6>[ 0.746410] usbcore: registered new interface driver hub <6>[ 0.751942] usbcore: registered new device driver usb <6>[ 0.760757] pps_core: LinuxPPS API ver. 1 registered <6>[ 0.762248] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <6>[ 0.771622] PTP clock support registered <6>[ 0.776201] EDAC MC: Ver: 3.0.0 <6>[ 0.780328] scmi_core: SCMI protocol bus registered <6>[ 0.788010] FPGA manager framework <6>[ 0.788497] Advanced Linux Sound Architecture Driver Initialized. <6>[ 0.796175] NET: Registered PF_ATMPVC protocol family <6>[ 0.799336] NET: Registered PF_ATMSVC protocol family <6>[ 0.805425] vgaarb: loaded <6>[ 0.808716] clocksource: Switched to clocksource arch_sys_counter <5>[ 1.479536] VFS: Disk quotas dquot_6.6.0 <6>[ 1.479629] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes) <6>[ 1.486674] pnp: PnP ACPI: disabled <6>[ 1.508185] NET: Registered PF_INET protocol family <6>[ 1.508423] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear) <6>[ 1.519123] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear) <6>[ 1.524098] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear) <6>[ 1.532010] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear) <6>[ 1.540201] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear) <6>[ 1.547993] TCP: Hash tables configured (established 32768 bind 32768) <6>[ 1.554962] MPTCP token hash table entries: 4096 (order: 4, 98304 bytes, linear) <6>[ 1.562087] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear) <6>[ 1.568922] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear) <6>[ 1.576676] NET: Registered PF_UNIX/PF_LOCAL protocol family <6>[ 1.583457] RPC: Registered named UNIX socket transport module. <6>[ 1.588198] RPC: Registered udp transport module. <6>[ 1.593096] RPC: Registered tcp transport module. <6>[ 1.598011] RPC: Registered tcp-with-tls transport module. <6>[ 1.603708] RPC: Registered tcp NFSv4.1 backchannel transport module. <6>[ 1.610352] NET: Registered PF_XDP protocol family <6>[ 1.615361] PCI: CLS 0 bytes, default 64 <6>[ 1.620073] Unpacking initramfs... <6>[ 1.635780] kvm [1]: nv: 554 coarse grained trap handlers <6>[ 1.636493] kvm [1]: IPA Size Limit: 40 bits <6>[ 1.642204] kvm [1]: vgic interrupt IRQ9 <6>[ 1.644507] kvm [1]: Hyp nVHE mode initialized successfully <5>[ 1.656245] Initialise system trusted keyrings <6>[ 1.656734] workingset: timestamp_bits=42 max_order=20 bucket_order=0 <6>[ 1.671829] squashfs: version 4.0 (2009/01/31) Phillip Lougher <5>[ 1.673323] NFS: Registering the id_resolver key type <5>[ 1.677658] Key type id_resolver registered <5>[ 1.681960] Key type id_legacy registered <6>[ 1.686271] nfs4filelayout_init: NFSv4 File Layout Driver Registering... <6>[ 1.693090] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering... <6>[ 1.701138] 9p: Installing v9fs 9p2000 file system support <6>[ 1.748403] NET: Registered PF_ALG protocol family <5>[ 1.748475] Key type asymmetric registered <5>[ 1.752158] Asymmetric key parser 'x509' registered <6>[ 1.757483] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243) <6>[ 1.764849] io scheduler mq-deadline registered <6>[ 1.769574] io scheduler kyber registered <6>[ 1.773889] io scheduler bfq registered <4>[ 1.778502] test_firmware: interface ready <6>[ 1.789163] irq_meson_gpio: 100 to 8 gpio interrupt mux initialized <6>[ 1.855533] ledtrig-cpu: registered to indicate activity on CPUs <6>[ 1.974415] soc soc0: Amlogic Meson G12B (A311D) Revision 29:b (10:2) Detected <6>[ 2.013611] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled <6>[ 2.028961] ff803000.serial: ttyAML0 at MMIO 0xff803000 (irq = 14, base_baud = 1500000) is a meson_uart <6>[ 2.038612] printk: legacy console [ttyAML0] enabled <6>[ 2.038612] printk: legacy console [ttyAML0] enabled <6>[ 2.043423] printk: legacy bootconsole [meson0] disabled <6>[ 2.043423] printk: legacy bootconsole [meson0] disabled <6>[ 2.059785] msm_serial: driver initialized <6>[ 2.061395] SuperH (H)SCI(F) driver initialized <6>[ 2.064175] STM32 USART driver initialized <5>[ 2.074406] random: crng init done <6>[ 2.100803] loop: module loaded <6>[ 2.101205] lkdtm: No crash points registered, enable through debugfs <6>[ 2.110482] megasas: 07.727.03.00-rc1 <6>[ 2.144850] thunder_xcv, ver 1.0 <6>[ 2.144996] thunder_bgx, ver 1.0 <6>[ 2.146296] nicpf, ver 1.0 <6>[ 2.154587] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version <6>[ 2.156589] hns3: Copyright (c) 2017 Huawei Corporation. <6>[ 2.162290] hclge is initializing <6>[ 2.165840] e1000: Intel(R) PRO/1000 Network Driver <6>[ 2.170803] e1000: Copyright (c) 1999-2006 Intel Corporation. <6>[ 2.176918] e1000e: Intel(R) PRO/1000 Network Driver <6>[ 2.181998] e1000e: Copyright(c) 1999 - 2015 Intel Corporation. <6>[ 2.188277] igb: Intel(R) Gigabit Ethernet Network Driver <6>[ 2.193771] igb: Copyright (c) 2007-2014 Intel Corporation. <6>[ 2.199728] igbvf: Intel(R) Gigabit Virtual Function Network Driver <6>[ 2.206074] igbvf: Copyright (c) 2009 - 2012 Intel Corporation. <6>[ 2.213914] sky2: driver version 1.30 <6>[ 2.221973] VFIO - User Level meta-driver version: 0.3 <6>[ 2.234644] usbcore: registered new interface driver usb-storage <6>[ 2.248655] i2c_dev: i2c /dev entries driver <6>[ 2.282958] sdhci: Secure Digital Host Controller Interface driver <6>[ 2.283773] sdhci: Copyright(c) Pierre Ossman <6>[ 2.291554] Synopsys Designware Multimedia Card Interface Driver <6>[ 2.299025] sdhci-pltfm: SDHCI platform and OF driver helper <6>[ 2.310165] meson-sm: secure-monitor enabled <6>[ 2.313614] hid: raw HID events driver (C) Jiri Kosina <6>[ 2.317064] usbcore: registered new interface driver usbhid <6>[ 2.320259] usbhid: USB HID core driver <6>[ 2.357666] GACT probability on <6>[ 2.359587] ipip: IPv4 and MPLS over IPv4 tunneling driver <6>[ 2.362439] IPv4 over IPsec tunneling driver <6>[ 2.366889] IPsec XFRM device driver <6>[ 2.369691] NET: Registered PF_INET6 protocol family <6>[ 2.377676] Segment Routing with IPv6 <6>[ 2.378773] In-situ OAM (IOAM) with IPv6 <6>[ 2.384494] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver <6>[ 2.391722] NET: Registered PF_PACKET protocol family <6>[ 2.394265] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this. <6>[ 2.408021] 9pnet: Installing 9P2000 support <5>[ 2.412057] Key type dns_resolver registered <6>[ 2.416957] NET: Registered PF_VSOCK protocol family <6>[ 2.421648] mpls_gso: MPLS GSO support <6>[ 2.483402] registered taskstats version 1 <5>[ 2.491543] Loading compiled-in X.509 certificates <6>[ 3.312765] Freeing initrd memory: 32788K <5>[ 3.369193] Loaded X.509 cert 'Build time autogenerated kernel key: 84c11261961eca037f48868864d0f93e358d27a8' <6>[ 3.412035] Demotion targets for Node 0: null <6>[ 3.412666] ima: No TPM chip found, activating TPM-bypass! <6>[ 3.416802] ima: Allocated hash algorithm: sha1 <6>[ 3.421601] ima: No architecture policies found <6>[ 3.540662] dwc3-meson-g12a ffe09000.usb: USB2 ports: 2 <6>[ 3.540726] dwc3-meson-g12a ffe09000.usb: USB3 ports: 1 <4>[ 3.553688] dwc2 ff400000.usb: supply vusb_d not found, using dummy regulator <4>[ 3.555865] dwc2 ff400000.usb: supply vusb_a not found, using dummy regulator <6>[ 3.563498] dwc2 ff400000.usb: EPs: 7, dedicated fifos, 712 entries in SPRAM <6>[ 3.578384] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller <6>[ 3.578547] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 1 <6>[ 3.588854] xhci-hcd xhci-hcd.0.auto: hcc params 0x0228fe6c hci version 0x110 quirks 0x0000808000000010 <6>[ 3.596162] xhci-hcd xhci-hcd.0.auto: irq 16, io mem 0xff500000 <6>[ 3.602738] xhci-hcd xhci-hcd.0.auto: xHCI Host Controller <6>[ 3.607924] xhci-hcd xhci-hcd.0.auto: new USB bus registered, assigned bus number 2 <6>[ 3.615811] xhci-hcd xhci-hcd.0.auto: Host supports USB 3.0 SuperSpeed <6>[ 3.624396] hub 1-0:1.0: USB hub found <6>[ 3.626641] hub 1-0:1.0: 2 ports detected <6>[ 3.636977] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. <6>[ 3.641407] hub 2-0:1.0: USB hub found <6>[ 3.643774] hub 2-0:1.0: 1 port detected <6>[ 3.707035] meson-gx-mmc ffe05000.mmc: Got CD GPIO <6>[ 3.740674] meson-gx-mmc ffe07000.mmc: allocated mmc-pwrseq <6>[ 3.873746] usb 1-1: new high-speed USB device number 2 using xhci-hcd <6>[ 4.039203] hub 1-1:1.0: USB hub found <6>[ 4.039587] hub 1-1:1.0: 4 ports detected <6>[ 4.113898] usb 2-1: new SuperSpeed USB device number 2 using xhci-hcd <6>[ 4.121377] mmc0: new ultra high speed SDR104 SDXC card at address e624 <6>[ 4.125869] mmcblk0: mmc0:e624 SD64G 59.5 GiB <6>[ 4.135885] mmcblk0: p1 <6>[ 4.168058] hub 2-1:1.0: USB hub found <6>[ 4.168957] hub 2-1:1.0: 4 ports detected <6>[ 23.768729] Waiting up to 100 more seconds for network. <6>[ 43.768726] Waiting up to 80 more seconds for network. <6>[ 63.768730] Waiting up to 60 more seconds for network. <4>[ 66.745743] platform cpufreq-dt: deferred probe pending: (reason unknown) <4>[ 66.747188] platform led-blue: deferred probe pending: leds_pwm: unable to request PWM for led <4>[ 66.756008] platform led-green: deferred probe pending: leds_pwm: unable to request PWM for led <4>[ 66.764931] platform regulator-vddcpu-b: deferred probe pending: pwm-regulator: Failed to get PWM <6>[ 83.768732] Waiting up to 40 more seconds for network. <6>[ 103.768725] Waiting up to 20 more seconds for network. # <6>[ 123.768726] Waiting up to 0 more seconds for network. # # # # <5>[ 123.779735] Sending DHCP requests ...... timed out! <3>[ 209.030428] IP-Config: Reopening network devices...