Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:35:43.567946 lava-dispatcher, installed at version: 2024.01
2 03:35:43.568816 start: 0 validate
3 03:35:43.569293 Start time: 2024-11-08 03:35:43.569263+00:00 (UTC)
4 03:35:43.569855 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:35:43.570393 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:35:43.616620 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:35:43.617185 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
8 03:35:43.650313 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:35:43.650951 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 03:35:43.685855 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:35:43.686519 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:35:43.719766 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:35:43.720271 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
14 03:35:43.764590 validate duration: 0.20
16 03:35:43.766115 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:35:43.766737 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:35:43.767311 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:35:43.768352 Not decompressing ramdisk as can be used compressed.
20 03:35:43.769152 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 03:35:43.769660 saving as /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/ramdisk/initrd.cpio.gz
22 03:35:43.770189 total size: 5628169 (5 MB)
23 03:35:43.807966 progress 0 % (0 MB)
24 03:35:43.816853 progress 5 % (0 MB)
25 03:35:43.825358 progress 10 % (0 MB)
26 03:35:43.832919 progress 15 % (0 MB)
27 03:35:43.840543 progress 20 % (1 MB)
28 03:35:43.844186 progress 25 % (1 MB)
29 03:35:43.848206 progress 30 % (1 MB)
30 03:35:43.852239 progress 35 % (1 MB)
31 03:35:43.855786 progress 40 % (2 MB)
32 03:35:43.859744 progress 45 % (2 MB)
33 03:35:43.863338 progress 50 % (2 MB)
34 03:35:43.867527 progress 55 % (2 MB)
35 03:35:43.871603 progress 60 % (3 MB)
36 03:35:43.875205 progress 65 % (3 MB)
37 03:35:43.879136 progress 70 % (3 MB)
38 03:35:43.882665 progress 75 % (4 MB)
39 03:35:43.886620 progress 80 % (4 MB)
40 03:35:43.890152 progress 85 % (4 MB)
41 03:35:43.893886 progress 90 % (4 MB)
42 03:35:43.897499 progress 95 % (5 MB)
43 03:35:43.900768 progress 100 % (5 MB)
44 03:35:43.901425 5 MB downloaded in 0.13 s (40.90 MB/s)
45 03:35:43.901962 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:35:43.902876 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:35:43.903174 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:35:43.903445 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:35:43.903907 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/clang-16/kernel/Image
51 03:35:43.904179 saving as /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/kernel/Image
52 03:35:43.904391 total size: 37880320 (36 MB)
53 03:35:43.904602 No compression specified
54 03:35:43.944565 progress 0 % (0 MB)
55 03:35:43.968158 progress 5 % (1 MB)
56 03:35:43.992092 progress 10 % (3 MB)
57 03:35:44.016044 progress 15 % (5 MB)
58 03:35:44.039719 progress 20 % (7 MB)
59 03:35:44.063637 progress 25 % (9 MB)
60 03:35:44.086977 progress 30 % (10 MB)
61 03:35:44.110566 progress 35 % (12 MB)
62 03:35:44.134172 progress 40 % (14 MB)
63 03:35:44.157947 progress 45 % (16 MB)
64 03:35:44.181683 progress 50 % (18 MB)
65 03:35:44.204927 progress 55 % (19 MB)
66 03:35:44.229015 progress 60 % (21 MB)
67 03:35:44.252656 progress 65 % (23 MB)
68 03:35:44.276401 progress 70 % (25 MB)
69 03:35:44.300090 progress 75 % (27 MB)
70 03:35:44.323181 progress 80 % (28 MB)
71 03:35:44.346931 progress 85 % (30 MB)
72 03:35:44.370546 progress 90 % (32 MB)
73 03:35:44.394774 progress 95 % (34 MB)
74 03:35:44.417654 progress 100 % (36 MB)
75 03:35:44.418179 36 MB downloaded in 0.51 s (70.31 MB/s)
76 03:35:44.418650 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:35:44.419465 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:35:44.419741 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:35:44.420030 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:35:44.420503 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 03:35:44.420777 saving as /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 03:35:44.420986 total size: 53209 (0 MB)
84 03:35:44.421197 No compression specified
85 03:35:44.462489 progress 61 % (0 MB)
86 03:35:44.463379 progress 100 % (0 MB)
87 03:35:44.464013 0 MB downloaded in 0.04 s (1.18 MB/s)
88 03:35:44.464542 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:35:44.465359 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:35:44.465623 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:35:44.465887 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:35:44.466349 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 03:35:44.466589 saving as /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/nfsrootfs/full.rootfs.tar
95 03:35:44.466792 total size: 120894716 (115 MB)
96 03:35:44.467002 Using unxz to decompress xz
97 03:35:44.501227 progress 0 % (0 MB)
98 03:35:45.291969 progress 5 % (5 MB)
99 03:35:46.130514 progress 10 % (11 MB)
100 03:35:46.921158 progress 15 % (17 MB)
101 03:35:47.662216 progress 20 % (23 MB)
102 03:35:48.261708 progress 25 % (28 MB)
103 03:35:49.143335 progress 30 % (34 MB)
104 03:35:49.932021 progress 35 % (40 MB)
105 03:35:50.301444 progress 40 % (46 MB)
106 03:35:50.689557 progress 45 % (51 MB)
107 03:35:51.404568 progress 50 % (57 MB)
108 03:35:52.280632 progress 55 % (63 MB)
109 03:35:53.058518 progress 60 % (69 MB)
110 03:35:53.814635 progress 65 % (74 MB)
111 03:35:54.589251 progress 70 % (80 MB)
112 03:35:55.418456 progress 75 % (86 MB)
113 03:35:56.207856 progress 80 % (92 MB)
114 03:35:56.970272 progress 85 % (98 MB)
115 03:35:57.829835 progress 90 % (103 MB)
116 03:35:58.609836 progress 95 % (109 MB)
117 03:35:59.458419 progress 100 % (115 MB)
118 03:35:59.470890 115 MB downloaded in 15.00 s (7.68 MB/s)
119 03:35:59.471836 end: 1.4.1 http-download (duration 00:00:15) [common]
121 03:35:59.473690 end: 1.4 download-retry (duration 00:00:15) [common]
122 03:35:59.474284 start: 1.5 download-retry (timeout 00:09:44) [common]
123 03:35:59.474870 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 03:35:59.475893 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/clang-16/modules.tar.xz
125 03:35:59.476457 saving as /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/modules/modules.tar
126 03:35:59.476932 total size: 11768564 (11 MB)
127 03:35:59.477550 Using unxz to decompress xz
128 03:35:59.524636 progress 0 % (0 MB)
129 03:35:59.603390 progress 5 % (0 MB)
130 03:35:59.691564 progress 10 % (1 MB)
131 03:35:59.791765 progress 15 % (1 MB)
132 03:35:59.887323 progress 20 % (2 MB)
133 03:35:59.966025 progress 25 % (2 MB)
134 03:36:00.042671 progress 30 % (3 MB)
135 03:36:00.122946 progress 35 % (3 MB)
136 03:36:00.202552 progress 40 % (4 MB)
137 03:36:00.277933 progress 45 % (5 MB)
138 03:36:00.363753 progress 50 % (5 MB)
139 03:36:00.445594 progress 55 % (6 MB)
140 03:36:00.530128 progress 60 % (6 MB)
141 03:36:00.611485 progress 65 % (7 MB)
142 03:36:00.693096 progress 70 % (7 MB)
143 03:36:00.775803 progress 75 % (8 MB)
144 03:36:00.861518 progress 80 % (9 MB)
145 03:36:00.942248 progress 85 % (9 MB)
146 03:36:01.025631 progress 90 % (10 MB)
147 03:36:01.104501 progress 95 % (10 MB)
148 03:36:01.181645 progress 100 % (11 MB)
149 03:36:01.192169 11 MB downloaded in 1.72 s (6.54 MB/s)
150 03:36:01.193129 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:36:01.194915 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:36:01.195487 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 03:36:01.196089 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 03:36:18.455801 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/956978/extract-nfsrootfs-bcyh5l5d
156 03:36:18.456426 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 03:36:18.456750 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 03:36:18.457523 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg
159 03:36:18.458045 makedir: /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin
160 03:36:18.458468 makedir: /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/tests
161 03:36:18.458869 makedir: /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/results
162 03:36:18.459228 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-add-keys
163 03:36:18.459759 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-add-sources
164 03:36:18.460350 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-background-process-start
165 03:36:18.460921 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-background-process-stop
166 03:36:18.461445 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-common-functions
167 03:36:18.461930 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-echo-ipv4
168 03:36:18.462410 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-install-packages
169 03:36:18.462880 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-installed-packages
170 03:36:18.463352 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-os-build
171 03:36:18.463823 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-probe-channel
172 03:36:18.464345 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-probe-ip
173 03:36:18.464821 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-target-ip
174 03:36:18.465288 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-target-mac
175 03:36:18.465783 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-target-storage
176 03:36:18.466330 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-test-case
177 03:36:18.466816 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-test-event
178 03:36:18.467288 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-test-feedback
179 03:36:18.467756 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-test-raise
180 03:36:18.468337 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-test-reference
181 03:36:18.468847 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-test-runner
182 03:36:18.469341 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-test-set
183 03:36:18.469867 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-test-shell
184 03:36:18.470409 Updating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-add-keys (debian)
185 03:36:18.470938 Updating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-add-sources (debian)
186 03:36:18.471440 Updating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-install-packages (debian)
187 03:36:18.471934 Updating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-installed-packages (debian)
188 03:36:18.472475 Updating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/bin/lava-os-build (debian)
189 03:36:18.472931 Creating /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/environment
190 03:36:18.473301 LAVA metadata
191 03:36:18.473560 - LAVA_JOB_ID=956978
192 03:36:18.473775 - LAVA_DISPATCHER_IP=192.168.6.2
193 03:36:18.474144 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 03:36:18.475122 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 03:36:18.475439 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 03:36:18.475648 skipped lava-vland-overlay
197 03:36:18.475887 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 03:36:18.476183 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 03:36:18.476404 skipped lava-multinode-overlay
200 03:36:18.476646 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 03:36:18.476896 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 03:36:18.477142 Loading test definitions
203 03:36:18.477419 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 03:36:18.477639 Using /lava-956978 at stage 0
205 03:36:18.478710 uuid=956978_1.6.2.4.1 testdef=None
206 03:36:18.479019 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 03:36:18.479282 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 03:36:18.480894 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 03:36:18.481688 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 03:36:18.483655 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 03:36:18.484518 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 03:36:18.486393 runner path: /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/0/tests/0_timesync-off test_uuid 956978_1.6.2.4.1
215 03:36:18.486953 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 03:36:18.487758 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 03:36:18.487997 Using /lava-956978 at stage 0
219 03:36:18.488389 Fetching tests from https://github.com/kernelci/test-definitions.git
220 03:36:18.488735 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/0/tests/1_kselftest-alsa'
221 03:36:21.817185 Running '/usr/bin/git checkout kernelci.org
222 03:36:22.363001 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 03:36:22.364962 uuid=956978_1.6.2.4.5 testdef=None
224 03:36:22.365636 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 03:36:22.367271 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 03:36:22.373475 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 03:36:22.375250 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 03:36:22.383403 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 03:36:22.385314 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 03:36:22.393081 runner path: /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/0/tests/1_kselftest-alsa test_uuid 956978_1.6.2.4.5
234 03:36:22.393677 BOARD='meson-sm1-s905d3-libretech-cc'
235 03:36:22.394134 BRANCH='mainline'
236 03:36:22.394616 SKIPFILE='/dev/null'
237 03:36:22.395091 SKIP_INSTALL='True'
238 03:36:22.395546 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/clang-16/kselftest.tar.xz'
239 03:36:22.396012 TST_CASENAME=''
240 03:36:22.396456 TST_CMDFILES='alsa'
241 03:36:22.397569 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 03:36:22.399355 Creating lava-test-runner.conf files
244 03:36:22.399824 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/956978/lava-overlay-lbp0kpsg/lava-956978/0 for stage 0
245 03:36:22.400592 - 0_timesync-off
246 03:36:22.401130 - 1_kselftest-alsa
247 03:36:22.401863 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 03:36:22.402503 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 03:36:45.833977 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 03:36:45.834423 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 03:36:45.834721 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 03:36:45.835029 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 03:36:45.835324 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 03:36:46.541702 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 03:36:46.542181 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 03:36:46.542457 extracting modules file /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956978/extract-nfsrootfs-bcyh5l5d
257 03:36:47.949521 extracting modules file /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956978/extract-overlay-ramdisk-8uu_0t1u/ramdisk
258 03:36:49.381460 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 03:36:49.381944 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 03:36:49.382255 [common] Applying overlay to NFS
261 03:36:49.382482 [common] Applying overlay /var/lib/lava/dispatcher/tmp/956978/compress-overlay-djj6cg8s/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/956978/extract-nfsrootfs-bcyh5l5d
262 03:36:52.106820 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 03:36:52.107258 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 03:36:52.107563 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 03:36:52.107823 Converting downloaded kernel to a uImage
266 03:36:52.108175 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/kernel/Image /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/kernel/uImage
267 03:36:52.526073 output: Image Name:
268 03:36:52.526486 output: Created: Fri Nov 8 03:36:52 2024
269 03:36:52.526699 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 03:36:52.526904 output: Data Size: 37880320 Bytes = 36992.50 KiB = 36.13 MiB
271 03:36:52.527106 output: Load Address: 01080000
272 03:36:52.527305 output: Entry Point: 01080000
273 03:36:52.527503 output:
274 03:36:52.527834 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 03:36:52.528154 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 03:36:52.528435 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 03:36:52.528693 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 03:36:52.528953 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 03:36:52.529213 Building ramdisk /var/lib/lava/dispatcher/tmp/956978/extract-overlay-ramdisk-8uu_0t1u/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/956978/extract-overlay-ramdisk-8uu_0t1u/ramdisk
280 03:36:54.785567 >> 173443 blocks
281 03:37:02.472690 Adding RAMdisk u-boot header.
282 03:37:02.473415 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/956978/extract-overlay-ramdisk-8uu_0t1u/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/956978/extract-overlay-ramdisk-8uu_0t1u/ramdisk.cpio.gz.uboot
283 03:37:02.736806 output: Image Name:
284 03:37:02.737230 output: Created: Fri Nov 8 03:37:02 2024
285 03:37:02.737444 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 03:37:02.737652 output: Data Size: 24149525 Bytes = 23583.52 KiB = 23.03 MiB
287 03:37:02.737860 output: Load Address: 00000000
288 03:37:02.738063 output: Entry Point: 00000000
289 03:37:02.738266 output:
290 03:37:02.738908 rename /var/lib/lava/dispatcher/tmp/956978/extract-overlay-ramdisk-8uu_0t1u/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/ramdisk/ramdisk.cpio.gz.uboot
291 03:37:02.739331 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 03:37:02.739619 end: 1.6 prepare-tftp-overlay (duration 00:01:02) [common]
293 03:37:02.739899 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 03:37:02.740364 No LXC device requested
295 03:37:02.740932 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 03:37:02.741503 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 03:37:02.742056 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 03:37:02.742516 Checking files for TFTP limit of 4294967296 bytes.
299 03:37:02.745507 end: 1 tftp-deploy (duration 00:01:19) [common]
300 03:37:02.746140 start: 2 uboot-action (timeout 00:05:00) [common]
301 03:37:02.746748 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 03:37:02.747344 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 03:37:02.747908 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 03:37:02.748543 Using kernel file from prepare-kernel: 956978/tftp-deploy-hkzriuke/kernel/uImage
305 03:37:02.749242 substitutions:
306 03:37:02.749696 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 03:37:02.750149 - {DTB_ADDR}: 0x01070000
308 03:37:02.750593 - {DTB}: 956978/tftp-deploy-hkzriuke/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 03:37:02.751038 - {INITRD}: 956978/tftp-deploy-hkzriuke/ramdisk/ramdisk.cpio.gz.uboot
310 03:37:02.751479 - {KERNEL_ADDR}: 0x01080000
311 03:37:02.751925 - {KERNEL}: 956978/tftp-deploy-hkzriuke/kernel/uImage
312 03:37:02.752409 - {LAVA_MAC}: None
313 03:37:02.752892 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/956978/extract-nfsrootfs-bcyh5l5d
314 03:37:02.753336 - {NFS_SERVER_IP}: 192.168.6.2
315 03:37:02.753768 - {PRESEED_CONFIG}: None
316 03:37:02.754201 - {PRESEED_LOCAL}: None
317 03:37:02.754635 - {RAMDISK_ADDR}: 0x08000000
318 03:37:02.755063 - {RAMDISK}: 956978/tftp-deploy-hkzriuke/ramdisk/ramdisk.cpio.gz.uboot
319 03:37:02.755496 - {ROOT_PART}: None
320 03:37:02.755929 - {ROOT}: None
321 03:37:02.756395 - {SERVER_IP}: 192.168.6.2
322 03:37:02.756827 - {TEE_ADDR}: 0x83000000
323 03:37:02.757253 - {TEE}: None
324 03:37:02.757681 Parsed boot commands:
325 03:37:02.758098 - setenv autoload no
326 03:37:02.758526 - setenv initrd_high 0xffffffff
327 03:37:02.758952 - setenv fdt_high 0xffffffff
328 03:37:02.759377 - dhcp
329 03:37:02.759801 - setenv serverip 192.168.6.2
330 03:37:02.760262 - tftpboot 0x01080000 956978/tftp-deploy-hkzriuke/kernel/uImage
331 03:37:02.760700 - tftpboot 0x08000000 956978/tftp-deploy-hkzriuke/ramdisk/ramdisk.cpio.gz.uboot
332 03:37:02.761132 - tftpboot 0x01070000 956978/tftp-deploy-hkzriuke/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 03:37:02.761564 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/956978/extract-nfsrootfs-bcyh5l5d,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 03:37:02.762011 - bootm 0x01080000 0x08000000 0x01070000
335 03:37:02.762567 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 03:37:02.764240 start: 2.3 connect-device (timeout 00:05:00) [common]
338 03:37:02.764707 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 03:37:02.779497 Setting prompt string to ['lava-test: # ']
340 03:37:02.781158 end: 2.3 connect-device (duration 00:00:00) [common]
341 03:37:02.781831 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 03:37:02.782436 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 03:37:02.783006 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 03:37:02.784498 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 03:37:02.822266 >> OK - accepted request
346 03:37:02.824148 Returned 0 in 0 seconds
347 03:37:02.925335 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 03:37:02.927091 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 03:37:02.927693 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 03:37:02.928297 Setting prompt string to ['Hit any key to stop autoboot']
352 03:37:02.928789 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 03:37:02.930478 Trying 192.168.56.21...
354 03:37:02.931007 Connected to conserv1.
355 03:37:02.931468 Escape character is '^]'.
356 03:37:02.931922
357 03:37:02.932432 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 03:37:02.932908
359 03:37:10.401543 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 03:37:10.402228 bl2_stage_init 0x01
361 03:37:10.402699 bl2_stage_init 0x81
362 03:37:10.407100 hw id: 0x0000 - pwm id 0x01
363 03:37:10.407656 bl2_stage_init 0xc1
364 03:37:10.408205 bl2_stage_init 0x02
365 03:37:10.408690
366 03:37:10.412744 L0:00000000
367 03:37:10.413310 L1:00000703
368 03:37:10.413772 L2:00008067
369 03:37:10.414221 L3:15000000
370 03:37:10.414665 S1:00000000
371 03:37:10.418322 B2:20282000
372 03:37:10.418881 B1:a0f83180
373 03:37:10.419339
374 03:37:10.419779 TE: 71669
375 03:37:10.420289
376 03:37:10.423926 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 03:37:10.424482
378 03:37:10.429504 Board ID = 1
379 03:37:10.430009 Set cpu clk to 24M
380 03:37:10.430445 Set clk81 to 24M
381 03:37:10.435103 Use GP1_pll as DSU clk.
382 03:37:10.435613 DSU clk: 1200 Mhz
383 03:37:10.436089 CPU clk: 1200 MHz
384 03:37:10.436525 Set clk81 to 166.6M
385 03:37:10.446251 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 03:37:10.446787 board id: 1
387 03:37:10.452486 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 03:37:10.463624 fw parse done
389 03:37:10.469551 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 03:37:10.511801 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 03:37:10.523818 PIEI prepare done
392 03:37:10.524377 fastboot data load
393 03:37:10.524819 fastboot data verify
394 03:37:10.529405 verify result: 266
395 03:37:10.535031 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 03:37:10.535547 LPDDR4 probe
397 03:37:10.536020 ddr clk to 1584MHz
398 03:37:10.542621 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 03:37:10.580727
400 03:37:10.581292 dmc_version 0001
401 03:37:10.587832 Check phy result
402 03:37:10.593730 INFO : End of CA training
403 03:37:10.594237 INFO : End of initialization
404 03:37:10.599358 INFO : Training has run successfully!
405 03:37:10.599858 Check phy result
406 03:37:10.604948 INFO : End of initialization
407 03:37:10.605450 INFO : End of read enable training
408 03:37:10.610528 INFO : End of fine write leveling
409 03:37:10.616177 INFO : End of Write leveling coarse delay
410 03:37:10.616678 INFO : Training has run successfully!
411 03:37:10.617120 Check phy result
412 03:37:10.621718 INFO : End of initialization
413 03:37:10.622224 INFO : End of read dq deskew training
414 03:37:10.627333 INFO : End of MPR read delay center optimization
415 03:37:10.632924 INFO : End of write delay center optimization
416 03:37:10.638533 INFO : End of read delay center optimization
417 03:37:10.639032 INFO : End of max read latency training
418 03:37:10.644227 INFO : Training has run successfully!
419 03:37:10.644750 1D training succeed
420 03:37:10.653320 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 03:37:10.701635 Check phy result
422 03:37:10.702154 INFO : End of initialization
423 03:37:10.729023 INFO : End of 2D read delay Voltage center optimization
424 03:37:10.753182 INFO : End of 2D read delay Voltage center optimization
425 03:37:10.809840 INFO : End of 2D write delay Voltage center optimization
426 03:37:10.863749 INFO : End of 2D write delay Voltage center optimization
427 03:37:10.869293 INFO : Training has run successfully!
428 03:37:10.869801
429 03:37:10.870248 channel==0
430 03:37:10.874943 RxClkDly_Margin_A0==88 ps 9
431 03:37:10.875474 TxDqDly_Margin_A0==88 ps 9
432 03:37:10.878223 RxClkDly_Margin_A1==88 ps 9
433 03:37:10.878732 TxDqDly_Margin_A1==98 ps 10
434 03:37:10.883694 TrainedVREFDQ_A0==74
435 03:37:10.884239 TrainedVREFDQ_A1==75
436 03:37:10.884681 VrefDac_Margin_A0==24
437 03:37:10.889312 DeviceVref_Margin_A0==40
438 03:37:10.889814 VrefDac_Margin_A1==22
439 03:37:10.894949 DeviceVref_Margin_A1==39
440 03:37:10.895464
441 03:37:10.895927
442 03:37:10.896428 channel==1
443 03:37:10.896871 RxClkDly_Margin_A0==88 ps 9
444 03:37:10.900529 TxDqDly_Margin_A0==88 ps 9
445 03:37:10.901047 RxClkDly_Margin_A1==78 ps 8
446 03:37:10.906199 TxDqDly_Margin_A1==78 ps 8
447 03:37:10.906725 TrainedVREFDQ_A0==75
448 03:37:10.907189 TrainedVREFDQ_A1==75
449 03:37:10.911733 VrefDac_Margin_A0==22
450 03:37:10.912299 DeviceVref_Margin_A0==39
451 03:37:10.917301 VrefDac_Margin_A1==22
452 03:37:10.917833 DeviceVref_Margin_A1==39
453 03:37:10.918269
454 03:37:10.922927 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 03:37:10.923452
456 03:37:10.950915 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
457 03:37:10.956514 2D training succeed
458 03:37:10.962210 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 03:37:10.962741 auto size-- 65535DDR cs0 size: 2048MB
460 03:37:10.967766 DDR cs1 size: 2048MB
461 03:37:10.968109 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 03:37:10.973224 cs0 DataBus test pass
463 03:37:10.973498 cs1 DataBus test pass
464 03:37:10.973732 cs0 AddrBus test pass
465 03:37:10.978824 cs1 AddrBus test pass
466 03:37:10.979102
467 03:37:10.979343 100bdlr_step_size ps== 471
468 03:37:10.979578 result report
469 03:37:10.984388 boot times 0Enable ddr reg access
470 03:37:10.991891 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 03:37:11.005703 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 03:37:11.664265 bl2z: ptr: 05129330, size: 00001e40
473 03:37:11.672619 0.0;M3 CHK:0;cm4_sp_mode 0
474 03:37:11.673165 MVN_1=0x00000000
475 03:37:11.673587 MVN_2=0x00000000
476 03:37:11.684245 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 03:37:11.684723 OPS=0x04
478 03:37:11.685096 ring efuse init
479 03:37:11.689732 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 03:37:11.690165 [0.017355 Inits done]
481 03:37:11.690533 secure task start!
482 03:37:11.697413 high task start!
483 03:37:11.697854 low task start!
484 03:37:11.698195 run into bl31
485 03:37:11.706405 NOTICE: BL31: v1.3(release):4fc40b1
486 03:37:11.714029 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 03:37:11.714449 NOTICE: BL31: G12A normal boot!
488 03:37:11.729734 NOTICE: BL31: BL33 decompress pass
489 03:37:11.737237 ERROR: Error initializing runtime service opteed_fast
490 03:37:12.951084 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 03:37:12.951703 bl2_stage_init 0x01
492 03:37:12.952151 bl2_stage_init 0x81
493 03:37:12.956645 hw id: 0x0000 - pwm id 0x01
494 03:37:12.957088 bl2_stage_init 0xc1
495 03:37:12.957484 bl2_stage_init 0x02
496 03:37:12.957874
497 03:37:12.962352 L0:00000000
498 03:37:12.962788 L1:00000703
499 03:37:12.963181 L2:00008067
500 03:37:12.963566 L3:15000000
501 03:37:12.963950 S1:00000000
502 03:37:12.967890 B2:20282000
503 03:37:12.968333 B1:a0f83180
504 03:37:12.968721
505 03:37:12.969110 TE: 70180
506 03:37:12.969495
507 03:37:12.973454 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 03:37:12.973891
509 03:37:12.974284 Board ID = 1
510 03:37:12.979077 Set cpu clk to 24M
511 03:37:12.979506 Set clk81 to 24M
512 03:37:12.979896 Use GP1_pll as DSU clk.
513 03:37:12.984648 DSU clk: 1200 Mhz
514 03:37:12.985130 CPU clk: 1200 MHz
515 03:37:12.985518 Set clk81 to 166.6M
516 03:37:12.990381 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 03:37:12.995861 board id: 1
518 03:37:13.000915 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 03:37:13.012312 fw parse done
520 03:37:13.018167 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 03:37:13.060596 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 03:37:13.071561 PIEI prepare done
523 03:37:13.072052 fastboot data load
524 03:37:13.072457 fastboot data verify
525 03:37:13.077135 verify result: 266
526 03:37:13.082738 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 03:37:13.083197 LPDDR4 probe
528 03:37:13.083596 ddr clk to 1584MHz
529 03:37:14.451262 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd00 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 03:37:14.451894 bl2_stage_init 0x01
531 03:37:14.452372 bl2_stage_init 0x81
532 03:37:14.456773 hw id: 0x0000 - pwm id 0x01
533 03:37:14.457315 bl2_stage_init 0xc1
534 03:37:14.461022 bl2_stage_init 0x02
535 03:37:14.461466
536 03:37:14.461873 L0:00000000
537 03:37:14.462269 L1:00000703
538 03:37:14.462663 L2:00008067
539 03:37:14.466561 L3:15000000
540 03:37:14.466987 S1:00000000
541 03:37:14.467381 B2:20282000
542 03:37:14.467772 B1:a0f83180
543 03:37:14.468205
544 03:37:14.468600 TE: 70893
545 03:37:14.472146
546 03:37:14.477744 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 03:37:14.478169
548 03:37:14.478563 Board ID = 1
549 03:37:14.478955 Set cpu clk to 24M
550 03:37:14.483314 Set clk81 to 24M
551 03:37:14.483732 Use GP1_pll as DSU clk.
552 03:37:14.484157 DSU clk: 1200 Mhz
553 03:37:14.484551 CPU clk: 1200 MHz
554 03:37:14.488936 Set clk81 to 166.6M
555 03:37:14.494557 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 03:37:14.494981 board id: 1
557 03:37:14.502236 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 03:37:14.514039 fw parse done
559 03:37:14.520051 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 03:37:14.562130 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 03:37:14.574254 PIEI prepare done
562 03:37:14.574695 fastboot data load
563 03:37:14.575096 fastboot data verify
564 03:37:14.579749 verify result: 266
565 03:37:14.585355 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 03:37:14.585781 LPDDR4 probe
567 03:37:14.586176 ddr clk to 1584MHz
568 03:37:14.592389 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 03:37:14.631212
570 03:37:14.631730 dmc_version 0001
571 03:37:14.637282 Check phy result
572 03:37:14.644209 INFO : End of CA training
573 03:37:14.644634 INFO : End of initialization
574 03:37:14.649804 INFO : Training has run successfully!
575 03:37:14.650228 Check phy result
576 03:37:14.655399 INFO : End of initialization
577 03:37:14.655819 INFO : End of read enable training
578 03:37:14.660989 INFO : End of fine write leveling
579 03:37:14.666606 INFO : End of Write leveling coarse delay
580 03:37:14.667027 INFO : Training has run successfully!
581 03:37:14.667416 Check phy result
582 03:37:14.672227 INFO : End of initialization
583 03:37:14.672649 INFO : End of read dq deskew training
584 03:37:14.677739 INFO : End of MPR read delay center optimization
585 03:37:14.683346 INFO : End of write delay center optimization
586 03:37:14.688962 INFO : End of read delay center optimization
587 03:37:14.689384 INFO : End of max read latency training
588 03:37:14.694610 INFO : Training has run successfully!
589 03:37:14.695037 1D training succeed
590 03:37:14.702837 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 03:37:14.752079 Check phy result
592 03:37:14.752572 INFO : End of initialization
593 03:37:14.779457 INFO : End of 2D read delay Voltage center optimization
594 03:37:14.803843 INFO : End of 2D read delay Voltage center optimization
595 03:37:14.860350 INFO : End of 2D write delay Voltage center optimization
596 03:37:14.914390 INFO : End of 2D write delay Voltage center optimization
597 03:37:14.920015 INFO : Training has run successfully!
598 03:37:14.920494
599 03:37:14.920891 channel==0
600 03:37:14.925484 RxClkDly_Margin_A0==88 ps 9
601 03:37:14.925913 TxDqDly_Margin_A0==98 ps 10
602 03:37:14.931122 RxClkDly_Margin_A1==88 ps 9
603 03:37:14.931538 TxDqDly_Margin_A1==88 ps 9
604 03:37:14.931934 TrainedVREFDQ_A0==74
605 03:37:14.936717 TrainedVREFDQ_A1==74
606 03:37:14.937140 VrefDac_Margin_A0==24
607 03:37:14.937530 DeviceVref_Margin_A0==40
608 03:37:14.942311 VrefDac_Margin_A1==23
609 03:37:14.942723 DeviceVref_Margin_A1==40
610 03:37:14.943113
611 03:37:14.943503
612 03:37:14.943890 channel==1
613 03:37:14.947870 RxClkDly_Margin_A0==88 ps 9
614 03:37:14.948327 TxDqDly_Margin_A0==98 ps 10
615 03:37:14.953463 RxClkDly_Margin_A1==78 ps 8
616 03:37:14.953885 TxDqDly_Margin_A1==88 ps 9
617 03:37:14.959332 TrainedVREFDQ_A0==78
618 03:37:14.959748 TrainedVREFDQ_A1==75
619 03:37:14.960182 VrefDac_Margin_A0==22
620 03:37:14.964662 DeviceVref_Margin_A0==36
621 03:37:14.965088 VrefDac_Margin_A1==22
622 03:37:14.970235 DeviceVref_Margin_A1==39
623 03:37:14.970651
624 03:37:14.971041 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 03:37:14.971427
626 03:37:15.003866 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
627 03:37:15.004365 2D training succeed
628 03:37:15.009470 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 03:37:15.015001 auto size-- 65535DDR cs0 size: 2048MB
630 03:37:15.015420 DDR cs1 size: 2048MB
631 03:37:15.020692 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 03:37:15.021220 cs0 DataBus test pass
633 03:37:15.026256 cs1 DataBus test pass
634 03:37:15.026786 cs0 AddrBus test pass
635 03:37:15.027205 cs1 AddrBus test pass
636 03:37:15.027606
637 03:37:15.031863 100bdlr_step_size ps== 478
638 03:37:15.032401 result report
639 03:37:15.037477 boot times 0Enable ddr reg access
640 03:37:15.042693 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 03:37:15.056474 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 03:37:15.716099 bl2z: ptr: 05129330, size: 00001e40
643 03:37:15.724447 0.0;M3 CHK:0;cm4_sp_mode 0
644 03:37:15.724937 MVN_1=0x00000000
645 03:37:15.725335 MVN_2=0x00000000
646 03:37:15.735912 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 03:37:15.736389 OPS=0x04
648 03:37:15.736786 ring efuse init
649 03:37:15.741549 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 03:37:15.742009 [0.017354 Inits done]
651 03:37:15.742419 secure task start!
652 03:37:15.749103 high task start!
653 03:37:15.749543 low task start!
654 03:37:15.749948 run into bl31
655 03:37:15.757759 NOTICE: BL31: v1.3(release):4fc40b1
656 03:37:15.765581 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 03:37:15.766034 NOTICE: BL31: G12A normal boot!
658 03:37:15.781247 NOTICE: BL31: BL33 decompress pass
659 03:37:15.786965 ERROR: Error initializing runtime service opteed_fast
660 03:37:17.149578 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 03:37:17.150179 bl2_stage_init 0x01
662 03:37:17.150619 bl2_stage_init 0x81
663 03:37:17.155123 hw id: 0x0000 - pwm id 0x01
664 03:37:17.155570 bl2_stage_init 0xc1
665 03:37:17.160305 bl2_stage_init 0x02
666 03:37:17.160763
667 03:37:17.161180 L0:00000000
668 03:37:17.161585 L1:00000703
669 03:37:17.161983 L2:00008067
670 03:37:17.165908 L3:15000000
671 03:37:17.166346 S1:00000000
672 03:37:17.166749 B2:20282000
673 03:37:17.167148 B1:a0f83180
674 03:37:17.167542
675 03:37:17.167942 TE: 70315
676 03:37:17.168387
677 03:37:17.171489 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 03:37:17.177095
679 03:37:17.177554 Board ID = 1
680 03:37:17.177962 Set cpu clk to 24M
681 03:37:17.178364 Set clk81 to 24M
682 03:37:17.182697 Use GP1_pll as DSU clk.
683 03:37:17.183139 DSU clk: 1200 Mhz
684 03:37:17.183542 CPU clk: 1200 MHz
685 03:37:17.188255 Set clk81 to 166.6M
686 03:37:17.193886 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 03:37:17.194324 board id: 1
688 03:37:17.201503 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 03:37:17.212422 fw parse done
690 03:37:17.218362 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 03:37:17.261520 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 03:37:17.272740 PIEI prepare done
693 03:37:17.273196 fastboot data load
694 03:37:17.273609 fastboot data verify
695 03:37:17.278237 verify result: 266
696 03:37:17.283933 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 03:37:17.284415 LPDDR4 probe
698 03:37:17.284828 ddr clk to 1584MHz
699 03:37:17.290937 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 03:37:17.328694
701 03:37:17.329192 dmc_version 0001
702 03:37:17.335733 Check phy result
703 03:37:17.342646 INFO : End of CA training
704 03:37:17.343097 INFO : End of initialization
705 03:37:17.348205 INFO : Training has run successfully!
706 03:37:17.348646 Check phy result
707 03:37:17.353768 INFO : End of initialization
708 03:37:17.354202 INFO : End of read enable training
709 03:37:17.359362 INFO : End of fine write leveling
710 03:37:17.364971 INFO : End of Write leveling coarse delay
711 03:37:17.365413 INFO : Training has run successfully!
712 03:37:17.365822 Check phy result
713 03:37:17.370568 INFO : End of initialization
714 03:37:17.371023 INFO : End of read dq deskew training
715 03:37:17.376184 INFO : End of MPR read delay center optimization
716 03:37:17.381798 INFO : End of write delay center optimization
717 03:37:17.387398 INFO : End of read delay center optimization
718 03:37:17.387833 INFO : End of max read latency training
719 03:37:17.392996 INFO : Training has run successfully!
720 03:37:17.393435 1D training succeed
721 03:37:17.402259 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 03:37:17.450248 Check phy result
723 03:37:17.450805 INFO : End of initialization
724 03:37:17.477882 INFO : End of 2D read delay Voltage center optimization
725 03:37:17.502113 INFO : End of 2D read delay Voltage center optimization
726 03:37:17.558740 INFO : End of 2D write delay Voltage center optimization
727 03:37:17.612746 INFO : End of 2D write delay Voltage center optimization
728 03:37:17.618217 INFO : Training has run successfully!
729 03:37:17.618652
730 03:37:17.619061 channel==0
731 03:37:17.623838 RxClkDly_Margin_A0==88 ps 9
732 03:37:17.624308 TxDqDly_Margin_A0==98 ps 10
733 03:37:17.627152 RxClkDly_Margin_A1==88 ps 9
734 03:37:17.627576 TxDqDly_Margin_A1==98 ps 10
735 03:37:17.632783 TrainedVREFDQ_A0==75
736 03:37:17.633270 TrainedVREFDQ_A1==75
737 03:37:17.633682 VrefDac_Margin_A0==24
738 03:37:17.638371 DeviceVref_Margin_A0==39
739 03:37:17.638803 VrefDac_Margin_A1==23
740 03:37:17.644046 DeviceVref_Margin_A1==39
741 03:37:17.644480
742 03:37:17.644888
743 03:37:17.645286 channel==1
744 03:37:17.645675 RxClkDly_Margin_A0==88 ps 9
745 03:37:17.649552 TxDqDly_Margin_A0==98 ps 10
746 03:37:17.649989 RxClkDly_Margin_A1==78 ps 8
747 03:37:17.655202 TxDqDly_Margin_A1==88 ps 9
748 03:37:17.655653 TrainedVREFDQ_A0==75
749 03:37:17.656096 TrainedVREFDQ_A1==77
750 03:37:17.660772 VrefDac_Margin_A0==22
751 03:37:17.661199 DeviceVref_Margin_A0==38
752 03:37:17.666346 VrefDac_Margin_A1==22
753 03:37:17.666777 DeviceVref_Margin_A1==37
754 03:37:17.667179
755 03:37:17.672044 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 03:37:17.672481
757 03:37:17.700062 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
758 03:37:17.705556 2D training succeed
759 03:37:17.711167 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 03:37:17.711609 auto size-- 65535DDR cs0 size: 2048MB
761 03:37:17.716754 DDR cs1 size: 2048MB
762 03:37:17.717198 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 03:37:17.722339 cs0 DataBus test pass
764 03:37:17.722772 cs1 DataBus test pass
765 03:37:17.723176 cs0 AddrBus test pass
766 03:37:17.728029 cs1 AddrBus test pass
767 03:37:17.728462
768 03:37:17.728867 100bdlr_step_size ps== 471
769 03:37:17.729272 result report
770 03:37:17.733580 boot times 0Enable ddr reg access
771 03:37:17.741109 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 03:37:17.755073 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 03:37:18.413641 bl2z: ptr: 05129330, size: 00001e40
774 03:37:18.422540 0.0;M3 CHK:0;cm4_sp_mode 0
775 03:37:18.423111 MVN_1=0x00000000
776 03:37:18.423518 MVN_2=0x00000000
777 03:37:18.434174 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 03:37:18.434729 OPS=0x04
779 03:37:18.435137 ring efuse init
780 03:37:18.439655 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 03:37:18.440207 [0.017354 Inits done]
782 03:37:18.440644 secure task start!
783 03:37:18.447617 high task start!
784 03:37:18.448137 low task start!
785 03:37:18.448554 run into bl31
786 03:37:18.456253 NOTICE: BL31: v1.3(release):4fc40b1
787 03:37:18.464068 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 03:37:18.464547 NOTICE: BL31: G12A normal boot!
789 03:37:18.479615 NOTICE: BL31: BL33 decompress pass
790 03:37:18.484277 ERROR: Error initializing runtime service opteed_fast
791 03:37:19.280900
792 03:37:19.281552
793 03:37:19.286278 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 03:37:19.286795
795 03:37:19.289703 Model: Libre Computer AML-S905D3-CC Solitude
796 03:37:19.436807 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 03:37:19.452282 DRAM: 2 GiB (effective 3.8 GiB)
798 03:37:19.553043 Core: 406 devices, 33 uclasses, devicetree: separate
799 03:37:19.558864 WDT: Not starting watchdog@f0d0
800 03:37:19.583973 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 03:37:19.596166 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 03:37:19.601098 ** Bad device specification mmc 0 **
803 03:37:19.611286 Card did not respond to voltage select! : -110
804 03:37:19.618863 ** Bad device specification mmc 0 **
805 03:37:19.619303 Couldn't find partition mmc 0
806 03:37:19.627281 Card did not respond to voltage select! : -110
807 03:37:19.632707 ** Bad device specification mmc 0 **
808 03:37:19.633142 Couldn't find partition mmc 0
809 03:37:19.637797 Error: could not access storage.
810 03:37:19.935247 Net: eth0: ethernet@ff3f0000
811 03:37:19.935828 starting USB...
812 03:37:20.180126 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 03:37:20.180674 Starting the controller
814 03:37:20.187071 USB XHCI 1.10
815 03:37:21.741195 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 03:37:21.749390 scanning usb for storage devices... 0 Storage Device(s) found
818 03:37:21.800845 Hit any key to stop autoboot: 1
819 03:37:21.801657 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 03:37:21.802255 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 03:37:21.802727 Setting prompt string to ['=>']
822 03:37:21.803214 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 03:37:21.815427 0
824 03:37:21.816303 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 03:37:21.917512 => setenv autoload no
827 03:37:21.918211 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 03:37:21.922936 setenv autoload no
830 03:37:22.024396 => setenv initrd_high 0xffffffff
831 03:37:22.025099 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 03:37:22.029598 setenv initrd_high 0xffffffff
834 03:37:22.130978 => setenv fdt_high 0xffffffff
835 03:37:22.131607 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
836 03:37:22.136269 setenv fdt_high 0xffffffff
838 03:37:22.237651 => dhcp
839 03:37:22.238231 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
840 03:37:22.241524 dhcp
841 03:37:23.148439 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
842 03:37:23.149084 Speed: 1000, full duplex
843 03:37:23.149558 BOOTP broadcast 1
844 03:37:23.193578 DHCP client bound to address 192.168.6.21 (44 ms)
846 03:37:23.295907 => setenv serverip 192.168.6.2
847 03:37:23.297351 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
848 03:37:23.301893 setenv serverip 192.168.6.2
850 03:37:23.403865 => tftpboot 0x01080000 956978/tftp-deploy-hkzriuke/kernel/uImage
851 03:37:23.405091 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
852 03:37:23.411671 tftpboot 0x01080000 956978/tftp-deploy-hkzriuke/kernel/uImage
853 03:37:23.412060 Speed: 1000, full duplex
854 03:37:23.412311 Using ethernet@ff3f0000 device
855 03:37:23.417117 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
856 03:37:23.422615 Filename '956978/tftp-deploy-hkzriuke/kernel/uImage'.
857 03:37:23.426312 Load address: 0x1080000
858 03:37:24.100931 Loading: *############# UDP wrong checksum 000000ff 00005757
859 03:37:24.112172 # UDP wrong checksum 000000ff 0000ee49
860 03:37:25.876248 #################################### 36.1 MiB
861 03:37:25.876902 14.7 MiB/s
862 03:37:25.877359 done
863 03:37:25.880464 Bytes transferred = 37880384 (2420240 hex)
865 03:37:25.982063 => tftpboot 0x08000000 956978/tftp-deploy-hkzriuke/ramdisk/ramdisk.cpio.gz.uboot
866 03:37:25.982827 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
867 03:37:25.989628 tftpboot 0x08000000 956978/tftp-deploy-hkzriuke/ramdisk/ramdisk.cpio.gz.uboot
868 03:37:25.990168 Speed: 1000, full duplex
869 03:37:25.990615 Using ethernet@ff3f0000 device
870 03:37:25.995125 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
871 03:37:26.005013 Filename '956978/tftp-deploy-hkzriuke/ramdisk/ramdisk.cpio.gz.uboot'.
872 03:37:26.005567 Load address: 0x8000000
873 03:37:27.483502 Loading: *################################################# UDP wrong checksum 00000005 00007cde
874 03:37:32.483348 T UDP wrong checksum 00000005 00007cde
875 03:37:35.364313 UDP wrong checksum 000000ff 0000d0dc
876 03:37:35.375568 UDP wrong checksum 000000ff 000065cf
877 03:37:42.485538 T T UDP wrong checksum 00000005 00007cde
878 03:37:50.400034 T UDP wrong checksum 000000ff 00006be6
879 03:37:50.414023 UDP wrong checksum 000000ff 0000ffd8
880 03:38:02.489478 T T T UDP wrong checksum 00000005 00007cde
881 03:38:04.237925 UDP wrong checksum 000000ff 00002865
882 03:38:04.242167 UDP wrong checksum 000000ff 0000c457
883 03:38:09.861961 T UDP wrong checksum 000000ff 0000b243
884 03:38:09.870285 UDP wrong checksum 000000ff 00003a36
885 03:38:22.494296 T T
886 03:38:22.494975 Retry count exceeded; starting again
888 03:38:22.496589 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
891 03:38:22.498685 end: 2.4 uboot-commands (duration 00:01:20) [common]
893 03:38:22.500309 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
895 03:38:22.501479 end: 2 uboot-action (duration 00:01:20) [common]
897 03:38:22.503163 Cleaning after the job
898 03:38:22.503757 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/ramdisk
899 03:38:22.505085 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/kernel
900 03:38:22.548042 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/dtb
901 03:38:22.549365 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/nfsrootfs
902 03:38:22.705523 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956978/tftp-deploy-hkzriuke/modules
903 03:38:22.725697 start: 4.1 power-off (timeout 00:00:30) [common]
904 03:38:22.726343 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
905 03:38:22.758313 >> OK - accepted request
906 03:38:22.760365 Returned 0 in 0 seconds
907 03:38:22.861183 end: 4.1 power-off (duration 00:00:00) [common]
909 03:38:22.862205 start: 4.2 read-feedback (timeout 00:10:00) [common]
910 03:38:22.862855 Listened to connection for namespace 'common' for up to 1s
911 03:38:23.863358 Finalising connection for namespace 'common'
912 03:38:23.864191 Disconnecting from shell: Finalise
913 03:38:23.864733 =>
914 03:38:23.965821 end: 4.2 read-feedback (duration 00:00:01) [common]
915 03:38:23.966522 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/956978
916 03:38:27.218527 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/956978
917 03:38:27.219197 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.