Boot log: meson-sm1-s905d3-libretech-cc

    1 03:32:23.470775  lava-dispatcher, installed at version: 2024.01
    2 03:32:23.471568  start: 0 validate
    3 03:32:23.472076  Start time: 2024-11-08 03:32:23.472044+00:00 (UTC)
    4 03:32:23.472621  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 03:32:23.473139  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 03:32:23.511883  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 03:32:23.512507  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
    8 03:32:23.544647  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 03:32:23.545299  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 03:32:23.578303  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 03:32:23.578796  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 03:32:23.613577  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 03:32:23.614047  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
   14 03:32:23.653315  validate duration: 0.18
   16 03:32:23.654181  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 03:32:23.654531  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 03:32:23.654844  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 03:32:23.655456  Not decompressing ramdisk as can be used compressed.
   20 03:32:23.655938  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
   21 03:32:23.656264  saving as /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/ramdisk/initrd.cpio.gz
   22 03:32:23.656561  total size: 5628169 (5 MB)
   23 03:32:23.693186  progress   0 % (0 MB)
   24 03:32:23.697440  progress   5 % (0 MB)
   25 03:32:23.701660  progress  10 % (0 MB)
   26 03:32:23.705497  progress  15 % (0 MB)
   27 03:32:23.709727  progress  20 % (1 MB)
   28 03:32:23.713506  progress  25 % (1 MB)
   29 03:32:23.717632  progress  30 % (1 MB)
   30 03:32:23.721788  progress  35 % (1 MB)
   31 03:32:23.725458  progress  40 % (2 MB)
   32 03:32:23.729570  progress  45 % (2 MB)
   33 03:32:23.733284  progress  50 % (2 MB)
   34 03:32:23.737389  progress  55 % (2 MB)
   35 03:32:23.741454  progress  60 % (3 MB)
   36 03:32:23.745128  progress  65 % (3 MB)
   37 03:32:23.749179  progress  70 % (3 MB)
   38 03:32:23.752803  progress  75 % (4 MB)
   39 03:32:23.756906  progress  80 % (4 MB)
   40 03:32:23.760765  progress  85 % (4 MB)
   41 03:32:23.764833  progress  90 % (4 MB)
   42 03:32:23.768803  progress  95 % (5 MB)
   43 03:32:23.772100  progress 100 % (5 MB)
   44 03:32:23.772758  5 MB downloaded in 0.12 s (46.20 MB/s)
   45 03:32:23.773310  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 03:32:23.774236  end: 1.1 download-retry (duration 00:00:00) [common]
   48 03:32:23.774532  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 03:32:23.774810  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 03:32:23.775279  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/clang-16/kernel/Image
   51 03:32:23.775540  saving as /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/kernel/Image
   52 03:32:23.775751  total size: 37880320 (36 MB)
   53 03:32:23.775961  No compression specified
   54 03:32:23.813997  progress   0 % (0 MB)
   55 03:32:23.837456  progress   5 % (1 MB)
   56 03:32:23.861447  progress  10 % (3 MB)
   57 03:32:23.885089  progress  15 % (5 MB)
   58 03:32:23.908543  progress  20 % (7 MB)
   59 03:32:23.932207  progress  25 % (9 MB)
   60 03:32:23.955509  progress  30 % (10 MB)
   61 03:32:23.978871  progress  35 % (12 MB)
   62 03:32:24.002679  progress  40 % (14 MB)
   63 03:32:24.026346  progress  45 % (16 MB)
   64 03:32:24.049928  progress  50 % (18 MB)
   65 03:32:24.073253  progress  55 % (19 MB)
   66 03:32:24.097000  progress  60 % (21 MB)
   67 03:32:24.120409  progress  65 % (23 MB)
   68 03:32:24.144074  progress  70 % (25 MB)
   69 03:32:24.167812  progress  75 % (27 MB)
   70 03:32:24.190756  progress  80 % (28 MB)
   71 03:32:24.214401  progress  85 % (30 MB)
   72 03:32:24.238010  progress  90 % (32 MB)
   73 03:32:24.261505  progress  95 % (34 MB)
   74 03:32:24.284596  progress 100 % (36 MB)
   75 03:32:24.285078  36 MB downloaded in 0.51 s (70.93 MB/s)
   76 03:32:24.285553  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 03:32:24.286383  end: 1.2 download-retry (duration 00:00:01) [common]
   79 03:32:24.286659  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 03:32:24.286927  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 03:32:24.287392  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 03:32:24.287669  saving as /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 03:32:24.287879  total size: 53209 (0 MB)
   84 03:32:24.288118  No compression specified
   85 03:32:24.329841  progress  61 % (0 MB)
   86 03:32:24.330673  progress 100 % (0 MB)
   87 03:32:24.331207  0 MB downloaded in 0.04 s (1.17 MB/s)
   88 03:32:24.331688  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 03:32:24.332559  end: 1.3 download-retry (duration 00:00:00) [common]
   91 03:32:24.332830  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 03:32:24.333095  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 03:32:24.333545  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
   94 03:32:24.333791  saving as /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/nfsrootfs/full.rootfs.tar
   95 03:32:24.333998  total size: 120894716 (115 MB)
   96 03:32:24.334209  Using unxz to decompress xz
   97 03:32:24.374451  progress   0 % (0 MB)
   98 03:32:25.166082  progress   5 % (5 MB)
   99 03:32:25.997467  progress  10 % (11 MB)
  100 03:32:26.792235  progress  15 % (17 MB)
  101 03:32:27.525888  progress  20 % (23 MB)
  102 03:32:28.116564  progress  25 % (28 MB)
  103 03:32:28.946706  progress  30 % (34 MB)
  104 03:32:29.736650  progress  35 % (40 MB)
  105 03:32:30.081760  progress  40 % (46 MB)
  106 03:32:30.455187  progress  45 % (51 MB)
  107 03:32:31.175676  progress  50 % (57 MB)
  108 03:32:32.054955  progress  55 % (63 MB)
  109 03:32:32.835195  progress  60 % (69 MB)
  110 03:32:33.591105  progress  65 % (74 MB)
  111 03:32:34.368599  progress  70 % (80 MB)
  112 03:32:35.189475  progress  75 % (86 MB)
  113 03:32:35.973539  progress  80 % (92 MB)
  114 03:32:36.729420  progress  85 % (98 MB)
  115 03:32:37.573406  progress  90 % (103 MB)
  116 03:32:38.342881  progress  95 % (109 MB)
  117 03:32:39.168994  progress 100 % (115 MB)
  118 03:32:39.181364  115 MB downloaded in 14.85 s (7.77 MB/s)
  119 03:32:39.182238  end: 1.4.1 http-download (duration 00:00:15) [common]
  121 03:32:39.183852  end: 1.4 download-retry (duration 00:00:15) [common]
  122 03:32:39.184438  start: 1.5 download-retry (timeout 00:09:44) [common]
  123 03:32:39.184966  start: 1.5.1 http-download (timeout 00:09:44) [common]
  124 03:32:39.185866  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/clang-16/modules.tar.xz
  125 03:32:39.186353  saving as /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/modules/modules.tar
  126 03:32:39.186775  total size: 11768564 (11 MB)
  127 03:32:39.187199  Using unxz to decompress xz
  128 03:32:39.234751  progress   0 % (0 MB)
  129 03:32:39.302437  progress   5 % (0 MB)
  130 03:32:39.381020  progress  10 % (1 MB)
  131 03:32:39.482838  progress  15 % (1 MB)
  132 03:32:39.578491  progress  20 % (2 MB)
  133 03:32:39.656887  progress  25 % (2 MB)
  134 03:32:39.732615  progress  30 % (3 MB)
  135 03:32:39.811781  progress  35 % (3 MB)
  136 03:32:39.890848  progress  40 % (4 MB)
  137 03:32:39.965529  progress  45 % (5 MB)
  138 03:32:40.049733  progress  50 % (5 MB)
  139 03:32:40.130755  progress  55 % (6 MB)
  140 03:32:40.214847  progress  60 % (6 MB)
  141 03:32:40.295130  progress  65 % (7 MB)
  142 03:32:40.376617  progress  70 % (7 MB)
  143 03:32:40.459352  progress  75 % (8 MB)
  144 03:32:40.542717  progress  80 % (9 MB)
  145 03:32:40.623097  progress  85 % (9 MB)
  146 03:32:40.705641  progress  90 % (10 MB)
  147 03:32:40.783556  progress  95 % (10 MB)
  148 03:32:40.860293  progress 100 % (11 MB)
  149 03:32:40.870904  11 MB downloaded in 1.68 s (6.66 MB/s)
  150 03:32:40.871780  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 03:32:40.873458  end: 1.5 download-retry (duration 00:00:02) [common]
  153 03:32:40.874000  start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
  154 03:32:40.874537  start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
  155 03:32:57.466095  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/956970/extract-nfsrootfs-vd85tx5k
  156 03:32:57.466701  end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
  157 03:32:57.466987  start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
  158 03:32:57.467732  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg
  159 03:32:57.468216  makedir: /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin
  160 03:32:57.468548  makedir: /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/tests
  161 03:32:57.468860  makedir: /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/results
  162 03:32:57.469191  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-add-keys
  163 03:32:57.469716  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-add-sources
  164 03:32:57.470266  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-background-process-start
  165 03:32:57.470826  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-background-process-stop
  166 03:32:57.471356  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-common-functions
  167 03:32:57.471840  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-echo-ipv4
  168 03:32:57.472353  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-install-packages
  169 03:32:57.472828  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-installed-packages
  170 03:32:57.473356  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-os-build
  171 03:32:57.473833  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-probe-channel
  172 03:32:57.474302  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-probe-ip
  173 03:32:57.474767  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-target-ip
  174 03:32:57.475232  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-target-mac
  175 03:32:57.475697  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-target-storage
  176 03:32:57.476201  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-test-case
  177 03:32:57.476682  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-test-event
  178 03:32:57.477142  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-test-feedback
  179 03:32:57.477604  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-test-raise
  180 03:32:57.478093  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-test-reference
  181 03:32:57.478594  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-test-runner
  182 03:32:57.479065  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-test-set
  183 03:32:57.479525  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-test-shell
  184 03:32:57.480013  Updating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-add-keys (debian)
  185 03:32:57.480585  Updating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-add-sources (debian)
  186 03:32:57.481194  Updating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-install-packages (debian)
  187 03:32:57.481763  Updating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-installed-packages (debian)
  188 03:32:57.482259  Updating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/bin/lava-os-build (debian)
  189 03:32:57.482688  Creating /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/environment
  190 03:32:57.483054  LAVA metadata
  191 03:32:57.483314  - LAVA_JOB_ID=956970
  192 03:32:57.483528  - LAVA_DISPATCHER_IP=192.168.6.2
  193 03:32:57.483896  start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
  194 03:32:57.484909  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  195 03:32:57.485230  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
  196 03:32:57.485437  skipped lava-vland-overlay
  197 03:32:57.485676  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  198 03:32:57.485928  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
  199 03:32:57.486162  skipped lava-multinode-overlay
  200 03:32:57.486413  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  201 03:32:57.486666  start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
  202 03:32:57.486915  Loading test definitions
  203 03:32:57.487191  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
  204 03:32:57.487409  Using /lava-956970 at stage 0
  205 03:32:57.488555  uuid=956970_1.6.2.4.1 testdef=None
  206 03:32:57.488877  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  207 03:32:57.489141  start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
  208 03:32:57.490698  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  210 03:32:57.491481  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
  211 03:32:57.493485  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  213 03:32:57.494316  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
  214 03:32:57.496174  runner path: /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/0/tests/0_timesync-off test_uuid 956970_1.6.2.4.1
  215 03:32:57.496738  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  217 03:32:57.497551  start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
  218 03:32:57.497778  Using /lava-956970 at stage 0
  219 03:32:57.498131  Fetching tests from https://github.com/kernelci/test-definitions.git
  220 03:32:57.498419  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/0/tests/1_kselftest-rtc'
  221 03:33:00.859849  Running '/usr/bin/git checkout kernelci.org
  222 03:33:01.310697  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
  223 03:33:01.312212  uuid=956970_1.6.2.4.5 testdef=None
  224 03:33:01.312576  end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
  226 03:33:01.313326  start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
  227 03:33:01.316199  end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
  229 03:33:01.317027  start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
  230 03:33:01.320799  end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
  232 03:33:01.321670  start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
  233 03:33:01.325331  runner path: /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/0/tests/1_kselftest-rtc test_uuid 956970_1.6.2.4.5
  234 03:33:01.325629  BOARD='meson-sm1-s905d3-libretech-cc'
  235 03:33:01.325832  BRANCH='mainline'
  236 03:33:01.326027  SKIPFILE='/dev/null'
  237 03:33:01.326224  SKIP_INSTALL='True'
  238 03:33:01.326418  TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/clang-16/kselftest.tar.xz'
  239 03:33:01.326616  TST_CASENAME=''
  240 03:33:01.326811  TST_CMDFILES='rtc'
  241 03:33:01.327396  end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
  243 03:33:01.328229  Creating lava-test-runner.conf files
  244 03:33:01.328436  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/956970/lava-overlay-myxo1sbg/lava-956970/0 for stage 0
  245 03:33:01.328794  - 0_timesync-off
  246 03:33:01.329037  - 1_kselftest-rtc
  247 03:33:01.329375  end: 1.6.2.4 test-definition (duration 00:00:04) [common]
  248 03:33:01.329661  start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
  249 03:33:24.652781  end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
  250 03:33:24.653222  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
  251 03:33:24.653489  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  252 03:33:24.653759  end: 1.6.2 lava-overlay (duration 00:00:27) [common]
  253 03:33:24.654025  start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
  254 03:33:25.345928  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  255 03:33:25.346391  start: 1.6.4 extract-modules (timeout 00:08:58) [common]
  256 03:33:25.346669  extracting modules file /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956970/extract-nfsrootfs-vd85tx5k
  257 03:33:26.698395  extracting modules file /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/modules/modules.tar to /var/lib/lava/dispatcher/tmp/956970/extract-overlay-ramdisk-il2e8x9q/ramdisk
  258 03:33:28.086193  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  259 03:33:28.086672  start: 1.6.5 apply-overlay-tftp (timeout 00:08:56) [common]
  260 03:33:28.086975  [common] Applying overlay to NFS
  261 03:33:28.087208  [common] Applying overlay /var/lib/lava/dispatcher/tmp/956970/compress-overlay-xz_o723b/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/956970/extract-nfsrootfs-vd85tx5k
  262 03:33:30.817232  end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
  263 03:33:30.817672  start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
  264 03:33:30.817972  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
  265 03:33:30.818233  Converting downloaded kernel to a uImage
  266 03:33:30.818574  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/kernel/Image /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/kernel/uImage
  267 03:33:31.195133  output: Image Name:   
  268 03:33:31.195553  output: Created:      Fri Nov  8 03:33:30 2024
  269 03:33:31.195761  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  270 03:33:31.195964  output: Data Size:    37880320 Bytes = 36992.50 KiB = 36.13 MiB
  271 03:33:31.196207  output: Load Address: 01080000
  272 03:33:31.196407  output: Entry Point:  01080000
  273 03:33:31.196608  output: 
  274 03:33:31.196939  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  275 03:33:31.197206  end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
  276 03:33:31.197473  start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
  277 03:33:31.197728  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  278 03:33:31.198217  start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
  279 03:33:31.198501  Building ramdisk /var/lib/lava/dispatcher/tmp/956970/extract-overlay-ramdisk-il2e8x9q/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/956970/extract-overlay-ramdisk-il2e8x9q/ramdisk
  280 03:33:33.504642  >> 173443 blocks

  281 03:33:41.147585  Adding RAMdisk u-boot header.
  282 03:33:41.148049  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/956970/extract-overlay-ramdisk-il2e8x9q/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/956970/extract-overlay-ramdisk-il2e8x9q/ramdisk.cpio.gz.uboot
  283 03:33:41.422047  output: Image Name:   
  284 03:33:41.422479  output: Created:      Fri Nov  8 03:33:41 2024
  285 03:33:41.422691  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  286 03:33:41.422894  output: Data Size:    24149631 Bytes = 23583.62 KiB = 23.03 MiB
  287 03:33:41.423097  output: Load Address: 00000000
  288 03:33:41.423296  output: Entry Point:  00000000
  289 03:33:41.423497  output: 
  290 03:33:41.424216  rename /var/lib/lava/dispatcher/tmp/956970/extract-overlay-ramdisk-il2e8x9q/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/ramdisk/ramdisk.cpio.gz.uboot
  291 03:33:41.424996  end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
  292 03:33:41.425602  end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
  293 03:33:41.426218  start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
  294 03:33:41.426713  No LXC device requested
  295 03:33:41.427259  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  296 03:33:41.427817  start: 1.8 deploy-device-env (timeout 00:08:42) [common]
  297 03:33:41.428407  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  298 03:33:41.428867  Checking files for TFTP limit of 4294967296 bytes.
  299 03:33:41.431781  end: 1 tftp-deploy (duration 00:01:18) [common]
  300 03:33:41.432448  start: 2 uboot-action (timeout 00:05:00) [common]
  301 03:33:41.433029  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  302 03:33:41.433575  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  303 03:33:41.434126  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  304 03:33:41.434703  Using kernel file from prepare-kernel: 956970/tftp-deploy-qigpgafm/kernel/uImage
  305 03:33:41.435390  substitutions:
  306 03:33:41.435841  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  307 03:33:41.436351  - {DTB_ADDR}: 0x01070000
  308 03:33:41.436803  - {DTB}: 956970/tftp-deploy-qigpgafm/dtb/meson-sm1-s905d3-libretech-cc.dtb
  309 03:33:41.437251  - {INITRD}: 956970/tftp-deploy-qigpgafm/ramdisk/ramdisk.cpio.gz.uboot
  310 03:33:41.437693  - {KERNEL_ADDR}: 0x01080000
  311 03:33:41.438129  - {KERNEL}: 956970/tftp-deploy-qigpgafm/kernel/uImage
  312 03:33:41.438565  - {LAVA_MAC}: None
  313 03:33:41.439035  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/956970/extract-nfsrootfs-vd85tx5k
  314 03:33:41.439473  - {NFS_SERVER_IP}: 192.168.6.2
  315 03:33:41.439903  - {PRESEED_CONFIG}: None
  316 03:33:41.440368  - {PRESEED_LOCAL}: None
  317 03:33:41.440800  - {RAMDISK_ADDR}: 0x08000000
  318 03:33:41.441227  - {RAMDISK}: 956970/tftp-deploy-qigpgafm/ramdisk/ramdisk.cpio.gz.uboot
  319 03:33:41.441660  - {ROOT_PART}: None
  320 03:33:41.442087  - {ROOT}: None
  321 03:33:41.442513  - {SERVER_IP}: 192.168.6.2
  322 03:33:41.442939  - {TEE_ADDR}: 0x83000000
  323 03:33:41.443361  - {TEE}: None
  324 03:33:41.443789  Parsed boot commands:
  325 03:33:41.444237  - setenv autoload no
  326 03:33:41.444669  - setenv initrd_high 0xffffffff
  327 03:33:41.445096  - setenv fdt_high 0xffffffff
  328 03:33:41.445520  - dhcp
  329 03:33:41.445942  - setenv serverip 192.168.6.2
  330 03:33:41.446371  - tftpboot 0x01080000 956970/tftp-deploy-qigpgafm/kernel/uImage
  331 03:33:41.446800  - tftpboot 0x08000000 956970/tftp-deploy-qigpgafm/ramdisk/ramdisk.cpio.gz.uboot
  332 03:33:41.447232  - tftpboot 0x01070000 956970/tftp-deploy-qigpgafm/dtb/meson-sm1-s905d3-libretech-cc.dtb
  333 03:33:41.447662  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/956970/extract-nfsrootfs-vd85tx5k,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  334 03:33:41.448130  - bootm 0x01080000 0x08000000 0x01070000
  335 03:33:41.448684  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  337 03:33:41.450318  start: 2.3 connect-device (timeout 00:05:00) [common]
  338 03:33:41.450777  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  339 03:33:41.466156  Setting prompt string to ['lava-test: # ']
  340 03:33:41.467787  end: 2.3 connect-device (duration 00:00:00) [common]
  341 03:33:41.468552  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  342 03:33:41.469200  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  343 03:33:41.469822  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  344 03:33:41.471052  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  345 03:33:41.508935  >> OK - accepted request

  346 03:33:41.511080  Returned 0 in 0 seconds
  347 03:33:41.611860  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  349 03:33:41.612848  end: 2.4.1 reset-device (duration 00:00:00) [common]
  350 03:33:41.613138  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  351 03:33:41.613407  Setting prompt string to ['Hit any key to stop autoboot']
  352 03:33:41.613637  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  353 03:33:41.614522  Trying 192.168.56.21...
  354 03:33:41.614777  Connected to conserv1.
  355 03:33:41.614986  Escape character is '^]'.
  356 03:33:41.615190  
  357 03:33:41.615404  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
  358 03:33:41.615610  
  359 03:33:49.077021  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  360 03:33:49.077692  bl2_stage_init 0x01
  361 03:33:49.078170  bl2_stage_init 0x81
  362 03:33:49.082445  hw id: 0x0000 - pwm id 0x01
  363 03:33:49.082945  bl2_stage_init 0xc1
  364 03:33:49.088091  bl2_stage_init 0x02
  365 03:33:49.088595  
  366 03:33:49.089061  L0:00000000
  367 03:33:49.089514  L1:00000703
  368 03:33:49.089969  L2:00008067
  369 03:33:49.090421  L3:15000000
  370 03:33:49.093709  S1:00000000
  371 03:33:49.094172  B2:20282000
  372 03:33:49.094621  B1:a0f83180
  373 03:33:49.095051  
  374 03:33:49.095480  TE: 68957
  375 03:33:49.095911  
  376 03:33:49.099175  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  377 03:33:49.099633  
  378 03:33:49.104779  Board ID = 1
  379 03:33:49.105255  Set cpu clk to 24M
  380 03:33:49.105689  Set clk81 to 24M
  381 03:33:49.110456  Use GP1_pll as DSU clk.
  382 03:33:49.110926  DSU clk: 1200 Mhz
  383 03:33:49.111358  CPU clk: 1200 MHz
  384 03:33:49.115957  Set clk81 to 166.6M
  385 03:33:49.121711  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  386 03:33:49.122186  board id: 1
  387 03:33:49.128803  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  388 03:33:49.139657  fw parse done
  389 03:33:49.145769  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  390 03:33:49.188792  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  391 03:33:49.199817  PIEI prepare done
  392 03:33:49.200366  fastboot data load
  393 03:33:49.200812  fastboot data verify
  394 03:33:49.205460  verify result: 266
  395 03:33:49.211073  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  396 03:33:49.211537  LPDDR4 probe
  397 03:33:49.211972  ddr clk to 1584MHz
  398 03:33:49.219058  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  399 03:33:49.256760  
  400 03:33:49.257283  dmc_version 0001
  401 03:33:49.263861  Check phy result
  402 03:33:49.269823  INFO : End of CA training
  403 03:33:49.270286  INFO : End of initialization
  404 03:33:49.275387  INFO : Training has run successfully!
  405 03:33:49.275845  Check phy result
  406 03:33:49.280984  INFO : End of initialization
  407 03:33:49.281439  INFO : End of read enable training
  408 03:33:49.286619  INFO : End of fine write leveling
  409 03:33:49.292235  INFO : End of Write leveling coarse delay
  410 03:33:49.292697  INFO : Training has run successfully!
  411 03:33:49.293130  Check phy result
  412 03:33:49.297782  INFO : End of initialization
  413 03:33:49.298252  INFO : End of read dq deskew training
  414 03:33:49.303380  INFO : End of MPR read delay center optimization
  415 03:33:49.309017  INFO : End of write delay center optimization
  416 03:33:49.314608  INFO : End of read delay center optimization
  417 03:33:49.315071  INFO : End of max read latency training
  418 03:33:49.320269  INFO : Training has run successfully!
  419 03:33:49.320730  1D training succeed
  420 03:33:49.329083  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  421 03:33:49.376796  Check phy result
  422 03:33:49.377276  INFO : End of initialization
  423 03:33:49.405099  INFO : End of 2D read delay Voltage center optimization
  424 03:33:49.429266  INFO : End of 2D read delay Voltage center optimization
  425 03:33:49.486025  INFO : End of 2D write delay Voltage center optimization
  426 03:33:49.540017  INFO : End of 2D write delay Voltage center optimization
  427 03:33:49.545555  INFO : Training has run successfully!
  428 03:33:49.545866  
  429 03:33:49.546093  channel==0
  430 03:33:49.551190  RxClkDly_Margin_A0==78 ps 8
  431 03:33:49.551480  TxDqDly_Margin_A0==98 ps 10
  432 03:33:49.554465  RxClkDly_Margin_A1==88 ps 9
  433 03:33:49.554729  TxDqDly_Margin_A1==98 ps 10
  434 03:33:49.560039  TrainedVREFDQ_A0==74
  435 03:33:49.560314  TrainedVREFDQ_A1==74
  436 03:33:49.560528  VrefDac_Margin_A0==25
  437 03:33:49.567216  DeviceVref_Margin_A0==40
  438 03:33:49.568720  VrefDac_Margin_A1==22
  439 03:33:49.569034  DeviceVref_Margin_A1==40
  440 03:33:49.569261  
  441 03:33:49.569482  
  442 03:33:49.569699  channel==1
  443 03:33:49.574389  RxClkDly_Margin_A0==88 ps 9
  444 03:33:49.574655  TxDqDly_Margin_A0==98 ps 10
  445 03:33:49.579928  RxClkDly_Margin_A1==78 ps 8
  446 03:33:49.580173  TxDqDly_Margin_A1==88 ps 9
  447 03:33:49.580379  TrainedVREFDQ_A0==78
  448 03:33:49.585483  TrainedVREFDQ_A1==75
  449 03:33:49.585704  VrefDac_Margin_A0==23
  450 03:33:49.591084  DeviceVref_Margin_A0==36
  451 03:33:49.591309  VrefDac_Margin_A1==22
  452 03:33:49.591509  DeviceVref_Margin_A1==39
  453 03:33:49.591704  
  454 03:33:49.596662   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  455 03:33:49.596885  
  456 03:33:49.630397  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
  457 03:33:49.630950  2D training succeed
  458 03:33:49.635942  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  459 03:33:49.641516  auto size-- 65535DDR cs0 size: 2048MB
  460 03:33:49.641984  DDR cs1 size: 2048MB
  461 03:33:49.647099  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  462 03:33:49.647560  cs0 DataBus test pass
  463 03:33:49.648032  cs1 DataBus test pass
  464 03:33:49.652705  cs0 AddrBus test pass
  465 03:33:49.653166  cs1 AddrBus test pass
  466 03:33:49.653601  
  467 03:33:49.658316  100bdlr_step_size ps== 464
  468 03:33:49.658787  result report
  469 03:33:49.659220  boot times 0Enable ddr reg access
  470 03:33:49.668333  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  471 03:33:49.682260  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  472 03:33:50.341516  bl2z: ptr: 05129330, size: 00001e40
  473 03:33:50.350272  0.0;M3 CHK:0;cm4_sp_mode 0
  474 03:33:50.350780  MVN_1=0x00000000
  475 03:33:50.351236  MVN_2=0x00000000
  476 03:33:50.361789  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  477 03:33:50.362285  OPS=0x04
  478 03:33:50.362742  ring efuse init
  479 03:33:50.364750  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  480 03:33:50.370449  [0.017354 Inits done]
  481 03:33:50.370925  secure task start!
  482 03:33:50.371373  high task start!
  483 03:33:50.371818  low task start!
  484 03:33:50.374728  run into bl31
  485 03:33:50.383370  NOTICE:  BL31: v1.3(release):4fc40b1
  486 03:33:50.391150  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  487 03:33:50.391632  NOTICE:  BL31: G12A normal boot!
  488 03:33:50.406708  NOTICE:  BL31: BL33 decompress pass
  489 03:33:50.411726  ERROR:   Error initializing runtime service opteed_fast
  490 03:33:51.628952  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  491 03:33:51.629605  bl2_stage_init 0x01
  492 03:33:51.630085  bl2_stage_init 0x81
  493 03:33:51.634518  hw id: 0x0000 - pwm id 0x01
  494 03:33:51.635043  bl2_stage_init 0xc1
  495 03:33:51.635495  bl2_stage_init 0x02
  496 03:33:51.635947  
  497 03:33:51.640185  L0:00000000
  498 03:33:51.640706  L1:00000703
  499 03:33:51.641141  L2:00008067
  500 03:33:51.641568  L3:15000000
  501 03:33:51.641995  S1:00000000
  502 03:33:51.645710  B2:20282000
  503 03:33:51.646175  B1:a0f83180
  504 03:33:51.646602  
  505 03:33:51.647027  TE: 70232
  506 03:33:51.647450  
  507 03:33:51.651338  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  508 03:33:51.651803  
  509 03:33:51.656935  Board ID = 1
  510 03:33:51.657400  Set cpu clk to 24M
  511 03:33:51.657832  Set clk81 to 24M
  512 03:33:51.662527  Use GP1_pll as DSU clk.
  513 03:33:51.663050  DSU clk: 1200 Mhz
  514 03:33:51.663486  CPU clk: 1200 MHz
  515 03:33:51.663913  Set clk81 to 166.6M
  516 03:33:51.673687  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  517 03:33:51.674158  board id: 1
  518 03:33:51.680077  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  519 03:33:51.691116  fw parse done
  520 03:33:51.696964  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  521 03:33:51.740172  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  522 03:33:51.751293  PIEI prepare done
  523 03:33:51.751831  fastboot data load
  524 03:33:51.752362  fastboot data verify
  525 03:33:51.756891  verify result: 266
  526 03:33:51.762411  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  527 03:33:51.762913  LPDDR4 probe
  528 03:33:51.763350  ddr clk to 1584MHz
  529 03:33:53.127228  Load ddrfw from SPI, src: 0x00018000, des:SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  530 03:33:53.127921  bl2_stage_init 0x01
  531 03:33:53.128475  bl2_stage_init 0x81
  532 03:33:53.132705  hw id: 0x0000 - pwm id 0x01
  533 03:33:53.133261  bl2_stage_init 0xc1
  534 03:33:53.138139  bl2_stage_init 0x02
  535 03:33:53.138682  
  536 03:33:53.139154  L0:00000000
  537 03:33:53.139604  L1:00000703
  538 03:33:53.140090  L2:00008067
  539 03:33:53.140570  L3:15000000
  540 03:33:53.143699  S1:00000000
  541 03:33:53.144285  B2:20282000
  542 03:33:53.144759  B1:a0f83180
  543 03:33:53.145207  
  544 03:33:53.145652  TE: 68160
  545 03:33:53.146089  
  546 03:33:53.149303  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  547 03:33:53.149828  
  548 03:33:53.155070  Board ID = 1
  549 03:33:53.155588  Set cpu clk to 24M
  550 03:33:53.156085  Set clk81 to 24M
  551 03:33:53.160548  Use GP1_pll as DSU clk.
  552 03:33:53.161077  DSU clk: 1200 Mhz
  553 03:33:53.161547  CPU clk: 1200 MHz
  554 03:33:53.166108  Set clk81 to 166.6M
  555 03:33:53.171712  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  556 03:33:53.172296  board id: 1
  557 03:33:53.179122  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  558 03:33:53.189735  fw parse done
  559 03:33:53.195742  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  560 03:33:53.241053  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  561 03:33:53.249417  PIEI prepare done
  562 03:33:53.249969  fastboot data load
  563 03:33:53.250428  fastboot data verify
  564 03:33:53.254932  verify result: 266
  565 03:33:53.260535  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  566 03:33:53.261037  LPDDR4 probe
  567 03:33:53.261487  ddr clk to 1584MHz
  568 03:33:53.268587  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  569 03:33:53.305843  
  570 03:33:53.306387  dmc_version 0001
  571 03:33:53.312490  Check phy result
  572 03:33:53.318361  INFO : End of CA training
  573 03:33:53.318848  INFO : End of initialization
  574 03:33:53.323972  INFO : Training has run successfully!
  575 03:33:53.324527  Check phy result
  576 03:33:53.329530  INFO : End of initialization
  577 03:33:53.330019  INFO : End of read enable training
  578 03:33:53.335121  INFO : End of fine write leveling
  579 03:33:53.340761  INFO : End of Write leveling coarse delay
  580 03:33:53.341254  INFO : Training has run successfully!
  581 03:33:53.341707  Check phy result
  582 03:33:53.346355  INFO : End of initialization
  583 03:33:53.346853  INFO : End of read dq deskew training
  584 03:33:53.351920  INFO : End of MPR read delay center optimization
  585 03:33:53.357553  INFO : End of write delay center optimization
  586 03:33:53.363155  INFO : End of read delay center optimization
  587 03:33:53.363635  INFO : End of max read latency training
  588 03:33:53.368747  INFO : Training has run successfully!
  589 03:33:53.369234  1D training succeed
  590 03:33:53.378453  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  591 03:33:53.425658  Check phy result
  592 03:33:53.426264  INFO : End of initialization
  593 03:33:53.448054  INFO : End of 2D read delay Voltage center optimization
  594 03:33:53.467119  INFO : End of 2D read delay Voltage center optimization
  595 03:33:53.519008  INFO : End of 2D write delay Voltage center optimization
  596 03:33:53.568306  INFO : End of 2D write delay Voltage center optimization
  597 03:33:53.573719  INFO : Training has run successfully!
  598 03:33:53.574056  
  599 03:33:53.574273  channel==0
  600 03:33:53.579262  RxClkDly_Margin_A0==78 ps 8
  601 03:33:53.579501  TxDqDly_Margin_A0==98 ps 10
  602 03:33:53.582548  RxClkDly_Margin_A1==78 ps 8
  603 03:33:53.582792  TxDqDly_Margin_A1==98 ps 10
  604 03:33:53.588150  TrainedVREFDQ_A0==74
  605 03:33:53.588469  TrainedVREFDQ_A1==75
  606 03:33:53.593679  VrefDac_Margin_A0==24
  607 03:33:53.593965  DeviceVref_Margin_A0==40
  608 03:33:53.594187  VrefDac_Margin_A1==23
  609 03:33:53.599307  DeviceVref_Margin_A1==39
  610 03:33:53.599708  
  611 03:33:53.600099  
  612 03:33:53.600462  channel==1
  613 03:33:53.600813  RxClkDly_Margin_A0==88 ps 9
  614 03:33:53.602670  TxDqDly_Margin_A0==98 ps 10
  615 03:33:53.608231  RxClkDly_Margin_A1==88 ps 9
  616 03:33:53.608545  TxDqDly_Margin_A1==88 ps 9
  617 03:33:53.608778  TrainedVREFDQ_A0==78
  618 03:33:53.613861  TrainedVREFDQ_A1==75
  619 03:33:53.614314  VrefDac_Margin_A0==23
  620 03:33:53.619455  DeviceVref_Margin_A0==36
  621 03:33:53.619925  VrefDac_Margin_A1==22
  622 03:33:53.620360  DeviceVref_Margin_A1==38
  623 03:33:53.620640  
  624 03:33:53.625060   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  625 03:33:53.625399  
  626 03:33:53.658627  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  627 03:33:53.659007  2D training succeed
  628 03:33:53.664234  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  629 03:33:53.669838  auto size-- 65535DDR cs0 size: 2048MB
  630 03:33:53.670185  DDR cs1 size: 2048MB
  631 03:33:53.675427  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  632 03:33:53.675902  cs0 DataBus test pass
  633 03:33:53.676347  cs1 DataBus test pass
  634 03:33:53.681028  cs0 AddrBus test pass
  635 03:33:53.681375  cs1 AddrBus test pass
  636 03:33:53.681623  
  637 03:33:53.686642  100bdlr_step_size ps== 478
  638 03:33:53.687151  result report
  639 03:33:53.687580  boot times 0Enable ddr reg access
  640 03:33:53.695597  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  641 03:33:53.709394  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  642 03:33:54.363739  bl2z: ptr: 05129330, size: 00001e40
  643 03:33:54.373487  0.0;M3 CHK:0;cm4_sp_mode 0
  644 03:33:54.374062  MVN_1=0x00000000
  645 03:33:54.375272  MVN_2=0x00000000
  646 03:33:54.383804  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  647 03:33:54.384416  OPS=0x04
  648 03:33:54.384878  ring efuse init
  649 03:33:54.386742  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  650 03:33:54.392787  [0.017319 Inits done]
  651 03:33:54.393325  secure task start!
  652 03:33:54.393756  high task start!
  653 03:33:54.394173  low task start!
  654 03:33:54.396310  run into bl31
  655 03:33:54.405810  NOTICE:  BL31: v1.3(release):4fc40b1
  656 03:33:54.412597  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  657 03:33:54.413172  NOTICE:  BL31: G12A normal boot!
  658 03:33:54.429310  NOTICE:  BL31: BL33 decompress pass
  659 03:33:54.434752  ERROR:   Error initializing runtime service opteed_fast
  660 03:33:55.828020  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  661 03:33:55.828612  bl2_stage_init 0x01
  662 03:33:55.829050  bl2_stage_init 0x81
  663 03:33:55.833673  hw id: 0x0000 - pwm id 0x01
  664 03:33:55.834213  bl2_stage_init 0xc1
  665 03:33:55.834648  bl2_stage_init 0x02
  666 03:33:55.835071  
  667 03:33:55.838975  L0:00000000
  668 03:33:55.839474  L1:00000703
  669 03:33:55.839900  L2:00008067
  670 03:33:55.840587  L3:15000000
  671 03:33:55.841076  S1:00000000
  672 03:33:55.844562  B2:20282000
  673 03:33:55.845085  B1:a0f83180
  674 03:33:55.845507  
  675 03:33:55.845923  TE: 68860
  676 03:33:55.846334  
  677 03:33:55.850233  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  678 03:33:55.850740  
  679 03:33:55.855760  Board ID = 1
  680 03:33:55.856298  Set cpu clk to 24M
  681 03:33:55.856725  Set clk81 to 24M
  682 03:33:55.861572  Use GP1_pll as DSU clk.
  683 03:33:55.862266  DSU clk: 1200 Mhz
  684 03:33:55.862768  CPU clk: 1200 MHz
  685 03:33:55.863230  Set clk81 to 166.6M
  686 03:33:55.872556  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  687 03:33:55.873089  board id: 1
  688 03:33:55.878493  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  689 03:33:55.889879  fw parse done
  690 03:33:55.894798  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  691 03:33:55.939226  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  692 03:33:55.950148  PIEI prepare done
  693 03:33:55.950694  fastboot data load
  694 03:33:55.951120  fastboot data verify
  695 03:33:55.955752  verify result: 266
  696 03:33:55.961519  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  697 03:33:55.962149  LPDDR4 probe
  698 03:33:55.962679  ddr clk to 1584MHz
  699 03:33:55.969215  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  700 03:33:56.006193  
  701 03:33:56.006795  dmc_version 0001
  702 03:33:56.014068  Check phy result
  703 03:33:56.020252  INFO : End of CA training
  704 03:33:56.020829  INFO : End of initialization
  705 03:33:56.025696  INFO : Training has run successfully!
  706 03:33:56.026249  Check phy result
  707 03:33:56.031260  INFO : End of initialization
  708 03:33:56.031797  INFO : End of read enable training
  709 03:33:56.034627  INFO : End of fine write leveling
  710 03:33:56.040474  INFO : End of Write leveling coarse delay
  711 03:33:56.045849  INFO : Training has run successfully!
  712 03:33:56.046387  Check phy result
  713 03:33:56.046789  INFO : End of initialization
  714 03:33:56.051319  INFO : End of read dq deskew training
  715 03:33:56.056964  INFO : End of MPR read delay center optimization
  716 03:33:56.057473  INFO : End of write delay center optimization
  717 03:33:56.062621  INFO : End of read delay center optimization
  718 03:33:56.068248  INFO : End of max read latency training
  719 03:33:56.068987  INFO : Training has run successfully!
  720 03:33:56.073751  1D training succeed
  721 03:33:56.079673  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  722 03:33:56.127952  Check phy result
  723 03:33:56.128535  INFO : End of initialization
  724 03:33:56.155302  INFO : End of 2D read delay Voltage center optimization
  725 03:33:56.179480  INFO : End of 2D read delay Voltage center optimization
  726 03:33:56.235814  INFO : End of 2D write delay Voltage center optimization
  727 03:33:56.290303  INFO : End of 2D write delay Voltage center optimization
  728 03:33:56.296362  INFO : Training has run successfully!
  729 03:33:56.296943  
  730 03:33:56.297362  channel==0
  731 03:33:56.301852  RxClkDly_Margin_A0==78 ps 8
  732 03:33:56.302674  TxDqDly_Margin_A0==98 ps 10
  733 03:33:56.304720  RxClkDly_Margin_A1==88 ps 9
  734 03:33:56.305258  TxDqDly_Margin_A1==98 ps 10
  735 03:33:56.310372  TrainedVREFDQ_A0==74
  736 03:33:56.310991  TrainedVREFDQ_A1==75
  737 03:33:56.315895  VrefDac_Margin_A0==23
  738 03:33:56.316616  DeviceVref_Margin_A0==40
  739 03:33:56.317077  VrefDac_Margin_A1==23
  740 03:33:56.321441  DeviceVref_Margin_A1==39
  741 03:33:56.322010  
  742 03:33:56.322416  
  743 03:33:56.322822  channel==1
  744 03:33:56.323228  RxClkDly_Margin_A0==78 ps 8
  745 03:33:56.327012  TxDqDly_Margin_A0==98 ps 10
  746 03:33:56.327531  RxClkDly_Margin_A1==78 ps 8
  747 03:33:56.332738  TxDqDly_Margin_A1==88 ps 9
  748 03:33:56.333280  TrainedVREFDQ_A0==78
  749 03:33:56.333692  TrainedVREFDQ_A1==75
  750 03:33:56.338221  VrefDac_Margin_A0==22
  751 03:33:56.338695  DeviceVref_Margin_A0==36
  752 03:33:56.343767  VrefDac_Margin_A1==22
  753 03:33:56.344281  DeviceVref_Margin_A1==39
  754 03:33:56.344682  
  755 03:33:56.349462   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  756 03:33:56.349958  
  757 03:33:56.377471  soc_vref_reg_value 0x 00000019 00000018 00000019 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  758 03:33:56.382960  2D training succeed
  759 03:33:56.388570  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  760 03:33:56.389059  auto size-- 65535DDR cs0 size: 2048MB
  761 03:33:56.394232  DDR cs1 size: 2048MB
  762 03:33:56.394728  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  763 03:33:56.399742  cs0 DataBus test pass
  764 03:33:56.400271  cs1 DataBus test pass
  765 03:33:56.400676  cs0 AddrBus test pass
  766 03:33:56.405364  cs1 AddrBus test pass
  767 03:33:56.405843  
  768 03:33:56.406242  100bdlr_step_size ps== 478
  769 03:33:56.406646  result report
  770 03:33:56.411083  boot times 0Enable ddr reg access
  771 03:33:56.418746  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  772 03:33:56.432372  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  773 03:33:57.091761  bl2z: ptr: 05129330, size: 00001e40
  774 03:33:57.100286  0.0;M3 CHK:0;cm4_sp_mode 0
  775 03:33:57.100861  MVN_1=0x00000000
  776 03:33:57.101286  MVN_2=0x00000000
  777 03:33:57.111645  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  778 03:33:57.112249  OPS=0x04
  779 03:33:57.112665  ring efuse init
  780 03:33:57.117204  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  781 03:33:57.117707  [0.017354 Inits done]
  782 03:33:57.118145  secure task start!
  783 03:33:57.124993  high task start!
  784 03:33:57.125471  low task start!
  785 03:33:57.125869  run into bl31
  786 03:33:57.133629  NOTICE:  BL31: v1.3(release):4fc40b1
  787 03:33:57.141485  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  788 03:33:57.142003  NOTICE:  BL31: G12A normal boot!
  789 03:33:57.157144  NOTICE:  BL31: BL33 decompress pass
  790 03:33:57.162765  ERROR:   Error initializing runtime service opteed_fast
  791 03:33:57.958189  
  792 03:33:57.958797  
  793 03:33:57.963570  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  794 03:33:57.964135  
  795 03:33:57.967076  Model: Libre Computer AML-S905D3-CC Solitude
  796 03:33:58.113198  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  797 03:33:58.128506  DRAM:  2 GiB (effective 3.8 GiB)
  798 03:33:58.230420  Core:  406 devices, 33 uclasses, devicetree: separate
  799 03:33:58.236333  WDT:   Not starting watchdog@f0d0
  800 03:33:58.261434  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  801 03:33:58.273724  Loading Environment from FAT... Card did not respond to voltage select! : -110
  802 03:33:58.277658  ** Bad device specification mmc 0 **
  803 03:33:58.288733  Card did not respond to voltage select! : -110
  804 03:33:58.295394  ** Bad device specification mmc 0 **
  805 03:33:58.295866  Couldn't find partition mmc 0
  806 03:33:58.304777  Card did not respond to voltage select! : -110
  807 03:33:58.310161  ** Bad device specification mmc 0 **
  808 03:33:58.310679  Couldn't find partition mmc 0
  809 03:33:58.314260  Error: could not access storage.
  810 03:33:58.611716  Net:   eth0: ethernet@ff3f0000
  811 03:33:58.612385  starting USB...
  812 03:33:58.856323  Bus usb@ff500000: Register 3000140 NbrPorts 3
  813 03:33:58.856922  Starting the controller
  814 03:33:58.863299  USB XHCI 1.10
  815 03:34:00.417580  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  816 03:34:00.425808         scanning usb for storage devices... 0 Storage Device(s) found
  818 03:34:00.477305  Hit any key to stop autoboot:  1 
  819 03:34:00.478222  end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
  820 03:34:00.478845  start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
  821 03:34:00.479327  Setting prompt string to ['=>']
  822 03:34:00.479812  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
  823 03:34:00.491835   0 
  824 03:34:00.492752  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  826 03:34:00.593983  => setenv autoload no
  827 03:34:00.594963  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  828 03:34:00.599862  setenv autoload no
  830 03:34:00.701365  => setenv initrd_high 0xffffffff
  831 03:34:00.702301  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  832 03:34:00.706447  setenv initrd_high 0xffffffff
  834 03:34:00.807883  => setenv fdt_high 0xffffffff
  835 03:34:00.808827  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  836 03:34:00.813097  setenv fdt_high 0xffffffff
  838 03:34:00.914552  => dhcp
  839 03:34:00.915449  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  840 03:34:00.919563  dhcp
  841 03:34:01.825462  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
  842 03:34:01.826095  Speed: 1000, full duplex
  843 03:34:01.826525  BOOTP broadcast 1
  844 03:34:02.074200  BOOTP broadcast 2
  845 03:34:02.087428  DHCP client bound to address 192.168.6.21 (262 ms)
  847 03:34:02.188906  => setenv serverip 192.168.6.2
  848 03:34:02.189881  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  849 03:34:02.194252  setenv serverip 192.168.6.2
  851 03:34:02.295751  => tftpboot 0x01080000 956970/tftp-deploy-qigpgafm/kernel/uImage
  852 03:34:02.296517  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  853 03:34:02.303323  tftpboot 0x01080000 956970/tftp-deploy-qigpgafm/kernel/uImage
  854 03:34:02.303803  Speed: 1000, full duplex
  855 03:34:02.304236  Using ethernet@ff3f0000 device
  856 03:34:02.308879  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  857 03:34:02.314322  Filename '956970/tftp-deploy-qigpgafm/kernel/uImage'.
  858 03:34:02.318362  Load address: 0x1080000
  859 03:34:04.701168  Loading: *##################################################  36.1 MiB
  860 03:34:04.701972  	 15.1 MiB/s
  861 03:34:04.702545  done
  862 03:34:04.705509  Bytes transferred = 37880384 (2420240 hex)
  864 03:34:04.807290  => tftpboot 0x08000000 956970/tftp-deploy-qigpgafm/ramdisk/ramdisk.cpio.gz.uboot
  865 03:34:04.808270  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
  866 03:34:04.814991  tftpboot 0x08000000 956970/tftp-deploy-qigpgafm/ramdisk/ramdisk.cpio.gz.uboot
  867 03:34:04.815507  Speed: 1000, full duplex
  868 03:34:04.815959  Using ethernet@ff3f0000 device
  869 03:34:04.820522  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  870 03:34:04.830345  Filename '956970/tftp-deploy-qigpgafm/ramdisk/ramdisk.cpio.gz.uboot'.
  871 03:34:04.830896  Load address: 0x8000000
  872 03:34:06.387344  Loading: *################################################# UDP wrong checksum 00000005 00003ec5
  873 03:34:21.390290  T T T  UDP wrong checksum 00000005 00003ec5
  874 03:34:41.394268  T T T T  UDP wrong checksum 00000005 00003ec5
  875 03:34:42.473891   UDP wrong checksum 000000ff 00005bd9
  876 03:34:42.514226   UDP wrong checksum 000000ff 0000f7cb
  877 03:35:01.398822  T T T 
  878 03:35:01.399273  Retry count exceeded; starting again
  880 03:35:01.400968  end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
  883 03:35:01.402761  end: 2.4 uboot-commands (duration 00:01:20) [common]
  885 03:35:01.404166  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
  887 03:35:01.405224  end: 2 uboot-action (duration 00:01:20) [common]
  889 03:35:01.406754  Cleaning after the job
  890 03:35:01.407331  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/ramdisk
  891 03:35:01.408752  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/kernel
  892 03:35:01.449609  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/dtb
  893 03:35:01.451006  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/nfsrootfs
  894 03:35:01.620864  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/956970/tftp-deploy-qigpgafm/modules
  895 03:35:01.641085  start: 4.1 power-off (timeout 00:00:30) [common]
  896 03:35:01.641835  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  897 03:35:01.676815  >> OK - accepted request

  898 03:35:01.678865  Returned 0 in 0 seconds
  899 03:35:01.779952  end: 4.1 power-off (duration 00:00:00) [common]
  901 03:35:01.781081  start: 4.2 read-feedback (timeout 00:10:00) [common]
  902 03:35:01.781829  Listened to connection for namespace 'common' for up to 1s
  903 03:35:02.782115  Finalising connection for namespace 'common'
  904 03:35:02.782847  Disconnecting from shell: Finalise
  905 03:35:02.783384  => 
  906 03:35:02.884495  end: 4.2 read-feedback (duration 00:00:01) [common]
  907 03:35:02.885185  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/956970
  908 03:35:06.019577  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/956970
  909 03:35:06.020218  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.