Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:39:03.949060 lava-dispatcher, installed at version: 2024.01
2 03:39:03.949969 start: 0 validate
3 03:39:03.950468 Start time: 2024-11-08 03:39:03.950438+00:00 (UTC)
4 03:39:03.951077 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:39:03.951863 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:39:04.002084 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:39:04.002735 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
8 03:39:04.051214 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:39:04.052060 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 03:39:04.087618 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:39:04.088325 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:39:04.131275 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:39:04.131785 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
14 03:39:04.181699 validate duration: 0.23
16 03:39:04.183370 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:39:04.184084 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:39:04.184719 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:39:04.185825 Not decompressing ramdisk as can be used compressed.
20 03:39:04.186765 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 03:39:04.188252 saving as /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/ramdisk/initrd.cpio.gz
22 03:39:04.188845 total size: 5628140 (5 MB)
23 03:39:04.238954 progress 0 % (0 MB)
24 03:39:04.243523 progress 5 % (0 MB)
25 03:39:04.248099 progress 10 % (0 MB)
26 03:39:04.252090 progress 15 % (0 MB)
27 03:39:04.256347 progress 20 % (1 MB)
28 03:39:04.260222 progress 25 % (1 MB)
29 03:39:04.264941 progress 30 % (1 MB)
30 03:39:04.269532 progress 35 % (1 MB)
31 03:39:04.273568 progress 40 % (2 MB)
32 03:39:04.277813 progress 45 % (2 MB)
33 03:39:04.281679 progress 50 % (2 MB)
34 03:39:04.285907 progress 55 % (2 MB)
35 03:39:04.290145 progress 60 % (3 MB)
36 03:39:04.294021 progress 65 % (3 MB)
37 03:39:04.298272 progress 70 % (3 MB)
38 03:39:04.302048 progress 75 % (4 MB)
39 03:39:04.306156 progress 80 % (4 MB)
40 03:39:04.309799 progress 85 % (4 MB)
41 03:39:04.313794 progress 90 % (4 MB)
42 03:39:04.317553 progress 95 % (5 MB)
43 03:39:04.320872 progress 100 % (5 MB)
44 03:39:04.321516 5 MB downloaded in 0.13 s (40.46 MB/s)
45 03:39:04.322073 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:39:04.322954 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:39:04.323245 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:39:04.323512 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:39:04.324017 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/clang-16/kernel/Image
51 03:39:04.324297 saving as /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/kernel/Image
52 03:39:04.324513 total size: 37880320 (36 MB)
53 03:39:04.324724 No compression specified
54 03:39:04.362027 progress 0 % (0 MB)
55 03:39:04.390932 progress 5 % (1 MB)
56 03:39:04.420428 progress 10 % (3 MB)
57 03:39:04.448625 progress 15 % (5 MB)
58 03:39:04.475967 progress 20 % (7 MB)
59 03:39:04.503350 progress 25 % (9 MB)
60 03:39:04.530143 progress 30 % (10 MB)
61 03:39:04.557569 progress 35 % (12 MB)
62 03:39:04.584853 progress 40 % (14 MB)
63 03:39:04.612912 progress 45 % (16 MB)
64 03:39:04.641558 progress 50 % (18 MB)
65 03:39:04.670182 progress 55 % (19 MB)
66 03:39:04.698867 progress 60 % (21 MB)
67 03:39:04.727440 progress 65 % (23 MB)
68 03:39:04.755831 progress 70 % (25 MB)
69 03:39:04.783061 progress 75 % (27 MB)
70 03:39:04.809654 progress 80 % (28 MB)
71 03:39:04.837314 progress 85 % (30 MB)
72 03:39:04.866095 progress 90 % (32 MB)
73 03:39:04.894541 progress 95 % (34 MB)
74 03:39:04.922565 progress 100 % (36 MB)
75 03:39:04.923275 36 MB downloaded in 0.60 s (60.34 MB/s)
76 03:39:04.923913 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:39:04.925061 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:39:04.925443 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:39:04.925858 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:39:04.926473 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 03:39:04.926839 saving as /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 03:39:04.927135 total size: 53209 (0 MB)
84 03:39:04.927424 No compression specified
85 03:39:04.974359 progress 61 % (0 MB)
86 03:39:04.975353 progress 100 % (0 MB)
87 03:39:04.976118 0 MB downloaded in 0.05 s (1.04 MB/s)
88 03:39:04.976707 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:39:04.977685 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:39:04.978073 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:39:04.978416 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:39:04.978992 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 03:39:04.979287 saving as /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/nfsrootfs/full.rootfs.tar
95 03:39:04.979560 total size: 474398908 (452 MB)
96 03:39:04.979831 Using unxz to decompress xz
97 03:39:05.013834 progress 0 % (0 MB)
98 03:39:06.152523 progress 5 % (22 MB)
99 03:39:07.623061 progress 10 % (45 MB)
100 03:39:08.091877 progress 15 % (67 MB)
101 03:39:08.945741 progress 20 % (90 MB)
102 03:39:09.488638 progress 25 % (113 MB)
103 03:39:09.858647 progress 30 % (135 MB)
104 03:39:10.532455 progress 35 % (158 MB)
105 03:39:11.458054 progress 40 % (181 MB)
106 03:39:12.254022 progress 45 % (203 MB)
107 03:39:12.872841 progress 50 % (226 MB)
108 03:39:13.532858 progress 55 % (248 MB)
109 03:39:14.743117 progress 60 % (271 MB)
110 03:39:16.146906 progress 65 % (294 MB)
111 03:39:17.741054 progress 70 % (316 MB)
112 03:39:20.851660 progress 75 % (339 MB)
113 03:39:23.320624 progress 80 % (361 MB)
114 03:39:26.235258 progress 85 % (384 MB)
115 03:39:29.409647 progress 90 % (407 MB)
116 03:39:32.610334 progress 95 % (429 MB)
117 03:39:35.791180 progress 100 % (452 MB)
118 03:39:35.804191 452 MB downloaded in 30.82 s (14.68 MB/s)
119 03:39:35.804945 end: 1.4.1 http-download (duration 00:00:31) [common]
121 03:39:35.806601 end: 1.4 download-retry (duration 00:00:31) [common]
122 03:39:35.807132 start: 1.5 download-retry (timeout 00:09:28) [common]
123 03:39:35.807652 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 03:39:35.808606 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/clang-16/modules.tar.xz
125 03:39:35.809083 saving as /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/modules/modules.tar
126 03:39:35.809496 total size: 11768564 (11 MB)
127 03:39:35.809920 Using unxz to decompress xz
128 03:39:35.854422 progress 0 % (0 MB)
129 03:39:35.921998 progress 5 % (0 MB)
130 03:39:35.996984 progress 10 % (1 MB)
131 03:39:36.092492 progress 15 % (1 MB)
132 03:39:36.188469 progress 20 % (2 MB)
133 03:39:36.267682 progress 25 % (2 MB)
134 03:39:36.345006 progress 30 % (3 MB)
135 03:39:36.426013 progress 35 % (3 MB)
136 03:39:36.506650 progress 40 % (4 MB)
137 03:39:36.583907 progress 45 % (5 MB)
138 03:39:36.669628 progress 50 % (5 MB)
139 03:39:36.752222 progress 55 % (6 MB)
140 03:39:36.837886 progress 60 % (6 MB)
141 03:39:36.919673 progress 65 % (7 MB)
142 03:39:37.002322 progress 70 % (7 MB)
143 03:39:37.086214 progress 75 % (8 MB)
144 03:39:37.170851 progress 80 % (9 MB)
145 03:39:37.252277 progress 85 % (9 MB)
146 03:39:37.336497 progress 90 % (10 MB)
147 03:39:37.416477 progress 95 % (10 MB)
148 03:39:37.494883 progress 100 % (11 MB)
149 03:39:37.505572 11 MB downloaded in 1.70 s (6.62 MB/s)
150 03:39:37.506490 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:39:37.508130 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:39:37.508662 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 03:39:37.509174 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 03:39:53.565683 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/957021/extract-nfsrootfs-1mu61zyt
156 03:39:53.566278 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 03:39:53.566591 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 03:39:53.567302 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf
159 03:39:53.567753 makedir: /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin
160 03:39:53.568139 makedir: /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/tests
161 03:39:53.568481 makedir: /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/results
162 03:39:53.568820 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-add-keys
163 03:39:53.569364 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-add-sources
164 03:39:53.569886 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-background-process-start
165 03:39:53.570446 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-background-process-stop
166 03:39:53.570987 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-common-functions
167 03:39:53.571487 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-echo-ipv4
168 03:39:53.571972 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-install-packages
169 03:39:53.572515 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-installed-packages
170 03:39:53.573094 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-os-build
171 03:39:53.573609 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-probe-channel
172 03:39:53.574182 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-probe-ip
173 03:39:53.574743 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-target-ip
174 03:39:53.575246 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-target-mac
175 03:39:53.575732 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-target-storage
176 03:39:53.576271 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-test-case
177 03:39:53.576796 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-test-event
178 03:39:53.577290 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-test-feedback
179 03:39:53.577820 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-test-raise
180 03:39:53.578355 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-test-reference
181 03:39:53.578851 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-test-runner
182 03:39:53.579338 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-test-set
183 03:39:53.579830 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-test-shell
184 03:39:53.580371 Updating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-install-packages (oe)
185 03:39:53.580930 Updating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/bin/lava-installed-packages (oe)
186 03:39:53.581374 Creating /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/environment
187 03:39:53.581796 LAVA metadata
188 03:39:53.582072 - LAVA_JOB_ID=957021
189 03:39:53.582287 - LAVA_DISPATCHER_IP=192.168.6.2
190 03:39:53.582667 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 03:39:53.583655 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 03:39:53.584008 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 03:39:53.584227 skipped lava-vland-overlay
194 03:39:53.584476 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 03:39:53.584731 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 03:39:53.584949 skipped lava-multinode-overlay
197 03:39:53.585188 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 03:39:53.585463 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 03:39:53.585729 Loading test definitions
200 03:39:53.586011 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 03:39:53.586237 Using /lava-957021 at stage 0
202 03:39:53.587435 uuid=957021_1.6.2.4.1 testdef=None
203 03:39:53.587754 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 03:39:53.588046 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 03:39:53.589917 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 03:39:53.590719 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 03:39:53.592915 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 03:39:53.593844 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 03:39:53.596111 runner path: /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 957021_1.6.2.4.1
212 03:39:53.596716 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 03:39:53.597480 Creating lava-test-runner.conf files
215 03:39:53.597683 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/957021/lava-overlay-02a694pf/lava-957021/0 for stage 0
216 03:39:53.598019 - 0_v4l2-decoder-conformance-vp9
217 03:39:53.598361 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 03:39:53.598631 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 03:39:53.620459 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 03:39:53.620880 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 03:39:53.621138 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 03:39:53.621405 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 03:39:53.621669 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 03:39:54.230709 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 03:39:54.231175 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 03:39:54.231422 extracting modules file /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957021/extract-nfsrootfs-1mu61zyt
227 03:39:55.669275 extracting modules file /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957021/extract-overlay-ramdisk-1qaigdxh/ramdisk
228 03:39:57.182940 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 03:39:57.183462 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 03:39:57.183771 [common] Applying overlay to NFS
231 03:39:57.184029 [common] Applying overlay /var/lib/lava/dispatcher/tmp/957021/compress-overlay-5j595ezt/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/957021/extract-nfsrootfs-1mu61zyt
232 03:39:57.215388 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 03:39:57.215876 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 03:39:57.216221 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 03:39:57.216466 Converting downloaded kernel to a uImage
236 03:39:57.216787 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/kernel/Image /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/kernel/uImage
237 03:39:57.656323 output: Image Name:
238 03:39:57.656760 output: Created: Fri Nov 8 03:39:57 2024
239 03:39:57.656974 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 03:39:57.657181 output: Data Size: 37880320 Bytes = 36992.50 KiB = 36.13 MiB
241 03:39:57.657386 output: Load Address: 01080000
242 03:39:57.657592 output: Entry Point: 01080000
243 03:39:57.657793 output:
244 03:39:57.658134 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 03:39:57.658410 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 03:39:57.658686 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 03:39:57.658941 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 03:39:57.659196 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 03:39:57.659455 Building ramdisk /var/lib/lava/dispatcher/tmp/957021/extract-overlay-ramdisk-1qaigdxh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/957021/extract-overlay-ramdisk-1qaigdxh/ramdisk
250 03:40:00.347056 >> 173443 blocks
251 03:40:07.995642 Adding RAMdisk u-boot header.
252 03:40:07.996419 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/957021/extract-overlay-ramdisk-1qaigdxh/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/957021/extract-overlay-ramdisk-1qaigdxh/ramdisk.cpio.gz.uboot
253 03:40:08.254356 output: Image Name:
254 03:40:08.254785 output: Created: Fri Nov 8 03:40:07 2024
255 03:40:08.255008 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 03:40:08.255217 output: Data Size: 24150349 Bytes = 23584.33 KiB = 23.03 MiB
257 03:40:08.255419 output: Load Address: 00000000
258 03:40:08.255627 output: Entry Point: 00000000
259 03:40:08.255830 output:
260 03:40:08.256486 rename /var/lib/lava/dispatcher/tmp/957021/extract-overlay-ramdisk-1qaigdxh/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/ramdisk/ramdisk.cpio.gz.uboot
261 03:40:08.256929 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 03:40:08.257232 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 03:40:08.257539 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 03:40:08.257781 No LXC device requested
265 03:40:08.258047 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 03:40:08.258315 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 03:40:08.258576 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 03:40:08.258793 Checking files for TFTP limit of 4294967296 bytes.
269 03:40:08.260303 end: 1 tftp-deploy (duration 00:01:04) [common]
270 03:40:08.260648 start: 2 uboot-action (timeout 00:05:00) [common]
271 03:40:08.260939 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 03:40:08.261198 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 03:40:08.261455 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 03:40:08.261749 Using kernel file from prepare-kernel: 957021/tftp-deploy-wj7cn7il/kernel/uImage
275 03:40:08.262082 substitutions:
276 03:40:08.262295 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 03:40:08.262502 - {DTB_ADDR}: 0x01070000
278 03:40:08.262704 - {DTB}: 957021/tftp-deploy-wj7cn7il/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 03:40:08.262903 - {INITRD}: 957021/tftp-deploy-wj7cn7il/ramdisk/ramdisk.cpio.gz.uboot
280 03:40:08.263107 - {KERNEL_ADDR}: 0x01080000
281 03:40:08.263305 - {KERNEL}: 957021/tftp-deploy-wj7cn7il/kernel/uImage
282 03:40:08.263502 - {LAVA_MAC}: None
283 03:40:08.263722 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/957021/extract-nfsrootfs-1mu61zyt
284 03:40:08.263929 - {NFS_SERVER_IP}: 192.168.6.2
285 03:40:08.264172 - {PRESEED_CONFIG}: None
286 03:40:08.264372 - {PRESEED_LOCAL}: None
287 03:40:08.264570 - {RAMDISK_ADDR}: 0x08000000
288 03:40:08.264768 - {RAMDISK}: 957021/tftp-deploy-wj7cn7il/ramdisk/ramdisk.cpio.gz.uboot
289 03:40:08.264966 - {ROOT_PART}: None
290 03:40:08.265162 - {ROOT}: None
291 03:40:08.265356 - {SERVER_IP}: 192.168.6.2
292 03:40:08.265554 - {TEE_ADDR}: 0x83000000
293 03:40:08.265749 - {TEE}: None
294 03:40:08.265945 Parsed boot commands:
295 03:40:08.266140 - setenv autoload no
296 03:40:08.266336 - setenv initrd_high 0xffffffff
297 03:40:08.266530 - setenv fdt_high 0xffffffff
298 03:40:08.266723 - dhcp
299 03:40:08.266918 - setenv serverip 192.168.6.2
300 03:40:08.267111 - tftpboot 0x01080000 957021/tftp-deploy-wj7cn7il/kernel/uImage
301 03:40:08.267304 - tftpboot 0x08000000 957021/tftp-deploy-wj7cn7il/ramdisk/ramdisk.cpio.gz.uboot
302 03:40:08.267496 - tftpboot 0x01070000 957021/tftp-deploy-wj7cn7il/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 03:40:08.267690 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/957021/extract-nfsrootfs-1mu61zyt,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 03:40:08.267890 - bootm 0x01080000 0x08000000 0x01070000
305 03:40:08.268185 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 03:40:08.268972 start: 2.3 connect-device (timeout 00:05:00) [common]
308 03:40:08.269199 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 03:40:08.281426 Setting prompt string to ['lava-test: # ']
310 03:40:08.282408 end: 2.3 connect-device (duration 00:00:00) [common]
311 03:40:08.282748 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 03:40:08.283050 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 03:40:08.283337 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 03:40:08.283956 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 03:40:08.318942 >> OK - accepted request
316 03:40:08.321131 Returned 0 in 0 seconds
317 03:40:08.421931 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 03:40:08.422933 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 03:40:08.423229 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 03:40:08.423527 Setting prompt string to ['Hit any key to stop autoboot']
322 03:40:08.423778 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 03:40:08.424777 Trying 192.168.56.21...
324 03:40:08.425067 Connected to conserv1.
325 03:40:08.425284 Escape character is '^]'.
326 03:40:08.425499
327 03:40:08.425717 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 03:40:08.425937
329 03:40:16.318688 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 03:40:16.319370 bl2_stage_init 0x01
331 03:40:16.319863 bl2_stage_init 0x81
332 03:40:16.324101 hw id: 0x0000 - pwm id 0x01
333 03:40:16.324620 bl2_stage_init 0xc1
334 03:40:16.329729 bl2_stage_init 0x02
335 03:40:16.330268
336 03:40:16.330767 L0:00000000
337 03:40:16.331245 L1:00000703
338 03:40:16.331700 L2:00008067
339 03:40:16.332190 L3:15000000
340 03:40:16.335193 S1:00000000
341 03:40:16.335705 B2:20282000
342 03:40:16.336223 B1:a0f83180
343 03:40:16.336685
344 03:40:16.337139 TE: 68157
345 03:40:16.337587
346 03:40:16.340805 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 03:40:16.341307
348 03:40:16.346551 Board ID = 1
349 03:40:16.347058 Set cpu clk to 24M
350 03:40:16.347510 Set clk81 to 24M
351 03:40:16.352090 Use GP1_pll as DSU clk.
352 03:40:16.352590 DSU clk: 1200 Mhz
353 03:40:16.353044 CPU clk: 1200 MHz
354 03:40:16.357537 Set clk81 to 166.6M
355 03:40:16.363173 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 03:40:16.363672 board id: 1
357 03:40:16.370493 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 03:40:16.381366 fw parse done
359 03:40:16.386496 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 03:40:16.430332 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 03:40:16.441894 PIEI prepare done
362 03:40:16.442540 fastboot data load
363 03:40:16.443033 fastboot data verify
364 03:40:16.447176 verify result: 266
365 03:40:16.452809 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 03:40:16.453480 LPDDR4 probe
367 03:40:16.453974 ddr clk to 1584MHz
368 03:40:16.460778 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 03:40:16.498405
370 03:40:16.498836 dmc_version 0001
371 03:40:16.505653 Check phy result
372 03:40:16.511437 INFO : End of CA training
373 03:40:16.512110 INFO : End of initialization
374 03:40:16.517043 INFO : Training has run successfully!
375 03:40:16.517652 Check phy result
376 03:40:16.522576 INFO : End of initialization
377 03:40:16.523187 INFO : End of read enable training
378 03:40:16.525883 INFO : End of fine write leveling
379 03:40:16.531538 INFO : End of Write leveling coarse delay
380 03:40:16.537085 INFO : Training has run successfully!
381 03:40:16.537693 Check phy result
382 03:40:16.538175 INFO : End of initialization
383 03:40:16.542722 INFO : End of read dq deskew training
384 03:40:16.548368 INFO : End of MPR read delay center optimization
385 03:40:16.548934 INFO : End of write delay center optimization
386 03:40:16.553930 INFO : End of read delay center optimization
387 03:40:16.559534 INFO : End of max read latency training
388 03:40:16.560153 INFO : Training has run successfully!
389 03:40:16.565043 1D training succeed
390 03:40:16.571131 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 03:40:16.619448 Check phy result
392 03:40:16.620138 INFO : End of initialization
393 03:40:16.648557 INFO : End of 2D read delay Voltage center optimization
394 03:40:16.670893 INFO : End of 2D read delay Voltage center optimization
395 03:40:16.727714 INFO : End of 2D write delay Voltage center optimization
396 03:40:16.781687 INFO : End of 2D write delay Voltage center optimization
397 03:40:16.787193 INFO : Training has run successfully!
398 03:40:16.787780
399 03:40:16.788086 channel==0
400 03:40:16.792865 RxClkDly_Margin_A0==78 ps 8
401 03:40:16.793457 TxDqDly_Margin_A0==98 ps 10
402 03:40:16.798487 RxClkDly_Margin_A1==88 ps 9
403 03:40:16.798831 TxDqDly_Margin_A1==98 ps 10
404 03:40:16.799062 TrainedVREFDQ_A0==74
405 03:40:16.804102 TrainedVREFDQ_A1==75
406 03:40:16.804703 VrefDac_Margin_A0==22
407 03:40:16.805183 DeviceVref_Margin_A0==40
408 03:40:16.809734 VrefDac_Margin_A1==23
409 03:40:16.810277 DeviceVref_Margin_A1==39
410 03:40:16.810727
411 03:40:16.811181
412 03:40:16.815213 channel==1
413 03:40:16.815755 RxClkDly_Margin_A0==78 ps 8
414 03:40:16.816252 TxDqDly_Margin_A0==88 ps 9
415 03:40:16.820848 RxClkDly_Margin_A1==88 ps 9
416 03:40:16.821390 TxDqDly_Margin_A1==78 ps 8
417 03:40:16.826344 TrainedVREFDQ_A0==75
418 03:40:16.826878 TrainedVREFDQ_A1==77
419 03:40:16.827322 VrefDac_Margin_A0==22
420 03:40:16.831947 DeviceVref_Margin_A0==39
421 03:40:16.832532 VrefDac_Margin_A1==22
422 03:40:16.837599 DeviceVref_Margin_A1==37
423 03:40:16.838156
424 03:40:16.838602 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 03:40:16.839040
426 03:40:16.871205 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 03:40:16.871939 2D training succeed
428 03:40:16.876798 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 03:40:16.882359 auto size-- 65535DDR cs0 size: 2048MB
430 03:40:16.882920 DDR cs1 size: 2048MB
431 03:40:16.888012 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 03:40:16.888558 cs0 DataBus test pass
433 03:40:16.893633 cs1 DataBus test pass
434 03:40:16.894167 cs0 AddrBus test pass
435 03:40:16.894594 cs1 AddrBus test pass
436 03:40:16.895006
437 03:40:16.899129 100bdlr_step_size ps== 471
438 03:40:16.899499 result report
439 03:40:16.904806 boot times 0Enable ddr reg access
440 03:40:16.909886 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 03:40:16.923632 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 03:40:17.583055 bl2z: ptr: 05129330, size: 00001e40
443 03:40:17.591847 0.0;M3 CHK:0;cm4_sp_mode 0
444 03:40:17.592277 MVN_1=0x00000000
445 03:40:17.592514 MVN_2=0x00000000
446 03:40:17.603502 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 03:40:17.603902 OPS=0x04
448 03:40:17.604161 ring efuse init
449 03:40:17.606268 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 03:40:17.612603 [0.017355 Inits done]
451 03:40:17.612978 secure task start!
452 03:40:17.613201 high task start!
453 03:40:17.613414 low task start!
454 03:40:17.616889 run into bl31
455 03:40:17.625621 NOTICE: BL31: v1.3(release):4fc40b1
456 03:40:17.633333 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 03:40:17.633748 NOTICE: BL31: G12A normal boot!
458 03:40:17.649423 NOTICE: BL31: BL33 decompress pass
459 03:40:17.653775 ERROR: Error initializing runtime service opteed_fast
460 03:40:18.871225 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 03:40:18.871885 bl2_stage_init 0x01
462 03:40:18.872382 bl2_stage_init 0x81
463 03:40:18.876906 hw id: 0x0000 - pwm id 0x01
464 03:40:18.877458 bl2_stage_init 0xc1
465 03:40:18.881863 bl2_stage_init 0x02
466 03:40:18.882436
467 03:40:18.882840 L0:00000000
468 03:40:18.883232 L1:00000703
469 03:40:18.883624 L2:00008067
470 03:40:18.887369 L3:15000000
471 03:40:18.887860 S1:00000000
472 03:40:18.888298 B2:20282000
473 03:40:18.888692 B1:a0f83180
474 03:40:18.889079
475 03:40:18.889465 TE: 70807
476 03:40:18.889851
477 03:40:18.898540 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 03:40:18.899064
479 03:40:18.899460 Board ID = 1
480 03:40:18.899844 Set cpu clk to 24M
481 03:40:18.900275 Set clk81 to 24M
482 03:40:18.904218 Use GP1_pll as DSU clk.
483 03:40:18.904708 DSU clk: 1200 Mhz
484 03:40:18.905102 CPU clk: 1200 MHz
485 03:40:18.909870 Set clk81 to 166.6M
486 03:40:18.915384 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 03:40:18.915887 board id: 1
488 03:40:18.923212 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 03:40:18.933917 fw parse done
490 03:40:18.939919 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 03:40:18.982428 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 03:40:18.993367 PIEI prepare done
493 03:40:18.993870 fastboot data load
494 03:40:18.994264 fastboot data verify
495 03:40:18.998872 verify result: 266
496 03:40:19.004468 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 03:40:19.004794 LPDDR4 probe
498 03:40:19.005007 ddr clk to 1584MHz
499 03:40:20.372170 Load ddrfw from SPI, src: 0x00018000, des: SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 03:40:20.372825 bl2_stage_init 0x01
501 03:40:20.373273 bl2_stage_init 0x81
502 03:40:20.377752 hw id: 0x0000 - pwm id 0x01
503 03:40:20.378289 bl2_stage_init 0xc1
504 03:40:20.378727 bl2_stage_init 0x02
505 03:40:20.379151
506 03:40:20.383301 L0:00000000
507 03:40:20.383812 L1:00000703
508 03:40:20.384326 L2:00008067
509 03:40:20.384747 L3:15000000
510 03:40:20.385175 S1:00000000
511 03:40:20.388936 B2:20282000
512 03:40:20.389431 B1:a0f83180
513 03:40:20.389871
514 03:40:20.390314 TE: 69756
515 03:40:20.390733
516 03:40:20.394456 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 03:40:20.394965
518 03:40:20.400089 Board ID = 1
519 03:40:20.400590 Set cpu clk to 24M
520 03:40:20.401010 Set clk81 to 24M
521 03:40:20.405716 Use GP1_pll as DSU clk.
522 03:40:20.406228 DSU clk: 1200 Mhz
523 03:40:20.406648 CPU clk: 1200 MHz
524 03:40:20.407051 Set clk81 to 166.6M
525 03:40:20.416895 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 03:40:20.417433 board id: 1
527 03:40:20.423300 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 03:40:20.434177 fw parse done
529 03:40:20.440160 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 03:40:20.482460 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 03:40:20.494338 PIEI prepare done
532 03:40:20.494844 fastboot data load
533 03:40:20.495261 fastboot data verify
534 03:40:20.500039 verify result: 266
535 03:40:20.505475 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 03:40:20.505845 LPDDR4 probe
537 03:40:20.506074 ddr clk to 1584MHz
538 03:40:20.513450 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 03:40:20.551266
540 03:40:20.551865 dmc_version 0001
541 03:40:20.558224 Check phy result
542 03:40:20.564217 INFO : End of CA training
543 03:40:20.564558 INFO : End of initialization
544 03:40:20.569940 INFO : Training has run successfully!
545 03:40:20.570310 Check phy result
546 03:40:20.575397 INFO : End of initialization
547 03:40:20.575701 INFO : End of read enable training
548 03:40:20.581000 INFO : End of fine write leveling
549 03:40:20.586542 INFO : End of Write leveling coarse delay
550 03:40:20.586843 INFO : Training has run successfully!
551 03:40:20.587061 Check phy result
552 03:40:20.592161 INFO : End of initialization
553 03:40:20.592444 INFO : End of read dq deskew training
554 03:40:20.597845 INFO : End of MPR read delay center optimization
555 03:40:20.603338 INFO : End of write delay center optimization
556 03:40:20.609076 INFO : End of read delay center optimization
557 03:40:20.609584 INFO : End of max read latency training
558 03:40:20.614740 INFO : Training has run successfully!
559 03:40:20.615240 1D training succeed
560 03:40:20.623781 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 03:40:20.672471 Check phy result
562 03:40:20.673187 INFO : End of initialization
563 03:40:20.699648 INFO : End of 2D read delay Voltage center optimization
564 03:40:20.723658 INFO : End of 2D read delay Voltage center optimization
565 03:40:20.780437 INFO : End of 2D write delay Voltage center optimization
566 03:40:20.834312 INFO : End of 2D write delay Voltage center optimization
567 03:40:20.839852 INFO : Training has run successfully!
568 03:40:20.840417
569 03:40:20.840855 channel==0
570 03:40:20.845447 RxClkDly_Margin_A0==78 ps 8
571 03:40:20.845930 TxDqDly_Margin_A0==98 ps 10
572 03:40:20.851139 RxClkDly_Margin_A1==69 ps 7
573 03:40:20.851608 TxDqDly_Margin_A1==88 ps 9
574 03:40:20.852058 TrainedVREFDQ_A0==74
575 03:40:20.856640 TrainedVREFDQ_A1==74
576 03:40:20.857111 VrefDac_Margin_A0==22
577 03:40:20.857519 DeviceVref_Margin_A0==40
578 03:40:20.862238 VrefDac_Margin_A1==23
579 03:40:20.862727 DeviceVref_Margin_A1==40
580 03:40:20.863134
581 03:40:20.863542
582 03:40:20.863942 channel==1
583 03:40:20.867832 RxClkDly_Margin_A0==78 ps 8
584 03:40:20.868323 TxDqDly_Margin_A0==98 ps 10
585 03:40:20.873412 RxClkDly_Margin_A1==78 ps 8
586 03:40:20.873879 TxDqDly_Margin_A1==88 ps 9
587 03:40:20.879077 TrainedVREFDQ_A0==78
588 03:40:20.879547 TrainedVREFDQ_A1==75
589 03:40:20.879959 VrefDac_Margin_A0==23
590 03:40:20.884616 DeviceVref_Margin_A0==36
591 03:40:20.885083 VrefDac_Margin_A1==22
592 03:40:20.890218 DeviceVref_Margin_A1==39
593 03:40:20.890683
594 03:40:20.891095 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 03:40:20.891501
596 03:40:20.924261 soc_vref_reg_value 0x 00000019 00000018 00000017 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
597 03:40:20.924826 2D training succeed
598 03:40:20.929411 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 03:40:20.935123 auto size-- 65535DDR cs0 size: 2048MB
600 03:40:20.935589 DDR cs1 size: 2048MB
601 03:40:20.940624 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 03:40:20.941091 cs0 DataBus test pass
603 03:40:20.946266 cs1 DataBus test pass
604 03:40:20.946740 cs0 AddrBus test pass
605 03:40:20.947150 cs1 AddrBus test pass
606 03:40:20.947548
607 03:40:20.951821 100bdlr_step_size ps== 471
608 03:40:20.952346 result report
609 03:40:20.957437 boot times 0Enable ddr reg access
610 03:40:20.962609 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 03:40:20.975511 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 03:40:21.634873 bl2z: ptr: 05129330, size: 00001e40
613 03:40:21.643351 0.0;M3 CHK:0;cm4_sp_mode 0
614 03:40:21.644060 MVN_1=0x00000000
615 03:40:21.644644 MVN_2=0x00000000
616 03:40:21.655129 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 03:40:21.655476 OPS=0x04
618 03:40:21.655711 ring efuse init
619 03:40:21.660363 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 03:40:21.660675 [0.017354 Inits done]
621 03:40:21.660908 secure task start!
622 03:40:21.667873 high task start!
623 03:40:21.668209 low task start!
624 03:40:21.668450 run into bl31
625 03:40:21.676874 NOTICE: BL31: v1.3(release):4fc40b1
626 03:40:21.684462 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 03:40:21.685151 NOTICE: BL31: G12A normal boot!
628 03:40:21.700065 NOTICE: BL31: BL33 decompress pass
629 03:40:21.705675 ERROR: Error initializing runtime service opteed_fast
630 03:40:23.072220 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 03:40:23.072638 bl2_stage_init 0x01
632 03:40:23.072870 bl2_stage_init 0x81
633 03:40:23.077771 hw id: 0x0000 - pwm id 0x01
634 03:40:23.078293 bl2_stage_init 0xc1
635 03:40:23.082506 bl2_stage_init 0x02
636 03:40:23.083002
637 03:40:23.083288 L0:00000000
638 03:40:23.083561 L1:00000703
639 03:40:23.083821 L2:00008067
640 03:40:23.088027 L3:15000000
641 03:40:23.088455 S1:00000000
642 03:40:23.088728 B2:20282000
643 03:40:23.088986 B1:a0f83180
644 03:40:23.089250
645 03:40:23.089513 TE: 71780
646 03:40:23.089771
647 03:40:23.099803 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 03:40:23.100593
649 03:40:23.101230 Board ID = 1
650 03:40:23.101855 Set cpu clk to 24M
651 03:40:23.102472 Set clk81 to 24M
652 03:40:23.104820 Use GP1_pll as DSU clk.
653 03:40:23.105290 DSU clk: 1200 Mhz
654 03:40:23.105535 CPU clk: 1200 MHz
655 03:40:23.110388 Set clk81 to 166.6M
656 03:40:23.116102 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 03:40:23.116883 board id: 1
658 03:40:23.134311 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 03:40:23.135330 fw parse done
660 03:40:23.140801 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 03:40:23.183358 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 03:40:23.194219 PIEI prepare done
663 03:40:23.194743 fastboot data load
664 03:40:23.195160 fastboot data verify
665 03:40:23.199812 verify result: 266
666 03:40:23.205442 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 03:40:23.205927 LPDDR4 probe
668 03:40:23.206334 ddr clk to 1584MHz
669 03:40:23.213420 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 03:40:23.250564
671 03:40:23.251154 dmc_version 0001
672 03:40:23.257506 Check phy result
673 03:40:23.263331 INFO : End of CA training
674 03:40:23.263825 INFO : End of initialization
675 03:40:23.268851 INFO : Training has run successfully!
676 03:40:23.269397 Check phy result
677 03:40:23.274558 INFO : End of initialization
678 03:40:23.275151 INFO : End of read enable training
679 03:40:23.280122 INFO : End of fine write leveling
680 03:40:23.285706 INFO : End of Write leveling coarse delay
681 03:40:23.286201 INFO : Training has run successfully!
682 03:40:23.286635 Check phy result
683 03:40:23.291483 INFO : End of initialization
684 03:40:23.292119 INFO : End of read dq deskew training
685 03:40:23.297879 INFO : End of MPR read delay center optimization
686 03:40:23.302615 INFO : End of write delay center optimization
687 03:40:23.308729 INFO : End of read delay center optimization
688 03:40:23.309590 INFO : End of max read latency training
689 03:40:23.314014 INFO : Training has run successfully!
690 03:40:23.314417 1D training succeed
691 03:40:23.322112 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 03:40:23.370513 Check phy result
693 03:40:23.370959 INFO : End of initialization
694 03:40:23.394916 INFO : End of 2D read delay Voltage center optimization
695 03:40:23.411605 INFO : End of 2D read delay Voltage center optimization
696 03:40:23.463410 INFO : End of 2D write delay Voltage center optimization
697 03:40:23.514086 INFO : End of 2D write delay Voltage center optimization
698 03:40:23.518692 INFO : Training has run successfully!
699 03:40:23.519093
700 03:40:23.519333 channel==0
701 03:40:23.524630 RxClkDly_Margin_A0==69 ps 7
702 03:40:23.525205 TxDqDly_Margin_A0==98 ps 10
703 03:40:23.527630 RxClkDly_Margin_A1==88 ps 9
704 03:40:23.528206 TxDqDly_Margin_A1==98 ps 10
705 03:40:23.533252 TrainedVREFDQ_A0==74
706 03:40:23.533638 TrainedVREFDQ_A1==74
707 03:40:23.539293 VrefDac_Margin_A0==24
708 03:40:23.539840 DeviceVref_Margin_A0==40
709 03:40:23.540224 VrefDac_Margin_A1==22
710 03:40:23.544380 DeviceVref_Margin_A1==40
711 03:40:23.544729
712 03:40:23.544944
713 03:40:23.545149 channel==1
714 03:40:23.545352 RxClkDly_Margin_A0==78 ps 8
715 03:40:23.548325 TxDqDly_Margin_A0==98 ps 10
716 03:40:23.553320 RxClkDly_Margin_A1==78 ps 8
717 03:40:23.553831 TxDqDly_Margin_A1==88 ps 9
718 03:40:23.554167 TrainedVREFDQ_A0==78
719 03:40:23.558802 TrainedVREFDQ_A1==75
720 03:40:23.559286 VrefDac_Margin_A0==22
721 03:40:23.564598 DeviceVref_Margin_A0==36
722 03:40:23.565029 VrefDac_Margin_A1==22
723 03:40:23.565269 DeviceVref_Margin_A1==39
724 03:40:23.565478
725 03:40:23.570661 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 03:40:23.571126
727 03:40:23.603698 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000015 00000018 00000014 00000015 00000017 00000018 0000001a 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
728 03:40:23.604145 2D training succeed
729 03:40:23.609268 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 03:40:23.615156 auto size-- 65535DDR cs0 size: 2048MB
731 03:40:23.616541 DDR cs1 size: 2048MB
732 03:40:23.620468 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 03:40:23.620837 cs0 DataBus test pass
734 03:40:23.621237 cs1 DataBus test pass
735 03:40:23.626069 cs0 AddrBus test pass
736 03:40:23.627237 cs1 AddrBus test pass
737 03:40:23.627523
738 03:40:23.631631 100bdlr_step_size ps== 464
739 03:40:23.632912 result report
740 03:40:23.633168 boot times 0Enable ddr reg access
741 03:40:23.641600 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 03:40:23.655003 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 03:40:24.311718 bl2z: ptr: 05129330, size: 00001e40
744 03:40:24.317818 0.0;M3 CHK:0;cm4_sp_mode 0
745 03:40:24.318206 MVN_1=0x00000000
746 03:40:24.318436 MVN_2=0x00000000
747 03:40:24.329313 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 03:40:24.329952 OPS=0x04
749 03:40:24.330196 ring efuse init
750 03:40:24.335194 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 03:40:24.335582 [0.017310 Inits done]
752 03:40:24.335819 secure task start!
753 03:40:24.343018 high task start!
754 03:40:24.343403 low task start!
755 03:40:24.343640 run into bl31
756 03:40:24.351635 NOTICE: BL31: v1.3(release):4fc40b1
757 03:40:24.359415 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 03:40:24.359811 NOTICE: BL31: G12A normal boot!
759 03:40:24.375058 NOTICE: BL31: BL33 decompress pass
760 03:40:24.380687 ERROR: Error initializing runtime service opteed_fast
761 03:40:25.174836
762 03:40:25.175436
763 03:40:25.180093 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 03:40:25.180565
765 03:40:25.183668 Model: Libre Computer AML-S905D3-CC Solitude
766 03:40:25.329762 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 03:40:25.345934 DRAM: 2 GiB (effective 3.8 GiB)
768 03:40:25.446895 Core: 406 devices, 33 uclasses, devicetree: separate
769 03:40:25.452141 WDT: Not starting watchdog@f0d0
770 03:40:25.477757 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 03:40:25.489970 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 03:40:25.494928 ** Bad device specification mmc 0 **
773 03:40:25.505041 Card did not respond to voltage select! : -110
774 03:40:25.512428 ** Bad device specification mmc 0 **
775 03:40:25.512978 Couldn't find partition mmc 0
776 03:40:25.521073 Card did not respond to voltage select! : -110
777 03:40:25.528182 ** Bad device specification mmc 0 **
778 03:40:25.528736 Couldn't find partition mmc 0
779 03:40:25.531681 Error: could not access storage.
780 03:40:25.828019 Net: eth0: ethernet@ff3f0000
781 03:40:25.828629 starting USB...
782 03:40:26.072705 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 03:40:26.073209 Starting the controller
784 03:40:26.079628 USB XHCI 1.10
785 03:40:27.633265 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 03:40:27.641569 scanning usb for storage devices... 0 Storage Device(s) found
788 03:40:27.692717 Hit any key to stop autoboot: 1
789 03:40:27.693637 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 03:40:27.694232 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 03:40:27.694715 Setting prompt string to ['=>']
792 03:40:27.695202 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 03:40:27.707039 0
794 03:40:27.707960 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 03:40:27.809198 => setenv autoload no
797 03:40:27.809883 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
798 03:40:27.814699 setenv autoload no
800 03:40:27.916213 => setenv initrd_high 0xffffffff
801 03:40:27.916975 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
802 03:40:27.920356 setenv initrd_high 0xffffffff
804 03:40:28.021796 => setenv fdt_high 0xffffffff
805 03:40:28.022521 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
806 03:40:28.026118 setenv fdt_high 0xffffffff
808 03:40:28.127558 => dhcp
809 03:40:28.128594 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
810 03:40:28.131666 dhcp
811 03:40:29.037619 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 03:40:29.038030 Speed: 1000, full duplex
813 03:40:29.038260 BOOTP broadcast 1
814 03:40:29.286368 BOOTP broadcast 2
815 03:40:29.296694 DHCP client bound to address 192.168.6.21 (258 ms)
817 03:40:29.397826 => setenv serverip 192.168.6.2
818 03:40:29.398546 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
819 03:40:29.402050 setenv serverip 192.168.6.2
821 03:40:29.503084 => tftpboot 0x01080000 957021/tftp-deploy-wj7cn7il/kernel/uImage
822 03:40:29.503625 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
823 03:40:29.510361 tftpboot 0x01080000 957021/tftp-deploy-wj7cn7il/kernel/uImage
824 03:40:29.510695 Speed: 1000, full duplex
825 03:40:29.510913 Using ethernet@ff3f0000 device
826 03:40:29.515717 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
827 03:40:29.521285 Filename '957021/tftp-deploy-wj7cn7il/kernel/uImage'.
828 03:40:29.525073 Load address: 0x1080000
829 03:40:31.209318 Loading: *################################ UDP wrong checksum 000000ff 0000f1b6
830 03:40:31.259448 # UDP wrong checksum 000000ff 000084a9
831 03:40:32.058368 ################# 36.1 MiB
832 03:40:32.058949 14.2 MiB/s
833 03:40:32.059358 done
834 03:40:32.061879 Bytes transferred = 37880384 (2420240 hex)
836 03:40:32.163386 => tftpboot 0x08000000 957021/tftp-deploy-wj7cn7il/ramdisk/ramdisk.cpio.gz.uboot
837 03:40:32.164162 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
838 03:40:32.171170 tftpboot 0x08000000 957021/tftp-deploy-wj7cn7il/ramdisk/ramdisk.cpio.gz.uboot
839 03:40:32.171652 Speed: 1000, full duplex
840 03:40:32.172090 Using ethernet@ff3f0000 device
841 03:40:32.176520 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
842 03:40:32.185370 Filename '957021/tftp-deploy-wj7cn7il/ramdisk/ramdisk.cpio.gz.uboot'.
843 03:40:32.185895 Load address: 0x8000000
844 03:40:33.879307 Loading: *################################################# UDP wrong checksum 00000005 0000318e
845 03:40:38.878892 T UDP wrong checksum 00000005 0000318e
846 03:40:48.881082 T T UDP wrong checksum 00000005 0000318e
847 03:40:50.908585 UDP wrong checksum 000000ff 0000dc01
848 03:40:50.933900 UDP wrong checksum 000000ff 000070f4
849 03:41:08.884803 T T T T UDP wrong checksum 00000005 0000318e
850 03:41:24.902909 T T T UDP wrong checksum 000000ff 00000284
851 03:41:24.933933 UDP wrong checksum 000000ff 00009976
852 03:41:28.889466
853 03:41:28.889847 Retry count exceeded; starting again
855 03:41:28.890765 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
858 03:41:28.891804 end: 2.4 uboot-commands (duration 00:01:21) [common]
860 03:41:28.893375 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
862 03:41:28.894569 end: 2 uboot-action (duration 00:01:21) [common]
864 03:41:28.896348 Cleaning after the job
865 03:41:28.896698 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/ramdisk
866 03:41:28.897736 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/kernel
867 03:41:28.904807 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/dtb
868 03:41:28.906232 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/nfsrootfs
869 03:41:28.971885 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957021/tftp-deploy-wj7cn7il/modules
870 03:41:28.978588 start: 4.1 power-off (timeout 00:00:30) [common]
871 03:41:28.979246 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
872 03:41:29.025850 >> OK - accepted request
873 03:41:29.027166 Returned 0 in 0 seconds
874 03:41:29.128266 end: 4.1 power-off (duration 00:00:00) [common]
876 03:41:29.129256 start: 4.2 read-feedback (timeout 00:10:00) [common]
877 03:41:29.129934 Listened to connection for namespace 'common' for up to 1s
878 03:41:30.130067 Finalising connection for namespace 'common'
879 03:41:30.130567 Disconnecting from shell: Finalise
880 03:41:30.130937 =>
881 03:41:30.232161 end: 4.2 read-feedback (duration 00:00:01) [common]
882 03:41:30.232913 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/957021
883 03:41:32.707633 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/957021
884 03:41:32.708381 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.