Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:02:24.692044 lava-dispatcher, installed at version: 2024.01
2 04:02:24.692853 start: 0 validate
3 04:02:24.693312 Start time: 2024-11-08 04:02:24.693282+00:00 (UTC)
4 04:02:24.693862 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:02:24.694400 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:02:24.740340 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:02:24.740884 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:02:24.772984 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:02:24.773593 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 04:02:24.805619 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:02:24.806076 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:02:24.839669 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:02:24.840170 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:02:24.882900 validate duration: 0.19
16 04:02:24.884398 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:02:24.885037 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:02:24.885617 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:02:24.886612 Not decompressing ramdisk as can be used compressed.
20 04:02:24.887405 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 04:02:24.887923 saving as /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/ramdisk/initrd.cpio.gz
22 04:02:24.888495 total size: 5628169 (5 MB)
23 04:02:24.933192 progress 0 % (0 MB)
24 04:02:24.941254 progress 5 % (0 MB)
25 04:02:24.950373 progress 10 % (0 MB)
26 04:02:24.958138 progress 15 % (0 MB)
27 04:02:24.966746 progress 20 % (1 MB)
28 04:02:24.971260 progress 25 % (1 MB)
29 04:02:24.975293 progress 30 % (1 MB)
30 04:02:24.979391 progress 35 % (1 MB)
31 04:02:24.983020 progress 40 % (2 MB)
32 04:02:24.987067 progress 45 % (2 MB)
33 04:02:24.990690 progress 50 % (2 MB)
34 04:02:24.996982 progress 55 % (2 MB)
35 04:02:25.001084 progress 60 % (3 MB)
36 04:02:25.004709 progress 65 % (3 MB)
37 04:02:25.008739 progress 70 % (3 MB)
38 04:02:25.012447 progress 75 % (4 MB)
39 04:02:25.016525 progress 80 % (4 MB)
40 04:02:25.020193 progress 85 % (4 MB)
41 04:02:25.024136 progress 90 % (4 MB)
42 04:02:25.027848 progress 95 % (5 MB)
43 04:02:25.031147 progress 100 % (5 MB)
44 04:02:25.031785 5 MB downloaded in 0.14 s (37.46 MB/s)
45 04:02:25.032363 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:02:25.033248 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:02:25.033541 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:02:25.033812 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:02:25.034265 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/kernel/Image
51 04:02:25.034513 saving as /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/kernel/Image
52 04:02:25.034722 total size: 45713920 (43 MB)
53 04:02:25.034931 No compression specified
54 04:02:25.072510 progress 0 % (0 MB)
55 04:02:25.101001 progress 5 % (2 MB)
56 04:02:25.129585 progress 10 % (4 MB)
57 04:02:25.158283 progress 15 % (6 MB)
58 04:02:25.187040 progress 20 % (8 MB)
59 04:02:25.215566 progress 25 % (10 MB)
60 04:02:25.244662 progress 30 % (13 MB)
61 04:02:25.273215 progress 35 % (15 MB)
62 04:02:25.302080 progress 40 % (17 MB)
63 04:02:25.330625 progress 45 % (19 MB)
64 04:02:25.359348 progress 50 % (21 MB)
65 04:02:25.388854 progress 55 % (24 MB)
66 04:02:25.418739 progress 60 % (26 MB)
67 04:02:25.447199 progress 65 % (28 MB)
68 04:02:25.475780 progress 70 % (30 MB)
69 04:02:25.504702 progress 75 % (32 MB)
70 04:02:25.533496 progress 80 % (34 MB)
71 04:02:25.561801 progress 85 % (37 MB)
72 04:02:25.590671 progress 90 % (39 MB)
73 04:02:25.619536 progress 95 % (41 MB)
74 04:02:25.647229 progress 100 % (43 MB)
75 04:02:25.647737 43 MB downloaded in 0.61 s (71.12 MB/s)
76 04:02:25.648226 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:02:25.649045 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:02:25.649318 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:02:25.649586 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:02:25.650062 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 04:02:25.650332 saving as /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 04:02:25.650540 total size: 53209 (0 MB)
84 04:02:25.650747 No compression specified
85 04:02:25.693005 progress 61 % (0 MB)
86 04:02:25.693865 progress 100 % (0 MB)
87 04:02:25.694400 0 MB downloaded in 0.04 s (1.16 MB/s)
88 04:02:25.694882 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:02:25.695687 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:02:25.695950 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:02:25.696256 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:02:25.696716 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 04:02:25.696959 saving as /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/nfsrootfs/full.rootfs.tar
95 04:02:25.697163 total size: 120894716 (115 MB)
96 04:02:25.697372 Using unxz to decompress xz
97 04:02:25.735660 progress 0 % (0 MB)
98 04:02:26.520209 progress 5 % (5 MB)
99 04:02:27.356292 progress 10 % (11 MB)
100 04:02:28.154672 progress 15 % (17 MB)
101 04:02:28.904916 progress 20 % (23 MB)
102 04:02:29.497804 progress 25 % (28 MB)
103 04:02:30.324607 progress 30 % (34 MB)
104 04:02:31.122534 progress 35 % (40 MB)
105 04:02:31.467472 progress 40 % (46 MB)
106 04:02:31.839130 progress 45 % (51 MB)
107 04:02:32.550513 progress 50 % (57 MB)
108 04:02:33.427117 progress 55 % (63 MB)
109 04:02:34.203659 progress 60 % (69 MB)
110 04:02:34.953574 progress 65 % (74 MB)
111 04:02:35.726509 progress 70 % (80 MB)
112 04:02:36.542006 progress 75 % (86 MB)
113 04:02:37.320746 progress 80 % (92 MB)
114 04:02:38.074181 progress 85 % (98 MB)
115 04:02:38.922082 progress 90 % (103 MB)
116 04:02:39.692934 progress 95 % (109 MB)
117 04:02:40.516541 progress 100 % (115 MB)
118 04:02:40.529039 115 MB downloaded in 14.83 s (7.77 MB/s)
119 04:02:40.529940 end: 1.4.1 http-download (duration 00:00:15) [common]
121 04:02:40.531515 end: 1.4 download-retry (duration 00:00:15) [common]
122 04:02:40.532081 start: 1.5 download-retry (timeout 00:09:44) [common]
123 04:02:40.532600 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 04:02:40.533395 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/modules.tar.xz
125 04:02:40.533848 saving as /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/modules/modules.tar
126 04:02:40.534249 total size: 11613712 (11 MB)
127 04:02:40.534663 Using unxz to decompress xz
128 04:02:40.583257 progress 0 % (0 MB)
129 04:02:40.649244 progress 5 % (0 MB)
130 04:02:40.722320 progress 10 % (1 MB)
131 04:02:40.816794 progress 15 % (1 MB)
132 04:02:40.910669 progress 20 % (2 MB)
133 04:02:40.989452 progress 25 % (2 MB)
134 04:02:41.064475 progress 30 % (3 MB)
135 04:02:41.141979 progress 35 % (3 MB)
136 04:02:41.213664 progress 40 % (4 MB)
137 04:02:41.289120 progress 45 % (5 MB)
138 04:02:41.372439 progress 50 % (5 MB)
139 04:02:41.449406 progress 55 % (6 MB)
140 04:02:41.536320 progress 60 % (6 MB)
141 04:02:41.617239 progress 65 % (7 MB)
142 04:02:41.696872 progress 70 % (7 MB)
143 04:02:41.774189 progress 75 % (8 MB)
144 04:02:41.858810 progress 80 % (8 MB)
145 04:02:41.937558 progress 85 % (9 MB)
146 04:02:42.016284 progress 90 % (9 MB)
147 04:02:42.093530 progress 95 % (10 MB)
148 04:02:42.171161 progress 100 % (11 MB)
149 04:02:42.182947 11 MB downloaded in 1.65 s (6.72 MB/s)
150 04:02:42.183546 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:02:42.185047 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:02:42.185611 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 04:02:42.186137 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 04:02:59.213845 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/957142/extract-nfsrootfs-7c3iy_rj
156 04:02:59.214460 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 04:02:59.214748 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 04:02:59.215474 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx
159 04:02:59.216036 makedir: /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin
160 04:02:59.216395 makedir: /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/tests
161 04:02:59.216710 makedir: /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/results
162 04:02:59.217042 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-add-keys
163 04:02:59.217563 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-add-sources
164 04:02:59.218061 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-background-process-start
165 04:02:59.218595 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-background-process-stop
166 04:02:59.219175 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-common-functions
167 04:02:59.219687 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-echo-ipv4
168 04:02:59.220200 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-install-packages
169 04:02:59.220742 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-installed-packages
170 04:02:59.221221 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-os-build
171 04:02:59.221684 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-probe-channel
172 04:02:59.222145 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-probe-ip
173 04:02:59.222639 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-target-ip
174 04:02:59.223135 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-target-mac
175 04:02:59.223626 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-target-storage
176 04:02:59.224130 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-test-case
177 04:02:59.224613 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-test-event
178 04:02:59.225079 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-test-feedback
179 04:02:59.225542 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-test-raise
180 04:02:59.226005 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-test-reference
181 04:02:59.226498 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-test-runner
182 04:02:59.227000 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-test-set
183 04:02:59.227469 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-test-shell
184 04:02:59.227941 Updating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-add-keys (debian)
185 04:02:59.228508 Updating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-add-sources (debian)
186 04:02:59.229005 Updating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-install-packages (debian)
187 04:02:59.229491 Updating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-installed-packages (debian)
188 04:02:59.229974 Updating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/bin/lava-os-build (debian)
189 04:02:59.230394 Creating /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/environment
190 04:02:59.230747 LAVA metadata
191 04:02:59.231005 - LAVA_JOB_ID=957142
192 04:02:59.231221 - LAVA_DISPATCHER_IP=192.168.6.2
193 04:02:59.231579 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 04:02:59.232549 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 04:02:59.232862 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 04:02:59.233070 skipped lava-vland-overlay
197 04:02:59.233309 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 04:02:59.233562 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 04:02:59.233779 skipped lava-multinode-overlay
200 04:02:59.234020 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 04:02:59.234272 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 04:02:59.234514 Loading test definitions
203 04:02:59.234785 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 04:02:59.235004 Using /lava-957142 at stage 0
205 04:02:59.236096 uuid=957142_1.6.2.4.1 testdef=None
206 04:02:59.236398 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 04:02:59.236661 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 04:02:59.238187 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 04:02:59.238965 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 04:02:59.240860 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 04:02:59.241671 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 04:02:59.243459 runner path: /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/0/tests/0_timesync-off test_uuid 957142_1.6.2.4.1
215 04:02:59.244045 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 04:02:59.244860 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 04:02:59.245084 Using /lava-957142 at stage 0
219 04:02:59.245429 Fetching tests from https://github.com/kernelci/test-definitions.git
220 04:02:59.245716 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/0/tests/1_kselftest-kvm'
221 04:03:02.667121 Running '/usr/bin/git checkout kernelci.org
222 04:03:03.114168 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/0/tests/1_kselftest-kvm/automated/linux/kselftest/kselftest.yaml
223 04:03:03.115608 uuid=957142_1.6.2.4.5 testdef=None
224 04:03:03.115944 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 04:03:03.117627 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 04:03:03.123471 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 04:03:03.125250 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 04:03:03.133079 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 04:03:03.134889 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 04:03:03.142555 runner path: /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/0/tests/1_kselftest-kvm test_uuid 957142_1.6.2.4.5
234 04:03:03.143122 BOARD='meson-sm1-s905d3-libretech-cc'
235 04:03:03.143566 BRANCH='mainline'
236 04:03:03.144033 SKIPFILE='/dev/null'
237 04:03:03.144489 SKIP_INSTALL='True'
238 04:03:03.144922 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 04:03:03.145363 TST_CASENAME=''
240 04:03:03.145796 TST_CMDFILES='kvm'
241 04:03:03.146839 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 04:03:03.148574 Creating lava-test-runner.conf files
244 04:03:03.149023 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/957142/lava-overlay-qmilggxx/lava-957142/0 for stage 0
245 04:03:03.149759 - 0_timesync-off
246 04:03:03.150271 - 1_kselftest-kvm
247 04:03:03.150953 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 04:03:03.151542 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 04:03:26.454609 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 04:03:26.455063 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 04:03:26.455327 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 04:03:26.455597 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 04:03:26.455863 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 04:03:27.147417 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 04:03:27.147891 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 04:03:27.148192 extracting modules file /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957142/extract-nfsrootfs-7c3iy_rj
257 04:03:28.501826 extracting modules file /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957142/extract-overlay-ramdisk-u6r8vah_/ramdisk
258 04:03:29.895581 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 04:03:29.896093 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 04:03:29.896379 [common] Applying overlay to NFS
261 04:03:29.896596 [common] Applying overlay /var/lib/lava/dispatcher/tmp/957142/compress-overlay-ih428ny8/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/957142/extract-nfsrootfs-7c3iy_rj
262 04:03:32.691345 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 04:03:32.691815 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 04:03:32.692134 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 04:03:32.692375 Converting downloaded kernel to a uImage
266 04:03:32.692684 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/kernel/Image /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/kernel/uImage
267 04:03:33.154505 output: Image Name:
268 04:03:33.154937 output: Created: Fri Nov 8 04:03:32 2024
269 04:03:33.155151 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 04:03:33.155360 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 04:03:33.155564 output: Load Address: 01080000
272 04:03:33.155766 output: Entry Point: 01080000
273 04:03:33.155964 output:
274 04:03:33.156342 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 04:03:33.156615 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 04:03:33.156889 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 04:03:33.157146 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 04:03:33.157408 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 04:03:33.157665 Building ramdisk /var/lib/lava/dispatcher/tmp/957142/extract-overlay-ramdisk-u6r8vah_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/957142/extract-overlay-ramdisk-u6r8vah_/ramdisk
280 04:03:35.303834 >> 166825 blocks
281 04:03:43.055567 Adding RAMdisk u-boot header.
282 04:03:43.056342 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/957142/extract-overlay-ramdisk-u6r8vah_/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/957142/extract-overlay-ramdisk-u6r8vah_/ramdisk.cpio.gz.uboot
283 04:03:43.349703 output: Image Name:
284 04:03:43.350119 output: Created: Fri Nov 8 04:03:43 2024
285 04:03:43.350331 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 04:03:43.350538 output: Data Size: 23431595 Bytes = 22882.42 KiB = 22.35 MiB
287 04:03:43.350742 output: Load Address: 00000000
288 04:03:43.350943 output: Entry Point: 00000000
289 04:03:43.351143 output:
290 04:03:43.351729 rename /var/lib/lava/dispatcher/tmp/957142/extract-overlay-ramdisk-u6r8vah_/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/ramdisk/ramdisk.cpio.gz.uboot
291 04:03:43.352266 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 04:03:43.352825 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 04:03:43.353386 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 04:03:43.353838 No LXC device requested
295 04:03:43.354334 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 04:03:43.354846 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 04:03:43.355340 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 04:03:43.355749 Checking files for TFTP limit of 4294967296 bytes.
299 04:03:43.358421 end: 1 tftp-deploy (duration 00:01:18) [common]
300 04:03:43.358988 start: 2 uboot-action (timeout 00:05:00) [common]
301 04:03:43.359511 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 04:03:43.360034 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 04:03:43.360548 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 04:03:43.361074 Using kernel file from prepare-kernel: 957142/tftp-deploy-ub47e86a/kernel/uImage
305 04:03:43.361704 substitutions:
306 04:03:43.362115 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 04:03:43.362524 - {DTB_ADDR}: 0x01070000
308 04:03:43.362927 - {DTB}: 957142/tftp-deploy-ub47e86a/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 04:03:43.363331 - {INITRD}: 957142/tftp-deploy-ub47e86a/ramdisk/ramdisk.cpio.gz.uboot
310 04:03:43.363732 - {KERNEL_ADDR}: 0x01080000
311 04:03:43.364171 - {KERNEL}: 957142/tftp-deploy-ub47e86a/kernel/uImage
312 04:03:43.364575 - {LAVA_MAC}: None
313 04:03:43.365007 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/957142/extract-nfsrootfs-7c3iy_rj
314 04:03:43.365410 - {NFS_SERVER_IP}: 192.168.6.2
315 04:03:43.365803 - {PRESEED_CONFIG}: None
316 04:03:43.366194 - {PRESEED_LOCAL}: None
317 04:03:43.366584 - {RAMDISK_ADDR}: 0x08000000
318 04:03:43.366972 - {RAMDISK}: 957142/tftp-deploy-ub47e86a/ramdisk/ramdisk.cpio.gz.uboot
319 04:03:43.367361 - {ROOT_PART}: None
320 04:03:43.367750 - {ROOT}: None
321 04:03:43.368166 - {SERVER_IP}: 192.168.6.2
322 04:03:43.368556 - {TEE_ADDR}: 0x83000000
323 04:03:43.368941 - {TEE}: None
324 04:03:43.369327 Parsed boot commands:
325 04:03:43.369707 - setenv autoload no
326 04:03:43.370096 - setenv initrd_high 0xffffffff
327 04:03:43.370496 - setenv fdt_high 0xffffffff
328 04:03:43.370882 - dhcp
329 04:03:43.371265 - setenv serverip 192.168.6.2
330 04:03:43.371656 - tftpboot 0x01080000 957142/tftp-deploy-ub47e86a/kernel/uImage
331 04:03:43.372074 - tftpboot 0x08000000 957142/tftp-deploy-ub47e86a/ramdisk/ramdisk.cpio.gz.uboot
332 04:03:43.372469 - tftpboot 0x01070000 957142/tftp-deploy-ub47e86a/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 04:03:43.372862 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/957142/extract-nfsrootfs-7c3iy_rj,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 04:03:43.373264 - bootm 0x01080000 0x08000000 0x01070000
335 04:03:43.373756 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 04:03:43.375238 start: 2.3 connect-device (timeout 00:05:00) [common]
338 04:03:43.375652 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 04:03:43.391060 Setting prompt string to ['lava-test: # ']
340 04:03:43.392617 end: 2.3 connect-device (duration 00:00:00) [common]
341 04:03:43.393227 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 04:03:43.393801 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 04:03:43.394333 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 04:03:43.395682 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 04:03:43.456764 >> OK - accepted request
346 04:03:43.460068 Returned 0 in 0 seconds
347 04:03:43.561209 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 04:03:43.562808 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 04:03:43.563354 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 04:03:43.563857 Setting prompt string to ['Hit any key to stop autoboot']
352 04:03:43.564355 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 04:03:43.565939 Trying 192.168.56.21...
354 04:03:43.566432 Connected to conserv1.
355 04:03:43.566842 Escape character is '^]'.
356 04:03:43.567253
357 04:03:43.567675 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 04:03:43.568119
359 04:03:50.578770 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 04:03:50.579397 bl2_stage_init 0x01
361 04:03:50.579826 bl2_stage_init 0x81
362 04:03:50.584427 hw id: 0x0000 - pwm id 0x01
363 04:03:50.584914 bl2_stage_init 0xc1
364 04:03:50.589896 bl2_stage_init 0x02
365 04:03:50.590381
366 04:03:50.590813 L0:00000000
367 04:03:50.591230 L1:00000703
368 04:03:50.591640 L2:00008067
369 04:03:50.592081 L3:15000000
370 04:03:50.595509 S1:00000000
371 04:03:50.595977 B2:20282000
372 04:03:50.596423 B1:a0f83180
373 04:03:50.596817
374 04:03:50.597210 TE: 68455
375 04:03:50.597602
376 04:03:50.601101 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 04:03:50.601558
378 04:03:50.606701 Board ID = 1
379 04:03:50.607149 Set cpu clk to 24M
380 04:03:50.607542 Set clk81 to 24M
381 04:03:50.612368 Use GP1_pll as DSU clk.
382 04:03:50.612822 DSU clk: 1200 Mhz
383 04:03:50.613214 CPU clk: 1200 MHz
384 04:03:50.617770 Set clk81 to 166.6M
385 04:03:50.623520 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 04:03:50.624174 board id: 1
387 04:03:50.630594 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 04:03:50.641237 fw parse done
389 04:03:50.647137 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 04:03:50.689759 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 04:03:50.700696 PIEI prepare done
392 04:03:50.701140 fastboot data load
393 04:03:50.701537 fastboot data verify
394 04:03:50.706334 verify result: 266
395 04:03:50.711897 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 04:03:50.712389 LPDDR4 probe
397 04:03:50.712788 ddr clk to 1584MHz
398 04:03:50.719886 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 04:03:50.757156
400 04:03:50.757617 dmc_version 0001
401 04:03:50.763881 Check phy result
402 04:03:50.769770 INFO : End of CA training
403 04:03:50.770233 INFO : End of initialization
404 04:03:50.775332 INFO : Training has run successfully!
405 04:03:50.775925 Check phy result
406 04:03:50.781017 INFO : End of initialization
407 04:03:50.781465 INFO : End of read enable training
408 04:03:50.786552 INFO : End of fine write leveling
409 04:03:50.792230 INFO : End of Write leveling coarse delay
410 04:03:50.792766 INFO : Training has run successfully!
411 04:03:50.793230 Check phy result
412 04:03:50.797693 INFO : End of initialization
413 04:03:50.798149 INFO : End of read dq deskew training
414 04:03:50.803238 INFO : End of MPR read delay center optimization
415 04:03:50.808879 INFO : End of write delay center optimization
416 04:03:50.814467 INFO : End of read delay center optimization
417 04:03:50.814895 INFO : End of max read latency training
418 04:03:50.820098 INFO : Training has run successfully!
419 04:03:50.820544 1D training succeed
420 04:03:50.829325 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 04:03:50.876854 Check phy result
422 04:03:50.877324 INFO : End of initialization
423 04:03:50.899319 INFO : End of 2D read delay Voltage center optimization
424 04:03:50.917344 INFO : End of 2D read delay Voltage center optimization
425 04:03:50.970256 INFO : End of 2D write delay Voltage center optimization
426 04:03:51.019538 INFO : End of 2D write delay Voltage center optimization
427 04:03:51.025104 INFO : Training has run successfully!
428 04:03:51.025632
429 04:03:51.026058 channel==0
430 04:03:51.030619 RxClkDly_Margin_A0==78 ps 8
431 04:03:51.031152 TxDqDly_Margin_A0==98 ps 10
432 04:03:51.036314 RxClkDly_Margin_A1==88 ps 9
433 04:03:51.036770 TxDqDly_Margin_A1==88 ps 9
434 04:03:51.037182 TrainedVREFDQ_A0==74
435 04:03:51.041821 TrainedVREFDQ_A1==75
436 04:03:51.042266 VrefDac_Margin_A0==24
437 04:03:51.042674 DeviceVref_Margin_A0==40
438 04:03:51.047424 VrefDac_Margin_A1==23
439 04:03:51.047866 DeviceVref_Margin_A1==39
440 04:03:51.048317
441 04:03:51.048721
442 04:03:51.049117 channel==1
443 04:03:51.053079 RxClkDly_Margin_A0==78 ps 8
444 04:03:51.053530 TxDqDly_Margin_A0==98 ps 10
445 04:03:51.058668 RxClkDly_Margin_A1==78 ps 8
446 04:03:51.059110 TxDqDly_Margin_A1==88 ps 9
447 04:03:51.064312 TrainedVREFDQ_A0==75
448 04:03:51.064757 TrainedVREFDQ_A1==77
449 04:03:51.065160 VrefDac_Margin_A0==22
450 04:03:51.069747 DeviceVref_Margin_A0==39
451 04:03:51.070192 VrefDac_Margin_A1==22
452 04:03:51.075328 DeviceVref_Margin_A1==37
453 04:03:51.075765
454 04:03:51.076214 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 04:03:51.076619
456 04:03:51.108999 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 04:03:51.109537 2D training succeed
458 04:03:51.114546 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 04:03:51.120245 auto size-- 65535DDR cs0 size: 2048MB
460 04:03:51.120686 DDR cs1 size: 2048MB
461 04:03:51.125751 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 04:03:51.126193 cs0 DataBus test pass
463 04:03:51.131330 cs1 DataBus test pass
464 04:03:51.131766 cs0 AddrBus test pass
465 04:03:51.132224 cs1 AddrBus test pass
466 04:03:51.132633
467 04:03:51.136990 100bdlr_step_size ps== 478
468 04:03:51.137436 result report
469 04:03:51.142529 boot times 0Enable ddr reg access
470 04:03:51.147735 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 04:03:51.161552 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 04:03:51.816173 bl2z: ptr: 05129330, size: 00001e40
473 04:03:51.822249 0.0;M3 CHK:0;cm4_sp_mode 0
474 04:03:51.822754 MVN_1=0x00000000
475 04:03:51.823175 MVN_2=0x00000000
476 04:03:51.833798 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 04:03:51.834303 OPS=0x04
478 04:03:51.834727 ring efuse init
479 04:03:51.836677 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 04:03:51.842971 [0.017318 Inits done]
481 04:03:51.843416 secure task start!
482 04:03:51.843831 high task start!
483 04:03:51.844278 low task start!
484 04:03:51.846413 run into bl31
485 04:03:51.855868 NOTICE: BL31: v1.3(release):4fc40b1
486 04:03:51.863745 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 04:03:51.864234 NOTICE: BL31: G12A normal boot!
488 04:03:51.879212 NOTICE: BL31: BL33 decompress pass
489 04:03:51.884985 ERROR: Error initializing runtime service opteed_fast
490 04:03:54.627115 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 04:03:54.627753 bl2_stage_init 0x01
492 04:03:54.628255 bl2_stage_init 0x81
493 04:03:54.632584 hw id: 0x0000 - pwm id 0x01
494 04:03:54.633083 bl2_stage_init 0xc1
495 04:03:54.638288 bl2_stage_init 0x02
496 04:03:54.638814
497 04:03:54.639218 L0:00000000
498 04:03:54.639613 L1:00000703
499 04:03:54.640042 L2:00008067
500 04:03:54.640437 L3:15000000
501 04:03:54.643798 S1:00000000
502 04:03:54.644252 B2:20282000
503 04:03:54.644641 B1:a0f83180
504 04:03:54.645022
505 04:03:54.645409 TE: 68329
506 04:03:54.645791
507 04:03:54.649417 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 04:03:54.649840
509 04:03:54.654939 Board ID = 1
510 04:03:54.655364 Set cpu clk to 24M
511 04:03:54.655754 Set clk81 to 24M
512 04:03:54.660574 Use GP1_pll as DSU clk.
513 04:03:54.661006 DSU clk: 1200 Mhz
514 04:03:54.661398 CPU clk: 1200 MHz
515 04:03:54.666242 Set clk81 to 166.6M
516 04:03:54.671805 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 04:03:54.672266 board id: 1
518 04:03:54.678921 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 04:03:54.689593 fw parse done
520 04:03:54.695557 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 04:03:54.737939 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 04:03:54.749042 PIEI prepare done
523 04:03:54.749523 fastboot data load
524 04:03:54.749917 fastboot data verify
525 04:03:54.754746 verify result: 266
526 04:03:54.760272 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 04:03:54.760698 LPDDR4 probe
528 04:03:54.761087 ddr clk to 1584MHz
529 04:03:54.768249 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 04:03:54.805547
531 04:03:54.805967 dmc_version 0001
532 04:03:54.812253 Check phy result
533 04:03:54.818191 INFO : End of CA training
534 04:03:54.818723 INFO : End of initialization
535 04:03:54.823786 INFO : Training has run successfully!
536 04:03:54.824293 Check phy result
537 04:03:54.829318 INFO : End of initialization
538 04:03:54.829775 INFO : End of read enable training
539 04:03:54.834902 INFO : End of fine write leveling
540 04:03:54.840548 INFO : End of Write leveling coarse delay
541 04:03:54.841033 INFO : Training has run successfully!
542 04:03:54.841459 Check phy result
543 04:03:54.846167 INFO : End of initialization
544 04:03:54.846609 INFO : End of read dq deskew training
545 04:03:54.851777 INFO : End of MPR read delay center optimization
546 04:03:54.857355 INFO : End of write delay center optimization
547 04:03:54.862926 INFO : End of read delay center optimization
548 04:03:54.863365 INFO : End of max read latency training
549 04:03:54.868552 INFO : Training has run successfully!
550 04:03:54.868989 1D training succeed
551 04:03:54.877880 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 04:03:54.925220 Check phy result
553 04:03:54.925692 INFO : End of initialization
554 04:03:54.947560 INFO : End of 2D read delay Voltage center optimization
555 04:03:54.966809 INFO : End of 2D read delay Voltage center optimization
556 04:03:55.018617 INFO : End of 2D write delay Voltage center optimization
557 04:03:55.067862 INFO : End of 2D write delay Voltage center optimization
558 04:03:55.073337 INFO : Training has run successfully!
559 04:03:55.073789
560 04:03:55.074208 channel==0
561 04:03:55.078942 RxClkDly_Margin_A0==88 ps 9
562 04:03:55.079390 TxDqDly_Margin_A0==88 ps 9
563 04:03:55.084532 RxClkDly_Margin_A1==88 ps 9
564 04:03:55.084971 TxDqDly_Margin_A1==88 ps 9
565 04:03:55.085384 TrainedVREFDQ_A0==74
566 04:03:55.090155 TrainedVREFDQ_A1==74
567 04:03:55.090609 VrefDac_Margin_A0==23
568 04:03:55.091025 DeviceVref_Margin_A0==40
569 04:03:55.095756 VrefDac_Margin_A1==22
570 04:03:55.096228 DeviceVref_Margin_A1==40
571 04:03:55.096639
572 04:03:55.097041
573 04:03:55.097445 channel==1
574 04:03:55.101358 RxClkDly_Margin_A0==78 ps 8
575 04:03:55.101809 TxDqDly_Margin_A0==98 ps 10
576 04:03:55.106921 RxClkDly_Margin_A1==78 ps 8
577 04:03:55.107360 TxDqDly_Margin_A1==88 ps 9
578 04:03:55.112533 TrainedVREFDQ_A0==78
579 04:03:55.113000 TrainedVREFDQ_A1==75
580 04:03:55.113416 VrefDac_Margin_A0==23
581 04:03:55.118141 DeviceVref_Margin_A0==36
582 04:03:55.118592 VrefDac_Margin_A1==22
583 04:03:55.119005 DeviceVref_Margin_A1==39
584 04:03:55.123758
585 04:03:55.124229 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 04:03:55.124644
587 04:03:55.157343 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
588 04:03:55.157813 2D training succeed
589 04:03:55.162928 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 04:03:55.168528 auto size-- 65535DDR cs0 size: 2048MB
591 04:03:55.168969 DDR cs1 size: 2048MB
592 04:03:55.174134 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 04:03:55.174575 cs0 DataBus test pass
594 04:03:55.179781 cs1 DataBus test pass
595 04:03:55.180307 cs0 AddrBus test pass
596 04:03:55.180732 cs1 AddrBus test pass
597 04:03:55.181140
598 04:03:55.185348 100bdlr_step_size ps== 478
599 04:03:55.185806 result report
600 04:03:55.190934 boot times 0Enable ddr reg access
601 04:03:55.196044 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 04:03:55.209830 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 04:03:55.864556 bl2z: ptr: 05129330, size: 00001e40
604 04:03:55.872619 0.0;M3 CHK:0;cm4_sp_mode 0
605 04:03:55.873114 MVN_1=0x00000000
606 04:03:55.873539 MVN_2=0x00000000
607 04:03:55.884103 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 04:03:55.884610 OPS=0x04
609 04:03:55.885035 ring efuse init
610 04:03:55.889666 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 04:03:55.890135 [0.017319 Inits done]
612 04:03:55.890551 secure task start!
613 04:03:55.897494 high task start!
614 04:03:55.897940 low task start!
615 04:03:55.898352 run into bl31
616 04:03:55.906102 NOTICE: BL31: v1.3(release):4fc40b1
617 04:03:55.913941 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 04:03:55.914388 NOTICE: BL31: G12A normal boot!
619 04:03:55.929475 NOTICE: BL31: BL33 decompress pass
620 04:03:55.934263 ERROR: Error initializing runtime service opteed_fast
621 04:03:57.179355 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 04:03:57.179968 bl2_stage_init 0x01
623 04:03:57.180458 bl2_stage_init 0x81
624 04:03:57.185044 hw id: 0x0000 - pwm id 0x01
625 04:03:57.185505 bl2_stage_init 0xc1
626 04:03:57.190516 bl2_stage_init 0x02
627 04:03:57.190966
628 04:03:57.191385 L0:00000000
629 04:03:57.191793 L1:00000703
630 04:03:57.192232 L2:00008067
631 04:03:57.192634 L3:15000000
632 04:03:57.196119 S1:00000000
633 04:03:57.196573 B2:20282000
634 04:03:57.196982 B1:a0f83180
635 04:03:57.197383
636 04:03:57.197784 TE: 69268
637 04:03:57.198183
638 04:03:57.201691 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 04:03:57.202137
640 04:03:57.207288 Board ID = 1
641 04:03:57.207728 Set cpu clk to 24M
642 04:03:57.208178 Set clk81 to 24M
643 04:03:57.212917 Use GP1_pll as DSU clk.
644 04:03:57.213360 DSU clk: 1200 Mhz
645 04:03:57.213770 CPU clk: 1200 MHz
646 04:03:57.218504 Set clk81 to 166.6M
647 04:03:57.224112 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 04:03:57.224562 board id: 1
649 04:03:57.231286 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 04:03:57.242183 fw parse done
651 04:03:57.248176 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 04:03:57.291304 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 04:03:57.302394 PIEI prepare done
654 04:03:57.302840 fastboot data load
655 04:03:57.303254 fastboot data verify
656 04:03:57.308069 verify result: 266
657 04:03:57.313574 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 04:03:57.314014 LPDDR4 probe
659 04:03:57.314432 ddr clk to 1584MHz
660 04:03:57.321540 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 04:03:57.359292
662 04:03:57.359738 dmc_version 0001
663 04:03:57.366304 Check phy result
664 04:03:57.372356 INFO : End of CA training
665 04:03:57.372838 INFO : End of initialization
666 04:03:57.377910 INFO : Training has run successfully!
667 04:03:57.378356 Check phy result
668 04:03:57.383517 INFO : End of initialization
669 04:03:57.383965 INFO : End of read enable training
670 04:03:57.389113 INFO : End of fine write leveling
671 04:03:57.394701 INFO : End of Write leveling coarse delay
672 04:03:57.395137 INFO : Training has run successfully!
673 04:03:57.395551 Check phy result
674 04:03:57.400347 INFO : End of initialization
675 04:03:57.400884 INFO : End of read dq deskew training
676 04:03:57.405921 INFO : End of MPR read delay center optimization
677 04:03:57.411510 INFO : End of write delay center optimization
678 04:03:57.417131 INFO : End of read delay center optimization
679 04:03:57.417601 INFO : End of max read latency training
680 04:03:57.422698 INFO : Training has run successfully!
681 04:03:57.423149 1D training succeed
682 04:03:57.431864 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 04:03:57.480238 Check phy result
684 04:03:57.480694 INFO : End of initialization
685 04:03:57.507651 INFO : End of 2D read delay Voltage center optimization
686 04:03:57.531751 INFO : End of 2D read delay Voltage center optimization
687 04:03:57.588458 INFO : End of 2D write delay Voltage center optimization
688 04:03:57.642449 INFO : End of 2D write delay Voltage center optimization
689 04:03:57.648141 INFO : Training has run successfully!
690 04:03:57.648586
691 04:03:57.649002 channel==0
692 04:03:57.653609 RxClkDly_Margin_A0==78 ps 8
693 04:03:57.654054 TxDqDly_Margin_A0==88 ps 9
694 04:03:57.659235 RxClkDly_Margin_A1==88 ps 9
695 04:03:57.659671 TxDqDly_Margin_A1==98 ps 10
696 04:03:57.660132 TrainedVREFDQ_A0==74
697 04:03:57.664850 TrainedVREFDQ_A1==75
698 04:03:57.665290 VrefDac_Margin_A0==24
699 04:03:57.665695 DeviceVref_Margin_A0==40
700 04:03:57.670405 VrefDac_Margin_A1==22
701 04:03:57.670840 DeviceVref_Margin_A1==39
702 04:03:57.671245
703 04:03:57.671649
704 04:03:57.672084 channel==1
705 04:03:57.676163 RxClkDly_Margin_A0==88 ps 9
706 04:03:57.676682 TxDqDly_Margin_A0==88 ps 9
707 04:03:57.681591 RxClkDly_Margin_A1==78 ps 8
708 04:03:57.682047 TxDqDly_Margin_A1==98 ps 10
709 04:03:57.687253 TrainedVREFDQ_A0==76
710 04:03:57.687766 TrainedVREFDQ_A1==78
711 04:03:57.688228 VrefDac_Margin_A0==22
712 04:03:57.692845 DeviceVref_Margin_A0==38
713 04:03:57.693287 VrefDac_Margin_A1==22
714 04:03:57.698411 DeviceVref_Margin_A1==36
715 04:03:57.698850
716 04:03:57.699256 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 04:03:57.699662
718 04:03:57.732137 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
719 04:03:57.732661 2D training succeed
720 04:03:57.737630 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 04:03:57.743203 auto size-- 65535DDR cs0 size: 2048MB
722 04:03:57.743667 DDR cs1 size: 2048MB
723 04:03:57.748864 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 04:03:57.749319 cs0 DataBus test pass
725 04:03:57.754414 cs1 DataBus test pass
726 04:03:57.754875 cs0 AddrBus test pass
727 04:03:57.755287 cs1 AddrBus test pass
728 04:03:57.755689
729 04:03:57.760148 100bdlr_step_size ps== 485
730 04:03:57.760600 result report
731 04:03:57.765615 boot times 0Enable ddr reg access
732 04:03:57.770786 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 04:03:57.784689 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 04:03:58.444155 bl2z: ptr: 05129330, size: 00001e40
735 04:03:58.453235 0.0;M3 CHK:0;cm4_sp_mode 0
736 04:03:58.453736 MVN_1=0x00000000
737 04:03:58.454162 MVN_2=0x00000000
738 04:03:58.464623 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 04:03:58.465121 OPS=0x04
740 04:03:58.465545 ring efuse init
741 04:03:58.467546 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 04:03:58.474026 [0.017354 Inits done]
743 04:03:58.474503 secure task start!
744 04:03:58.474920 high task start!
745 04:03:58.475323 low task start!
746 04:03:58.477529 run into bl31
747 04:03:58.486947 NOTICE: BL31: v1.3(release):4fc40b1
748 04:03:58.494720 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 04:03:58.495222 NOTICE: BL31: G12A normal boot!
750 04:03:58.510289 NOTICE: BL31: BL33 decompress pass
751 04:03:58.515960 ERROR: Error initializing runtime service opteed_fast
752 04:03:59.311505
753 04:03:59.312147
754 04:03:59.316789 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 04:03:59.317304
756 04:03:59.320282 Model: Libre Computer AML-S905D3-CC Solitude
757 04:03:59.467366 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 04:03:59.482696 DRAM: 2 GiB (effective 3.8 GiB)
759 04:03:59.583652 Core: 406 devices, 33 uclasses, devicetree: separate
760 04:03:59.589531 WDT: Not starting watchdog@f0d0
761 04:03:59.614628 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 04:03:59.626835 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 04:03:59.631823 ** Bad device specification mmc 0 **
764 04:03:59.641931 Card did not respond to voltage select! : -110
765 04:03:59.649558 ** Bad device specification mmc 0 **
766 04:03:59.650129 Couldn't find partition mmc 0
767 04:03:59.657866 Card did not respond to voltage select! : -110
768 04:03:59.663383 ** Bad device specification mmc 0 **
769 04:03:59.663859 Couldn't find partition mmc 0
770 04:03:59.668453 Error: could not access storage.
771 04:03:59.964235 Net: eth0: ethernet@ff3f0000
772 04:03:59.964798 starting USB...
773 04:04:00.209904 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 04:04:00.210521 Starting the controller
775 04:04:00.215847 USB XHCI 1.10
776 04:04:01.770852 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 04:04:01.779056 scanning usb for storage devices... 0 Storage Device(s) found
779 04:04:01.830815 Hit any key to stop autoboot: 1
780 04:04:01.831740 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
781 04:04:01.832471 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
782 04:04:01.833036 Setting prompt string to ['=>']
783 04:04:01.833582 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
784 04:04:01.845022 0
785 04:04:01.846007 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 04:04:01.947354 => setenv autoload no
788 04:04:01.948066 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 04:04:01.953384 setenv autoload no
791 04:04:02.054968 => setenv initrd_high 0xffffffff
792 04:04:02.056148 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 04:04:02.060102 setenv initrd_high 0xffffffff
795 04:04:02.161625 => setenv fdt_high 0xffffffff
796 04:04:02.162372 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 04:04:02.166781 setenv fdt_high 0xffffffff
799 04:04:02.268240 => dhcp
800 04:04:02.268887 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
801 04:04:02.272869 dhcp
802 04:04:02.928401 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
803 04:04:02.928997 Speed: 1000, full duplex
804 04:04:02.929410 BOOTP broadcast 1
805 04:04:02.949508 DHCP client bound to address 192.168.6.21 (20 ms)
807 04:04:03.050904 => setenv serverip 192.168.6.2
808 04:04:03.051593 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
809 04:04:03.055847 setenv serverip 192.168.6.2
811 04:04:03.157524 => tftpboot 0x01080000 957142/tftp-deploy-ub47e86a/kernel/uImage
812 04:04:03.158345 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
813 04:04:03.166670 tftpboot 0x01080000 957142/tftp-deploy-ub47e86a/kernel/uImage
814 04:04:03.167202 Speed: 1000, full duplex
815 04:04:03.167613 Using ethernet@ff3f0000 device
816 04:04:03.170575 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
817 04:04:03.176154 Filename '957142/tftp-deploy-ub47e86a/kernel/uImage'.
818 04:04:03.180194 Load address: 0x1080000
819 04:04:06.025139 Loading: *################################################## 43.6 MiB
820 04:04:06.025778 15.3 MiB/s
821 04:04:06.026188 done
822 04:04:06.029592 Bytes transferred = 45713984 (2b98a40 hex)
824 04:04:06.131108 => tftpboot 0x08000000 957142/tftp-deploy-ub47e86a/ramdisk/ramdisk.cpio.gz.uboot
825 04:04:06.131794 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
826 04:04:06.138412 tftpboot 0x08000000 957142/tftp-deploy-ub47e86a/ramdisk/ramdisk.cpio.gz.uboot
827 04:04:06.138883 Speed: 1000, full duplex
828 04:04:06.139275 Using ethernet@ff3f0000 device
829 04:04:06.143918 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
830 04:04:06.152806 Filename '957142/tftp-deploy-ub47e86a/ramdisk/ramdisk.cpio.gz.uboot'.
831 04:04:06.153279 Load address: 0x8000000
832 04:04:07.789393 Loading: *################################################# UDP wrong checksum 00000005 0000b569
833 04:04:12.791055 T UDP wrong checksum 00000005 0000b569
834 04:04:22.793240 T T UDP wrong checksum 00000005 0000b569
835 04:04:42.797301 T T T T UDP wrong checksum 00000005 0000b569
836 04:04:43.338683 UDP wrong checksum 000000ff 000009ed
837 04:04:43.377973 UDP wrong checksum 000000ff 0000a5df
838 04:05:02.802211 T T T
839 04:05:02.802854 Retry count exceeded; starting again
841 04:05:02.804344 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
844 04:05:02.806221 end: 2.4 uboot-commands (duration 00:01:19) [common]
846 04:05:02.807595 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
848 04:05:02.808653 end: 2 uboot-action (duration 00:01:19) [common]
850 04:05:02.810147 Cleaning after the job
851 04:05:02.810686 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/ramdisk
852 04:05:02.812143 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/kernel
853 04:05:02.855589 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/dtb
854 04:05:02.856363 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/nfsrootfs
855 04:05:03.033577 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957142/tftp-deploy-ub47e86a/modules
856 04:05:03.054892 start: 4.1 power-off (timeout 00:00:30) [common]
857 04:05:03.055556 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
858 04:05:03.089360 >> OK - accepted request
859 04:05:03.091398 Returned 0 in 0 seconds
860 04:05:03.192144 end: 4.1 power-off (duration 00:00:00) [common]
862 04:05:03.193037 start: 4.2 read-feedback (timeout 00:10:00) [common]
863 04:05:03.193658 Listened to connection for namespace 'common' for up to 1s
864 04:05:04.194596 Finalising connection for namespace 'common'
865 04:05:04.195086 Disconnecting from shell: Finalise
866 04:05:04.195374 =>
867 04:05:04.296120 end: 4.2 read-feedback (duration 00:00:01) [common]
868 04:05:04.296582 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/957142
869 04:05:07.349893 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/957142
870 04:05:07.350517 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.