Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:21:03.296302 lava-dispatcher, installed at version: 2024.01
2 03:21:03.297066 start: 0 validate
3 03:21:03.297539 Start time: 2024-11-08 03:21:03.297507+00:00 (UTC)
4 03:21:03.298086 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:21:03.298632 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:21:03.336631 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:21:03.337166 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 03:21:03.366275 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:21:03.366885 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 03:21:03.398659 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:21:03.399165 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:21:03.429756 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:21:03.430273 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 03:21:03.469035 validate duration: 0.17
16 03:21:03.469872 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:21:03.470190 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:21:03.470506 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:21:03.471090 Not decompressing ramdisk as can be used compressed.
20 03:21:03.471531 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 03:21:03.471812 saving as /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/ramdisk/initrd.cpio.gz
22 03:21:03.472111 total size: 5628169 (5 MB)
23 03:21:03.509701 progress 0 % (0 MB)
24 03:21:03.517377 progress 5 % (0 MB)
25 03:21:03.525067 progress 10 % (0 MB)
26 03:21:03.531880 progress 15 % (0 MB)
27 03:21:03.539508 progress 20 % (1 MB)
28 03:21:03.543354 progress 25 % (1 MB)
29 03:21:03.547279 progress 30 % (1 MB)
30 03:21:03.551261 progress 35 % (1 MB)
31 03:21:03.554806 progress 40 % (2 MB)
32 03:21:03.558757 progress 45 % (2 MB)
33 03:21:03.562377 progress 50 % (2 MB)
34 03:21:03.566319 progress 55 % (2 MB)
35 03:21:03.570292 progress 60 % (3 MB)
36 03:21:03.573804 progress 65 % (3 MB)
37 03:21:03.577684 progress 70 % (3 MB)
38 03:21:03.581226 progress 75 % (4 MB)
39 03:21:03.585122 progress 80 % (4 MB)
40 03:21:03.588630 progress 85 % (4 MB)
41 03:21:03.592488 progress 90 % (4 MB)
42 03:21:03.596034 progress 95 % (5 MB)
43 03:21:03.599198 progress 100 % (5 MB)
44 03:21:03.599821 5 MB downloaded in 0.13 s (42.03 MB/s)
45 03:21:03.600370 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:21:03.601248 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:21:03.601533 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:21:03.601799 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:21:03.602280 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/kernel/Image
51 03:21:03.602521 saving as /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/kernel/Image
52 03:21:03.602731 total size: 45713920 (43 MB)
53 03:21:03.602939 No compression specified
54 03:21:03.639347 progress 0 % (0 MB)
55 03:21:03.667509 progress 5 % (2 MB)
56 03:21:03.696122 progress 10 % (4 MB)
57 03:21:03.724593 progress 15 % (6 MB)
58 03:21:03.753059 progress 20 % (8 MB)
59 03:21:03.781030 progress 25 % (10 MB)
60 03:21:03.809321 progress 30 % (13 MB)
61 03:21:03.837892 progress 35 % (15 MB)
62 03:21:03.866246 progress 40 % (17 MB)
63 03:21:03.894368 progress 45 % (19 MB)
64 03:21:03.923376 progress 50 % (21 MB)
65 03:21:03.951837 progress 55 % (24 MB)
66 03:21:03.980316 progress 60 % (26 MB)
67 03:21:04.008354 progress 65 % (28 MB)
68 03:21:04.037118 progress 70 % (30 MB)
69 03:21:04.065602 progress 75 % (32 MB)
70 03:21:04.094049 progress 80 % (34 MB)
71 03:21:04.122290 progress 85 % (37 MB)
72 03:21:04.150668 progress 90 % (39 MB)
73 03:21:04.179164 progress 95 % (41 MB)
74 03:21:04.206825 progress 100 % (43 MB)
75 03:21:04.207343 43 MB downloaded in 0.60 s (72.11 MB/s)
76 03:21:04.207811 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:21:04.208656 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:21:04.208933 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:21:04.209199 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:21:04.209670 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 03:21:04.209936 saving as /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/dtb/meson-g12b-a311d-libretech-cc.dtb
83 03:21:04.210144 total size: 54703 (0 MB)
84 03:21:04.210352 No compression specified
85 03:21:04.245529 progress 59 % (0 MB)
86 03:21:04.246365 progress 100 % (0 MB)
87 03:21:04.246908 0 MB downloaded in 0.04 s (1.42 MB/s)
88 03:21:04.247384 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:21:04.248237 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:21:04.248502 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:21:04.248764 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:21:04.249218 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 03:21:04.249456 saving as /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/nfsrootfs/full.rootfs.tar
95 03:21:04.249659 total size: 120894716 (115 MB)
96 03:21:04.249869 Using unxz to decompress xz
97 03:21:04.284135 progress 0 % (0 MB)
98 03:21:05.076143 progress 5 % (5 MB)
99 03:21:05.917649 progress 10 % (11 MB)
100 03:21:06.709316 progress 15 % (17 MB)
101 03:21:07.441657 progress 20 % (23 MB)
102 03:21:08.037300 progress 25 % (28 MB)
103 03:21:08.867463 progress 30 % (34 MB)
104 03:21:09.661425 progress 35 % (40 MB)
105 03:21:10.029202 progress 40 % (46 MB)
106 03:21:10.439111 progress 45 % (51 MB)
107 03:21:11.146591 progress 50 % (57 MB)
108 03:21:12.023549 progress 55 % (63 MB)
109 03:21:12.799812 progress 60 % (69 MB)
110 03:21:13.553298 progress 65 % (74 MB)
111 03:21:14.334431 progress 70 % (80 MB)
112 03:21:15.160002 progress 75 % (86 MB)
113 03:21:15.939487 progress 80 % (92 MB)
114 03:21:16.712417 progress 85 % (98 MB)
115 03:21:17.556946 progress 90 % (103 MB)
116 03:21:18.321822 progress 95 % (109 MB)
117 03:21:19.156627 progress 100 % (115 MB)
118 03:21:19.169086 115 MB downloaded in 14.92 s (7.73 MB/s)
119 03:21:19.169648 end: 1.4.1 http-download (duration 00:00:15) [common]
121 03:21:19.170472 end: 1.4 download-retry (duration 00:00:15) [common]
122 03:21:19.170739 start: 1.5 download-retry (timeout 00:09:44) [common]
123 03:21:19.171001 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 03:21:19.171447 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/modules.tar.xz
125 03:21:19.171689 saving as /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/modules/modules.tar
126 03:21:19.171893 total size: 11613712 (11 MB)
127 03:21:19.172251 Using unxz to decompress xz
128 03:21:19.219005 progress 0 % (0 MB)
129 03:21:19.284893 progress 5 % (0 MB)
130 03:21:19.357938 progress 10 % (1 MB)
131 03:21:19.452882 progress 15 % (1 MB)
132 03:21:19.544481 progress 20 % (2 MB)
133 03:21:19.623368 progress 25 % (2 MB)
134 03:21:19.698118 progress 30 % (3 MB)
135 03:21:19.775424 progress 35 % (3 MB)
136 03:21:19.846903 progress 40 % (4 MB)
137 03:21:19.922120 progress 45 % (5 MB)
138 03:21:20.005320 progress 50 % (5 MB)
139 03:21:20.083344 progress 55 % (6 MB)
140 03:21:20.167435 progress 60 % (6 MB)
141 03:21:20.247384 progress 65 % (7 MB)
142 03:21:20.326784 progress 70 % (7 MB)
143 03:21:20.405814 progress 75 % (8 MB)
144 03:21:20.490232 progress 80 % (8 MB)
145 03:21:20.570233 progress 85 % (9 MB)
146 03:21:20.648080 progress 90 % (9 MB)
147 03:21:20.724976 progress 95 % (10 MB)
148 03:21:20.801053 progress 100 % (11 MB)
149 03:21:20.812793 11 MB downloaded in 1.64 s (6.75 MB/s)
150 03:21:20.813360 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:21:20.814187 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:21:20.814456 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 03:21:20.814725 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 03:21:37.969933 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/957148/extract-nfsrootfs-74qxoe9m
156 03:21:37.970556 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 03:21:37.970847 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 03:21:37.971511 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv
159 03:21:37.972048 makedir: /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin
160 03:21:37.972424 makedir: /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/tests
161 03:21:37.972753 makedir: /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/results
162 03:21:37.973108 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-add-keys
163 03:21:37.973674 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-add-sources
164 03:21:37.974206 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-background-process-start
165 03:21:37.974732 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-background-process-stop
166 03:21:37.975286 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-common-functions
167 03:21:37.975845 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-echo-ipv4
168 03:21:37.976519 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-install-packages
169 03:21:37.977059 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-installed-packages
170 03:21:37.977561 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-os-build
171 03:21:37.978058 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-probe-channel
172 03:21:37.978555 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-probe-ip
173 03:21:37.979046 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-target-ip
174 03:21:37.979550 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-target-mac
175 03:21:37.980112 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-target-storage
176 03:21:37.980774 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-test-case
177 03:21:37.981321 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-test-event
178 03:21:37.981921 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-test-feedback
179 03:21:37.982433 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-test-raise
180 03:21:37.982941 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-test-reference
181 03:21:37.983447 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-test-runner
182 03:21:37.983957 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-test-set
183 03:21:37.984555 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-test-shell
184 03:21:37.985172 Updating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-add-keys (debian)
185 03:21:37.985766 Updating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-add-sources (debian)
186 03:21:37.986314 Updating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-install-packages (debian)
187 03:21:37.986847 Updating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-installed-packages (debian)
188 03:21:37.987372 Updating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/bin/lava-os-build (debian)
189 03:21:37.987825 Creating /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/environment
190 03:21:37.988257 LAVA metadata
191 03:21:37.988538 - LAVA_JOB_ID=957148
192 03:21:37.988757 - LAVA_DISPATCHER_IP=192.168.6.2
193 03:21:37.989158 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 03:21:37.990261 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 03:21:37.990654 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 03:21:37.990874 skipped lava-vland-overlay
197 03:21:37.991124 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 03:21:37.991389 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 03:21:37.991616 skipped lava-multinode-overlay
200 03:21:37.991864 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 03:21:37.992152 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 03:21:37.992426 Loading test definitions
203 03:21:37.992718 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 03:21:37.992941 Using /lava-957148 at stage 0
205 03:21:37.994158 uuid=957148_1.6.2.4.1 testdef=None
206 03:21:37.994514 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 03:21:37.994792 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 03:21:37.996668 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 03:21:37.997530 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 03:21:37.999569 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 03:21:38.000452 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 03:21:38.003494 runner path: /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/0/tests/0_timesync-off test_uuid 957148_1.6.2.4.1
215 03:21:38.004360 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 03:21:38.005323 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 03:21:38.005568 Using /lava-957148 at stage 0
219 03:21:38.005967 Fetching tests from https://github.com/kernelci/test-definitions.git
220 03:21:38.006291 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/0/tests/1_kselftest-rtc'
221 03:21:41.429844 Running '/usr/bin/git checkout kernelci.org
222 03:21:41.788605 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 03:21:41.790032 uuid=957148_1.6.2.4.5 testdef=None
224 03:21:41.790369 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 03:21:41.791117 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 03:21:41.793962 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 03:21:41.794779 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 03:21:41.798489 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 03:21:41.799339 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 03:21:41.802992 runner path: /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/0/tests/1_kselftest-rtc test_uuid 957148_1.6.2.4.5
234 03:21:41.803276 BOARD='meson-g12b-a311d-libretech-cc'
235 03:21:41.803481 BRANCH='mainline'
236 03:21:41.803677 SKIPFILE='/dev/null'
237 03:21:41.803875 SKIP_INSTALL='True'
238 03:21:41.804095 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 03:21:41.804298 TST_CASENAME=''
240 03:21:41.804493 TST_CMDFILES='rtc'
241 03:21:41.805023 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 03:21:41.805805 Creating lava-test-runner.conf files
244 03:21:41.806009 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/957148/lava-overlay-ku8t9iiv/lava-957148/0 for stage 0
245 03:21:41.806346 - 0_timesync-off
246 03:21:41.806582 - 1_kselftest-rtc
247 03:21:41.806904 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 03:21:41.807179 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 03:22:04.965870 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 03:22:04.966329 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 03:22:04.966633 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 03:22:04.966948 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 03:22:04.967249 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 03:22:05.576912 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 03:22:05.577403 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 03:22:05.577661 extracting modules file /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957148/extract-nfsrootfs-74qxoe9m
257 03:22:06.920015 extracting modules file /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957148/extract-overlay-ramdisk-c_l4vn1s/ramdisk
258 03:22:08.298639 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 03:22:08.299120 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 03:22:08.299404 [common] Applying overlay to NFS
261 03:22:08.299619 [common] Applying overlay /var/lib/lava/dispatcher/tmp/957148/compress-overlay-1u5xdpq0/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/957148/extract-nfsrootfs-74qxoe9m
262 03:22:11.033232 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 03:22:11.033712 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 03:22:11.034023 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 03:22:11.034287 Converting downloaded kernel to a uImage
266 03:22:11.034617 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/kernel/Image /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/kernel/uImage
267 03:22:11.584895 output: Image Name:
268 03:22:11.585325 output: Created: Fri Nov 8 03:22:11 2024
269 03:22:11.585537 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 03:22:11.585745 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 03:22:11.585948 output: Load Address: 01080000
272 03:22:11.586150 output: Entry Point: 01080000
273 03:22:11.586349 output:
274 03:22:11.586682 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 03:22:11.586949 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 03:22:11.587219 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 03:22:11.587476 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 03:22:11.587735 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 03:22:11.588027 Building ramdisk /var/lib/lava/dispatcher/tmp/957148/extract-overlay-ramdisk-c_l4vn1s/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/957148/extract-overlay-ramdisk-c_l4vn1s/ramdisk
280 03:22:13.700617 >> 166825 blocks
281 03:22:21.369166 Adding RAMdisk u-boot header.
282 03:22:21.369886 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/957148/extract-overlay-ramdisk-c_l4vn1s/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/957148/extract-overlay-ramdisk-c_l4vn1s/ramdisk.cpio.gz.uboot
283 03:22:21.675722 output: Image Name:
284 03:22:21.676259 output: Created: Fri Nov 8 03:22:21 2024
285 03:22:21.676681 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 03:22:21.677088 output: Data Size: 23432349 Bytes = 22883.15 KiB = 22.35 MiB
287 03:22:21.677492 output: Load Address: 00000000
288 03:22:21.677891 output: Entry Point: 00000000
289 03:22:21.678287 output:
290 03:22:21.679226 rename /var/lib/lava/dispatcher/tmp/957148/extract-overlay-ramdisk-c_l4vn1s/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/ramdisk/ramdisk.cpio.gz.uboot
291 03:22:21.679919 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 03:22:21.680504 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 03:22:21.681028 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 03:22:21.681478 No LXC device requested
295 03:22:21.681974 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 03:22:21.682508 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 03:22:21.683003 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 03:22:21.683411 Checking files for TFTP limit of 4294967296 bytes.
299 03:22:21.686145 end: 1 tftp-deploy (duration 00:01:18) [common]
300 03:22:21.686717 start: 2 uboot-action (timeout 00:05:00) [common]
301 03:22:21.687238 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 03:22:21.687734 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 03:22:21.688277 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 03:22:21.688803 Using kernel file from prepare-kernel: 957148/tftp-deploy-ge6sjusq/kernel/uImage
305 03:22:21.689425 substitutions:
306 03:22:21.689827 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 03:22:21.690227 - {DTB_ADDR}: 0x01070000
308 03:22:21.690624 - {DTB}: 957148/tftp-deploy-ge6sjusq/dtb/meson-g12b-a311d-libretech-cc.dtb
309 03:22:21.691023 - {INITRD}: 957148/tftp-deploy-ge6sjusq/ramdisk/ramdisk.cpio.gz.uboot
310 03:22:21.691417 - {KERNEL_ADDR}: 0x01080000
311 03:22:21.691807 - {KERNEL}: 957148/tftp-deploy-ge6sjusq/kernel/uImage
312 03:22:21.692233 - {LAVA_MAC}: None
313 03:22:21.692664 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/957148/extract-nfsrootfs-74qxoe9m
314 03:22:21.693062 - {NFS_SERVER_IP}: 192.168.6.2
315 03:22:21.693455 - {PRESEED_CONFIG}: None
316 03:22:21.693845 - {PRESEED_LOCAL}: None
317 03:22:21.694236 - {RAMDISK_ADDR}: 0x08000000
318 03:22:21.694620 - {RAMDISK}: 957148/tftp-deploy-ge6sjusq/ramdisk/ramdisk.cpio.gz.uboot
319 03:22:21.695009 - {ROOT_PART}: None
320 03:22:21.695395 - {ROOT}: None
321 03:22:21.695778 - {SERVER_IP}: 192.168.6.2
322 03:22:21.696248 - {TEE_ADDR}: 0x83000000
323 03:22:21.696641 - {TEE}: None
324 03:22:21.697026 Parsed boot commands:
325 03:22:21.697403 - setenv autoload no
326 03:22:21.697785 - setenv initrd_high 0xffffffff
327 03:22:21.698168 - setenv fdt_high 0xffffffff
328 03:22:21.698548 - dhcp
329 03:22:21.698930 - setenv serverip 192.168.6.2
330 03:22:21.699315 - tftpboot 0x01080000 957148/tftp-deploy-ge6sjusq/kernel/uImage
331 03:22:21.699700 - tftpboot 0x08000000 957148/tftp-deploy-ge6sjusq/ramdisk/ramdisk.cpio.gz.uboot
332 03:22:21.700114 - tftpboot 0x01070000 957148/tftp-deploy-ge6sjusq/dtb/meson-g12b-a311d-libretech-cc.dtb
333 03:22:21.700508 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/957148/extract-nfsrootfs-74qxoe9m,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 03:22:21.700908 - bootm 0x01080000 0x08000000 0x01070000
335 03:22:21.701398 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 03:22:21.702876 start: 2.3 connect-device (timeout 00:05:00) [common]
338 03:22:21.703295 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 03:22:21.717351 Setting prompt string to ['lava-test: # ']
340 03:22:21.718865 end: 2.3 connect-device (duration 00:00:00) [common]
341 03:22:21.719475 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 03:22:21.720077 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 03:22:21.720618 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 03:22:21.721753 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 03:22:21.756773 >> OK - accepted request
346 03:22:21.758881 Returned 0 in 0 seconds
347 03:22:21.859921 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 03:22:21.861492 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 03:22:21.862043 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 03:22:21.862537 Setting prompt string to ['Hit any key to stop autoboot']
352 03:22:21.862979 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 03:22:21.864538 Trying 192.168.56.21...
354 03:22:21.865013 Connected to conserv1.
355 03:22:21.865426 Escape character is '^]'.
356 03:22:21.865837
357 03:22:21.866252 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 03:22:21.866675
359 03:22:32.589341 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
360 03:22:32.589986 bl2_stage_init 0x81
361 03:22:32.594803 hw id: 0x0000 - pwm id 0x01
362 03:22:32.595254 bl2_stage_init 0xc1
363 03:22:32.595664 bl2_stage_init 0x02
364 03:22:32.596152
365 03:22:32.600423 L0:00000000
366 03:22:32.600869 L1:20000703
367 03:22:32.601285 L2:00008067
368 03:22:32.601689 L3:14000000
369 03:22:32.602097 B2:00402000
370 03:22:32.603250 B1:e0f83180
371 03:22:32.603680
372 03:22:32.604121 TE: 58150
373 03:22:32.604514
374 03:22:32.614304 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
375 03:22:32.614730
376 03:22:32.615123 Board ID = 1
377 03:22:32.615507 Set A53 clk to 24M
378 03:22:32.615891 Set A73 clk to 24M
379 03:22:32.619926 Set clk81 to 24M
380 03:22:32.620370 A53 clk: 1200 MHz
381 03:22:32.620760 A73 clk: 1200 MHz
382 03:22:32.625583 CLK81: 166.6M
383 03:22:32.625998 smccc: 00012aac
384 03:22:32.631191 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
385 03:22:32.631608 board id: 1
386 03:22:32.639899 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
387 03:22:32.650310 fw parse done
388 03:22:32.656281 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
389 03:22:32.699004 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
390 03:22:32.709810 PIEI prepare done
391 03:22:32.710223 fastboot data load
392 03:22:32.710610 fastboot data verify
393 03:22:32.715548 verify result: 266
394 03:22:32.721130 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
395 03:22:32.721551 LPDDR4 probe
396 03:22:32.721942 ddr clk to 1584MHz
397 03:22:32.729069 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
398 03:22:32.766346
399 03:22:32.766784 dmc_version 0001
400 03:22:32.773118 Check phy result
401 03:22:32.778974 INFO : End of CA training
402 03:22:32.779390 INFO : End of initialization
403 03:22:32.784538 INFO : Training has run successfully!
404 03:22:32.784962 Check phy result
405 03:22:32.790157 INFO : End of initialization
406 03:22:32.790574 INFO : End of read enable training
407 03:22:32.793395 INFO : End of fine write leveling
408 03:22:32.798980 INFO : End of Write leveling coarse delay
409 03:22:32.804557 INFO : Training has run successfully!
410 03:22:32.804973 Check phy result
411 03:22:32.805367 INFO : End of initialization
412 03:22:32.810180 INFO : End of read dq deskew training
413 03:22:32.813590 INFO : End of MPR read delay center optimization
414 03:22:32.819173 INFO : End of write delay center optimization
415 03:22:32.824740 INFO : End of read delay center optimization
416 03:22:32.825161 INFO : End of max read latency training
417 03:22:32.830371 INFO : Training has run successfully!
418 03:22:32.830788 1D training succeed
419 03:22:32.838515 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
420 03:22:32.885986 Check phy result
421 03:22:32.886413 INFO : End of initialization
422 03:22:32.907827 INFO : End of 2D read delay Voltage center optimization
423 03:22:32.927957 INFO : End of 2D read delay Voltage center optimization
424 03:22:32.980104 INFO : End of 2D write delay Voltage center optimization
425 03:22:33.029379 INFO : End of 2D write delay Voltage center optimization
426 03:22:33.034996 INFO : Training has run successfully!
427 03:22:33.035423
428 03:22:33.035824 channel==0
429 03:22:33.040541 RxClkDly_Margin_A0==88 ps 9
430 03:22:33.040963 TxDqDly_Margin_A0==98 ps 10
431 03:22:33.046151 RxClkDly_Margin_A1==88 ps 9
432 03:22:33.046565 TxDqDly_Margin_A1==88 ps 9
433 03:22:33.046962 TrainedVREFDQ_A0==74
434 03:22:33.051725 TrainedVREFDQ_A1==74
435 03:22:33.052170 VrefDac_Margin_A0==25
436 03:22:33.052566 DeviceVref_Margin_A0==40
437 03:22:33.057321 VrefDac_Margin_A1==25
438 03:22:33.057735 DeviceVref_Margin_A1==40
439 03:22:33.058127
440 03:22:33.058514
441 03:22:33.058902 channel==1
442 03:22:33.062966 RxClkDly_Margin_A0==98 ps 10
443 03:22:33.063379 TxDqDly_Margin_A0==98 ps 10
444 03:22:33.068535 RxClkDly_Margin_A1==98 ps 10
445 03:22:33.068952 TxDqDly_Margin_A1==88 ps 9
446 03:22:33.074147 TrainedVREFDQ_A0==77
447 03:22:33.074566 TrainedVREFDQ_A1==77
448 03:22:33.074958 VrefDac_Margin_A0==22
449 03:22:33.079739 DeviceVref_Margin_A0==37
450 03:22:33.080184 VrefDac_Margin_A1==22
451 03:22:33.085312 DeviceVref_Margin_A1==37
452 03:22:33.085728
453 03:22:33.086123 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
454 03:22:33.086513
455 03:22:33.118963 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
456 03:22:33.119503 2D training succeed
457 03:22:33.124532 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
458 03:22:33.130151 auto size-- 65535DDR cs0 size: 2048MB
459 03:22:33.130571 DDR cs1 size: 2048MB
460 03:22:33.135784 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
461 03:22:33.136241 cs0 DataBus test pass
462 03:22:33.141331 cs1 DataBus test pass
463 03:22:33.141758 cs0 AddrBus test pass
464 03:22:33.142148 cs1 AddrBus test pass
465 03:22:33.142537
466 03:22:33.146985 100bdlr_step_size ps== 420
467 03:22:33.147410 result report
468 03:22:33.152507 boot times 0Enable ddr reg access
469 03:22:33.157875 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
470 03:22:33.171351 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
471 03:22:33.745183 0.0;M3 CHK:0;cm4_sp_mode 0
472 03:22:33.745805 MVN_1=0x00000000
473 03:22:33.750559 MVN_2=0x00000000
474 03:22:33.756301 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
475 03:22:33.756735 OPS=0x10
476 03:22:33.757140 ring efuse init
477 03:22:33.757538 chipver efuse init
478 03:22:33.761897 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
479 03:22:33.767502 [0.018961 Inits done]
480 03:22:33.767930 secure task start!
481 03:22:33.768394 high task start!
482 03:22:33.772088 low task start!
483 03:22:33.772518 run into bl31
484 03:22:33.778763 NOTICE: BL31: v1.3(release):4fc40b1
485 03:22:33.786555 NOTICE: BL31: Built : 15:58:17, May 22 2019
486 03:22:33.786995 NOTICE: BL31: G12A normal boot!
487 03:22:33.811966 NOTICE: BL31: BL33 decompress pass
488 03:22:33.817634 ERROR: Error initializing runtime service opteed_fast
489 03:22:35.050622
490 03:22:35.051246
491 03:22:35.058906 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
492 03:22:35.059352
493 03:22:35.059763 Model: Libre Computer AML-A311D-CC Alta
494 03:22:35.267370 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
495 03:22:35.290688 DRAM: 2 GiB (effective 3.8 GiB)
496 03:22:35.433791 Core: 408 devices, 31 uclasses, devicetree: separate
497 03:22:35.439566 WDT: Not starting watchdog@f0d0
498 03:22:35.471815 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
499 03:22:35.484261 Loading Environment from FAT... Card did not respond to voltage select! : -110
500 03:22:35.489283 ** Bad device specification mmc 0 **
501 03:22:35.499613 Card did not respond to voltage select! : -110
502 03:22:35.507252 ** Bad device specification mmc 0 **
503 03:22:35.507699 Couldn't find partition mmc 0
504 03:22:35.515585 Card did not respond to voltage select! : -110
505 03:22:35.521105 ** Bad device specification mmc 0 **
506 03:22:35.521547 Couldn't find partition mmc 0
507 03:22:35.526159 Error: could not access storage.
508 03:22:36.789714 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
509 03:22:36.790315 bl2_stage_init 0x01
510 03:22:36.790742 bl2_stage_init 0x81
511 03:22:36.795304 hw id: 0x0000 - pwm id 0x01
512 03:22:36.795743 bl2_stage_init 0xc1
513 03:22:36.796213 bl2_stage_init 0x02
514 03:22:36.796625
515 03:22:36.800886 L0:00000000
516 03:22:36.801317 L1:20000703
517 03:22:36.801719 L2:00008067
518 03:22:36.802114 L3:14000000
519 03:22:36.806588 B2:00402000
520 03:22:36.807013 B1:e0f83180
521 03:22:36.807413
522 03:22:36.807811 TE: 58167
523 03:22:36.808247
524 03:22:36.812102 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
525 03:22:36.812537
526 03:22:36.812944 Board ID = 1
527 03:22:36.817677 Set A53 clk to 24M
528 03:22:36.818123 Set A73 clk to 24M
529 03:22:36.818528 Set clk81 to 24M
530 03:22:36.823283 A53 clk: 1200 MHz
531 03:22:36.823708 A73 clk: 1200 MHz
532 03:22:36.824137 CLK81: 166.6M
533 03:22:36.824538 smccc: 00012abd
534 03:22:36.828876 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
535 03:22:36.834586 board id: 1
536 03:22:36.840347 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
537 03:22:36.850992 fw parse done
538 03:22:36.856983 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 03:22:36.899669 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
540 03:22:36.910613 PIEI prepare done
541 03:22:36.911059 fastboot data load
542 03:22:36.911470 fastboot data verify
543 03:22:36.916255 verify result: 266
544 03:22:36.921765 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
545 03:22:36.922194 LPDDR4 probe
546 03:22:36.922596 ddr clk to 1584MHz
547 03:22:36.929746 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
548 03:22:36.966981
549 03:22:36.967420 dmc_version 0001
550 03:22:36.973734 Check phy result
551 03:22:36.979539 INFO : End of CA training
552 03:22:36.979968 INFO : End of initialization
553 03:22:36.985163 INFO : Training has run successfully!
554 03:22:36.985590 Check phy result
555 03:22:36.990734 INFO : End of initialization
556 03:22:36.991160 INFO : End of read enable training
557 03:22:36.996348 INFO : End of fine write leveling
558 03:22:37.001956 INFO : End of Write leveling coarse delay
559 03:22:37.002381 INFO : Training has run successfully!
560 03:22:37.002781 Check phy result
561 03:22:37.007531 INFO : End of initialization
562 03:22:37.007955 INFO : End of read dq deskew training
563 03:22:37.013147 INFO : End of MPR read delay center optimization
564 03:22:37.018750 INFO : End of write delay center optimization
565 03:22:37.024356 INFO : End of read delay center optimization
566 03:22:37.024806 INFO : End of max read latency training
567 03:22:37.030027 INFO : Training has run successfully!
568 03:22:37.030465 1D training succeed
569 03:22:37.039142 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
570 03:22:37.086810 Check phy result
571 03:22:37.087249 INFO : End of initialization
572 03:22:37.108584 INFO : End of 2D read delay Voltage center optimization
573 03:22:37.128793 INFO : End of 2D read delay Voltage center optimization
574 03:22:37.180836 INFO : End of 2D write delay Voltage center optimization
575 03:22:37.230112 INFO : End of 2D write delay Voltage center optimization
576 03:22:37.235751 INFO : Training has run successfully!
577 03:22:37.236234
578 03:22:37.236643 channel==0
579 03:22:37.241280 RxClkDly_Margin_A0==88 ps 9
580 03:22:37.241709 TxDqDly_Margin_A0==98 ps 10
581 03:22:37.244610 RxClkDly_Margin_A1==88 ps 9
582 03:22:37.245043 TxDqDly_Margin_A1==98 ps 10
583 03:22:37.250209 TrainedVREFDQ_A0==74
584 03:22:37.250638 TrainedVREFDQ_A1==75
585 03:22:37.251041 VrefDac_Margin_A0==25
586 03:22:37.255799 DeviceVref_Margin_A0==40
587 03:22:37.256253 VrefDac_Margin_A1==25
588 03:22:37.261404 DeviceVref_Margin_A1==39
589 03:22:37.261831
590 03:22:37.262232
591 03:22:37.262629 channel==1
592 03:22:37.263022 RxClkDly_Margin_A0==98 ps 10
593 03:22:37.266967 TxDqDly_Margin_A0==88 ps 9
594 03:22:37.267398 RxClkDly_Margin_A1==98 ps 10
595 03:22:37.272599 TxDqDly_Margin_A1==88 ps 9
596 03:22:37.273032 TrainedVREFDQ_A0==76
597 03:22:37.273438 TrainedVREFDQ_A1==77
598 03:22:37.278187 VrefDac_Margin_A0==22
599 03:22:37.278625 DeviceVref_Margin_A0==38
600 03:22:37.283796 VrefDac_Margin_A1==24
601 03:22:37.284251 DeviceVref_Margin_A1==37
602 03:22:37.284653
603 03:22:37.289386 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
604 03:22:37.289813
605 03:22:37.317402 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
606 03:22:37.322978 2D training succeed
607 03:22:37.328583 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
608 03:22:37.329021 auto size-- 65535DDR cs0 size: 2048MB
609 03:22:37.334207 DDR cs1 size: 2048MB
610 03:22:37.334641 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
611 03:22:37.339823 cs0 DataBus test pass
612 03:22:37.340301 cs1 DataBus test pass
613 03:22:37.340709 cs0 AddrBus test pass
614 03:22:37.345420 cs1 AddrBus test pass
615 03:22:37.345848
616 03:22:37.346255 100bdlr_step_size ps== 420
617 03:22:37.346662 result report
618 03:22:37.351007 boot times 0Enable ddr reg access
619 03:22:37.358698 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
620 03:22:37.372178 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
621 03:22:37.946180 0.0;M3 CHK:0;cm4_sp_mode 0
622 03:22:37.946765 MVN_1=0x00000000
623 03:22:37.951373 MVN_2=0x00000000
624 03:22:37.957120 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
625 03:22:37.957573 OPS=0x10
626 03:22:37.957977 ring efuse init
627 03:22:37.958379 chipver efuse init
628 03:22:37.965722 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
629 03:22:37.966236 [0.018961 Inits done]
630 03:22:37.966628 secure task start!
631 03:22:37.972965 high task start!
632 03:22:37.973385 low task start!
633 03:22:37.973774 run into bl31
634 03:22:37.979613 NOTICE: BL31: v1.3(release):4fc40b1
635 03:22:37.987446 NOTICE: BL31: Built : 15:58:17, May 22 2019
636 03:22:37.987876 NOTICE: BL31: G12A normal boot!
637 03:22:38.012897 NOTICE: BL31: BL33 decompress pass
638 03:22:38.018476 ERROR: Error initializing runtime service opteed_fast
639 03:22:39.251510
640 03:22:39.252165
641 03:22:39.259810 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
642 03:22:39.260279
643 03:22:39.260691 Model: Libre Computer AML-A311D-CC Alta
644 03:22:39.468499 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
645 03:22:39.491732 DRAM: 2 GiB (effective 3.8 GiB)
646 03:22:39.634554 Core: 408 devices, 31 uclasses, devicetree: separate
647 03:22:39.640455 WDT: Not starting watchdog@f0d0
648 03:22:39.672787 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
649 03:22:39.685264 Loading Environment from FAT... Card did not respond to voltage select! : -110
650 03:22:39.690307 ** Bad device specification mmc 0 **
651 03:22:39.700499 Card did not respond to voltage select! : -110
652 03:22:39.708286 ** Bad device specification mmc 0 **
653 03:22:39.708751 Couldn't find partition mmc 0
654 03:22:39.716485 Card did not respond to voltage select! : -110
655 03:22:39.722038 ** Bad device specification mmc 0 **
656 03:22:39.722476 Couldn't find partition mmc 0
657 03:22:39.727117 Error: could not access storage.
658 03:22:40.069575 Net: eth0: ethernet@ff3f0000
659 03:22:40.070129 starting USB...
660 03:22:40.321338 Bus usb@ff500000: Register 3000140 NbrPorts 3
661 03:22:40.321836 Starting the controller
662 03:22:40.328397 USB XHCI 1.10
663 03:22:42.038485 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
664 03:22:42.039112 bl2_stage_init 0x01
665 03:22:42.039540 bl2_stage_init 0x81
666 03:22:42.044083 hw id: 0x0000 - pwm id 0x01
667 03:22:42.044574 bl2_stage_init 0xc1
668 03:22:42.044992 bl2_stage_init 0x02
669 03:22:42.045394
670 03:22:42.049682 L0:00000000
671 03:22:42.050116 L1:20000703
672 03:22:42.050518 L2:00008067
673 03:22:42.050917 L3:14000000
674 03:22:42.052604 B2:00402000
675 03:22:42.053037 B1:e0f83180
676 03:22:42.053442
677 03:22:42.053843 TE: 58167
678 03:22:42.054241
679 03:22:42.063664 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
680 03:22:42.064132
681 03:22:42.064545 Board ID = 1
682 03:22:42.064946 Set A53 clk to 24M
683 03:22:42.065343 Set A73 clk to 24M
684 03:22:42.069446 Set clk81 to 24M
685 03:22:42.069877 A53 clk: 1200 MHz
686 03:22:42.070278 A73 clk: 1200 MHz
687 03:22:42.075059 CLK81: 166.6M
688 03:22:42.075488 smccc: 00012abd
689 03:22:42.080457 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
690 03:22:42.080888 board id: 1
691 03:22:42.089240 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
692 03:22:42.099797 fw parse done
693 03:22:42.105707 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 03:22:42.148277 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
695 03:22:42.159139 PIEI prepare done
696 03:22:42.159574 fastboot data load
697 03:22:42.160018 fastboot data verify
698 03:22:42.164823 verify result: 266
699 03:22:42.170406 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
700 03:22:42.170837 LPDDR4 probe
701 03:22:42.171238 ddr clk to 1584MHz
702 03:22:42.178485 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
703 03:22:42.215616
704 03:22:42.216091 dmc_version 0001
705 03:22:42.222366 Check phy result
706 03:22:42.228232 INFO : End of CA training
707 03:22:42.228664 INFO : End of initialization
708 03:22:42.233772 INFO : Training has run successfully!
709 03:22:42.234202 Check phy result
710 03:22:42.239409 INFO : End of initialization
711 03:22:42.239834 INFO : End of read enable training
712 03:22:42.244967 INFO : End of fine write leveling
713 03:22:42.250642 INFO : End of Write leveling coarse delay
714 03:22:42.251289 INFO : Training has run successfully!
715 03:22:42.251883 Check phy result
716 03:22:42.256195 INFO : End of initialization
717 03:22:42.256789 INFO : End of read dq deskew training
718 03:22:42.261760 INFO : End of MPR read delay center optimization
719 03:22:42.267420 INFO : End of write delay center optimization
720 03:22:42.272977 INFO : End of read delay center optimization
721 03:22:42.273532 INFO : End of max read latency training
722 03:22:42.278558 INFO : Training has run successfully!
723 03:22:42.279116 1D training succeed
724 03:22:42.287732 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
725 03:22:42.335402 Check phy result
726 03:22:42.335960 INFO : End of initialization
727 03:22:42.357149 INFO : End of 2D read delay Voltage center optimization
728 03:22:42.377394 INFO : End of 2D read delay Voltage center optimization
729 03:22:42.429435 INFO : End of 2D write delay Voltage center optimization
730 03:22:42.478788 INFO : End of 2D write delay Voltage center optimization
731 03:22:42.484457 INFO : Training has run successfully!
732 03:22:42.485060
733 03:22:42.485603 channel==0
734 03:22:42.490050 RxClkDly_Margin_A0==88 ps 9
735 03:22:42.490622 TxDqDly_Margin_A0==98 ps 10
736 03:22:42.493302 RxClkDly_Margin_A1==88 ps 9
737 03:22:42.493859 TxDqDly_Margin_A1==98 ps 10
738 03:22:42.498905 TrainedVREFDQ_A0==74
739 03:22:42.499464 TrainedVREFDQ_A1==74
740 03:22:42.500038 VrefDac_Margin_A0==25
741 03:22:42.504516 DeviceVref_Margin_A0==40
742 03:22:42.505094 VrefDac_Margin_A1==25
743 03:22:42.510106 DeviceVref_Margin_A1==40
744 03:22:42.510673
745 03:22:42.511209
746 03:22:42.511737 channel==1
747 03:22:42.512314 RxClkDly_Margin_A0==98 ps 10
748 03:22:42.513458 TxDqDly_Margin_A0==98 ps 10
749 03:22:42.519024 RxClkDly_Margin_A1==98 ps 10
750 03:22:42.519603 TxDqDly_Margin_A1==108 ps 11
751 03:22:42.524625 TrainedVREFDQ_A0==77
752 03:22:42.525199 TrainedVREFDQ_A1==77
753 03:22:42.525721 VrefDac_Margin_A0==22
754 03:22:42.530227 DeviceVref_Margin_A0==37
755 03:22:42.530801 VrefDac_Margin_A1==22
756 03:22:42.531317 DeviceVref_Margin_A1==37
757 03:22:42.531852
758 03:22:42.535834 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
759 03:22:42.536449
760 03:22:42.569496 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000019 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
761 03:22:42.570160 2D training succeed
762 03:22:42.575033 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
763 03:22:42.580624 auto size-- 65535DDR cs0 size: 2048MB
764 03:22:42.581181 DDR cs1 size: 2048MB
765 03:22:42.586229 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
766 03:22:42.586782 cs0 DataBus test pass
767 03:22:42.587312 cs1 DataBus test pass
768 03:22:42.591837 cs0 AddrBus test pass
769 03:22:42.592412 cs1 AddrBus test pass
770 03:22:42.592942
771 03:22:42.597470 100bdlr_step_size ps== 420
772 03:22:42.598042 result report
773 03:22:42.598572 boot times 0Enable ddr reg access
774 03:22:42.607594 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
775 03:22:42.621060 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
776 03:22:43.194781 0.0;M3 CHK:0;cm4_sp_mode 0
777 03:22:43.195533 MVN_1=0x00000000
778 03:22:43.200195 MVN_2=0x00000000
779 03:22:43.205973 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
780 03:22:43.206602 OPS=0x10
781 03:22:43.207117 ring efuse init
782 03:22:43.207626 chipver efuse init
783 03:22:43.214225 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
784 03:22:43.214792 [0.018961 Inits done]
785 03:22:43.215298 secure task start!
786 03:22:43.221725 high task start!
787 03:22:43.222271 low task start!
788 03:22:43.222778 run into bl31
789 03:22:43.228480 NOTICE: BL31: v1.3(release):4fc40b1
790 03:22:43.236182 NOTICE: BL31: Built : 15:58:17, May 22 2019
791 03:22:43.236736 NOTICE: BL31: G12A normal boot!
792 03:22:43.262072 NOTICE: BL31: BL33 decompress pass
793 03:22:43.267738 ERROR: Error initializing runtime service opteed_fast
794 03:22:44.500825
795 03:22:44.501637
796 03:22:44.509036 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
797 03:22:44.509632
798 03:22:44.510178 Model: Libre Computer AML-A311D-CC Alta
799 03:22:44.717407 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
800 03:22:44.740822 DRAM: 2 GiB (effective 3.8 GiB)
801 03:22:44.883819 Core: 408 devices, 31 uclasses, devicetree: separate
802 03:22:44.889797 WDT: Not starting watchdog@f0d0
803 03:22:44.921962 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
804 03:22:44.934459 Loading Environment from FAT... Card did not respond to voltage select! : -110
805 03:22:44.939426 ** Bad device specification mmc 0 **
806 03:22:44.949790 Card did not respond to voltage select! : -110
807 03:22:44.957410 ** Bad device specification mmc 0 **
808 03:22:44.957979 Couldn't find partition mmc 0
809 03:22:44.965758 Card did not respond to voltage select! : -110
810 03:22:44.971261 ** Bad device specification mmc 0 **
811 03:22:44.971816 Couldn't find partition mmc 0
812 03:22:44.976303 Error: could not access storage.
813 03:22:45.318893 Net: eth0: ethernet@ff3f0000
814 03:22:45.319549 starting USB...
815 03:22:45.570685 Bus usb@ff500000: Register 3000140 NbrPorts 3
816 03:22:45.571396 Starting the controller
817 03:22:45.577572 USB XHCI 1.10
818 03:22:47.739560 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
819 03:22:47.740410 bl2_stage_init 0x01
820 03:22:47.740988 bl2_stage_init 0x81
821 03:22:47.745259 hw id: 0x0000 - pwm id 0x01
822 03:22:47.745832 bl2_stage_init 0xc1
823 03:22:47.746360 bl2_stage_init 0x02
824 03:22:47.746889
825 03:22:47.750786 L0:00000000
826 03:22:47.751338 L1:20000703
827 03:22:47.751864 L2:00008067
828 03:22:47.752432 L3:14000000
829 03:22:47.756384 B2:00402000
830 03:22:47.756947 B1:e0f83180
831 03:22:47.757481
832 03:22:47.757999 TE: 58167
833 03:22:47.758518
834 03:22:47.761931 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 03:22:47.762488
836 03:22:47.763039 Board ID = 1
837 03:22:47.767591 Set A53 clk to 24M
838 03:22:47.768176 Set A73 clk to 24M
839 03:22:47.768703 Set clk81 to 24M
840 03:22:47.773252 A53 clk: 1200 MHz
841 03:22:47.773800 A73 clk: 1200 MHz
842 03:22:47.774319 CLK81: 166.6M
843 03:22:47.774845 smccc: 00012abe
844 03:22:47.778746 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 03:22:47.784361 board id: 1
846 03:22:47.790280 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 03:22:47.800788 fw parse done
848 03:22:47.806924 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 03:22:47.849513 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 03:22:47.860345 PIEI prepare done
851 03:22:47.860919 fastboot data load
852 03:22:47.861463 fastboot data verify
853 03:22:47.865960 verify result: 266
854 03:22:47.871532 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 03:22:47.872121 LPDDR4 probe
856 03:22:47.872654 ddr clk to 1584MHz
857 03:22:47.879516 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 03:22:47.916787
859 03:22:47.917345 dmc_version 0001
860 03:22:47.923479 Check phy result
861 03:22:47.929339 INFO : End of CA training
862 03:22:47.929898 INFO : End of initialization
863 03:22:47.934949 INFO : Training has run successfully!
864 03:22:47.935500 Check phy result
865 03:22:47.940525 INFO : End of initialization
866 03:22:47.941081 INFO : End of read enable training
867 03:22:47.946228 INFO : End of fine write leveling
868 03:22:47.951750 INFO : End of Write leveling coarse delay
869 03:22:47.952352 INFO : Training has run successfully!
870 03:22:47.952872 Check phy result
871 03:22:47.957328 INFO : End of initialization
872 03:22:47.957882 INFO : End of read dq deskew training
873 03:22:47.962967 INFO : End of MPR read delay center optimization
874 03:22:47.968591 INFO : End of write delay center optimization
875 03:22:47.974269 INFO : End of read delay center optimization
876 03:22:47.974807 INFO : End of max read latency training
877 03:22:47.979798 INFO : Training has run successfully!
878 03:22:47.980373 1D training succeed
879 03:22:47.988973 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 03:22:48.036565 Check phy result
881 03:22:48.037171 INFO : End of initialization
882 03:22:48.058377 INFO : End of 2D read delay Voltage center optimization
883 03:22:48.078574 INFO : End of 2D read delay Voltage center optimization
884 03:22:48.130653 INFO : End of 2D write delay Voltage center optimization
885 03:22:48.180092 INFO : End of 2D write delay Voltage center optimization
886 03:22:48.185611 INFO : Training has run successfully!
887 03:22:48.186166
888 03:22:48.186699 channel==0
889 03:22:48.191225 RxClkDly_Margin_A0==88 ps 9
890 03:22:48.191776 TxDqDly_Margin_A0==98 ps 10
891 03:22:48.196738 RxClkDly_Margin_A1==88 ps 9
892 03:22:48.197289 TxDqDly_Margin_A1==98 ps 10
893 03:22:48.197842 TrainedVREFDQ_A0==74
894 03:22:48.202421 TrainedVREFDQ_A1==74
895 03:22:48.203015 VrefDac_Margin_A0==25
896 03:22:48.203568 DeviceVref_Margin_A0==40
897 03:22:48.208027 VrefDac_Margin_A1==25
898 03:22:48.208593 DeviceVref_Margin_A1==40
899 03:22:48.209087
900 03:22:48.209587
901 03:22:48.213618 channel==1
902 03:22:48.214166 RxClkDly_Margin_A0==98 ps 10
903 03:22:48.214704 TxDqDly_Margin_A0==98 ps 10
904 03:22:48.219224 RxClkDly_Margin_A1==88 ps 9
905 03:22:48.219770 TxDqDly_Margin_A1==88 ps 9
906 03:22:48.224850 TrainedVREFDQ_A0==77
907 03:22:48.225477 TrainedVREFDQ_A1==77
908 03:22:48.225988 VrefDac_Margin_A0==22
909 03:22:48.230434 DeviceVref_Margin_A0==37
910 03:22:48.230967 VrefDac_Margin_A1==24
911 03:22:48.236062 DeviceVref_Margin_A1==37
912 03:22:48.236606
913 03:22:48.237110 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 03:22:48.237609
915 03:22:48.269639 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
916 03:22:48.270224 2D training succeed
917 03:22:48.275246 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 03:22:48.280635 auto size-- 65535DDR cs0 size: 2048MB
919 03:22:48.281171 DDR cs1 size: 2048MB
920 03:22:48.286303 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 03:22:48.286838 cs0 DataBus test pass
922 03:22:48.291853 cs1 DataBus test pass
923 03:22:48.292428 cs0 AddrBus test pass
924 03:22:48.292920 cs1 AddrBus test pass
925 03:22:48.293418
926 03:22:48.297447 100bdlr_step_size ps== 420
927 03:22:48.297983 result report
928 03:22:48.303107 boot times 0Enable ddr reg access
929 03:22:48.308438 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 03:22:48.321913 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 03:22:48.895610 0.0;M3 CHK:0;cm4_sp_mode 0
932 03:22:48.896418 MVN_1=0x00000000
933 03:22:48.901010 MVN_2=0x00000000
934 03:22:48.906772 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 03:22:48.907326 OPS=0x10
936 03:22:48.907866 ring efuse init
937 03:22:48.908434 chipver efuse init
938 03:22:48.915070 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 03:22:48.915656 [0.018961 Inits done]
940 03:22:48.916248 secure task start!
941 03:22:48.922559 high task start!
942 03:22:48.923128 low task start!
943 03:22:48.923656 run into bl31
944 03:22:48.929299 NOTICE: BL31: v1.3(release):4fc40b1
945 03:22:48.937026 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 03:22:48.937585 NOTICE: BL31: G12A normal boot!
947 03:22:48.962341 NOTICE: BL31: BL33 decompress pass
948 03:22:48.968071 ERROR: Error initializing runtime service opteed_fast
949 03:22:50.200992
950 03:22:50.201752
951 03:22:50.209312 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 03:22:50.209881
953 03:22:50.210422 Model: Libre Computer AML-A311D-CC Alta
954 03:22:50.417791 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 03:22:50.441131 DRAM: 2 GiB (effective 3.8 GiB)
956 03:22:50.584225 Core: 408 devices, 31 uclasses, devicetree: separate
957 03:22:50.590029 WDT: Not starting watchdog@f0d0
958 03:22:50.622238 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 03:22:50.634724 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 03:22:50.639679 ** Bad device specification mmc 0 **
961 03:22:50.650027 Card did not respond to voltage select! : -110
962 03:22:50.657664 ** Bad device specification mmc 0 **
963 03:22:50.658230 Couldn't find partition mmc 0
964 03:22:50.666022 Card did not respond to voltage select! : -110
965 03:22:50.671520 ** Bad device specification mmc 0 **
966 03:22:50.672140 Couldn't find partition mmc 0
967 03:22:50.676577 Error: could not access storage.
968 03:22:51.020197 Net: eth0: ethernet@ff3f0000
969 03:22:51.020908 starting USB...
970 03:22:51.271974 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 03:22:51.272707 Starting the controller
972 03:22:51.278839 USB XHCI 1.10
973 03:22:52.833065 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
974 03:22:52.841189 scanning usb for storage devices... 0 Storage Device(s) found
976 03:22:52.893072 Hit any key to stop autoboot: 1
977 03:22:52.894024 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
978 03:22:52.894773 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
979 03:22:52.895383 Setting prompt string to ['=>']
980 03:22:52.896067 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
981 03:22:52.908692 0
982 03:22:52.909795 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
983 03:22:52.910453 Sending with 10 millisecond of delay
985 03:22:54.045369 => setenv autoload no
986 03:22:54.056347 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:28)
987 03:22:54.062654 setenv autoload no
988 03:22:54.063522 Sending with 10 millisecond of delay
990 03:22:55.860311 => setenv initrd_high 0xffffffff
991 03:22:55.871266 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
992 03:22:55.872326 setenv initrd_high 0xffffffff
993 03:22:55.873204 Sending with 10 millisecond of delay
995 03:22:57.491234 => setenv fdt_high 0xffffffff
996 03:22:57.501990 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
997 03:22:57.502541 setenv fdt_high 0xffffffff
998 03:22:57.503058 Sending with 10 millisecond of delay
1000 03:22:57.794834 => dhcp
1001 03:22:57.805617 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
1002 03:22:57.806410 dhcp
1003 03:22:57.806849 Speed: 1000, full duplex
1004 03:22:57.807261 BOOTP broadcast 1
1005 03:22:57.813615 DHCP client bound to address 192.168.6.27 (8 ms)
1006 03:22:57.814316 Sending with 10 millisecond of delay
1008 03:22:59.490865 => setenv serverip 192.168.6.2
1009 03:22:59.501645 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1010 03:22:59.502222 setenv serverip 192.168.6.2
1011 03:22:59.502700 Sending with 10 millisecond of delay
1013 03:23:03.226046 => tftpboot 0x01080000 957148/tftp-deploy-ge6sjusq/kernel/uImage
1014 03:23:03.236845 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1015 03:23:03.237740 tftpboot 0x01080000 957148/tftp-deploy-ge6sjusq/kernel/uImage
1016 03:23:03.238188 Speed: 1000, full duplex
1017 03:23:03.238604 Using ethernet@ff3f0000 device
1018 03:23:03.239536 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1019 03:23:03.245066 Filename '957148/tftp-deploy-ge6sjusq/kernel/uImage'.
1020 03:23:03.249191 Load address: 0x1080000
1021 03:23:06.269646 Loading: *################################################## 43.6 MiB
1022 03:23:06.270274 14.4 MiB/s
1023 03:23:06.270689 done
1024 03:23:06.273800 Bytes transferred = 45713984 (2b98a40 hex)
1025 03:23:06.274535 Sending with 10 millisecond of delay
1027 03:23:10.962102 => tftpboot 0x08000000 957148/tftp-deploy-ge6sjusq/ramdisk/ramdisk.cpio.gz.uboot
1028 03:23:10.972889 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1029 03:23:10.973731 tftpboot 0x08000000 957148/tftp-deploy-ge6sjusq/ramdisk/ramdisk.cpio.gz.uboot
1030 03:23:10.974174 Speed: 1000, full duplex
1031 03:23:10.974594 Using ethernet@ff3f0000 device
1032 03:23:10.976352 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1033 03:23:10.987671 Filename '957148/tftp-deploy-ge6sjusq/ramdisk/ramdisk.cpio.gz.uboot'.
1034 03:23:10.988215 Load address: 0x8000000
1035 03:23:17.495144 Loading: *##############T ################################### UDP wrong checksum 00000005 0000a11b
1036 03:23:22.495954 T UDP wrong checksum 00000005 0000a11b
1037 03:23:32.498955 T T UDP wrong checksum 00000005 0000a11b
1038 03:23:52.503131 T T T T UDP wrong checksum 00000005 0000a11b
1039 03:24:07.507307 T T
1040 03:24:07.507922 Retry count exceeded; starting again
1042 03:24:07.509428 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1045 03:24:07.511295 end: 2.4 uboot-commands (duration 00:01:46) [common]
1047 03:24:07.512734 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1049 03:24:07.513795 end: 2 uboot-action (duration 00:01:46) [common]
1051 03:24:07.515300 Cleaning after the job
1052 03:24:07.515841 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/ramdisk
1053 03:24:07.517201 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/kernel
1054 03:24:07.561572 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/dtb
1055 03:24:07.562486 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/nfsrootfs
1056 03:24:07.716235 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957148/tftp-deploy-ge6sjusq/modules
1057 03:24:07.735102 start: 4.1 power-off (timeout 00:00:30) [common]
1058 03:24:07.735759 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1059 03:24:07.768753 >> OK - accepted request
1060 03:24:07.770921 Returned 0 in 0 seconds
1061 03:24:07.871749 end: 4.1 power-off (duration 00:00:00) [common]
1063 03:24:07.872889 start: 4.2 read-feedback (timeout 00:10:00) [common]
1064 03:24:07.873614 Listened to connection for namespace 'common' for up to 1s
1065 03:24:08.873777 Finalising connection for namespace 'common'
1066 03:24:08.874291 Disconnecting from shell: Finalise
1067 03:24:08.874577 =>
1068 03:24:08.975403 end: 4.2 read-feedback (duration 00:00:01) [common]
1069 03:24:08.976169 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/957148
1070 03:24:11.917498 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/957148
1071 03:24:11.918103 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.