Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:05:44.683915 lava-dispatcher, installed at version: 2024.01
2 04:05:44.684723 start: 0 validate
3 04:05:44.685191 Start time: 2024-11-08 04:05:44.685163+00:00 (UTC)
4 04:05:44.685741 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:05:44.686273 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:05:44.728217 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:05:44.728768 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:05:44.759284 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:05:44.759889 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 04:05:44.791636 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:05:44.792120 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:05:44.825057 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:05:44.825540 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:05:44.864980 validate duration: 0.18
16 04:05:44.866465 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:05:44.867101 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:05:44.867690 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:05:44.868732 Not decompressing ramdisk as can be used compressed.
20 04:05:44.869585 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 04:05:44.870107 saving as /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/ramdisk/initrd.cpio.gz
22 04:05:44.870633 total size: 5628169 (5 MB)
23 04:05:44.911835 progress 0 % (0 MB)
24 04:05:44.919635 progress 5 % (0 MB)
25 04:05:44.927410 progress 10 % (0 MB)
26 04:05:44.934402 progress 15 % (0 MB)
27 04:05:44.942194 progress 20 % (1 MB)
28 04:05:44.946656 progress 25 % (1 MB)
29 04:05:44.950709 progress 30 % (1 MB)
30 04:05:44.954730 progress 35 % (1 MB)
31 04:05:44.958345 progress 40 % (2 MB)
32 04:05:44.962345 progress 45 % (2 MB)
33 04:05:44.965932 progress 50 % (2 MB)
34 04:05:44.969939 progress 55 % (2 MB)
35 04:05:44.974062 progress 60 % (3 MB)
36 04:05:44.977633 progress 65 % (3 MB)
37 04:05:44.981680 progress 70 % (3 MB)
38 04:05:44.985280 progress 75 % (4 MB)
39 04:05:44.989269 progress 80 % (4 MB)
40 04:05:44.992847 progress 85 % (4 MB)
41 04:05:44.996762 progress 90 % (4 MB)
42 04:05:45.000621 progress 95 % (5 MB)
43 04:05:45.003892 progress 100 % (5 MB)
44 04:05:45.004574 5 MB downloaded in 0.13 s (40.08 MB/s)
45 04:05:45.005111 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:05:45.006012 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:05:45.006310 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:05:45.006585 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:05:45.007058 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/kernel/Image
51 04:05:45.007313 saving as /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/kernel/Image
52 04:05:45.007526 total size: 45713920 (43 MB)
53 04:05:45.007737 No compression specified
54 04:05:45.045966 progress 0 % (0 MB)
55 04:05:45.074169 progress 5 % (2 MB)
56 04:05:45.102408 progress 10 % (4 MB)
57 04:05:45.130410 progress 15 % (6 MB)
58 04:05:45.158795 progress 20 % (8 MB)
59 04:05:45.186319 progress 25 % (10 MB)
60 04:05:45.214427 progress 30 % (13 MB)
61 04:05:45.242694 progress 35 % (15 MB)
62 04:05:45.270813 progress 40 % (17 MB)
63 04:05:45.298520 progress 45 % (19 MB)
64 04:05:45.326462 progress 50 % (21 MB)
65 04:05:45.354665 progress 55 % (24 MB)
66 04:05:45.382602 progress 60 % (26 MB)
67 04:05:45.410366 progress 65 % (28 MB)
68 04:05:45.438241 progress 70 % (30 MB)
69 04:05:45.466511 progress 75 % (32 MB)
70 04:05:45.494555 progress 80 % (34 MB)
71 04:05:45.522455 progress 85 % (37 MB)
72 04:05:45.550806 progress 90 % (39 MB)
73 04:05:45.578795 progress 95 % (41 MB)
74 04:05:45.606070 progress 100 % (43 MB)
75 04:05:45.606606 43 MB downloaded in 0.60 s (72.77 MB/s)
76 04:05:45.607123 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:05:45.608013 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:05:45.608332 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:05:45.608622 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:05:45.609113 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 04:05:45.609407 saving as /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 04:05:45.609634 total size: 53209 (0 MB)
84 04:05:45.609858 No compression specified
85 04:05:45.651082 progress 61 % (0 MB)
86 04:05:45.651934 progress 100 % (0 MB)
87 04:05:45.652556 0 MB downloaded in 0.04 s (1.18 MB/s)
88 04:05:45.653075 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:05:45.653938 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:05:45.654228 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:05:45.654513 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:05:45.654984 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 04:05:45.655252 saving as /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/nfsrootfs/full.rootfs.tar
95 04:05:45.655474 total size: 120894716 (115 MB)
96 04:05:45.655696 Using unxz to decompress xz
97 04:05:45.694807 progress 0 % (0 MB)
98 04:05:46.480867 progress 5 % (5 MB)
99 04:05:47.355193 progress 10 % (11 MB)
100 04:05:48.315374 progress 15 % (17 MB)
101 04:05:49.204937 progress 20 % (23 MB)
102 04:05:49.812787 progress 25 % (28 MB)
103 04:05:50.629889 progress 30 % (34 MB)
104 04:05:51.414219 progress 35 % (40 MB)
105 04:05:51.776929 progress 40 % (46 MB)
106 04:05:52.160052 progress 45 % (51 MB)
107 04:05:52.870529 progress 50 % (57 MB)
108 04:05:53.746432 progress 55 % (63 MB)
109 04:05:54.519319 progress 60 % (69 MB)
110 04:05:55.269513 progress 65 % (74 MB)
111 04:05:56.040813 progress 70 % (80 MB)
112 04:05:56.858576 progress 75 % (86 MB)
113 04:05:57.643946 progress 80 % (92 MB)
114 04:05:58.403754 progress 85 % (98 MB)
115 04:05:59.256352 progress 90 % (103 MB)
116 04:06:00.029590 progress 95 % (109 MB)
117 04:06:00.870267 progress 100 % (115 MB)
118 04:06:00.882854 115 MB downloaded in 15.23 s (7.57 MB/s)
119 04:06:00.883426 end: 1.4.1 http-download (duration 00:00:15) [common]
121 04:06:00.884557 end: 1.4 download-retry (duration 00:00:15) [common]
122 04:06:00.885081 start: 1.5 download-retry (timeout 00:09:44) [common]
123 04:06:00.885593 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 04:06:00.886484 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/modules.tar.xz
125 04:06:00.886951 saving as /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/modules/modules.tar
126 04:06:00.887354 total size: 11613712 (11 MB)
127 04:06:00.887766 Using unxz to decompress xz
128 04:06:00.937665 progress 0 % (0 MB)
129 04:06:01.003772 progress 5 % (0 MB)
130 04:06:01.078721 progress 10 % (1 MB)
131 04:06:01.174404 progress 15 % (1 MB)
132 04:06:01.265962 progress 20 % (2 MB)
133 04:06:01.344426 progress 25 % (2 MB)
134 04:06:01.419116 progress 30 % (3 MB)
135 04:06:01.496373 progress 35 % (3 MB)
136 04:06:01.568700 progress 40 % (4 MB)
137 04:06:01.643870 progress 45 % (5 MB)
138 04:06:01.726687 progress 50 % (5 MB)
139 04:06:01.802272 progress 55 % (6 MB)
140 04:06:01.885706 progress 60 % (6 MB)
141 04:06:01.965306 progress 65 % (7 MB)
142 04:06:02.044361 progress 70 % (7 MB)
143 04:06:02.121378 progress 75 % (8 MB)
144 04:06:02.208098 progress 80 % (8 MB)
145 04:06:02.292367 progress 85 % (9 MB)
146 04:06:02.370588 progress 90 % (9 MB)
147 04:06:02.447535 progress 95 % (10 MB)
148 04:06:02.523353 progress 100 % (11 MB)
149 04:06:02.535128 11 MB downloaded in 1.65 s (6.72 MB/s)
150 04:06:02.536124 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:06:02.537902 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:06:02.538473 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 04:06:02.539049 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 04:06:18.715304 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/957161/extract-nfsrootfs-h_ndm_rb
156 04:06:18.715909 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 04:06:18.716237 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 04:06:18.716953 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek
159 04:06:18.717412 makedir: /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin
160 04:06:18.717746 makedir: /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/tests
161 04:06:18.718062 makedir: /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/results
162 04:06:18.718394 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-add-keys
163 04:06:18.718914 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-add-sources
164 04:06:18.719415 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-background-process-start
165 04:06:18.719901 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-background-process-stop
166 04:06:18.720489 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-common-functions
167 04:06:18.721006 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-echo-ipv4
168 04:06:18.721487 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-install-packages
169 04:06:18.721961 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-installed-packages
170 04:06:18.722424 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-os-build
171 04:06:18.722888 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-probe-channel
172 04:06:18.723361 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-probe-ip
173 04:06:18.723853 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-target-ip
174 04:06:18.724405 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-target-mac
175 04:06:18.724883 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-target-storage
176 04:06:18.725360 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-test-case
177 04:06:18.725835 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-test-event
178 04:06:18.726297 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-test-feedback
179 04:06:18.726820 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-test-raise
180 04:06:18.727293 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-test-reference
181 04:06:18.727792 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-test-runner
182 04:06:18.728332 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-test-set
183 04:06:18.728810 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-test-shell
184 04:06:18.729289 Updating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-add-keys (debian)
185 04:06:18.729813 Updating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-add-sources (debian)
186 04:06:18.730302 Updating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-install-packages (debian)
187 04:06:18.730795 Updating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-installed-packages (debian)
188 04:06:18.731277 Updating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/bin/lava-os-build (debian)
189 04:06:18.731703 Creating /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/environment
190 04:06:18.732090 LAVA metadata
191 04:06:18.732355 - LAVA_JOB_ID=957161
192 04:06:18.732570 - LAVA_DISPATCHER_IP=192.168.6.2
193 04:06:18.732929 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 04:06:18.733862 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 04:06:18.734172 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 04:06:18.734379 skipped lava-vland-overlay
197 04:06:18.734620 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 04:06:18.734875 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 04:06:18.735093 skipped lava-multinode-overlay
200 04:06:18.735334 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 04:06:18.735586 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 04:06:18.735833 Loading test definitions
203 04:06:18.736137 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 04:06:18.736362 Using /lava-957161 at stage 0
205 04:06:18.737444 uuid=957161_1.6.2.4.1 testdef=None
206 04:06:18.737749 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 04:06:18.738011 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 04:06:18.739535 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 04:06:18.740408 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 04:06:18.742323 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 04:06:18.743148 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 04:06:18.744987 runner path: /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/0/tests/0_timesync-off test_uuid 957161_1.6.2.4.1
215 04:06:18.745521 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 04:06:18.746331 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 04:06:18.746556 Using /lava-957161 at stage 0
219 04:06:18.746900 Fetching tests from https://github.com/kernelci/test-definitions.git
220 04:06:18.747184 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/0/tests/1_kselftest-rtc'
221 04:06:22.050272 Running '/usr/bin/git checkout kernelci.org
222 04:06:22.112999 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 04:06:22.114443 uuid=957161_1.6.2.4.5 testdef=None
224 04:06:22.114789 end: 1.6.2.4.5 git-repo-action (duration 00:00:03) [common]
226 04:06:22.115548 start: 1.6.2.4.6 test-overlay (timeout 00:09:23) [common]
227 04:06:22.118424 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 04:06:22.119260 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:23) [common]
230 04:06:22.123000 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 04:06:22.123870 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:23) [common]
233 04:06:22.127493 runner path: /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/0/tests/1_kselftest-rtc test_uuid 957161_1.6.2.4.5
234 04:06:22.127787 BOARD='meson-sm1-s905d3-libretech-cc'
235 04:06:22.128019 BRANCH='mainline'
236 04:06:22.128223 SKIPFILE='/dev/null'
237 04:06:22.128424 SKIP_INSTALL='True'
238 04:06:22.128621 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 04:06:22.128821 TST_CASENAME=''
240 04:06:22.129018 TST_CMDFILES='rtc'
241 04:06:22.129575 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 04:06:22.130381 Creating lava-test-runner.conf files
244 04:06:22.130590 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/957161/lava-overlay-i81vurek/lava-957161/0 for stage 0
245 04:06:22.130937 - 0_timesync-off
246 04:06:22.131180 - 1_kselftest-rtc
247 04:06:22.131511 end: 1.6.2.4 test-definition (duration 00:00:03) [common]
248 04:06:22.131793 start: 1.6.2.5 compress-overlay (timeout 00:09:23) [common]
249 04:06:45.296898 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 04:06:45.297368 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:00) [common]
251 04:06:45.297639 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 04:06:45.297913 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 04:06:45.298181 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:00) [common]
254 04:06:45.921637 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 04:06:45.922124 start: 1.6.4 extract-modules (timeout 00:08:59) [common]
256 04:06:45.922380 extracting modules file /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957161/extract-nfsrootfs-h_ndm_rb
257 04:06:47.288030 extracting modules file /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957161/extract-overlay-ramdisk-ou56ovr_/ramdisk
258 04:06:48.689862 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 04:06:48.690341 start: 1.6.5 apply-overlay-tftp (timeout 00:08:56) [common]
260 04:06:48.690621 [common] Applying overlay to NFS
261 04:06:48.690837 [common] Applying overlay /var/lib/lava/dispatcher/tmp/957161/compress-overlay-a7yxmv8q/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/957161/extract-nfsrootfs-h_ndm_rb
262 04:06:51.420157 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 04:06:51.420643 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 04:06:51.420918 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 04:06:51.421152 Converting downloaded kernel to a uImage
266 04:06:51.421464 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/kernel/Image /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/kernel/uImage
267 04:06:51.895391 output: Image Name:
268 04:06:51.895817 output: Created: Fri Nov 8 04:06:51 2024
269 04:06:51.896067 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 04:06:51.896280 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 04:06:51.896486 output: Load Address: 01080000
272 04:06:51.896690 output: Entry Point: 01080000
273 04:06:51.896891 output:
274 04:06:51.897226 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 04:06:51.897498 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 04:06:51.897768 start: 1.6.7 configure-preseed-file (timeout 00:08:53) [common]
277 04:06:51.898024 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 04:06:51.898284 start: 1.6.8 compress-ramdisk (timeout 00:08:53) [common]
279 04:06:51.898543 Building ramdisk /var/lib/lava/dispatcher/tmp/957161/extract-overlay-ramdisk-ou56ovr_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/957161/extract-overlay-ramdisk-ou56ovr_/ramdisk
280 04:06:54.048900 >> 166825 blocks
281 04:07:01.736337 Adding RAMdisk u-boot header.
282 04:07:01.737069 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/957161/extract-overlay-ramdisk-ou56ovr_/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/957161/extract-overlay-ramdisk-ou56ovr_/ramdisk.cpio.gz.uboot
283 04:07:01.991190 output: Image Name:
284 04:07:01.991609 output: Created: Fri Nov 8 04:07:01 2024
285 04:07:01.991823 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 04:07:01.992119 output: Data Size: 23432881 Bytes = 22883.67 KiB = 22.35 MiB
287 04:07:01.992538 output: Load Address: 00000000
288 04:07:01.992944 output: Entry Point: 00000000
289 04:07:01.993345 output:
290 04:07:01.994381 rename /var/lib/lava/dispatcher/tmp/957161/extract-overlay-ramdisk-ou56ovr_/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/ramdisk/ramdisk.cpio.gz.uboot
291 04:07:01.995093 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 04:07:01.995634 end: 1.6 prepare-tftp-overlay (duration 00:00:59) [common]
293 04:07:01.996200 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:43) [common]
294 04:07:01.996661 No LXC device requested
295 04:07:01.997159 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 04:07:01.997665 start: 1.8 deploy-device-env (timeout 00:08:43) [common]
297 04:07:01.998158 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 04:07:01.998569 Checking files for TFTP limit of 4294967296 bytes.
299 04:07:02.001249 end: 1 tftp-deploy (duration 00:01:17) [common]
300 04:07:02.001827 start: 2 uboot-action (timeout 00:05:00) [common]
301 04:07:02.002352 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 04:07:02.002854 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 04:07:02.003360 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 04:07:02.003888 Using kernel file from prepare-kernel: 957161/tftp-deploy-t6xhql9y/kernel/uImage
305 04:07:02.004549 substitutions:
306 04:07:02.004962 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 04:07:02.005370 - {DTB_ADDR}: 0x01070000
308 04:07:02.005773 - {DTB}: 957161/tftp-deploy-t6xhql9y/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 04:07:02.006182 - {INITRD}: 957161/tftp-deploy-t6xhql9y/ramdisk/ramdisk.cpio.gz.uboot
310 04:07:02.006583 - {KERNEL_ADDR}: 0x01080000
311 04:07:02.006978 - {KERNEL}: 957161/tftp-deploy-t6xhql9y/kernel/uImage
312 04:07:02.007374 - {LAVA_MAC}: None
313 04:07:02.007804 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/957161/extract-nfsrootfs-h_ndm_rb
314 04:07:02.008277 - {NFS_SERVER_IP}: 192.168.6.2
315 04:07:02.008679 - {PRESEED_CONFIG}: None
316 04:07:02.009075 - {PRESEED_LOCAL}: None
317 04:07:02.009471 - {RAMDISK_ADDR}: 0x08000000
318 04:07:02.009860 - {RAMDISK}: 957161/tftp-deploy-t6xhql9y/ramdisk/ramdisk.cpio.gz.uboot
319 04:07:02.010254 - {ROOT_PART}: None
320 04:07:02.010646 - {ROOT}: None
321 04:07:02.011036 - {SERVER_IP}: 192.168.6.2
322 04:07:02.011424 - {TEE_ADDR}: 0x83000000
323 04:07:02.011811 - {TEE}: None
324 04:07:02.012234 Parsed boot commands:
325 04:07:02.012620 - setenv autoload no
326 04:07:02.013005 - setenv initrd_high 0xffffffff
327 04:07:02.013392 - setenv fdt_high 0xffffffff
328 04:07:02.013777 - dhcp
329 04:07:02.014162 - setenv serverip 192.168.6.2
330 04:07:02.014549 - tftpboot 0x01080000 957161/tftp-deploy-t6xhql9y/kernel/uImage
331 04:07:02.014938 - tftpboot 0x08000000 957161/tftp-deploy-t6xhql9y/ramdisk/ramdisk.cpio.gz.uboot
332 04:07:02.015325 - tftpboot 0x01070000 957161/tftp-deploy-t6xhql9y/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 04:07:02.015712 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/957161/extract-nfsrootfs-h_ndm_rb,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 04:07:02.016141 - bootm 0x01080000 0x08000000 0x01070000
335 04:07:02.016644 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 04:07:02.018140 start: 2.3 connect-device (timeout 00:05:00) [common]
338 04:07:02.018556 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 04:07:02.033575 Setting prompt string to ['lava-test: # ']
340 04:07:02.035129 end: 2.3 connect-device (duration 00:00:00) [common]
341 04:07:02.035742 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 04:07:02.036362 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 04:07:02.036938 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 04:07:02.038089 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 04:07:02.075487 >> OK - accepted request
346 04:07:02.077659 Returned 0 in 0 seconds
347 04:07:02.178749 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 04:07:02.180366 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 04:07:02.180911 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 04:07:02.181411 Setting prompt string to ['Hit any key to stop autoboot']
352 04:07:02.181853 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 04:07:02.183427 Trying 192.168.56.21...
354 04:07:02.183899 Connected to conserv1.
355 04:07:02.184339 Escape character is '^]'.
356 04:07:02.184750
357 04:07:02.185166 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 04:07:02.185580
359 04:07:09.653161 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 04:07:09.653812 bl2_stage_init 0x01
361 04:07:09.654257 bl2_stage_init 0x81
362 04:07:09.658581 hw id: 0x0000 - pwm id 0x01
363 04:07:09.659063 bl2_stage_init 0xc1
364 04:07:09.664172 bl2_stage_init 0x02
365 04:07:09.664656
366 04:07:09.665094 L0:00000000
367 04:07:09.665511 L1:00000703
368 04:07:09.665924 L2:00008067
369 04:07:09.666334 L3:15000000
370 04:07:09.669689 S1:00000000
371 04:07:09.670161 B2:20282000
372 04:07:09.670568 B1:a0f83180
373 04:07:09.670980
374 04:07:09.671403 TE: 72936
375 04:07:09.671818
376 04:07:09.675327 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 04:07:09.675787
378 04:07:09.680917 Board ID = 1
379 04:07:09.681384 Set cpu clk to 24M
380 04:07:09.681797 Set clk81 to 24M
381 04:07:09.686440 Use GP1_pll as DSU clk.
382 04:07:09.686863 DSU clk: 1200 Mhz
383 04:07:09.687251 CPU clk: 1200 MHz
384 04:07:09.692010 Set clk81 to 166.6M
385 04:07:09.697580 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 04:07:09.698001 board id: 1
387 04:07:09.704871 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 04:07:09.715765 fw parse done
389 04:07:09.721741 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 04:07:09.764900 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 04:07:09.776147 PIEI prepare done
392 04:07:09.776574 fastboot data load
393 04:07:09.776970 fastboot data verify
394 04:07:09.781586 verify result: 266
395 04:07:09.787201 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 04:07:09.787622 LPDDR4 probe
397 04:07:09.788055 ddr clk to 1584MHz
398 04:07:09.795253 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 04:07:09.832948
400 04:07:09.833400 dmc_version 0001
401 04:07:09.840042 Check phy result
402 04:07:09.846003 INFO : End of CA training
403 04:07:09.846433 INFO : End of initialization
404 04:07:09.851622 INFO : Training has run successfully!
405 04:07:09.852071 Check phy result
406 04:07:09.857130 INFO : End of initialization
407 04:07:09.857544 INFO : End of read enable training
408 04:07:09.862830 INFO : End of fine write leveling
409 04:07:09.868424 INFO : End of Write leveling coarse delay
410 04:07:09.868862 INFO : Training has run successfully!
411 04:07:09.869266 Check phy result
412 04:07:09.874039 INFO : End of initialization
413 04:07:09.874469 INFO : End of read dq deskew training
414 04:07:09.879601 INFO : End of MPR read delay center optimization
415 04:07:09.885181 INFO : End of write delay center optimization
416 04:07:09.890810 INFO : End of read delay center optimization
417 04:07:09.891255 INFO : End of max read latency training
418 04:07:09.896437 INFO : Training has run successfully!
419 04:07:09.896862 1D training succeed
420 04:07:09.905608 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 04:07:09.953841 Check phy result
422 04:07:09.954281 INFO : End of initialization
423 04:07:09.981214 INFO : End of 2D read delay Voltage center optimization
424 04:07:10.005401 INFO : End of 2D read delay Voltage center optimization
425 04:07:10.062139 INFO : End of 2D write delay Voltage center optimization
426 04:07:10.116218 INFO : End of 2D write delay Voltage center optimization
427 04:07:10.121746 INFO : Training has run successfully!
428 04:07:10.122182
429 04:07:10.122594 channel==0
430 04:07:10.127242 RxClkDly_Margin_A0==78 ps 8
431 04:07:10.127670 TxDqDly_Margin_A0==98 ps 10
432 04:07:10.132929 RxClkDly_Margin_A1==88 ps 9
433 04:07:10.133354 TxDqDly_Margin_A1==88 ps 9
434 04:07:10.133757 TrainedVREFDQ_A0==77
435 04:07:10.138473 TrainedVREFDQ_A1==74
436 04:07:10.138898 VrefDac_Margin_A0==23
437 04:07:10.139297 DeviceVref_Margin_A0==37
438 04:07:10.144062 VrefDac_Margin_A1==23
439 04:07:10.144494 DeviceVref_Margin_A1==40
440 04:07:10.144893
441 04:07:10.145289
442 04:07:10.145681 channel==1
443 04:07:10.149692 RxClkDly_Margin_A0==88 ps 9
444 04:07:10.150120 TxDqDly_Margin_A0==98 ps 10
445 04:07:10.155314 RxClkDly_Margin_A1==78 ps 8
446 04:07:10.155739 TxDqDly_Margin_A1==88 ps 9
447 04:07:10.160918 TrainedVREFDQ_A0==78
448 04:07:10.161349 TrainedVREFDQ_A1==75
449 04:07:10.161751 VrefDac_Margin_A0==23
450 04:07:10.166446 DeviceVref_Margin_A0==36
451 04:07:10.166885 VrefDac_Margin_A1==22
452 04:07:10.172080 DeviceVref_Margin_A1==39
453 04:07:10.172508
454 04:07:10.172916 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 04:07:10.173313
456 04:07:10.205636 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 04:07:10.206156 2D training succeed
458 04:07:10.211224 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 04:07:10.216814 auto size-- 65535DDR cs0 size: 2048MB
460 04:07:10.217245 DDR cs1 size: 2048MB
461 04:07:10.222407 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 04:07:10.222834 cs0 DataBus test pass
463 04:07:10.228046 cs1 DataBus test pass
464 04:07:10.228474 cs0 AddrBus test pass
465 04:07:10.228877 cs1 AddrBus test pass
466 04:07:10.229274
467 04:07:10.233627 100bdlr_step_size ps== 464
468 04:07:10.234067 result report
469 04:07:10.239220 boot times 0Enable ddr reg access
470 04:07:10.244410 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 04:07:10.258273 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 04:07:10.918418 bl2z: ptr: 05129330, size: 00001e40
473 04:07:10.925579 0.0;M3 CHK:0;cm4_sp_mode 0
474 04:07:10.926038 MVN_1=0x00000000
475 04:07:10.926450 MVN_2=0x00000000
476 04:07:10.937188 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 04:07:10.937640 OPS=0x04
478 04:07:10.938054 ring efuse init
479 04:07:10.942811 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 04:07:10.943266 [0.017354 Inits done]
481 04:07:10.943675 secure task start!
482 04:07:10.950769 high task start!
483 04:07:10.951203 low task start!
484 04:07:10.951610 run into bl31
485 04:07:10.959402 NOTICE: BL31: v1.3(release):4fc40b1
486 04:07:10.967219 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 04:07:10.967658 NOTICE: BL31: G12A normal boot!
488 04:07:10.982800 NOTICE: BL31: BL33 decompress pass
489 04:07:12.201597 ERROR: Error initializing runtime service opteed_fast SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
490 04:07:12.202224 bl2_stage_init 0x01
491 04:07:12.202653 bl2_stage_init 0x81
492 04:07:12.207166 hw id: 0x0000 - pwm id 0x01
493 04:07:12.207642 bl2_stage_init 0xc1
494 04:07:12.208115 bl2_stage_init 0x02
495 04:07:12.208524
496 04:07:12.212747 L0:00000000
497 04:07:12.213209 L1:00000703
498 04:07:12.213601 L2:00008067
499 04:07:12.213987 L3:15000000
500 04:07:12.214371 S1:00000000
501 04:07:12.218340 B2:20282000
502 04:07:12.218755 B1:a0f83180
503 04:07:12.219141
504 04:07:12.219526 TE: 70665
505 04:07:12.219911
506 04:07:12.223930 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
507 04:07:12.224374
508 04:07:12.229571 Board ID = 1
509 04:07:12.229983 Set cpu clk to 24M
510 04:07:12.230378 Set clk81 to 24M
511 04:07:12.235116 Use GP1_pll as DSU clk.
512 04:07:12.235527 DSU clk: 1200 Mhz
513 04:07:12.235911 CPU clk: 1200 MHz
514 04:07:12.236328 Set clk81 to 166.6M
515 04:07:12.246313 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
516 04:07:12.246726 board id: 1
517 04:07:12.252771 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
518 04:07:12.263647 fw parse done
519 04:07:12.269655 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
520 04:07:12.312859 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
521 04:07:12.323910 PIEI prepare done
522 04:07:12.324402 fastboot data load
523 04:07:12.324796 fastboot data verify
524 04:07:12.329501 verify result: 266
525 04:07:12.335115 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
526 04:07:12.335579 LPDDR4 probe
527 04:07:12.336028 ddr clk to 1584MHz
528 04:07:13.700484 Load ddrfw from SPI, src: 0x0001� SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
529 04:07:13.701138 bl2_stage_init 0x01
530 04:07:13.701566 bl2_stage_init 0x81
531 04:07:13.705993 hw id: 0x0000 - pwm id 0x01
532 04:07:13.706432 bl2_stage_init 0xc1
533 04:07:13.711585 bl2_stage_init 0x02
534 04:07:13.712058
535 04:07:13.712481 L0:00000000
536 04:07:13.712885 L1:00000703
537 04:07:13.713285 L2:00008067
538 04:07:13.713684 L3:15000000
539 04:07:13.717195 S1:00000000
540 04:07:13.717624 B2:20282000
541 04:07:13.718025 B1:a0f83180
542 04:07:13.718420
543 04:07:13.718815 TE: 69196
544 04:07:13.719212
545 04:07:13.722790 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
546 04:07:13.723228
547 04:07:13.728391 Board ID = 1
548 04:07:13.728814 Set cpu clk to 24M
549 04:07:13.729217 Set clk81 to 24M
550 04:07:13.733978 Use GP1_pll as DSU clk.
551 04:07:13.734405 DSU clk: 1200 Mhz
552 04:07:13.734808 CPU clk: 1200 MHz
553 04:07:13.739619 Set clk81 to 166.6M
554 04:07:13.745192 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
555 04:07:13.745620 board id: 1
556 04:07:13.752387 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
557 04:07:13.763038 fw parse done
558 04:07:13.769004 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
559 04:07:13.811657 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
560 04:07:13.822646 PIEI prepare done
561 04:07:13.823074 fastboot data load
562 04:07:13.823478 fastboot data verify
563 04:07:13.828253 verify result: 266
564 04:07:13.833902 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
565 04:07:13.834329 LPDDR4 probe
566 04:07:13.834732 ddr clk to 1584MHz
567 04:07:13.841779 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
568 04:07:13.879038
569 04:07:13.879468 dmc_version 0001
570 04:07:13.885725 Check phy result
571 04:07:13.891689 INFO : End of CA training
572 04:07:13.892144 INFO : End of initialization
573 04:07:13.897238 INFO : Training has run successfully!
574 04:07:13.897658 Check phy result
575 04:07:13.902886 INFO : End of initialization
576 04:07:13.903302 INFO : End of read enable training
577 04:07:13.908420 INFO : End of fine write leveling
578 04:07:13.914026 INFO : End of Write leveling coarse delay
579 04:07:13.914455 INFO : Training has run successfully!
580 04:07:13.914856 Check phy result
581 04:07:13.919625 INFO : End of initialization
582 04:07:13.920083 INFO : End of read dq deskew training
583 04:07:13.925226 INFO : End of MPR read delay center optimization
584 04:07:13.930876 INFO : End of write delay center optimization
585 04:07:13.936424 INFO : End of read delay center optimization
586 04:07:13.936870 INFO : End of max read latency training
587 04:07:13.942018 INFO : Training has run successfully!
588 04:07:13.942455 1D training succeed
589 04:07:13.951196 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
590 04:07:13.998849 Check phy result
591 04:07:13.999282 INFO : End of initialization
592 04:07:14.021216 INFO : End of 2D read delay Voltage center optimization
593 04:07:14.040336 INFO : End of 2D read delay Voltage center optimization
594 04:07:14.092326 INFO : End of 2D write delay Voltage center optimization
595 04:07:14.141373 INFO : End of 2D write delay Voltage center optimization
596 04:07:14.146949 INFO : Training has run successfully!
597 04:07:14.147372
598 04:07:14.147781 channel==0
599 04:07:14.152529 RxClkDly_Margin_A0==78 ps 8
600 04:07:14.152956 TxDqDly_Margin_A0==98 ps 10
601 04:07:14.158124 RxClkDly_Margin_A1==69 ps 7
602 04:07:14.158548 TxDqDly_Margin_A1==98 ps 10
603 04:07:14.158956 TrainedVREFDQ_A0==74
604 04:07:14.163722 TrainedVREFDQ_A1==75
605 04:07:14.164180 VrefDac_Margin_A0==23
606 04:07:14.164581 DeviceVref_Margin_A0==40
607 04:07:14.169336 VrefDac_Margin_A1==22
608 04:07:14.169761 DeviceVref_Margin_A1==39
609 04:07:14.170160
610 04:07:14.170562
611 04:07:14.174940 channel==1
612 04:07:14.175365 RxClkDly_Margin_A0==88 ps 9
613 04:07:14.175767 TxDqDly_Margin_A0==98 ps 10
614 04:07:14.180526 RxClkDly_Margin_A1==78 ps 8
615 04:07:14.180948 TxDqDly_Margin_A1==88 ps 9
616 04:07:14.186163 TrainedVREFDQ_A0==78
617 04:07:14.186590 TrainedVREFDQ_A1==77
618 04:07:14.186991 VrefDac_Margin_A0==22
619 04:07:14.191813 DeviceVref_Margin_A0==36
620 04:07:14.192261 VrefDac_Margin_A1==22
621 04:07:14.197349 DeviceVref_Margin_A1==37
622 04:07:14.197797
623 04:07:14.198201 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
624 04:07:14.198598
625 04:07:14.230939 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
626 04:07:14.231409 2D training succeed
627 04:07:14.236518 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
628 04:07:14.242120 auto size-- 65535DDR cs0 size: 2048MB
629 04:07:14.242546 DDR cs1 size: 2048MB
630 04:07:14.247734 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
631 04:07:14.248195 cs0 DataBus test pass
632 04:07:14.253351 cs1 DataBus test pass
633 04:07:14.253780 cs0 AddrBus test pass
634 04:07:14.254180 cs1 AddrBus test pass
635 04:07:14.254573
636 04:07:14.258986 100bdlr_step_size ps== 478
637 04:07:14.259428 result report
638 04:07:14.264532 boot times 0Enable ddr reg access
639 04:07:14.269791 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
640 04:07:14.283625 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
641 04:07:14.939901 bl2z: ptr: 05129330, size: 00001e40
642 04:07:14.945772 0.0;M3 CHK:0;cm4_sp_mode 0
643 04:07:14.946236 MVN_1=0x00000000
644 04:07:14.946652 MVN_2=0x00000000
645 04:07:14.957302 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
646 04:07:14.957759 OPS=0x04
647 04:07:14.958175 ring efuse init
648 04:07:14.962945 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
649 04:07:14.963401 [0.017319 Inits done]
650 04:07:14.963813 secure task start!
651 04:07:14.970773 high task start!
652 04:07:14.971220 low task start!
653 04:07:14.971623 run into bl31
654 04:07:14.979375 NOTICE: BL31: v1.3(release):4fc40b1
655 04:07:14.987180 NOTICE: BL31: Built : 15:57:33, May 22 2019
656 04:07:14.987623 NOTICE: BL31: G12A normal boot!
657 04:07:15.002766 NOTICE: BL31: BL33 decompress pass
658 04:07:15.008416 ERROR: Error initializing runtime service opteed_fast
659 04:07:16.402902 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
660 04:07:16.403531 bl2_stage_init 0x01
661 04:07:16.403975 bl2_stage_init 0x81
662 04:07:16.408308 hw id: 0x0000 - pwm id 0x01
663 04:07:16.408761 bl2_stage_init 0xc1
664 04:07:16.412625 bl2_stage_init 0x02
665 04:07:16.413070
666 04:07:16.413490 L0:00000000
667 04:07:16.413894 L1:00000703
668 04:07:16.414300 L2:00008067
669 04:07:16.418231 L3:15000000
670 04:07:16.418689 S1:00000000
671 04:07:16.419094 B2:20282000
672 04:07:16.419492 B1:a0f83180
673 04:07:16.419889
674 04:07:16.420327 TE: 72508
675 04:07:16.423770
676 04:07:16.429368 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
677 04:07:16.429808
678 04:07:16.430214 Board ID = 1
679 04:07:16.430613 Set cpu clk to 24M
680 04:07:16.431008 Set clk81 to 24M
681 04:07:16.434946 Use GP1_pll as DSU clk.
682 04:07:16.435381 DSU clk: 1200 Mhz
683 04:07:16.435784 CPU clk: 1200 MHz
684 04:07:16.440540 Set clk81 to 166.6M
685 04:07:16.446213 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
686 04:07:16.446649 board id: 1
687 04:07:16.454572 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
688 04:07:16.465427 fw parse done
689 04:07:16.471461 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
690 04:07:16.514570 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
691 04:07:16.525756 PIEI prepare done
692 04:07:16.526217 fastboot data load
693 04:07:16.526628 fastboot data verify
694 04:07:16.531314 verify result: 266
695 04:07:16.536923 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
696 04:07:16.537375 LPDDR4 probe
697 04:07:16.537780 ddr clk to 1584MHz
698 04:07:16.544913 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
699 04:07:16.582698
700 04:07:16.583180 dmc_version 0001
701 04:07:16.589738 Check phy result
702 04:07:16.595747 INFO : End of CA training
703 04:07:16.596217 INFO : End of initialization
704 04:07:16.601409 INFO : Training has run successfully!
705 04:07:16.601843 Check phy result
706 04:07:16.606973 INFO : End of initialization
707 04:07:16.607397 INFO : End of read enable training
708 04:07:16.610179 INFO : End of fine write leveling
709 04:07:16.615756 INFO : End of Write leveling coarse delay
710 04:07:16.621350 INFO : Training has run successfully!
711 04:07:16.621782 Check phy result
712 04:07:16.622187 INFO : End of initialization
713 04:07:16.626892 INFO : End of read dq deskew training
714 04:07:16.630349 INFO : End of MPR read delay center optimization
715 04:07:16.635905 INFO : End of write delay center optimization
716 04:07:16.641534 INFO : End of read delay center optimization
717 04:07:16.641969 INFO : End of max read latency training
718 04:07:16.647069 INFO : Training has run successfully!
719 04:07:16.647494 1D training succeed
720 04:07:16.655321 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
721 04:07:16.703580 Check phy result
722 04:07:16.704045 INFO : End of initialization
723 04:07:16.730919 INFO : End of 2D read delay Voltage center optimization
724 04:07:16.755158 INFO : End of 2D read delay Voltage center optimization
725 04:07:16.811958 INFO : End of 2D write delay Voltage center optimization
726 04:07:16.865854 INFO : End of 2D write delay Voltage center optimization
727 04:07:16.871371 INFO : Training has run successfully!
728 04:07:16.871800
729 04:07:16.872249 channel==0
730 04:07:16.877042 RxClkDly_Margin_A0==78 ps 8
731 04:07:16.877467 TxDqDly_Margin_A0==98 ps 10
732 04:07:16.880372 RxClkDly_Margin_A1==78 ps 8
733 04:07:16.880796 TxDqDly_Margin_A1==98 ps 10
734 04:07:16.885867 TrainedVREFDQ_A0==74
735 04:07:16.886292 TrainedVREFDQ_A1==75
736 04:07:16.891461 VrefDac_Margin_A0==23
737 04:07:16.891885 DeviceVref_Margin_A0==40
738 04:07:16.892331 VrefDac_Margin_A1==23
739 04:07:16.897020 DeviceVref_Margin_A1==39
740 04:07:16.897446
741 04:07:16.897848
742 04:07:16.898247 channel==1
743 04:07:16.898634 RxClkDly_Margin_A0==78 ps 8
744 04:07:16.900606 TxDqDly_Margin_A0==98 ps 10
745 04:07:16.906227 RxClkDly_Margin_A1==78 ps 8
746 04:07:16.906654 TxDqDly_Margin_A1==88 ps 9
747 04:07:16.907058 TrainedVREFDQ_A0==78
748 04:07:16.911683 TrainedVREFDQ_A1==78
749 04:07:16.912142 VrefDac_Margin_A0==22
750 04:07:16.917324 DeviceVref_Margin_A0==36
751 04:07:16.917746 VrefDac_Margin_A1==22
752 04:07:16.918141 DeviceVref_Margin_A1==36
753 04:07:16.918535
754 04:07:16.922869 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
755 04:07:16.923297
756 04:07:16.957585 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
757 04:07:16.958069 2D training succeed
758 04:07:16.962150 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
759 04:07:16.967722 auto size-- 65535DDR cs0 size: 2048MB
760 04:07:16.968189 DDR cs1 size: 2048MB
761 04:07:16.973357 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
762 04:07:16.973783 cs0 DataBus test pass
763 04:07:16.974185 cs1 DataBus test pass
764 04:07:16.978907 cs0 AddrBus test pass
765 04:07:16.979337 cs1 AddrBus test pass
766 04:07:16.979736
767 04:07:16.984515 100bdlr_step_size ps== 485
768 04:07:16.984953 result report
769 04:07:16.985351 boot times 0Enable ddr reg access
770 04:07:16.994266 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
771 04:07:17.008088 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
772 04:07:17.667925 bl2z: ptr: 05129330, size: 00001e40
773 04:07:17.675267 0.0;M3 CHK:0;cm4_sp_mode 0
774 04:07:17.675765 MVN_1=0x00000000
775 04:07:17.676207 MVN_2=0x00000000
776 04:07:17.686749 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
777 04:07:17.687250 OPS=0x04
778 04:07:17.687650 ring efuse init
779 04:07:17.689660 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
780 04:07:17.695336 [0.017354 Inits done]
781 04:07:17.695779 secure task start!
782 04:07:17.696210 high task start!
783 04:07:17.696598 low task start!
784 04:07:17.699572 run into bl31
785 04:07:17.708232 NOTICE: BL31: v1.3(release):4fc40b1
786 04:07:17.716034 NOTICE: BL31: Built : 15:57:33, May 22 2019
787 04:07:17.716460 NOTICE: BL31: G12A normal boot!
788 04:07:17.731568 NOTICE: BL31: BL33 decompress pass
789 04:07:17.737250 ERROR: Error initializing runtime service opteed_fast
790 04:07:18.532790
791 04:07:18.533419
792 04:07:18.538057 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
793 04:07:18.538524
794 04:07:18.541577 Model: Libre Computer AML-S905D3-CC Solitude
795 04:07:18.687710 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
796 04:07:18.703052 DRAM: 2 GiB (effective 3.8 GiB)
797 04:07:18.804966 Core: 406 devices, 33 uclasses, devicetree: separate
798 04:07:18.810849 WDT: Not starting watchdog@f0d0
799 04:07:18.835921 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
800 04:07:18.848153 Loading Environment from FAT... Card did not respond to voltage select! : -110
801 04:07:18.852192 ** Bad device specification mmc 0 **
802 04:07:18.863166 Card did not respond to voltage select! : -110
803 04:07:18.869951 ** Bad device specification mmc 0 **
804 04:07:18.870377 Couldn't find partition mmc 0
805 04:07:18.879160 Card did not respond to voltage select! : -110
806 04:07:18.884691 ** Bad device specification mmc 0 **
807 04:07:18.885122 Couldn't find partition mmc 0
808 04:07:18.888850 Error: could not access storage.
809 04:07:19.186202 Net: eth0: ethernet@ff3f0000
810 04:07:19.186726 starting USB...
811 04:07:19.432079 Bus usb@ff500000: Register 3000140 NbrPorts 3
812 04:07:19.432689 Starting the controller
813 04:07:19.438827 USB XHCI 1.10
814 04:07:20.993138 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
815 04:07:21.001378 scanning usb for storage devices... 0 Storage Device(s) found
817 04:07:21.052943 Hit any key to stop autoboot: 1
818 04:07:21.053802 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
819 04:07:21.054406 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
820 04:07:21.054897 Setting prompt string to ['=>']
821 04:07:21.055373 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
822 04:07:21.068544 0
823 04:07:21.069678 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
825 04:07:21.171078 => setenv autoload no
826 04:07:21.172202 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
827 04:07:21.177161 setenv autoload no
829 04:07:21.278707 => setenv initrd_high 0xffffffff
830 04:07:21.279433 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
831 04:07:21.283788 setenv initrd_high 0xffffffff
833 04:07:21.385471 => setenv fdt_high 0xffffffff
834 04:07:21.386272 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
835 04:07:21.390625 setenv fdt_high 0xffffffff
837 04:07:21.492164 => dhcp
838 04:07:21.492908 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
839 04:07:21.497016 dhcp
840 04:07:21.952254 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
841 04:07:21.952872 Speed: 1000, full duplex
842 04:07:21.953275 BOOTP broadcast 1
843 04:07:22.200514 BOOTP broadcast 2
844 04:07:22.215817 DHCP client bound to address 192.168.6.21 (263 ms)
846 04:07:22.317219 => setenv serverip 192.168.6.2
847 04:07:22.317779 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
848 04:07:22.322253 setenv serverip 192.168.6.2
850 04:07:22.423684 => tftpboot 0x01080000 957161/tftp-deploy-t6xhql9y/kernel/uImage
851 04:07:22.424479 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
852 04:07:22.431167 tftpboot 0x01080000 957161/tftp-deploy-t6xhql9y/kernel/uImage
853 04:07:22.431616 Speed: 1000, full duplex
854 04:07:22.432051 Using ethernet@ff3f0000 device
855 04:07:22.436645 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
856 04:07:22.442219 Filename '957161/tftp-deploy-t6xhql9y/kernel/uImage'.
857 04:07:22.446101 Load address: 0x1080000
858 04:07:25.269452 Loading: *################################################## 43.6 MiB
859 04:07:25.270138 15.4 MiB/s
860 04:07:25.270622 done
861 04:07:25.274007 Bytes transferred = 45713984 (2b98a40 hex)
863 04:07:25.375628 => tftpboot 0x08000000 957161/tftp-deploy-t6xhql9y/ramdisk/ramdisk.cpio.gz.uboot
864 04:07:25.376395 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
865 04:07:25.383166 tftpboot 0x08000000 957161/tftp-deploy-t6xhql9y/ramdisk/ramdisk.cpio.gz.uboot
866 04:07:25.383701 Speed: 1000, full duplex
867 04:07:25.384185 Using ethernet@ff3f0000 device
868 04:07:25.388698 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
869 04:07:25.398394 Filename '957161/tftp-deploy-t6xhql9y/ramdisk/ramdisk.cpio.gz.uboot'.
870 04:07:25.398927 Load address: 0x8000000
871 04:07:26.873062 Loading: *################################################# UDP wrong checksum 00000005 0000a044
872 04:07:31.874374 T UDP wrong checksum 00000005 0000a044
873 04:07:41.876301 T T UDP wrong checksum 00000005 0000a044
874 04:07:58.239323 T T T UDP wrong checksum 000000ff 000003c8
875 04:07:58.299584 UDP wrong checksum 000000ff 00009fba
876 04:08:01.880365 T UDP wrong checksum 00000005 0000a044
877 04:08:21.884244 T T T
878 04:08:21.884836 Retry count exceeded; starting again
880 04:08:21.886246 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
883 04:08:21.888145 end: 2.4 uboot-commands (duration 00:01:20) [common]
885 04:08:21.889582 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
887 04:08:21.890623 end: 2 uboot-action (duration 00:01:20) [common]
889 04:08:21.892192 Cleaning after the job
890 04:08:21.892747 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/ramdisk
891 04:08:21.893971 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/kernel
892 04:08:21.937173 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/dtb
893 04:08:21.937884 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/nfsrootfs
894 04:08:22.108986 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957161/tftp-deploy-t6xhql9y/modules
895 04:08:22.130943 start: 4.1 power-off (timeout 00:00:30) [common]
896 04:08:22.131594 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
897 04:08:22.162860 >> OK - accepted request
898 04:08:22.165078 Returned 0 in 0 seconds
899 04:08:22.265988 end: 4.1 power-off (duration 00:00:00) [common]
901 04:08:22.267108 start: 4.2 read-feedback (timeout 00:10:00) [common]
902 04:08:22.267891 Listened to connection for namespace 'common' for up to 1s
903 04:08:23.268823 Finalising connection for namespace 'common'
904 04:08:23.269376 Disconnecting from shell: Finalise
905 04:08:23.269748 =>
906 04:08:23.370522 end: 4.2 read-feedback (duration 00:00:01) [common]
907 04:08:23.370943 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/957161
908 04:08:26.783305 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/957161
909 04:08:26.784072 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.