Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:09:05.035145 lava-dispatcher, installed at version: 2024.01
2 04:09:05.035996 start: 0 validate
3 04:09:05.036484 Start time: 2024-11-08 04:09:05.036453+00:00 (UTC)
4 04:09:05.037051 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:09:05.037609 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:09:05.077439 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:09:05.077996 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:09:05.116791 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:09:05.117439 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 04:09:05.155510 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:09:05.156014 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:09:05.189014 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:09:05.189560 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-169-g906bd684e4b1e%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:09:05.235915 validate duration: 0.20
16 04:09:05.237251 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:09:05.237610 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:09:05.238263 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:09:05.239316 Not decompressing ramdisk as can be used compressed.
20 04:09:05.240316 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 04:09:05.240933 saving as /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/ramdisk/initrd.cpio.gz
22 04:09:05.241493 total size: 5628140 (5 MB)
23 04:09:05.285739 progress 0 % (0 MB)
24 04:09:05.293980 progress 5 % (0 MB)
25 04:09:05.301052 progress 10 % (0 MB)
26 04:09:05.304797 progress 15 % (0 MB)
27 04:09:05.308812 progress 20 % (1 MB)
28 04:09:05.312510 progress 25 % (1 MB)
29 04:09:05.316594 progress 30 % (1 MB)
30 04:09:05.320724 progress 35 % (1 MB)
31 04:09:05.324450 progress 40 % (2 MB)
32 04:09:05.328470 progress 45 % (2 MB)
33 04:09:05.332170 progress 50 % (2 MB)
34 04:09:05.336166 progress 55 % (2 MB)
35 04:09:05.340140 progress 60 % (3 MB)
36 04:09:05.343791 progress 65 % (3 MB)
37 04:09:05.347719 progress 70 % (3 MB)
38 04:09:05.351341 progress 75 % (4 MB)
39 04:09:05.355364 progress 80 % (4 MB)
40 04:09:05.358797 progress 85 % (4 MB)
41 04:09:05.362544 progress 90 % (4 MB)
42 04:09:05.366224 progress 95 % (5 MB)
43 04:09:05.369580 progress 100 % (5 MB)
44 04:09:05.370279 5 MB downloaded in 0.13 s (41.68 MB/s)
45 04:09:05.370880 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:09:05.371824 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:09:05.372184 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:09:05.372490 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:09:05.372990 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/kernel/Image
51 04:09:05.373271 saving as /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/kernel/Image
52 04:09:05.373514 total size: 45713920 (43 MB)
53 04:09:05.373771 No compression specified
54 04:09:05.406681 progress 0 % (0 MB)
55 04:09:05.433583 progress 5 % (2 MB)
56 04:09:05.460986 progress 10 % (4 MB)
57 04:09:05.487959 progress 15 % (6 MB)
58 04:09:05.515048 progress 20 % (8 MB)
59 04:09:05.542111 progress 25 % (10 MB)
60 04:09:05.569149 progress 30 % (13 MB)
61 04:09:05.596090 progress 35 % (15 MB)
62 04:09:05.623070 progress 40 % (17 MB)
63 04:09:05.649993 progress 45 % (19 MB)
64 04:09:05.676854 progress 50 % (21 MB)
65 04:09:05.703813 progress 55 % (24 MB)
66 04:09:05.730844 progress 60 % (26 MB)
67 04:09:05.757990 progress 65 % (28 MB)
68 04:09:05.785187 progress 70 % (30 MB)
69 04:09:05.812144 progress 75 % (32 MB)
70 04:09:05.839581 progress 80 % (34 MB)
71 04:09:05.867212 progress 85 % (37 MB)
72 04:09:05.895000 progress 90 % (39 MB)
73 04:09:05.921935 progress 95 % (41 MB)
74 04:09:05.948369 progress 100 % (43 MB)
75 04:09:05.948926 43 MB downloaded in 0.58 s (75.77 MB/s)
76 04:09:05.949423 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:09:05.950273 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:09:05.950574 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:09:05.950862 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:09:05.951345 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 04:09:05.951628 saving as /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 04:09:05.951846 total size: 53209 (0 MB)
84 04:09:05.952098 No compression specified
85 04:09:05.986362 progress 61 % (0 MB)
86 04:09:05.987733 progress 100 % (0 MB)
87 04:09:05.988466 0 MB downloaded in 0.04 s (1.39 MB/s)
88 04:09:05.989057 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:09:05.990086 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:09:05.990426 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:09:05.990765 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:09:05.991328 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 04:09:05.991649 saving as /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/nfsrootfs/full.rootfs.tar
95 04:09:05.991922 total size: 474398908 (452 MB)
96 04:09:05.992228 Using unxz to decompress xz
97 04:09:06.026805 progress 0 % (0 MB)
98 04:09:07.109430 progress 5 % (22 MB)
99 04:09:08.541544 progress 10 % (45 MB)
100 04:09:08.965501 progress 15 % (67 MB)
101 04:09:09.749951 progress 20 % (90 MB)
102 04:09:10.284180 progress 25 % (113 MB)
103 04:09:10.628330 progress 30 % (135 MB)
104 04:09:11.229057 progress 35 % (158 MB)
105 04:09:12.154629 progress 40 % (181 MB)
106 04:09:13.014496 progress 45 % (203 MB)
107 04:09:13.719298 progress 50 % (226 MB)
108 04:09:14.356588 progress 55 % (248 MB)
109 04:09:15.571516 progress 60 % (271 MB)
110 04:09:17.045663 progress 65 % (294 MB)
111 04:09:18.725687 progress 70 % (316 MB)
112 04:09:21.834295 progress 75 % (339 MB)
113 04:09:24.273034 progress 80 % (361 MB)
114 04:09:27.151531 progress 85 % (384 MB)
115 04:09:30.292304 progress 90 % (407 MB)
116 04:09:33.465411 progress 95 % (429 MB)
117 04:09:36.613886 progress 100 % (452 MB)
118 04:09:36.626809 452 MB downloaded in 30.63 s (14.77 MB/s)
119 04:09:36.627743 end: 1.4.1 http-download (duration 00:00:31) [common]
121 04:09:36.629558 end: 1.4 download-retry (duration 00:00:31) [common]
122 04:09:36.630120 start: 1.5 download-retry (timeout 00:09:29) [common]
123 04:09:36.630675 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 04:09:36.631512 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm64/defconfig/gcc-12/modules.tar.xz
125 04:09:36.632032 saving as /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/modules/modules.tar
126 04:09:36.632482 total size: 11613712 (11 MB)
127 04:09:36.632939 Using unxz to decompress xz
128 04:09:36.674587 progress 0 % (0 MB)
129 04:09:36.740750 progress 5 % (0 MB)
130 04:09:36.814727 progress 10 % (1 MB)
131 04:09:36.910176 progress 15 % (1 MB)
132 04:09:37.003116 progress 20 % (2 MB)
133 04:09:37.083023 progress 25 % (2 MB)
134 04:09:37.158247 progress 30 % (3 MB)
135 04:09:37.236604 progress 35 % (3 MB)
136 04:09:37.309843 progress 40 % (4 MB)
137 04:09:37.387077 progress 45 % (5 MB)
138 04:09:37.472004 progress 50 % (5 MB)
139 04:09:37.549531 progress 55 % (6 MB)
140 04:09:37.634508 progress 60 % (6 MB)
141 04:09:37.714997 progress 65 % (7 MB)
142 04:09:37.795630 progress 70 % (7 MB)
143 04:09:37.873634 progress 75 % (8 MB)
144 04:09:37.956224 progress 80 % (8 MB)
145 04:09:38.035555 progress 85 % (9 MB)
146 04:09:38.113793 progress 90 % (9 MB)
147 04:09:38.191422 progress 95 % (10 MB)
148 04:09:38.267863 progress 100 % (11 MB)
149 04:09:38.279639 11 MB downloaded in 1.65 s (6.72 MB/s)
150 04:09:38.280575 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:09:38.282177 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:09:38.282691 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 04:09:38.283201 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 04:09:54.286910 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/957163/extract-nfsrootfs-pirhrgbb
156 04:09:54.287484 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 04:09:54.287771 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 04:09:54.288537 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx
159 04:09:54.288999 makedir: /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin
160 04:09:54.289347 makedir: /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/tests
161 04:09:54.289662 makedir: /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/results
162 04:09:54.289998 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-add-keys
163 04:09:54.290537 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-add-sources
164 04:09:54.291050 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-background-process-start
165 04:09:54.291547 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-background-process-stop
166 04:09:54.292140 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-common-functions
167 04:09:54.292671 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-echo-ipv4
168 04:09:54.293158 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-install-packages
169 04:09:54.293678 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-installed-packages
170 04:09:54.294206 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-os-build
171 04:09:54.294684 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-probe-channel
172 04:09:54.295158 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-probe-ip
173 04:09:54.295631 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-target-ip
174 04:09:54.296217 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-target-mac
175 04:09:54.296715 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-target-storage
176 04:09:54.297198 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-test-case
177 04:09:54.297697 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-test-event
178 04:09:54.298188 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-test-feedback
179 04:09:54.298656 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-test-raise
180 04:09:54.299118 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-test-reference
181 04:09:54.299582 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-test-runner
182 04:09:54.300076 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-test-set
183 04:09:54.300556 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-test-shell
184 04:09:54.301033 Updating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-install-packages (oe)
185 04:09:54.301561 Updating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/bin/lava-installed-packages (oe)
186 04:09:54.301995 Creating /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/environment
187 04:09:54.302373 LAVA metadata
188 04:09:54.302657 - LAVA_JOB_ID=957163
189 04:09:54.302875 - LAVA_DISPATCHER_IP=192.168.6.2
190 04:09:54.303237 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 04:09:54.304221 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 04:09:54.304536 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 04:09:54.304746 skipped lava-vland-overlay
194 04:09:54.304987 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 04:09:54.305240 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 04:09:54.305456 skipped lava-multinode-overlay
197 04:09:54.305694 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 04:09:54.305941 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 04:09:54.306186 Loading test definitions
200 04:09:54.306460 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 04:09:54.306677 Using /lava-957163 at stage 0
202 04:09:54.307820 uuid=957163_1.6.2.4.1 testdef=None
203 04:09:54.308167 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 04:09:54.308434 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 04:09:54.310155 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 04:09:54.310937 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 04:09:54.313117 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 04:09:54.313942 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 04:09:54.315998 runner path: /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 957163_1.6.2.4.1
212 04:09:54.316602 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 04:09:54.317358 Creating lava-test-runner.conf files
215 04:09:54.317559 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/957163/lava-overlay-s8ytqzgx/lava-957163/0 for stage 0
216 04:09:54.317888 - 0_v4l2-decoder-conformance-h265
217 04:09:54.318221 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 04:09:54.318490 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 04:09:54.340148 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 04:09:54.340561 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 04:09:54.340822 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 04:09:54.341090 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 04:09:54.341351 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 04:09:54.958922 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 04:09:54.959395 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 04:09:54.959642 extracting modules file /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957163/extract-nfsrootfs-pirhrgbb
227 04:09:56.295458 extracting modules file /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/modules/modules.tar to /var/lib/lava/dispatcher/tmp/957163/extract-overlay-ramdisk-qosltsu4/ramdisk
228 04:09:57.670470 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 04:09:57.670950 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 04:09:57.671229 [common] Applying overlay to NFS
231 04:09:57.671444 [common] Applying overlay /var/lib/lava/dispatcher/tmp/957163/compress-overlay-wlyiezss/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/957163/extract-nfsrootfs-pirhrgbb
232 04:09:57.700503 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 04:09:57.700908 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 04:09:57.701181 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 04:09:57.701410 Converting downloaded kernel to a uImage
236 04:09:57.701716 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/kernel/Image /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/kernel/uImage
237 04:09:58.233173 output: Image Name:
238 04:09:58.233593 output: Created: Fri Nov 8 04:09:57 2024
239 04:09:58.233802 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 04:09:58.234006 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 04:09:58.234207 output: Load Address: 01080000
242 04:09:58.234407 output: Entry Point: 01080000
243 04:09:58.234605 output:
244 04:09:58.234938 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 04:09:58.235205 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 04:09:58.235475 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 04:09:58.235728 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 04:09:58.236051 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 04:09:58.236366 Building ramdisk /var/lib/lava/dispatcher/tmp/957163/extract-overlay-ramdisk-qosltsu4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/957163/extract-overlay-ramdisk-qosltsu4/ramdisk
250 04:10:00.376624 >> 166825 blocks
251 04:10:08.193860 Adding RAMdisk u-boot header.
252 04:10:08.194526 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/957163/extract-overlay-ramdisk-qosltsu4/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/957163/extract-overlay-ramdisk-qosltsu4/ramdisk.cpio.gz.uboot
253 04:10:08.434182 output: Image Name:
254 04:10:08.434651 output: Created: Fri Nov 8 04:10:08 2024
255 04:10:08.435158 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 04:10:08.435642 output: Data Size: 23431175 Bytes = 22882.01 KiB = 22.35 MiB
257 04:10:08.436148 output: Load Address: 00000000
258 04:10:08.436603 output: Entry Point: 00000000
259 04:10:08.437049 output:
260 04:10:08.438184 rename /var/lib/lava/dispatcher/tmp/957163/extract-overlay-ramdisk-qosltsu4/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/ramdisk/ramdisk.cpio.gz.uboot
261 04:10:08.438974 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 04:10:08.439585 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 04:10:08.440218 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 04:10:08.440735 No LXC device requested
265 04:10:08.441304 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 04:10:08.441875 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 04:10:08.442430 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 04:10:08.442890 Checking files for TFTP limit of 4294967296 bytes.
269 04:10:08.445887 end: 1 tftp-deploy (duration 00:01:03) [common]
270 04:10:08.446524 start: 2 uboot-action (timeout 00:05:00) [common]
271 04:10:08.447116 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 04:10:08.447674 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 04:10:08.448278 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 04:10:08.448868 Using kernel file from prepare-kernel: 957163/tftp-deploy-dfmt3d25/kernel/uImage
275 04:10:08.449564 substitutions:
276 04:10:08.450021 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 04:10:08.450472 - {DTB_ADDR}: 0x01070000
278 04:10:08.450912 - {DTB}: 957163/tftp-deploy-dfmt3d25/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 04:10:08.451355 - {INITRD}: 957163/tftp-deploy-dfmt3d25/ramdisk/ramdisk.cpio.gz.uboot
280 04:10:08.451799 - {KERNEL_ADDR}: 0x01080000
281 04:10:08.452283 - {KERNEL}: 957163/tftp-deploy-dfmt3d25/kernel/uImage
282 04:10:08.452730 - {LAVA_MAC}: None
283 04:10:08.453212 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/957163/extract-nfsrootfs-pirhrgbb
284 04:10:08.453654 - {NFS_SERVER_IP}: 192.168.6.2
285 04:10:08.454091 - {PRESEED_CONFIG}: None
286 04:10:08.454525 - {PRESEED_LOCAL}: None
287 04:10:08.454959 - {RAMDISK_ADDR}: 0x08000000
288 04:10:08.455390 - {RAMDISK}: 957163/tftp-deploy-dfmt3d25/ramdisk/ramdisk.cpio.gz.uboot
289 04:10:08.455824 - {ROOT_PART}: None
290 04:10:08.456332 - {ROOT}: None
291 04:10:08.456781 - {SERVER_IP}: 192.168.6.2
292 04:10:08.457224 - {TEE_ADDR}: 0x83000000
293 04:10:08.457661 - {TEE}: None
294 04:10:08.458101 Parsed boot commands:
295 04:10:08.458525 - setenv autoload no
296 04:10:08.458959 - setenv initrd_high 0xffffffff
297 04:10:08.459391 - setenv fdt_high 0xffffffff
298 04:10:08.459825 - dhcp
299 04:10:08.460294 - setenv serverip 192.168.6.2
300 04:10:08.460732 - tftpboot 0x01080000 957163/tftp-deploy-dfmt3d25/kernel/uImage
301 04:10:08.461169 - tftpboot 0x08000000 957163/tftp-deploy-dfmt3d25/ramdisk/ramdisk.cpio.gz.uboot
302 04:10:08.461605 - tftpboot 0x01070000 957163/tftp-deploy-dfmt3d25/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 04:10:08.462041 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/957163/extract-nfsrootfs-pirhrgbb,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 04:10:08.462487 - bootm 0x01080000 0x08000000 0x01070000
305 04:10:08.463047 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 04:10:08.464726 start: 2.3 connect-device (timeout 00:05:00) [common]
308 04:10:08.465200 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 04:10:08.481761 Setting prompt string to ['lava-test: # ']
310 04:10:08.483372 end: 2.3 connect-device (duration 00:00:00) [common]
311 04:10:08.484078 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 04:10:08.484703 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 04:10:08.485313 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 04:10:08.486799 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 04:10:08.526107 >> OK - accepted request
316 04:10:08.528176 Returned 0 in 0 seconds
317 04:10:08.629418 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 04:10:08.631219 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 04:10:08.631875 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 04:10:08.632525 Setting prompt string to ['Hit any key to stop autoboot']
322 04:10:08.633047 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 04:10:08.634770 Trying 192.168.56.21...
324 04:10:08.635293 Connected to conserv1.
325 04:10:08.635768 Escape character is '^]'.
326 04:10:08.636271
327 04:10:08.636747 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 04:10:08.637215
329 04:10:15.601423 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 04:10:15.602067 bl2_stage_init 0x01
331 04:10:15.602554 bl2_stage_init 0x81
332 04:10:15.607062 hw id: 0x0000 - pwm id 0x01
333 04:10:15.607595 bl2_stage_init 0xc1
334 04:10:15.612579 bl2_stage_init 0x02
335 04:10:15.613087
336 04:10:15.613548 L0:00000000
337 04:10:15.614013 L1:00000703
338 04:10:15.614452 L2:00008067
339 04:10:15.614890 L3:15000000
340 04:10:15.618081 S1:00000000
341 04:10:15.618601 B2:20282000
342 04:10:15.619088 B1:a0f83180
343 04:10:15.619536
344 04:10:15.620009 TE: 69859
345 04:10:15.620464
346 04:10:15.623786 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 04:10:15.624331
348 04:10:15.629403 Board ID = 1
349 04:10:15.629926 Set cpu clk to 24M
350 04:10:15.630356 Set clk81 to 24M
351 04:10:15.634831 Use GP1_pll as DSU clk.
352 04:10:15.635272 DSU clk: 1200 Mhz
353 04:10:15.635679 CPU clk: 1200 MHz
354 04:10:15.640498 Set clk81 to 166.6M
355 04:10:15.646085 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 04:10:15.646533 board id: 1
357 04:10:15.653258 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 04:10:15.663897 fw parse done
359 04:10:15.669977 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 04:10:15.712545 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 04:10:15.723434 PIEI prepare done
362 04:10:15.723880 fastboot data load
363 04:10:15.724355 fastboot data verify
364 04:10:15.729035 verify result: 266
365 04:10:15.734650 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 04:10:15.735093 LPDDR4 probe
367 04:10:15.735495 ddr clk to 1584MHz
368 04:10:15.742630 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 04:10:15.779915
370 04:10:15.780405 dmc_version 0001
371 04:10:15.786611 Check phy result
372 04:10:15.792479 INFO : End of CA training
373 04:10:15.792957 INFO : End of initialization
374 04:10:15.798043 INFO : Training has run successfully!
375 04:10:15.798500 Check phy result
376 04:10:15.803639 INFO : End of initialization
377 04:10:15.804113 INFO : End of read enable training
378 04:10:15.809301 INFO : End of fine write leveling
379 04:10:15.814933 INFO : End of Write leveling coarse delay
380 04:10:15.815379 INFO : Training has run successfully!
381 04:10:15.815784 Check phy result
382 04:10:15.820515 INFO : End of initialization
383 04:10:15.821034 INFO : End of read dq deskew training
384 04:10:15.826085 INFO : End of MPR read delay center optimization
385 04:10:15.831662 INFO : End of write delay center optimization
386 04:10:15.837331 INFO : End of read delay center optimization
387 04:10:15.837788 INFO : End of max read latency training
388 04:10:15.842874 INFO : Training has run successfully!
389 04:10:15.843320 1D training succeed
390 04:10:15.852184 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 04:10:15.899729 Check phy result
392 04:10:15.900295 INFO : End of initialization
393 04:10:15.922018 INFO : End of 2D read delay Voltage center optimization
394 04:10:15.941195 INFO : End of 2D read delay Voltage center optimization
395 04:10:15.993195 INFO : End of 2D write delay Voltage center optimization
396 04:10:16.042204 INFO : End of 2D write delay Voltage center optimization
397 04:10:16.047865 INFO : Training has run successfully!
398 04:10:16.048372
399 04:10:16.048800 channel==0
400 04:10:16.053456 RxClkDly_Margin_A0==78 ps 8
401 04:10:16.053900 TxDqDly_Margin_A0==88 ps 9
402 04:10:16.058943 RxClkDly_Margin_A1==88 ps 9
403 04:10:16.059398 TxDqDly_Margin_A1==88 ps 9
404 04:10:16.059812 TrainedVREFDQ_A0==74
405 04:10:16.064555 TrainedVREFDQ_A1==74
406 04:10:16.064998 VrefDac_Margin_A0==23
407 04:10:16.065403 DeviceVref_Margin_A0==40
408 04:10:16.070163 VrefDac_Margin_A1==22
409 04:10:16.070615 DeviceVref_Margin_A1==40
410 04:10:16.071027
411 04:10:16.071426
412 04:10:16.071823 channel==1
413 04:10:16.075843 RxClkDly_Margin_A0==78 ps 8
414 04:10:16.076322 TxDqDly_Margin_A0==98 ps 10
415 04:10:16.081325 RxClkDly_Margin_A1==78 ps 8
416 04:10:16.081767 TxDqDly_Margin_A1==88 ps 9
417 04:10:16.086974 TrainedVREFDQ_A0==78
418 04:10:16.087414 TrainedVREFDQ_A1==78
419 04:10:16.087825 VrefDac_Margin_A0==22
420 04:10:16.092702 DeviceVref_Margin_A0==36
421 04:10:16.093148 VrefDac_Margin_A1==22
422 04:10:16.093556 DeviceVref_Margin_A1==36
423 04:10:16.098267
424 04:10:16.098715 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 04:10:16.099118
426 04:10:16.131842 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 04:10:16.132422 2D training succeed
428 04:10:16.137445 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 04:10:16.142939 auto size-- 65535DDR cs0 size: 2048MB
430 04:10:16.143380 DDR cs1 size: 2048MB
431 04:10:16.148536 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 04:10:16.148984 cs0 DataBus test pass
433 04:10:16.154151 cs1 DataBus test pass
434 04:10:16.154591 cs0 AddrBus test pass
435 04:10:16.154996 cs1 AddrBus test pass
436 04:10:16.155390
437 04:10:16.159735 100bdlr_step_size ps== 464
438 04:10:16.160215 result report
439 04:10:16.165346 boot times 0Enable ddr reg access
440 04:10:16.170443 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 04:10:16.184295 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 04:10:16.839735 bl2z: ptr: 05129330, size: 00001e40
443 04:10:16.847872 0.0;M3 CHK:0;cm4_sp_mode 0
444 04:10:16.848381 MVN_1=0x00000000
445 04:10:16.848802 MVN_2=0x00000000
446 04:10:16.859350 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 04:10:16.859804 OPS=0x04
448 04:10:16.860258 ring efuse init
449 04:10:16.862390 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 04:10:16.868216 [0.017319 Inits done]
451 04:10:16.868659 secure task start!
452 04:10:16.869069 high task start!
453 04:10:16.869469 low task start!
454 04:10:16.872576 run into bl31
455 04:10:16.881186 NOTICE: BL31: v1.3(release):4fc40b1
456 04:10:16.888969 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 04:10:16.889433 NOTICE: BL31: G12A normal boot!
458 04:10:16.904394 NOTICE: BL31: BL33 decompress pass
459 04:10:16.910223 ERROR: Error initializing runtime service opteed_fast
460 04:10:19.649812 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 04:10:19.650444 bl2_stage_init 0x01
462 04:10:19.650882 bl2_stage_init 0x81
463 04:10:19.655316 hw id: 0x0000 - pwm id 0x01
464 04:10:19.655826 bl2_stage_init 0xc1
465 04:10:19.660960 bl2_stage_init 0x02
466 04:10:19.661468
467 04:10:19.661867 L0:00000000
468 04:10:19.662251 L1:00000703
469 04:10:19.662639 L2:00008067
470 04:10:19.663019 L3:15000000
471 04:10:19.666548 S1:00000000
472 04:10:19.666972 B2:20282000
473 04:10:19.667358 B1:a0f83180
474 04:10:19.667739
475 04:10:19.668156 TE: 68512
476 04:10:19.668539
477 04:10:19.672172 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 04:10:19.672591
479 04:10:19.677711 Board ID = 1
480 04:10:19.678120 Set cpu clk to 24M
481 04:10:19.678502 Set clk81 to 24M
482 04:10:19.683348 Use GP1_pll as DSU clk.
483 04:10:19.683801 DSU clk: 1200 Mhz
484 04:10:19.684231 CPU clk: 1200 MHz
485 04:10:19.688905 Set clk81 to 166.6M
486 04:10:19.694529 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 04:10:19.694946 board id: 1
488 04:10:19.701721 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 04:10:19.712272 fw parse done
490 04:10:19.718228 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 04:10:19.760864 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 04:10:19.771744 PIEI prepare done
493 04:10:19.772204 fastboot data load
494 04:10:19.772594 fastboot data verify
495 04:10:19.777482 verify result: 266
496 04:10:19.783028 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 04:10:19.783441 LPDDR4 probe
498 04:10:19.783825 ddr clk to 1584MHz
499 04:10:19.790999 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 04:10:19.828257
501 04:10:19.828694 dmc_version 0001
502 04:10:19.834997 Check phy result
503 04:10:19.840901 INFO : End of CA training
504 04:10:19.841396 INFO : End of initialization
505 04:10:19.846452 INFO : Training has run successfully!
506 04:10:19.846885 Check phy result
507 04:10:19.852061 INFO : End of initialization
508 04:10:19.852490 INFO : End of read enable training
509 04:10:19.857640 INFO : End of fine write leveling
510 04:10:19.863245 INFO : End of Write leveling coarse delay
511 04:10:19.863679 INFO : Training has run successfully!
512 04:10:19.864120 Check phy result
513 04:10:19.868834 INFO : End of initialization
514 04:10:19.869291 INFO : End of read dq deskew training
515 04:10:19.874437 INFO : End of MPR read delay center optimization
516 04:10:19.880041 INFO : End of write delay center optimization
517 04:10:19.885622 INFO : End of read delay center optimization
518 04:10:19.886068 INFO : End of max read latency training
519 04:10:19.891295 INFO : Training has run successfully!
520 04:10:19.891795 1D training succeed
521 04:10:19.900450 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 04:10:19.948031 Check phy result
523 04:10:19.948521 INFO : End of initialization
524 04:10:19.970417 INFO : End of 2D read delay Voltage center optimization
525 04:10:19.989522 INFO : End of 2D read delay Voltage center optimization
526 04:10:20.041386 INFO : End of 2D write delay Voltage center optimization
527 04:10:20.090672 INFO : End of 2D write delay Voltage center optimization
528 04:10:20.096208 INFO : Training has run successfully!
529 04:10:20.096642
530 04:10:20.097054 channel==0
531 04:10:20.101757 RxClkDly_Margin_A0==78 ps 8
532 04:10:20.102178 TxDqDly_Margin_A0==98 ps 10
533 04:10:20.107391 RxClkDly_Margin_A1==88 ps 9
534 04:10:20.107820 TxDqDly_Margin_A1==98 ps 10
535 04:10:20.108284 TrainedVREFDQ_A0==75
536 04:10:20.112962 TrainedVREFDQ_A1==74
537 04:10:20.113390 VrefDac_Margin_A0==24
538 04:10:20.113793 DeviceVref_Margin_A0==39
539 04:10:20.118645 VrefDac_Margin_A1==23
540 04:10:20.119072 DeviceVref_Margin_A1==40
541 04:10:20.119471
542 04:10:20.119868
543 04:10:20.124186 channel==1
544 04:10:20.124653 RxClkDly_Margin_A0==88 ps 9
545 04:10:20.125080 TxDqDly_Margin_A0==88 ps 9
546 04:10:20.129762 RxClkDly_Margin_A1==78 ps 8
547 04:10:20.130192 TxDqDly_Margin_A1==88 ps 9
548 04:10:20.135333 TrainedVREFDQ_A0==75
549 04:10:20.135770 TrainedVREFDQ_A1==75
550 04:10:20.136210 VrefDac_Margin_A0==22
551 04:10:20.140957 DeviceVref_Margin_A0==39
552 04:10:20.141381 VrefDac_Margin_A1==22
553 04:10:20.146654 DeviceVref_Margin_A1==38
554 04:10:20.147091
555 04:10:20.147496 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 04:10:20.147893
557 04:10:20.180183 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 04:10:20.180645 2D training succeed
559 04:10:20.185757 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 04:10:20.191361 auto size-- 65535DDR cs0 size: 2048MB
561 04:10:20.191790 DDR cs1 size: 2048MB
562 04:10:20.196968 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 04:10:20.197402 cs0 DataBus test pass
564 04:10:20.202654 cs1 DataBus test pass
565 04:10:20.203075 cs0 AddrBus test pass
566 04:10:20.203470 cs1 AddrBus test pass
567 04:10:20.203875
568 04:10:20.208157 100bdlr_step_size ps== 478
569 04:10:20.208594 result report
570 04:10:20.213744 boot times 0Enable ddr reg access
571 04:10:20.218896 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 04:10:20.232742 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 04:10:20.888359 bl2z: ptr: 05129330, size: 00001e40
574 04:10:20.894000 0.0;M3 CHK:0;cm4_sp_mode 0
575 04:10:20.894584 MVN_1=0x00000000
576 04:10:20.895054 MVN_2=0x00000000
577 04:10:20.899634 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 04:10:20.900202 OPS=0x04
579 04:10:20.905495 ring efuse init
580 04:10:20.911118 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 04:10:20.911657 [0.017319 Inits done]
582 04:10:20.912157 secure task start!
583 04:10:20.917553 high task start!
584 04:10:20.918087 low task start!
585 04:10:20.918544 run into bl31
586 04:10:20.926244 NOTICE: BL31: v1.3(release):4fc40b1
587 04:10:20.933976 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 04:10:20.934537 NOTICE: BL31: G12A normal boot!
589 04:10:20.949573 NOTICE: BL31: BL33 decompress pass
590 04:10:20.955262 ERROR: Error initializing runtime service opteed_fast
591 04:10:22.203760 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 04:10:22.204240 bl2_stage_init 0x01
593 04:10:22.204475 bl2_stage_init 0x81
594 04:10:22.209214 hw id: 0x0000 - pwm id 0x01
595 04:10:22.209526 bl2_stage_init 0xc1
596 04:10:22.214901 bl2_stage_init 0x02
597 04:10:22.215220
598 04:10:22.215450 L0:00000000
599 04:10:22.215670 L1:00000703
600 04:10:22.215881 L2:00008067
601 04:10:22.216118 L3:15000000
602 04:10:22.220403 S1:00000000
603 04:10:22.220698 B2:20282000
604 04:10:22.220913 B1:a0f83180
605 04:10:22.221122
606 04:10:22.221327 TE: 72150
607 04:10:22.221531
608 04:10:22.226120 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 04:10:22.226628
610 04:10:22.231744 Board ID = 1
611 04:10:22.233214 Set cpu clk to 24M
612 04:10:22.233670 Set clk81 to 24M
613 04:10:22.237293 Use GP1_pll as DSU clk.
614 04:10:22.237792 DSU clk: 1200 Mhz
615 04:10:22.238215 CPU clk: 1200 MHz
616 04:10:22.242839 Set clk81 to 166.6M
617 04:10:22.248331 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 04:10:22.248798 board id: 1
619 04:10:22.255639 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 04:10:22.266664 fw parse done
621 04:10:22.272444 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 04:10:22.315625 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 04:10:22.326840 PIEI prepare done
624 04:10:22.327334 fastboot data load
625 04:10:22.327755 fastboot data verify
626 04:10:22.332324 verify result: 266
627 04:10:22.337925 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 04:10:22.338391 LPDDR4 probe
629 04:10:22.338806 ddr clk to 1584MHz
630 04:10:22.346090 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 04:10:22.383839
632 04:10:22.384417 dmc_version 0001
633 04:10:22.390805 Check phy result
634 04:10:22.396765 INFO : End of CA training
635 04:10:22.397263 INFO : End of initialization
636 04:10:22.402316 INFO : Training has run successfully!
637 04:10:22.402782 Check phy result
638 04:10:22.408006 INFO : End of initialization
639 04:10:22.408477 INFO : End of read enable training
640 04:10:22.413659 INFO : End of fine write leveling
641 04:10:22.419099 INFO : End of Write leveling coarse delay
642 04:10:22.419447 INFO : Training has run successfully!
643 04:10:22.419665 Check phy result
644 04:10:22.424683 INFO : End of initialization
645 04:10:22.425012 INFO : End of read dq deskew training
646 04:10:22.430267 INFO : End of MPR read delay center optimization
647 04:10:22.435924 INFO : End of write delay center optimization
648 04:10:22.441470 INFO : End of read delay center optimization
649 04:10:22.441800 INFO : End of max read latency training
650 04:10:22.447059 INFO : Training has run successfully!
651 04:10:22.447394 1D training succeed
652 04:10:22.456285 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 04:10:22.508467 Check phy result
654 04:10:22.509113 INFO : End of initialization
655 04:10:22.532099 INFO : End of 2D read delay Voltage center optimization
656 04:10:22.556335 INFO : End of 2D read delay Voltage center optimization
657 04:10:22.612946 INFO : End of 2D write delay Voltage center optimization
658 04:10:22.666933 INFO : End of 2D write delay Voltage center optimization
659 04:10:22.672481 INFO : Training has run successfully!
660 04:10:22.672981
661 04:10:22.673401 channel==0
662 04:10:22.678121 RxClkDly_Margin_A0==78 ps 8
663 04:10:22.678594 TxDqDly_Margin_A0==88 ps 9
664 04:10:22.683676 RxClkDly_Margin_A1==88 ps 9
665 04:10:22.684182 TxDqDly_Margin_A1==98 ps 10
666 04:10:22.684604 TrainedVREFDQ_A0==74
667 04:10:22.689262 TrainedVREFDQ_A1==75
668 04:10:22.689738 VrefDac_Margin_A0==23
669 04:10:22.690148 DeviceVref_Margin_A0==40
670 04:10:22.694852 VrefDac_Margin_A1==22
671 04:10:22.695316 DeviceVref_Margin_A1==39
672 04:10:22.695726
673 04:10:22.696172
674 04:10:22.696577 channel==1
675 04:10:22.700456 RxClkDly_Margin_A0==78 ps 8
676 04:10:22.700922 TxDqDly_Margin_A0==98 ps 10
677 04:10:22.706073 RxClkDly_Margin_A1==78 ps 8
678 04:10:22.706549 TxDqDly_Margin_A1==88 ps 9
679 04:10:22.711657 TrainedVREFDQ_A0==78
680 04:10:22.712164 TrainedVREFDQ_A1==76
681 04:10:22.712580 VrefDac_Margin_A0==22
682 04:10:22.717258 DeviceVref_Margin_A0==36
683 04:10:22.717726 VrefDac_Margin_A1==22
684 04:10:22.722849 DeviceVref_Margin_A1==38
685 04:10:22.723315
686 04:10:22.723725 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 04:10:22.724167
688 04:10:22.756416 soc_vref_reg_value 0x 00000019 00000018 00000019 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
689 04:10:22.756957 2D training succeed
690 04:10:22.762083 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 04:10:22.767643 auto size-- 65535DDR cs0 size: 2048MB
692 04:10:22.768138 DDR cs1 size: 2048MB
693 04:10:22.773247 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 04:10:22.773718 cs0 DataBus test pass
695 04:10:22.778843 cs1 DataBus test pass
696 04:10:22.779309 cs0 AddrBus test pass
697 04:10:22.779712 cs1 AddrBus test pass
698 04:10:22.780147
699 04:10:22.784466 100bdlr_step_size ps== 478
700 04:10:22.784958 result report
701 04:10:22.790060 boot times 0Enable ddr reg access
702 04:10:22.795228 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 04:10:22.809086 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 04:10:23.468481 bl2z: ptr: 05129330, size: 00001e40
705 04:10:23.476668 0.0;M3 CHK:0;cm4_sp_mode 0
706 04:10:23.477127 MVN_1=0x00000000
707 04:10:23.477540 MVN_2=0x00000000
708 04:10:23.488153 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 04:10:23.488604 OPS=0x04
710 04:10:23.489012 ring efuse init
711 04:10:23.493786 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 04:10:23.494240 [0.017354 Inits done]
713 04:10:23.494648 secure task start!
714 04:10:23.501630 high task start!
715 04:10:23.502091 low task start!
716 04:10:23.502494 run into bl31
717 04:10:23.510242 NOTICE: BL31: v1.3(release):4fc40b1
718 04:10:23.518036 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 04:10:23.518492 NOTICE: BL31: G12A normal boot!
720 04:10:23.533676 NOTICE: BL31: BL33 decompress pass
721 04:10:23.539396 ERROR: Error initializing runtime service opteed_fast
722 04:10:24.334757
723 04:10:24.335347
724 04:10:24.340182 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 04:10:24.340636
726 04:10:24.343616 Model: Libre Computer AML-S905D3-CC Solitude
727 04:10:24.490692 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 04:10:24.506032 DRAM: 2 GiB (effective 3.8 GiB)
729 04:10:24.607016 Core: 406 devices, 33 uclasses, devicetree: separate
730 04:10:24.612896 WDT: Not starting watchdog@f0d0
731 04:10:24.637928 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 04:10:24.650181 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 04:10:24.655212 ** Bad device specification mmc 0 **
734 04:10:24.665277 Card did not respond to voltage select! : -110
735 04:10:24.672880 ** Bad device specification mmc 0 **
736 04:10:24.673313 Couldn't find partition mmc 0
737 04:10:24.681185 Card did not respond to voltage select! : -110
738 04:10:24.686717 ** Bad device specification mmc 0 **
739 04:10:24.687139 Couldn't find partition mmc 0
740 04:10:24.691770 Error: could not access storage.
741 04:10:24.988342 Net: eth0: ethernet@ff3f0000
742 04:10:24.988887 starting USB...
743 04:10:25.233068 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 04:10:25.233643 Starting the controller
745 04:10:25.240121 USB XHCI 1.10
746 04:10:26.794310 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 04:10:26.802648 scanning usb for storage devices... 0 Storage Device(s) found
749 04:10:26.854288 Hit any key to stop autoboot: 1
750 04:10:26.855431 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
751 04:10:26.856146 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
752 04:10:26.856687 Setting prompt string to ['=>']
753 04:10:26.857225 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
754 04:10:26.868750 0
755 04:10:26.869698 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 04:10:26.971001 => setenv autoload no
758 04:10:26.972115 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 04:10:26.977634 setenv autoload no
761 04:10:27.079232 => setenv initrd_high 0xffffffff
762 04:10:27.080032 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 04:10:27.084639 setenv initrd_high 0xffffffff
765 04:10:27.186210 => setenv fdt_high 0xffffffff
766 04:10:27.186923 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 04:10:27.191578 setenv fdt_high 0xffffffff
769 04:10:27.293199 => dhcp
770 04:10:27.293927 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 04:10:27.298389 dhcp
772 04:10:28.304176 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 04:10:28.304850 Speed: 1000, full duplex
774 04:10:28.305314 BOOTP broadcast 1
775 04:10:28.315565 DHCP client bound to address 192.168.6.21 (10 ms)
777 04:10:28.417190 => setenv serverip 192.168.6.2
778 04:10:28.417961 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
779 04:10:28.422647 setenv serverip 192.168.6.2
781 04:10:28.524229 => tftpboot 0x01080000 957163/tftp-deploy-dfmt3d25/kernel/uImage
782 04:10:28.524984 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
783 04:10:28.531739 tftpboot 0x01080000 957163/tftp-deploy-dfmt3d25/kernel/uImage
784 04:10:28.532340 Speed: 1000, full duplex
785 04:10:28.532801 Using ethernet@ff3f0000 device
786 04:10:28.537238 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 04:10:28.542767 Filename '957163/tftp-deploy-dfmt3d25/kernel/uImage'.
788 04:10:28.546566 Load address: 0x1080000
789 04:10:31.300930 Loading: *################################################## 43.6 MiB
790 04:10:31.301371 15.8 MiB/s
791 04:10:31.301598 done
792 04:10:31.305344 Bytes transferred = 45713984 (2b98a40 hex)
794 04:10:31.406408 => tftpboot 0x08000000 957163/tftp-deploy-dfmt3d25/ramdisk/ramdisk.cpio.gz.uboot
795 04:10:31.406924 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
796 04:10:31.413729 tftpboot 0x08000000 957163/tftp-deploy-dfmt3d25/ramdisk/ramdisk.cpio.gz.uboot
797 04:10:31.414038 Speed: 1000, full duplex
798 04:10:31.414245 Using ethernet@ff3f0000 device
799 04:10:31.419250 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
800 04:10:31.429031 Filename '957163/tftp-deploy-dfmt3d25/ramdisk/ramdisk.cpio.gz.uboot'.
801 04:10:31.429324 Load address: 0x8000000
802 04:10:32.848532 Loading: *################################################# UDP wrong checksum 00000005 000013cb
803 04:10:37.850536 T UDP wrong checksum 00000005 000013cb
804 04:10:47.852640 T T UDP wrong checksum 00000005 000013cb
805 04:10:59.136076 T T UDP wrong checksum 000000ff 0000ba07
806 04:10:59.176331 UDP wrong checksum 000000ff 000044fa
807 04:11:05.966973 T UDP wrong checksum 000000ff 00008e83
808 04:11:06.033029 UDP wrong checksum 000000ff 00001f76
809 04:11:07.856680 T UDP wrong checksum 00000005 000013cb
810 04:11:27.861567 T T T
811 04:11:27.862216 Retry count exceeded; starting again
813 04:11:27.863762 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
816 04:11:27.865878 end: 2.4 uboot-commands (duration 00:01:19) [common]
818 04:11:27.867547 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
820 04:11:27.868707 end: 2 uboot-action (duration 00:01:19) [common]
822 04:11:27.870348 Cleaning after the job
823 04:11:27.870934 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/ramdisk
824 04:11:27.873141 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/kernel
825 04:11:27.926279 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/dtb
826 04:11:27.927609 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/nfsrootfs
827 04:11:28.235086 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/957163/tftp-deploy-dfmt3d25/modules
828 04:11:28.255033 start: 4.1 power-off (timeout 00:00:30) [common]
829 04:11:28.255665 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
830 04:11:28.293207 >> OK - accepted request
831 04:11:28.295203 Returned 0 in 0 seconds
832 04:11:28.395895 end: 4.1 power-off (duration 00:00:00) [common]
834 04:11:28.396771 start: 4.2 read-feedback (timeout 00:10:00) [common]
835 04:11:28.397402 Listened to connection for namespace 'common' for up to 1s
836 04:11:29.398321 Finalising connection for namespace 'common'
837 04:11:29.398806 Disconnecting from shell: Finalise
838 04:11:29.399086 =>
839 04:11:29.499791 end: 4.2 read-feedback (duration 00:00:01) [common]
840 04:11:29.500257 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/957163
841 04:11:32.019401 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/957163
842 04:11:32.020055 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.