Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 20:43:22.600565 lava-dispatcher, installed at version: 2024.01
2 20:43:22.601333 start: 0 validate
3 20:43:22.601788 Start time: 2024-11-08 20:43:22.601757+00:00 (UTC)
4 20:43:22.602334 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 20:43:22.602850 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 20:43:22.640233 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 20:43:22.640798 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-225-g50643bbc9eb6%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
8 20:43:22.670895 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 20:43:22.671503 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-225-g50643bbc9eb6%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 20:43:22.706773 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 20:43:22.707269 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 20:43:22.734699 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 20:43:22.735184 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-225-g50643bbc9eb6%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
14 20:43:22.771537 validate duration: 0.17
16 20:43:22.772412 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 20:43:22.772728 start: 1.1 download-retry (timeout 00:10:00) [common]
18 20:43:22.773049 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 20:43:22.773610 Not decompressing ramdisk as can be used compressed.
20 20:43:22.774053 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 20:43:22.774342 saving as /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/ramdisk/initrd.cpio.gz
22 20:43:22.774600 total size: 5628182 (5 MB)
23 20:43:22.813826 progress 0 % (0 MB)
24 20:43:22.818136 progress 5 % (0 MB)
25 20:43:22.822675 progress 10 % (0 MB)
26 20:43:22.826452 progress 15 % (0 MB)
27 20:43:22.830614 progress 20 % (1 MB)
28 20:43:22.834424 progress 25 % (1 MB)
29 20:43:22.838549 progress 30 % (1 MB)
30 20:43:22.842709 progress 35 % (1 MB)
31 20:43:22.846493 progress 40 % (2 MB)
32 20:43:22.850585 progress 45 % (2 MB)
33 20:43:22.854357 progress 50 % (2 MB)
34 20:43:22.858383 progress 55 % (2 MB)
35 20:43:22.862473 progress 60 % (3 MB)
36 20:43:22.866188 progress 65 % (3 MB)
37 20:43:22.870253 progress 70 % (3 MB)
38 20:43:22.873975 progress 75 % (4 MB)
39 20:43:22.878227 progress 80 % (4 MB)
40 20:43:22.881946 progress 85 % (4 MB)
41 20:43:22.886001 progress 90 % (4 MB)
42 20:43:22.889738 progress 95 % (5 MB)
43 20:43:22.893083 progress 100 % (5 MB)
44 20:43:22.893778 5 MB downloaded in 0.12 s (45.05 MB/s)
45 20:43:22.894412 end: 1.1.1 http-download (duration 00:00:00) [common]
47 20:43:22.895363 end: 1.1 download-retry (duration 00:00:00) [common]
48 20:43:22.895685 start: 1.2 download-retry (timeout 00:10:00) [common]
49 20:43:22.895974 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 20:43:22.896476 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-225-g50643bbc9eb6/arm64/defconfig/clang-16/kernel/Image
51 20:43:22.896741 saving as /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/kernel/Image
52 20:43:22.896961 total size: 37812736 (36 MB)
53 20:43:22.897182 No compression specified
54 20:43:22.934576 progress 0 % (0 MB)
55 20:43:22.957901 progress 5 % (1 MB)
56 20:43:22.981242 progress 10 % (3 MB)
57 20:43:23.004556 progress 15 % (5 MB)
58 20:43:23.027873 progress 20 % (7 MB)
59 20:43:23.050943 progress 25 % (9 MB)
60 20:43:23.074491 progress 30 % (10 MB)
61 20:43:23.097204 progress 35 % (12 MB)
62 20:43:23.120340 progress 40 % (14 MB)
63 20:43:23.143353 progress 45 % (16 MB)
64 20:43:23.166385 progress 50 % (18 MB)
65 20:43:23.189429 progress 55 % (19 MB)
66 20:43:23.212476 progress 60 % (21 MB)
67 20:43:23.235589 progress 65 % (23 MB)
68 20:43:23.258342 progress 70 % (25 MB)
69 20:43:23.281762 progress 75 % (27 MB)
70 20:43:23.305085 progress 80 % (28 MB)
71 20:43:23.327649 progress 85 % (30 MB)
72 20:43:23.350622 progress 90 % (32 MB)
73 20:43:23.373957 progress 95 % (34 MB)
74 20:43:23.396201 progress 100 % (36 MB)
75 20:43:23.396994 36 MB downloaded in 0.50 s (72.12 MB/s)
76 20:43:23.397502 end: 1.2.1 http-download (duration 00:00:01) [common]
78 20:43:23.398364 end: 1.2 download-retry (duration 00:00:01) [common]
79 20:43:23.398666 start: 1.3 download-retry (timeout 00:09:59) [common]
80 20:43:23.398948 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 20:43:23.399457 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-225-g50643bbc9eb6/arm64/defconfig/clang-16/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 20:43:23.399746 saving as /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/dtb/meson-g12b-a311d-libretech-cc.dtb
83 20:43:23.399967 total size: 54703 (0 MB)
84 20:43:23.400210 No compression specified
85 20:43:23.435377 progress 59 % (0 MB)
86 20:43:23.436273 progress 100 % (0 MB)
87 20:43:23.436872 0 MB downloaded in 0.04 s (1.41 MB/s)
88 20:43:23.437374 end: 1.3.1 http-download (duration 00:00:00) [common]
90 20:43:23.438193 end: 1.3 download-retry (duration 00:00:00) [common]
91 20:43:23.438459 start: 1.4 download-retry (timeout 00:09:59) [common]
92 20:43:23.438726 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 20:43:23.439178 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 20:43:23.439415 saving as /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/nfsrootfs/full.rootfs.tar
95 20:43:23.439618 total size: 107552908 (102 MB)
96 20:43:23.439828 Using unxz to decompress xz
97 20:43:23.471204 progress 0 % (0 MB)
98 20:43:24.132668 progress 5 % (5 MB)
99 20:43:24.863999 progress 10 % (10 MB)
100 20:43:25.595027 progress 15 % (15 MB)
101 20:43:26.356857 progress 20 % (20 MB)
102 20:43:26.941906 progress 25 % (25 MB)
103 20:43:27.563946 progress 30 % (30 MB)
104 20:43:28.307414 progress 35 % (35 MB)
105 20:43:28.653008 progress 40 % (41 MB)
106 20:43:29.077518 progress 45 % (46 MB)
107 20:43:29.792607 progress 50 % (51 MB)
108 20:43:30.501999 progress 55 % (56 MB)
109 20:43:31.319015 progress 60 % (61 MB)
110 20:43:32.076869 progress 65 % (66 MB)
111 20:43:32.817378 progress 70 % (71 MB)
112 20:43:33.589281 progress 75 % (76 MB)
113 20:43:34.273078 progress 80 % (82 MB)
114 20:43:34.983678 progress 85 % (87 MB)
115 20:43:35.714180 progress 90 % (92 MB)
116 20:43:36.423141 progress 95 % (97 MB)
117 20:43:37.163841 progress 100 % (102 MB)
118 20:43:37.176748 102 MB downloaded in 13.74 s (7.47 MB/s)
119 20:43:37.177739 end: 1.4.1 http-download (duration 00:00:14) [common]
121 20:43:37.179455 end: 1.4 download-retry (duration 00:00:14) [common]
122 20:43:37.180051 start: 1.5 download-retry (timeout 00:09:46) [common]
123 20:43:37.180633 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 20:43:37.181490 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-225-g50643bbc9eb6/arm64/defconfig/clang-16/modules.tar.xz
125 20:43:37.181993 saving as /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/modules/modules.tar
126 20:43:37.182428 total size: 11766788 (11 MB)
127 20:43:37.182866 Using unxz to decompress xz
128 20:43:37.232065 progress 0 % (0 MB)
129 20:43:37.300882 progress 5 % (0 MB)
130 20:43:37.379075 progress 10 % (1 MB)
131 20:43:37.477349 progress 15 % (1 MB)
132 20:43:37.574761 progress 20 % (2 MB)
133 20:43:37.655505 progress 25 % (2 MB)
134 20:43:37.732847 progress 30 % (3 MB)
135 20:43:37.813673 progress 35 % (3 MB)
136 20:43:37.894108 progress 40 % (4 MB)
137 20:43:37.972491 progress 45 % (5 MB)
138 20:43:38.059572 progress 50 % (5 MB)
139 20:43:38.143391 progress 55 % (6 MB)
140 20:43:38.229793 progress 60 % (6 MB)
141 20:43:38.312109 progress 65 % (7 MB)
142 20:43:38.395113 progress 70 % (7 MB)
143 20:43:38.479810 progress 75 % (8 MB)
144 20:43:38.565333 progress 80 % (9 MB)
145 20:43:38.647876 progress 85 % (9 MB)
146 20:43:38.736137 progress 90 % (10 MB)
147 20:43:38.819133 progress 95 % (10 MB)
148 20:43:38.899518 progress 100 % (11 MB)
149 20:43:38.910526 11 MB downloaded in 1.73 s (6.49 MB/s)
150 20:43:38.911094 end: 1.5.1 http-download (duration 00:00:02) [common]
152 20:43:38.912146 end: 1.5 download-retry (duration 00:00:02) [common]
153 20:43:38.912692 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 20:43:38.913229 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 20:43:48.906524 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/962426/extract-nfsrootfs-8btj4h6q
156 20:43:48.907131 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 20:43:48.907420 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 20:43:48.908213 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7
159 20:43:48.908686 makedir: /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin
160 20:43:48.909021 makedir: /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/tests
161 20:43:48.909337 makedir: /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/results
162 20:43:48.909681 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-add-keys
163 20:43:48.910206 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-add-sources
164 20:43:48.910706 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-background-process-start
165 20:43:48.911289 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-background-process-stop
166 20:43:48.911871 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-common-functions
167 20:43:48.912434 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-echo-ipv4
168 20:43:48.912930 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-install-packages
169 20:43:48.913427 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-installed-packages
170 20:43:48.913913 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-os-build
171 20:43:48.914389 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-probe-channel
172 20:43:48.914871 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-probe-ip
173 20:43:48.915349 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-target-ip
174 20:43:48.915853 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-target-mac
175 20:43:48.916425 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-target-storage
176 20:43:48.916923 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-test-case
177 20:43:48.917405 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-test-event
178 20:43:48.917883 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-test-feedback
179 20:43:48.918361 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-test-raise
180 20:43:48.918833 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-test-reference
181 20:43:48.919309 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-test-runner
182 20:43:48.919816 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-test-set
183 20:43:48.920384 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-test-shell
184 20:43:48.920886 Updating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-install-packages (oe)
185 20:43:48.921426 Updating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/bin/lava-installed-packages (oe)
186 20:43:48.921871 Creating /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/environment
187 20:43:48.922242 LAVA metadata
188 20:43:48.922504 - LAVA_JOB_ID=962426
189 20:43:48.922717 - LAVA_DISPATCHER_IP=192.168.6.2
190 20:43:48.923089 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 20:43:48.924147 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 20:43:48.924481 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 20:43:48.924685 skipped lava-vland-overlay
194 20:43:48.924928 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 20:43:48.925179 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 20:43:48.925396 skipped lava-multinode-overlay
197 20:43:48.925635 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 20:43:48.925883 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 20:43:48.926130 Loading test definitions
200 20:43:48.926405 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 20:43:48.926623 Using /lava-962426 at stage 0
202 20:43:48.927825 uuid=962426_1.6.2.4.1 testdef=None
203 20:43:48.928169 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 20:43:48.928435 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 20:43:48.930251 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 20:43:48.931038 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 20:43:48.933306 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 20:43:48.934137 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 20:43:48.936331 runner path: /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/0/tests/0_dmesg test_uuid 962426_1.6.2.4.1
212 20:43:48.936900 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 20:43:48.937649 Creating lava-test-runner.conf files
215 20:43:48.937848 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/962426/lava-overlay-xw_q_ou7/lava-962426/0 for stage 0
216 20:43:48.938178 - 0_dmesg
217 20:43:48.938519 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 20:43:48.938791 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 20:43:48.960653 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 20:43:48.961073 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 20:43:48.961334 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 20:43:48.961598 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 20:43:48.961860 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 20:43:49.576333 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 20:43:49.576850 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 20:43:49.577112 extracting modules file /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/modules/modules.tar to /var/lib/lava/dispatcher/tmp/962426/extract-nfsrootfs-8btj4h6q
227 20:43:50.948850 extracting modules file /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/modules/modules.tar to /var/lib/lava/dispatcher/tmp/962426/extract-overlay-ramdisk-i7gy3490/ramdisk
228 20:43:52.345463 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 20:43:52.345936 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 20:43:52.346215 [common] Applying overlay to NFS
231 20:43:52.346428 [common] Applying overlay /var/lib/lava/dispatcher/tmp/962426/compress-overlay-k7kpmogg/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/962426/extract-nfsrootfs-8btj4h6q
232 20:43:52.375400 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 20:43:52.375781 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 20:43:52.376083 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 20:43:52.376320 Converting downloaded kernel to a uImage
236 20:43:52.376624 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/kernel/Image /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/kernel/uImage
237 20:43:52.765467 output: Image Name:
238 20:43:52.765889 output: Created: Fri Nov 8 20:43:52 2024
239 20:43:52.766098 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 20:43:52.766302 output: Data Size: 37812736 Bytes = 36926.50 KiB = 36.06 MiB
241 20:43:52.766501 output: Load Address: 01080000
242 20:43:52.766699 output: Entry Point: 01080000
243 20:43:52.766894 output:
244 20:43:52.767224 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 20:43:52.767490 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 20:43:52.767757 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 20:43:52.768045 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 20:43:52.768313 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 20:43:52.768570 Building ramdisk /var/lib/lava/dispatcher/tmp/962426/extract-overlay-ramdisk-i7gy3490/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/962426/extract-overlay-ramdisk-i7gy3490/ramdisk
250 20:43:54.970147 >> 173443 blocks
251 20:44:02.689027 Adding RAMdisk u-boot header.
252 20:44:02.689688 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/962426/extract-overlay-ramdisk-i7gy3490/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/962426/extract-overlay-ramdisk-i7gy3490/ramdisk.cpio.gz.uboot
253 20:44:02.951829 output: Image Name:
254 20:44:02.952495 output: Created: Fri Nov 8 20:44:02 2024
255 20:44:02.952969 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 20:44:02.953433 output: Data Size: 24150983 Bytes = 23584.94 KiB = 23.03 MiB
257 20:44:02.953874 output: Load Address: 00000000
258 20:44:02.954307 output: Entry Point: 00000000
259 20:44:02.954738 output:
260 20:44:02.955799 rename /var/lib/lava/dispatcher/tmp/962426/extract-overlay-ramdisk-i7gy3490/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/ramdisk/ramdisk.cpio.gz.uboot
261 20:44:02.956603 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 20:44:02.957197 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 20:44:02.957775 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 20:44:02.958283 No LXC device requested
265 20:44:02.958825 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 20:44:02.959378 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 20:44:02.959913 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 20:44:02.960398 Checking files for TFTP limit of 4294967296 bytes.
269 20:44:02.963288 end: 1 tftp-deploy (duration 00:00:40) [common]
270 20:44:02.963910 start: 2 uboot-action (timeout 00:05:00) [common]
271 20:44:02.964534 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 20:44:02.965082 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 20:44:02.965630 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 20:44:02.966199 Using kernel file from prepare-kernel: 962426/tftp-deploy-q_kbpw83/kernel/uImage
275 20:44:02.966884 substitutions:
276 20:44:02.967328 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 20:44:02.967767 - {DTB_ADDR}: 0x01070000
278 20:44:02.968252 - {DTB}: 962426/tftp-deploy-q_kbpw83/dtb/meson-g12b-a311d-libretech-cc.dtb
279 20:44:02.968693 - {INITRD}: 962426/tftp-deploy-q_kbpw83/ramdisk/ramdisk.cpio.gz.uboot
280 20:44:02.969127 - {KERNEL_ADDR}: 0x01080000
281 20:44:02.969555 - {KERNEL}: 962426/tftp-deploy-q_kbpw83/kernel/uImage
282 20:44:02.969986 - {LAVA_MAC}: None
283 20:44:02.970459 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/962426/extract-nfsrootfs-8btj4h6q
284 20:44:02.970896 - {NFS_SERVER_IP}: 192.168.6.2
285 20:44:02.971324 - {PRESEED_CONFIG}: None
286 20:44:02.971749 - {PRESEED_LOCAL}: None
287 20:44:02.972207 - {RAMDISK_ADDR}: 0x08000000
288 20:44:02.972637 - {RAMDISK}: 962426/tftp-deploy-q_kbpw83/ramdisk/ramdisk.cpio.gz.uboot
289 20:44:02.973067 - {ROOT_PART}: None
290 20:44:02.973493 - {ROOT}: None
291 20:44:02.973918 - {SERVER_IP}: 192.168.6.2
292 20:44:02.974342 - {TEE_ADDR}: 0x83000000
293 20:44:02.974768 - {TEE}: None
294 20:44:02.975194 Parsed boot commands:
295 20:44:02.975605 - setenv autoload no
296 20:44:02.976050 - setenv initrd_high 0xffffffff
297 20:44:02.976509 - setenv fdt_high 0xffffffff
298 20:44:02.977012 - dhcp
299 20:44:02.977497 - setenv serverip 192.168.6.2
300 20:44:02.977937 - tftpboot 0x01080000 962426/tftp-deploy-q_kbpw83/kernel/uImage
301 20:44:02.978374 - tftpboot 0x08000000 962426/tftp-deploy-q_kbpw83/ramdisk/ramdisk.cpio.gz.uboot
302 20:44:02.978810 - tftpboot 0x01070000 962426/tftp-deploy-q_kbpw83/dtb/meson-g12b-a311d-libretech-cc.dtb
303 20:44:02.979251 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/962426/extract-nfsrootfs-8btj4h6q,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 20:44:02.979744 - bootm 0x01080000 0x08000000 0x01070000
305 20:44:02.980382 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 20:44:02.982012 start: 2.3 connect-device (timeout 00:05:00) [common]
308 20:44:02.982471 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 20:44:02.998222 Setting prompt string to ['lava-test: # ']
310 20:44:02.999827 end: 2.3 connect-device (duration 00:00:00) [common]
311 20:44:03.000511 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 20:44:03.001104 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 20:44:03.001679 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 20:44:03.002885 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 20:44:03.042126 >> OK - accepted request
316 20:44:03.044303 Returned 0 in 0 seconds
317 20:44:03.145528 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 20:44:03.147288 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 20:44:03.147916 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 20:44:03.148544 Setting prompt string to ['Hit any key to stop autoboot']
322 20:44:03.149049 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 20:44:03.150729 Trying 192.168.56.21...
324 20:44:03.151251 Connected to conserv1.
325 20:44:03.151709 Escape character is '^]'.
326 20:44:03.152196
327 20:44:03.152653 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 20:44:03.153111
329 20:44:15.304253 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 20:44:15.304640 bl2_stage_init 0x01
331 20:44:15.304860 bl2_stage_init 0x81
332 20:44:15.309842 hw id: 0x0000 - pwm id 0x01
333 20:44:15.310139 bl2_stage_init 0xc1
334 20:44:15.310352 bl2_stage_init 0x02
335 20:44:15.310557
336 20:44:15.315444 L0:00000000
337 20:44:15.315723 L1:20000703
338 20:44:15.315933 L2:00008067
339 20:44:15.316180 L3:14000000
340 20:44:15.321003 B2:00402000
341 20:44:15.321268 B1:e0f83180
342 20:44:15.321481
343 20:44:15.321685 TE: 58124
344 20:44:15.321889
345 20:44:15.326645 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 20:44:15.326914
347 20:44:15.327127 Board ID = 1
348 20:44:15.332221 Set A53 clk to 24M
349 20:44:15.332477 Set A73 clk to 24M
350 20:44:15.332684 Set clk81 to 24M
351 20:44:15.337835 A53 clk: 1200 MHz
352 20:44:15.338098 A73 clk: 1200 MHz
353 20:44:15.338307 CLK81: 166.6M
354 20:44:15.338513 smccc: 00012a92
355 20:44:15.343421 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 20:44:15.349025 board id: 1
357 20:44:15.354929 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 20:44:15.365574 fw parse done
359 20:44:15.371550 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 20:44:15.414158 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 20:44:15.425080 PIEI prepare done
362 20:44:15.425373 fastboot data load
363 20:44:15.425580 fastboot data verify
364 20:44:15.430715 verify result: 266
365 20:44:15.436345 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 20:44:15.436622 LPDDR4 probe
367 20:44:15.436827 ddr clk to 1584MHz
368 20:44:15.444278 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 20:44:15.480546
370 20:44:15.480844 dmc_version 0001
371 20:44:15.487294 Check phy result
372 20:44:15.494063 INFO : End of CA training
373 20:44:15.494334 INFO : End of initialization
374 20:44:15.499767 INFO : Training has run successfully!
375 20:44:15.500091 Check phy result
376 20:44:15.505362 INFO : End of initialization
377 20:44:15.505656 INFO : End of read enable training
378 20:44:15.508676 INFO : End of fine write leveling
379 20:44:15.514262 INFO : End of Write leveling coarse delay
380 20:44:15.519923 INFO : Training has run successfully!
381 20:44:15.520223 Check phy result
382 20:44:15.520443 INFO : End of initialization
383 20:44:15.525444 INFO : End of read dq deskew training
384 20:44:15.531051 INFO : End of MPR read delay center optimization
385 20:44:15.531353 INFO : End of write delay center optimization
386 20:44:15.536702 INFO : End of read delay center optimization
387 20:44:15.542307 INFO : End of max read latency training
388 20:44:15.542624 INFO : Training has run successfully!
389 20:44:15.548041 1D training succeed
390 20:44:15.553747 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 20:44:15.601366 Check phy result
392 20:44:15.601719 INFO : End of initialization
393 20:44:15.622950 INFO : End of 2D read delay Voltage center optimization
394 20:44:15.643096 INFO : End of 2D read delay Voltage center optimization
395 20:44:15.694933 INFO : End of 2D write delay Voltage center optimization
396 20:44:15.744208 INFO : End of 2D write delay Voltage center optimization
397 20:44:15.749769 INFO : Training has run successfully!
398 20:44:15.750057
399 20:44:15.750264 channel==0
400 20:44:15.755295 RxClkDly_Margin_A0==88 ps 9
401 20:44:15.755558 TxDqDly_Margin_A0==98 ps 10
402 20:44:15.760923 RxClkDly_Margin_A1==88 ps 9
403 20:44:15.761179 TxDqDly_Margin_A1==98 ps 10
404 20:44:15.761383 TrainedVREFDQ_A0==74
405 20:44:15.766479 TrainedVREFDQ_A1==74
406 20:44:15.766736 VrefDac_Margin_A0==25
407 20:44:15.766940 DeviceVref_Margin_A0==40
408 20:44:15.772185 VrefDac_Margin_A1==25
409 20:44:15.772483 DeviceVref_Margin_A1==40
410 20:44:15.772685
411 20:44:15.772887
412 20:44:15.777777 channel==1
413 20:44:15.778067 RxClkDly_Margin_A0==98 ps 10
414 20:44:15.778282 TxDqDly_Margin_A0==88 ps 9
415 20:44:15.783335 RxClkDly_Margin_A1==98 ps 10
416 20:44:15.783617 TxDqDly_Margin_A1==88 ps 9
417 20:44:15.789023 TrainedVREFDQ_A0==77
418 20:44:15.789428 TrainedVREFDQ_A1==77
419 20:44:15.789721 VrefDac_Margin_A0==22
420 20:44:15.794553 DeviceVref_Margin_A0==37
421 20:44:15.794839 VrefDac_Margin_A1==24
422 20:44:15.800149 DeviceVref_Margin_A1==37
423 20:44:15.800434
424 20:44:15.800643 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 20:44:15.800847
426 20:44:15.833736 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
427 20:44:15.834101 2D training succeed
428 20:44:15.839352 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 20:44:15.845124 auto size-- 65535DDR cs0 size: 2048MB
430 20:44:15.845388 DDR cs1 size: 2048MB
431 20:44:15.850609 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 20:44:15.850861 cs0 DataBus test pass
433 20:44:15.856137 cs1 DataBus test pass
434 20:44:15.856393 cs0 AddrBus test pass
435 20:44:15.856601 cs1 AddrBus test pass
436 20:44:15.856806
437 20:44:15.861725 100bdlr_step_size ps== 420
438 20:44:15.861982 result report
439 20:44:15.867287 boot times 0Enable ddr reg access
440 20:44:15.872637 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 20:44:15.886102 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 20:44:16.458292 0.0;M3 CHK:0;cm4_sp_mode 0
443 20:44:16.458712 MVN_1=0x00000000
444 20:44:16.463778 MVN_2=0x00000000
445 20:44:16.469511 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 20:44:16.469779 OPS=0x10
447 20:44:16.469987 ring efuse init
448 20:44:16.470192 chipver efuse init
449 20:44:16.475083 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 20:44:16.480583 [0.018961 Inits done]
451 20:44:16.480845 secure task start!
452 20:44:16.481047 high task start!
453 20:44:16.485205 low task start!
454 20:44:16.485450 run into bl31
455 20:44:16.491852 NOTICE: BL31: v1.3(release):4fc40b1
456 20:44:16.499707 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 20:44:16.499977 NOTICE: BL31: G12A normal boot!
458 20:44:16.525180 NOTICE: BL31: BL33 decompress pass
459 20:44:16.530960 ERROR: Error initializing runtime service opteed_fast
460 20:44:17.763902
461 20:44:17.764343
462 20:44:17.772298 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 20:44:17.772583
464 20:44:17.772792 Model: Libre Computer AML-A311D-CC Alta
465 20:44:17.980871 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 20:44:18.004081 DRAM: 2 GiB (effective 3.8 GiB)
467 20:44:18.147148 Core: 408 devices, 31 uclasses, devicetree: separate
468 20:44:18.152905 WDT: Not starting watchdog@f0d0
469 20:44:18.185331 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 20:44:18.197703 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 20:44:18.202672 ** Bad device specification mmc 0 **
472 20:44:18.212970 Card did not respond to voltage select! : -110
473 20:44:18.220678 ** Bad device specification mmc 0 **
474 20:44:18.220964 Couldn't find partition mmc 0
475 20:44:18.228935 Card did not respond to voltage select! : -110
476 20:44:18.234629 ** Bad device specification mmc 0 **
477 20:44:18.235031 Couldn't find partition mmc 0
478 20:44:18.239523 Error: could not access storage.
479 20:44:19.505001 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 20:44:19.505414 bl2_stage_init 0x01
481 20:44:19.505624 bl2_stage_init 0x81
482 20:44:19.510555 hw id: 0x0000 - pwm id 0x01
483 20:44:19.510946 bl2_stage_init 0xc1
484 20:44:19.511250 bl2_stage_init 0x02
485 20:44:19.511543
486 20:44:19.516150 L0:00000000
487 20:44:19.516528 L1:20000703
488 20:44:19.516757 L2:00008067
489 20:44:19.516968 L3:14000000
490 20:44:19.521713 B2:00402000
491 20:44:19.522113 B1:e0f83180
492 20:44:19.522421
493 20:44:19.522719 TE: 58124
494 20:44:19.523015
495 20:44:19.527351 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 20:44:19.527627
497 20:44:19.527836 Board ID = 1
498 20:44:19.532983 Set A53 clk to 24M
499 20:44:19.533298 Set A73 clk to 24M
500 20:44:19.533510 Set clk81 to 24M
501 20:44:19.538524 A53 clk: 1200 MHz
502 20:44:19.538938 A73 clk: 1200 MHz
503 20:44:19.539261 CLK81: 166.6M
504 20:44:19.539579 smccc: 00012a92
505 20:44:19.544011 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 20:44:19.549758 board id: 1
507 20:44:19.555587 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 20:44:19.566242 fw parse done
509 20:44:19.572192 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 20:44:19.614810 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 20:44:19.625723 PIEI prepare done
512 20:44:19.626185 fastboot data load
513 20:44:19.626597 fastboot data verify
514 20:44:19.631396 verify result: 266
515 20:44:19.636969 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 20:44:19.637430 LPDDR4 probe
517 20:44:19.637836 ddr clk to 1584MHz
518 20:44:19.644920 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 20:44:19.682229
520 20:44:19.682693 dmc_version 0001
521 20:44:19.688914 Check phy result
522 20:44:19.694784 INFO : End of CA training
523 20:44:19.695232 INFO : End of initialization
524 20:44:19.700392 INFO : Training has run successfully!
525 20:44:19.700839 Check phy result
526 20:44:19.705947 INFO : End of initialization
527 20:44:19.706394 INFO : End of read enable training
528 20:44:19.711593 INFO : End of fine write leveling
529 20:44:19.717188 INFO : End of Write leveling coarse delay
530 20:44:19.717635 INFO : Training has run successfully!
531 20:44:19.718043 Check phy result
532 20:44:19.722808 INFO : End of initialization
533 20:44:19.723254 INFO : End of read dq deskew training
534 20:44:19.728391 INFO : End of MPR read delay center optimization
535 20:44:19.733985 INFO : End of write delay center optimization
536 20:44:19.739547 INFO : End of read delay center optimization
537 20:44:19.740040 INFO : End of max read latency training
538 20:44:19.745156 INFO : Training has run successfully!
539 20:44:19.745607 1D training succeed
540 20:44:19.754316 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 20:44:19.801921 Check phy result
542 20:44:19.802374 INFO : End of initialization
543 20:44:19.824536 INFO : End of 2D read delay Voltage center optimization
544 20:44:19.844901 INFO : End of 2D read delay Voltage center optimization
545 20:44:19.897779 INFO : End of 2D write delay Voltage center optimization
546 20:44:19.946370 INFO : End of 2D write delay Voltage center optimization
547 20:44:19.951839 INFO : Training has run successfully!
548 20:44:19.952331
549 20:44:19.952756 channel==0
550 20:44:19.957482 RxClkDly_Margin_A0==88 ps 9
551 20:44:19.957930 TxDqDly_Margin_A0==98 ps 10
552 20:44:19.963051 RxClkDly_Margin_A1==88 ps 9
553 20:44:19.963502 TxDqDly_Margin_A1==98 ps 10
554 20:44:19.963909 TrainedVREFDQ_A0==74
555 20:44:19.968641 TrainedVREFDQ_A1==76
556 20:44:19.969103 VrefDac_Margin_A0==24
557 20:44:19.969510 DeviceVref_Margin_A0==40
558 20:44:19.974272 VrefDac_Margin_A1==24
559 20:44:19.974721 DeviceVref_Margin_A1==38
560 20:44:19.975124
561 20:44:19.975520
562 20:44:19.979917 channel==1
563 20:44:19.980393 RxClkDly_Margin_A0==98 ps 10
564 20:44:19.980795 TxDqDly_Margin_A0==98 ps 10
565 20:44:19.985399 RxClkDly_Margin_A1==98 ps 10
566 20:44:19.985849 TxDqDly_Margin_A1==88 ps 9
567 20:44:19.991112 TrainedVREFDQ_A0==77
568 20:44:19.991561 TrainedVREFDQ_A1==77
569 20:44:19.991966 VrefDac_Margin_A0==22
570 20:44:19.996674 DeviceVref_Margin_A0==37
571 20:44:19.997131 VrefDac_Margin_A1==22
572 20:44:20.002307 DeviceVref_Margin_A1==37
573 20:44:20.002758
574 20:44:20.003167 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 20:44:20.007876
576 20:44:20.035833 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000017 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
577 20:44:20.036402 2D training succeed
578 20:44:20.041492 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 20:44:20.046966 auto size-- 65535DDR cs0 size: 2048MB
580 20:44:20.047428 DDR cs1 size: 2048MB
581 20:44:20.052551 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 20:44:20.053010 cs0 DataBus test pass
583 20:44:20.058179 cs1 DataBus test pass
584 20:44:20.058634 cs0 AddrBus test pass
585 20:44:20.059038 cs1 AddrBus test pass
586 20:44:20.059440
587 20:44:20.063779 100bdlr_step_size ps== 420
588 20:44:20.064291 result report
589 20:44:20.069367 boot times 0Enable ddr reg access
590 20:44:20.074786 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 20:44:20.088240 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 20:44:20.661885 0.0;M3 CHK:0;cm4_sp_mode 0
593 20:44:20.662493 MVN_1=0x00000000
594 20:44:20.667357 MVN_2=0x00000000
595 20:44:20.673124 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 20:44:20.673611 OPS=0x10
597 20:44:20.674050 ring efuse init
598 20:44:20.674472 chipver efuse init
599 20:44:20.678709 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 20:44:20.684272 [0.018961 Inits done]
601 20:44:20.684711 secure task start!
602 20:44:20.685098 high task start!
603 20:44:20.688874 low task start!
604 20:44:20.689312 run into bl31
605 20:44:20.695504 NOTICE: BL31: v1.3(release):4fc40b1
606 20:44:20.703345 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 20:44:20.703794 NOTICE: BL31: G12A normal boot!
608 20:44:20.728673 NOTICE: BL31: BL33 decompress pass
609 20:44:20.734357 ERROR: Error initializing runtime service opteed_fast
610 20:44:21.967213
611 20:44:21.967818
612 20:44:21.975701 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 20:44:21.976254
614 20:44:21.976679 Model: Libre Computer AML-A311D-CC Alta
615 20:44:22.184198 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 20:44:22.207553 DRAM: 2 GiB (effective 3.8 GiB)
617 20:44:22.350526 Core: 408 devices, 31 uclasses, devicetree: separate
618 20:44:22.356404 WDT: Not starting watchdog@f0d0
619 20:44:22.388598 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 20:44:22.401059 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 20:44:22.406003 ** Bad device specification mmc 0 **
622 20:44:22.416367 Card did not respond to voltage select! : -110
623 20:44:22.424063 ** Bad device specification mmc 0 **
624 20:44:22.424576 Couldn't find partition mmc 0
625 20:44:22.432344 Card did not respond to voltage select! : -110
626 20:44:22.437846 ** Bad device specification mmc 0 **
627 20:44:22.438199 Couldn't find partition mmc 0
628 20:44:22.442980 Error: could not access storage.
629 20:44:22.785461 Net: eth0: ethernet@ff3f0000
630 20:44:22.786048 starting USB...
631 20:44:23.037236 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 20:44:23.037661 Starting the controller
633 20:44:23.044261 USB XHCI 1.10
634 20:44:24.643601 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 20:44:24.644218 bl2_stage_init 0x01
636 20:44:24.644472 bl2_stage_init 0x81
637 20:44:24.649120 hw id: 0x0000 - pwm id 0x01
638 20:44:24.649440 bl2_stage_init 0xc1
639 20:44:24.649660 bl2_stage_init 0x02
640 20:44:24.649867
641 20:44:24.654711 L0:00000000
642 20:44:24.655137 L1:20000703
643 20:44:24.655460 L2:00008067
644 20:44:24.655774 L3:14000000
645 20:44:24.660347 B2:00402000
646 20:44:24.660771 B1:e0f83180
647 20:44:24.661094
648 20:44:24.661403 TE: 58124
649 20:44:24.661633
650 20:44:24.665925 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 20:44:24.666243
652 20:44:24.666458 Board ID = 1
653 20:44:24.671601 Set A53 clk to 24M
654 20:44:24.672071 Set A73 clk to 24M
655 20:44:24.672408 Set clk81 to 24M
656 20:44:24.677189 A53 clk: 1200 MHz
657 20:44:24.677616 A73 clk: 1200 MHz
658 20:44:24.677859 CLK81: 166.6M
659 20:44:24.678066 smccc: 00012a92
660 20:44:24.682775 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 20:44:24.688392 board id: 1
662 20:44:24.694245 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 20:44:24.704953 fw parse done
664 20:44:24.710902 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 20:44:24.753547 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 20:44:24.764428 PIEI prepare done
667 20:44:24.764774 fastboot data load
668 20:44:24.764987 fastboot data verify
669 20:44:24.770040 verify result: 266
670 20:44:24.775632 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 20:44:24.776097 LPDDR4 probe
672 20:44:24.776444 ddr clk to 1584MHz
673 20:44:24.783597 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 20:44:24.820885
675 20:44:24.821287 dmc_version 0001
676 20:44:24.827529 Check phy result
677 20:44:24.833399 INFO : End of CA training
678 20:44:24.833714 INFO : End of initialization
679 20:44:24.839015 INFO : Training has run successfully!
680 20:44:24.839477 Check phy result
681 20:44:24.844614 INFO : End of initialization
682 20:44:24.845066 INFO : End of read enable training
683 20:44:24.850190 INFO : End of fine write leveling
684 20:44:24.855794 INFO : End of Write leveling coarse delay
685 20:44:24.856153 INFO : Training has run successfully!
686 20:44:24.856366 Check phy result
687 20:44:24.861838 INFO : End of initialization
688 20:44:24.862306 INFO : End of read dq deskew training
689 20:44:24.867712 INFO : End of MPR read delay center optimization
690 20:44:24.872615 INFO : End of write delay center optimization
691 20:44:24.878231 INFO : End of read delay center optimization
692 20:44:24.878543 INFO : End of max read latency training
693 20:44:24.883781 INFO : Training has run successfully!
694 20:44:24.884227 1D training succeed
695 20:44:24.892932 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 20:44:24.940600 Check phy result
697 20:44:24.941004 INFO : End of initialization
698 20:44:24.962301 INFO : End of 2D read delay Voltage center optimization
699 20:44:24.981545 INFO : End of 2D read delay Voltage center optimization
700 20:44:25.033444 INFO : End of 2D write delay Voltage center optimization
701 20:44:25.082794 INFO : End of 2D write delay Voltage center optimization
702 20:44:25.088285 INFO : Training has run successfully!
703 20:44:25.088585
704 20:44:25.088795 channel==0
705 20:44:25.093869 RxClkDly_Margin_A0==88 ps 9
706 20:44:25.094188 TxDqDly_Margin_A0==98 ps 10
707 20:44:25.097183 RxClkDly_Margin_A1==88 ps 9
708 20:44:25.097461 TxDqDly_Margin_A1==98 ps 10
709 20:44:25.102719 TrainedVREFDQ_A0==74
710 20:44:25.103004 TrainedVREFDQ_A1==74
711 20:44:25.108325 VrefDac_Margin_A0==25
712 20:44:25.108754 DeviceVref_Margin_A0==40
713 20:44:25.109091 VrefDac_Margin_A1==25
714 20:44:25.113923 DeviceVref_Margin_A1==40
715 20:44:25.114233
716 20:44:25.114452
717 20:44:25.114652 channel==1
718 20:44:25.114848 RxClkDly_Margin_A0==88 ps 9
719 20:44:25.117460 TxDqDly_Margin_A0==88 ps 9
720 20:44:25.122987 RxClkDly_Margin_A1==88 ps 9
721 20:44:25.123297 TxDqDly_Margin_A1==88 ps 9
722 20:44:25.123510 TrainedVREFDQ_A0==76
723 20:44:25.128591 TrainedVREFDQ_A1==77
724 20:44:25.128881 VrefDac_Margin_A0==23
725 20:44:25.134257 DeviceVref_Margin_A0==38
726 20:44:25.134692 VrefDac_Margin_A1==24
727 20:44:25.135017 DeviceVref_Margin_A1==37
728 20:44:25.135329
729 20:44:25.143223 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 20:44:25.143544
731 20:44:25.169238 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000019 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 20:44:25.174744 2D training succeed
733 20:44:25.178196 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 20:44:25.183573 auto size-- 65535DDR cs0 size: 2048MB
735 20:44:25.183875 DDR cs1 size: 2048MB
736 20:44:25.189209 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 20:44:25.189507 cs0 DataBus test pass
738 20:44:25.194772 cs1 DataBus test pass
739 20:44:25.195074 cs0 AddrBus test pass
740 20:44:25.195290 cs1 AddrBus test pass
741 20:44:25.195511
742 20:44:25.200447 100bdlr_step_size ps== 420
743 20:44:25.200870 result report
744 20:44:25.205975 boot times 0Enable ddr reg access
745 20:44:25.210871 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 20:44:25.224361 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 20:44:25.796385 0.0;M3 CHK:0;cm4_sp_mode 0
748 20:44:25.796804 MVN_1=0x00000000
749 20:44:25.801851 MVN_2=0x00000000
750 20:44:25.807619 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 20:44:25.807938 OPS=0x10
752 20:44:25.808205 ring efuse init
753 20:44:25.808416 chipver efuse init
754 20:44:25.813337 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 20:44:25.818832 [0.018961 Inits done]
756 20:44:25.819148 secure task start!
757 20:44:25.819354 high task start!
758 20:44:25.823418 low task start!
759 20:44:25.823720 run into bl31
760 20:44:25.830065 NOTICE: BL31: v1.3(release):4fc40b1
761 20:44:25.837834 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 20:44:25.838169 NOTICE: BL31: G12A normal boot!
763 20:44:25.863312 NOTICE: BL31: BL33 decompress pass
764 20:44:25.868958 ERROR: Error initializing runtime service opteed_fast
765 20:44:27.101889
766 20:44:27.102335
767 20:44:27.110285 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 20:44:27.110729
769 20:44:27.111059 Model: Libre Computer AML-A311D-CC Alta
770 20:44:27.318724 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 20:44:27.342155 DRAM: 2 GiB (effective 3.8 GiB)
772 20:44:27.485164 Core: 408 devices, 31 uclasses, devicetree: separate
773 20:44:27.491016 WDT: Not starting watchdog@f0d0
774 20:44:27.523252 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 20:44:27.535703 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 20:44:27.540696 ** Bad device specification mmc 0 **
777 20:44:27.551045 Card did not respond to voltage select! : -110
778 20:44:27.558656 ** Bad device specification mmc 0 **
779 20:44:27.559069 Couldn't find partition mmc 0
780 20:44:27.566987 Card did not respond to voltage select! : -110
781 20:44:27.572608 ** Bad device specification mmc 0 **
782 20:44:27.572963 Couldn't find partition mmc 0
783 20:44:27.577505 Error: could not access storage.
784 20:44:27.921079 Net: eth0: ethernet@ff3f0000
785 20:44:27.921763 starting USB...
786 20:44:28.173006 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 20:44:28.173672 Starting the controller
788 20:44:28.179765 USB XHCI 1.10
789 20:44:30.345250 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 20:44:30.345677 bl2_stage_init 0x01
791 20:44:30.345902 bl2_stage_init 0x81
792 20:44:30.350807 hw id: 0x0000 - pwm id 0x01
793 20:44:30.351233 bl2_stage_init 0xc1
794 20:44:30.351565 bl2_stage_init 0x02
795 20:44:30.351889
796 20:44:30.356401 L0:00000000
797 20:44:30.356826 L1:20000703
798 20:44:30.357074 L2:00008067
799 20:44:30.357285 L3:14000000
800 20:44:30.359231 B2:00402000
801 20:44:30.359622 B1:e0f83180
802 20:44:30.359951
803 20:44:30.360304 TE: 58159
804 20:44:30.360630
805 20:44:30.370375 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 20:44:30.370716
807 20:44:30.370934 Board ID = 1
808 20:44:30.371148 Set A53 clk to 24M
809 20:44:30.371353 Set A73 clk to 24M
810 20:44:30.376079 Set clk81 to 24M
811 20:44:30.376518 A53 clk: 1200 MHz
812 20:44:30.376850 A73 clk: 1200 MHz
813 20:44:30.379506 CLK81: 166.6M
814 20:44:30.379917 smccc: 00012ab5
815 20:44:30.385151 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 20:44:30.390795 board id: 1
817 20:44:30.395220 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 20:44:30.406593 fw parse done
819 20:44:30.412693 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 20:44:30.454871 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 20:44:30.466085 PIEI prepare done
822 20:44:30.466611 fastboot data load
823 20:44:30.467042 fastboot data verify
824 20:44:30.471675 verify result: 266
825 20:44:30.477248 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 20:44:30.477766 LPDDR4 probe
827 20:44:30.478184 ddr clk to 1584MHz
828 20:44:30.485281 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 20:44:30.522598
830 20:44:30.523214 dmc_version 0001
831 20:44:30.529263 Check phy result
832 20:44:30.535100 INFO : End of CA training
833 20:44:30.535624 INFO : End of initialization
834 20:44:30.540749 INFO : Training has run successfully!
835 20:44:30.541277 Check phy result
836 20:44:30.546377 INFO : End of initialization
837 20:44:30.546904 INFO : End of read enable training
838 20:44:30.549615 INFO : End of fine write leveling
839 20:44:30.555132 INFO : End of Write leveling coarse delay
840 20:44:30.560784 INFO : Training has run successfully!
841 20:44:30.561300 Check phy result
842 20:44:30.561716 INFO : End of initialization
843 20:44:30.566411 INFO : End of read dq deskew training
844 20:44:30.571841 INFO : End of MPR read delay center optimization
845 20:44:30.572252 INFO : End of write delay center optimization
846 20:44:30.577408 INFO : End of read delay center optimization
847 20:44:30.583030 INFO : End of max read latency training
848 20:44:30.583368 INFO : Training has run successfully!
849 20:44:30.588816 1D training succeed
850 20:44:30.594622 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 20:44:30.642184 Check phy result
852 20:44:30.642592 INFO : End of initialization
853 20:44:30.664604 INFO : End of 2D read delay Voltage center optimization
854 20:44:30.684052 INFO : End of 2D read delay Voltage center optimization
855 20:44:30.736005 INFO : End of 2D write delay Voltage center optimization
856 20:44:30.785261 INFO : End of 2D write delay Voltage center optimization
857 20:44:30.790685 INFO : Training has run successfully!
858 20:44:30.791013
859 20:44:30.791233 channel==0
860 20:44:30.796259 RxClkDly_Margin_A0==88 ps 9
861 20:44:30.796587 TxDqDly_Margin_A0==98 ps 10
862 20:44:30.801828 RxClkDly_Margin_A1==88 ps 9
863 20:44:30.803837 TxDqDly_Margin_A1==98 ps 10
864 20:44:30.804470 TrainedVREFDQ_A0==74
865 20:44:30.807394 TrainedVREFDQ_A1==74
866 20:44:30.807944 VrefDac_Margin_A0==24
867 20:44:30.808438 DeviceVref_Margin_A0==40
868 20:44:30.813015 VrefDac_Margin_A1==25
869 20:44:30.813575 DeviceVref_Margin_A1==40
870 20:44:30.814059
871 20:44:30.814503
872 20:44:30.818566 channel==1
873 20:44:30.819095 RxClkDly_Margin_A0==88 ps 9
874 20:44:30.819538 TxDqDly_Margin_A0==98 ps 10
875 20:44:30.824228 RxClkDly_Margin_A1==88 ps 9
876 20:44:30.824789 TxDqDly_Margin_A1==88 ps 9
877 20:44:30.829823 TrainedVREFDQ_A0==77
878 20:44:30.830186 TrainedVREFDQ_A1==77
879 20:44:30.830399 VrefDac_Margin_A0==23
880 20:44:30.835444 DeviceVref_Margin_A0==37
881 20:44:30.835781 VrefDac_Margin_A1==24
882 20:44:30.841076 DeviceVref_Margin_A1==37
883 20:44:30.841414
884 20:44:30.841632 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 20:44:30.841839
886 20:44:30.874484 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000019 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 0000005f
887 20:44:30.874894 2D training succeed
888 20:44:30.880128 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 20:44:30.885665 auto size-- 65535DDR cs0 size: 2048MB
890 20:44:30.886003 DDR cs1 size: 2048MB
891 20:44:30.891290 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 20:44:30.891624 cs0 DataBus test pass
893 20:44:30.897075 cs1 DataBus test pass
894 20:44:30.897619 cs0 AddrBus test pass
895 20:44:30.898015 cs1 AddrBus test pass
896 20:44:30.898406
897 20:44:30.902614 100bdlr_step_size ps== 420
898 20:44:30.903130 result report
899 20:44:30.908254 boot times 0Enable ddr reg access
900 20:44:30.913480 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 20:44:30.926857 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 20:44:31.498782 0.0;M3 CHK:0;cm4_sp_mode 0
903 20:44:31.499209 MVN_1=0x00000000
904 20:44:31.504286 MVN_2=0x00000000
905 20:44:31.510028 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 20:44:31.510328 OPS=0x10
907 20:44:31.510551 ring efuse init
908 20:44:31.510767 chipver efuse init
909 20:44:31.515637 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 20:44:31.521233 [0.018961 Inits done]
911 20:44:31.521531 secure task start!
912 20:44:31.521750 high task start!
913 20:44:31.525825 low task start!
914 20:44:31.526139 run into bl31
915 20:44:31.532480 NOTICE: BL31: v1.3(release):4fc40b1
916 20:44:31.540393 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 20:44:31.540921 NOTICE: BL31: G12A normal boot!
918 20:44:31.565746 NOTICE: BL31: BL33 decompress pass
919 20:44:31.571438 ERROR: Error initializing runtime service opteed_fast
920 20:44:32.804400
921 20:44:32.805025
922 20:44:32.812376 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 20:44:32.812885
924 20:44:32.813319 Model: Libre Computer AML-A311D-CC Alta
925 20:44:33.021158 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 20:44:33.044529 DRAM: 2 GiB (effective 3.8 GiB)
927 20:44:33.187520 Core: 408 devices, 31 uclasses, devicetree: separate
928 20:44:33.193399 WDT: Not starting watchdog@f0d0
929 20:44:33.225674 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 20:44:33.238047 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 20:44:33.243068 ** Bad device specification mmc 0 **
932 20:44:33.253444 Card did not respond to voltage select! : -110
933 20:44:33.261025 ** Bad device specification mmc 0 **
934 20:44:33.261507 Couldn't find partition mmc 0
935 20:44:33.269416 Card did not respond to voltage select! : -110
936 20:44:33.274918 ** Bad device specification mmc 0 **
937 20:44:33.275400 Couldn't find partition mmc 0
938 20:44:33.279957 Error: could not access storage.
939 20:44:33.622438 Net: eth0: ethernet@ff3f0000
940 20:44:33.623055 starting USB...
941 20:44:33.874284 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 20:44:33.874898 Starting the controller
943 20:44:33.881259 USB XHCI 1.10
944 20:44:35.435300 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 20:44:35.443761 scanning usb for storage devices... 0 Storage Device(s) found
947 20:44:35.494984 Hit any key to stop autoboot: 1
948 20:44:35.496000 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 20:44:35.496387 start: 2.4.3 bootloader-commands (timeout 00:04:27) [common]
950 20:44:35.496658 Setting prompt string to ['=>']
951 20:44:35.496938 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:27)
952 20:44:35.501658 0
953 20:44:35.502440 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 20:44:35.502755 Sending with 10 millisecond of delay
956 20:44:36.637222 => setenv autoload no
957 20:44:36.648482 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
958 20:44:36.651103 setenv autoload no
959 20:44:36.651959 Sending with 10 millisecond of delay
961 20:44:38.449011 => setenv initrd_high 0xffffffff
962 20:44:38.459770 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 20:44:38.460395 setenv initrd_high 0xffffffff
964 20:44:38.460885 Sending with 10 millisecond of delay
966 20:44:40.077142 => setenv fdt_high 0xffffffff
967 20:44:40.088051 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 20:44:40.088633 setenv fdt_high 0xffffffff
969 20:44:40.089137 Sending with 10 millisecond of delay
971 20:44:40.380852 => dhcp
972 20:44:40.391570 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 20:44:40.392166 dhcp
974 20:44:40.392424 Speed: 1000, full duplex
975 20:44:40.392640 BOOTP broadcast 1
976 20:44:40.402852 DHCP client bound to address 192.168.6.27 (11 ms)
977 20:44:40.403401 Sending with 10 millisecond of delay
979 20:44:42.081023 => setenv serverip 192.168.6.2
980 20:44:42.094163 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 20:44:42.094713 setenv serverip 192.168.6.2
982 20:44:42.095159 Sending with 10 millisecond of delay
984 20:44:45.817502 => tftpboot 0x01080000 962426/tftp-deploy-q_kbpw83/kernel/uImage
985 20:44:45.828303 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
986 20:44:45.828910 tftpboot 0x01080000 962426/tftp-deploy-q_kbpw83/kernel/uImage
987 20:44:45.829177 Speed: 1000, full duplex
988 20:44:45.829411 Using ethernet@ff3f0000 device
989 20:44:45.830857 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 20:44:45.836352 Filename '962426/tftp-deploy-q_kbpw83/kernel/uImage'.
991 20:44:45.840364 Load address: 0x1080000
992 20:44:48.259230 Loading: *################################################## 36.1 MiB
993 20:44:48.259875 14.9 MiB/s
994 20:44:48.260375 done
995 20:44:48.263565 Bytes transferred = 37812800 (240fa40 hex)
996 20:44:48.264401 Sending with 10 millisecond of delay
998 20:44:52.952734 => tftpboot 0x08000000 962426/tftp-deploy-q_kbpw83/ramdisk/ramdisk.cpio.gz.uboot
999 20:44:52.963531 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 20:44:52.964359 tftpboot 0x08000000 962426/tftp-deploy-q_kbpw83/ramdisk/ramdisk.cpio.gz.uboot
1001 20:44:52.964804 Speed: 1000, full duplex
1002 20:44:52.965215 Using ethernet@ff3f0000 device
1003 20:44:52.966227 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 20:44:52.974997 Filename '962426/tftp-deploy-q_kbpw83/ramdisk/ramdisk.cpio.gz.uboot'.
1005 20:44:52.975539 Load address: 0x8000000
1006 20:45:00.379401 Loading: *##T ############################################### UDP wrong checksum 00000005 00005d28
1007 20:45:01.662775 UDP wrong checksum 000000ff 0000c801
1008 20:45:01.713102 UDP wrong checksum 000000ff 000058f4
1009 20:45:05.381478 T UDP wrong checksum 00000005 00005d28
1010 20:45:15.383361 T T UDP wrong checksum 00000005 00005d28
1011 20:45:35.387452 T T T T UDP wrong checksum 00000005 00005d28
1012 20:45:42.033880 T UDP wrong checksum 000000ff 000022ae
1013 20:45:42.070161 UDP wrong checksum 000000ff 0000b9a0
1014 20:45:50.391532 T
1015 20:45:50.391932 Retry count exceeded; starting again
1017 20:45:50.392890 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1020 20:45:50.393814 end: 2.4 uboot-commands (duration 00:01:47) [common]
1022 20:45:50.394540 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1024 20:45:50.395094 end: 2 uboot-action (duration 00:01:47) [common]
1026 20:45:50.395921 Cleaning after the job
1027 20:45:50.396278 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/ramdisk
1028 20:45:50.397283 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/kernel
1029 20:45:50.400935 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/dtb
1030 20:45:50.401754 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/nfsrootfs
1031 20:45:50.431380 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962426/tftp-deploy-q_kbpw83/modules
1032 20:45:50.438045 start: 4.1 power-off (timeout 00:00:30) [common]
1033 20:45:50.438630 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1034 20:45:50.475190 >> OK - accepted request
1035 20:45:50.477291 Returned 0 in 0 seconds
1036 20:45:50.578130 end: 4.1 power-off (duration 00:00:00) [common]
1038 20:45:50.579133 start: 4.2 read-feedback (timeout 00:10:00) [common]
1039 20:45:50.579768 Listened to connection for namespace 'common' for up to 1s
1040 20:45:51.579895 Finalising connection for namespace 'common'
1041 20:45:51.580669 Disconnecting from shell: Finalise
1042 20:45:51.581187 =>
1043 20:45:51.682219 end: 4.2 read-feedback (duration 00:00:01) [common]
1044 20:45:51.682926 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/962426
1045 20:45:53.417045 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/962426
1046 20:45:53.417631 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.