Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 20:51:23.042432 lava-dispatcher, installed at version: 2024.01
2 20:51:23.043386 start: 0 validate
3 20:51:23.043956 Start time: 2024-11-08 20:51:23.043919+00:00 (UTC)
4 20:51:23.044644 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 20:51:23.045295 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 20:51:23.090405 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 20:51:23.091067 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-225-g50643bbc9eb6%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
8 20:51:23.122491 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 20:51:23.123239 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-225-g50643bbc9eb6%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 20:51:23.154039 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 20:51:23.154533 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 20:51:23.184531 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 20:51:23.185049 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-225-g50643bbc9eb6%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
14 20:51:23.222898 validate duration: 0.18
16 20:51:23.223760 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 20:51:23.224136 start: 1.1 download-retry (timeout 00:10:00) [common]
18 20:51:23.224461 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 20:51:23.225162 Not decompressing ramdisk as can be used compressed.
20 20:51:23.225661 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 20:51:23.225954 saving as /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/ramdisk/initrd.cpio.gz
22 20:51:23.226249 total size: 5628169 (5 MB)
23 20:51:23.267920 progress 0 % (0 MB)
24 20:51:23.276311 progress 5 % (0 MB)
25 20:51:23.285293 progress 10 % (0 MB)
26 20:51:23.292400 progress 15 % (0 MB)
27 20:51:23.296718 progress 20 % (1 MB)
28 20:51:23.300539 progress 25 % (1 MB)
29 20:51:23.304851 progress 30 % (1 MB)
30 20:51:23.309169 progress 35 % (1 MB)
31 20:51:23.312972 progress 40 % (2 MB)
32 20:51:23.317237 progress 45 % (2 MB)
33 20:51:23.321125 progress 50 % (2 MB)
34 20:51:23.325385 progress 55 % (2 MB)
35 20:51:23.329667 progress 60 % (3 MB)
36 20:51:23.333618 progress 65 % (3 MB)
37 20:51:23.337877 progress 70 % (3 MB)
38 20:51:23.341752 progress 75 % (4 MB)
39 20:51:23.345999 progress 80 % (4 MB)
40 20:51:23.349800 progress 85 % (4 MB)
41 20:51:23.354034 progress 90 % (4 MB)
42 20:51:23.358291 progress 95 % (5 MB)
43 20:51:23.361790 progress 100 % (5 MB)
44 20:51:23.362470 5 MB downloaded in 0.14 s (39.41 MB/s)
45 20:51:23.363036 end: 1.1.1 http-download (duration 00:00:00) [common]
47 20:51:23.363997 end: 1.1 download-retry (duration 00:00:00) [common]
48 20:51:23.364334 start: 1.2 download-retry (timeout 00:10:00) [common]
49 20:51:23.364632 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 20:51:23.365116 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-225-g50643bbc9eb6/arm64/defconfig/clang-16/kernel/Image
51 20:51:23.365379 saving as /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/kernel/Image
52 20:51:23.365599 total size: 37812736 (36 MB)
53 20:51:23.365819 No compression specified
54 20:51:23.404491 progress 0 % (0 MB)
55 20:51:23.429451 progress 5 % (1 MB)
56 20:51:23.454040 progress 10 % (3 MB)
57 20:51:23.478787 progress 15 % (5 MB)
58 20:51:23.502950 progress 20 % (7 MB)
59 20:51:23.527540 progress 25 % (9 MB)
60 20:51:23.554376 progress 30 % (10 MB)
61 20:51:23.578338 progress 35 % (12 MB)
62 20:51:23.602855 progress 40 % (14 MB)
63 20:51:23.627321 progress 45 % (16 MB)
64 20:51:23.651289 progress 50 % (18 MB)
65 20:51:23.675794 progress 55 % (19 MB)
66 20:51:23.700576 progress 60 % (21 MB)
67 20:51:23.724936 progress 65 % (23 MB)
68 20:51:23.748707 progress 70 % (25 MB)
69 20:51:23.773211 progress 75 % (27 MB)
70 20:51:23.797895 progress 80 % (28 MB)
71 20:51:23.821877 progress 85 % (30 MB)
72 20:51:23.846835 progress 90 % (32 MB)
73 20:51:23.871501 progress 95 % (34 MB)
74 20:51:23.895200 progress 100 % (36 MB)
75 20:51:23.896028 36 MB downloaded in 0.53 s (67.99 MB/s)
76 20:51:23.896544 end: 1.2.1 http-download (duration 00:00:01) [common]
78 20:51:23.897405 end: 1.2 download-retry (duration 00:00:01) [common]
79 20:51:23.897702 start: 1.3 download-retry (timeout 00:09:59) [common]
80 20:51:23.897984 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 20:51:23.898454 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-225-g50643bbc9eb6/arm64/defconfig/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 20:51:23.898738 saving as /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 20:51:23.898954 total size: 53209 (0 MB)
84 20:51:23.899175 No compression specified
85 20:51:23.941407 progress 61 % (0 MB)
86 20:51:23.942292 progress 100 % (0 MB)
87 20:51:23.942852 0 MB downloaded in 0.04 s (1.16 MB/s)
88 20:51:23.943363 end: 1.3.1 http-download (duration 00:00:00) [common]
90 20:51:23.944250 end: 1.3 download-retry (duration 00:00:00) [common]
91 20:51:23.944545 start: 1.4 download-retry (timeout 00:09:59) [common]
92 20:51:23.944828 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 20:51:23.945289 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 20:51:23.945543 saving as /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/nfsrootfs/full.rootfs.tar
95 20:51:23.945759 total size: 120894716 (115 MB)
96 20:51:23.945976 Using unxz to decompress xz
97 20:51:23.980169 progress 0 % (0 MB)
98 20:51:24.807022 progress 5 % (5 MB)
99 20:51:25.712410 progress 10 % (11 MB)
100 20:51:26.512259 progress 15 % (17 MB)
101 20:51:27.256801 progress 20 % (23 MB)
102 20:51:27.850591 progress 25 % (28 MB)
103 20:51:28.693098 progress 30 % (34 MB)
104 20:51:29.555842 progress 35 % (40 MB)
105 20:51:29.979037 progress 40 % (46 MB)
106 20:51:30.407796 progress 45 % (51 MB)
107 20:51:31.158355 progress 50 % (57 MB)
108 20:51:32.057003 progress 55 % (63 MB)
109 20:51:32.846179 progress 60 % (69 MB)
110 20:51:33.604482 progress 65 % (74 MB)
111 20:51:34.380888 progress 70 % (80 MB)
112 20:51:35.204740 progress 75 % (86 MB)
113 20:51:35.994396 progress 80 % (92 MB)
114 20:51:36.754382 progress 85 % (98 MB)
115 20:51:37.640084 progress 90 % (103 MB)
116 20:51:38.411431 progress 95 % (109 MB)
117 20:51:39.238115 progress 100 % (115 MB)
118 20:51:39.252137 115 MB downloaded in 15.31 s (7.53 MB/s)
119 20:51:39.253147 end: 1.4.1 http-download (duration 00:00:15) [common]
121 20:51:39.254887 end: 1.4 download-retry (duration 00:00:15) [common]
122 20:51:39.255447 start: 1.5 download-retry (timeout 00:09:44) [common]
123 20:51:39.256066 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 20:51:39.257049 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-225-g50643bbc9eb6/arm64/defconfig/clang-16/modules.tar.xz
125 20:51:39.257524 saving as /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/modules/modules.tar
126 20:51:39.257924 total size: 11766788 (11 MB)
127 20:51:39.258334 Using unxz to decompress xz
128 20:51:39.306117 progress 0 % (0 MB)
129 20:51:39.373361 progress 5 % (0 MB)
130 20:51:39.450844 progress 10 % (1 MB)
131 20:51:39.548940 progress 15 % (1 MB)
132 20:51:39.646694 progress 20 % (2 MB)
133 20:51:39.726024 progress 25 % (2 MB)
134 20:51:39.803046 progress 30 % (3 MB)
135 20:51:39.883579 progress 35 % (3 MB)
136 20:51:39.963456 progress 40 % (4 MB)
137 20:51:40.040027 progress 45 % (5 MB)
138 20:51:40.126847 progress 50 % (5 MB)
139 20:51:40.210777 progress 55 % (6 MB)
140 20:51:40.297755 progress 60 % (6 MB)
141 20:51:40.379602 progress 65 % (7 MB)
142 20:51:40.465015 progress 70 % (7 MB)
143 20:51:40.548782 progress 75 % (8 MB)
144 20:51:40.633217 progress 80 % (9 MB)
145 20:51:40.714210 progress 85 % (9 MB)
146 20:51:40.798184 progress 90 % (10 MB)
147 20:51:40.877809 progress 95 % (10 MB)
148 20:51:40.956491 progress 100 % (11 MB)
149 20:51:40.967523 11 MB downloaded in 1.71 s (6.56 MB/s)
150 20:51:40.968197 end: 1.5.1 http-download (duration 00:00:02) [common]
152 20:51:40.970009 end: 1.5 download-retry (duration 00:00:02) [common]
153 20:51:40.970579 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 20:51:40.971147 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 20:51:57.248820 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/962371/extract-nfsrootfs-1yaui08n
156 20:51:57.249405 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 20:51:57.249686 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 20:51:57.250294 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl
159 20:51:57.250712 makedir: /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin
160 20:51:57.251035 makedir: /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/tests
161 20:51:57.251339 makedir: /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/results
162 20:51:57.251658 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-add-keys
163 20:51:57.252203 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-add-sources
164 20:51:57.252713 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-background-process-start
165 20:51:57.253197 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-background-process-stop
166 20:51:57.253718 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-common-functions
167 20:51:57.254203 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-echo-ipv4
168 20:51:57.254678 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-install-packages
169 20:51:57.255163 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-installed-packages
170 20:51:57.255657 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-os-build
171 20:51:57.256154 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-probe-channel
172 20:51:57.256629 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-probe-ip
173 20:51:57.257087 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-target-ip
174 20:51:57.257553 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-target-mac
175 20:51:57.258016 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-target-storage
176 20:51:57.258484 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-test-case
177 20:51:57.258970 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-test-event
178 20:51:57.259461 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-test-feedback
179 20:51:57.259950 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-test-raise
180 20:51:57.260453 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-test-reference
181 20:51:57.261001 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-test-runner
182 20:51:57.261483 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-test-set
183 20:51:57.261947 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-test-shell
184 20:51:57.262416 Updating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-add-keys (debian)
185 20:51:57.262926 Updating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-add-sources (debian)
186 20:51:57.263411 Updating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-install-packages (debian)
187 20:51:57.263892 Updating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-installed-packages (debian)
188 20:51:57.264406 Updating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/bin/lava-os-build (debian)
189 20:51:57.264831 Creating /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/environment
190 20:51:57.265189 LAVA metadata
191 20:51:57.265444 - LAVA_JOB_ID=962371
192 20:51:57.265656 - LAVA_DISPATCHER_IP=192.168.6.2
193 20:51:57.266013 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 20:51:57.266995 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 20:51:57.267312 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 20:51:57.267517 skipped lava-vland-overlay
197 20:51:57.267754 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 20:51:57.268033 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 20:51:57.268256 skipped lava-multinode-overlay
200 20:51:57.268497 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 20:51:57.268749 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 20:51:57.268997 Loading test definitions
203 20:51:57.269269 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 20:51:57.269485 Using /lava-962371 at stage 0
205 20:51:57.270552 uuid=962371_1.6.2.4.1 testdef=None
206 20:51:57.270851 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 20:51:57.271110 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 20:51:57.272685 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 20:51:57.273464 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 20:51:57.275464 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 20:51:57.276321 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 20:51:57.278133 runner path: /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/0/tests/0_timesync-off test_uuid 962371_1.6.2.4.1
215 20:51:57.278682 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 20:51:57.279486 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 20:51:57.279705 Using /lava-962371 at stage 0
219 20:51:57.280074 Fetching tests from https://github.com/kernelci/test-definitions.git
220 20:51:57.280367 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/0/tests/1_kselftest-alsa'
221 20:52:00.709706 Running '/usr/bin/git checkout kernelci.org
222 20:52:01.235427 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 20:52:01.236954 uuid=962371_1.6.2.4.5 testdef=None
224 20:52:01.237331 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 20:52:01.238076 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 20:52:01.241050 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 20:52:01.241903 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 20:52:01.245848 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 20:52:01.246781 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 20:52:01.253100 runner path: /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/0/tests/1_kselftest-alsa test_uuid 962371_1.6.2.4.5
234 20:52:01.253711 BOARD='meson-sm1-s905d3-libretech-cc'
235 20:52:01.253949 BRANCH='mainline'
236 20:52:01.254149 SKIPFILE='/dev/null'
237 20:52:01.254350 SKIP_INSTALL='True'
238 20:52:01.254545 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-225-g50643bbc9eb6/arm64/defconfig/clang-16/kselftest.tar.xz'
239 20:52:01.254746 TST_CASENAME=''
240 20:52:01.254940 TST_CMDFILES='alsa'
241 20:52:01.255602 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 20:52:01.256846 Creating lava-test-runner.conf files
244 20:52:01.257252 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/962371/lava-overlay-sbl3wkhl/lava-962371/0 for stage 0
245 20:52:01.257918 - 0_timesync-off
246 20:52:01.258373 - 1_kselftest-alsa
247 20:52:01.259005 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 20:52:01.259548 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 20:52:24.745626 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 20:52:24.746068 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 20:52:24.746358 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 20:52:24.746661 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 20:52:24.746953 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 20:52:25.387828 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 20:52:25.388334 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 20:52:25.388600 extracting modules file /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/modules/modules.tar to /var/lib/lava/dispatcher/tmp/962371/extract-nfsrootfs-1yaui08n
257 20:52:26.733726 extracting modules file /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/modules/modules.tar to /var/lib/lava/dispatcher/tmp/962371/extract-overlay-ramdisk-fflikbjt/ramdisk
258 20:52:28.128829 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 20:52:28.129321 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 20:52:28.129619 [common] Applying overlay to NFS
261 20:52:28.129852 [common] Applying overlay /var/lib/lava/dispatcher/tmp/962371/compress-overlay-tkz8dwez/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/962371/extract-nfsrootfs-1yaui08n
262 20:52:30.839681 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 20:52:30.840170 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 20:52:30.840475 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 20:52:30.840736 Converting downloaded kernel to a uImage
266 20:52:30.841060 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/kernel/Image /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/kernel/uImage
267 20:52:31.285322 output: Image Name:
268 20:52:31.285749 output: Created: Fri Nov 8 20:52:30 2024
269 20:52:31.285978 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 20:52:31.286194 output: Data Size: 37812736 Bytes = 36926.50 KiB = 36.06 MiB
271 20:52:31.286401 output: Load Address: 01080000
272 20:52:31.286607 output: Entry Point: 01080000
273 20:52:31.286809 output:
274 20:52:31.287149 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 20:52:31.287429 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 20:52:31.287708 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 20:52:31.287973 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 20:52:31.288291 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 20:52:31.288561 Building ramdisk /var/lib/lava/dispatcher/tmp/962371/extract-overlay-ramdisk-fflikbjt/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/962371/extract-overlay-ramdisk-fflikbjt/ramdisk
280 20:52:33.520843 >> 173443 blocks
281 20:52:41.227754 Adding RAMdisk u-boot header.
282 20:52:41.228378 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/962371/extract-overlay-ramdisk-fflikbjt/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/962371/extract-overlay-ramdisk-fflikbjt/ramdisk.cpio.gz.uboot
283 20:52:41.478946 output: Image Name:
284 20:52:41.479376 output: Created: Fri Nov 8 20:52:41 2024
285 20:52:41.479907 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 20:52:41.480430 output: Data Size: 24150801 Bytes = 23584.77 KiB = 23.03 MiB
287 20:52:41.480890 output: Load Address: 00000000
288 20:52:41.481339 output: Entry Point: 00000000
289 20:52:41.481783 output:
290 20:52:41.482855 rename /var/lib/lava/dispatcher/tmp/962371/extract-overlay-ramdisk-fflikbjt/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/ramdisk/ramdisk.cpio.gz.uboot
291 20:52:41.483635 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 20:52:41.484281 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 20:52:41.484876 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 20:52:41.485381 No LXC device requested
295 20:52:41.485940 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 20:52:41.486506 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 20:52:41.487057 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 20:52:41.487513 Checking files for TFTP limit of 4294967296 bytes.
299 20:52:41.490461 end: 1 tftp-deploy (duration 00:01:18) [common]
300 20:52:41.491102 start: 2 uboot-action (timeout 00:05:00) [common]
301 20:52:41.491691 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 20:52:41.492294 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 20:52:41.492862 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 20:52:41.493450 Using kernel file from prepare-kernel: 962371/tftp-deploy-7uln8c0i/kernel/uImage
305 20:52:41.494143 substitutions:
306 20:52:41.494596 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 20:52:41.495045 - {DTB_ADDR}: 0x01070000
308 20:52:41.495491 - {DTB}: 962371/tftp-deploy-7uln8c0i/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 20:52:41.495936 - {INITRD}: 962371/tftp-deploy-7uln8c0i/ramdisk/ramdisk.cpio.gz.uboot
310 20:52:41.496648 - {KERNEL_ADDR}: 0x01080000
311 20:52:41.497152 - {KERNEL}: 962371/tftp-deploy-7uln8c0i/kernel/uImage
312 20:52:41.497612 - {LAVA_MAC}: None
313 20:52:41.498129 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/962371/extract-nfsrootfs-1yaui08n
314 20:52:41.498592 - {NFS_SERVER_IP}: 192.168.6.2
315 20:52:41.499038 - {PRESEED_CONFIG}: None
316 20:52:41.499483 - {PRESEED_LOCAL}: None
317 20:52:41.499927 - {RAMDISK_ADDR}: 0x08000000
318 20:52:41.500523 - {RAMDISK}: 962371/tftp-deploy-7uln8c0i/ramdisk/ramdisk.cpio.gz.uboot
319 20:52:41.500978 - {ROOT_PART}: None
320 20:52:41.501422 - {ROOT}: None
321 20:52:41.501861 - {SERVER_IP}: 192.168.6.2
322 20:52:41.502298 - {TEE_ADDR}: 0x83000000
323 20:52:41.502738 - {TEE}: None
324 20:52:41.503177 Parsed boot commands:
325 20:52:41.503605 - setenv autoload no
326 20:52:41.504072 - setenv initrd_high 0xffffffff
327 20:52:41.504516 - setenv fdt_high 0xffffffff
328 20:52:41.504951 - dhcp
329 20:52:41.505390 - setenv serverip 192.168.6.2
330 20:52:41.505828 - tftpboot 0x01080000 962371/tftp-deploy-7uln8c0i/kernel/uImage
331 20:52:41.506270 - tftpboot 0x08000000 962371/tftp-deploy-7uln8c0i/ramdisk/ramdisk.cpio.gz.uboot
332 20:52:41.506707 - tftpboot 0x01070000 962371/tftp-deploy-7uln8c0i/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 20:52:41.507144 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/962371/extract-nfsrootfs-1yaui08n,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 20:52:41.507595 - bootm 0x01080000 0x08000000 0x01070000
335 20:52:41.508204 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 20:52:41.509905 start: 2.3 connect-device (timeout 00:05:00) [common]
338 20:52:41.510390 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 20:52:41.526293 Setting prompt string to ['lava-test: # ']
340 20:52:41.527924 end: 2.3 connect-device (duration 00:00:00) [common]
341 20:52:41.528687 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 20:52:41.529341 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 20:52:41.529949 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 20:52:41.531223 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 20:52:41.572174 >> OK - accepted request
346 20:52:41.574360 Returned 0 in 0 seconds
347 20:52:41.675538 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 20:52:41.677374 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 20:52:41.678016 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 20:52:41.678590 Setting prompt string to ['Hit any key to stop autoboot']
352 20:52:41.679100 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 20:52:41.680825 Trying 192.168.56.21...
354 20:52:41.681381 Connected to conserv1.
355 20:52:41.681856 Escape character is '^]'.
356 20:52:41.682333
357 20:52:41.682811 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 20:52:41.683291
359 20:52:49.270960 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 20:52:49.271646 bl2_stage_init 0x01
361 20:52:49.272225 bl2_stage_init 0x81
362 20:52:49.276438 hw id: 0x0000 - pwm id 0x01
363 20:52:49.276947 bl2_stage_init 0xc1
364 20:52:49.281948 bl2_stage_init 0x02
365 20:52:49.282453
366 20:52:49.282930 L0:00000000
367 20:52:49.283400 L1:00000703
368 20:52:49.283852 L2:00008067
369 20:52:49.284356 L3:15000000
370 20:52:49.287675 S1:00000000
371 20:52:49.288203 B2:20282000
372 20:52:49.288664 B1:a0f83180
373 20:52:49.289103
374 20:52:49.289543 TE: 68762
375 20:52:49.289983
376 20:52:49.293288 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 20:52:49.293761
378 20:52:49.298754 Board ID = 1
379 20:52:49.299220 Set cpu clk to 24M
380 20:52:49.299658 Set clk81 to 24M
381 20:52:49.304362 Use GP1_pll as DSU clk.
382 20:52:49.304832 DSU clk: 1200 Mhz
383 20:52:49.305270 CPU clk: 1200 MHz
384 20:52:49.309975 Set clk81 to 166.6M
385 20:52:49.315583 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 20:52:49.316086 board id: 1
387 20:52:49.322837 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 20:52:49.333836 fw parse done
389 20:52:49.339670 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 20:52:49.382649 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 20:52:49.393797 PIEI prepare done
392 20:52:49.394115 fastboot data load
393 20:52:49.394328 fastboot data verify
394 20:52:49.399433 verify result: 266
395 20:52:49.405038 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 20:52:49.405611 LPDDR4 probe
397 20:52:49.406082 ddr clk to 1584MHz
398 20:52:49.413115 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 20:52:49.450815
400 20:52:49.451400 dmc_version 0001
401 20:52:49.457818 Check phy result
402 20:52:49.463769 INFO : End of CA training
403 20:52:49.464336 INFO : End of initialization
404 20:52:49.469360 INFO : Training has run successfully!
405 20:52:49.469856 Check phy result
406 20:52:49.474957 INFO : End of initialization
407 20:52:49.475458 INFO : End of read enable training
408 20:52:49.480637 INFO : End of fine write leveling
409 20:52:49.486236 INFO : End of Write leveling coarse delay
410 20:52:49.486732 INFO : Training has run successfully!
411 20:52:49.487188 Check phy result
412 20:52:49.491757 INFO : End of initialization
413 20:52:49.492301 INFO : End of read dq deskew training
414 20:52:49.497324 INFO : End of MPR read delay center optimization
415 20:52:49.502976 INFO : End of write delay center optimization
416 20:52:49.508634 INFO : End of read delay center optimization
417 20:52:49.509185 INFO : End of max read latency training
418 20:52:49.514286 INFO : Training has run successfully!
419 20:52:49.514788 1D training succeed
420 20:52:49.523412 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 20:52:49.570783 Check phy result
422 20:52:49.571341 INFO : End of initialization
423 20:52:49.599122 INFO : End of 2D read delay Voltage center optimization
424 20:52:49.622387 INFO : End of 2D read delay Voltage center optimization
425 20:52:49.679795 INFO : End of 2D write delay Voltage center optimization
426 20:52:49.733790 INFO : End of 2D write delay Voltage center optimization
427 20:52:49.739799 INFO : Training has run successfully!
428 20:52:49.740364
429 20:52:49.740830 channel==0
430 20:52:49.744875 RxClkDly_Margin_A0==78 ps 8
431 20:52:49.745365 TxDqDly_Margin_A0==98 ps 10
432 20:52:49.748248 RxClkDly_Margin_A1==88 ps 9
433 20:52:49.748730 TxDqDly_Margin_A1==98 ps 10
434 20:52:49.753793 TrainedVREFDQ_A0==74
435 20:52:49.754276 TrainedVREFDQ_A1==74
436 20:52:49.759430 VrefDac_Margin_A0==25
437 20:52:49.759915 DeviceVref_Margin_A0==40
438 20:52:49.760411 VrefDac_Margin_A1==23
439 20:52:49.765033 DeviceVref_Margin_A1==40
440 20:52:49.765521
441 20:52:49.765973
442 20:52:49.766418 channel==1
443 20:52:49.766857 RxClkDly_Margin_A0==78 ps 8
444 20:52:49.768436 TxDqDly_Margin_A0==98 ps 10
445 20:52:49.774111 RxClkDly_Margin_A1==78 ps 8
446 20:52:49.774609 TxDqDly_Margin_A1==98 ps 10
447 20:52:49.775063 TrainedVREFDQ_A0==78
448 20:52:49.779634 TrainedVREFDQ_A1==78
449 20:52:49.780163 VrefDac_Margin_A0==22
450 20:52:49.785352 DeviceVref_Margin_A0==36
451 20:52:49.785844 VrefDac_Margin_A1==22
452 20:52:49.786296 DeviceVref_Margin_A1==36
453 20:52:49.786740
454 20:52:49.794145 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 20:52:49.794647
456 20:52:49.819930 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 20:52:49.825553 2D training succeed
458 20:52:49.831108 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 20:52:49.836693 auto size-- 65535DDR cs0 size: 2048MB
460 20:52:49.837257 DDR cs1 size: 2048MB
461 20:52:49.842437 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 20:52:49.842996 cs0 DataBus test pass
463 20:52:49.843463 cs1 DataBus test pass
464 20:52:49.847932 cs0 AddrBus test pass
465 20:52:49.848529 cs1 AddrBus test pass
466 20:52:49.849008
467 20:52:49.849508 100bdlr_step_size ps== 471
468 20:52:49.853534 result report
469 20:52:49.854090 boot times 0Enable ddr reg access
470 20:52:49.862318 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 20:52:49.875429 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 20:52:50.534911 bl2z: ptr: 05129330, size: 00001e40
473 20:52:50.543730 0.0;M3 CHK:0;cm4_sp_mode 0
474 20:52:50.544390 MVN_1=0x00000000
475 20:52:50.544868 MVN_2=0x00000000
476 20:52:50.555224 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 20:52:50.555803 OPS=0x04
478 20:52:50.556318 ring efuse init
479 20:52:50.558187 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 20:52:50.564383 [0.017355 Inits done]
481 20:52:50.564937 secure task start!
482 20:52:50.565403 high task start!
483 20:52:50.565887 low task start!
484 20:52:50.568610 run into bl31
485 20:52:50.577410 NOTICE: BL31: v1.3(release):4fc40b1
486 20:52:50.585090 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 20:52:50.585676 NOTICE: BL31: G12A normal boot!
488 20:52:50.600587 NOTICE: BL31: BL33 decompress pass
489 20:52:50.606239 ERROR: Error initializing runtime service opteed_fast
490 20:52:51.823604 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 20:52:51.824288 bl2_stage_init 0x01
492 20:52:51.824764 bl2_stage_init 0x81
493 20:52:51.829190 hw id: 0x0000 - pwm id 0x01
494 20:52:51.829718 bl2_stage_init 0xc1
495 20:52:51.834738 bl2_stage_init 0x02
496 20:52:51.835267
497 20:52:51.835705 L0:00000000
498 20:52:51.836180 L1:00000703
499 20:52:51.836611 L2:00008067
500 20:52:51.837033 L3:15000000
501 20:52:51.840329 S1:00000000
502 20:52:51.840812 B2:20282000
503 20:52:51.841235 B1:a0f83180
504 20:52:51.841660
505 20:52:51.842086 TE: 71414
506 20:52:51.842512
507 20:52:51.845913 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 20:52:51.846379
509 20:52:51.851535 Board ID = 1
510 20:52:51.852040 Set cpu clk to 24M
511 20:52:51.852476 Set clk81 to 24M
512 20:52:51.857090 Use GP1_pll as DSU clk.
513 20:52:51.857562 DSU clk: 1200 Mhz
514 20:52:51.857993 CPU clk: 1200 MHz
515 20:52:51.862713 Set clk81 to 166.6M
516 20:52:51.868332 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 20:52:51.868792 board id: 1
518 20:52:51.875587 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 20:52:51.886622 fw parse done
520 20:52:51.892366 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 20:52:51.935626 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 20:52:51.946755 PIEI prepare done
523 20:52:51.947244 fastboot data load
524 20:52:51.947696 fastboot data verify
525 20:52:51.952287 verify result: 266
526 20:52:51.957870 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 20:52:51.958349 LPDDR4 probe
528 20:52:51.958794 ddr clk to 1584MHz
529 20:52:53.324337 Load ddrfw from SPI, src: 0x0 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 20:52:53.325016 bl2_stage_init 0x01
531 20:52:53.325480 bl2_stage_init 0x81
532 20:52:53.329928 hw id: 0x0000 - pwm id 0x01
533 20:52:53.330409 bl2_stage_init 0xc1
534 20:52:53.335507 bl2_stage_init 0x02
535 20:52:53.336014
536 20:52:53.336484 L0:00000000
537 20:52:53.336932 L1:00000703
538 20:52:53.337372 L2:00008067
539 20:52:53.337805 L3:15000000
540 20:52:53.341090 S1:00000000
541 20:52:53.341575 B2:20282000
542 20:52:53.342016 B1:a0f83180
543 20:52:53.342455
544 20:52:53.342893 TE: 71171
545 20:52:53.343326
546 20:52:53.346751 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 20:52:53.347244
548 20:52:53.352291 Board ID = 1
549 20:52:53.352767 Set cpu clk to 24M
550 20:52:53.353209 Set clk81 to 24M
551 20:52:53.357870 Use GP1_pll as DSU clk.
552 20:52:53.358346 DSU clk: 1200 Mhz
553 20:52:53.358789 CPU clk: 1200 MHz
554 20:52:53.363512 Set clk81 to 166.6M
555 20:52:53.369080 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 20:52:53.369554 board id: 1
557 20:52:53.376280 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 20:52:53.387174 fw parse done
559 20:52:53.393166 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 20:52:53.436302 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 20:52:53.447555 PIEI prepare done
562 20:52:53.448120 fastboot data load
563 20:52:53.448579 fastboot data verify
564 20:52:53.453026 verify result: 266
565 20:52:53.458632 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 20:52:53.459109 LPDDR4 probe
567 20:52:53.459555 ddr clk to 1584MHz
568 20:52:53.466654 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 20:52:53.504458
570 20:52:53.505025 dmc_version 0001
571 20:52:53.511500 Check phy result
572 20:52:53.517427 INFO : End of CA training
573 20:52:53.517916 INFO : End of initialization
574 20:52:53.523044 INFO : Training has run successfully!
575 20:52:53.523535 Check phy result
576 20:52:53.528620 INFO : End of initialization
577 20:52:53.529107 INFO : End of read enable training
578 20:52:53.534156 INFO : End of fine write leveling
579 20:52:53.539845 INFO : End of Write leveling coarse delay
580 20:52:53.540376 INFO : Training has run successfully!
581 20:52:53.540822 Check phy result
582 20:52:53.545344 INFO : End of initialization
583 20:52:53.545827 INFO : End of read dq deskew training
584 20:52:53.551012 INFO : End of MPR read delay center optimization
585 20:52:53.556596 INFO : End of write delay center optimization
586 20:52:53.562221 INFO : End of read delay center optimization
587 20:52:53.562727 INFO : End of max read latency training
588 20:52:53.568904 INFO : Training has run successfully!
589 20:52:53.569452 1D training succeed
590 20:52:53.577061 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 20:52:53.625334 Check phy result
592 20:52:53.625902 INFO : End of initialization
593 20:52:53.652689 INFO : End of 2D read delay Voltage center optimization
594 20:52:53.676828 INFO : End of 2D read delay Voltage center optimization
595 20:52:53.733355 INFO : End of 2D write delay Voltage center optimization
596 20:52:53.787364 INFO : End of 2D write delay Voltage center optimization
597 20:52:53.792889 INFO : Training has run successfully!
598 20:52:53.793381
599 20:52:53.793836 channel==0
600 20:52:53.798507 RxClkDly_Margin_A0==78 ps 8
601 20:52:53.798981 TxDqDly_Margin_A0==98 ps 10
602 20:52:53.804098 RxClkDly_Margin_A1==88 ps 9
603 20:52:53.804579 TxDqDly_Margin_A1==98 ps 10
604 20:52:53.805029 TrainedVREFDQ_A0==74
605 20:52:53.809663 TrainedVREFDQ_A1==75
606 20:52:53.810142 VrefDac_Margin_A0==23
607 20:52:53.810586 DeviceVref_Margin_A0==40
608 20:52:53.815247 VrefDac_Margin_A1==23
609 20:52:53.815723 DeviceVref_Margin_A1==39
610 20:52:53.816319
611 20:52:53.816781
612 20:52:53.820897 channel==1
613 20:52:53.821369 RxClkDly_Margin_A0==78 ps 8
614 20:52:53.821815 TxDqDly_Margin_A0==98 ps 10
615 20:52:53.826505 RxClkDly_Margin_A1==78 ps 8
616 20:52:53.826977 TxDqDly_Margin_A1==88 ps 9
617 20:52:53.832114 TrainedVREFDQ_A0==78
618 20:52:53.832586 TrainedVREFDQ_A1==75
619 20:52:53.833036 VrefDac_Margin_A0==22
620 20:52:53.837674 DeviceVref_Margin_A0==36
621 20:52:53.838157 VrefDac_Margin_A1==22
622 20:52:53.843337 DeviceVref_Margin_A1==39
623 20:52:53.843868
624 20:52:53.844338 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 20:52:53.844750
626 20:52:53.877022 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
627 20:52:53.877573 2D training succeed
628 20:52:53.882629 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 20:52:53.888159 auto size-- 65535DDR cs0 size: 2048MB
630 20:52:53.888643 DDR cs1 size: 2048MB
631 20:52:53.893709 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 20:52:53.894192 cs0 DataBus test pass
633 20:52:53.899345 cs1 DataBus test pass
634 20:52:53.899829 cs0 AddrBus test pass
635 20:52:53.900282 cs1 AddrBus test pass
636 20:52:53.900688
637 20:52:53.905009 100bdlr_step_size ps== 485
638 20:52:53.905504 result report
639 20:52:53.910590 boot times 0Enable ddr reg access
640 20:52:53.915812 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 20:52:53.929619 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 20:52:54.589044 bl2z: ptr: 05129330, size: 00001e40
643 20:52:54.597627 0.0;M3 CHK:0;cm4_sp_mode 0
644 20:52:54.598122 MVN_1=0x00000000
645 20:52:54.598534 MVN_2=0x00000000
646 20:52:54.609106 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 20:52:54.609604 OPS=0x04
648 20:52:54.610022 ring efuse init
649 20:52:54.614700 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 20:52:54.615177 [0.017355 Inits done]
651 20:52:54.615585 secure task start!
652 20:52:54.622568 high task start!
653 20:52:54.623050 low task start!
654 20:52:54.623456 run into bl31
655 20:52:54.631155 NOTICE: BL31: v1.3(release):4fc40b1
656 20:52:54.639063 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 20:52:54.639567 NOTICE: BL31: G12A normal boot!
658 20:52:54.654611 NOTICE: BL31: BL33 decompress pass
659 20:52:54.660262 ERROR: Error initializing runtime service opteed_fast
660 20:52:56.025397 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 20:52:56.025829 bl2_stage_init 0x01
662 20:52:56.026100 bl2_stage_init 0x81
663 20:52:56.030985 hw id: 0x0000 - pwm id 0x01
664 20:52:56.031420 bl2_stage_init 0xc1
665 20:52:56.031790 bl2_stage_init 0x02
666 20:52:56.032185
667 20:52:56.036981 L0:00000000
668 20:52:56.037281 L1:00000703
669 20:52:56.037551 L2:00008067
670 20:52:56.037803 L3:15000000
671 20:52:56.038052 S1:00000000
672 20:52:56.042009 B2:20282000
673 20:52:56.042310 B1:a0f83180
674 20:52:56.042567
675 20:52:56.042826 TE: 72098
676 20:52:56.043084
677 20:52:56.047642 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 20:52:56.047943
679 20:52:56.053346 Board ID = 1
680 20:52:56.053642 Set cpu clk to 24M
681 20:52:56.053893 Set clk81 to 24M
682 20:52:56.058780 Use GP1_pll as DSU clk.
683 20:52:56.059065 DSU clk: 1200 Mhz
684 20:52:56.059471 CPU clk: 1200 MHz
685 20:52:56.059868 Set clk81 to 166.6M
686 20:52:56.069992 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 20:52:56.070491 board id: 1
688 20:52:56.075940 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 20:52:56.087104 fw parse done
690 20:52:56.093042 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 20:52:56.135761 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 20:52:56.146773 PIEI prepare done
693 20:52:56.147265 fastboot data load
694 20:52:56.147685 fastboot data verify
695 20:52:56.152344 verify result: 266
696 20:52:56.158004 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 20:52:56.158490 LPDDR4 probe
698 20:52:56.158906 ddr clk to 1584MHz
699 20:52:56.165806 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 20:52:56.203061
701 20:52:56.203608 dmc_version 0001
702 20:52:56.209749 Check phy result
703 20:52:56.215646 INFO : End of CA training
704 20:52:56.216122 INFO : End of initialization
705 20:52:56.221321 INFO : Training has run successfully!
706 20:52:56.221807 Check phy result
707 20:52:56.226943 INFO : End of initialization
708 20:52:56.227389 INFO : End of read enable training
709 20:52:56.232446 INFO : End of fine write leveling
710 20:52:56.238024 INFO : End of Write leveling coarse delay
711 20:52:56.238481 INFO : Training has run successfully!
712 20:52:56.238890 Check phy result
713 20:52:56.243609 INFO : End of initialization
714 20:52:56.244090 INFO : End of read dq deskew training
715 20:52:56.249346 INFO : End of MPR read delay center optimization
716 20:52:56.254906 INFO : End of write delay center optimization
717 20:52:56.260439 INFO : End of read delay center optimization
718 20:52:56.260926 INFO : End of max read latency training
719 20:52:56.266073 INFO : Training has run successfully!
720 20:52:56.266514 1D training succeed
721 20:52:56.274474 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 20:52:56.322815 Check phy result
723 20:52:56.323377 INFO : End of initialization
724 20:52:56.345165 INFO : End of 2D read delay Voltage center optimization
725 20:52:56.364334 INFO : End of 2D read delay Voltage center optimization
726 20:52:56.416335 INFO : End of 2D write delay Voltage center optimization
727 20:52:56.465505 INFO : End of 2D write delay Voltage center optimization
728 20:52:56.471014 INFO : Training has run successfully!
729 20:52:56.471474
730 20:52:56.471892 channel==0
731 20:52:56.476671 RxClkDly_Margin_A0==88 ps 9
732 20:52:56.477124 TxDqDly_Margin_A0==88 ps 9
733 20:52:56.482180 RxClkDly_Margin_A1==88 ps 9
734 20:52:56.482620 TxDqDly_Margin_A1==88 ps 9
735 20:52:56.483029 TrainedVREFDQ_A0==75
736 20:52:56.487936 TrainedVREFDQ_A1==74
737 20:52:56.488516 VrefDac_Margin_A0==23
738 20:52:56.488933 DeviceVref_Margin_A0==39
739 20:52:56.493474 VrefDac_Margin_A1==23
740 20:52:56.493967 DeviceVref_Margin_A1==40
741 20:52:56.494376
742 20:52:56.494779
743 20:52:56.495174 channel==1
744 20:52:56.499044 RxClkDly_Margin_A0==78 ps 8
745 20:52:56.499495 TxDqDly_Margin_A0==88 ps 9
746 20:52:56.504605 RxClkDly_Margin_A1==78 ps 8
747 20:52:56.505164 TxDqDly_Margin_A1==88 ps 9
748 20:52:56.510120 TrainedVREFDQ_A0==75
749 20:52:56.510590 TrainedVREFDQ_A1==75
750 20:52:56.511010 VrefDac_Margin_A0==22
751 20:52:56.515764 DeviceVref_Margin_A0==39
752 20:52:56.516252 VrefDac_Margin_A1==22
753 20:52:56.516669 DeviceVref_Margin_A1==39
754 20:52:56.521383
755 20:52:56.521833 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 20:52:56.522243
757 20:52:56.555094 soc_vref_reg_value 0x 00000019 00000018 00000019 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
758 20:52:56.555684 2D training succeed
759 20:52:56.560682 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 20:52:56.566104 auto size-- 65535DDR cs0 size: 2048MB
761 20:52:56.566605 DDR cs1 size: 2048MB
762 20:52:56.571677 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 20:52:56.572189 cs0 DataBus test pass
764 20:52:56.577245 cs1 DataBus test pass
765 20:52:56.577688 cs0 AddrBus test pass
766 20:52:56.578094 cs1 AddrBus test pass
767 20:52:56.578495
768 20:52:56.582900 100bdlr_step_size ps== 478
769 20:52:56.583341 result report
770 20:52:56.588513 boot times 0Enable ddr reg access
771 20:52:56.593452 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 20:52:56.607401 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 20:52:57.261393 bl2z: ptr: 05129330, size: 00001e40
774 20:52:57.267064 0.0;M3 CHK:0;cm4_sp_mode 0
775 20:52:57.267578 MVN_1=0x00000000
776 20:52:57.268071 MVN_2=0x00000000
777 20:52:57.278624 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 20:52:57.279162 OPS=0x04
779 20:52:57.279559 ring efuse init
780 20:52:57.284337 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 20:52:57.284819 [0.017319 Inits done]
782 20:52:57.285214 secure task start!
783 20:52:57.291415 high task start!
784 20:52:57.291922 low task start!
785 20:52:57.292357 run into bl31
786 20:52:57.300075 NOTICE: BL31: v1.3(release):4fc40b1
787 20:52:57.307780 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 20:52:57.308254 NOTICE: BL31: G12A normal boot!
789 20:52:57.323428 NOTICE: BL31: BL33 decompress pass
790 20:52:57.329126 ERROR: Error initializing runtime service opteed_fast
791 20:52:58.123282
792 20:52:58.123912
793 20:52:58.128675 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 20:52:58.129171
795 20:52:58.132191 Model: Libre Computer AML-S905D3-CC Solitude
796 20:52:58.279088 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 20:52:58.293759 DRAM: 2 GiB (effective 3.8 GiB)
798 20:52:58.395379 Core: 406 devices, 33 uclasses, devicetree: separate
799 20:52:58.401166 WDT: Not starting watchdog@f0d0
800 20:52:58.426280 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 20:52:58.438503 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 20:52:58.443526 ** Bad device specification mmc 0 **
803 20:52:58.453524 Card did not respond to voltage select! : -110
804 20:52:58.461168 ** Bad device specification mmc 0 **
805 20:52:58.461609 Couldn't find partition mmc 0
806 20:52:58.469518 Card did not respond to voltage select! : -110
807 20:52:58.475079 ** Bad device specification mmc 0 **
808 20:52:58.475565 Couldn't find partition mmc 0
809 20:52:58.480110 Error: could not access storage.
810 20:52:58.776716 Net: eth0: ethernet@ff3f0000
811 20:52:58.777415 starting USB...
812 20:52:59.021338 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 20:52:59.022078 Starting the controller
814 20:52:59.028432 USB XHCI 1.10
815 20:53:00.582017 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 20:53:00.590376 scanning usb for storage devices... 0 Storage Device(s) found
818 20:53:00.642351 Hit any key to stop autoboot: 1
819 20:53:00.643338 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 20:53:00.644097 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 20:53:00.644662 Setting prompt string to ['=>']
822 20:53:00.645213 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 20:53:00.656343 0
824 20:53:00.657321 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 20:53:00.758698 => setenv autoload no
827 20:53:00.759512 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 20:53:00.764933 setenv autoload no
830 20:53:00.866493 => setenv initrd_high 0xffffffff
831 20:53:00.867208 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 20:53:00.871636 setenv initrd_high 0xffffffff
834 20:53:00.973191 => setenv fdt_high 0xffffffff
835 20:53:00.973887 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
836 20:53:00.978278 setenv fdt_high 0xffffffff
838 20:53:01.079866 => dhcp
839 20:53:01.080661 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
840 20:53:01.084704 dhcp
841 20:53:01.940387 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
842 20:53:01.941016 Speed: 1000, full duplex
843 20:53:01.941472 BOOTP broadcast 1
844 20:53:02.188371 BOOTP broadcast 2
845 20:53:02.202187 DHCP client bound to address 192.168.6.21 (261 ms)
847 20:53:02.303761 => setenv serverip 192.168.6.2
848 20:53:02.304569 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
849 20:53:02.308953 setenv serverip 192.168.6.2
851 20:53:02.410554 => tftpboot 0x01080000 962371/tftp-deploy-7uln8c0i/kernel/uImage
852 20:53:02.411369 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
853 20:53:02.417972 tftpboot 0x01080000 962371/tftp-deploy-7uln8c0i/kernel/uImage
854 20:53:02.418520 Speed: 1000, full duplex
855 20:53:02.418958 Using ethernet@ff3f0000 device
856 20:53:02.423407 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
857 20:53:02.429067 Filename '962371/tftp-deploy-7uln8c0i/kernel/uImage'.
858 20:53:02.432288 Load address: 0x1080000
859 20:53:04.939828 Loading: *################################################## 36.1 MiB
860 20:53:04.940500 14.4 MiB/s
861 20:53:04.940914 done
862 20:53:04.944059 Bytes transferred = 37812800 (240fa40 hex)
864 20:53:05.045553 => tftpboot 0x08000000 962371/tftp-deploy-7uln8c0i/ramdisk/ramdisk.cpio.gz.uboot
865 20:53:05.046320 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
866 20:53:05.052909 tftpboot 0x08000000 962371/tftp-deploy-7uln8c0i/ramdisk/ramdisk.cpio.gz.uboot
867 20:53:05.053375 Speed: 1000, full duplex
868 20:53:05.053774 Using ethernet@ff3f0000 device
869 20:53:05.058487 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
870 20:53:05.068206 Filename '962371/tftp-deploy-7uln8c0i/ramdisk/ramdisk.cpio.gz.uboot'.
871 20:53:05.068662 Load address: 0x8000000
872 20:53:06.528994 Loading: *############################################### UDP wrong checksum 000000ff 00005ad8
873 20:53:06.568892 ## UDP wrong checksum 000000ff 0000eaca
874 20:53:06.596679 UDP wrong checksum 00000005 0000a2b6
875 20:53:11.596826 T UDP wrong checksum 00000005 0000a2b6
876 20:53:21.599563 T T UDP wrong checksum 00000005 0000a2b6
877 20:53:23.450056 UDP wrong checksum 000000ff 0000ccb6
878 20:53:23.491670 UDP wrong checksum 000000ff 000051a9
879 20:53:35.033162 T T UDP wrong checksum 000000ff 0000144b
880 20:53:35.075361 UDP wrong checksum 000000ff 0000ab3d
881 20:53:40.989355 T UDP wrong checksum 000000ff 00002789
882 20:53:40.998827 UDP wrong checksum 000000ff 0000af7b
883 20:53:41.602590 T UDP wrong checksum 00000005 0000a2b6
884 20:53:41.849813 UDP wrong checksum 000000ff 00002481
885 20:53:41.920520 UDP wrong checksum 000000ff 0000bf73
886 20:54:01.608552 T T T
887 20:54:01.609240 Retry count exceeded; starting again
889 20:54:01.610813 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
892 20:54:01.612977 end: 2.4 uboot-commands (duration 00:01:20) [common]
894 20:54:01.614503 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
896 20:54:01.615604 end: 2 uboot-action (duration 00:01:20) [common]
898 20:54:01.617311 Cleaning after the job
899 20:54:01.617901 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/ramdisk
900 20:54:01.619310 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/kernel
901 20:54:01.628843 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/dtb
902 20:54:01.630176 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/nfsrootfs
903 20:54:01.674704 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962371/tftp-deploy-7uln8c0i/modules
904 20:54:01.681420 start: 4.1 power-off (timeout 00:00:30) [common]
905 20:54:01.682009 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
906 20:54:01.715917 >> OK - accepted request
907 20:54:01.718342 Returned 0 in 0 seconds
908 20:54:01.819188 end: 4.1 power-off (duration 00:00:00) [common]
910 20:54:01.820937 start: 4.2 read-feedback (timeout 00:10:00) [common]
911 20:54:01.822037 Listened to connection for namespace 'common' for up to 1s
912 20:54:02.822902 Finalising connection for namespace 'common'
913 20:54:02.823703 Disconnecting from shell: Finalise
914 20:54:02.824331 =>
915 20:54:02.925522 end: 4.2 read-feedback (duration 00:00:01) [common]
916 20:54:02.926278 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/962371
917 20:54:05.944444 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/962371
918 20:54:05.945066 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.