Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 21:11:23.692762 lava-dispatcher, installed at version: 2024.01
2 21:11:23.693530 start: 0 validate
3 21:11:23.694001 Start time: 2024-11-08 21:11:23.693971+00:00 (UTC)
4 21:11:23.694552 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 21:11:23.695091 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 21:11:23.739360 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 21:11:23.739925 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-225-g50643bbc9eb6%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
8 21:11:23.770687 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 21:11:23.771301 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-225-g50643bbc9eb6%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 21:11:23.801530 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 21:11:23.801995 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 21:11:23.833058 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 21:11:23.833528 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-225-g50643bbc9eb6%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
14 21:11:23.869930 validate duration: 0.18
16 21:11:23.870768 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 21:11:23.871121 start: 1.1 download-retry (timeout 00:10:00) [common]
18 21:11:23.871437 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 21:11:23.872057 Not decompressing ramdisk as can be used compressed.
20 21:11:23.872544 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 21:11:23.872835 saving as /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/ramdisk/initrd.cpio.gz
22 21:11:23.873130 total size: 5628169 (5 MB)
23 21:11:23.908199 progress 0 % (0 MB)
24 21:11:23.912488 progress 5 % (0 MB)
25 21:11:23.916644 progress 10 % (0 MB)
26 21:11:23.920297 progress 15 % (0 MB)
27 21:11:23.924354 progress 20 % (1 MB)
28 21:11:23.927955 progress 25 % (1 MB)
29 21:11:23.932028 progress 30 % (1 MB)
30 21:11:23.936014 progress 35 % (1 MB)
31 21:11:23.939636 progress 40 % (2 MB)
32 21:11:23.943645 progress 45 % (2 MB)
33 21:11:23.947174 progress 50 % (2 MB)
34 21:11:23.951125 progress 55 % (2 MB)
35 21:11:23.955058 progress 60 % (3 MB)
36 21:11:23.958610 progress 65 % (3 MB)
37 21:11:23.962566 progress 70 % (3 MB)
38 21:11:23.966151 progress 75 % (4 MB)
39 21:11:23.970151 progress 80 % (4 MB)
40 21:11:23.973896 progress 85 % (4 MB)
41 21:11:23.977536 progress 90 % (4 MB)
42 21:11:23.981055 progress 95 % (5 MB)
43 21:11:23.984293 progress 100 % (5 MB)
44 21:11:23.984953 5 MB downloaded in 0.11 s (48.01 MB/s)
45 21:11:23.985501 end: 1.1.1 http-download (duration 00:00:00) [common]
47 21:11:23.986425 end: 1.1 download-retry (duration 00:00:00) [common]
48 21:11:23.986738 start: 1.2 download-retry (timeout 00:10:00) [common]
49 21:11:23.987028 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 21:11:23.987508 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-225-g50643bbc9eb6/arm64/defconfig/clang-16/kernel/Image
51 21:11:23.987768 saving as /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/kernel/Image
52 21:11:23.988002 total size: 37812736 (36 MB)
53 21:11:23.988230 No compression specified
54 21:11:24.024482 progress 0 % (0 MB)
55 21:11:24.047669 progress 5 % (1 MB)
56 21:11:24.071428 progress 10 % (3 MB)
57 21:11:24.094564 progress 15 % (5 MB)
58 21:11:24.117336 progress 20 % (7 MB)
59 21:11:24.140521 progress 25 % (9 MB)
60 21:11:24.163830 progress 30 % (10 MB)
61 21:11:24.186413 progress 35 % (12 MB)
62 21:11:24.209589 progress 40 % (14 MB)
63 21:11:24.232585 progress 45 % (16 MB)
64 21:11:24.255087 progress 50 % (18 MB)
65 21:11:24.278494 progress 55 % (19 MB)
66 21:11:24.301456 progress 60 % (21 MB)
67 21:11:24.324564 progress 65 % (23 MB)
68 21:11:24.347016 progress 70 % (25 MB)
69 21:11:24.370318 progress 75 % (27 MB)
70 21:11:24.393179 progress 80 % (28 MB)
71 21:11:24.416488 progress 85 % (30 MB)
72 21:11:24.439399 progress 90 % (32 MB)
73 21:11:24.462587 progress 95 % (34 MB)
74 21:11:24.484157 progress 100 % (36 MB)
75 21:11:24.484893 36 MB downloaded in 0.50 s (72.58 MB/s)
76 21:11:24.485373 end: 1.2.1 http-download (duration 00:00:00) [common]
78 21:11:24.486203 end: 1.2 download-retry (duration 00:00:00) [common]
79 21:11:24.486481 start: 1.3 download-retry (timeout 00:09:59) [common]
80 21:11:24.486749 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 21:11:24.487215 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-225-g50643bbc9eb6/arm64/defconfig/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 21:11:24.487485 saving as /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 21:11:24.487694 total size: 53209 (0 MB)
84 21:11:24.487903 No compression specified
85 21:11:24.524324 progress 61 % (0 MB)
86 21:11:24.525196 progress 100 % (0 MB)
87 21:11:24.525756 0 MB downloaded in 0.04 s (1.33 MB/s)
88 21:11:24.526261 end: 1.3.1 http-download (duration 00:00:00) [common]
90 21:11:24.527108 end: 1.3 download-retry (duration 00:00:00) [common]
91 21:11:24.527386 start: 1.4 download-retry (timeout 00:09:59) [common]
92 21:11:24.527665 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 21:11:24.528151 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 21:11:24.528414 saving as /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/nfsrootfs/full.rootfs.tar
95 21:11:24.528632 total size: 120894716 (115 MB)
96 21:11:24.528851 Using unxz to decompress xz
97 21:11:24.564778 progress 0 % (0 MB)
98 21:11:25.352609 progress 5 % (5 MB)
99 21:11:26.185174 progress 10 % (11 MB)
100 21:11:26.986498 progress 15 % (17 MB)
101 21:11:27.718547 progress 20 % (23 MB)
102 21:11:28.315740 progress 25 % (28 MB)
103 21:11:29.145206 progress 30 % (34 MB)
104 21:11:29.940237 progress 35 % (40 MB)
105 21:11:30.289370 progress 40 % (46 MB)
106 21:11:30.672465 progress 45 % (51 MB)
107 21:11:31.391948 progress 50 % (57 MB)
108 21:11:32.282663 progress 55 % (63 MB)
109 21:11:33.064425 progress 60 % (69 MB)
110 21:11:33.819079 progress 65 % (74 MB)
111 21:11:34.600093 progress 70 % (80 MB)
112 21:11:35.422217 progress 75 % (86 MB)
113 21:11:36.201091 progress 80 % (92 MB)
114 21:11:36.954652 progress 85 % (98 MB)
115 21:11:37.830101 progress 90 % (103 MB)
116 21:11:38.605801 progress 95 % (109 MB)
117 21:11:39.432011 progress 100 % (115 MB)
118 21:11:39.444457 115 MB downloaded in 14.92 s (7.73 MB/s)
119 21:11:39.445325 end: 1.4.1 http-download (duration 00:00:15) [common]
121 21:11:39.446908 end: 1.4 download-retry (duration 00:00:15) [common]
122 21:11:39.447424 start: 1.5 download-retry (timeout 00:09:44) [common]
123 21:11:39.447935 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 21:11:39.448951 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-225-g50643bbc9eb6/arm64/defconfig/clang-16/modules.tar.xz
125 21:11:39.449425 saving as /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/modules/modules.tar
126 21:11:39.449834 total size: 11766788 (11 MB)
127 21:11:39.450251 Using unxz to decompress xz
128 21:11:39.494759 progress 0 % (0 MB)
129 21:11:39.569087 progress 5 % (0 MB)
130 21:11:39.651940 progress 10 % (1 MB)
131 21:11:39.756762 progress 15 % (1 MB)
132 21:11:39.863814 progress 20 % (2 MB)
133 21:11:39.950966 progress 25 % (2 MB)
134 21:11:40.038871 progress 30 % (3 MB)
135 21:11:40.129865 progress 35 % (3 MB)
136 21:11:40.212518 progress 40 % (4 MB)
137 21:11:40.290986 progress 45 % (5 MB)
138 21:11:40.379218 progress 50 % (5 MB)
139 21:11:40.463305 progress 55 % (6 MB)
140 21:11:40.549402 progress 60 % (6 MB)
141 21:11:40.631092 progress 65 % (7 MB)
142 21:11:40.712917 progress 70 % (7 MB)
143 21:11:40.796125 progress 75 % (8 MB)
144 21:11:40.880579 progress 80 % (9 MB)
145 21:11:40.963593 progress 85 % (9 MB)
146 21:11:41.048206 progress 90 % (10 MB)
147 21:11:41.127365 progress 95 % (10 MB)
148 21:11:41.205224 progress 100 % (11 MB)
149 21:11:41.215548 11 MB downloaded in 1.77 s (6.36 MB/s)
150 21:11:41.216499 end: 1.5.1 http-download (duration 00:00:02) [common]
152 21:11:41.218365 end: 1.5 download-retry (duration 00:00:02) [common]
153 21:11:41.218942 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 21:11:41.219512 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 21:11:57.698244 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/962435/extract-nfsrootfs-yajgyawe
156 21:11:57.698864 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 21:11:57.699151 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 21:11:57.699888 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63
159 21:11:57.700386 makedir: /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin
160 21:11:57.700719 makedir: /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/tests
161 21:11:57.701036 makedir: /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/results
162 21:11:57.701368 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-add-keys
163 21:11:57.701896 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-add-sources
164 21:11:57.702397 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-background-process-start
165 21:11:57.702886 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-background-process-stop
166 21:11:57.703418 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-common-functions
167 21:11:57.703913 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-echo-ipv4
168 21:11:57.704452 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-install-packages
169 21:11:57.704938 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-installed-packages
170 21:11:57.705421 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-os-build
171 21:11:57.705988 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-probe-channel
172 21:11:57.706519 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-probe-ip
173 21:11:57.707031 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-target-ip
174 21:11:57.707549 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-target-mac
175 21:11:57.708053 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-target-storage
176 21:11:57.708557 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-test-case
177 21:11:57.709042 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-test-event
178 21:11:57.709515 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-test-feedback
179 21:11:57.709995 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-test-raise
180 21:11:57.710463 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-test-reference
181 21:11:57.710972 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-test-runner
182 21:11:57.711494 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-test-set
183 21:11:57.711975 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-test-shell
184 21:11:57.712512 Updating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-add-keys (debian)
185 21:11:57.713050 Updating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-add-sources (debian)
186 21:11:57.713555 Updating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-install-packages (debian)
187 21:11:57.714052 Updating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-installed-packages (debian)
188 21:11:57.714539 Updating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/bin/lava-os-build (debian)
189 21:11:57.714969 Creating /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/environment
190 21:11:57.715334 LAVA metadata
191 21:11:57.715599 - LAVA_JOB_ID=962435
192 21:11:57.715815 - LAVA_DISPATCHER_IP=192.168.6.2
193 21:11:57.716217 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 21:11:57.717185 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 21:11:57.717501 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 21:11:57.717711 skipped lava-vland-overlay
197 21:11:57.717955 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 21:11:57.718211 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 21:11:57.718430 skipped lava-multinode-overlay
200 21:11:57.718673 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 21:11:57.718925 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 21:11:57.719170 Loading test definitions
203 21:11:57.719444 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 21:11:57.719663 Using /lava-962435 at stage 0
205 21:11:57.720804 uuid=962435_1.6.2.4.1 testdef=None
206 21:11:57.721144 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 21:11:57.721438 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 21:11:57.723172 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 21:11:57.724030 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 21:11:57.725996 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 21:11:57.726830 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 21:11:57.728698 runner path: /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/0/tests/0_timesync-off test_uuid 962435_1.6.2.4.1
215 21:11:57.729247 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 21:11:57.730067 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 21:11:57.730291 Using /lava-962435 at stage 0
219 21:11:57.730646 Fetching tests from https://github.com/kernelci/test-definitions.git
220 21:11:57.730939 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/0/tests/1_kselftest-rtc'
221 21:12:01.331538 Running '/usr/bin/git checkout kernelci.org
222 21:12:01.627241 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 21:12:01.629345 uuid=962435_1.6.2.4.5 testdef=None
224 21:12:01.629952 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 21:12:01.631416 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 21:12:01.636816 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 21:12:01.638408 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 21:12:01.645659 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 21:12:01.647382 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 21:12:01.654652 runner path: /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/0/tests/1_kselftest-rtc test_uuid 962435_1.6.2.4.5
234 21:12:01.655241 BOARD='meson-sm1-s905d3-libretech-cc'
235 21:12:01.655652 BRANCH='mainline'
236 21:12:01.656084 SKIPFILE='/dev/null'
237 21:12:01.656485 SKIP_INSTALL='True'
238 21:12:01.656877 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-225-g50643bbc9eb6/arm64/defconfig/clang-16/kselftest.tar.xz'
239 21:12:01.657280 TST_CASENAME=''
240 21:12:01.657675 TST_CMDFILES='rtc'
241 21:12:01.658767 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 21:12:01.660437 Creating lava-test-runner.conf files
244 21:12:01.660854 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/962435/lava-overlay-puxb2m63/lava-962435/0 for stage 0
245 21:12:01.661543 - 0_timesync-off
246 21:12:01.662024 - 1_kselftest-rtc
247 21:12:01.662692 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 21:12:01.663246 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 21:12:24.954438 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 21:12:24.954908 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 21:12:24.955186 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 21:12:24.955461 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 21:12:24.955728 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 21:12:25.589598 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 21:12:25.590060 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 21:12:25.590322 extracting modules file /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/962435/extract-nfsrootfs-yajgyawe
257 21:12:26.998808 extracting modules file /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/modules/modules.tar to /var/lib/lava/dispatcher/tmp/962435/extract-overlay-ramdisk-k7c5ekas/ramdisk
258 21:12:28.451186 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 21:12:28.451662 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 21:12:28.451944 [common] Applying overlay to NFS
261 21:12:28.452189 [common] Applying overlay /var/lib/lava/dispatcher/tmp/962435/compress-overlay-8f7utjae/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/962435/extract-nfsrootfs-yajgyawe
262 21:12:31.530883 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 21:12:31.531402 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 21:12:31.531710 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 21:12:31.531969 Converting downloaded kernel to a uImage
266 21:12:31.532469 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/kernel/Image /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/kernel/uImage
267 21:12:31.918242 output: Image Name:
268 21:12:31.918678 output: Created: Fri Nov 8 21:12:31 2024
269 21:12:31.918894 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 21:12:31.919100 output: Data Size: 37812736 Bytes = 36926.50 KiB = 36.06 MiB
271 21:12:31.919306 output: Load Address: 01080000
272 21:12:31.919508 output: Entry Point: 01080000
273 21:12:31.919709 output:
274 21:12:31.920079 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 21:12:31.920373 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 21:12:31.920654 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 21:12:31.920915 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 21:12:31.921177 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 21:12:31.921439 Building ramdisk /var/lib/lava/dispatcher/tmp/962435/extract-overlay-ramdisk-k7c5ekas/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/962435/extract-overlay-ramdisk-k7c5ekas/ramdisk
280 21:12:34.214620 >> 173443 blocks
281 21:12:41.894749 Adding RAMdisk u-boot header.
282 21:12:41.895472 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/962435/extract-overlay-ramdisk-k7c5ekas/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/962435/extract-overlay-ramdisk-k7c5ekas/ramdisk.cpio.gz.uboot
283 21:12:42.163580 output: Image Name:
284 21:12:42.164047 output: Created: Fri Nov 8 21:12:41 2024
285 21:12:42.164476 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 21:12:42.164886 output: Data Size: 24150541 Bytes = 23584.51 KiB = 23.03 MiB
287 21:12:42.165291 output: Load Address: 00000000
288 21:12:42.165694 output: Entry Point: 00000000
289 21:12:42.166095 output:
290 21:12:42.167225 rename /var/lib/lava/dispatcher/tmp/962435/extract-overlay-ramdisk-k7c5ekas/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/ramdisk/ramdisk.cpio.gz.uboot
291 21:12:42.167944 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 21:12:42.168532 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 21:12:42.169059 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 21:12:42.169513 No LXC device requested
295 21:12:42.170016 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 21:12:42.170528 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 21:12:42.171024 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 21:12:42.171438 Checking files for TFTP limit of 4294967296 bytes.
299 21:12:42.174130 end: 1 tftp-deploy (duration 00:01:18) [common]
300 21:12:42.174714 start: 2 uboot-action (timeout 00:05:00) [common]
301 21:12:42.175244 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 21:12:42.175747 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 21:12:42.176289 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 21:12:42.176824 Using kernel file from prepare-kernel: 962435/tftp-deploy-qag9a2jh/kernel/uImage
305 21:12:42.177454 substitutions:
306 21:12:42.177861 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 21:12:42.178265 - {DTB_ADDR}: 0x01070000
308 21:12:42.178665 - {DTB}: 962435/tftp-deploy-qag9a2jh/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 21:12:42.179069 - {INITRD}: 962435/tftp-deploy-qag9a2jh/ramdisk/ramdisk.cpio.gz.uboot
310 21:12:42.179468 - {KERNEL_ADDR}: 0x01080000
311 21:12:42.179862 - {KERNEL}: 962435/tftp-deploy-qag9a2jh/kernel/uImage
312 21:12:42.180292 - {LAVA_MAC}: None
313 21:12:42.180728 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/962435/extract-nfsrootfs-yajgyawe
314 21:12:42.181124 - {NFS_SERVER_IP}: 192.168.6.2
315 21:12:42.181513 - {PRESEED_CONFIG}: None
316 21:12:42.181902 - {PRESEED_LOCAL}: None
317 21:12:42.182292 - {RAMDISK_ADDR}: 0x08000000
318 21:12:42.182677 - {RAMDISK}: 962435/tftp-deploy-qag9a2jh/ramdisk/ramdisk.cpio.gz.uboot
319 21:12:42.183065 - {ROOT_PART}: None
320 21:12:42.183452 - {ROOT}: None
321 21:12:42.183835 - {SERVER_IP}: 192.168.6.2
322 21:12:42.184284 - {TEE_ADDR}: 0x83000000
323 21:12:42.184678 - {TEE}: None
324 21:12:42.185067 Parsed boot commands:
325 21:12:42.185444 - setenv autoload no
326 21:12:42.185830 - setenv initrd_high 0xffffffff
327 21:12:42.186217 - setenv fdt_high 0xffffffff
328 21:12:42.186600 - dhcp
329 21:12:42.186986 - setenv serverip 192.168.6.2
330 21:12:42.187374 - tftpboot 0x01080000 962435/tftp-deploy-qag9a2jh/kernel/uImage
331 21:12:42.187765 - tftpboot 0x08000000 962435/tftp-deploy-qag9a2jh/ramdisk/ramdisk.cpio.gz.uboot
332 21:12:42.188190 - tftpboot 0x01070000 962435/tftp-deploy-qag9a2jh/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 21:12:42.188585 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/962435/extract-nfsrootfs-yajgyawe,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 21:12:42.188988 - bootm 0x01080000 0x08000000 0x01070000
335 21:12:42.189484 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 21:12:42.190974 start: 2.3 connect-device (timeout 00:05:00) [common]
338 21:12:42.191390 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 21:12:42.206790 Setting prompt string to ['lava-test: # ']
340 21:12:42.208295 end: 2.3 connect-device (duration 00:00:00) [common]
341 21:12:42.208901 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 21:12:42.209458 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 21:12:42.209979 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 21:12:42.211105 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 21:12:42.248413 >> OK - accepted request
346 21:12:42.250244 Returned 0 in 0 seconds
347 21:12:42.351284 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 21:12:42.352892 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 21:12:42.353439 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 21:12:42.353938 Setting prompt string to ['Hit any key to stop autoboot']
352 21:12:42.354384 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 21:12:42.355902 Trying 192.168.56.21...
354 21:12:42.356409 Connected to conserv1.
355 21:12:42.356815 Escape character is '^]'.
356 21:12:42.357232
357 21:12:42.357649 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 21:12:42.358059
359 21:12:50.162472 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 21:12:50.163266 bl2_stage_init 0x01
361 21:12:50.163819 bl2_stage_init 0x81
362 21:12:50.168129 hw id: 0x0000 - pwm id 0x01
363 21:12:50.168747 bl2_stage_init 0xc1
364 21:12:50.173529 bl2_stage_init 0x02
365 21:12:50.174145
366 21:12:50.174695 L0:00000000
367 21:12:50.175242 L1:00000703
368 21:12:50.175757 L2:00008067
369 21:12:50.176318 L3:15000000
370 21:12:50.179715 S1:00000000
371 21:12:50.180244 B2:20282000
372 21:12:50.180665 B1:a0f83180
373 21:12:50.181066
374 21:12:50.181468 TE: 67181
375 21:12:50.181868
376 21:12:50.185158 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 21:12:50.185610
378 21:12:50.191096 Board ID = 1
379 21:12:50.191531 Set cpu clk to 24M
380 21:12:50.191927 Set clk81 to 24M
381 21:12:50.194318 Use GP1_pll as DSU clk.
382 21:12:50.194750 DSU clk: 1200 Mhz
383 21:12:50.199877 CPU clk: 1200 MHz
384 21:12:50.200339 Set clk81 to 166.6M
385 21:12:50.205463 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 21:12:50.205904 board id: 1
387 21:12:50.214032 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 21:12:50.224836 fw parse done
389 21:12:50.230351 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 21:12:50.272803 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 21:12:50.284771 PIEI prepare done
392 21:12:50.285611 fastboot data load
393 21:12:50.286355 fastboot data verify
394 21:12:50.289954 verify result: 266
395 21:12:50.295616 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 21:12:50.296462 LPDDR4 probe
397 21:12:50.297158 ddr clk to 1584MHz
398 21:12:50.302876 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 21:12:50.339921
400 21:12:50.340925 dmc_version 0001
401 21:12:50.346568 Check phy result
402 21:12:50.353322 INFO : End of CA training
403 21:12:50.354135 INFO : End of initialization
404 21:12:50.358889 INFO : Training has run successfully!
405 21:12:50.359522 Check phy result
406 21:12:50.364612 INFO : End of initialization
407 21:12:50.365439 INFO : End of read enable training
408 21:12:50.367848 INFO : End of fine write leveling
409 21:12:50.373437 INFO : End of Write leveling coarse delay
410 21:12:50.379020 INFO : Training has run successfully!
411 21:12:50.379915 Check phy result
412 21:12:50.380742 INFO : End of initialization
413 21:12:50.384598 INFO : End of read dq deskew training
414 21:12:50.390219 INFO : End of MPR read delay center optimization
415 21:12:50.391047 INFO : End of write delay center optimization
416 21:12:50.395845 INFO : End of read delay center optimization
417 21:12:50.401435 INFO : End of max read latency training
418 21:12:50.402272 INFO : Training has run successfully!
419 21:12:50.407039 1D training succeed
420 21:12:50.412202 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 21:12:50.460014 Check phy result
422 21:12:50.460695 INFO : End of initialization
423 21:12:50.482513 INFO : End of 2D read delay Voltage center optimization
424 21:12:50.501285 INFO : End of 2D read delay Voltage center optimization
425 21:12:50.553972 INFO : End of 2D write delay Voltage center optimization
426 21:12:50.603121 INFO : End of 2D write delay Voltage center optimization
427 21:12:50.608632 INFO : Training has run successfully!
428 21:12:50.609216
429 21:12:50.609694 channel==0
430 21:12:50.614225 RxClkDly_Margin_A0==69 ps 7
431 21:12:50.614739 TxDqDly_Margin_A0==98 ps 10
432 21:12:50.619858 RxClkDly_Margin_A1==88 ps 9
433 21:12:50.620495 TxDqDly_Margin_A1==98 ps 10
434 21:12:50.620973 TrainedVREFDQ_A0==74
435 21:12:50.625403 TrainedVREFDQ_A1==74
436 21:12:50.625913 VrefDac_Margin_A0==25
437 21:12:50.626370 DeviceVref_Margin_A0==40
438 21:12:50.631015 VrefDac_Margin_A1==23
439 21:12:50.631513 DeviceVref_Margin_A1==40
440 21:12:50.631971
441 21:12:50.632470
442 21:12:50.636631 channel==1
443 21:12:50.637138 RxClkDly_Margin_A0==88 ps 9
444 21:12:50.637578 TxDqDly_Margin_A0==88 ps 9
445 21:12:50.642181 RxClkDly_Margin_A1==78 ps 8
446 21:12:50.642668 TxDqDly_Margin_A1==88 ps 9
447 21:12:50.647834 TrainedVREFDQ_A0==75
448 21:12:50.648371 TrainedVREFDQ_A1==77
449 21:12:50.648818 VrefDac_Margin_A0==22
450 21:12:50.653447 DeviceVref_Margin_A0==39
451 21:12:50.653995 VrefDac_Margin_A1==22
452 21:12:50.659215 DeviceVref_Margin_A1==37
453 21:12:50.659778
454 21:12:50.660283 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 21:12:50.660731
456 21:12:50.692557 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
457 21:12:50.693229 2D training succeed
458 21:12:50.698144 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 21:12:50.703807 auto size-- 65535DDR cs0 size: 2048MB
460 21:12:50.704341 DDR cs1 size: 2048MB
461 21:12:50.709340 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 21:12:50.709857 cs0 DataBus test pass
463 21:12:50.714995 cs1 DataBus test pass
464 21:12:50.715531 cs0 AddrBus test pass
465 21:12:50.715974 cs1 AddrBus test pass
466 21:12:50.716449
467 21:12:50.720556 100bdlr_step_size ps== 478
468 21:12:50.721057 result report
469 21:12:50.726171 boot times 0Enable ddr reg access
470 21:12:50.731351 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 21:12:50.745163 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 21:12:51.400452 bl2z: ptr: 05129330, size: 00001e40
473 21:12:51.407808 0.0;M3 CHK:0;cm4_sp_mode 0
474 21:12:51.408408 MVN_1=0x00000000
475 21:12:51.408864 MVN_2=0x00000000
476 21:12:51.419233 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 21:12:51.419766 OPS=0x04
478 21:12:51.420260 ring efuse init
479 21:12:51.424815 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 21:12:51.425316 [0.017319 Inits done]
481 21:12:51.425757 secure task start!
482 21:12:51.432474 high task start!
483 21:12:51.433086 low task start!
484 21:12:51.433536 run into bl31
485 21:12:51.441034 NOTICE: BL31: v1.3(release):4fc40b1
486 21:12:51.448880 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 21:12:51.449418 NOTICE: BL31: G12A normal boot!
488 21:12:51.464464 NOTICE: BL31: BL33 decompress pass
489 21:12:51.470796 ERROR: Error initializing runtime service opteed_fast
490 21:12:52.714268 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 21:12:52.714905 bl2_stage_init 0x01
492 21:12:52.715385 bl2_stage_init 0x81
493 21:12:52.719849 hw id: 0x0000 - pwm id 0x01
494 21:12:52.720426 bl2_stage_init 0xc1
495 21:12:52.725444 bl2_stage_init 0x02
496 21:12:52.725996
497 21:12:52.726439 L0:00000000
498 21:12:52.726881 L1:00000703
499 21:12:52.727315 L2:00008067
500 21:12:52.727745 L3:15000000
501 21:12:52.731061 S1:00000000
502 21:12:52.731542 B2:20282000
503 21:12:52.731977 B1:a0f83180
504 21:12:52.732457
505 21:12:52.732898 TE: 67795
506 21:12:52.733331
507 21:12:52.736640 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 21:12:52.737109
509 21:12:52.742157 Board ID = 1
510 21:12:52.742621 Set cpu clk to 24M
511 21:12:52.743059 Set clk81 to 24M
512 21:12:52.747738 Use GP1_pll as DSU clk.
513 21:12:52.748253 DSU clk: 1200 Mhz
514 21:12:52.748689 CPU clk: 1200 MHz
515 21:12:52.753386 Set clk81 to 166.6M
516 21:12:52.759062 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 21:12:52.759522 board id: 1
518 21:12:52.766181 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 21:12:52.777127 fw parse done
520 21:12:52.783124 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 21:12:52.825382 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 21:12:52.837334 PIEI prepare done
523 21:12:52.837807 fastboot data load
524 21:12:52.838251 fastboot data verify
525 21:12:52.842941 verify result: 266
526 21:12:52.848516 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 21:12:52.848982 LPDDR4 probe
528 21:12:52.849416 ddr clk to 1584MHz
529 21:12:54.214455 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 21:12:54.215165 bl2_stage_init 0x01
531 21:12:54.215645 bl2_stage_init 0x81
532 21:12:54.219899 hw id: 0x0000 - pwm id 0x01
533 21:12:54.220495 bl2_stage_init 0xc1
534 21:12:54.225450 bl2_stage_init 0x02
535 21:12:54.225991
536 21:12:54.226463 L0:00000000
537 21:12:54.226917 L1:00000703
538 21:12:54.227375 L2:00008067
539 21:12:54.228053 L3:15000000
540 21:12:54.231056 S1:00000000
541 21:12:54.231617 B2:20282000
542 21:12:54.232134 B1:a0f83180
543 21:12:54.232598
544 21:12:54.233050 TE: 69247
545 21:12:54.233494
546 21:12:54.236655 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 21:12:54.237194
548 21:12:54.242351 Board ID = 1
549 21:12:54.242988 Set cpu clk to 24M
550 21:12:54.243471 Set clk81 to 24M
551 21:12:54.247815 Use GP1_pll as DSU clk.
552 21:12:54.248350 DSU clk: 1200 Mhz
553 21:12:54.248815 CPU clk: 1200 MHz
554 21:12:54.253419 Set clk81 to 166.6M
555 21:12:54.259143 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 21:12:54.259652 board id: 1
557 21:12:54.266253 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 21:12:54.276922 fw parse done
559 21:12:54.282872 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 21:12:54.325447 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 21:12:54.336420 PIEI prepare done
562 21:12:54.336938 fastboot data load
563 21:12:54.337404 fastboot data verify
564 21:12:54.341943 verify result: 266
565 21:12:54.347576 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 21:12:54.348114 LPDDR4 probe
567 21:12:54.348579 ddr clk to 1584MHz
568 21:12:54.355605 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 21:12:54.392889
570 21:12:54.393438 dmc_version 0001
571 21:12:54.398955 Check phy result
572 21:12:54.405576 INFO : End of CA training
573 21:12:54.406085 INFO : End of initialization
574 21:12:54.411214 INFO : Training has run successfully!
575 21:12:54.411744 Check phy result
576 21:12:54.416859 INFO : End of initialization
577 21:12:54.417431 INFO : End of read enable training
578 21:12:54.422573 INFO : End of fine write leveling
579 21:12:54.427914 INFO : End of Write leveling coarse delay
580 21:12:54.428490 INFO : Training has run successfully!
581 21:12:54.428952 Check phy result
582 21:12:54.433521 INFO : End of initialization
583 21:12:54.434059 INFO : End of read dq deskew training
584 21:12:54.439139 INFO : End of MPR read delay center optimization
585 21:12:54.444755 INFO : End of write delay center optimization
586 21:12:54.450474 INFO : End of read delay center optimization
587 21:12:54.450979 INFO : End of max read latency training
588 21:12:54.455900 INFO : Training has run successfully!
589 21:12:54.456449 1D training succeed
590 21:12:54.464584 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 21:12:54.512634 Check phy result
592 21:12:54.512980 INFO : End of initialization
593 21:12:54.535018 INFO : End of 2D read delay Voltage center optimization
594 21:12:54.553475 INFO : End of 2D read delay Voltage center optimization
595 21:12:54.606062 INFO : End of 2D write delay Voltage center optimization
596 21:12:54.655257 INFO : End of 2D write delay Voltage center optimization
597 21:12:54.660856 INFO : Training has run successfully!
598 21:12:54.661377
599 21:12:54.661837 channel==0
600 21:12:54.666534 RxClkDly_Margin_A0==78 ps 8
601 21:12:54.667031 TxDqDly_Margin_A0==98 ps 10
602 21:12:54.672087 RxClkDly_Margin_A1==88 ps 9
603 21:12:54.672588 TxDqDly_Margin_A1==98 ps 10
604 21:12:54.673045 TrainedVREFDQ_A0==74
605 21:12:54.677657 TrainedVREFDQ_A1==74
606 21:12:54.678157 VrefDac_Margin_A0==24
607 21:12:54.678609 DeviceVref_Margin_A0==40
608 21:12:54.683262 VrefDac_Margin_A1==23
609 21:12:54.683762 DeviceVref_Margin_A1==40
610 21:12:54.684256
611 21:12:54.684885
612 21:12:54.688881 channel==1
613 21:12:54.689401 RxClkDly_Margin_A0==88 ps 9
614 21:12:54.689865 TxDqDly_Margin_A0==98 ps 10
615 21:12:54.694532 RxClkDly_Margin_A1==88 ps 9
616 21:12:54.695155 TxDqDly_Margin_A1==88 ps 9
617 21:12:54.700105 TrainedVREFDQ_A0==75
618 21:12:54.700615 TrainedVREFDQ_A1==75
619 21:12:54.701059 VrefDac_Margin_A0==23
620 21:12:54.705668 DeviceVref_Margin_A0==39
621 21:12:54.706167 VrefDac_Margin_A1==22
622 21:12:54.711244 DeviceVref_Margin_A1==39
623 21:12:54.711734
624 21:12:54.712209 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 21:12:54.712649
626 21:12:54.744844 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000060
627 21:12:54.745396 2D training succeed
628 21:12:54.750530 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 21:12:54.756069 auto size-- 65535DDR cs0 size: 2048MB
630 21:12:54.756574 DDR cs1 size: 2048MB
631 21:12:54.761649 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 21:12:54.762144 cs0 DataBus test pass
633 21:12:54.767252 cs1 DataBus test pass
634 21:12:54.767745 cs0 AddrBus test pass
635 21:12:54.768224 cs1 AddrBus test pass
636 21:12:54.768661
637 21:12:54.772945 100bdlr_step_size ps== 478
638 21:12:54.773482 result report
639 21:12:54.778516 boot times 0Enable ddr reg access
640 21:12:54.783740 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 21:12:54.797612 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 21:12:55.453026 bl2z: ptr: 05129330, size: 00001e40
643 21:12:55.459781 0.0;M3 CHK:0;cm4_sp_mode 0
644 21:12:55.460336 MVN_1=0x00000000
645 21:12:55.460781 MVN_2=0x00000000
646 21:12:55.471199 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 21:12:55.471733 OPS=0x04
648 21:12:55.472234 ring efuse init
649 21:12:55.476918 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 21:12:55.477438 [0.017310 Inits done]
651 21:12:55.477880 secure task start!
652 21:12:55.484148 high task start!
653 21:12:55.484658 low task start!
654 21:12:55.485096 run into bl31
655 21:12:55.493409 NOTICE: BL31: v1.3(release):4fc40b1
656 21:12:55.501169 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 21:12:55.501476 NOTICE: BL31: G12A normal boot!
658 21:12:55.516665 NOTICE: BL31: BL33 decompress pass
659 21:12:55.521544 ERROR: Error initializing runtime service opteed_fast
660 21:12:56.763069 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 21:12:56.763706 bl2_stage_init 0x01
662 21:12:56.764251 bl2_stage_init 0x81
663 21:12:56.768580 hw id: 0x0000 - pwm id 0x01
664 21:12:56.769075 bl2_stage_init 0xc1
665 21:12:56.774234 bl2_stage_init 0x02
666 21:12:56.774727
667 21:12:56.775186 L0:00000000
668 21:12:56.775642 L1:00000703
669 21:12:56.776134 L2:00008067
670 21:12:56.776586 L3:15000000
671 21:12:56.777379 S1:00000000
672 21:12:56.781125 B2:20282000
673 21:12:56.781640 B1:a0f83180
674 21:12:56.782109
675 21:12:56.782575 TE: 67305
676 21:12:56.783035
677 21:12:56.786846 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 21:12:56.787351
679 21:12:56.787813 Board ID = 1
680 21:12:56.792240 Set cpu clk to 24M
681 21:12:56.792737 Set clk81 to 24M
682 21:12:56.793198 Use GP1_pll as DSU clk.
683 21:12:56.796305 DSU clk: 1200 Mhz
684 21:12:56.796798 CPU clk: 1200 MHz
685 21:12:56.802027 Set clk81 to 166.6M
686 21:12:56.807546 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 21:12:56.808068 board id: 1
688 21:12:56.814694 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 21:12:56.825493 fw parse done
690 21:12:56.831450 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 21:12:56.874534 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 21:12:56.885879 PIEI prepare done
693 21:12:56.886415 fastboot data load
694 21:12:56.886876 fastboot data verify
695 21:12:56.891360 verify result: 266
696 21:12:56.896953 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 21:12:56.897460 LPDDR4 probe
698 21:12:56.897918 ddr clk to 1584MHz
699 21:12:56.904952 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 21:12:56.942693
701 21:12:56.943228 dmc_version 0001
702 21:12:56.949695 Check phy result
703 21:12:56.955848 INFO : End of CA training
704 21:12:56.956393 INFO : End of initialization
705 21:12:56.961290 INFO : Training has run successfully!
706 21:12:56.961798 Check phy result
707 21:12:56.966882 INFO : End of initialization
708 21:12:56.967384 INFO : End of read enable training
709 21:12:56.970246 INFO : End of fine write leveling
710 21:12:56.975847 INFO : End of Write leveling coarse delay
711 21:12:56.981431 INFO : Training has run successfully!
712 21:12:56.981934 Check phy result
713 21:12:56.982387 INFO : End of initialization
714 21:12:56.987026 INFO : End of read dq deskew training
715 21:12:56.990321 INFO : End of MPR read delay center optimization
716 21:12:56.996006 INFO : End of write delay center optimization
717 21:12:57.001610 INFO : End of read delay center optimization
718 21:12:57.002120 INFO : End of max read latency training
719 21:12:57.007141 INFO : Training has run successfully!
720 21:12:57.007640 1D training succeed
721 21:12:57.015343 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 21:12:57.063619 Check phy result
723 21:12:57.064213 INFO : End of initialization
724 21:12:57.090953 INFO : End of 2D read delay Voltage center optimization
725 21:12:57.115135 INFO : End of 2D read delay Voltage center optimization
726 21:12:57.171960 INFO : End of 2D write delay Voltage center optimization
727 21:12:57.225896 INFO : End of 2D write delay Voltage center optimization
728 21:12:57.231422 INFO : Training has run successfully!
729 21:12:57.231923
730 21:12:57.232430 channel==0
731 21:12:57.237012 RxClkDly_Margin_A0==78 ps 8
732 21:12:57.237510 TxDqDly_Margin_A0==88 ps 9
733 21:12:57.242643 RxClkDly_Margin_A1==88 ps 9
734 21:12:57.243137 TxDqDly_Margin_A1==98 ps 10
735 21:12:57.243593 TrainedVREFDQ_A0==74
736 21:12:57.248271 TrainedVREFDQ_A1==75
737 21:12:57.248775 VrefDac_Margin_A0==24
738 21:12:57.249224 DeviceVref_Margin_A0==40
739 21:12:57.253883 VrefDac_Margin_A1==23
740 21:12:57.254375 DeviceVref_Margin_A1==39
741 21:12:57.254822
742 21:12:57.255269
743 21:12:57.255715 channel==1
744 21:12:57.259433 RxClkDly_Margin_A0==88 ps 9
745 21:12:57.259936 TxDqDly_Margin_A0==88 ps 9
746 21:12:57.265036 RxClkDly_Margin_A1==78 ps 8
747 21:12:57.265531 TxDqDly_Margin_A1==78 ps 8
748 21:12:57.270654 TrainedVREFDQ_A0==75
749 21:12:57.271152 TrainedVREFDQ_A1==75
750 21:12:57.271612 VrefDac_Margin_A0==22
751 21:12:57.276256 DeviceVref_Margin_A0==39
752 21:12:57.276770 VrefDac_Margin_A1==22
753 21:12:57.277224 DeviceVref_Margin_A1==38
754 21:12:57.281889
755 21:12:57.282386 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 21:12:57.282832
757 21:12:57.315346 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000016 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
758 21:12:57.315901 2D training succeed
759 21:12:57.321025 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 21:12:57.326645 auto size-- 65535DDR cs0 size: 2048MB
761 21:12:57.327156 DDR cs1 size: 2048MB
762 21:12:57.332299 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 21:12:57.332873 cs0 DataBus test pass
764 21:12:57.337883 cs1 DataBus test pass
765 21:12:57.338395 cs0 AddrBus test pass
766 21:12:57.338861 cs1 AddrBus test pass
767 21:12:57.339312
768 21:12:57.343385 100bdlr_step_size ps== 478
769 21:12:57.343900 result report
770 21:12:57.348976 boot times 0Enable ddr reg access
771 21:12:57.354013 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 21:12:57.367904 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 21:12:58.027714 bl2z: ptr: 05129330, size: 00001e40
774 21:12:58.036124 0.0;M3 CHK:0;cm4_sp_mode 0
775 21:12:58.036713 MVN_1=0x00000000
776 21:12:58.037164 MVN_2=0x00000000
777 21:12:58.047725 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 21:12:58.048425 OPS=0x04
779 21:12:58.048894 ring efuse init
780 21:12:58.053364 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 21:12:58.053985 [0.017354 Inits done]
782 21:12:58.054449 secure task start!
783 21:12:58.060752 high task start!
784 21:12:58.061425 low task start!
785 21:12:58.061877 run into bl31
786 21:12:58.069401 NOTICE: BL31: v1.3(release):4fc40b1
787 21:12:58.077557 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 21:12:58.078243 NOTICE: BL31: G12A normal boot!
789 21:12:58.092653 NOTICE: BL31: BL33 decompress pass
790 21:12:58.098456 ERROR: Error initializing runtime service opteed_fast
791 21:12:58.893628
792 21:12:58.894315
793 21:12:58.899059 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 21:12:58.899609
795 21:12:58.902496 Model: Libre Computer AML-S905D3-CC Solitude
796 21:12:59.049497 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 21:12:59.064029 DRAM: 2 GiB (effective 3.8 GiB)
798 21:12:59.165850 Core: 406 devices, 33 uclasses, devicetree: separate
799 21:12:59.171792 WDT: Not starting watchdog@f0d0
800 21:12:59.196807 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 21:12:59.209102 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 21:12:59.214115 ** Bad device specification mmc 0 **
803 21:12:59.224119 Card did not respond to voltage select! : -110
804 21:12:59.230922 ** Bad device specification mmc 0 **
805 21:12:59.231459 Couldn't find partition mmc 0
806 21:12:59.240115 Card did not respond to voltage select! : -110
807 21:12:59.245569 ** Bad device specification mmc 0 **
808 21:12:59.246108 Couldn't find partition mmc 0
809 21:12:59.250863 Error: could not access storage.
810 21:12:59.548234 Net: eth0: ethernet@ff3f0000
811 21:12:59.548904 starting USB...
812 21:12:59.792805 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 21:12:59.793425 Starting the controller
814 21:12:59.799766 USB XHCI 1.10
815 21:13:01.356152 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 21:13:01.364459 scanning usb for storage devices... 0 Storage Device(s) found
818 21:13:01.416141 Hit any key to stop autoboot: 1
819 21:13:01.417399 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 21:13:01.418101 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 21:13:01.418636 Setting prompt string to ['=>']
822 21:13:01.419181 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 21:13:01.430467 0
824 21:13:01.431425 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 21:13:01.532788 => setenv autoload no
827 21:13:01.533665 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 21:13:01.539101 setenv autoload no
830 21:13:01.640852 => setenv initrd_high 0xffffffff
831 21:13:01.641960 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 21:13:01.646334 setenv initrd_high 0xffffffff
834 21:13:01.747960 => setenv fdt_high 0xffffffff
835 21:13:01.748962 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
836 21:13:01.753326 setenv fdt_high 0xffffffff
838 21:13:01.854922 => dhcp
839 21:13:01.855833 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
840 21:13:01.859220 dhcp
841 21:13:02.415741 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
842 21:13:02.416454 Speed: 1000, full duplex
843 21:13:02.416939 BOOTP broadcast 1
844 21:13:02.663766 BOOTP broadcast 2
845 21:13:02.686347 DHCP client bound to address 192.168.6.21 (270 ms)
847 21:13:02.787905 => setenv serverip 192.168.6.2
848 21:13:02.788862 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
849 21:13:02.793393 setenv serverip 192.168.6.2
851 21:13:02.894940 => tftpboot 0x01080000 962435/tftp-deploy-qag9a2jh/kernel/uImage
852 21:13:02.895842 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
853 21:13:02.902481 tftpboot 0x01080000 962435/tftp-deploy-qag9a2jh/kernel/uImage
854 21:13:02.903008 Speed: 1000, full duplex
855 21:13:02.903469 Using ethernet@ff3f0000 device
856 21:13:02.908141 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
857 21:13:02.913436 Filename '962435/tftp-deploy-qag9a2jh/kernel/uImage'.
858 21:13:02.917532 Load address: 0x1080000
859 21:13:05.332684 Loading: *################################################## 36.1 MiB
860 21:13:05.333310 14.9 MiB/s
861 21:13:05.333750 done
862 21:13:05.336843 Bytes transferred = 37812800 (240fa40 hex)
864 21:13:05.438332 => tftpboot 0x08000000 962435/tftp-deploy-qag9a2jh/ramdisk/ramdisk.cpio.gz.uboot
865 21:13:05.439074 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
866 21:13:05.445693 tftpboot 0x08000000 962435/tftp-deploy-qag9a2jh/ramdisk/ramdisk.cpio.gz.uboot
867 21:13:05.446143 Speed: 1000, full duplex
868 21:13:05.446542 Using ethernet@ff3f0000 device
869 21:13:05.451202 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
870 21:13:05.461054 Filename '962435/tftp-deploy-qag9a2jh/ramdisk/ramdisk.cpio.gz.uboot'.
871 21:13:05.461540 Load address: 0x8000000
872 21:13:07.000856 Loading: *################################################# UDP wrong checksum 00000005 0000e1b6
873 21:13:12.001514 T UDP wrong checksum 00000005 0000e1b6
874 21:13:22.003509 T T UDP wrong checksum 00000005 0000e1b6
875 21:13:36.017765 T T UDP wrong checksum 000000ff 00000b73
876 21:13:36.059157 UDP wrong checksum 000000ff 00009065
877 21:13:36.788541 UDP wrong checksum 000000ff 00001a52
878 21:13:36.829498 UDP wrong checksum 000000ff 0000b644
879 21:13:42.007391 T T UDP wrong checksum 00000005 0000e1b6
880 21:13:47.167263 T UDP wrong checksum 000000ff 0000a23c
881 21:13:47.177618 UDP wrong checksum 000000ff 0000382f
882 21:14:02.012203 T T
883 21:14:02.012897 Retry count exceeded; starting again
885 21:14:02.014499 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
888 21:14:02.016703 end: 2.4 uboot-commands (duration 00:01:20) [common]
890 21:14:02.018257 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
892 21:14:02.019364 end: 2 uboot-action (duration 00:01:20) [common]
894 21:14:02.021098 Cleaning after the job
895 21:14:02.021694 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/ramdisk
896 21:14:02.024555 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/kernel
897 21:14:02.052222 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/dtb
898 21:14:02.053639 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/nfsrootfs
899 21:14:02.096539 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/962435/tftp-deploy-qag9a2jh/modules
900 21:14:02.106106 start: 4.1 power-off (timeout 00:00:30) [common]
901 21:14:02.106747 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
902 21:14:02.141328 >> OK - accepted request
903 21:14:02.143477 Returned 0 in 0 seconds
904 21:14:02.244224 end: 4.1 power-off (duration 00:00:00) [common]
906 21:14:02.245192 start: 4.2 read-feedback (timeout 00:10:00) [common]
907 21:14:02.245854 Listened to connection for namespace 'common' for up to 1s
908 21:14:03.246853 Finalising connection for namespace 'common'
909 21:14:03.247576 Disconnecting from shell: Finalise
910 21:14:03.248247 =>
911 21:14:03.349330 end: 4.2 read-feedback (duration 00:00:01) [common]
912 21:14:03.350058 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/962435
913 21:14:06.256123 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/962435
914 21:14:06.256858 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.