Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:55:47.601976 lava-dispatcher, installed at version: 2024.01
2 22:55:47.602785 start: 0 validate
3 22:55:47.603270 Start time: 2024-11-08 22:55:47.603239+00:00 (UTC)
4 22:55:47.603807 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:55:47.604384 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:55:47.647401 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:55:47.647945 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-256-gc291c9cfd76a8%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:55:47.683244 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:55:47.684187 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-256-gc291c9cfd76a8%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 22:55:47.720241 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:55:47.720735 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:55:47.756059 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:55:47.756555 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-256-gc291c9cfd76a8%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 22:55:47.800590 validate duration: 0.20
16 22:55:47.802068 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:55:47.802649 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:55:47.803219 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:55:47.804219 Not decompressing ramdisk as can be used compressed.
20 22:55:47.804982 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 22:55:47.805478 saving as /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/ramdisk/initrd.cpio.gz
22 22:55:47.805978 total size: 5628140 (5 MB)
23 22:55:47.851256 progress 0 % (0 MB)
24 22:55:47.858748 progress 5 % (0 MB)
25 22:55:47.866623 progress 10 % (0 MB)
26 22:55:47.873512 progress 15 % (0 MB)
27 22:55:47.881314 progress 20 % (1 MB)
28 22:55:47.886227 progress 25 % (1 MB)
29 22:55:47.890214 progress 30 % (1 MB)
30 22:55:47.894204 progress 35 % (1 MB)
31 22:55:47.897919 progress 40 % (2 MB)
32 22:55:47.901933 progress 45 % (2 MB)
33 22:55:47.905525 progress 50 % (2 MB)
34 22:55:47.909620 progress 55 % (2 MB)
35 22:55:47.913616 progress 60 % (3 MB)
36 22:55:47.917195 progress 65 % (3 MB)
37 22:55:47.921208 progress 70 % (3 MB)
38 22:55:47.924957 progress 75 % (4 MB)
39 22:55:47.928942 progress 80 % (4 MB)
40 22:55:47.932543 progress 85 % (4 MB)
41 22:55:47.936495 progress 90 % (4 MB)
42 22:55:47.940410 progress 95 % (5 MB)
43 22:55:47.943698 progress 100 % (5 MB)
44 22:55:47.944402 5 MB downloaded in 0.14 s (38.78 MB/s)
45 22:55:47.944960 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:55:47.945836 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:55:47.946125 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:55:47.946395 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:55:47.946851 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-256-gc291c9cfd76a8/arm64/defconfig/gcc-12/kernel/Image
51 22:55:47.947096 saving as /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/kernel/Image
52 22:55:47.947305 total size: 45713920 (43 MB)
53 22:55:47.947517 No compression specified
54 22:55:47.991694 progress 0 % (0 MB)
55 22:55:48.020618 progress 5 % (2 MB)
56 22:55:48.049288 progress 10 % (4 MB)
57 22:55:48.077189 progress 15 % (6 MB)
58 22:55:48.105506 progress 20 % (8 MB)
59 22:55:48.133642 progress 25 % (10 MB)
60 22:55:48.161795 progress 30 % (13 MB)
61 22:55:48.189952 progress 35 % (15 MB)
62 22:55:48.218061 progress 40 % (17 MB)
63 22:55:48.246339 progress 45 % (19 MB)
64 22:55:48.274985 progress 50 % (21 MB)
65 22:55:48.303517 progress 55 % (24 MB)
66 22:55:48.332143 progress 60 % (26 MB)
67 22:55:48.360192 progress 65 % (28 MB)
68 22:55:48.388846 progress 70 % (30 MB)
69 22:55:48.417761 progress 75 % (32 MB)
70 22:55:48.446713 progress 80 % (34 MB)
71 22:55:48.474725 progress 85 % (37 MB)
72 22:55:48.503142 progress 90 % (39 MB)
73 22:55:48.531665 progress 95 % (41 MB)
74 22:55:48.559726 progress 100 % (43 MB)
75 22:55:48.560360 43 MB downloaded in 0.61 s (71.11 MB/s)
76 22:55:48.560863 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:55:48.561711 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:55:48.562008 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:55:48.562288 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:55:48.562753 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-256-gc291c9cfd76a8/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 22:55:48.563037 saving as /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/dtb/meson-g12b-a311d-libretech-cc.dtb
83 22:55:48.563255 total size: 54703 (0 MB)
84 22:55:48.563474 No compression specified
85 22:55:48.604626 progress 59 % (0 MB)
86 22:55:48.605501 progress 100 % (0 MB)
87 22:55:48.606068 0 MB downloaded in 0.04 s (1.22 MB/s)
88 22:55:48.606576 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:55:48.607417 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:55:48.607690 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:55:48.607963 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:55:48.608457 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 22:55:48.608713 saving as /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/nfsrootfs/full.rootfs.tar
95 22:55:48.608930 total size: 474398908 (452 MB)
96 22:55:48.609154 Using unxz to decompress xz
97 22:55:48.651406 progress 0 % (0 MB)
98 22:55:49.757606 progress 5 % (22 MB)
99 22:55:51.209392 progress 10 % (45 MB)
100 22:55:51.652241 progress 15 % (67 MB)
101 22:55:52.493961 progress 20 % (90 MB)
102 22:55:53.068659 progress 25 % (113 MB)
103 22:55:53.463041 progress 30 % (135 MB)
104 22:55:54.065480 progress 35 % (158 MB)
105 22:55:54.952232 progress 40 % (181 MB)
106 22:55:55.722544 progress 45 % (203 MB)
107 22:55:56.292856 progress 50 % (226 MB)
108 22:55:56.932906 progress 55 % (248 MB)
109 22:55:58.115628 progress 60 % (271 MB)
110 22:55:59.546209 progress 65 % (294 MB)
111 22:56:01.187954 progress 70 % (316 MB)
112 22:56:04.403193 progress 75 % (339 MB)
113 22:56:06.862387 progress 80 % (361 MB)
114 22:56:09.813471 progress 85 % (384 MB)
115 22:56:13.138534 progress 90 % (407 MB)
116 22:56:16.365047 progress 95 % (429 MB)
117 22:56:19.567094 progress 100 % (452 MB)
118 22:56:19.581275 452 MB downloaded in 30.97 s (14.61 MB/s)
119 22:56:19.582027 end: 1.4.1 http-download (duration 00:00:31) [common]
121 22:56:19.583049 end: 1.4 download-retry (duration 00:00:31) [common]
122 22:56:19.583375 start: 1.5 download-retry (timeout 00:09:28) [common]
123 22:56:19.583687 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 22:56:19.585074 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-256-gc291c9cfd76a8/arm64/defconfig/gcc-12/modules.tar.xz
125 22:56:19.585736 saving as /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/modules/modules.tar
126 22:56:19.586298 total size: 11613560 (11 MB)
127 22:56:19.586843 Using unxz to decompress xz
128 22:56:19.626105 progress 0 % (0 MB)
129 22:56:19.706973 progress 5 % (0 MB)
130 22:56:19.795834 progress 10 % (1 MB)
131 22:56:19.895737 progress 15 % (1 MB)
132 22:56:19.988904 progress 20 % (2 MB)
133 22:56:20.068908 progress 25 % (2 MB)
134 22:56:20.145071 progress 30 % (3 MB)
135 22:56:20.224233 progress 35 % (3 MB)
136 22:56:20.297942 progress 40 % (4 MB)
137 22:56:20.374676 progress 45 % (5 MB)
138 22:56:20.461987 progress 50 % (5 MB)
139 22:56:20.544059 progress 55 % (6 MB)
140 22:56:20.632540 progress 60 % (6 MB)
141 22:56:20.714823 progress 65 % (7 MB)
142 22:56:20.796339 progress 70 % (7 MB)
143 22:56:20.875107 progress 75 % (8 MB)
144 22:56:20.959288 progress 80 % (8 MB)
145 22:56:21.040349 progress 85 % (9 MB)
146 22:56:21.119568 progress 90 % (9 MB)
147 22:56:21.198306 progress 95 % (10 MB)
148 22:56:21.276356 progress 100 % (11 MB)
149 22:56:21.289455 11 MB downloaded in 1.70 s (6.50 MB/s)
150 22:56:21.290099 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:56:21.290956 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:56:21.291227 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 22:56:21.291492 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 22:56:38.205835 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/963288/extract-nfsrootfs-07kgyjyf
156 22:56:38.206460 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 22:56:38.206759 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 22:56:38.208318 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l
159 22:56:38.208844 makedir: /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin
160 22:56:38.209188 makedir: /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/tests
161 22:56:38.209548 makedir: /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/results
162 22:56:38.209899 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-add-keys
163 22:56:38.210447 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-add-sources
164 22:56:38.210997 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-background-process-start
165 22:56:38.211596 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-background-process-stop
166 22:56:38.212432 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-common-functions
167 22:56:38.213364 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-echo-ipv4
168 22:56:38.214034 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-install-packages
169 22:56:38.214663 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-installed-packages
170 22:56:38.215310 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-os-build
171 22:56:38.215940 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-probe-channel
172 22:56:38.216608 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-probe-ip
173 22:56:38.217228 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-target-ip
174 22:56:38.217849 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-target-mac
175 22:56:38.218436 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-target-storage
176 22:56:38.219052 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-test-case
177 22:56:38.219708 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-test-event
178 22:56:38.220617 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-test-feedback
179 22:56:38.221248 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-test-raise
180 22:56:38.222558 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-test-reference
181 22:56:38.223505 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-test-runner
182 22:56:38.224260 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-test-set
183 22:56:38.225626 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-test-shell
184 22:56:38.226606 Updating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-install-packages (oe)
185 22:56:38.227351 Updating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/bin/lava-installed-packages (oe)
186 22:56:38.228405 Creating /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/environment
187 22:56:38.228906 LAVA metadata
188 22:56:38.229197 - LAVA_JOB_ID=963288
189 22:56:38.229424 - LAVA_DISPATCHER_IP=192.168.6.2
190 22:56:38.229828 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 22:56:38.230896 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 22:56:38.231251 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 22:56:38.231463 skipped lava-vland-overlay
194 22:56:38.231712 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 22:56:38.232023 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 22:56:38.232346 skipped lava-multinode-overlay
197 22:56:38.232633 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 22:56:38.232896 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 22:56:38.233165 Loading test definitions
200 22:56:38.233455 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 22:56:38.233679 Using /lava-963288 at stage 0
202 22:56:38.235055 uuid=963288_1.6.2.4.1 testdef=None
203 22:56:38.235413 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 22:56:38.235691 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 22:56:38.237594 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 22:56:38.238427 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 22:56:38.240722 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 22:56:38.241595 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 22:56:38.248124 runner path: /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 963288_1.6.2.4.1
212 22:56:38.248968 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 22:56:38.249854 Creating lava-test-runner.conf files
215 22:56:38.250080 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/963288/lava-overlay-_93x219l/lava-963288/0 for stage 0
216 22:56:38.250510 - 0_v4l2-decoder-conformance-h264
217 22:56:38.250983 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 22:56:38.251310 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 22:56:38.276709 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 22:56:38.277172 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 22:56:38.277441 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 22:56:38.277716 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 22:56:38.277981 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 22:56:38.992390 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 22:56:38.992867 start: 1.6.4 extract-modules (timeout 00:09:09) [common]
226 22:56:38.993122 extracting modules file /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/963288/extract-nfsrootfs-07kgyjyf
227 22:56:40.608021 extracting modules file /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/963288/extract-overlay-ramdisk-lh3znwk7/ramdisk
228 22:56:42.006559 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 22:56:42.007042 start: 1.6.5 apply-overlay-tftp (timeout 00:09:06) [common]
230 22:56:42.007316 [common] Applying overlay to NFS
231 22:56:42.007527 [common] Applying overlay /var/lib/lava/dispatcher/tmp/963288/compress-overlay-e60rh754/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/963288/extract-nfsrootfs-07kgyjyf
232 22:56:42.036838 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 22:56:42.037280 start: 1.6.6 prepare-kernel (timeout 00:09:06) [common]
234 22:56:42.037560 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:06) [common]
235 22:56:42.037793 Converting downloaded kernel to a uImage
236 22:56:42.038106 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/kernel/Image /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/kernel/uImage
237 22:56:42.545306 output: Image Name:
238 22:56:42.545735 output: Created: Fri Nov 8 22:56:42 2024
239 22:56:42.545950 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 22:56:42.546156 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 22:56:42.546358 output: Load Address: 01080000
242 22:56:42.546557 output: Entry Point: 01080000
243 22:56:42.546754 output:
244 22:56:42.547092 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 22:56:42.547362 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 22:56:42.547632 start: 1.6.7 configure-preseed-file (timeout 00:09:05) [common]
247 22:56:42.547886 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 22:56:42.548189 start: 1.6.8 compress-ramdisk (timeout 00:09:05) [common]
249 22:56:42.548449 Building ramdisk /var/lib/lava/dispatcher/tmp/963288/extract-overlay-ramdisk-lh3znwk7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/963288/extract-overlay-ramdisk-lh3znwk7/ramdisk
250 22:56:44.708977 >> 166827 blocks
251 22:56:52.449471 Adding RAMdisk u-boot header.
252 22:56:52.450194 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/963288/extract-overlay-ramdisk-lh3znwk7/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/963288/extract-overlay-ramdisk-lh3znwk7/ramdisk.cpio.gz.uboot
253 22:56:52.703593 output: Image Name:
254 22:56:52.704069 output: Created: Fri Nov 8 22:56:52 2024
255 22:56:52.704500 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 22:56:52.704909 output: Data Size: 23434497 Bytes = 22885.25 KiB = 22.35 MiB
257 22:56:52.705305 output: Load Address: 00000000
258 22:56:52.705698 output: Entry Point: 00000000
259 22:56:52.706088 output:
260 22:56:52.707197 rename /var/lib/lava/dispatcher/tmp/963288/extract-overlay-ramdisk-lh3znwk7/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/ramdisk/ramdisk.cpio.gz.uboot
261 22:56:52.707917 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 22:56:52.708503 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 22:56:52.709029 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:55) [common]
264 22:56:52.709482 No LXC device requested
265 22:56:52.709981 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 22:56:52.710484 start: 1.8 deploy-device-env (timeout 00:08:55) [common]
267 22:56:52.710975 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 22:56:52.711381 Checking files for TFTP limit of 4294967296 bytes.
269 22:56:52.714131 end: 1 tftp-deploy (duration 00:01:05) [common]
270 22:56:52.714708 start: 2 uboot-action (timeout 00:05:00) [common]
271 22:56:52.715227 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 22:56:52.715717 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 22:56:52.716250 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 22:56:52.716771 Using kernel file from prepare-kernel: 963288/tftp-deploy-pkmdqxgp/kernel/uImage
275 22:56:52.717392 substitutions:
276 22:56:52.717794 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 22:56:52.718194 - {DTB_ADDR}: 0x01070000
278 22:56:52.718587 - {DTB}: 963288/tftp-deploy-pkmdqxgp/dtb/meson-g12b-a311d-libretech-cc.dtb
279 22:56:52.718979 - {INITRD}: 963288/tftp-deploy-pkmdqxgp/ramdisk/ramdisk.cpio.gz.uboot
280 22:56:52.719369 - {KERNEL_ADDR}: 0x01080000
281 22:56:52.719757 - {KERNEL}: 963288/tftp-deploy-pkmdqxgp/kernel/uImage
282 22:56:52.720199 - {LAVA_MAC}: None
283 22:56:52.720637 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/963288/extract-nfsrootfs-07kgyjyf
284 22:56:52.721034 - {NFS_SERVER_IP}: 192.168.6.2
285 22:56:52.721422 - {PRESEED_CONFIG}: None
286 22:56:52.721808 - {PRESEED_LOCAL}: None
287 22:56:52.722195 - {RAMDISK_ADDR}: 0x08000000
288 22:56:52.722581 - {RAMDISK}: 963288/tftp-deploy-pkmdqxgp/ramdisk/ramdisk.cpio.gz.uboot
289 22:56:52.722968 - {ROOT_PART}: None
290 22:56:52.723350 - {ROOT}: None
291 22:56:52.723732 - {SERVER_IP}: 192.168.6.2
292 22:56:52.724146 - {TEE_ADDR}: 0x83000000
293 22:56:52.724530 - {TEE}: None
294 22:56:52.724917 Parsed boot commands:
295 22:56:52.725292 - setenv autoload no
296 22:56:52.725674 - setenv initrd_high 0xffffffff
297 22:56:52.726057 - setenv fdt_high 0xffffffff
298 22:56:52.726438 - dhcp
299 22:56:52.726820 - setenv serverip 192.168.6.2
300 22:56:52.727199 - tftpboot 0x01080000 963288/tftp-deploy-pkmdqxgp/kernel/uImage
301 22:56:52.727583 - tftpboot 0x08000000 963288/tftp-deploy-pkmdqxgp/ramdisk/ramdisk.cpio.gz.uboot
302 22:56:52.727965 - tftpboot 0x01070000 963288/tftp-deploy-pkmdqxgp/dtb/meson-g12b-a311d-libretech-cc.dtb
303 22:56:52.728371 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/963288/extract-nfsrootfs-07kgyjyf,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 22:56:52.728768 - bootm 0x01080000 0x08000000 0x01070000
305 22:56:52.729258 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 22:56:52.730715 start: 2.3 connect-device (timeout 00:05:00) [common]
308 22:56:52.731127 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 22:56:52.745673 Setting prompt string to ['lava-test: # ']
310 22:56:52.747159 end: 2.3 connect-device (duration 00:00:00) [common]
311 22:56:52.747744 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 22:56:52.748405 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 22:56:52.748940 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 22:56:52.750046 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 22:56:52.786746 >> OK - accepted request
316 22:56:52.789114 Returned 0 in 0 seconds
317 22:56:52.890249 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 22:56:52.891858 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 22:56:52.892512 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 22:56:52.893047 Setting prompt string to ['Hit any key to stop autoboot']
322 22:56:52.893520 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 22:56:52.895095 Trying 192.168.56.21...
324 22:56:52.895570 Connected to conserv1.
325 22:56:52.896030 Escape character is '^]'.
326 22:56:52.896467
327 22:56:52.896896 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 22:56:52.897325
329 22:57:04.339697 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
330 22:57:04.340378 bl2_stage_init 0x81
331 22:57:04.345050 hw id: 0x0000 - pwm id 0x01
332 22:57:04.345678 bl2_stage_init 0xc1
333 22:57:04.346117 bl2_stage_init 0x02
334 22:57:04.346531
335 22:57:04.350750 L0:00000000
336 22:57:04.351185 L1:20000703
337 22:57:04.351591 L2:00008067
338 22:57:04.352002 L3:14000000
339 22:57:04.352402 B2:00402000
340 22:57:04.353511 B1:e0f83180
341 22:57:04.353939
342 22:57:04.354329 TE: 58150
343 22:57:04.354717
344 22:57:04.364558 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
345 22:57:04.364979
346 22:57:04.365371 Board ID = 1
347 22:57:04.365757 Set A53 clk to 24M
348 22:57:04.366140 Set A73 clk to 24M
349 22:57:04.370057 Set clk81 to 24M
350 22:57:04.370501 A53 clk: 1200 MHz
351 22:57:04.370902 A73 clk: 1200 MHz
352 22:57:04.375778 CLK81: 166.6M
353 22:57:04.376285 smccc: 00012aac
354 22:57:04.381411 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
355 22:57:04.381898 board id: 1
356 22:57:04.386942 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
357 22:57:04.400555 fw parse done
358 22:57:04.406505 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
359 22:57:04.449117 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
360 22:57:04.460028 PIEI prepare done
361 22:57:04.460462 fastboot data load
362 22:57:04.460853 fastboot data verify
363 22:57:04.465708 verify result: 266
364 22:57:04.471344 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
365 22:57:04.471820 LPDDR4 probe
366 22:57:04.472260 ddr clk to 1584MHz
367 22:57:04.479276 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
368 22:57:04.516564
369 22:57:04.516919 dmc_version 0001
370 22:57:04.523202 Check phy result
371 22:57:04.529078 INFO : End of CA training
372 22:57:04.529370 INFO : End of initialization
373 22:57:04.534674 INFO : Training has run successfully!
374 22:57:04.534987 Check phy result
375 22:57:04.540367 INFO : End of initialization
376 22:57:04.540807 INFO : End of read enable training
377 22:57:04.545853 INFO : End of fine write leveling
378 22:57:04.551430 INFO : End of Write leveling coarse delay
379 22:57:04.551732 INFO : Training has run successfully!
380 22:57:04.551951 Check phy result
381 22:57:04.557049 INFO : End of initialization
382 22:57:04.557322 INFO : End of read dq deskew training
383 22:57:04.562651 INFO : End of MPR read delay center optimization
384 22:57:04.568388 INFO : End of write delay center optimization
385 22:57:04.573876 INFO : End of read delay center optimization
386 22:57:04.574170 INFO : End of max read latency training
387 22:57:04.579428 INFO : Training has run successfully!
388 22:57:04.579656 1D training succeed
389 22:57:04.588630 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 22:57:04.636225 Check phy result
391 22:57:04.636653 INFO : End of initialization
392 22:57:04.657946 INFO : End of 2D read delay Voltage center optimization
393 22:57:04.678194 INFO : End of 2D read delay Voltage center optimization
394 22:57:04.730266 INFO : End of 2D write delay Voltage center optimization
395 22:57:04.779573 INFO : End of 2D write delay Voltage center optimization
396 22:57:04.785150 INFO : Training has run successfully!
397 22:57:04.785571
398 22:57:04.785978 channel==0
399 22:57:04.790746 RxClkDly_Margin_A0==88 ps 9
400 22:57:04.791162 TxDqDly_Margin_A0==98 ps 10
401 22:57:04.796361 RxClkDly_Margin_A1==88 ps 9
402 22:57:04.796774 TxDqDly_Margin_A1==98 ps 10
403 22:57:04.797171 TrainedVREFDQ_A0==74
404 22:57:04.801976 TrainedVREFDQ_A1==74
405 22:57:04.802390 VrefDac_Margin_A0==25
406 22:57:04.802782 DeviceVref_Margin_A0==40
407 22:57:04.807561 VrefDac_Margin_A1==24
408 22:57:04.808013 DeviceVref_Margin_A1==40
409 22:57:04.808410
410 22:57:04.808798
411 22:57:04.813163 channel==1
412 22:57:04.813576 RxClkDly_Margin_A0==98 ps 10
413 22:57:04.813966 TxDqDly_Margin_A0==98 ps 10
414 22:57:04.818753 RxClkDly_Margin_A1==88 ps 9
415 22:57:04.819167 TxDqDly_Margin_A1==88 ps 9
416 22:57:04.824353 TrainedVREFDQ_A0==77
417 22:57:04.824770 TrainedVREFDQ_A1==77
418 22:57:04.825161 VrefDac_Margin_A0==22
419 22:57:04.829938 DeviceVref_Margin_A0==37
420 22:57:04.830352 VrefDac_Margin_A1==24
421 22:57:04.835533 DeviceVref_Margin_A1==37
422 22:57:04.835963
423 22:57:04.836385 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
424 22:57:04.836778
425 22:57:04.869554 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
426 22:57:04.870062 2D training succeed
427 22:57:04.874769 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
428 22:57:04.880367 auto size-- 65535DDR cs0 size: 2048MB
429 22:57:04.880781 DDR cs1 size: 2048MB
430 22:57:04.885943 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
431 22:57:04.886355 cs0 DataBus test pass
432 22:57:04.891558 cs1 DataBus test pass
433 22:57:04.891968 cs0 AddrBus test pass
434 22:57:04.892404 cs1 AddrBus test pass
435 22:57:04.892794
436 22:57:04.897166 100bdlr_step_size ps== 420
437 22:57:04.897585 result report
438 22:57:04.902756 boot times 0Enable ddr reg access
439 22:57:04.908072 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
440 22:57:04.921100 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
441 22:57:05.495298 0.0;M3 CHK:0;cm4_sp_mode 0
442 22:57:05.495903 MVN_1=0x00000000
443 22:57:05.500811 MVN_2=0x00000000
444 22:57:05.506577 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
445 22:57:05.507081 OPS=0x10
446 22:57:05.507534 ring efuse init
447 22:57:05.507971 chipver efuse init
448 22:57:05.512167 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
449 22:57:05.517714 [0.018961 Inits done]
450 22:57:05.518202 secure task start!
451 22:57:05.518640 high task start!
452 22:57:05.522346 low task start!
453 22:57:05.522828 run into bl31
454 22:57:05.528990 NOTICE: BL31: v1.3(release):4fc40b1
455 22:57:05.536791 NOTICE: BL31: Built : 15:58:17, May 22 2019
456 22:57:05.537307 NOTICE: BL31: G12A normal boot!
457 22:57:05.562199 NOTICE: BL31: BL33 decompress pass
458 22:57:05.567913 ERROR: Error initializing runtime service opteed_fast
459 22:57:06.800878
460 22:57:06.801514
461 22:57:06.809192 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
462 22:57:06.809709
463 22:57:06.810167 Model: Libre Computer AML-A311D-CC Alta
464 22:57:07.017545 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
465 22:57:07.041094 DRAM: 2 GiB (effective 3.8 GiB)
466 22:57:07.184028 Core: 408 devices, 31 uclasses, devicetree: separate
467 22:57:07.189864 WDT: Not starting watchdog@f0d0
468 22:57:07.222137 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
469 22:57:07.234660 Loading Environment from FAT... Card did not respond to voltage select! : -110
470 22:57:07.239558 ** Bad device specification mmc 0 **
471 22:57:07.249913 Card did not respond to voltage select! : -110
472 22:57:07.257540 ** Bad device specification mmc 0 **
473 22:57:07.258028 Couldn't find partition mmc 0
474 22:57:07.265905 Card did not respond to voltage select! : -110
475 22:57:07.271399 ** Bad device specification mmc 0 **
476 22:57:07.271912 Couldn't find partition mmc 0
477 22:57:07.276471 Error: could not access storage.
478 22:57:08.539826 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
479 22:57:08.540288 bl2_stage_init 0x01
480 22:57:08.540513 bl2_stage_init 0x81
481 22:57:08.545396 hw id: 0x0000 - pwm id 0x01
482 22:57:08.545691 bl2_stage_init 0xc1
483 22:57:08.545910 bl2_stage_init 0x02
484 22:57:08.546117
485 22:57:08.550966 L0:00000000
486 22:57:08.551355 L1:20000703
487 22:57:08.551688 L2:00008067
488 22:57:08.552034 L3:14000000
489 22:57:08.553926 B2:00402000
490 22:57:08.554288 B1:e0f83180
491 22:57:08.554615
492 22:57:08.554849 TE: 58167
493 22:57:08.555061
494 22:57:08.565029 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 22:57:08.565438
496 22:57:08.565781 Board ID = 1
497 22:57:08.566112 Set A53 clk to 24M
498 22:57:08.566438 Set A73 clk to 24M
499 22:57:08.570678 Set clk81 to 24M
500 22:57:08.570973 A53 clk: 1200 MHz
501 22:57:08.571185 A73 clk: 1200 MHz
502 22:57:08.576246 CLK81: 166.6M
503 22:57:08.576632 smccc: 00012abd
504 22:57:08.581908 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 22:57:08.582277 board id: 1
506 22:57:08.590426 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 22:57:08.601080 fw parse done
508 22:57:08.607033 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 22:57:08.649668 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 22:57:08.660578 PIEI prepare done
511 22:57:08.660845 fastboot data load
512 22:57:08.661059 fastboot data verify
513 22:57:08.666264 verify result: 266
514 22:57:08.671853 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 22:57:08.672257 LPDDR4 probe
516 22:57:08.672594 ddr clk to 1584MHz
517 22:57:08.679841 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 22:57:08.716275
519 22:57:08.716543 dmc_version 0001
520 22:57:08.723746 Check phy result
521 22:57:08.729676 INFO : End of CA training
522 22:57:08.730161 INFO : End of initialization
523 22:57:08.735237 INFO : Training has run successfully!
524 22:57:08.735673 Check phy result
525 22:57:08.740848 INFO : End of initialization
526 22:57:08.741286 INFO : End of read enable training
527 22:57:08.746430 INFO : End of fine write leveling
528 22:57:08.752050 INFO : End of Write leveling coarse delay
529 22:57:08.752506 INFO : Training has run successfully!
530 22:57:08.752915 Check phy result
531 22:57:08.757625 INFO : End of initialization
532 22:57:08.758059 INFO : End of read dq deskew training
533 22:57:08.763233 INFO : End of MPR read delay center optimization
534 22:57:08.768847 INFO : End of write delay center optimization
535 22:57:08.774432 INFO : End of read delay center optimization
536 22:57:08.774861 INFO : End of max read latency training
537 22:57:08.780054 INFO : Training has run successfully!
538 22:57:08.780493 1D training succeed
539 22:57:08.789229 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 22:57:08.836644 Check phy result
541 22:57:08.837082 INFO : End of initialization
542 22:57:08.858532 INFO : End of 2D read delay Voltage center optimization
543 22:57:08.878765 INFO : End of 2D read delay Voltage center optimization
544 22:57:08.930777 INFO : End of 2D write delay Voltage center optimization
545 22:57:08.980434 INFO : End of 2D write delay Voltage center optimization
546 22:57:08.985795 INFO : Training has run successfully!
547 22:57:08.986249
548 22:57:08.986678 channel==0
549 22:57:08.991365 RxClkDly_Margin_A0==88 ps 9
550 22:57:08.991837 TxDqDly_Margin_A0==98 ps 10
551 22:57:08.997069 RxClkDly_Margin_A1==88 ps 9
552 22:57:08.997548 TxDqDly_Margin_A1==98 ps 10
553 22:57:08.997976 TrainedVREFDQ_A0==74
554 22:57:09.002617 TrainedVREFDQ_A1==74
555 22:57:09.003081 VrefDac_Margin_A0==25
556 22:57:09.003494 DeviceVref_Margin_A0==40
557 22:57:09.008303 VrefDac_Margin_A1==25
558 22:57:09.008879 DeviceVref_Margin_A1==40
559 22:57:09.009302
560 22:57:09.009718
561 22:57:09.013850 channel==1
562 22:57:09.014416 RxClkDly_Margin_A0==98 ps 10
563 22:57:09.014840 TxDqDly_Margin_A0==88 ps 9
564 22:57:09.019461 RxClkDly_Margin_A1==98 ps 10
565 22:57:09.020037 TxDqDly_Margin_A1==88 ps 9
566 22:57:09.025084 TrainedVREFDQ_A0==76
567 22:57:09.025561 TrainedVREFDQ_A1==77
568 22:57:09.025972 VrefDac_Margin_A0==22
569 22:57:09.030569 DeviceVref_Margin_A0==38
570 22:57:09.031029 VrefDac_Margin_A1==22
571 22:57:09.036226 DeviceVref_Margin_A1==37
572 22:57:09.036688
573 22:57:09.037095 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 22:57:09.037496
575 22:57:09.069804 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
576 22:57:09.070355 2D training succeed
577 22:57:09.075391 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 22:57:09.081144 auto size-- 65535DDR cs0 size: 2048MB
579 22:57:09.081636 DDR cs1 size: 2048MB
580 22:57:09.086598 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 22:57:09.087075 cs0 DataBus test pass
582 22:57:09.092237 cs1 DataBus test pass
583 22:57:09.092700 cs0 AddrBus test pass
584 22:57:09.093103 cs1 AddrBus test pass
585 22:57:09.093501
586 22:57:09.097773 100bdlr_step_size ps== 420
587 22:57:09.098232 result report
588 22:57:09.103403 boot times 0Enable ddr reg access
589 22:57:09.108701 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 22:57:09.122227 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 22:57:09.696107 0.0;M3 CHK:0;cm4_sp_mode 0
592 22:57:09.696693 MVN_1=0x00000000
593 22:57:09.701521 MVN_2=0x00000000
594 22:57:09.707308 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 22:57:09.707800 OPS=0x10
596 22:57:09.708297 ring efuse init
597 22:57:09.708695 chipver efuse init
598 22:57:09.712900 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 22:57:09.718583 [0.018961 Inits done]
600 22:57:09.719005 secure task start!
601 22:57:09.719397 high task start!
602 22:57:09.723106 low task start!
603 22:57:09.723523 run into bl31
604 22:57:09.729771 NOTICE: BL31: v1.3(release):4fc40b1
605 22:57:09.737496 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 22:57:09.737923 NOTICE: BL31: G12A normal boot!
607 22:57:09.762861 NOTICE: BL31: BL33 decompress pass
608 22:57:09.768478 ERROR: Error initializing runtime service opteed_fast
609 22:57:11.001735
610 22:57:11.002351
611 22:57:11.009187 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 22:57:11.009703
613 22:57:11.010123 Model: Libre Computer AML-A311D-CC Alta
614 22:57:11.218455 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 22:57:11.241670 DRAM: 2 GiB (effective 3.8 GiB)
616 22:57:11.384720 Core: 408 devices, 31 uclasses, devicetree: separate
617 22:57:11.390659 WDT: Not starting watchdog@f0d0
618 22:57:11.422835 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 22:57:11.435237 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 22:57:11.440260 ** Bad device specification mmc 0 **
621 22:57:11.450457 Card did not respond to voltage select! : -110
622 22:57:11.458133 ** Bad device specification mmc 0 **
623 22:57:11.458575 Couldn't find partition mmc 0
624 22:57:11.466476 Card did not respond to voltage select! : -110
625 22:57:11.471918 ** Bad device specification mmc 0 **
626 22:57:11.472382 Couldn't find partition mmc 0
627 22:57:11.477101 Error: could not access storage.
628 22:57:11.820047 Net: eth0: ethernet@ff3f0000
629 22:57:11.820661 starting USB...
630 22:57:12.071383 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 22:57:12.072030 Starting the controller
632 22:57:12.078317 USB XHCI 1.10
633 22:57:13.788725 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
634 22:57:13.789183 bl2_stage_init 0x01
635 22:57:13.789439 bl2_stage_init 0x81
636 22:57:13.794255 hw id: 0x0000 - pwm id 0x01
637 22:57:13.794659 bl2_stage_init 0xc1
638 22:57:13.794927 bl2_stage_init 0x02
639 22:57:13.795152
640 22:57:13.799875 L0:00000000
641 22:57:13.800463 L1:20000703
642 22:57:13.800871 L2:00008067
643 22:57:13.801290 L3:14000000
644 22:57:13.802827 B2:00402000
645 22:57:13.803159 B1:e0f83180
646 22:57:13.803394
647 22:57:13.803621 TE: 58159
648 22:57:13.803848
649 22:57:13.814331 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 22:57:13.814771
651 22:57:13.815031 Board ID = 1
652 22:57:13.815281 Set A53 clk to 24M
653 22:57:13.815522 Set A73 clk to 24M
654 22:57:13.819781 Set clk81 to 24M
655 22:57:13.820435 A53 clk: 1200 MHz
656 22:57:13.820665 A73 clk: 1200 MHz
657 22:57:13.823666 CLK81: 166.6M
658 22:57:13.824058 smccc: 00012ab5
659 22:57:13.828357 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 22:57:13.833990 board id: 1
661 22:57:13.839200 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 22:57:13.850077 fw parse done
663 22:57:13.856052 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 22:57:13.898153 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 22:57:13.909701 PIEI prepare done
666 22:57:13.910123 fastboot data load
667 22:57:13.910362 fastboot data verify
668 22:57:13.915129 verify result: 266
669 22:57:13.920653 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 22:57:13.920961 LPDDR4 probe
671 22:57:13.921179 ddr clk to 1584MHz
672 22:57:13.928701 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 22:57:13.966176
674 22:57:13.966765 dmc_version 0001
675 22:57:13.972792 Check phy result
676 22:57:13.978985 INFO : End of CA training
677 22:57:13.979531 INFO : End of initialization
678 22:57:13.984150 INFO : Training has run successfully!
679 22:57:13.984717 Check phy result
680 22:57:13.991123 INFO : End of initialization
681 22:57:13.991740 INFO : End of read enable training
682 22:57:13.993969 INFO : End of fine write leveling
683 22:57:13.998596 INFO : End of Write leveling coarse delay
684 22:57:14.004187 INFO : Training has run successfully!
685 22:57:14.004544 Check phy result
686 22:57:14.004789 INFO : End of initialization
687 22:57:14.009787 INFO : End of read dq deskew training
688 22:57:14.015318 INFO : End of MPR read delay center optimization
689 22:57:14.015860 INFO : End of write delay center optimization
690 22:57:14.020990 INFO : End of read delay center optimization
691 22:57:14.026578 INFO : End of max read latency training
692 22:57:14.027262 INFO : Training has run successfully!
693 22:57:14.032272 1D training succeed
694 22:57:14.038077 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 22:57:14.085676 Check phy result
696 22:57:14.086308 INFO : End of initialization
697 22:57:14.108093 INFO : End of 2D read delay Voltage center optimization
698 22:57:14.128239 INFO : End of 2D read delay Voltage center optimization
699 22:57:14.180171 INFO : End of 2D write delay Voltage center optimization
700 22:57:14.229400 INFO : End of 2D write delay Voltage center optimization
701 22:57:14.234998 INFO : Training has run successfully!
702 22:57:14.235512
703 22:57:14.236065 channel==0
704 22:57:14.240569 RxClkDly_Margin_A0==88 ps 9
705 22:57:14.241061 TxDqDly_Margin_A0==98 ps 10
706 22:57:14.244031 RxClkDly_Margin_A1==88 ps 9
707 22:57:14.244530 TxDqDly_Margin_A1==98 ps 10
708 22:57:14.249539 TrainedVREFDQ_A0==74
709 22:57:14.250039 TrainedVREFDQ_A1==74
710 22:57:14.250497 VrefDac_Margin_A0==25
711 22:57:14.255165 DeviceVref_Margin_A0==40
712 22:57:14.255657 VrefDac_Margin_A1==24
713 22:57:14.260879 DeviceVref_Margin_A1==40
714 22:57:14.261375
715 22:57:14.261830
716 22:57:14.262274 channel==1
717 22:57:14.262713 RxClkDly_Margin_A0==98 ps 10
718 22:57:14.264287 TxDqDly_Margin_A0==98 ps 10
719 22:57:14.269987 RxClkDly_Margin_A1==88 ps 9
720 22:57:14.270476 TxDqDly_Margin_A1==88 ps 9
721 22:57:14.270935 TrainedVREFDQ_A0==77
722 22:57:14.275357 TrainedVREFDQ_A1==77
723 22:57:14.275842 VrefDac_Margin_A0==22
724 22:57:14.281079 DeviceVref_Margin_A0==37
725 22:57:14.281565 VrefDac_Margin_A1==24
726 22:57:14.282011 DeviceVref_Margin_A1==37
727 22:57:14.282448
728 22:57:14.286683 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 22:57:14.287173
730 22:57:14.320274 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
731 22:57:14.320823 2D training succeed
732 22:57:14.325950 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 22:57:14.331336 auto size-- 65535DDR cs0 size: 2048MB
734 22:57:14.331866 DDR cs1 size: 2048MB
735 22:57:14.336937 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 22:57:14.337434 cs0 DataBus test pass
737 22:57:14.337891 cs1 DataBus test pass
738 22:57:14.342556 cs0 AddrBus test pass
739 22:57:14.343041 cs1 AddrBus test pass
740 22:57:14.343492
741 22:57:14.348158 100bdlr_step_size ps== 420
742 22:57:14.348660 result report
743 22:57:14.349112 boot times 0Enable ddr reg access
744 22:57:14.357752 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 22:57:14.371254 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 22:57:14.943257 0.0;M3 CHK:0;cm4_sp_mode 0
747 22:57:14.943928 MVN_1=0x00000000
748 22:57:14.948733 MVN_2=0x00000000
749 22:57:14.954493 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 22:57:14.955059 OPS=0x10
751 22:57:14.955497 ring efuse init
752 22:57:14.955926 chipver efuse init
753 22:57:14.960074 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 22:57:14.965700 [0.018961 Inits done]
755 22:57:14.966173 secure task start!
756 22:57:14.966606 high task start!
757 22:57:14.970265 low task start!
758 22:57:14.970736 run into bl31
759 22:57:14.976896 NOTICE: BL31: v1.3(release):4fc40b1
760 22:57:14.984587 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 22:57:14.985130 NOTICE: BL31: G12A normal boot!
762 22:57:15.010086 NOTICE: BL31: BL33 decompress pass
763 22:57:15.015892 ERROR: Error initializing runtime service opteed_fast
764 22:57:16.248838
765 22:57:16.249535
766 22:57:16.257198 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 22:57:16.257746
768 22:57:16.258209 Model: Libre Computer AML-A311D-CC Alta
769 22:57:16.465587 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 22:57:16.488925 DRAM: 2 GiB (effective 3.8 GiB)
771 22:57:16.631888 Core: 408 devices, 31 uclasses, devicetree: separate
772 22:57:16.637722 WDT: Not starting watchdog@f0d0
773 22:57:16.670104 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 22:57:16.682429 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 22:57:16.687386 ** Bad device specification mmc 0 **
776 22:57:16.697735 Card did not respond to voltage select! : -110
777 22:57:16.705381 ** Bad device specification mmc 0 **
778 22:57:16.705859 Couldn't find partition mmc 0
779 22:57:16.713702 Card did not respond to voltage select! : -110
780 22:57:16.719276 ** Bad device specification mmc 0 **
781 22:57:16.719754 Couldn't find partition mmc 0
782 22:57:16.728154 Error: could not access storage.
783 22:57:17.067858 Net: eth0: ethernet@ff3f0000
784 22:57:17.068312 starting USB...
785 22:57:17.319627 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 22:57:17.320068 Starting the controller
787 22:57:17.326610 USB XHCI 1.10
788 22:57:19.488958 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 22:57:19.489583 bl2_stage_init 0x01
790 22:57:19.490014 bl2_stage_init 0x81
791 22:57:19.494575 hw id: 0x0000 - pwm id 0x01
792 22:57:19.495046 bl2_stage_init 0xc1
793 22:57:19.495461 bl2_stage_init 0x02
794 22:57:19.495866
795 22:57:19.500192 L0:00000000
796 22:57:19.500685 L1:20000703
797 22:57:19.501104 L2:00008067
798 22:57:19.501513 L3:14000000
799 22:57:19.505813 B2:00402000
800 22:57:19.506295 B1:e0f83180
801 22:57:19.506703
802 22:57:19.507106 TE: 58159
803 22:57:19.507505
804 22:57:19.511485 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 22:57:19.511972
806 22:57:19.512427 Board ID = 1
807 22:57:19.516934 Set A53 clk to 24M
808 22:57:19.517404 Set A73 clk to 24M
809 22:57:19.517815 Set clk81 to 24M
810 22:57:19.522702 A53 clk: 1200 MHz
811 22:57:19.523170 A73 clk: 1200 MHz
812 22:57:19.523580 CLK81: 166.6M
813 22:57:19.524014 smccc: 00012ab5
814 22:57:19.528164 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 22:57:19.533889 board id: 1
816 22:57:19.539668 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 22:57:19.550204 fw parse done
818 22:57:19.556131 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 22:57:19.598677 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 22:57:19.609658 PIEI prepare done
821 22:57:19.610134 fastboot data load
822 22:57:19.610550 fastboot data verify
823 22:57:19.615247 verify result: 266
824 22:57:19.620833 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 22:57:19.621302 LPDDR4 probe
826 22:57:19.621710 ddr clk to 1584MHz
827 22:57:19.628841 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 22:57:19.666070
829 22:57:19.666552 dmc_version 0001
830 22:57:19.672760 Check phy result
831 22:57:19.678609 INFO : End of CA training
832 22:57:19.679069 INFO : End of initialization
833 22:57:19.684250 INFO : Training has run successfully!
834 22:57:19.684715 Check phy result
835 22:57:19.689820 INFO : End of initialization
836 22:57:19.690283 INFO : End of read enable training
837 22:57:19.695484 INFO : End of fine write leveling
838 22:57:19.701006 INFO : End of Write leveling coarse delay
839 22:57:19.701465 INFO : Training has run successfully!
840 22:57:19.701875 Check phy result
841 22:57:19.706599 INFO : End of initialization
842 22:57:19.707057 INFO : End of read dq deskew training
843 22:57:19.712257 INFO : End of MPR read delay center optimization
844 22:57:19.717812 INFO : End of write delay center optimization
845 22:57:19.723396 INFO : End of read delay center optimization
846 22:57:19.723858 INFO : End of max read latency training
847 22:57:19.729005 INFO : Training has run successfully!
848 22:57:19.729462 1D training succeed
849 22:57:19.737208 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 22:57:19.784849 Check phy result
851 22:57:19.785332 INFO : End of initialization
852 22:57:19.806583 INFO : End of 2D read delay Voltage center optimization
853 22:57:19.827686 INFO : End of 2D read delay Voltage center optimization
854 22:57:19.878842 INFO : End of 2D write delay Voltage center optimization
855 22:57:19.929193 INFO : End of 2D write delay Voltage center optimization
856 22:57:19.934793 INFO : Training has run successfully!
857 22:57:19.935283
858 22:57:19.935698 channel==0
859 22:57:19.940387 RxClkDly_Margin_A0==88 ps 9
860 22:57:19.940884 TxDqDly_Margin_A0==98 ps 10
861 22:57:19.943700 RxClkDly_Margin_A1==88 ps 9
862 22:57:19.944199 TxDqDly_Margin_A1==88 ps 9
863 22:57:19.949249 TrainedVREFDQ_A0==74
864 22:57:19.949750 TrainedVREFDQ_A1==74
865 22:57:19.950152 VrefDac_Margin_A0==25
866 22:57:19.954812 DeviceVref_Margin_A0==40
867 22:57:19.955288 VrefDac_Margin_A1==25
868 22:57:19.960389 DeviceVref_Margin_A1==40
869 22:57:19.960842
870 22:57:19.961235
871 22:57:19.961618 channel==1
872 22:57:19.961998 RxClkDly_Margin_A0==98 ps 10
873 22:57:19.963774 TxDqDly_Margin_A0==88 ps 9
874 22:57:19.969347 RxClkDly_Margin_A1==88 ps 9
875 22:57:19.969801 TxDqDly_Margin_A1==108 ps 11
876 22:57:19.970194 TrainedVREFDQ_A0==77
877 22:57:19.974898 TrainedVREFDQ_A1==78
878 22:57:19.975355 VrefDac_Margin_A0==22
879 22:57:19.980590 DeviceVref_Margin_A0==37
880 22:57:19.981053 VrefDac_Margin_A1==24
881 22:57:19.981444 DeviceVref_Margin_A1==36
882 22:57:19.981835
883 22:57:19.989395 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 22:57:19.989860
885 22:57:20.017430 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
886 22:57:20.017968 2D training succeed
887 22:57:20.028600 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 22:57:20.029071 auto size-- 65535DDR cs0 size: 2048MB
889 22:57:20.034233 DDR cs1 size: 2048MB
890 22:57:20.034692 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 22:57:20.035083 cs0 DataBus test pass
892 22:57:20.039829 cs1 DataBus test pass
893 22:57:20.040320 cs0 AddrBus test pass
894 22:57:20.045429 cs1 AddrBus test pass
895 22:57:20.045882
896 22:57:20.046275 100bdlr_step_size ps== 420
897 22:57:20.046671 result report
898 22:57:20.051036 boot times 0Enable ddr reg access
899 22:57:20.057747 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 22:57:20.071138 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 22:57:20.644832 0.0;M3 CHK:0;cm4_sp_mode 0
902 22:57:20.645436 MVN_1=0x00000000
903 22:57:20.650347 MVN_2=0x00000000
904 22:57:20.656103 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 22:57:20.656571 OPS=0x10
906 22:57:20.656986 ring efuse init
907 22:57:20.657386 chipver efuse init
908 22:57:20.664248 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 22:57:20.664720 [0.018961 Inits done]
910 22:57:20.671317 secure task start!
911 22:57:20.671780 high task start!
912 22:57:20.672235 low task start!
913 22:57:20.672639 run into bl31
914 22:57:20.678511 NOTICE: BL31: v1.3(release):4fc40b1
915 22:57:20.686292 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 22:57:20.686759 NOTICE: BL31: G12A normal boot!
917 22:57:20.711726 NOTICE: BL31: BL33 decompress pass
918 22:57:20.716405 ERROR: Error initializing runtime service opteed_fast
919 22:57:21.950233
920 22:57:21.950834
921 22:57:21.957839 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 22:57:21.958334
923 22:57:21.958774 Model: Libre Computer AML-A311D-CC Alta
924 22:57:22.167133 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 22:57:22.190514 DRAM: 2 GiB (effective 3.8 GiB)
926 22:57:22.333488 Core: 408 devices, 31 uclasses, devicetree: separate
927 22:57:22.339398 WDT: Not starting watchdog@f0d0
928 22:57:22.371642 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 22:57:22.384105 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 22:57:22.389064 ** Bad device specification mmc 0 **
931 22:57:22.399417 Card did not respond to voltage select! : -110
932 22:57:22.407062 ** Bad device specification mmc 0 **
933 22:57:22.407737 Couldn't find partition mmc 0
934 22:57:22.415448 Card did not respond to voltage select! : -110
935 22:57:22.420927 ** Bad device specification mmc 0 **
936 22:57:22.421571 Couldn't find partition mmc 0
937 22:57:22.426020 Error: could not access storage.
938 22:57:22.768524 Net: eth0: ethernet@ff3f0000
939 22:57:22.769135 starting USB...
940 22:57:23.021295 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 22:57:23.021886 Starting the controller
942 22:57:23.028337 USB XHCI 1.10
943 22:57:24.888908 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
944 22:57:24.889528 bl2_stage_init 0x01
945 22:57:24.889954 bl2_stage_init 0x81
946 22:57:24.894500 hw id: 0x0000 - pwm id 0x01
947 22:57:24.894982 bl2_stage_init 0xc1
948 22:57:24.895391 bl2_stage_init 0x02
949 22:57:24.895789
950 22:57:24.900049 L0:00000000
951 22:57:24.900524 L1:20000703
952 22:57:24.900930 L2:00008067
953 22:57:24.901329 L3:14000000
954 22:57:24.905612 B2:00402000
955 22:57:24.906081 B1:e0f83180
956 22:57:24.906488
957 22:57:24.906887 TE: 58124
958 22:57:24.907289
959 22:57:24.911164 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
960 22:57:24.911637
961 22:57:24.912098 Board ID = 1
962 22:57:24.918921 Set A53 clk to 24M
963 22:57:24.919408 Set A73 clk to 24M
964 22:57:24.919819 Set clk81 to 24M
965 22:57:24.922531 A53 clk: 1200 MHz
966 22:57:24.922994 A73 clk: 1200 MHz
967 22:57:24.923401 CLK81: 166.6M
968 22:57:24.923798 smccc: 00012a92
969 22:57:24.928100 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
970 22:57:24.933680 board id: 1
971 22:57:24.939695 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
972 22:57:24.950207 fw parse done
973 22:57:24.956369 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
974 22:57:24.998698 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
975 22:57:25.009633 PIEI prepare done
976 22:57:25.010271 fastboot data load
977 22:57:25.010796 fastboot data verify
978 22:57:25.015235 verify result: 266
979 22:57:25.020908 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
980 22:57:25.021415 LPDDR4 probe
981 22:57:25.021810 ddr clk to 1584MHz
982 22:57:25.028865 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
983 22:57:25.066063
984 22:57:25.066577 dmc_version 0001
985 22:57:25.072734 Check phy result
986 22:57:25.078576 INFO : End of CA training
987 22:57:25.079027 INFO : End of initialization
988 22:57:25.084293 INFO : Training has run successfully!
989 22:57:25.084932 Check phy result
990 22:57:25.089792 INFO : End of initialization
991 22:57:25.090256 INFO : End of read enable training
992 22:57:25.095398 INFO : End of fine write leveling
993 22:57:25.100996 INFO : End of Write leveling coarse delay
994 22:57:25.101452 INFO : Training has run successfully!
995 22:57:25.101861 Check phy result
996 22:57:25.106562 INFO : End of initialization
997 22:57:25.107016 INFO : End of read dq deskew training
998 22:57:25.112261 INFO : End of MPR read delay center optimization
999 22:57:25.117796 INFO : End of write delay center optimization
1000 22:57:25.123415 INFO : End of read delay center optimization
1001 22:57:25.123869 INFO : End of max read latency training
1002 22:57:25.128969 INFO : Training has run successfully!
1003 22:57:25.129421 1D training succeed
1004 22:57:25.138177 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 22:57:25.185751 Check phy result
1006 22:57:25.186213 INFO : End of initialization
1007 22:57:25.207420 INFO : End of 2D read delay Voltage center optimization
1008 22:57:25.227515 INFO : End of 2D read delay Voltage center optimization
1009 22:57:25.279419 INFO : End of 2D write delay Voltage center optimization
1010 22:57:25.328658 INFO : End of 2D write delay Voltage center optimization
1011 22:57:25.334271 INFO : Training has run successfully!
1012 22:57:25.334728
1013 22:57:25.335139 channel==0
1014 22:57:25.339823 RxClkDly_Margin_A0==88 ps 9
1015 22:57:25.340330 TxDqDly_Margin_A0==98 ps 10
1016 22:57:25.345484 RxClkDly_Margin_A1==88 ps 9
1017 22:57:25.345951 TxDqDly_Margin_A1==98 ps 10
1018 22:57:25.346363 TrainedVREFDQ_A0==74
1019 22:57:25.351068 TrainedVREFDQ_A1==74
1020 22:57:25.351528 VrefDac_Margin_A0==25
1021 22:57:25.351939 DeviceVref_Margin_A0==40
1022 22:57:25.356658 VrefDac_Margin_A1==25
1023 22:57:25.357116 DeviceVref_Margin_A1==40
1024 22:57:25.357520
1025 22:57:25.357918
1026 22:57:25.362305 channel==1
1027 22:57:25.362760 RxClkDly_Margin_A0==98 ps 10
1028 22:57:25.363162 TxDqDly_Margin_A0==98 ps 10
1029 22:57:25.367884 RxClkDly_Margin_A1==98 ps 10
1030 22:57:25.368361 TxDqDly_Margin_A1==88 ps 9
1031 22:57:25.373480 TrainedVREFDQ_A0==77
1032 22:57:25.373934 TrainedVREFDQ_A1==77
1033 22:57:25.374339 VrefDac_Margin_A0==22
1034 22:57:25.379025 DeviceVref_Margin_A0==37
1035 22:57:25.379629 VrefDac_Margin_A1==22
1036 22:57:25.384702 DeviceVref_Margin_A1==37
1037 22:57:25.385173
1038 22:57:25.385581 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1039 22:57:25.390245
1040 22:57:25.418292 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
1041 22:57:25.418872 2D training succeed
1042 22:57:25.423934 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1043 22:57:25.429405 auto size-- 65535DDR cs0 size: 2048MB
1044 22:57:25.429858 DDR cs1 size: 2048MB
1045 22:57:25.434950 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1046 22:57:25.435405 cs0 DataBus test pass
1047 22:57:25.440516 cs1 DataBus test pass
1048 22:57:25.440968 cs0 AddrBus test pass
1049 22:57:25.441370 cs1 AddrBus test pass
1050 22:57:25.441769
1051 22:57:25.446159 100bdlr_step_size ps== 420
1052 22:57:25.446621 result report
1053 22:57:25.451745 boot times 0Enable ddr reg access
1054 22:57:25.457181 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1055 22:57:25.470612 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1056 22:57:26.042696 0.0;M3 CHK:0;cm4_sp_mode 0
1057 22:57:26.043303 MVN_1=0x00000000
1058 22:57:26.048164 MVN_2=0x00000000
1059 22:57:26.053934 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1060 22:57:26.054393 OPS=0x10
1061 22:57:26.054804 ring efuse init
1062 22:57:26.055204 chipver efuse init
1063 22:57:26.059483 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1064 22:57:26.065096 [0.018961 Inits done]
1065 22:57:26.065548 secure task start!
1066 22:57:26.065951 high task start!
1067 22:57:26.069700 low task start!
1068 22:57:26.070153 run into bl31
1069 22:57:26.076446 NOTICE: BL31: v1.3(release):4fc40b1
1070 22:57:26.084181 NOTICE: BL31: Built : 15:58:17, May 22 2019
1071 22:57:26.084640 NOTICE: BL31: G12A normal boot!
1072 22:57:26.109567 NOTICE: BL31: BL33 decompress pass
1073 22:57:26.115248 ERROR: Error initializing runtime service opteed_fast
1074 22:57:27.348104
1075 22:57:27.348708
1076 22:57:27.356467 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1077 22:57:27.356947
1078 22:57:27.357359 Model: Libre Computer AML-A311D-CC Alta
1079 22:57:27.564978 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1080 22:57:27.588301 DRAM: 2 GiB (effective 3.8 GiB)
1081 22:57:27.731139 Core: 408 devices, 31 uclasses, devicetree: separate
1082 22:57:27.736982 WDT: Not starting watchdog@f0d0
1083 22:57:27.769411 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1084 22:57:27.781784 Loading Environment from FAT... Card did not respond to voltage select! : -110
1085 22:57:27.786803 ** Bad device specification mmc 0 **
1086 22:57:27.797104 Card did not respond to voltage select! : -110
1087 22:57:27.804778 ** Bad device specification mmc 0 **
1088 22:57:27.805240 Couldn't find partition mmc 0
1089 22:57:27.813102 Card did not respond to voltage select! : -110
1090 22:57:27.818713 ** Bad device specification mmc 0 **
1091 22:57:27.819181 Couldn't find partition mmc 0
1092 22:57:27.823793 Error: could not access storage.
1093 22:57:28.166135 Net: eth0: ethernet@ff3f0000
1094 22:57:28.166725 starting USB...
1095 22:57:28.417986 Bus usb@ff500000: Register 3000140 NbrPorts 3
1096 22:57:28.418560 Starting the controller
1097 22:57:28.424927 USB XHCI 1.10
1098 22:57:29.981147 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1099 22:57:29.989528 scanning usb for storage devices... 0 Storage Device(s) found
1101 22:57:30.041157 Hit any key to stop autoboot: 1
1102 22:57:30.042313 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1103 22:57:30.042936 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1104 22:57:30.043429 Setting prompt string to ['=>']
1105 22:57:30.043932 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1106 22:57:30.056859 0
1107 22:57:30.057756 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1108 22:57:30.058230 Sending with 10 millisecond of delay
1110 22:57:31.192893 => setenv autoload no
1111 22:57:31.203673 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1112 22:57:31.208527 setenv autoload no
1113 22:57:31.209262 Sending with 10 millisecond of delay
1115 22:57:33.006282 => setenv initrd_high 0xffffffff
1116 22:57:33.017308 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1117 22:57:33.018369 setenv initrd_high 0xffffffff
1118 22:57:33.019247 Sending with 10 millisecond of delay
1120 22:57:34.636714 => setenv fdt_high 0xffffffff
1121 22:57:34.647661 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1122 22:57:34.648763 setenv fdt_high 0xffffffff
1123 22:57:34.649631 Sending with 10 millisecond of delay
1125 22:57:34.941983 => dhcp
1126 22:57:34.952818 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1127 22:57:34.953737 dhcp
1128 22:57:34.954222 Speed: 1000, full duplex
1129 22:57:34.954677 BOOTP broadcast 1
1130 22:57:34.962574 DHCP client bound to address 192.168.6.27 (9 ms)
1131 22:57:34.963319 Sending with 10 millisecond of delay
1133 22:57:36.641220 => setenv serverip 192.168.6.2
1134 22:57:36.652079 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1135 22:57:36.653056 setenv serverip 192.168.6.2
1136 22:57:36.653803 Sending with 10 millisecond of delay
1138 22:57:40.381708 => tftpboot 0x01080000 963288/tftp-deploy-pkmdqxgp/kernel/uImage
1139 22:57:40.392539 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1140 22:57:40.393414 tftpboot 0x01080000 963288/tftp-deploy-pkmdqxgp/kernel/uImage
1141 22:57:40.393908 Speed: 1000, full duplex
1142 22:57:40.394359 Using ethernet@ff3f0000 device
1143 22:57:40.395128 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1144 22:57:40.400558 Filename '963288/tftp-deploy-pkmdqxgp/kernel/uImage'.
1145 22:57:40.404429 Load address: 0x1080000
1146 22:57:43.213401 Loading: *################################################## 43.6 MiB
1147 22:57:43.214065 15.5 MiB/s
1148 22:57:43.214542 done
1149 22:57:43.217849 Bytes transferred = 45713984 (2b98a40 hex)
1150 22:57:43.218673 Sending with 10 millisecond of delay
1152 22:57:47.906255 => tftpboot 0x08000000 963288/tftp-deploy-pkmdqxgp/ramdisk/ramdisk.cpio.gz.uboot
1153 22:57:47.917013 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:05)
1154 22:57:47.917775 tftpboot 0x08000000 963288/tftp-deploy-pkmdqxgp/ramdisk/ramdisk.cpio.gz.uboot
1155 22:57:47.918204 Speed: 1000, full duplex
1156 22:57:47.918602 Using ethernet@ff3f0000 device
1157 22:57:47.919790 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1158 22:57:47.931587 Filename '963288/tftp-deploy-pkmdqxgp/ramdisk/ramdisk.cpio.gz.uboot'.
1159 22:57:47.932105 Load address: 0x8000000
1160 22:57:52.282458 Loading: *########################## UDP wrong checksum 000000ff 0000599b
1161 22:57:52.322835 UDP wrong checksum 000000ff 0000f08d
1162 22:57:54.712127 T ####################### UDP wrong checksum 00000005 0000c15a
1163 22:57:59.714423 T UDP wrong checksum 00000005 0000c15a
1164 22:58:09.716768 T T UDP wrong checksum 00000005 0000c15a
1165 22:58:15.397668 T UDP wrong checksum 000000ff 0000769b
1166 22:58:15.555695 UDP wrong checksum 000000ff 0000028e
1167 22:58:15.564397 UDP wrong checksum 000000ff 0000680d
1168 22:58:15.571590 UDP wrong checksum 000000ff 0000fdff
1169 22:58:29.720811 T T T UDP wrong checksum 00000005 0000c15a
1170 22:58:40.638877 T T UDP wrong checksum 000000ff 000074f7
1171 22:58:40.700663 UDP wrong checksum 000000ff 000010ea
1172 22:58:43.429327 UDP wrong checksum 000000ff 00008551
1173 22:58:43.437277 UDP wrong checksum 000000ff 00001244
1174 22:58:44.725116
1175 22:58:44.725788 Retry count exceeded; starting again
1177 22:58:44.727314 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1180 22:58:44.729403 end: 2.4 uboot-commands (duration 00:01:52) [common]
1182 22:58:44.730908 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1184 22:58:44.732071 end: 2 uboot-action (duration 00:01:52) [common]
1186 22:58:44.733773 Cleaning after the job
1187 22:58:44.734385 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/ramdisk
1188 22:58:44.735816 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/kernel
1189 22:58:44.784156 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/dtb
1190 22:58:44.785086 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/nfsrootfs
1191 22:58:44.831195 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963288/tftp-deploy-pkmdqxgp/modules
1192 22:58:44.851782 start: 4.1 power-off (timeout 00:00:30) [common]
1193 22:58:44.852484 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1194 22:58:44.887994 >> OK - accepted request
1195 22:58:44.889951 Returned 0 in 0 seconds
1196 22:58:44.990678 end: 4.1 power-off (duration 00:00:00) [common]
1198 22:58:44.991631 start: 4.2 read-feedback (timeout 00:10:00) [common]
1199 22:58:44.992326 Listened to connection for namespace 'common' for up to 1s
1200 22:58:45.992712 Finalising connection for namespace 'common'
1201 22:58:45.993474 Disconnecting from shell: Finalise
1202 22:58:45.994038 =>
1203 22:58:46.095202 end: 4.2 read-feedback (duration 00:00:01) [common]
1204 22:58:46.095919 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/963288
1205 22:58:48.649100 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/963288
1206 22:58:48.649784 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.