Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:23:48.588670 lava-dispatcher, installed at version: 2024.01
2 23:23:48.589481 start: 0 validate
3 23:23:48.589942 Start time: 2024-11-08 23:23:48.589914+00:00 (UTC)
4 23:23:48.590471 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:23:48.591027 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:23:48.631462 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:23:48.632083 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-256-gc291c9cfd76a8%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 23:23:48.663871 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:23:48.664567 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-256-gc291c9cfd76a8%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 23:23:48.692336 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:23:48.692801 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:23:48.724942 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:23:48.725399 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-256-gc291c9cfd76a8%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 23:23:48.764540 validate duration: 0.17
16 23:23:48.765432 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:23:48.765783 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:23:48.766094 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:23:48.766720 Not decompressing ramdisk as can be used compressed.
20 23:23:48.767204 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 23:23:48.767489 saving as /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/ramdisk/initrd.cpio.gz
22 23:23:48.767775 total size: 5628140 (5 MB)
23 23:23:48.805582 progress 0 % (0 MB)
24 23:23:48.809953 progress 5 % (0 MB)
25 23:23:48.814103 progress 10 % (0 MB)
26 23:23:48.817724 progress 15 % (0 MB)
27 23:23:48.821717 progress 20 % (1 MB)
28 23:23:48.825320 progress 25 % (1 MB)
29 23:23:48.830773 progress 30 % (1 MB)
30 23:23:48.835075 progress 35 % (1 MB)
31 23:23:48.838652 progress 40 % (2 MB)
32 23:23:48.842636 progress 45 % (2 MB)
33 23:23:48.846240 progress 50 % (2 MB)
34 23:23:48.850203 progress 55 % (2 MB)
35 23:23:48.854165 progress 60 % (3 MB)
36 23:23:48.857829 progress 65 % (3 MB)
37 23:23:48.861790 progress 70 % (3 MB)
38 23:23:48.865369 progress 75 % (4 MB)
39 23:23:48.869319 progress 80 % (4 MB)
40 23:23:48.872892 progress 85 % (4 MB)
41 23:23:48.876719 progress 90 % (4 MB)
42 23:23:48.880370 progress 95 % (5 MB)
43 23:23:48.883759 progress 100 % (5 MB)
44 23:23:48.884514 5 MB downloaded in 0.12 s (45.99 MB/s)
45 23:23:48.885163 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:23:48.886336 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:23:48.886679 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:23:48.886989 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:23:48.887497 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-256-gc291c9cfd76a8/arm64/defconfig/gcc-12/kernel/Image
51 23:23:48.887779 saving as /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/kernel/Image
52 23:23:48.888036 total size: 45713920 (43 MB)
53 23:23:48.888278 No compression specified
54 23:23:48.926892 progress 0 % (0 MB)
55 23:23:48.955754 progress 5 % (2 MB)
56 23:23:48.984898 progress 10 % (4 MB)
57 23:23:49.013744 progress 15 % (6 MB)
58 23:23:49.043102 progress 20 % (8 MB)
59 23:23:49.071798 progress 25 % (10 MB)
60 23:23:49.100580 progress 30 % (13 MB)
61 23:23:49.129259 progress 35 % (15 MB)
62 23:23:49.158153 progress 40 % (17 MB)
63 23:23:49.186628 progress 45 % (19 MB)
64 23:23:49.215609 progress 50 % (21 MB)
65 23:23:49.244567 progress 55 % (24 MB)
66 23:23:49.273499 progress 60 % (26 MB)
67 23:23:49.302552 progress 65 % (28 MB)
68 23:23:49.331875 progress 70 % (30 MB)
69 23:23:49.360988 progress 75 % (32 MB)
70 23:23:49.390988 progress 80 % (34 MB)
71 23:23:49.420624 progress 85 % (37 MB)
72 23:23:49.449863 progress 90 % (39 MB)
73 23:23:49.478847 progress 95 % (41 MB)
74 23:23:49.508333 progress 100 % (43 MB)
75 23:23:49.508887 43 MB downloaded in 0.62 s (70.22 MB/s)
76 23:23:49.509426 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:23:49.510341 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:23:49.510663 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:23:49.510968 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:23:49.511541 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-256-gc291c9cfd76a8/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 23:23:49.511862 saving as /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 23:23:49.512128 total size: 53209 (0 MB)
84 23:23:49.512366 No compression specified
85 23:23:49.563151 progress 61 % (0 MB)
86 23:23:49.564113 progress 100 % (0 MB)
87 23:23:49.564750 0 MB downloaded in 0.05 s (0.96 MB/s)
88 23:23:49.565321 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:23:49.566259 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:23:49.566565 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:23:49.566868 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:23:49.567356 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 23:23:49.567630 saving as /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/nfsrootfs/full.rootfs.tar
95 23:23:49.567849 total size: 474398908 (452 MB)
96 23:23:49.568113 Using unxz to decompress xz
97 23:23:49.610327 progress 0 % (0 MB)
98 23:23:50.715591 progress 5 % (22 MB)
99 23:23:52.178498 progress 10 % (45 MB)
100 23:23:52.633438 progress 15 % (67 MB)
101 23:23:53.425664 progress 20 % (90 MB)
102 23:23:53.975263 progress 25 % (113 MB)
103 23:23:54.339284 progress 30 % (135 MB)
104 23:23:54.972948 progress 35 % (158 MB)
105 23:23:55.882130 progress 40 % (181 MB)
106 23:23:56.798942 progress 45 % (203 MB)
107 23:23:57.394811 progress 50 % (226 MB)
108 23:23:58.033745 progress 55 % (248 MB)
109 23:23:59.224082 progress 60 % (271 MB)
110 23:24:00.643450 progress 65 % (294 MB)
111 23:24:02.277953 progress 70 % (316 MB)
112 23:24:05.424596 progress 75 % (339 MB)
113 23:24:07.880809 progress 80 % (361 MB)
114 23:24:10.818579 progress 85 % (384 MB)
115 23:24:14.006376 progress 90 % (407 MB)
116 23:24:17.198344 progress 95 % (429 MB)
117 23:24:20.397335 progress 100 % (452 MB)
118 23:24:20.411340 452 MB downloaded in 30.84 s (14.67 MB/s)
119 23:24:20.412410 end: 1.4.1 http-download (duration 00:00:31) [common]
121 23:24:20.414215 end: 1.4 download-retry (duration 00:00:31) [common]
122 23:24:20.414817 start: 1.5 download-retry (timeout 00:09:28) [common]
123 23:24:20.415393 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 23:24:20.416370 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-256-gc291c9cfd76a8/arm64/defconfig/gcc-12/modules.tar.xz
125 23:24:20.416928 saving as /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/modules/modules.tar
126 23:24:20.417380 total size: 11613560 (11 MB)
127 23:24:20.417836 Using unxz to decompress xz
128 23:24:20.465401 progress 0 % (0 MB)
129 23:24:20.533027 progress 5 % (0 MB)
130 23:24:20.609732 progress 10 % (1 MB)
131 23:24:20.709506 progress 15 % (1 MB)
132 23:24:20.802707 progress 20 % (2 MB)
133 23:24:20.882354 progress 25 % (2 MB)
134 23:24:20.958364 progress 30 % (3 MB)
135 23:24:21.038411 progress 35 % (3 MB)
136 23:24:21.113752 progress 40 % (4 MB)
137 23:24:21.190115 progress 45 % (5 MB)
138 23:24:21.275481 progress 50 % (5 MB)
139 23:24:21.353523 progress 55 % (6 MB)
140 23:24:21.439580 progress 60 % (6 MB)
141 23:24:21.520776 progress 65 % (7 MB)
142 23:24:21.602518 progress 70 % (7 MB)
143 23:24:21.682032 progress 75 % (8 MB)
144 23:24:21.766590 progress 80 % (8 MB)
145 23:24:21.847738 progress 85 % (9 MB)
146 23:24:21.927072 progress 90 % (9 MB)
147 23:24:22.006284 progress 95 % (10 MB)
148 23:24:22.084408 progress 100 % (11 MB)
149 23:24:22.097453 11 MB downloaded in 1.68 s (6.59 MB/s)
150 23:24:22.098061 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:24:22.098906 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:24:22.099177 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 23:24:22.099443 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 23:24:38.708024 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/963308/extract-nfsrootfs-kevefp_6
156 23:24:38.708624 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 23:24:38.708911 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 23:24:38.709616 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3
159 23:24:38.710063 makedir: /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin
160 23:24:38.710385 makedir: /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/tests
161 23:24:38.710692 makedir: /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/results
162 23:24:38.711016 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-add-keys
163 23:24:38.711561 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-add-sources
164 23:24:38.712126 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-background-process-start
165 23:24:38.712630 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-background-process-stop
166 23:24:38.713158 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-common-functions
167 23:24:38.713839 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-echo-ipv4
168 23:24:38.714356 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-install-packages
169 23:24:38.714844 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-installed-packages
170 23:24:38.715317 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-os-build
171 23:24:38.715802 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-probe-channel
172 23:24:38.716329 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-probe-ip
173 23:24:38.716805 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-target-ip
174 23:24:38.717271 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-target-mac
175 23:24:38.717735 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-target-storage
176 23:24:38.718211 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-test-case
177 23:24:38.718681 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-test-event
178 23:24:38.719142 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-test-feedback
179 23:24:38.719605 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-test-raise
180 23:24:38.720102 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-test-reference
181 23:24:38.720591 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-test-runner
182 23:24:38.721067 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-test-set
183 23:24:38.721532 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-test-shell
184 23:24:38.722005 Updating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-install-packages (oe)
185 23:24:38.722522 Updating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/bin/lava-installed-packages (oe)
186 23:24:38.722950 Creating /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/environment
187 23:24:38.723307 LAVA metadata
188 23:24:38.723680 - LAVA_JOB_ID=963308
189 23:24:38.723930 - LAVA_DISPATCHER_IP=192.168.6.2
190 23:24:38.724346 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 23:24:38.725352 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 23:24:38.725660 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 23:24:38.725869 skipped lava-vland-overlay
194 23:24:38.726109 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 23:24:38.726362 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 23:24:38.726577 skipped lava-multinode-overlay
197 23:24:38.726816 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 23:24:38.727064 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 23:24:38.727307 Loading test definitions
200 23:24:38.727582 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 23:24:38.727802 Using /lava-963308 at stage 0
202 23:24:38.729033 uuid=963308_1.6.2.4.1 testdef=None
203 23:24:38.729342 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 23:24:38.729604 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 23:24:38.731292 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 23:24:38.732096 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 23:24:38.734346 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 23:24:38.735172 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 23:24:38.737209 runner path: /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 963308_1.6.2.4.1
212 23:24:38.737762 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 23:24:38.738514 Creating lava-test-runner.conf files
215 23:24:38.738713 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/963308/lava-overlay-_xru_bd3/lava-963308/0 for stage 0
216 23:24:38.739037 - 0_v4l2-decoder-conformance-h264
217 23:24:38.739370 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 23:24:38.739638 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 23:24:38.760848 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 23:24:38.761218 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 23:24:38.761475 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 23:24:38.761738 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 23:24:38.761996 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 23:24:39.384431 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 23:24:39.384899 start: 1.6.4 extract-modules (timeout 00:09:09) [common]
226 23:24:39.385166 extracting modules file /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/modules/modules.tar to /var/lib/lava/dispatcher/tmp/963308/extract-nfsrootfs-kevefp_6
227 23:24:40.741710 extracting modules file /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/modules/modules.tar to /var/lib/lava/dispatcher/tmp/963308/extract-overlay-ramdisk-jljqenl3/ramdisk
228 23:24:42.131528 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 23:24:42.132010 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 23:24:42.132305 [common] Applying overlay to NFS
231 23:24:42.132531 [common] Applying overlay /var/lib/lava/dispatcher/tmp/963308/compress-overlay-3jfrg9oy/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/963308/extract-nfsrootfs-kevefp_6
232 23:24:42.161425 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 23:24:42.161816 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 23:24:42.162103 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 23:24:42.162338 Converting downloaded kernel to a uImage
236 23:24:42.162655 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/kernel/Image /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/kernel/uImage
237 23:24:42.622040 output: Image Name:
238 23:24:42.622428 output: Created: Fri Nov 8 23:24:42 2024
239 23:24:42.622658 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 23:24:42.622874 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 23:24:42.623084 output: Load Address: 01080000
242 23:24:42.623288 output: Entry Point: 01080000
243 23:24:42.623490 output:
244 23:24:42.623829 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 23:24:42.624146 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 23:24:42.624432 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 23:24:42.624696 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 23:24:42.624962 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 23:24:42.625223 Building ramdisk /var/lib/lava/dispatcher/tmp/963308/extract-overlay-ramdisk-jljqenl3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/963308/extract-overlay-ramdisk-jljqenl3/ramdisk
250 23:24:45.142426 >> 166827 blocks
251 23:24:52.966721 Adding RAMdisk u-boot header.
252 23:24:52.967354 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/963308/extract-overlay-ramdisk-jljqenl3/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/963308/extract-overlay-ramdisk-jljqenl3/ramdisk.cpio.gz.uboot
253 23:24:53.214459 output: Image Name:
254 23:24:53.214859 output: Created: Fri Nov 8 23:24:52 2024
255 23:24:53.215326 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 23:24:53.215785 output: Data Size: 23435887 Bytes = 22886.61 KiB = 22.35 MiB
257 23:24:53.216308 output: Load Address: 00000000
258 23:24:53.216761 output: Entry Point: 00000000
259 23:24:53.217208 output:
260 23:24:53.218205 rename /var/lib/lava/dispatcher/tmp/963308/extract-overlay-ramdisk-jljqenl3/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/ramdisk/ramdisk.cpio.gz.uboot
261 23:24:53.218987 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 23:24:53.219602 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 23:24:53.220282 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 23:24:53.220804 No LXC device requested
265 23:24:53.221373 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 23:24:53.221945 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 23:24:53.222502 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 23:24:53.222965 Checking files for TFTP limit of 4294967296 bytes.
269 23:24:53.225942 end: 1 tftp-deploy (duration 00:01:04) [common]
270 23:24:53.226578 start: 2 uboot-action (timeout 00:05:00) [common]
271 23:24:53.227168 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 23:24:53.227723 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 23:24:53.228337 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 23:24:53.228925 Using kernel file from prepare-kernel: 963308/tftp-deploy-iaottsed/kernel/uImage
275 23:24:53.229626 substitutions:
276 23:24:53.230079 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 23:24:53.230527 - {DTB_ADDR}: 0x01070000
278 23:24:53.230971 - {DTB}: 963308/tftp-deploy-iaottsed/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 23:24:53.231416 - {INITRD}: 963308/tftp-deploy-iaottsed/ramdisk/ramdisk.cpio.gz.uboot
280 23:24:53.231858 - {KERNEL_ADDR}: 0x01080000
281 23:24:53.232332 - {KERNEL}: 963308/tftp-deploy-iaottsed/kernel/uImage
282 23:24:53.232776 - {LAVA_MAC}: None
283 23:24:53.233253 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/963308/extract-nfsrootfs-kevefp_6
284 23:24:53.233700 - {NFS_SERVER_IP}: 192.168.6.2
285 23:24:53.234134 - {PRESEED_CONFIG}: None
286 23:24:53.234567 - {PRESEED_LOCAL}: None
287 23:24:53.234998 - {RAMDISK_ADDR}: 0x08000000
288 23:24:53.235428 - {RAMDISK}: 963308/tftp-deploy-iaottsed/ramdisk/ramdisk.cpio.gz.uboot
289 23:24:53.235858 - {ROOT_PART}: None
290 23:24:53.236321 - {ROOT}: None
291 23:24:53.236753 - {SERVER_IP}: 192.168.6.2
292 23:24:53.237184 - {TEE_ADDR}: 0x83000000
293 23:24:53.237616 - {TEE}: None
294 23:24:53.238045 Parsed boot commands:
295 23:24:53.238469 - setenv autoload no
296 23:24:53.238900 - setenv initrd_high 0xffffffff
297 23:24:53.239330 - setenv fdt_high 0xffffffff
298 23:24:53.239759 - dhcp
299 23:24:53.240220 - setenv serverip 192.168.6.2
300 23:24:53.240654 - tftpboot 0x01080000 963308/tftp-deploy-iaottsed/kernel/uImage
301 23:24:53.241088 - tftpboot 0x08000000 963308/tftp-deploy-iaottsed/ramdisk/ramdisk.cpio.gz.uboot
302 23:24:53.241518 - tftpboot 0x01070000 963308/tftp-deploy-iaottsed/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 23:24:53.241949 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/963308/extract-nfsrootfs-kevefp_6,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 23:24:53.242395 - bootm 0x01080000 0x08000000 0x01070000
305 23:24:53.242953 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 23:24:53.244666 start: 2.3 connect-device (timeout 00:05:00) [common]
308 23:24:53.245140 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 23:24:53.262277 Setting prompt string to ['lava-test: # ']
310 23:24:53.263907 end: 2.3 connect-device (duration 00:00:00) [common]
311 23:24:53.264647 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 23:24:53.266021 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 23:24:53.266758 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 23:24:53.268035 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 23:24:53.302673 >> OK - accepted request
316 23:24:53.304717 Returned 0 in 0 seconds
317 23:24:53.405960 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 23:24:53.407708 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 23:24:53.408382 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 23:24:53.408935 Setting prompt string to ['Hit any key to stop autoboot']
322 23:24:53.409415 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 23:24:53.411045 Trying 192.168.56.21...
324 23:24:53.411549 Connected to conserv1.
325 23:24:53.412016 Escape character is '^]'.
326 23:24:53.412462
327 23:24:53.412898 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 23:24:53.413330
329 23:25:01.327626 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 23:25:01.328099 bl2_stage_init 0x01
331 23:25:01.328343 bl2_stage_init 0x81
332 23:25:01.333075 hw id: 0x0000 - pwm id 0x01
333 23:25:01.333388 bl2_stage_init 0xc1
334 23:25:01.337305 bl2_stage_init 0x02
335 23:25:01.337604
336 23:25:01.337840 L0:00000000
337 23:25:01.338091 L1:00000703
338 23:25:01.338333 L2:00008067
339 23:25:01.342965 L3:15000000
340 23:25:01.343273 S1:00000000
341 23:25:01.343531 B2:20282000
342 23:25:01.343771 B1:a0f83180
343 23:25:01.344027
344 23:25:01.344259 TE: 72156
345 23:25:01.348544
346 23:25:01.354209 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 23:25:01.354520
348 23:25:01.354747 Board ID = 1
349 23:25:01.354972 Set cpu clk to 24M
350 23:25:01.355190 Set clk81 to 24M
351 23:25:01.359666 Use GP1_pll as DSU clk.
352 23:25:01.359960 DSU clk: 1200 Mhz
353 23:25:01.360203 CPU clk: 1200 MHz
354 23:25:01.365297 Set clk81 to 166.6M
355 23:25:01.370983 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 23:25:01.371304 board id: 1
357 23:25:01.379457 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 23:25:01.390432 fw parse done
359 23:25:01.396451 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 23:25:01.439395 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 23:25:01.450671 PIEI prepare done
362 23:25:01.451060 fastboot data load
363 23:25:01.451303 fastboot data verify
364 23:25:01.456184 verify result: 266
365 23:25:01.461728 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 23:25:01.462228 LPDDR4 probe
367 23:25:01.462603 ddr clk to 1584MHz
368 23:25:01.469738 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 23:25:01.507644
370 23:25:01.508119 dmc_version 0001
371 23:25:01.514535 Check phy result
372 23:25:01.520541 INFO : End of CA training
373 23:25:01.521032 INFO : End of initialization
374 23:25:01.526068 INFO : Training has run successfully!
375 23:25:01.526439 Check phy result
376 23:25:01.531664 INFO : End of initialization
377 23:25:01.532217 INFO : End of read enable training
378 23:25:01.534960 INFO : End of fine write leveling
379 23:25:01.540617 INFO : End of Write leveling coarse delay
380 23:25:01.546176 INFO : Training has run successfully!
381 23:25:01.546539 Check phy result
382 23:25:01.546774 INFO : End of initialization
383 23:25:01.551730 INFO : End of read dq deskew training
384 23:25:01.557391 INFO : End of MPR read delay center optimization
385 23:25:01.557902 INFO : End of write delay center optimization
386 23:25:01.562985 INFO : End of read delay center optimization
387 23:25:01.568588 INFO : End of max read latency training
388 23:25:01.568998 INFO : Training has run successfully!
389 23:25:01.574146 1D training succeed
390 23:25:01.580159 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 23:25:01.628521 Check phy result
392 23:25:01.628950 INFO : End of initialization
393 23:25:01.655854 INFO : End of 2D read delay Voltage center optimization
394 23:25:01.680034 INFO : End of 2D read delay Voltage center optimization
395 23:25:01.736789 INFO : End of 2D write delay Voltage center optimization
396 23:25:01.790839 INFO : End of 2D write delay Voltage center optimization
397 23:25:01.796287 INFO : Training has run successfully!
398 23:25:01.796726
399 23:25:01.797133 channel==0
400 23:25:01.801783 RxClkDly_Margin_A0==78 ps 8
401 23:25:01.802231 TxDqDly_Margin_A0==98 ps 10
402 23:25:01.807407 RxClkDly_Margin_A1==69 ps 7
403 23:25:01.807836 TxDqDly_Margin_A1==88 ps 9
404 23:25:01.808290 TrainedVREFDQ_A0==74
405 23:25:01.813037 TrainedVREFDQ_A1==74
406 23:25:01.813469 VrefDac_Margin_A0==24
407 23:25:01.813866 DeviceVref_Margin_A0==40
408 23:25:01.818719 VrefDac_Margin_A1==23
409 23:25:01.819146 DeviceVref_Margin_A1==40
410 23:25:01.819538
411 23:25:01.819928
412 23:25:01.820359 channel==1
413 23:25:01.824236 RxClkDly_Margin_A0==88 ps 9
414 23:25:01.824715 TxDqDly_Margin_A0==98 ps 10
415 23:25:01.829920 RxClkDly_Margin_A1==88 ps 9
416 23:25:01.830360 TxDqDly_Margin_A1==88 ps 9
417 23:25:01.835451 TrainedVREFDQ_A0==78
418 23:25:01.835885 TrainedVREFDQ_A1==78
419 23:25:01.836320 VrefDac_Margin_A0==22
420 23:25:01.841078 DeviceVref_Margin_A0==36
421 23:25:01.841514 VrefDac_Margin_A1==22
422 23:25:01.846774 DeviceVref_Margin_A1==36
423 23:25:01.847220
424 23:25:01.847619 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 23:25:01.848037
426 23:25:01.880170 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 23:25:01.880758 2D training succeed
428 23:25:01.885744 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 23:25:01.891316 auto size-- 65535DDR cs0 size: 2048MB
430 23:25:01.891745 DDR cs1 size: 2048MB
431 23:25:01.896905 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 23:25:01.897329 cs0 DataBus test pass
433 23:25:01.902550 cs1 DataBus test pass
434 23:25:01.902972 cs0 AddrBus test pass
435 23:25:01.903364 cs1 AddrBus test pass
436 23:25:01.903751
437 23:25:01.908167 100bdlr_step_size ps== 478
438 23:25:01.908602 result report
439 23:25:01.913724 boot times 0Enable ddr reg access
440 23:25:01.918887 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 23:25:01.932770 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 23:25:02.592145 bl2z: ptr: 05129330, size: 00001e40
443 23:25:02.600696 0.0;M3 CHK:0;cm4_sp_mode 0
444 23:25:02.601158 MVN_1=0x00000000
445 23:25:02.601575 MVN_2=0x00000000
446 23:25:02.612206 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 23:25:02.612651 OPS=0x04
448 23:25:02.613064 ring efuse init
449 23:25:02.617813 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 23:25:02.618255 [0.017354 Inits done]
451 23:25:02.618659 secure task start!
452 23:25:02.625330 high task start!
453 23:25:02.625766 low task start!
454 23:25:02.626177 run into bl31
455 23:25:02.633972 NOTICE: BL31: v1.3(release):4fc40b1
456 23:25:02.641767 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 23:25:02.642226 NOTICE: BL31: G12A normal boot!
458 23:25:02.657289 NOTICE: BL31: BL33 decompress pass
459 23:25:02.663442 ERROR: Error initializing runtime service opteed_fast
460 23:25:03.876847 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 23:25:03.877467 bl2_stage_init 0x01
462 23:25:03.877898 bl2_stage_init 0x81
463 23:25:03.882319 hw id: 0x0000 - pwm id 0x01
464 23:25:03.882786 bl2_stage_init 0xc1
465 23:25:03.887918 bl2_stage_init 0x02
466 23:25:03.888482
467 23:25:03.888881 L0:00000000
468 23:25:03.889267 L1:00000703
469 23:25:03.889655 L2:00008067
470 23:25:03.890040 L3:15000000
471 23:25:03.893522 S1:00000000
472 23:25:03.893940 B2:20282000
473 23:25:03.894329 B1:a0f83180
474 23:25:03.894711
475 23:25:03.895096 TE: 71764
476 23:25:03.895480
477 23:25:03.899075 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 23:25:03.899493
479 23:25:03.904751 Board ID = 1
480 23:25:03.905160 Set cpu clk to 24M
481 23:25:03.905546 Set clk81 to 24M
482 23:25:03.910294 Use GP1_pll as DSU clk.
483 23:25:03.910710 DSU clk: 1200 Mhz
484 23:25:03.911098 CPU clk: 1200 MHz
485 23:25:03.915881 Set clk81 to 166.6M
486 23:25:03.921516 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 23:25:03.921934 board id: 1
488 23:25:03.928672 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 23:25:03.939607 fw parse done
490 23:25:03.945571 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 23:25:03.988695 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 23:25:03.999882 PIEI prepare done
493 23:25:04.000343 fastboot data load
494 23:25:04.000740 fastboot data verify
495 23:25:04.005448 verify result: 266
496 23:25:04.012949 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 23:25:04.013383 LPDDR4 probe
498 23:25:04.013772 ddr clk to 1584MHz
499 23:25:05.375045 Load ddrfw SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 23:25:05.375662 bl2_stage_init 0x01
501 23:25:05.376125 bl2_stage_init 0x81
502 23:25:05.380502 hw id: 0x0000 - pwm id 0x01
503 23:25:05.380953 bl2_stage_init 0xc1
504 23:25:05.386107 bl2_stage_init 0x02
505 23:25:05.386550
506 23:25:05.386963 L0:00000000
507 23:25:05.387365 L1:00000703
508 23:25:05.387761 L2:00008067
509 23:25:05.388208 L3:15000000
510 23:25:05.391686 S1:00000000
511 23:25:05.392149 B2:20282000
512 23:25:05.392560 B1:a0f83180
513 23:25:05.392959
514 23:25:05.393356 TE: 71027
515 23:25:05.393754
516 23:25:05.397299 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 23:25:05.397738
518 23:25:05.402992 Board ID = 1
519 23:25:05.403429 Set cpu clk to 24M
520 23:25:05.403834 Set clk81 to 24M
521 23:25:05.409948 Use GP1_pll as DSU clk.
522 23:25:05.410389 DSU clk: 1200 Mhz
523 23:25:05.410798 CPU clk: 1200 MHz
524 23:25:05.414166 Set clk81 to 166.6M
525 23:25:05.419714 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 23:25:05.420180 board id: 1
527 23:25:05.426873 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 23:25:05.437824 fw parse done
529 23:25:05.443773 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 23:25:05.487021 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 23:25:05.498076 PIEI prepare done
532 23:25:05.498554 fastboot data load
533 23:25:05.498971 fastboot data verify
534 23:25:05.503659 verify result: 266
535 23:25:05.509232 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 23:25:05.509684 LPDDR4 probe
537 23:25:05.510088 ddr clk to 1584MHz
538 23:25:05.517214 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 23:25:05.554996
540 23:25:05.555517 dmc_version 0001
541 23:25:05.562139 Check phy result
542 23:25:05.568116 INFO : End of CA training
543 23:25:05.568560 INFO : End of initialization
544 23:25:05.573596 INFO : Training has run successfully!
545 23:25:05.574027 Check phy result
546 23:25:05.579162 INFO : End of initialization
547 23:25:05.579597 INFO : End of read enable training
548 23:25:05.584758 INFO : End of fine write leveling
549 23:25:05.590414 INFO : End of Write leveling coarse delay
550 23:25:05.590867 INFO : Training has run successfully!
551 23:25:05.591275 Check phy result
552 23:25:05.596052 INFO : End of initialization
553 23:25:05.596486 INFO : End of read dq deskew training
554 23:25:05.601584 INFO : End of MPR read delay center optimization
555 23:25:05.607247 INFO : End of write delay center optimization
556 23:25:05.612800 INFO : End of read delay center optimization
557 23:25:05.613236 INFO : End of max read latency training
558 23:25:05.618380 INFO : Training has run successfully!
559 23:25:05.618807 1D training succeed
560 23:25:05.627581 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 23:25:05.676014 Check phy result
562 23:25:05.676552 INFO : End of initialization
563 23:25:05.703296 INFO : End of 2D read delay Voltage center optimization
564 23:25:05.727488 INFO : End of 2D read delay Voltage center optimization
565 23:25:05.784255 INFO : End of 2D write delay Voltage center optimization
566 23:25:05.838148 INFO : End of 2D write delay Voltage center optimization
567 23:25:05.843722 INFO : Training has run successfully!
568 23:25:05.844217
569 23:25:05.844634 channel==0
570 23:25:05.849281 RxClkDly_Margin_A0==78 ps 8
571 23:25:05.849717 TxDqDly_Margin_A0==98 ps 10
572 23:25:05.854860 RxClkDly_Margin_A1==88 ps 9
573 23:25:05.855299 TxDqDly_Margin_A1==88 ps 9
574 23:25:05.855711 TrainedVREFDQ_A0==74
575 23:25:05.860455 TrainedVREFDQ_A1==74
576 23:25:05.860887 VrefDac_Margin_A0==24
577 23:25:05.861289 DeviceVref_Margin_A0==40
578 23:25:05.866069 VrefDac_Margin_A1==23
579 23:25:05.866495 DeviceVref_Margin_A1==40
580 23:25:05.866898
581 23:25:05.867297
582 23:25:05.867692 channel==1
583 23:25:05.871653 RxClkDly_Margin_A0==78 ps 8
584 23:25:05.872119 TxDqDly_Margin_A0==98 ps 10
585 23:25:05.877246 RxClkDly_Margin_A1==78 ps 8
586 23:25:05.877683 TxDqDly_Margin_A1==88 ps 9
587 23:25:05.882864 TrainedVREFDQ_A0==78
588 23:25:05.883310 TrainedVREFDQ_A1==75
589 23:25:05.883719 VrefDac_Margin_A0==22
590 23:25:05.888493 DeviceVref_Margin_A0==36
591 23:25:05.888970 VrefDac_Margin_A1==22
592 23:25:05.894088 DeviceVref_Margin_A1==39
593 23:25:05.894547
594 23:25:05.894959 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 23:25:05.895366
596 23:25:05.927691 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
597 23:25:05.928296 2D training succeed
598 23:25:05.933293 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 23:25:05.938889 auto size-- 65535DDR cs0 size: 2048MB
600 23:25:05.939369 DDR cs1 size: 2048MB
601 23:25:05.944462 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 23:25:05.944911 cs0 DataBus test pass
603 23:25:05.950064 cs1 DataBus test pass
604 23:25:05.950507 cs0 AddrBus test pass
605 23:25:05.950946 cs1 AddrBus test pass
606 23:25:05.951391
607 23:25:05.955670 100bdlr_step_size ps== 471
608 23:25:05.956201 result report
609 23:25:05.961269 boot times 0Enable ddr reg access
610 23:25:05.966434 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 23:25:05.979379 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 23:25:06.640388 bl2z: ptr: 05129330, size: 00001e40
613 23:25:06.648348 0.0;M3 CHK:0;cm4_sp_mode 0
614 23:25:06.648835 MVN_1=0x00000000
615 23:25:06.649255 MVN_2=0x00000000
616 23:25:06.659870 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 23:25:06.660377 OPS=0x04
618 23:25:06.660796 ring efuse init
619 23:25:06.665469 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 23:25:06.665926 [0.017354 Inits done]
621 23:25:06.666339 secure task start!
622 23:25:06.673526 high task start!
623 23:25:06.673999 low task start!
624 23:25:06.674427 run into bl31
625 23:25:06.682151 NOTICE: BL31: v1.3(release):4fc40b1
626 23:25:06.689940 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 23:25:06.690386 NOTICE: BL31: G12A normal boot!
628 23:25:06.705457 NOTICE: BL31: BL33 decompress pass
629 23:25:06.713829 ERROR: Error initializing runtime service opteed_fast
630 23:25:07.927204 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 23:25:07.927784 bl2_stage_init 0x01
632 23:25:07.928257 bl2_stage_init 0x81
633 23:25:07.932729 hw id: 0x0000 - pwm id 0x01
634 23:25:07.933174 bl2_stage_init 0xc1
635 23:25:07.938451 bl2_stage_init 0x02
636 23:25:07.938896
637 23:25:07.939315 L0:00000000
638 23:25:07.939721 L1:00000703
639 23:25:07.940155 L2:00008067
640 23:25:07.940559 L3:15000000
641 23:25:07.943918 S1:00000000
642 23:25:07.944383 B2:20282000
643 23:25:07.944786 B1:a0f83180
644 23:25:07.945187
645 23:25:07.945584 TE: 71466
646 23:25:07.945982
647 23:25:07.950177 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 23:25:07.950655
649 23:25:07.955207 Board ID = 1
650 23:25:07.955669 Set cpu clk to 24M
651 23:25:07.956115 Set clk81 to 24M
652 23:25:07.960756 Use GP1_pll as DSU clk.
653 23:25:07.961206 DSU clk: 1200 Mhz
654 23:25:07.961619 CPU clk: 1200 MHz
655 23:25:07.966455 Set clk81 to 166.6M
656 23:25:07.971890 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 23:25:07.972364 board id: 1
658 23:25:07.979043 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 23:25:07.990024 fw parse done
660 23:25:07.995963 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 23:25:08.039103 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 23:25:08.050308 PIEI prepare done
663 23:25:08.050763 fastboot data load
664 23:25:08.051176 fastboot data verify
665 23:25:08.055815 verify result: 266
666 23:25:08.061507 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 23:25:08.061998 LPDDR4 probe
668 23:25:08.062412 ddr clk to 1584MHz
669 23:25:08.069482 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 23:25:08.107274
671 23:25:08.107835 dmc_version 0001
672 23:25:08.114218 Check phy result
673 23:25:08.120284 INFO : End of CA training
674 23:25:08.120797 INFO : End of initialization
675 23:25:08.125825 INFO : Training has run successfully!
676 23:25:08.126295 Check phy result
677 23:25:08.131547 INFO : End of initialization
678 23:25:08.132036 INFO : End of read enable training
679 23:25:08.134714 INFO : End of fine write leveling
680 23:25:08.140270 INFO : End of Write leveling coarse delay
681 23:25:08.145898 INFO : Training has run successfully!
682 23:25:08.146202 Check phy result
683 23:25:08.146435 INFO : End of initialization
684 23:25:08.151500 INFO : End of read dq deskew training
685 23:25:08.157041 INFO : End of MPR read delay center optimization
686 23:25:08.157365 INFO : End of write delay center optimization
687 23:25:08.162677 INFO : End of read delay center optimization
688 23:25:08.168279 INFO : End of max read latency training
689 23:25:08.168750 INFO : Training has run successfully!
690 23:25:08.173841 1D training succeed
691 23:25:08.179747 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 23:25:08.228149 Check phy result
693 23:25:08.228555 INFO : End of initialization
694 23:25:08.255501 INFO : End of 2D read delay Voltage center optimization
695 23:25:08.279678 INFO : End of 2D read delay Voltage center optimization
696 23:25:08.336306 INFO : End of 2D write delay Voltage center optimization
697 23:25:08.390317 INFO : End of 2D write delay Voltage center optimization
698 23:25:08.395745 INFO : Training has run successfully!
699 23:25:08.396090
700 23:25:08.396328 channel==0
701 23:25:08.401508 RxClkDly_Margin_A0==88 ps 9
702 23:25:08.401956 TxDqDly_Margin_A0==98 ps 10
703 23:25:08.407002 RxClkDly_Margin_A1==78 ps 8
704 23:25:08.407437 TxDqDly_Margin_A1==88 ps 9
705 23:25:08.407800 TrainedVREFDQ_A0==75
706 23:25:08.412770 TrainedVREFDQ_A1==75
707 23:25:08.413126 VrefDac_Margin_A0==24
708 23:25:08.413360 DeviceVref_Margin_A0==39
709 23:25:08.418268 VrefDac_Margin_A1==23
710 23:25:08.418751 DeviceVref_Margin_A1==39
711 23:25:08.419131
712 23:25:08.419491
713 23:25:08.419845 channel==1
714 23:25:08.423775 RxClkDly_Margin_A0==78 ps 8
715 23:25:08.424094 TxDqDly_Margin_A0==88 ps 9
716 23:25:08.429430 RxClkDly_Margin_A1==88 ps 9
717 23:25:08.430010 TxDqDly_Margin_A1==88 ps 9
718 23:25:08.435115 TrainedVREFDQ_A0==75
719 23:25:08.435658 TrainedVREFDQ_A1==77
720 23:25:08.436169 VrefDac_Margin_A0==22
721 23:25:08.440788 DeviceVref_Margin_A0==39
722 23:25:08.441330 VrefDac_Margin_A1==22
723 23:25:08.441799 DeviceVref_Margin_A1==37
724 23:25:08.446412
725 23:25:08.446972 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 23:25:08.447444
727 23:25:08.479788 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
728 23:25:08.480435 2D training succeed
729 23:25:08.485397 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 23:25:08.490974 auto size-- 65535DDR cs0 size: 2048MB
731 23:25:08.491538 DDR cs1 size: 2048MB
732 23:25:08.496615 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 23:25:08.497176 cs0 DataBus test pass
734 23:25:08.502240 cs1 DataBus test pass
735 23:25:08.502829 cs0 AddrBus test pass
736 23:25:08.503303 cs1 AddrBus test pass
737 23:25:08.503762
738 23:25:08.507848 100bdlr_step_size ps== 471
739 23:25:08.508478 result report
740 23:25:08.513437 boot times 0Enable ddr reg access
741 23:25:08.518515 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 23:25:08.532394 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 23:25:09.191202 bl2z: ptr: 05129330, size: 00001e40
744 23:25:09.199326 0.0;M3 CHK:0;cm4_sp_mode 0
745 23:25:09.199928 MVN_1=0x00000000
746 23:25:09.200431 MVN_2=0x00000000
747 23:25:09.210796 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 23:25:09.211393 OPS=0x04
749 23:25:09.211843 ring efuse init
750 23:25:09.216381 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 23:25:09.216945 [0.017354 Inits done]
752 23:25:09.217402 secure task start!
753 23:25:09.223865 high task start!
754 23:25:09.224435 low task start!
755 23:25:09.224882 run into bl31
756 23:25:09.232450 NOTICE: BL31: v1.3(release):4fc40b1
757 23:25:09.240242 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 23:25:09.240779 NOTICE: BL31: G12A normal boot!
759 23:25:09.255866 NOTICE: BL31: BL33 decompress pass
760 23:25:09.261569 ERROR: Error initializing runtime service opteed_fast
761 23:25:10.055852
762 23:25:10.056560
763 23:25:10.061199 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 23:25:10.061738
765 23:25:10.063637 Model: Libre Computer AML-S905D3-CC Solitude
766 23:25:10.211487 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 23:25:10.226896 DRAM: 2 GiB (effective 3.8 GiB)
768 23:25:10.327792 Core: 406 devices, 33 uclasses, devicetree: separate
769 23:25:10.333648 WDT: Not starting watchdog@f0d0
770 23:25:10.358769 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 23:25:10.370962 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 23:25:10.374945 ** Bad device specification mmc 0 **
773 23:25:10.386050 Card did not respond to voltage select! : -110
774 23:25:10.393304 ** Bad device specification mmc 0 **
775 23:25:10.393825 Couldn't find partition mmc 0
776 23:25:10.402155 Card did not respond to voltage select! : -110
777 23:25:10.407642 ** Bad device specification mmc 0 **
778 23:25:10.408259 Couldn't find partition mmc 0
779 23:25:10.411798 Error: could not access storage.
780 23:25:10.709210 Net: eth0: ethernet@ff3f0000
781 23:25:10.709882 starting USB...
782 23:25:10.954760 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 23:25:10.955404 Starting the controller
784 23:25:10.961729 USB XHCI 1.10
785 23:25:12.515276 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 23:25:12.523625 scanning usb for storage devices... 0 Storage Device(s) found
788 23:25:12.575301 Hit any key to stop autoboot: 1
789 23:25:12.576206 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 23:25:12.576877 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 23:25:12.577566 Setting prompt string to ['=>']
792 23:25:12.578131 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 23:25:12.589621 0
794 23:25:12.590616 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 23:25:12.691964 => setenv autoload no
797 23:25:12.693026 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 23:25:12.698395 setenv autoload no
800 23:25:12.800055 => setenv initrd_high 0xffffffff
801 23:25:12.800938 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
802 23:25:12.806182 setenv initrd_high 0xffffffff
804 23:25:12.907756 => setenv fdt_high 0xffffffff
805 23:25:12.908843 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
806 23:25:12.913123 setenv fdt_high 0xffffffff
808 23:25:13.014757 => dhcp
809 23:25:13.015822 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
810 23:25:13.019809 dhcp
811 23:25:13.675609 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 23:25:13.676312 Speed: 1000, full duplex
813 23:25:13.676788 BOOTP broadcast 1
814 23:25:13.923882 BOOTP broadcast 2
815 23:25:13.937747 DHCP client bound to address 192.168.6.21 (261 ms)
817 23:25:14.039583 => setenv serverip 192.168.6.2
818 23:25:14.040709 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
819 23:25:14.044714 setenv serverip 192.168.6.2
821 23:25:14.146365 => tftpboot 0x01080000 963308/tftp-deploy-iaottsed/kernel/uImage
822 23:25:14.147449 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
823 23:25:14.154258 tftpboot 0x01080000 963308/tftp-deploy-iaottsed/kernel/uImage
824 23:25:14.154865 Speed: 1000, full duplex
825 23:25:14.155347 Using ethernet@ff3f0000 device
826 23:25:14.159680 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
827 23:25:14.165519 Filename '963308/tftp-deploy-iaottsed/kernel/uImage'.
828 23:25:14.168716 Load address: 0x1080000
829 23:25:16.973271 Loading: *################################################## 43.6 MiB
830 23:25:16.973950 15.5 MiB/s
831 23:25:16.974429 done
832 23:25:16.978083 Bytes transferred = 45713984 (2b98a40 hex)
834 23:25:17.079750 => tftpboot 0x08000000 963308/tftp-deploy-iaottsed/ramdisk/ramdisk.cpio.gz.uboot
835 23:25:17.080600 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
836 23:25:17.087582 tftpboot 0x08000000 963308/tftp-deploy-iaottsed/ramdisk/ramdisk.cpio.gz.uboot
837 23:25:17.088133 Speed: 1000, full duplex
838 23:25:17.088577 Using ethernet@ff3f0000 device
839 23:25:17.093038 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
840 23:25:17.102741 Filename '963308/tftp-deploy-iaottsed/ramdisk/ramdisk.cpio.gz.uboot'.
841 23:25:17.103264 Load address: 0x8000000
842 23:25:17.765448 Loading: *####################### UDP wrong checksum 000000ff 0000f45d
843 23:25:17.806839 # UDP wrong checksum 000000ff 00008450
844 23:25:18.527426 ######################### UDP wrong checksum 00000005 0000ccb9
845 23:25:22.356410 UDP wrong checksum 000000ff 0000edd6
846 23:25:22.410031 UDP wrong checksum 000000ff 000089c9
847 23:25:23.226529 UDP wrong checksum 000000ff 000019f2
848 23:25:23.242501 UDP wrong checksum 000000ff 0000b0e4
849 23:25:23.528747 T UDP wrong checksum 00000005 0000ccb9
850 23:25:33.530883 T T UDP wrong checksum 00000005 0000ccb9
851 23:25:53.535102 T T T T UDP wrong checksum 00000005 0000ccb9
852 23:26:08.660181 T T T UDP wrong checksum 000000ff 00008627
853 23:26:08.709363 UDP wrong checksum 000000ff 0000121a
854 23:26:13.539734
855 23:26:13.540465 Retry count exceeded; starting again
857 23:26:13.541992 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
860 23:26:13.544015 end: 2.4 uboot-commands (duration 00:01:20) [common]
862 23:26:13.545562 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
864 23:26:13.546724 end: 2 uboot-action (duration 00:01:20) [common]
866 23:26:13.548462 Cleaning after the job
867 23:26:13.549084 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/ramdisk
868 23:26:13.550522 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/kernel
869 23:26:13.581292 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/dtb
870 23:26:13.582835 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/nfsrootfs
871 23:26:13.709168 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963308/tftp-deploy-iaottsed/modules
872 23:26:13.732572 start: 4.1 power-off (timeout 00:00:30) [common]
873 23:26:13.733277 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
874 23:26:13.767714 >> OK - accepted request
875 23:26:13.769802 Returned 0 in 0 seconds
876 23:26:13.870905 end: 4.1 power-off (duration 00:00:00) [common]
878 23:26:13.872452 start: 4.2 read-feedback (timeout 00:10:00) [common]
879 23:26:13.873461 Listened to connection for namespace 'common' for up to 1s
880 23:26:14.874322 Finalising connection for namespace 'common'
881 23:26:14.875024 Disconnecting from shell: Finalise
882 23:26:14.875435 =>
883 23:26:14.976424 end: 4.2 read-feedback (duration 00:00:01) [common]
884 23:26:14.977059 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/963308
885 23:26:17.670010 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/963308
886 23:26:17.670623 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.