Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:36:06.880008 lava-dispatcher, installed at version: 2024.01
2 22:36:06.880823 start: 0 validate
3 22:36:06.881314 Start time: 2024-11-08 22:36:06.881282+00:00 (UTC)
4 22:36:06.881863 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:36:06.882430 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:36:06.922295 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:36:06.922852 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-256-gc291c9cfd76a8%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:36:06.954273 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:36:06.954909 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-256-gc291c9cfd76a8%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 22:36:06.985373 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:36:06.985886 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:36:07.017192 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:36:07.017703 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-256-gc291c9cfd76a8%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 22:36:07.056283 validate duration: 0.18
16 22:36:07.057143 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:36:07.057476 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:36:07.057801 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:36:07.058403 Not decompressing ramdisk as can be used compressed.
20 22:36:07.058861 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 22:36:07.059155 saving as /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/ramdisk/initrd.cpio.gz
22 22:36:07.059442 total size: 5628140 (5 MB)
23 22:36:07.098409 progress 0 % (0 MB)
24 22:36:07.105237 progress 5 % (0 MB)
25 22:36:07.113009 progress 10 % (0 MB)
26 22:36:07.119807 progress 15 % (0 MB)
27 22:36:07.125900 progress 20 % (1 MB)
28 22:36:07.129500 progress 25 % (1 MB)
29 22:36:07.133507 progress 30 % (1 MB)
30 22:36:07.137468 progress 35 % (1 MB)
31 22:36:07.141157 progress 40 % (2 MB)
32 22:36:07.145072 progress 45 % (2 MB)
33 22:36:07.148608 progress 50 % (2 MB)
34 22:36:07.152523 progress 55 % (2 MB)
35 22:36:07.156460 progress 60 % (3 MB)
36 22:36:07.159973 progress 65 % (3 MB)
37 22:36:07.163904 progress 70 % (3 MB)
38 22:36:07.167723 progress 75 % (4 MB)
39 22:36:07.171613 progress 80 % (4 MB)
40 22:36:07.175108 progress 85 % (4 MB)
41 22:36:07.178988 progress 90 % (4 MB)
42 22:36:07.182598 progress 95 % (5 MB)
43 22:36:07.185822 progress 100 % (5 MB)
44 22:36:07.186463 5 MB downloaded in 0.13 s (42.26 MB/s)
45 22:36:07.187005 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:36:07.187889 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:36:07.188214 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:36:07.188487 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:36:07.188958 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-256-gc291c9cfd76a8/arm64/defconfig/gcc-12/kernel/Image
51 22:36:07.189203 saving as /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/kernel/Image
52 22:36:07.189415 total size: 45713920 (43 MB)
53 22:36:07.189625 No compression specified
54 22:36:07.226190 progress 0 % (0 MB)
55 22:36:07.254443 progress 5 % (2 MB)
56 22:36:07.282941 progress 10 % (4 MB)
57 22:36:07.310905 progress 15 % (6 MB)
58 22:36:07.338981 progress 20 % (8 MB)
59 22:36:07.366969 progress 25 % (10 MB)
60 22:36:07.394638 progress 30 % (13 MB)
61 22:36:07.422375 progress 35 % (15 MB)
62 22:36:07.450099 progress 40 % (17 MB)
63 22:36:07.478021 progress 45 % (19 MB)
64 22:36:07.506122 progress 50 % (21 MB)
65 22:36:07.534184 progress 55 % (24 MB)
66 22:36:07.562469 progress 60 % (26 MB)
67 22:36:07.590159 progress 65 % (28 MB)
68 22:36:07.618270 progress 70 % (30 MB)
69 22:36:07.646274 progress 75 % (32 MB)
70 22:36:07.674309 progress 80 % (34 MB)
71 22:36:07.701909 progress 85 % (37 MB)
72 22:36:07.729858 progress 90 % (39 MB)
73 22:36:07.757740 progress 95 % (41 MB)
74 22:36:07.785189 progress 100 % (43 MB)
75 22:36:07.785744 43 MB downloaded in 0.60 s (73.11 MB/s)
76 22:36:07.786215 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:36:07.787025 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:36:07.787300 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:36:07.787567 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:36:07.788065 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-256-gc291c9cfd76a8/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 22:36:07.788355 saving as /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/dtb/meson-g12b-a311d-libretech-cc.dtb
83 22:36:07.788563 total size: 54703 (0 MB)
84 22:36:07.788772 No compression specified
85 22:36:07.828377 progress 59 % (0 MB)
86 22:36:07.829228 progress 100 % (0 MB)
87 22:36:07.829768 0 MB downloaded in 0.04 s (1.27 MB/s)
88 22:36:07.830242 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:36:07.831047 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:36:07.831305 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:36:07.831567 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:36:07.832041 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 22:36:07.832287 saving as /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/nfsrootfs/full.rootfs.tar
95 22:36:07.832490 total size: 474398908 (452 MB)
96 22:36:07.832698 Using unxz to decompress xz
97 22:36:07.867760 progress 0 % (0 MB)
98 22:36:08.956190 progress 5 % (22 MB)
99 22:36:10.391272 progress 10 % (45 MB)
100 22:36:10.821360 progress 15 % (67 MB)
101 22:36:11.645084 progress 20 % (90 MB)
102 22:36:12.178784 progress 25 % (113 MB)
103 22:36:12.523462 progress 30 % (135 MB)
104 22:36:13.131175 progress 35 % (158 MB)
105 22:36:14.073037 progress 40 % (181 MB)
106 22:36:14.914012 progress 45 % (203 MB)
107 22:36:15.488424 progress 50 % (226 MB)
108 22:36:16.127126 progress 55 % (248 MB)
109 22:36:17.305271 progress 60 % (271 MB)
110 22:36:18.736315 progress 65 % (294 MB)
111 22:36:20.312920 progress 70 % (316 MB)
112 22:36:23.455151 progress 75 % (339 MB)
113 22:36:25.899887 progress 80 % (361 MB)
114 22:36:28.814194 progress 85 % (384 MB)
115 22:36:31.985191 progress 90 % (407 MB)
116 22:36:35.174295 progress 95 % (429 MB)
117 22:36:38.464860 progress 100 % (452 MB)
118 22:36:38.480033 452 MB downloaded in 30.65 s (14.76 MB/s)
119 22:36:38.480972 end: 1.4.1 http-download (duration 00:00:31) [common]
121 22:36:38.482781 end: 1.4 download-retry (duration 00:00:31) [common]
122 22:36:38.483367 start: 1.5 download-retry (timeout 00:09:29) [common]
123 22:36:38.483931 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 22:36:38.484914 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-256-gc291c9cfd76a8/arm64/defconfig/gcc-12/modules.tar.xz
125 22:36:38.485425 saving as /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/modules/modules.tar
126 22:36:38.485870 total size: 11613560 (11 MB)
127 22:36:38.486325 Using unxz to decompress xz
128 22:36:38.530296 progress 0 % (0 MB)
129 22:36:38.609972 progress 5 % (0 MB)
130 22:36:38.701767 progress 10 % (1 MB)
131 22:36:38.821099 progress 15 % (1 MB)
132 22:36:38.932574 progress 20 % (2 MB)
133 22:36:39.027434 progress 25 % (2 MB)
134 22:36:39.106140 progress 30 % (3 MB)
135 22:36:39.184276 progress 35 % (3 MB)
136 22:36:39.256056 progress 40 % (4 MB)
137 22:36:39.331116 progress 45 % (5 MB)
138 22:36:39.415867 progress 50 % (5 MB)
139 22:36:39.493259 progress 55 % (6 MB)
140 22:36:39.579152 progress 60 % (6 MB)
141 22:36:39.659848 progress 65 % (7 MB)
142 22:36:39.741128 progress 70 % (7 MB)
143 22:36:39.819646 progress 75 % (8 MB)
144 22:36:39.903506 progress 80 % (8 MB)
145 22:36:39.983649 progress 85 % (9 MB)
146 22:36:40.063009 progress 90 % (9 MB)
147 22:36:40.141342 progress 95 % (10 MB)
148 22:36:40.218312 progress 100 % (11 MB)
149 22:36:40.231006 11 MB downloaded in 1.75 s (6.35 MB/s)
150 22:36:40.231588 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:36:40.232972 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:36:40.233548 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 22:36:40.234111 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 22:36:55.542150 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/963275/extract-nfsrootfs-39jgdfce
156 22:36:55.542760 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 22:36:55.543047 start: 1.6.2 lava-overlay (timeout 00:09:12) [common]
158 22:36:55.543737 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv
159 22:36:55.544213 makedir: /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin
160 22:36:55.544542 makedir: /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/tests
161 22:36:55.544854 makedir: /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/results
162 22:36:55.545185 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-add-keys
163 22:36:55.545712 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-add-sources
164 22:36:55.546221 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-background-process-start
165 22:36:55.546709 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-background-process-stop
166 22:36:55.547234 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-common-functions
167 22:36:55.547715 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-echo-ipv4
168 22:36:55.548229 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-install-packages
169 22:36:55.548744 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-installed-packages
170 22:36:55.549286 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-os-build
171 22:36:55.549793 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-probe-channel
172 22:36:55.550269 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-probe-ip
173 22:36:55.550739 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-target-ip
174 22:36:55.551209 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-target-mac
175 22:36:55.551676 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-target-storage
176 22:36:55.552180 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-test-case
177 22:36:55.552686 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-test-event
178 22:36:55.553187 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-test-feedback
179 22:36:55.553662 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-test-raise
180 22:36:55.554130 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-test-reference
181 22:36:55.554598 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-test-runner
182 22:36:55.555066 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-test-set
183 22:36:55.555525 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-test-shell
184 22:36:55.556016 Updating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-install-packages (oe)
185 22:36:55.556561 Updating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/bin/lava-installed-packages (oe)
186 22:36:55.556991 Creating /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/environment
187 22:36:55.557353 LAVA metadata
188 22:36:55.557608 - LAVA_JOB_ID=963275
189 22:36:55.557822 - LAVA_DISPATCHER_IP=192.168.6.2
190 22:36:55.558184 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 22:36:55.559172 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 22:36:55.559493 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 22:36:55.559703 skipped lava-vland-overlay
194 22:36:55.559946 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 22:36:55.560227 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 22:36:55.560446 skipped lava-multinode-overlay
197 22:36:55.560689 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 22:36:55.560941 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 22:36:55.561188 Loading test definitions
200 22:36:55.561465 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 22:36:55.561685 Using /lava-963275 at stage 0
202 22:36:55.562871 uuid=963275_1.6.2.4.1 testdef=None
203 22:36:55.563179 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 22:36:55.563442 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 22:36:55.565177 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 22:36:55.565972 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 22:36:55.568218 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 22:36:55.569088 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 22:36:55.571200 runner path: /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 963275_1.6.2.4.1
212 22:36:55.571778 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 22:36:55.572568 Creating lava-test-runner.conf files
215 22:36:55.572771 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/963275/lava-overlay-a0ig1zvv/lava-963275/0 for stage 0
216 22:36:55.573107 - 0_v4l2-decoder-conformance-vp9
217 22:36:55.573451 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 22:36:55.573722 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 22:36:55.595158 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 22:36:55.595551 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 22:36:55.595808 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 22:36:55.596101 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 22:36:55.596370 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 22:36:56.213405 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 22:36:56.213853 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 22:36:56.214103 extracting modules file /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/963275/extract-nfsrootfs-39jgdfce
227 22:36:57.557766 extracting modules file /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/963275/extract-overlay-ramdisk-e9tdckix/ramdisk
228 22:36:58.945346 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 22:36:58.945815 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 22:36:58.946090 [common] Applying overlay to NFS
231 22:36:58.946302 [common] Applying overlay /var/lib/lava/dispatcher/tmp/963275/compress-overlay-7z2e8bv_/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/963275/extract-nfsrootfs-39jgdfce
232 22:36:58.974945 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 22:36:58.975308 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 22:36:58.975593 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 22:36:58.975825 Converting downloaded kernel to a uImage
236 22:36:58.976167 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/kernel/Image /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/kernel/uImage
237 22:36:59.451391 output: Image Name:
238 22:36:59.451817 output: Created: Fri Nov 8 22:36:58 2024
239 22:36:59.452080 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 22:36:59.452304 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 22:36:59.452514 output: Load Address: 01080000
242 22:36:59.452720 output: Entry Point: 01080000
243 22:36:59.452921 output:
244 22:36:59.453260 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 22:36:59.453534 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 22:36:59.453813 start: 1.6.7 configure-preseed-file (timeout 00:09:08) [common]
247 22:36:59.454075 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 22:36:59.454342 start: 1.6.8 compress-ramdisk (timeout 00:09:08) [common]
249 22:36:59.454616 Building ramdisk /var/lib/lava/dispatcher/tmp/963275/extract-overlay-ramdisk-e9tdckix/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/963275/extract-overlay-ramdisk-e9tdckix/ramdisk
250 22:37:01.604857 >> 166827 blocks
251 22:37:09.465045 Adding RAMdisk u-boot header.
252 22:37:09.465718 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/963275/extract-overlay-ramdisk-e9tdckix/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/963275/extract-overlay-ramdisk-e9tdckix/ramdisk.cpio.gz.uboot
253 22:37:09.718486 output: Image Name:
254 22:37:09.718891 output: Created: Fri Nov 8 22:37:09 2024
255 22:37:09.719107 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 22:37:09.719312 output: Data Size: 23434577 Bytes = 22885.33 KiB = 22.35 MiB
257 22:37:09.719513 output: Load Address: 00000000
258 22:37:09.719712 output: Entry Point: 00000000
259 22:37:09.719909 output:
260 22:37:09.720994 rename /var/lib/lava/dispatcher/tmp/963275/extract-overlay-ramdisk-e9tdckix/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/ramdisk/ramdisk.cpio.gz.uboot
261 22:37:09.721793 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 22:37:09.722389 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 22:37:09.722966 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 22:37:09.723465 No LXC device requested
265 22:37:09.724044 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 22:37:09.724616 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 22:37:09.725161 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 22:37:09.725618 Checking files for TFTP limit of 4294967296 bytes.
269 22:37:09.728569 end: 1 tftp-deploy (duration 00:01:03) [common]
270 22:37:09.729197 start: 2 uboot-action (timeout 00:05:00) [common]
271 22:37:09.729770 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 22:37:09.730312 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 22:37:09.730860 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 22:37:09.731429 Using kernel file from prepare-kernel: 963275/tftp-deploy-pnqn_dnp/kernel/uImage
275 22:37:09.732142 substitutions:
276 22:37:09.732600 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 22:37:09.733041 - {DTB_ADDR}: 0x01070000
278 22:37:09.733480 - {DTB}: 963275/tftp-deploy-pnqn_dnp/dtb/meson-g12b-a311d-libretech-cc.dtb
279 22:37:09.733918 - {INITRD}: 963275/tftp-deploy-pnqn_dnp/ramdisk/ramdisk.cpio.gz.uboot
280 22:37:09.734356 - {KERNEL_ADDR}: 0x01080000
281 22:37:09.734789 - {KERNEL}: 963275/tftp-deploy-pnqn_dnp/kernel/uImage
282 22:37:09.735222 - {LAVA_MAC}: None
283 22:37:09.735694 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/963275/extract-nfsrootfs-39jgdfce
284 22:37:09.736193 - {NFS_SERVER_IP}: 192.168.6.2
285 22:37:09.736632 - {PRESEED_CONFIG}: None
286 22:37:09.737063 - {PRESEED_LOCAL}: None
287 22:37:09.737494 - {RAMDISK_ADDR}: 0x08000000
288 22:37:09.737916 - {RAMDISK}: 963275/tftp-deploy-pnqn_dnp/ramdisk/ramdisk.cpio.gz.uboot
289 22:37:09.738341 - {ROOT_PART}: None
290 22:37:09.738771 - {ROOT}: None
291 22:37:09.739195 - {SERVER_IP}: 192.168.6.2
292 22:37:09.739622 - {TEE_ADDR}: 0x83000000
293 22:37:09.740134 - {TEE}: None
294 22:37:09.740581 Parsed boot commands:
295 22:37:09.741000 - setenv autoload no
296 22:37:09.741426 - setenv initrd_high 0xffffffff
297 22:37:09.741853 - setenv fdt_high 0xffffffff
298 22:37:09.742277 - dhcp
299 22:37:09.742702 - setenv serverip 192.168.6.2
300 22:37:09.743129 - tftpboot 0x01080000 963275/tftp-deploy-pnqn_dnp/kernel/uImage
301 22:37:09.743555 - tftpboot 0x08000000 963275/tftp-deploy-pnqn_dnp/ramdisk/ramdisk.cpio.gz.uboot
302 22:37:09.744000 - tftpboot 0x01070000 963275/tftp-deploy-pnqn_dnp/dtb/meson-g12b-a311d-libretech-cc.dtb
303 22:37:09.744435 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/963275/extract-nfsrootfs-39jgdfce,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 22:37:09.744875 - bootm 0x01080000 0x08000000 0x01070000
305 22:37:09.745422 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 22:37:09.747039 start: 2.3 connect-device (timeout 00:05:00) [common]
308 22:37:09.747495 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 22:37:09.763110 Setting prompt string to ['lava-test: # ']
310 22:37:09.764711 end: 2.3 connect-device (duration 00:00:00) [common]
311 22:37:09.765370 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 22:37:09.765958 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 22:37:09.766533 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 22:37:09.767768 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 22:37:09.805308 >> OK - accepted request
316 22:37:09.807396 Returned 0 in 0 seconds
317 22:37:09.908627 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 22:37:09.910337 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 22:37:09.910965 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 22:37:09.911524 Setting prompt string to ['Hit any key to stop autoboot']
322 22:37:09.912071 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 22:37:09.913762 Trying 192.168.56.21...
324 22:37:09.914274 Connected to conserv1.
325 22:37:09.914731 Escape character is '^]'.
326 22:37:09.915183
327 22:37:09.915637 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 22:37:09.916130
329 22:37:20.772034 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 22:37:20.772725 bl2_stage_init 0x01
331 22:37:20.773220 bl2_stage_init 0x81
332 22:37:20.777521 hw id: 0x0000 - pwm id 0x01
333 22:37:20.778090 bl2_stage_init 0xc1
334 22:37:20.778555 bl2_stage_init 0x02
335 22:37:20.778991
336 22:37:20.783160 L0:00000000
337 22:37:20.783739 L1:20000703
338 22:37:20.784223 L2:00008067
339 22:37:20.784667 L3:14000000
340 22:37:20.788711 B2:00402000
341 22:37:20.789287 B1:e0f83180
342 22:37:20.789721
343 22:37:20.790158 TE: 58124
344 22:37:20.790593
345 22:37:20.794357 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 22:37:20.794866
347 22:37:20.795307 Board ID = 1
348 22:37:20.799862 Set A53 clk to 24M
349 22:37:20.800396 Set A73 clk to 24M
350 22:37:20.800836 Set clk81 to 24M
351 22:37:20.805455 A53 clk: 1200 MHz
352 22:37:20.805942 A73 clk: 1200 MHz
353 22:37:20.806373 CLK81: 166.6M
354 22:37:20.806798 smccc: 00012a91
355 22:37:20.811059 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 22:37:20.816684 board id: 1
357 22:37:20.822554 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 22:37:20.833317 fw parse done
359 22:37:20.839180 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 22:37:20.881785 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 22:37:20.892697 PIEI prepare done
362 22:37:20.893194 fastboot data load
363 22:37:20.893631 fastboot data verify
364 22:37:20.898408 verify result: 266
365 22:37:20.903961 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 22:37:20.904495 LPDDR4 probe
367 22:37:20.904934 ddr clk to 1584MHz
368 22:37:20.912174 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 22:37:20.949495
370 22:37:20.950059 dmc_version 0001
371 22:37:20.955885 Check phy result
372 22:37:20.961733 INFO : End of CA training
373 22:37:20.962213 INFO : End of initialization
374 22:37:20.967505 INFO : Training has run successfully!
375 22:37:20.968068 Check phy result
376 22:37:20.973010 INFO : End of initialization
377 22:37:20.973526 INFO : End of read enable training
378 22:37:20.978593 INFO : End of fine write leveling
379 22:37:20.984240 INFO : End of Write leveling coarse delay
380 22:37:20.984752 INFO : Training has run successfully!
381 22:37:20.985195 Check phy result
382 22:37:20.989801 INFO : End of initialization
383 22:37:20.990307 INFO : End of read dq deskew training
384 22:37:20.995459 INFO : End of MPR read delay center optimization
385 22:37:21.000988 INFO : End of write delay center optimization
386 22:37:21.006605 INFO : End of read delay center optimization
387 22:37:21.007112 INFO : End of max read latency training
388 22:37:21.012264 INFO : Training has run successfully!
389 22:37:21.012795 1D training succeed
390 22:37:21.021524 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 22:37:21.069410 Check phy result
392 22:37:21.070045 INFO : End of initialization
393 22:37:21.090721 INFO : End of 2D read delay Voltage center optimization
394 22:37:21.110990 INFO : End of 2D read delay Voltage center optimization
395 22:37:21.163028 INFO : End of 2D write delay Voltage center optimization
396 22:37:21.212687 INFO : End of 2D write delay Voltage center optimization
397 22:37:21.218057 INFO : Training has run successfully!
398 22:37:21.218575
399 22:37:21.219027 channel==0
400 22:37:21.223649 RxClkDly_Margin_A0==88 ps 9
401 22:37:21.224199 TxDqDly_Margin_A0==98 ps 10
402 22:37:21.229246 RxClkDly_Margin_A1==88 ps 9
403 22:37:21.229755 TxDqDly_Margin_A1==98 ps 10
404 22:37:21.230204 TrainedVREFDQ_A0==74
405 22:37:21.234823 TrainedVREFDQ_A1==75
406 22:37:21.235338 VrefDac_Margin_A0==25
407 22:37:21.235780 DeviceVref_Margin_A0==40
408 22:37:21.240573 VrefDac_Margin_A1==23
409 22:37:21.241098 DeviceVref_Margin_A1==39
410 22:37:21.241554
411 22:37:21.242001
412 22:37:21.254129 channel==1
413 22:37:21.254662 RxClkDly_Margin_A0==98 ps 10
414 22:37:21.255116 TxDqDly_Margin_A0==88 ps 9
415 22:37:21.255570 RxClkDly_Margin_A1==88 ps 9
416 22:37:21.256043 TxDqDly_Margin_A1==98 ps 10
417 22:37:21.256967 TrainedVREFDQ_A0==77
418 22:37:21.257451 TrainedVREFDQ_A1==78
419 22:37:21.257903 VrefDac_Margin_A0==22
420 22:37:21.262288 DeviceVref_Margin_A0==37
421 22:37:21.262810 VrefDac_Margin_A1==24
422 22:37:21.267878 DeviceVref_Margin_A1==36
423 22:37:21.268419
424 22:37:21.273519 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 22:37:21.274029
426 22:37:21.301480 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 22:37:21.302105 2D training succeed
428 22:37:21.307058 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 22:37:21.312625 auto size-- 65535DDR cs0 size: 2048MB
430 22:37:21.313140 DDR cs1 size: 2048MB
431 22:37:21.318278 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 22:37:21.318786 cs0 DataBus test pass
433 22:37:21.323847 cs1 DataBus test pass
434 22:37:21.324415 cs0 AddrBus test pass
435 22:37:21.324889 cs1 AddrBus test pass
436 22:37:21.325339
437 22:37:21.329561 100bdlr_step_size ps== 420
438 22:37:21.330099 result report
439 22:37:21.335112 boot times 0Enable ddr reg access
440 22:37:21.340982 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 22:37:21.355186 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 22:37:21.927477 0.0;M3 CHK:0;cm4_sp_mode 0
443 22:37:21.928168 MVN_1=0x00000000
444 22:37:21.932952 MVN_2=0x00000000
445 22:37:21.938809 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 22:37:21.939304 OPS=0x10
447 22:37:21.939764 ring efuse init
448 22:37:21.940251 chipver efuse init
449 22:37:21.944302 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 22:37:21.949888 [0.018961 Inits done]
451 22:37:21.950378 secure task start!
452 22:37:21.950831 high task start!
453 22:37:21.954507 low task start!
454 22:37:21.955020 run into bl31
455 22:37:21.961131 NOTICE: BL31: v1.3(release):4fc40b1
456 22:37:21.969007 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 22:37:21.969554 NOTICE: BL31: G12A normal boot!
458 22:37:21.994403 NOTICE: BL31: BL33 decompress pass
459 22:37:22.000043 ERROR: Error initializing runtime service opteed_fast
460 22:37:23.233026
461 22:37:23.233693
462 22:37:23.241387 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 22:37:23.241888
464 22:37:23.242353 Model: Libre Computer AML-A311D-CC Alta
465 22:37:23.449862 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 22:37:23.473081 DRAM: 2 GiB (effective 3.8 GiB)
467 22:37:23.616206 Core: 408 devices, 31 uclasses, devicetree: separate
468 22:37:23.622012 WDT: Not starting watchdog@f0d0
469 22:37:23.654219 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 22:37:23.666605 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 22:37:23.671841 ** Bad device specification mmc 0 **
472 22:37:23.681998 Card did not respond to voltage select! : -110
473 22:37:23.689771 ** Bad device specification mmc 0 **
474 22:37:23.690275 Couldn't find partition mmc 0
475 22:37:23.698012 Card did not respond to voltage select! : -110
476 22:37:23.703567 ** Bad device specification mmc 0 **
477 22:37:23.704087 Couldn't find partition mmc 0
478 22:37:23.708725 Error: could not access storage.
479 22:37:24.972666 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 22:37:24.973333 bl2_stage_init 0x01
481 22:37:24.973815 bl2_stage_init 0x81
482 22:37:24.978105 hw id: 0x0000 - pwm id 0x01
483 22:37:24.978621 bl2_stage_init 0xc1
484 22:37:24.979081 bl2_stage_init 0x02
485 22:37:24.979531
486 22:37:24.983676 L0:00000000
487 22:37:24.984192 L1:20000703
488 22:37:24.984647 L2:00008067
489 22:37:24.985091 L3:14000000
490 22:37:24.989151 B2:00402000
491 22:37:24.989626 B1:e0f83180
492 22:37:24.990072
493 22:37:24.990517 TE: 58159
494 22:37:24.990963
495 22:37:24.994927 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 22:37:24.995408
497 22:37:24.995864 Board ID = 1
498 22:37:25.000410 Set A53 clk to 24M
499 22:37:25.000879 Set A73 clk to 24M
500 22:37:25.001327 Set clk81 to 24M
501 22:37:25.006038 A53 clk: 1200 MHz
502 22:37:25.006513 A73 clk: 1200 MHz
503 22:37:25.006963 CLK81: 166.6M
504 22:37:25.007405 smccc: 00012ab5
505 22:37:25.011766 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 22:37:25.017308 board id: 1
507 22:37:25.023362 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 22:37:25.033709 fw parse done
509 22:37:25.039796 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 22:37:25.082426 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 22:37:25.093243 PIEI prepare done
512 22:37:25.093747 fastboot data load
513 22:37:25.094201 fastboot data verify
514 22:37:25.099039 verify result: 266
515 22:37:25.104481 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 22:37:25.104966 LPDDR4 probe
517 22:37:25.105416 ddr clk to 1584MHz
518 22:37:25.112437 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 22:37:25.149784
520 22:37:25.150301 dmc_version 0001
521 22:37:25.156368 Check phy result
522 22:37:25.162319 INFO : End of CA training
523 22:37:25.162818 INFO : End of initialization
524 22:37:25.167885 INFO : Training has run successfully!
525 22:37:25.168413 Check phy result
526 22:37:25.173449 INFO : End of initialization
527 22:37:25.173928 INFO : End of read enable training
528 22:37:25.176704 INFO : End of fine write leveling
529 22:37:25.182234 INFO : End of Write leveling coarse delay
530 22:37:25.188017 INFO : Training has run successfully!
531 22:37:25.188500 Check phy result
532 22:37:25.188954 INFO : End of initialization
533 22:37:25.193449 INFO : End of read dq deskew training
534 22:37:25.199061 INFO : End of MPR read delay center optimization
535 22:37:25.199533 INFO : End of write delay center optimization
536 22:37:25.204750 INFO : End of read delay center optimization
537 22:37:25.210264 INFO : End of max read latency training
538 22:37:25.210737 INFO : Training has run successfully!
539 22:37:25.215962 1D training succeed
540 22:37:25.221861 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 22:37:25.269511 Check phy result
542 22:37:25.270019 INFO : End of initialization
543 22:37:25.292276 INFO : End of 2D read delay Voltage center optimization
544 22:37:25.312346 INFO : End of 2D read delay Voltage center optimization
545 22:37:25.364463 INFO : End of 2D write delay Voltage center optimization
546 22:37:25.413896 INFO : End of 2D write delay Voltage center optimization
547 22:37:25.419433 INFO : Training has run successfully!
548 22:37:25.419910
549 22:37:25.420444 channel==0
550 22:37:25.424927 RxClkDly_Margin_A0==88 ps 9
551 22:37:25.425436 TxDqDly_Margin_A0==98 ps 10
552 22:37:25.430508 RxClkDly_Margin_A1==88 ps 9
553 22:37:25.431000 TxDqDly_Margin_A1==98 ps 10
554 22:37:25.431455 TrainedVREFDQ_A0==74
555 22:37:25.436212 TrainedVREFDQ_A1==74
556 22:37:25.436698 VrefDac_Margin_A0==25
557 22:37:25.437145 DeviceVref_Margin_A0==40
558 22:37:25.441658 VrefDac_Margin_A1==25
559 22:37:25.442132 DeviceVref_Margin_A1==40
560 22:37:25.442577
561 22:37:25.443024
562 22:37:25.447392 channel==1
563 22:37:25.447865 RxClkDly_Margin_A0==98 ps 10
564 22:37:25.448346 TxDqDly_Margin_A0==98 ps 10
565 22:37:25.453002 RxClkDly_Margin_A1==98 ps 10
566 22:37:25.453476 TxDqDly_Margin_A1==88 ps 9
567 22:37:25.458566 TrainedVREFDQ_A0==77
568 22:37:25.459043 TrainedVREFDQ_A1==77
569 22:37:25.459494 VrefDac_Margin_A0==22
570 22:37:25.464286 DeviceVref_Margin_A0==37
571 22:37:25.464772 VrefDac_Margin_A1==22
572 22:37:25.469933 DeviceVref_Margin_A1==37
573 22:37:25.470410
574 22:37:25.470858 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 22:37:25.475326
576 22:37:25.503343 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 22:37:25.503715 2D training succeed
578 22:37:25.508843 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 22:37:25.514510 auto size-- 65535DDR cs0 size: 2048MB
580 22:37:25.514990 DDR cs1 size: 2048MB
581 22:37:25.519965 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 22:37:25.520298 cs0 DataBus test pass
583 22:37:25.525565 cs1 DataBus test pass
584 22:37:25.525994 cs0 AddrBus test pass
585 22:37:25.526341 cs1 AddrBus test pass
586 22:37:25.526585
587 22:37:25.531193 100bdlr_step_size ps== 420
588 22:37:25.531512 result report
589 22:37:25.536774 boot times 0Enable ddr reg access
590 22:37:25.542186 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 22:37:25.555762 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 22:37:26.129413 0.0;M3 CHK:0;cm4_sp_mode 0
593 22:37:26.130125 MVN_1=0x00000000
594 22:37:26.137166 MVN_2=0x00000000
595 22:37:26.140637 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 22:37:26.141033 OPS=0x10
597 22:37:26.141267 ring efuse init
598 22:37:26.141497 chipver efuse init
599 22:37:26.146311 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 22:37:26.151861 [0.018961 Inits done]
601 22:37:26.152438 secure task start!
602 22:37:26.152896 high task start!
603 22:37:26.156420 low task start!
604 22:37:26.156952 run into bl31
605 22:37:26.163177 NOTICE: BL31: v1.3(release):4fc40b1
606 22:37:26.171424 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 22:37:26.172154 NOTICE: BL31: G12A normal boot!
608 22:37:26.201723 NOTICE: BL31: BL33 decompress pass
609 22:37:26.202821 ERROR: Error initializing runtime service opteed_fast
610 22:37:27.434907
611 22:37:27.435612
612 22:37:27.443303 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 22:37:27.443820
614 22:37:27.444329 Model: Libre Computer AML-A311D-CC Alta
615 22:37:27.651738 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 22:37:27.675045 DRAM: 2 GiB (effective 3.8 GiB)
617 22:37:27.817929 Core: 408 devices, 31 uclasses, devicetree: separate
618 22:37:27.823784 WDT: Not starting watchdog@f0d0
619 22:37:27.856046 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 22:37:27.868518 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 22:37:27.872563 ** Bad device specification mmc 0 **
622 22:37:27.883814 Card did not respond to voltage select! : -110
623 22:37:27.891465 ** Bad device specification mmc 0 **
624 22:37:27.891952 Couldn't find partition mmc 0
625 22:37:27.899856 Card did not respond to voltage select! : -110
626 22:37:27.905320 ** Bad device specification mmc 0 **
627 22:37:27.905804 Couldn't find partition mmc 0
628 22:37:27.909700 Error: could not access storage.
629 22:37:28.252878 Net: eth0: ethernet@ff3f0000
630 22:37:28.253442 starting USB...
631 22:37:28.504752 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 22:37:28.505143 Starting the controller
633 22:37:28.510712 USB XHCI 1.10
634 22:37:30.221036 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 22:37:30.221679 bl2_stage_init 0x01
636 22:37:30.222151 bl2_stage_init 0x81
637 22:37:30.226693 hw id: 0x0000 - pwm id 0x01
638 22:37:30.227193 bl2_stage_init 0xc1
639 22:37:30.227648 bl2_stage_init 0x02
640 22:37:30.228140
641 22:37:30.232193 L0:00000000
642 22:37:30.232677 L1:20000703
643 22:37:30.233130 L2:00008067
644 22:37:30.233573 L3:14000000
645 22:37:30.237766 B2:00402000
646 22:37:30.238243 B1:e0f83180
647 22:37:30.238690
648 22:37:30.239135 TE: 58124
649 22:37:30.239578
650 22:37:30.243326 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 22:37:30.243818
652 22:37:30.244305 Board ID = 1
653 22:37:30.248927 Set A53 clk to 24M
654 22:37:30.249407 Set A73 clk to 24M
655 22:37:30.249858 Set clk81 to 24M
656 22:37:30.254616 A53 clk: 1200 MHz
657 22:37:30.255095 A73 clk: 1200 MHz
658 22:37:30.255538 CLK81: 166.6M
659 22:37:30.256013 smccc: 00012a92
660 22:37:30.260174 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 22:37:30.265772 board id: 1
662 22:37:30.270729 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 22:37:30.282246 fw parse done
664 22:37:30.288216 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 22:37:30.330863 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 22:37:30.341781 PIEI prepare done
667 22:37:30.342261 fastboot data load
668 22:37:30.342714 fastboot data verify
669 22:37:30.347431 verify result: 266
670 22:37:30.353016 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 22:37:30.353502 LPDDR4 probe
672 22:37:30.353954 ddr clk to 1584MHz
673 22:37:30.361011 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 22:37:30.398230
675 22:37:30.398742 dmc_version 0001
676 22:37:30.404955 Check phy result
677 22:37:30.410935 INFO : End of CA training
678 22:37:30.411432 INFO : End of initialization
679 22:37:30.416619 INFO : Training has run successfully!
680 22:37:30.417125 Check phy result
681 22:37:30.422004 INFO : End of initialization
682 22:37:30.422486 INFO : End of read enable training
683 22:37:30.427681 INFO : End of fine write leveling
684 22:37:30.433199 INFO : End of Write leveling coarse delay
685 22:37:30.433684 INFO : Training has run successfully!
686 22:37:30.434137 Check phy result
687 22:37:30.438819 INFO : End of initialization
688 22:37:30.439300 INFO : End of read dq deskew training
689 22:37:30.444436 INFO : End of MPR read delay center optimization
690 22:37:30.450000 INFO : End of write delay center optimization
691 22:37:30.455681 INFO : End of read delay center optimization
692 22:37:30.456182 INFO : End of max read latency training
693 22:37:30.461177 INFO : Training has run successfully!
694 22:37:30.461655 1D training succeed
695 22:37:30.469416 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 22:37:30.517488 Check phy result
697 22:37:30.518030 INFO : End of initialization
698 22:37:30.538879 INFO : End of 2D read delay Voltage center optimization
699 22:37:30.559953 INFO : End of 2D read delay Voltage center optimization
700 22:37:30.611465 INFO : End of 2D write delay Voltage center optimization
701 22:37:30.661043 INFO : End of 2D write delay Voltage center optimization
702 22:37:30.666526 INFO : Training has run successfully!
703 22:37:30.667004
704 22:37:30.667453 channel==0
705 22:37:30.672199 RxClkDly_Margin_A0==88 ps 9
706 22:37:30.672680 TxDqDly_Margin_A0==98 ps 10
707 22:37:30.675413 RxClkDly_Margin_A1==88 ps 9
708 22:37:30.675884 TxDqDly_Margin_A1==98 ps 10
709 22:37:30.680936 TrainedVREFDQ_A0==74
710 22:37:30.681417 TrainedVREFDQ_A1==75
711 22:37:30.686502 VrefDac_Margin_A0==25
712 22:37:30.686975 DeviceVref_Margin_A0==40
713 22:37:30.687424 VrefDac_Margin_A1==25
714 22:37:30.692291 DeviceVref_Margin_A1==39
715 22:37:30.692765
716 22:37:30.693213
717 22:37:30.693654 channel==1
718 22:37:30.694091 RxClkDly_Margin_A0==98 ps 10
719 22:37:30.697777 TxDqDly_Margin_A0==88 ps 9
720 22:37:30.698255 RxClkDly_Margin_A1==88 ps 9
721 22:37:30.703475 TxDqDly_Margin_A1==88 ps 9
722 22:37:30.703963 TrainedVREFDQ_A0==77
723 22:37:30.704449 TrainedVREFDQ_A1==77
724 22:37:30.708997 VrefDac_Margin_A0==22
725 22:37:30.709476 DeviceVref_Margin_A0==37
726 22:37:30.714655 VrefDac_Margin_A1==24
727 22:37:30.715130 DeviceVref_Margin_A1==37
728 22:37:30.715572
729 22:37:30.720148 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 22:37:30.720624
731 22:37:30.748063 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 22:37:30.753714 2D training succeed
733 22:37:30.759247 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 22:37:30.759726 auto size-- 65535DDR cs0 size: 2048MB
735 22:37:30.764835 DDR cs1 size: 2048MB
736 22:37:30.765310 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 22:37:30.770427 cs0 DataBus test pass
738 22:37:30.770902 cs1 DataBus test pass
739 22:37:30.771347 cs0 AddrBus test pass
740 22:37:30.776119 cs1 AddrBus test pass
741 22:37:30.776604
742 22:37:30.777056 100bdlr_step_size ps== 420
743 22:37:30.777513 result report
744 22:37:30.781718 boot times 0Enable ddr reg access
745 22:37:30.788317 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 22:37:30.802855 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 22:37:31.375018 0.0;M3 CHK:0;cm4_sp_mode 0
748 22:37:31.375669 MVN_1=0x00000000
749 22:37:31.380448 MVN_2=0x00000000
750 22:37:31.386123 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 22:37:31.386708 OPS=0x10
752 22:37:31.387156 ring efuse init
753 22:37:31.387584 chipver efuse init
754 22:37:31.391672 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 22:37:31.397242 [0.018961 Inits done]
756 22:37:31.397720 secure task start!
757 22:37:31.398156 high task start!
758 22:37:31.401900 low task start!
759 22:37:31.402365 run into bl31
760 22:37:31.408554 NOTICE: BL31: v1.3(release):4fc40b1
761 22:37:31.416413 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 22:37:31.416912 NOTICE: BL31: G12A normal boot!
763 22:37:31.441613 NOTICE: BL31: BL33 decompress pass
764 22:37:31.447230 ERROR: Error initializing runtime service opteed_fast
765 22:37:32.680145
766 22:37:32.680561
767 22:37:32.688491 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 22:37:32.688874
769 22:37:32.689203 Model: Libre Computer AML-A311D-CC Alta
770 22:37:32.896955 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 22:37:32.920342 DRAM: 2 GiB (effective 3.8 GiB)
772 22:37:33.063323 Core: 408 devices, 31 uclasses, devicetree: separate
773 22:37:33.069146 WDT: Not starting watchdog@f0d0
774 22:37:33.101431 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 22:37:33.114069 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 22:37:33.117821 ** Bad device specification mmc 0 **
777 22:37:33.129144 Card did not respond to voltage select! : -110
778 22:37:33.136808 ** Bad device specification mmc 0 **
779 22:37:33.137081 Couldn't find partition mmc 0
780 22:37:33.145221 Card did not respond to voltage select! : -110
781 22:37:33.150701 ** Bad device specification mmc 0 **
782 22:37:33.150971 Couldn't find partition mmc 0
783 22:37:33.155801 Error: could not access storage.
784 22:37:33.498265 Net: eth0: ethernet@ff3f0000
785 22:37:33.498643 starting USB...
786 22:37:33.750264 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 22:37:33.750642 Starting the controller
788 22:37:33.757177 USB XHCI 1.10
789 22:37:35.921614 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
790 22:37:35.922051 bl2_stage_init 0x81
791 22:37:35.926895 hw id: 0x0000 - pwm id 0x01
792 22:37:35.927173 bl2_stage_init 0xc1
793 22:37:35.927387 bl2_stage_init 0x02
794 22:37:35.927587
795 22:37:35.932545 L0:00000000
796 22:37:35.932825 L1:20000703
797 22:37:35.933037 L2:00008067
798 22:37:35.933237 L3:14000000
799 22:37:35.933435 B2:00402000
800 22:37:35.935631 B1:e0f83180
801 22:37:35.935884
802 22:37:35.936117 TE: 58150
803 22:37:35.936333
804 22:37:35.946711 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 22:37:35.947127
806 22:37:35.947463 Board ID = 1
807 22:37:35.947782 Set A53 clk to 24M
808 22:37:35.948037 Set A73 clk to 24M
809 22:37:35.952476 Set clk81 to 24M
810 22:37:35.952746 A53 clk: 1200 MHz
811 22:37:35.952952 A73 clk: 1200 MHz
812 22:37:35.957899 CLK81: 166.6M
813 22:37:35.958287 smccc: 00012aac
814 22:37:35.963542 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 22:37:35.963929 board id: 1
816 22:37:35.971952 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 22:37:35.982655 fw parse done
818 22:37:35.988617 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 22:37:36.031096 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 22:37:36.041977 PIEI prepare done
821 22:37:36.042271 fastboot data load
822 22:37:36.042484 fastboot data verify
823 22:37:36.047628 verify result: 266
824 22:37:36.053244 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 22:37:36.053703 LPDDR4 probe
826 22:37:36.054045 ddr clk to 1584MHz
827 22:37:36.061256 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 22:37:36.098619
829 22:37:36.098976 dmc_version 0001
830 22:37:36.105145 Check phy result
831 22:37:36.111024 INFO : End of CA training
832 22:37:36.111430 INFO : End of initialization
833 22:37:36.116609 INFO : Training has run successfully!
834 22:37:36.116881 Check phy result
835 22:37:36.122210 INFO : End of initialization
836 22:37:36.122597 INFO : End of read enable training
837 22:37:36.125489 INFO : End of fine write leveling
838 22:37:36.131055 INFO : End of Write leveling coarse delay
839 22:37:36.136638 INFO : Training has run successfully!
840 22:37:36.136937 Check phy result
841 22:37:36.137153 INFO : End of initialization
842 22:37:36.142212 INFO : End of read dq deskew training
843 22:37:36.145555 INFO : End of MPR read delay center optimization
844 22:37:36.151174 INFO : End of write delay center optimization
845 22:37:36.156773 INFO : End of read delay center optimization
846 22:37:36.157040 INFO : End of max read latency training
847 22:37:36.162431 INFO : Training has run successfully!
848 22:37:36.162814 1D training succeed
849 22:37:36.170632 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 22:37:36.218204 Check phy result
851 22:37:36.218551 INFO : End of initialization
852 22:37:36.239812 INFO : End of 2D read delay Voltage center optimization
853 22:37:36.259908 INFO : End of 2D read delay Voltage center optimization
854 22:37:36.311848 INFO : End of 2D write delay Voltage center optimization
855 22:37:36.361076 INFO : End of 2D write delay Voltage center optimization
856 22:37:36.366655 INFO : Training has run successfully!
857 22:37:36.366930
858 22:37:36.367143 channel==0
859 22:37:36.372273 RxClkDly_Margin_A0==88 ps 9
860 22:37:36.372678 TxDqDly_Margin_A0==98 ps 10
861 22:37:36.375538 RxClkDly_Margin_A1==88 ps 9
862 22:37:36.376244 TxDqDly_Margin_A1==98 ps 10
863 22:37:36.381072 TrainedVREFDQ_A0==74
864 22:37:36.381571 TrainedVREFDQ_A1==74
865 22:37:36.386769 VrefDac_Margin_A0==25
866 22:37:36.387278 DeviceVref_Margin_A0==40
867 22:37:36.387721 VrefDac_Margin_A1==23
868 22:37:36.392291 DeviceVref_Margin_A1==40
869 22:37:36.392785
870 22:37:36.393224
871 22:37:36.393657 channel==1
872 22:37:36.394080 RxClkDly_Margin_A0==98 ps 10
873 22:37:36.397863 TxDqDly_Margin_A0==88 ps 9
874 22:37:36.398349 RxClkDly_Margin_A1==98 ps 10
875 22:37:36.403576 TxDqDly_Margin_A1==88 ps 9
876 22:37:36.404130 TrainedVREFDQ_A0==77
877 22:37:36.404603 TrainedVREFDQ_A1==77
878 22:37:36.409137 VrefDac_Margin_A0==22
879 22:37:36.409656 DeviceVref_Margin_A0==37
880 22:37:36.414834 VrefDac_Margin_A1==24
881 22:37:36.415427 DeviceVref_Margin_A1==37
882 22:37:36.415869
883 22:37:36.420440 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 22:37:36.421040
885 22:37:36.448316 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000018 dram_vref_reg_value 0x 00000060
886 22:37:36.453862 2D training succeed
887 22:37:36.459564 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 22:37:36.460153 auto size-- 65535DDR cs0 size: 2048MB
889 22:37:36.465186 DDR cs1 size: 2048MB
890 22:37:36.465772 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 22:37:36.470712 cs0 DataBus test pass
892 22:37:36.471282 cs1 DataBus test pass
893 22:37:36.471747 cs0 AddrBus test pass
894 22:37:36.476282 cs1 AddrBus test pass
895 22:37:36.476848
896 22:37:36.477288 100bdlr_step_size ps== 420
897 22:37:36.477731 result report
898 22:37:36.481898 boot times 0Enable ddr reg access
899 22:37:36.489716 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 22:37:36.503046 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 22:37:37.075085 0.0;M3 CHK:0;cm4_sp_mode 0
902 22:37:37.075768 MVN_1=0x00000000
903 22:37:37.080527 MVN_2=0x00000000
904 22:37:37.086255 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 22:37:37.086783 OPS=0x10
906 22:37:37.087267 ring efuse init
907 22:37:37.087724 chipver efuse init
908 22:37:37.091889 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 22:37:37.097639 [0.018961 Inits done]
910 22:37:37.098140 secure task start!
911 22:37:37.098595 high task start!
912 22:37:37.102162 low task start!
913 22:37:37.102642 run into bl31
914 22:37:37.108727 NOTICE: BL31: v1.3(release):4fc40b1
915 22:37:37.116726 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 22:37:37.117295 NOTICE: BL31: G12A normal boot!
917 22:37:37.141901 NOTICE: BL31: BL33 decompress pass
918 22:37:37.147733 ERROR: Error initializing runtime service opteed_fast
919 22:37:38.380570
920 22:37:38.381237
921 22:37:38.388893 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 22:37:38.389478
923 22:37:38.391197 Model: Libre Computer AML-A311D-CC Alta
924 22:37:38.597437 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 22:37:38.619823 DRAM: 2 GiB (effective 3.8 GiB)
926 22:37:38.763674 Core: 408 devices, 31 uclasses, devicetree: separate
927 22:37:38.769502 WDT: Not starting watchdog@f0d0
928 22:37:38.801831 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 22:37:38.814203 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 22:37:38.819187 ** Bad device specification mmc 0 **
931 22:37:38.829607 Card did not respond to voltage select! : -110
932 22:37:38.837165 ** Bad device specification mmc 0 **
933 22:37:38.837794 Couldn't find partition mmc 0
934 22:37:38.845648 Card did not respond to voltage select! : -110
935 22:37:38.851044 ** Bad device specification mmc 0 **
936 22:37:38.851712 Couldn't find partition mmc 0
937 22:37:38.856106 Error: could not access storage.
938 22:37:39.198556 Net: eth0: ethernet@ff3f0000
939 22:37:39.199311 starting USB...
940 22:37:39.450579 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 22:37:39.451372 Starting the controller
942 22:37:39.457310 USB XHCI 1.10
943 22:37:41.011520 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 22:37:41.019814 scanning usb for storage devices... 0 Storage Device(s) found
946 22:37:41.071632 Hit any key to stop autoboot: 1
947 22:37:41.072807 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
948 22:37:41.073510 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
949 22:37:41.074045 Setting prompt string to ['=>']
950 22:37:41.074586 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
951 22:37:41.087195 0
952 22:37:41.088256 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 22:37:41.088838 Sending with 10 millisecond of delay
955 22:37:42.224078 => setenv autoload no
956 22:37:42.234914 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 22:37:42.240344 setenv autoload no
958 22:37:42.241135 Sending with 10 millisecond of delay
960 22:37:44.038634 => setenv initrd_high 0xffffffff
961 22:37:44.049483 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
962 22:37:44.050414 setenv initrd_high 0xffffffff
963 22:37:44.051173 Sending with 10 millisecond of delay
965 22:37:45.668220 => setenv fdt_high 0xffffffff
966 22:37:45.679018 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
967 22:37:45.679816 setenv fdt_high 0xffffffff
968 22:37:45.680577 Sending with 10 millisecond of delay
970 22:37:45.972371 => dhcp
971 22:37:45.983092 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
972 22:37:45.983857 dhcp
973 22:37:45.984335 Speed: 1000, full duplex
974 22:37:45.984747 BOOTP broadcast 1
975 22:37:46.217381 DHCP client bound to address 192.168.6.27 (234 ms)
976 22:37:46.218204 Sending with 10 millisecond of delay
978 22:37:47.895103 => setenv serverip 192.168.6.2
979 22:37:47.905888 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
980 22:37:47.906747 setenv serverip 192.168.6.2
981 22:37:47.907429 Sending with 10 millisecond of delay
983 22:37:51.632465 => tftpboot 0x01080000 963275/tftp-deploy-pnqn_dnp/kernel/uImage
984 22:37:51.643258 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
985 22:37:51.644117 tftpboot 0x01080000 963275/tftp-deploy-pnqn_dnp/kernel/uImage
986 22:37:51.644561 Speed: 1000, full duplex
987 22:37:51.644983 Using ethernet@ff3f0000 device
988 22:37:51.645912 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 22:37:51.651452 Filename '963275/tftp-deploy-pnqn_dnp/kernel/uImage'.
990 22:37:51.655345 Load address: 0x1080000
991 22:37:54.523368 Loading: *################################################## 43.6 MiB
992 22:37:54.523975 15.2 MiB/s
993 22:37:54.524461 done
994 22:37:54.527784 Bytes transferred = 45713984 (2b98a40 hex)
995 22:37:54.528648 Sending with 10 millisecond of delay
997 22:37:59.219220 => tftpboot 0x08000000 963275/tftp-deploy-pnqn_dnp/ramdisk/ramdisk.cpio.gz.uboot
998 22:37:59.229972 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
999 22:37:59.230819 tftpboot 0x08000000 963275/tftp-deploy-pnqn_dnp/ramdisk/ramdisk.cpio.gz.uboot
1000 22:37:59.231263 Speed: 1000, full duplex
1001 22:37:59.231678 Using ethernet@ff3f0000 device
1002 22:37:59.232454 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1003 22:37:59.241103 Filename '963275/tftp-deploy-pnqn_dnp/ramdisk/ramdisk.cpio.gz.uboot'.
1004 22:37:59.241637 Load address: 0x8000000
1005 22:38:06.238329 Loading: *#####################T ############################ UDP wrong checksum 00000005 0000f9c7
1006 22:38:11.239534 T UDP wrong checksum 00000005 0000f9c7
1007 22:38:16.348494 T UDP wrong checksum 000000ff 00007a05
1008 22:38:16.398392 UDP wrong checksum 000000ff 000014f8
1009 22:38:21.242790 T UDP wrong checksum 00000005 0000f9c7
1010 22:38:30.319535 T UDP wrong checksum 000000ff 00008185
1011 22:38:30.359295 UDP wrong checksum 000000ff 00000d78
1012 22:38:34.099500 T UDP wrong checksum 000000ff 0000c28a
1013 22:38:34.173929 UDP wrong checksum 000000ff 00005b7d
1014 22:38:41.245130 T UDP wrong checksum 00000005 0000f9c7
1015 22:38:56.250234 T T T
1016 22:38:56.250896 Retry count exceeded; starting again
1018 22:38:56.252515 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1021 22:38:56.254590 end: 2.4 uboot-commands (duration 00:01:46) [common]
1023 22:38:56.256142 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1025 22:38:56.257243 end: 2 uboot-action (duration 00:01:47) [common]
1027 22:38:56.258885 Cleaning after the job
1028 22:38:56.259472 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/ramdisk
1029 22:38:56.260902 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/kernel
1030 22:38:56.291964 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/dtb
1031 22:38:56.293274 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/nfsrootfs
1032 22:38:56.349089 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/963275/tftp-deploy-pnqn_dnp/modules
1033 22:38:56.356000 start: 4.1 power-off (timeout 00:00:30) [common]
1034 22:38:56.356568 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1035 22:38:56.393169 >> OK - accepted request
1036 22:38:56.395231 Returned 0 in 0 seconds
1037 22:38:56.496036 end: 4.1 power-off (duration 00:00:00) [common]
1039 22:38:56.497017 start: 4.2 read-feedback (timeout 00:10:00) [common]
1040 22:38:56.497682 Listened to connection for namespace 'common' for up to 1s
1041 22:38:57.498680 Finalising connection for namespace 'common'
1042 22:38:57.499420 Disconnecting from shell: Finalise
1043 22:38:57.499945 =>
1044 22:38:57.601090 end: 4.2 read-feedback (duration 00:00:01) [common]
1045 22:38:57.601842 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/963275
1046 22:38:59.840118 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/963275
1047 22:38:59.840735 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.