Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:57:16.026381 lava-dispatcher, installed at version: 2024.01
2 01:57:16.027172 start: 0 validate
3 01:57:16.027688 Start time: 2024-11-09 01:57:16.027658+00:00 (UTC)
4 01:57:16.028278 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:57:16.028831 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:57:16.072324 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:57:16.072895 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-272-gda4373fbcf006%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 01:57:16.107710 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:57:16.108510 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-272-gda4373fbcf006%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 01:57:16.142373 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:57:16.142874 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:57:16.175442 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:57:16.175935 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-272-gda4373fbcf006%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 01:57:16.219814 validate duration: 0.19
16 01:57:16.221331 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:57:16.221938 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:57:16.222531 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:57:16.223457 Not decompressing ramdisk as can be used compressed.
20 01:57:16.224242 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 01:57:16.224762 saving as /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/ramdisk/initrd.cpio.gz
22 01:57:16.225274 total size: 5628182 (5 MB)
23 01:57:16.267357 progress 0 % (0 MB)
24 01:57:16.275341 progress 5 % (0 MB)
25 01:57:16.283875 progress 10 % (0 MB)
26 01:57:16.291449 progress 15 % (0 MB)
27 01:57:16.299518 progress 20 % (1 MB)
28 01:57:16.305302 progress 25 % (1 MB)
29 01:57:16.309286 progress 30 % (1 MB)
30 01:57:16.313209 progress 35 % (1 MB)
31 01:57:16.316800 progress 40 % (2 MB)
32 01:57:16.320718 progress 45 % (2 MB)
33 01:57:16.324287 progress 50 % (2 MB)
34 01:57:16.328177 progress 55 % (2 MB)
35 01:57:16.332080 progress 60 % (3 MB)
36 01:57:16.335560 progress 65 % (3 MB)
37 01:57:16.339437 progress 70 % (3 MB)
38 01:57:16.342962 progress 75 % (4 MB)
39 01:57:16.347089 progress 80 % (4 MB)
40 01:57:16.350664 progress 85 % (4 MB)
41 01:57:16.354513 progress 90 % (4 MB)
42 01:57:16.358170 progress 95 % (5 MB)
43 01:57:16.361402 progress 100 % (5 MB)
44 01:57:16.362054 5 MB downloaded in 0.14 s (39.24 MB/s)
45 01:57:16.362606 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:57:16.363526 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:57:16.363834 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:57:16.364144 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:57:16.364627 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-272-gda4373fbcf006/arm64/defconfig+debug/gcc-12/kernel/Image
51 01:57:16.364879 saving as /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/kernel/Image
52 01:57:16.365102 total size: 169937408 (162 MB)
53 01:57:16.365324 No compression specified
54 01:57:16.403302 progress 0 % (0 MB)
55 01:57:16.508585 progress 5 % (8 MB)
56 01:57:16.615486 progress 10 % (16 MB)
57 01:57:16.721106 progress 15 % (24 MB)
58 01:57:16.827795 progress 20 % (32 MB)
59 01:57:16.933454 progress 25 % (40 MB)
60 01:57:17.038615 progress 30 % (48 MB)
61 01:57:17.143800 progress 35 % (56 MB)
62 01:57:17.249052 progress 40 % (64 MB)
63 01:57:17.355366 progress 45 % (72 MB)
64 01:57:17.462074 progress 50 % (81 MB)
65 01:57:17.565190 progress 55 % (89 MB)
66 01:57:17.670854 progress 60 % (97 MB)
67 01:57:17.779723 progress 65 % (105 MB)
68 01:57:17.886866 progress 70 % (113 MB)
69 01:57:17.992856 progress 75 % (121 MB)
70 01:57:18.098923 progress 80 % (129 MB)
71 01:57:18.206570 progress 85 % (137 MB)
72 01:57:18.311744 progress 90 % (145 MB)
73 01:57:18.415917 progress 95 % (153 MB)
74 01:57:18.525170 progress 100 % (162 MB)
75 01:57:18.525763 162 MB downloaded in 2.16 s (75.01 MB/s)
76 01:57:18.526254 end: 1.2.1 http-download (duration 00:00:02) [common]
78 01:57:18.527095 end: 1.2 download-retry (duration 00:00:02) [common]
79 01:57:18.527376 start: 1.3 download-retry (timeout 00:09:58) [common]
80 01:57:18.527644 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 01:57:18.528166 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-272-gda4373fbcf006/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 01:57:18.528466 saving as /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/dtb/meson-g12b-a311d-libretech-cc.dtb
83 01:57:18.528679 total size: 54703 (0 MB)
84 01:57:18.528893 No compression specified
85 01:57:18.580742 progress 59 % (0 MB)
86 01:57:18.581631 progress 100 % (0 MB)
87 01:57:18.582198 0 MB downloaded in 0.05 s (0.97 MB/s)
88 01:57:18.582696 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:57:18.583529 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:57:18.583797 start: 1.4 download-retry (timeout 00:09:58) [common]
92 01:57:18.584086 start: 1.4.1 http-download (timeout 00:09:58) [common]
93 01:57:18.584569 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 01:57:18.584822 saving as /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/nfsrootfs/full.rootfs.tar
95 01:57:18.585030 total size: 107552908 (102 MB)
96 01:57:18.585242 Using unxz to decompress xz
97 01:57:18.624150 progress 0 % (0 MB)
98 01:57:19.403407 progress 5 % (5 MB)
99 01:57:20.269621 progress 10 % (10 MB)
100 01:57:21.127439 progress 15 % (15 MB)
101 01:57:22.011398 progress 20 % (20 MB)
102 01:57:22.685041 progress 25 % (25 MB)
103 01:57:23.414203 progress 30 % (30 MB)
104 01:57:24.276604 progress 35 % (35 MB)
105 01:57:24.626702 progress 40 % (41 MB)
106 01:57:25.054883 progress 45 % (46 MB)
107 01:57:25.745404 progress 50 % (51 MB)
108 01:57:26.426405 progress 55 % (56 MB)
109 01:57:27.185389 progress 60 % (61 MB)
110 01:57:27.942466 progress 65 % (66 MB)
111 01:57:28.682916 progress 70 % (71 MB)
112 01:57:29.458896 progress 75 % (76 MB)
113 01:57:30.159867 progress 80 % (82 MB)
114 01:57:30.871145 progress 85 % (87 MB)
115 01:57:31.606641 progress 90 % (92 MB)
116 01:57:32.318493 progress 95 % (97 MB)
117 01:57:33.070228 progress 100 % (102 MB)
118 01:57:33.083222 102 MB downloaded in 14.50 s (7.07 MB/s)
119 01:57:33.084211 end: 1.4.1 http-download (duration 00:00:15) [common]
121 01:57:33.086004 end: 1.4 download-retry (duration 00:00:15) [common]
122 01:57:33.086573 start: 1.5 download-retry (timeout 00:09:43) [common]
123 01:57:33.087139 start: 1.5.1 http-download (timeout 00:09:43) [common]
124 01:57:33.088133 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-272-gda4373fbcf006/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 01:57:33.088659 saving as /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/modules/modules.tar
126 01:57:33.089111 total size: 27651088 (26 MB)
127 01:57:33.089571 Using unxz to decompress xz
128 01:57:33.132439 progress 0 % (0 MB)
129 01:57:33.320499 progress 5 % (1 MB)
130 01:57:33.519926 progress 10 % (2 MB)
131 01:57:33.750246 progress 15 % (3 MB)
132 01:57:33.987019 progress 20 % (5 MB)
133 01:57:34.187100 progress 25 % (6 MB)
134 01:57:34.391072 progress 30 % (7 MB)
135 01:57:34.591658 progress 35 % (9 MB)
136 01:57:34.783710 progress 40 % (10 MB)
137 01:57:34.974760 progress 45 % (11 MB)
138 01:57:35.184895 progress 50 % (13 MB)
139 01:57:35.390337 progress 55 % (14 MB)
140 01:57:35.607031 progress 60 % (15 MB)
141 01:57:35.812500 progress 65 % (17 MB)
142 01:57:36.012523 progress 70 % (18 MB)
143 01:57:36.222684 progress 75 % (19 MB)
144 01:57:36.429583 progress 80 % (21 MB)
145 01:57:36.636172 progress 85 % (22 MB)
146 01:57:36.841067 progress 90 % (23 MB)
147 01:57:37.038668 progress 95 % (25 MB)
148 01:57:37.238257 progress 100 % (26 MB)
149 01:57:37.252279 26 MB downloaded in 4.16 s (6.33 MB/s)
150 01:57:37.253222 end: 1.5.1 http-download (duration 00:00:04) [common]
152 01:57:37.254889 end: 1.5 download-retry (duration 00:00:04) [common]
153 01:57:37.255429 start: 1.6 prepare-tftp-overlay (timeout 00:09:39) [common]
154 01:57:37.255957 start: 1.6.1 extract-nfsrootfs (timeout 00:09:39) [common]
155 01:57:46.957479 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/964199/extract-nfsrootfs-o96no73v
156 01:57:46.958080 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 01:57:46.958371 start: 1.6.2 lava-overlay (timeout 00:09:29) [common]
158 01:57:46.959006 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff
159 01:57:46.959447 makedir: /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin
160 01:57:46.959784 makedir: /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/tests
161 01:57:46.960144 makedir: /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/results
162 01:57:46.960492 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-add-keys
163 01:57:46.961029 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-add-sources
164 01:57:46.961542 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-background-process-start
165 01:57:46.962038 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-background-process-stop
166 01:57:46.962596 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-common-functions
167 01:57:46.963117 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-echo-ipv4
168 01:57:46.963634 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-install-packages
169 01:57:46.964169 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-installed-packages
170 01:57:46.964707 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-os-build
171 01:57:46.965198 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-probe-channel
172 01:57:46.965681 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-probe-ip
173 01:57:46.966163 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-target-ip
174 01:57:46.966669 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-target-mac
175 01:57:46.967168 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-target-storage
176 01:57:46.967666 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-test-case
177 01:57:46.968189 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-test-event
178 01:57:46.968683 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-test-feedback
179 01:57:46.969164 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-test-raise
180 01:57:46.969642 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-test-reference
181 01:57:46.970124 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-test-runner
182 01:57:46.970623 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-test-set
183 01:57:46.971123 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-test-shell
184 01:57:46.971614 Updating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-install-packages (oe)
185 01:57:46.972188 Updating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/bin/lava-installed-packages (oe)
186 01:57:46.972649 Creating /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/environment
187 01:57:46.973024 LAVA metadata
188 01:57:46.973288 - LAVA_JOB_ID=964199
189 01:57:46.973506 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:57:46.973866 start: 1.6.2.1 ssh-authorize (timeout 00:09:29) [common]
191 01:57:46.974890 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:57:46.975223 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:29) [common]
193 01:57:46.975437 skipped lava-vland-overlay
194 01:57:46.975685 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:57:46.975944 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:29) [common]
196 01:57:46.976211 skipped lava-multinode-overlay
197 01:57:46.976464 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:57:46.976722 start: 1.6.2.4 test-definition (timeout 00:09:29) [common]
199 01:57:46.976976 Loading test definitions
200 01:57:46.977259 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:29) [common]
201 01:57:46.977487 Using /lava-964199 at stage 0
202 01:57:46.978755 uuid=964199_1.6.2.4.1 testdef=None
203 01:57:46.979070 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:57:46.979338 start: 1.6.2.4.2 test-overlay (timeout 00:09:29) [common]
205 01:57:46.981162 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:57:46.981966 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:29) [common]
208 01:57:46.984269 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:57:46.985108 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:29) [common]
211 01:57:46.987276 runner path: /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/0/tests/0_dmesg test_uuid 964199_1.6.2.4.1
212 01:57:46.987835 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:57:46.988644 Creating lava-test-runner.conf files
215 01:57:46.988851 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/964199/lava-overlay-qxmelpff/lava-964199/0 for stage 0
216 01:57:46.989192 - 0_dmesg
217 01:57:46.989540 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:57:46.989820 start: 1.6.2.5 compress-overlay (timeout 00:09:29) [common]
219 01:57:47.011410 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:57:47.011786 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:29) [common]
221 01:57:47.012082 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:57:47.012362 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:57:47.012631 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:29) [common]
224 01:57:47.632406 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:57:47.632870 start: 1.6.4 extract-modules (timeout 00:09:29) [common]
226 01:57:47.633121 extracting modules file /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964199/extract-nfsrootfs-o96no73v
227 01:57:49.540066 extracting modules file /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964199/extract-overlay-ramdisk-be9gfx0n/ramdisk
228 01:57:51.487117 end: 1.6.4 extract-modules (duration 00:00:04) [common]
229 01:57:51.487614 start: 1.6.5 apply-overlay-tftp (timeout 00:09:25) [common]
230 01:57:51.487903 [common] Applying overlay to NFS
231 01:57:51.488156 [common] Applying overlay /var/lib/lava/dispatcher/tmp/964199/compress-overlay-_oto4g1p/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/964199/extract-nfsrootfs-o96no73v
232 01:57:51.529388 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:57:51.529881 start: 1.6.6 prepare-kernel (timeout 00:09:25) [common]
234 01:57:51.530212 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:25) [common]
235 01:57:51.530575 Converting downloaded kernel to a uImage
236 01:57:51.530944 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/kernel/Image /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/kernel/uImage
237 01:57:53.171170 output: Image Name:
238 01:57:53.171610 output: Created: Sat Nov 9 01:57:51 2024
239 01:57:53.171843 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:57:53.172105 output: Data Size: 169937408 Bytes = 165954.50 KiB = 162.06 MiB
241 01:57:53.172330 output: Load Address: 01080000
242 01:57:53.172537 output: Entry Point: 01080000
243 01:57:53.172736 output:
244 01:57:53.173071 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 01:57:53.173391 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 01:57:53.173713 start: 1.6.7 configure-preseed-file (timeout 00:09:23) [common]
247 01:57:53.173984 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:57:53.174245 start: 1.6.8 compress-ramdisk (timeout 00:09:23) [common]
249 01:57:53.174522 Building ramdisk /var/lib/lava/dispatcher/tmp/964199/extract-overlay-ramdisk-be9gfx0n/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/964199/extract-overlay-ramdisk-be9gfx0n/ramdisk
250 01:57:58.786682 >> 426772 blocks
251 01:58:16.427973 Adding RAMdisk u-boot header.
252 01:58:16.428689 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/964199/extract-overlay-ramdisk-be9gfx0n/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/964199/extract-overlay-ramdisk-be9gfx0n/ramdisk.cpio.gz.uboot
253 01:58:16.958058 output: Image Name:
254 01:58:16.958497 output: Created: Sat Nov 9 01:58:16 2024
255 01:58:16.959048 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:58:16.959544 output: Data Size: 50968410 Bytes = 49773.84 KiB = 48.61 MiB
257 01:58:16.960050 output: Load Address: 00000000
258 01:58:16.960516 output: Entry Point: 00000000
259 01:58:16.960966 output:
260 01:58:16.962077 rename /var/lib/lava/dispatcher/tmp/964199/extract-overlay-ramdisk-be9gfx0n/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/ramdisk/ramdisk.cpio.gz.uboot
261 01:58:16.962911 end: 1.6.8 compress-ramdisk (duration 00:00:24) [common]
262 01:58:16.963545 end: 1.6 prepare-tftp-overlay (duration 00:00:40) [common]
263 01:58:16.964199 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:59) [common]
264 01:58:16.964737 No LXC device requested
265 01:58:16.965326 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:58:16.965919 start: 1.8 deploy-device-env (timeout 00:08:59) [common]
267 01:58:16.966494 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:58:16.966975 Checking files for TFTP limit of 4294967296 bytes.
269 01:58:16.970030 end: 1 tftp-deploy (duration 00:01:01) [common]
270 01:58:16.970733 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:58:16.971341 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:58:16.971925 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:58:16.972544 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:58:16.973160 Using kernel file from prepare-kernel: 964199/tftp-deploy-ornfxgni/kernel/uImage
275 01:58:16.973880 substitutions:
276 01:58:16.974349 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:58:16.974810 - {DTB_ADDR}: 0x01070000
278 01:58:16.975263 - {DTB}: 964199/tftp-deploy-ornfxgni/dtb/meson-g12b-a311d-libretech-cc.dtb
279 01:58:16.975716 - {INITRD}: 964199/tftp-deploy-ornfxgni/ramdisk/ramdisk.cpio.gz.uboot
280 01:58:16.976210 - {KERNEL_ADDR}: 0x01080000
281 01:58:16.976662 - {KERNEL}: 964199/tftp-deploy-ornfxgni/kernel/uImage
282 01:58:16.977106 - {LAVA_MAC}: None
283 01:58:16.977595 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/964199/extract-nfsrootfs-o96no73v
284 01:58:16.978048 - {NFS_SERVER_IP}: 192.168.6.2
285 01:58:16.978492 - {PRESEED_CONFIG}: None
286 01:58:16.978935 - {PRESEED_LOCAL}: None
287 01:58:16.979376 - {RAMDISK_ADDR}: 0x08000000
288 01:58:16.979814 - {RAMDISK}: 964199/tftp-deploy-ornfxgni/ramdisk/ramdisk.cpio.gz.uboot
289 01:58:16.980292 - {ROOT_PART}: None
290 01:58:16.980740 - {ROOT}: None
291 01:58:16.981182 - {SERVER_IP}: 192.168.6.2
292 01:58:16.981621 - {TEE_ADDR}: 0x83000000
293 01:58:16.982059 - {TEE}: None
294 01:58:16.982499 Parsed boot commands:
295 01:58:16.982929 - setenv autoload no
296 01:58:16.983367 - setenv initrd_high 0xffffffff
297 01:58:16.983805 - setenv fdt_high 0xffffffff
298 01:58:16.984275 - dhcp
299 01:58:16.984714 - setenv serverip 192.168.6.2
300 01:58:16.985152 - tftpboot 0x01080000 964199/tftp-deploy-ornfxgni/kernel/uImage
301 01:58:16.985590 - tftpboot 0x08000000 964199/tftp-deploy-ornfxgni/ramdisk/ramdisk.cpio.gz.uboot
302 01:58:16.986030 - tftpboot 0x01070000 964199/tftp-deploy-ornfxgni/dtb/meson-g12b-a311d-libretech-cc.dtb
303 01:58:16.986468 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/964199/extract-nfsrootfs-o96no73v,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:58:16.986920 - bootm 0x01080000 0x08000000 0x01070000
305 01:58:16.987509 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:58:16.989231 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:58:16.989718 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 01:58:17.006735 Setting prompt string to ['lava-test: # ']
310 01:58:17.008387 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:58:17.009067 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:58:17.009683 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:58:17.010257 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:58:17.011722 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 01:58:17.049581 >> OK - accepted request
316 01:58:17.051515 Returned 0 in 0 seconds
317 01:58:17.152825 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:58:17.154629 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:58:17.155272 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:58:17.155856 Setting prompt string to ['Hit any key to stop autoboot']
322 01:58:17.156442 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:58:17.158162 Trying 192.168.56.21...
324 01:58:17.158697 Connected to conserv1.
325 01:58:17.159184 Escape character is '^]'.
326 01:58:17.159657
327 01:58:17.160177 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 01:58:17.160666
329 01:58:29.075703 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 01:58:29.076441 bl2_stage_init 0x01
331 01:58:29.076957 bl2_stage_init 0x81
332 01:58:29.081289 hw id: 0x0000 - pwm id 0x01
333 01:58:29.081853 bl2_stage_init 0xc1
334 01:58:29.082325 bl2_stage_init 0x02
335 01:58:29.082762
336 01:58:29.086865 L0:00000000
337 01:58:29.087368 L1:20000703
338 01:58:29.087805 L2:00008067
339 01:58:29.088274 L3:14000000
340 01:58:29.092415 B2:00402000
341 01:58:29.092907 B1:e0f83180
342 01:58:29.093356
343 01:58:29.093799 TE: 58124
344 01:58:29.094234
345 01:58:29.098030 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 01:58:29.098527
347 01:58:29.098965 Board ID = 1
348 01:58:29.103626 Set A53 clk to 24M
349 01:58:29.104148 Set A73 clk to 24M
350 01:58:29.104587 Set clk81 to 24M
351 01:58:29.109238 A53 clk: 1200 MHz
352 01:58:29.109743 A73 clk: 1200 MHz
353 01:58:29.110178 CLK81: 166.6M
354 01:58:29.110605 smccc: 00012a92
355 01:58:29.114861 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 01:58:29.120427 board id: 1
357 01:58:29.126324 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:58:29.137025 fw parse done
359 01:58:29.142966 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:58:29.185570 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:58:29.196472 PIEI prepare done
362 01:58:29.196970 fastboot data load
363 01:58:29.197415 fastboot data verify
364 01:58:29.202179 verify result: 266
365 01:58:29.207886 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 01:58:29.208454 LPDDR4 probe
367 01:58:29.208914 ddr clk to 1584MHz
368 01:58:29.215771 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:58:29.253048
370 01:58:29.253595 dmc_version 0001
371 01:58:29.259720 Check phy result
372 01:58:29.265606 INFO : End of CA training
373 01:58:29.266130 INFO : End of initialization
374 01:58:29.271165 INFO : Training has run successfully!
375 01:58:29.271673 Check phy result
376 01:58:29.276799 INFO : End of initialization
377 01:58:29.277305 INFO : End of read enable training
378 01:58:29.280218 INFO : End of fine write leveling
379 01:58:29.285703 INFO : End of Write leveling coarse delay
380 01:58:29.291284 INFO : Training has run successfully!
381 01:58:29.291796 Check phy result
382 01:58:29.292293 INFO : End of initialization
383 01:58:29.296902 INFO : End of read dq deskew training
384 01:58:29.302513 INFO : End of MPR read delay center optimization
385 01:58:29.303043 INFO : End of write delay center optimization
386 01:58:29.308214 INFO : End of read delay center optimization
387 01:58:29.313674 INFO : End of max read latency training
388 01:58:29.314181 INFO : Training has run successfully!
389 01:58:29.319308 1D training succeed
390 01:58:29.325232 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:58:29.372731 Check phy result
392 01:58:29.373300 INFO : End of initialization
393 01:58:29.394523 INFO : End of 2D read delay Voltage center optimization
394 01:58:29.414801 INFO : End of 2D read delay Voltage center optimization
395 01:58:29.466787 INFO : End of 2D write delay Voltage center optimization
396 01:58:29.516247 INFO : End of 2D write delay Voltage center optimization
397 01:58:29.521637 INFO : Training has run successfully!
398 01:58:29.521947
399 01:58:29.522178 channel==0
400 01:58:29.527245 RxClkDly_Margin_A0==78 ps 8
401 01:58:29.527564 TxDqDly_Margin_A0==98 ps 10
402 01:58:29.532841 RxClkDly_Margin_A1==88 ps 9
403 01:58:29.533157 TxDqDly_Margin_A1==98 ps 10
404 01:58:29.533394 TrainedVREFDQ_A0==74
405 01:58:29.538452 TrainedVREFDQ_A1==74
406 01:58:29.538770 VrefDac_Margin_A0==25
407 01:58:29.539004 DeviceVref_Margin_A0==40
408 01:58:29.544088 VrefDac_Margin_A1==25
409 01:58:29.544413 DeviceVref_Margin_A1==40
410 01:58:29.544656
411 01:58:29.544886
412 01:58:29.549647 channel==1
413 01:58:29.549959 RxClkDly_Margin_A0==88 ps 9
414 01:58:29.550195 TxDqDly_Margin_A0==88 ps 9
415 01:58:29.555221 RxClkDly_Margin_A1==98 ps 10
416 01:58:29.555520 TxDqDly_Margin_A1==88 ps 9
417 01:58:29.560872 TrainedVREFDQ_A0==77
418 01:58:29.561176 TrainedVREFDQ_A1==77
419 01:58:29.561407 VrefDac_Margin_A0==23
420 01:58:29.566447 DeviceVref_Margin_A0==37
421 01:58:29.566750 VrefDac_Margin_A1==23
422 01:58:29.572149 DeviceVref_Margin_A1==37
423 01:58:29.572505
424 01:58:29.572746 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:58:29.572977
426 01:58:29.605592 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
427 01:58:29.605970 2D training succeed
428 01:58:29.611193 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:58:29.616802 auto size-- 65535DDR cs0 size: 2048MB
430 01:58:29.617093 DDR cs1 size: 2048MB
431 01:58:29.622396 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:58:29.622682 cs0 DataBus test pass
433 01:58:29.628041 cs1 DataBus test pass
434 01:58:29.628329 cs0 AddrBus test pass
435 01:58:29.628567 cs1 AddrBus test pass
436 01:58:29.628801
437 01:58:29.633581 100bdlr_step_size ps== 420
438 01:58:29.633877 result report
439 01:58:29.639164 boot times 0Enable ddr reg access
440 01:58:29.644494 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:58:29.657992 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 01:58:30.231628 0.0;M3 CHK:0;cm4_sp_mode 0
443 01:58:30.232347 MVN_1=0x00000000
444 01:58:30.237221 MVN_2=0x00000000
445 01:58:30.242985 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 01:58:30.243524 OPS=0x10
447 01:58:30.243977 ring efuse init
448 01:58:30.244470 chipver efuse init
449 01:58:30.251131 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 01:58:30.251685 [0.018960 Inits done]
451 01:58:30.258695 secure task start!
452 01:58:30.259224 high task start!
453 01:58:30.259666 low task start!
454 01:58:30.260140 run into bl31
455 01:58:30.265384 NOTICE: BL31: v1.3(release):4fc40b1
456 01:58:30.273280 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 01:58:30.273820 NOTICE: BL31: G12A normal boot!
458 01:58:30.298587 NOTICE: BL31: BL33 decompress pass
459 01:58:30.303359 ERROR: Error initializing runtime service opteed_fast
460 01:58:31.537025
461 01:58:31.537623
462 01:58:31.545410 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 01:58:31.545774
464 01:58:31.546035 Model: Libre Computer AML-A311D-CC Alta
465 01:58:31.753982 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 01:58:31.777412 DRAM: 2 GiB (effective 3.8 GiB)
467 01:58:31.920346 Core: 408 devices, 31 uclasses, devicetree: separate
468 01:58:31.926285 WDT: Not starting watchdog@f0d0
469 01:58:31.958513 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 01:58:31.970844 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 01:58:31.975818 ** Bad device specification mmc 0 **
472 01:58:31.986224 Card did not respond to voltage select! : -110
473 01:58:31.993405 ** Bad device specification mmc 0 **
474 01:58:31.993711 Couldn't find partition mmc 0
475 01:58:32.002180 Card did not respond to voltage select! : -110
476 01:58:32.007615 ** Bad device specification mmc 0 **
477 01:58:32.008035 Couldn't find partition mmc 0
478 01:58:32.012737 Error: could not access storage.
479 01:58:33.275663 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
480 01:58:33.276420 bl2_stage_init 0x81
481 01:58:33.281100 hw id: 0x0000 - pwm id 0x01
482 01:58:33.281602 bl2_stage_init 0xc1
483 01:58:33.282051 bl2_stage_init 0x02
484 01:58:33.282505
485 01:58:33.286919 L0:00000000
486 01:58:33.287426 L1:20000703
487 01:58:33.287867 L2:00008067
488 01:58:33.288364 L3:14000000
489 01:58:33.288804 B2:00402000
490 01:58:33.292492 B1:e0f83180
491 01:58:33.292969
492 01:58:33.293408 TE: 58150
493 01:58:33.293845
494 01:58:33.297884 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 01:58:33.298364
496 01:58:33.298806 Board ID = 1
497 01:58:33.303543 Set A53 clk to 24M
498 01:58:33.304040 Set A73 clk to 24M
499 01:58:33.304482 Set clk81 to 24M
500 01:58:33.309268 A53 clk: 1200 MHz
501 01:58:33.309757 A73 clk: 1200 MHz
502 01:58:33.310196 CLK81: 166.6M
503 01:58:33.310631 smccc: 00012aac
504 01:58:33.314725 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 01:58:33.320239 board id: 1
506 01:58:33.325062 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 01:58:33.336790 fw parse done
508 01:58:33.341654 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 01:58:33.384429 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 01:58:33.396122 PIEI prepare done
511 01:58:33.396405 fastboot data load
512 01:58:33.396635 fastboot data verify
513 01:58:33.401630 verify result: 266
514 01:58:33.407263 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 01:58:33.407529 LPDDR4 probe
516 01:58:33.407748 ddr clk to 1584MHz
517 01:58:33.414272 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 01:58:33.452480
519 01:58:33.452817 dmc_version 0001
520 01:58:33.459109 Check phy result
521 01:58:33.464960 INFO : End of CA training
522 01:58:33.465222 INFO : End of initialization
523 01:58:33.470553 INFO : Training has run successfully!
524 01:58:33.470804 Check phy result
525 01:58:33.476183 INFO : End of initialization
526 01:58:33.476443 INFO : End of read enable training
527 01:58:33.481768 INFO : End of fine write leveling
528 01:58:33.487380 INFO : End of Write leveling coarse delay
529 01:58:33.487637 INFO : Training has run successfully!
530 01:58:33.487858 Check phy result
531 01:58:33.492989 INFO : End of initialization
532 01:58:33.493279 INFO : End of read dq deskew training
533 01:58:33.498585 INFO : End of MPR read delay center optimization
534 01:58:33.504272 INFO : End of write delay center optimization
535 01:58:33.509790 INFO : End of read delay center optimization
536 01:58:33.510075 INFO : End of max read latency training
537 01:58:33.515395 INFO : Training has run successfully!
538 01:58:33.515667 1D training succeed
539 01:58:33.524644 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 01:58:33.572296 Check phy result
541 01:58:33.572681 INFO : End of initialization
542 01:58:33.594757 INFO : End of 2D read delay Voltage center optimization
543 01:58:33.614827 INFO : End of 2D read delay Voltage center optimization
544 01:58:33.666745 INFO : End of 2D write delay Voltage center optimization
545 01:58:33.716046 INFO : End of 2D write delay Voltage center optimization
546 01:58:33.721613 INFO : Training has run successfully!
547 01:58:33.722073
548 01:58:33.722490 channel==0
549 01:58:33.727055 RxClkDly_Margin_A0==88 ps 9
550 01:58:33.727523 TxDqDly_Margin_A0==98 ps 10
551 01:58:33.732675 RxClkDly_Margin_A1==88 ps 9
552 01:58:33.733115 TxDqDly_Margin_A1==98 ps 10
553 01:58:33.733524 TrainedVREFDQ_A0==74
554 01:58:33.738301 TrainedVREFDQ_A1==74
555 01:58:33.738746 VrefDac_Margin_A0==24
556 01:58:33.739146 DeviceVref_Margin_A0==40
557 01:58:33.743957 VrefDac_Margin_A1==25
558 01:58:33.744427 DeviceVref_Margin_A1==40
559 01:58:33.744826
560 01:58:33.745221
561 01:58:33.749640 channel==1
562 01:58:33.750085 RxClkDly_Margin_A0==98 ps 10
563 01:58:33.750483 TxDqDly_Margin_A0==98 ps 10
564 01:58:33.755096 RxClkDly_Margin_A1==88 ps 9
565 01:58:33.755566 TxDqDly_Margin_A1==88 ps 9
566 01:58:33.760691 TrainedVREFDQ_A0==77
567 01:58:33.761191 TrainedVREFDQ_A1==77
568 01:58:33.761597 VrefDac_Margin_A0==22
569 01:58:33.766296 DeviceVref_Margin_A0==37
570 01:58:33.766805 VrefDac_Margin_A1==24
571 01:58:33.771898 DeviceVref_Margin_A1==37
572 01:58:33.772429
573 01:58:33.772851 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 01:58:33.773267
575 01:58:33.805515 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
576 01:58:33.805886 2D training succeed
577 01:58:33.811109 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 01:58:33.816669 auto size-- 65535DDR cs0 size: 2048MB
579 01:58:33.817155 DDR cs1 size: 2048MB
580 01:58:33.822331 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 01:58:33.822856 cs0 DataBus test pass
582 01:58:33.827905 cs1 DataBus test pass
583 01:58:33.828433 cs0 AddrBus test pass
584 01:58:33.828842 cs1 AddrBus test pass
585 01:58:33.829235
586 01:58:33.833668 100bdlr_step_size ps== 420
587 01:58:33.834188 result report
588 01:58:33.839113 boot times 0Enable ddr reg access
589 01:58:33.844529 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 01:58:33.857958 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 01:58:34.430118 0.0;M3 CHK:0;cm4_sp_mode 0
592 01:58:34.430784 MVN_1=0x00000000
593 01:58:34.435626 MVN_2=0x00000000
594 01:58:34.441328 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 01:58:34.441870 OPS=0x10
596 01:58:34.442321 ring efuse init
597 01:58:34.442776 chipver efuse init
598 01:58:34.446922 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 01:58:34.452594 [0.018960 Inits done]
600 01:58:34.453142 secure task start!
601 01:58:34.453585 high task start!
602 01:58:34.457107 low task start!
603 01:58:34.457632 run into bl31
604 01:58:34.463863 NOTICE: BL31: v1.3(release):4fc40b1
605 01:58:34.471548 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 01:58:34.472121 NOTICE: BL31: G12A normal boot!
607 01:58:34.497019 NOTICE: BL31: BL33 decompress pass
608 01:58:34.502723 ERROR: Error initializing runtime service opteed_fast
609 01:58:35.735622
610 01:58:35.736322
611 01:58:35.744129 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 01:58:35.744671
613 01:58:35.745141 Model: Libre Computer AML-A311D-CC Alta
614 01:58:35.951526 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 01:58:35.975790 DRAM: 2 GiB (effective 3.8 GiB)
616 01:58:36.118804 Core: 408 devices, 31 uclasses, devicetree: separate
617 01:58:36.124678 WDT: Not starting watchdog@f0d0
618 01:58:36.156925 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 01:58:36.169313 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 01:58:36.174256 ** Bad device specification mmc 0 **
621 01:58:36.184608 Card did not respond to voltage select! : -110
622 01:58:36.192382 ** Bad device specification mmc 0 **
623 01:58:36.192963 Couldn't find partition mmc 0
624 01:58:36.200705 Card did not respond to voltage select! : -110
625 01:58:36.206196 ** Bad device specification mmc 0 **
626 01:58:36.206804 Couldn't find partition mmc 0
627 01:58:36.211189 Error: could not access storage.
628 01:58:36.553753 Net: eth0: ethernet@ff3f0000
629 01:58:36.554409 starting USB...
630 01:58:36.805569 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 01:58:36.806227 Starting the controller
632 01:58:36.812418 USB XHCI 1.10
633 01:58:38.526958 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
634 01:58:38.527632 bl2_stage_init 0x01
635 01:58:38.528164 bl2_stage_init 0x81
636 01:58:38.532641 hw id: 0x0000 - pwm id 0x01
637 01:58:38.533192 bl2_stage_init 0xc1
638 01:58:38.533653 bl2_stage_init 0x02
639 01:58:38.534102
640 01:58:38.538054 L0:00000000
641 01:58:38.538604 L1:20000703
642 01:58:38.539069 L2:00008067
643 01:58:38.539515 L3:14000000
644 01:58:38.543727 B2:00402000
645 01:58:38.544324 B1:e0f83180
646 01:58:38.544784
647 01:58:38.545239 TE: 58124
648 01:58:38.545687
649 01:58:38.549454 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 01:58:38.549986
651 01:58:38.550445 Board ID = 1
652 01:58:38.554906 Set A53 clk to 24M
653 01:58:38.555429 Set A73 clk to 24M
654 01:58:38.555883 Set clk81 to 24M
655 01:58:38.560605 A53 clk: 1200 MHz
656 01:58:38.561123 A73 clk: 1200 MHz
657 01:58:38.561600 CLK81: 166.6M
658 01:58:38.562048 smccc: 00012a92
659 01:58:38.566066 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 01:58:38.571725 board id: 1
661 01:58:38.577422 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 01:58:38.588115 fw parse done
663 01:58:38.594034 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 01:58:38.636675 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 01:58:38.647581 PIEI prepare done
666 01:58:38.648148 fastboot data load
667 01:58:38.648617 fastboot data verify
668 01:58:38.653454 verify result: 266
669 01:58:38.658819 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 01:58:38.659336 LPDDR4 probe
671 01:58:38.659790 ddr clk to 1584MHz
672 01:58:38.666783 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 01:58:38.704111
674 01:58:38.704682 dmc_version 0001
675 01:58:38.710802 Check phy result
676 01:58:38.716641 INFO : End of CA training
677 01:58:38.717170 INFO : End of initialization
678 01:58:38.722351 INFO : Training has run successfully!
679 01:58:38.722866 Check phy result
680 01:58:38.727864 INFO : End of initialization
681 01:58:38.728425 INFO : End of read enable training
682 01:58:38.731237 INFO : End of fine write leveling
683 01:58:38.736747 INFO : End of Write leveling coarse delay
684 01:58:38.742344 INFO : Training has run successfully!
685 01:58:38.742870 Check phy result
686 01:58:38.743331 INFO : End of initialization
687 01:58:38.748032 INFO : End of read dq deskew training
688 01:58:38.753550 INFO : End of MPR read delay center optimization
689 01:58:38.754069 INFO : End of write delay center optimization
690 01:58:38.759166 INFO : End of read delay center optimization
691 01:58:38.764731 INFO : End of max read latency training
692 01:58:38.765247 INFO : Training has run successfully!
693 01:58:38.770356 1D training succeed
694 01:58:38.776290 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 01:58:38.823857 Check phy result
696 01:58:38.824470 INFO : End of initialization
697 01:58:38.845586 INFO : End of 2D read delay Voltage center optimization
698 01:58:38.865771 INFO : End of 2D read delay Voltage center optimization
699 01:58:38.917438 INFO : End of 2D write delay Voltage center optimization
700 01:58:38.967196 INFO : End of 2D write delay Voltage center optimization
701 01:58:38.972819 INFO : Training has run successfully!
702 01:58:38.973333
703 01:58:38.973797 channel==0
704 01:58:38.978360 RxClkDly_Margin_A0==88 ps 9
705 01:58:38.978913 TxDqDly_Margin_A0==98 ps 10
706 01:58:38.983938 RxClkDly_Margin_A1==88 ps 9
707 01:58:38.984490 TxDqDly_Margin_A1==98 ps 10
708 01:58:38.984952 TrainedVREFDQ_A0==74
709 01:58:38.989509 TrainedVREFDQ_A1==74
710 01:58:38.990032 VrefDac_Margin_A0==25
711 01:58:38.990486 DeviceVref_Margin_A0==40
712 01:58:38.995094 VrefDac_Margin_A1==25
713 01:58:38.995609 DeviceVref_Margin_A1==40
714 01:58:38.996095
715 01:58:38.996542
716 01:58:39.000707 channel==1
717 01:58:39.001220 RxClkDly_Margin_A0==98 ps 10
718 01:58:39.001669 TxDqDly_Margin_A0==98 ps 10
719 01:58:39.006387 RxClkDly_Margin_A1==98 ps 10
720 01:58:39.006905 TxDqDly_Margin_A1==88 ps 9
721 01:58:39.011934 TrainedVREFDQ_A0==77
722 01:58:39.012496 TrainedVREFDQ_A1==77
723 01:58:39.012955 VrefDac_Margin_A0==23
724 01:58:39.017560 DeviceVref_Margin_A0==37
725 01:58:39.018092 VrefDac_Margin_A1==22
726 01:58:39.023122 DeviceVref_Margin_A1==37
727 01:58:39.023665
728 01:58:39.024169 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 01:58:39.028752
730 01:58:39.056704 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
731 01:58:39.057328 2D training succeed
732 01:58:39.062366 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 01:58:39.068039 auto size-- 65535DDR cs0 size: 2048MB
734 01:58:39.068580 DDR cs1 size: 2048MB
735 01:58:39.073580 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 01:58:39.074098 cs0 DataBus test pass
737 01:58:39.079098 cs1 DataBus test pass
738 01:58:39.079620 cs0 AddrBus test pass
739 01:58:39.080114 cs1 AddrBus test pass
740 01:58:39.080566
741 01:58:39.084753 100bdlr_step_size ps== 420
742 01:58:39.085308 result report
743 01:58:39.090427 boot times 0Enable ddr reg access
744 01:58:39.095720 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 01:58:39.109267 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 01:58:39.682899 0.0;M3 CHK:0;cm4_sp_mode 0
747 01:58:39.683575 MVN_1=0x00000000
748 01:58:39.688394 MVN_2=0x00000000
749 01:58:39.694164 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 01:58:39.694730 OPS=0x10
751 01:58:39.695177 ring efuse init
752 01:58:39.695614 chipver efuse init
753 01:58:39.699729 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 01:58:39.705341 [0.018960 Inits done]
755 01:58:39.705849 secure task start!
756 01:58:39.706297 high task start!
757 01:58:39.709897 low task start!
758 01:58:39.710394 run into bl31
759 01:58:39.716534 NOTICE: BL31: v1.3(release):4fc40b1
760 01:58:39.724397 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 01:58:39.724914 NOTICE: BL31: G12A normal boot!
762 01:58:39.749716 NOTICE: BL31: BL33 decompress pass
763 01:58:39.755431 ERROR: Error initializing runtime service opteed_fast
764 01:58:40.988405
765 01:58:40.989083
766 01:58:40.996764 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 01:58:40.997332
768 01:58:40.997800 Model: Libre Computer AML-A311D-CC Alta
769 01:58:41.205506 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 01:58:41.229281 DRAM: 2 GiB (effective 3.8 GiB)
771 01:58:41.371612 Core: 408 devices, 31 uclasses, devicetree: separate
772 01:58:41.377439 WDT: Not starting watchdog@f0d0
773 01:58:41.409688 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 01:58:41.422045 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 01:58:41.427025 ** Bad device specification mmc 0 **
776 01:58:41.437457 Card did not respond to voltage select! : -110
777 01:58:41.445040 ** Bad device specification mmc 0 **
778 01:58:41.445455 Couldn't find partition mmc 0
779 01:58:41.453435 Card did not respond to voltage select! : -110
780 01:58:41.458884 ** Bad device specification mmc 0 **
781 01:58:41.459439 Couldn't find partition mmc 0
782 01:58:41.463561 Error: could not access storage.
783 01:58:41.806502 Net: eth0: ethernet@ff3f0000
784 01:58:41.807194 starting USB...
785 01:58:42.058314 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 01:58:42.058999 Starting the controller
787 01:58:42.065375 USB XHCI 1.10
788 01:58:44.225440 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 01:58:44.226085 bl2_stage_init 0x01
790 01:58:44.226562 bl2_stage_init 0x81
791 01:58:44.231149 hw id: 0x0000 - pwm id 0x01
792 01:58:44.231665 bl2_stage_init 0xc1
793 01:58:44.232182 bl2_stage_init 0x02
794 01:58:44.232643
795 01:58:44.236661 L0:00000000
796 01:58:44.237172 L1:20000703
797 01:58:44.237631 L2:00008067
798 01:58:44.238080 L3:14000000
799 01:58:44.242187 B2:00402000
800 01:58:44.242703 B1:e0f83180
801 01:58:44.243159
802 01:58:44.243607 TE: 58124
803 01:58:44.244094
804 01:58:44.247744 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 01:58:44.248293
806 01:58:44.248755 Board ID = 1
807 01:58:44.253305 Set A53 clk to 24M
808 01:58:44.253815 Set A73 clk to 24M
809 01:58:44.254268 Set clk81 to 24M
810 01:58:44.259105 A53 clk: 1200 MHz
811 01:58:44.259616 A73 clk: 1200 MHz
812 01:58:44.260107 CLK81: 166.6M
813 01:58:44.260562 smccc: 00012a92
814 01:58:44.264479 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 01:58:44.270050 board id: 1
816 01:58:44.275118 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 01:58:44.286584 fw parse done
818 01:58:44.292506 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 01:58:44.334270 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 01:58:44.346160 PIEI prepare done
821 01:58:44.346691 fastboot data load
822 01:58:44.347157 fastboot data verify
823 01:58:44.351899 verify result: 266
824 01:58:44.357450 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 01:58:44.357966 LPDDR4 probe
826 01:58:44.358427 ddr clk to 1584MHz
827 01:58:44.364317 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 01:58:44.402757
829 01:58:44.403337 dmc_version 0001
830 01:58:44.408430 Check phy result
831 01:58:44.415239 INFO : End of CA training
832 01:58:44.415779 INFO : End of initialization
833 01:58:44.420821 INFO : Training has run successfully!
834 01:58:44.421329 Check phy result
835 01:58:44.426499 INFO : End of initialization
836 01:58:44.427006 INFO : End of read enable training
837 01:58:44.429685 INFO : End of fine write leveling
838 01:58:44.435287 INFO : End of Write leveling coarse delay
839 01:58:44.440851 INFO : Training has run successfully!
840 01:58:44.441361 Check phy result
841 01:58:44.441819 INFO : End of initialization
842 01:58:44.446518 INFO : End of read dq deskew training
843 01:58:44.449853 INFO : End of MPR read delay center optimization
844 01:58:44.455374 INFO : End of write delay center optimization
845 01:58:44.461032 INFO : End of read delay center optimization
846 01:58:44.461540 INFO : End of max read latency training
847 01:58:44.466552 INFO : Training has run successfully!
848 01:58:44.467060 1D training succeed
849 01:58:44.474798 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 01:58:44.521470 Check phy result
851 01:58:44.522074 INFO : End of initialization
852 01:58:44.543044 INFO : End of 2D read delay Voltage center optimization
853 01:58:44.563139 INFO : End of 2D read delay Voltage center optimization
854 01:58:44.615025 INFO : End of 2D write delay Voltage center optimization
855 01:58:44.665275 INFO : End of 2D write delay Voltage center optimization
856 01:58:44.670834 INFO : Training has run successfully!
857 01:58:44.671359
858 01:58:44.671821 channel==0
859 01:58:44.676498 RxClkDly_Margin_A0==88 ps 9
860 01:58:44.677012 TxDqDly_Margin_A0==98 ps 10
861 01:58:44.679762 RxClkDly_Margin_A1==88 ps 9
862 01:58:44.680302 TxDqDly_Margin_A1==98 ps 10
863 01:58:44.685315 TrainedVREFDQ_A0==74
864 01:58:44.685827 TrainedVREFDQ_A1==74
865 01:58:44.690944 VrefDac_Margin_A0==25
866 01:58:44.691496 DeviceVref_Margin_A0==40
867 01:58:44.691961 VrefDac_Margin_A1==25
868 01:58:44.696493 DeviceVref_Margin_A1==40
869 01:58:44.697009
870 01:58:44.697447
871 01:58:44.697882 channel==1
872 01:58:44.698312 RxClkDly_Margin_A0==98 ps 10
873 01:58:44.699813 TxDqDly_Margin_A0==98 ps 10
874 01:58:44.705441 RxClkDly_Margin_A1==98 ps 10
875 01:58:44.705939 TxDqDly_Margin_A1==88 ps 9
876 01:58:44.711057 TrainedVREFDQ_A0==77
877 01:58:44.711572 TrainedVREFDQ_A1==77
878 01:58:44.712054 VrefDac_Margin_A0==22
879 01:58:44.716562 DeviceVref_Margin_A0==37
880 01:58:44.717063 VrefDac_Margin_A1==23
881 01:58:44.717498 DeviceVref_Margin_A1==37
882 01:58:44.717929
883 01:58:44.725440 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 01:58:44.725949
885 01:58:44.756849 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
886 01:58:44.757426 2D training succeed
887 01:58:44.762417 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 01:58:44.768080 auto size-- 65535DDR cs0 size: 2048MB
889 01:58:44.768589 DDR cs1 size: 2048MB
890 01:58:44.773595 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 01:58:44.774091 cs0 DataBus test pass
892 01:58:44.774528 cs1 DataBus test pass
893 01:58:44.779237 cs0 AddrBus test pass
894 01:58:44.779732 cs1 AddrBus test pass
895 01:58:44.780222
896 01:58:44.780662 100bdlr_step_size ps== 420
897 01:58:44.784827 result report
898 01:58:44.785420 boot times 0Enable ddr reg access
899 01:58:44.792825 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 01:58:44.807072 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 01:58:45.379360 0.0;M3 CHK:0;cm4_sp_mode 0
902 01:58:45.380100 MVN_1=0x00000000
903 01:58:45.384821 MVN_2=0x00000000
904 01:58:45.390595 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 01:58:45.391117 OPS=0x10
906 01:58:45.391578 ring efuse init
907 01:58:45.392058 chipver efuse init
908 01:58:45.396134 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 01:58:45.401751 [0.018960 Inits done]
910 01:58:45.402261 secure task start!
911 01:58:45.402717 high task start!
912 01:58:45.405382 low task start!
913 01:58:45.405889 run into bl31
914 01:58:45.413068 NOTICE: BL31: v1.3(release):4fc40b1
915 01:58:45.419936 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 01:58:45.420506 NOTICE: BL31: G12A normal boot!
917 01:58:45.446193 NOTICE: BL31: BL33 decompress pass
918 01:58:45.450803 ERROR: Error initializing runtime service opteed_fast
919 01:58:46.684692
920 01:58:46.685353
921 01:58:46.693064 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 01:58:46.693585
923 01:58:46.694047 Model: Libre Computer AML-A311D-CC Alta
924 01:58:46.900671 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 01:58:46.923933 DRAM: 2 GiB (effective 3.8 GiB)
926 01:58:47.067929 Core: 408 devices, 31 uclasses, devicetree: separate
927 01:58:47.073720 WDT: Not starting watchdog@f0d0
928 01:58:47.105995 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 01:58:47.118406 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 01:58:47.123467 ** Bad device specification mmc 0 **
931 01:58:47.133758 Card did not respond to voltage select! : -110
932 01:58:47.141461 ** Bad device specification mmc 0 **
933 01:58:47.141983 Couldn't find partition mmc 0
934 01:58:47.149772 Card did not respond to voltage select! : -110
935 01:58:47.155266 ** Bad device specification mmc 0 **
936 01:58:47.155774 Couldn't find partition mmc 0
937 01:58:47.160355 Error: could not access storage.
938 01:58:47.502837 Net: eth0: ethernet@ff3f0000
939 01:58:47.503483 starting USB...
940 01:58:47.754710 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 01:58:47.755317 Starting the controller
942 01:58:47.761573 USB XHCI 1.10
943 01:58:49.315976 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 01:58:49.323484 scanning usb for storage devices... 0 Storage Device(s) found
946 01:58:49.375188 Hit any key to stop autoboot: 1
947 01:58:49.376398 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 01:58:49.377105 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 01:58:49.377668 Setting prompt string to ['=>']
950 01:58:49.378206 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 01:58:49.390973 0
952 01:58:49.392024 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 01:58:49.392586 Sending with 10 millisecond of delay
955 01:58:50.527901 => setenv autoload no
956 01:58:50.538814 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
957 01:58:50.544270 setenv autoload no
958 01:58:50.545062 Sending with 10 millisecond of delay
960 01:58:52.342694 => setenv initrd_high 0xffffffff
961 01:58:52.353601 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 01:58:52.354154 setenv initrd_high 0xffffffff
963 01:58:52.354647 Sending with 10 millisecond of delay
965 01:58:53.970980 => setenv fdt_high 0xffffffff
966 01:58:53.981807 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
967 01:58:53.982696 setenv fdt_high 0xffffffff
968 01:58:53.983463 Sending with 10 millisecond of delay
970 01:58:54.275463 => dhcp
971 01:58:54.286362 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 01:58:54.287259 dhcp
973 01:58:54.287743 Speed: 1000, full duplex
974 01:58:54.288252 BOOTP broadcast 1
975 01:58:54.297234 DHCP client bound to address 192.168.6.27 (11 ms)
976 01:58:54.298017 Sending with 10 millisecond of delay
978 01:58:55.974797 => setenv serverip 192.168.6.2
979 01:58:55.985634 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
980 01:58:55.986601 setenv serverip 192.168.6.2
981 01:58:55.987344 Sending with 10 millisecond of delay
983 01:58:59.712302 => tftpboot 0x01080000 964199/tftp-deploy-ornfxgni/kernel/uImage
984 01:58:59.723060 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
985 01:58:59.723847 tftpboot 0x01080000 964199/tftp-deploy-ornfxgni/kernel/uImage
986 01:58:59.724342 Speed: 1000, full duplex
987 01:58:59.724764 Using ethernet@ff3f0000 device
988 01:58:59.725772 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 01:58:59.731281 Filename '964199/tftp-deploy-ornfxgni/kernel/uImage'.
990 01:58:59.735210 Load address: 0x1080000
991 01:59:03.929769 Loading: *###################
992 01:59:03.930358 TFTP error: trying to overwrite reserved memory...
994 01:59:03.931757 end: 2.4.3 bootloader-commands (duration 00:00:15) [common]
997 01:59:03.933635 end: 2.4 uboot-commands (duration 00:00:47) [common]
999 01:59:03.935102 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
1001 01:59:03.936277 end: 2 uboot-action (duration 00:00:47) [common]
1003 01:59:03.937848 Cleaning after the job
1004 01:59:03.938385 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/ramdisk
1005 01:59:03.966990 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/kernel
1006 01:59:04.019831 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/dtb
1007 01:59:04.020756 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/nfsrootfs
1008 01:59:04.182656 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964199/tftp-deploy-ornfxgni/modules
1009 01:59:04.243553 start: 4.1 power-off (timeout 00:00:30) [common]
1010 01:59:04.244270 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1011 01:59:04.277747 >> OK - accepted request
1012 01:59:04.279883 Returned 0 in 0 seconds
1013 01:59:04.380736 end: 4.1 power-off (duration 00:00:00) [common]
1015 01:59:04.382507 start: 4.2 read-feedback (timeout 00:10:00) [common]
1016 01:59:04.383693 Listened to connection for namespace 'common' for up to 1s
1017 01:59:05.384381 Finalising connection for namespace 'common'
1018 01:59:05.384871 Disconnecting from shell: Finalise
1019 01:59:05.385159 =>
1020 01:59:05.485858 end: 4.2 read-feedback (duration 00:00:01) [common]
1021 01:59:05.486281 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/964199
1022 01:59:07.344238 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/964199
1023 01:59:07.344883 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.