Boot log: meson-sm1-s905d3-libretech-cc

    1 02:02:36.722201  lava-dispatcher, installed at version: 2024.01
    2 02:02:36.723015  start: 0 validate
    3 02:02:36.723506  Start time: 2024-11-09 02:02:36.723475+00:00 (UTC)
    4 02:02:36.724105  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 02:02:36.724661  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 02:02:36.771318  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 02:02:36.771879  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-272-gda4373fbcf006%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
    8 02:02:36.804927  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 02:02:36.805653  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-272-gda4373fbcf006%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 02:02:36.835211  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 02:02:36.835737  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 02:02:36.865603  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 02:02:36.866142  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-272-gda4373fbcf006%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
   14 02:02:36.902465  validate duration: 0.18
   16 02:02:36.903385  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 02:02:36.903893  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 02:02:36.904726  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 02:02:36.905392  Not decompressing ramdisk as can be used compressed.
   20 02:02:36.905854  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
   21 02:02:36.906162  saving as /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/ramdisk/initrd.cpio.gz
   22 02:02:36.906456  total size: 5628182 (5 MB)
   23 02:02:36.939470  progress   0 % (0 MB)
   24 02:02:36.944427  progress   5 % (0 MB)
   25 02:02:36.949635  progress  10 % (0 MB)
   26 02:02:36.954312  progress  15 % (0 MB)
   27 02:02:36.959026  progress  20 % (1 MB)
   28 02:02:36.963311  progress  25 % (1 MB)
   29 02:02:36.968649  progress  30 % (1 MB)
   30 02:02:36.973223  progress  35 % (1 MB)
   31 02:02:36.977323  progress  40 % (2 MB)
   32 02:02:36.982019  progress  45 % (2 MB)
   33 02:02:36.986201  progress  50 % (2 MB)
   34 02:02:36.990676  progress  55 % (2 MB)
   35 02:02:36.995268  progress  60 % (3 MB)
   36 02:02:36.999302  progress  65 % (3 MB)
   37 02:02:37.003795  progress  70 % (3 MB)
   38 02:02:37.007787  progress  75 % (4 MB)
   39 02:02:37.012368  progress  80 % (4 MB)
   40 02:02:37.016454  progress  85 % (4 MB)
   41 02:02:37.020954  progress  90 % (4 MB)
   42 02:02:37.025209  progress  95 % (5 MB)
   43 02:02:37.028874  progress 100 % (5 MB)
   44 02:02:37.029683  5 MB downloaded in 0.12 s (43.57 MB/s)
   45 02:02:37.030376  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 02:02:37.031527  end: 1.1 download-retry (duration 00:00:00) [common]
   48 02:02:37.031955  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 02:02:37.032376  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 02:02:37.032962  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-272-gda4373fbcf006/arm64/defconfig+debug/gcc-12/kernel/Image
   51 02:02:37.033295  saving as /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/kernel/Image
   52 02:02:37.033574  total size: 169937408 (162 MB)
   53 02:02:37.033853  No compression specified
   54 02:02:37.068831  progress   0 % (0 MB)
   55 02:02:37.175008  progress   5 % (8 MB)
   56 02:02:37.289784  progress  10 % (16 MB)
   57 02:02:37.397247  progress  15 % (24 MB)
   58 02:02:37.506849  progress  20 % (32 MB)
   59 02:02:37.613178  progress  25 % (40 MB)
   60 02:02:37.729223  progress  30 % (48 MB)
   61 02:02:37.835506  progress  35 % (56 MB)
   62 02:02:37.941618  progress  40 % (64 MB)
   63 02:02:38.048789  progress  45 % (72 MB)
   64 02:02:38.156529  progress  50 % (81 MB)
   65 02:02:38.262038  progress  55 % (89 MB)
   66 02:02:38.367634  progress  60 % (97 MB)
   67 02:02:38.472904  progress  65 % (105 MB)
   68 02:02:38.577827  progress  70 % (113 MB)
   69 02:02:38.682743  progress  75 % (121 MB)
   70 02:02:38.787999  progress  80 % (129 MB)
   71 02:02:38.893319  progress  85 % (137 MB)
   72 02:02:38.999472  progress  90 % (145 MB)
   73 02:02:39.106410  progress  95 % (153 MB)
   74 02:02:39.212999  progress 100 % (162 MB)
   75 02:02:39.213548  162 MB downloaded in 2.18 s (74.34 MB/s)
   76 02:02:39.214066  end: 1.2.1 http-download (duration 00:00:02) [common]
   78 02:02:39.214967  end: 1.2 download-retry (duration 00:00:02) [common]
   79 02:02:39.215281  start: 1.3 download-retry (timeout 00:09:58) [common]
   80 02:02:39.215576  start: 1.3.1 http-download (timeout 00:09:58) [common]
   81 02:02:39.216080  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-272-gda4373fbcf006/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 02:02:39.216368  saving as /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 02:02:39.216596  total size: 53209 (0 MB)
   84 02:02:39.216827  No compression specified
   85 02:02:39.255447  progress  61 % (0 MB)
   86 02:02:39.256444  progress 100 % (0 MB)
   87 02:02:39.257031  0 MB downloaded in 0.04 s (1.26 MB/s)
   88 02:02:39.257519  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 02:02:39.258373  end: 1.3 download-retry (duration 00:00:00) [common]
   91 02:02:39.258645  start: 1.4 download-retry (timeout 00:09:58) [common]
   92 02:02:39.258914  start: 1.4.1 http-download (timeout 00:09:58) [common]
   93 02:02:39.259403  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
   94 02:02:39.259667  saving as /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/nfsrootfs/full.rootfs.tar
   95 02:02:39.259876  total size: 107552908 (102 MB)
   96 02:02:39.260114  Using unxz to decompress xz
   97 02:02:39.298223  progress   0 % (0 MB)
   98 02:02:39.969828  progress   5 % (5 MB)
   99 02:02:40.697327  progress  10 % (10 MB)
  100 02:02:41.424099  progress  15 % (15 MB)
  101 02:02:42.190648  progress  20 % (20 MB)
  102 02:02:42.763482  progress  25 % (25 MB)
  103 02:02:43.388264  progress  30 % (30 MB)
  104 02:02:44.215483  progress  35 % (35 MB)
  105 02:02:44.563759  progress  40 % (41 MB)
  106 02:02:44.992506  progress  45 % (46 MB)
  107 02:02:45.691561  progress  50 % (51 MB)
  108 02:02:46.381336  progress  55 % (56 MB)
  109 02:02:47.153403  progress  60 % (61 MB)
  110 02:02:47.939712  progress  65 % (66 MB)
  111 02:02:48.728818  progress  70 % (71 MB)
  112 02:02:49.558582  progress  75 % (76 MB)
  113 02:02:50.284303  progress  80 % (82 MB)
  114 02:02:51.027088  progress  85 % (87 MB)
  115 02:02:51.807335  progress  90 % (92 MB)
  116 02:02:52.552279  progress  95 % (97 MB)
  117 02:02:53.354925  progress 100 % (102 MB)
  118 02:02:53.367851  102 MB downloaded in 14.11 s (7.27 MB/s)
  119 02:02:53.368536  end: 1.4.1 http-download (duration 00:00:14) [common]
  121 02:02:53.369412  end: 1.4 download-retry (duration 00:00:14) [common]
  122 02:02:53.369692  start: 1.5 download-retry (timeout 00:09:44) [common]
  123 02:02:53.369963  start: 1.5.1 http-download (timeout 00:09:44) [common]
  124 02:02:53.370597  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-272-gda4373fbcf006/arm64/defconfig+debug/gcc-12/modules.tar.xz
  125 02:02:53.370884  saving as /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/modules/modules.tar
  126 02:02:53.371098  total size: 27651088 (26 MB)
  127 02:02:53.371316  Using unxz to decompress xz
  128 02:02:53.414860  progress   0 % (0 MB)
  129 02:02:53.607274  progress   5 % (1 MB)
  130 02:02:53.806630  progress  10 % (2 MB)
  131 02:02:54.036975  progress  15 % (3 MB)
  132 02:02:54.271664  progress  20 % (5 MB)
  133 02:02:54.472167  progress  25 % (6 MB)
  134 02:02:54.683578  progress  30 % (7 MB)
  135 02:02:54.907729  progress  35 % (9 MB)
  136 02:02:55.121662  progress  40 % (10 MB)
  137 02:02:55.335553  progress  45 % (11 MB)
  138 02:02:55.569438  progress  50 % (13 MB)
  139 02:02:55.778756  progress  55 % (14 MB)
  140 02:02:56.015110  progress  60 % (15 MB)
  141 02:02:56.237518  progress  65 % (17 MB)
  142 02:02:56.437695  progress  70 % (18 MB)
  143 02:02:56.648441  progress  75 % (19 MB)
  144 02:02:56.852796  progress  80 % (21 MB)
  145 02:02:57.057911  progress  85 % (22 MB)
  146 02:02:57.272470  progress  90 % (23 MB)
  147 02:02:57.475584  progress  95 % (25 MB)
  148 02:02:57.679494  progress 100 % (26 MB)
  149 02:02:57.693628  26 MB downloaded in 4.32 s (6.10 MB/s)
  150 02:02:57.694309  end: 1.5.1 http-download (duration 00:00:04) [common]
  152 02:02:57.696119  end: 1.5 download-retry (duration 00:00:04) [common]
  153 02:02:57.696451  start: 1.6 prepare-tftp-overlay (timeout 00:09:39) [common]
  154 02:02:57.696730  start: 1.6.1 extract-nfsrootfs (timeout 00:09:39) [common]
  155 02:03:08.280420  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/964194/extract-nfsrootfs-4a62ka9e
  156 02:03:08.281025  end: 1.6.1 extract-nfsrootfs (duration 00:00:11) [common]
  157 02:03:08.281316  start: 1.6.2 lava-overlay (timeout 00:09:29) [common]
  158 02:03:08.282004  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y
  159 02:03:08.282518  makedir: /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin
  160 02:03:08.282885  makedir: /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/tests
  161 02:03:08.283222  makedir: /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/results
  162 02:03:08.283564  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-add-keys
  163 02:03:08.284151  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-add-sources
  164 02:03:08.284694  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-background-process-start
  165 02:03:08.285203  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-background-process-stop
  166 02:03:08.285744  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-common-functions
  167 02:03:08.286254  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-echo-ipv4
  168 02:03:08.286742  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-install-packages
  169 02:03:08.287247  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-installed-packages
  170 02:03:08.287778  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-os-build
  171 02:03:08.288319  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-probe-channel
  172 02:03:08.288820  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-probe-ip
  173 02:03:08.289312  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-target-ip
  174 02:03:08.289808  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-target-mac
  175 02:03:08.290332  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-target-storage
  176 02:03:08.290841  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-test-case
  177 02:03:08.291336  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-test-event
  178 02:03:08.291826  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-test-feedback
  179 02:03:08.292363  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-test-raise
  180 02:03:08.292854  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-test-reference
  181 02:03:08.293360  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-test-runner
  182 02:03:08.293872  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-test-set
  183 02:03:08.294403  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-test-shell
  184 02:03:08.294922  Updating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-install-packages (oe)
  185 02:03:08.295550  Updating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/bin/lava-installed-packages (oe)
  186 02:03:08.296055  Creating /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/environment
  187 02:03:08.296457  LAVA metadata
  188 02:03:08.296721  - LAVA_JOB_ID=964194
  189 02:03:08.296939  - LAVA_DISPATCHER_IP=192.168.6.2
  190 02:03:08.297313  start: 1.6.2.1 ssh-authorize (timeout 00:09:29) [common]
  191 02:03:08.298302  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 02:03:08.298623  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:29) [common]
  193 02:03:08.298836  skipped lava-vland-overlay
  194 02:03:08.299082  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 02:03:08.299339  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:29) [common]
  196 02:03:08.299558  skipped lava-multinode-overlay
  197 02:03:08.299805  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 02:03:08.300084  start: 1.6.2.4 test-definition (timeout 00:09:29) [common]
  199 02:03:08.300341  Loading test definitions
  200 02:03:08.300626  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:29) [common]
  201 02:03:08.300849  Using /lava-964194 at stage 0
  202 02:03:08.302128  uuid=964194_1.6.2.4.1 testdef=None
  203 02:03:08.302456  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 02:03:08.302729  start: 1.6.2.4.2 test-overlay (timeout 00:09:29) [common]
  205 02:03:08.304606  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 02:03:08.305411  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:29) [common]
  208 02:03:08.307746  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 02:03:08.308695  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:29) [common]
  211 02:03:08.311029  runner path: /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/0/tests/0_dmesg test_uuid 964194_1.6.2.4.1
  212 02:03:08.311610  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 02:03:08.312418  Creating lava-test-runner.conf files
  215 02:03:08.312625  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/964194/lava-overlay-1n229z0y/lava-964194/0 for stage 0
  216 02:03:08.312982  - 0_dmesg
  217 02:03:08.313331  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 02:03:08.313613  start: 1.6.2.5 compress-overlay (timeout 00:09:29) [common]
  219 02:03:08.335695  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 02:03:08.336140  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:29) [common]
  221 02:03:08.336410  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 02:03:08.336682  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 02:03:08.336947  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:29) [common]
  224 02:03:09.066728  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 02:03:09.067204  start: 1.6.4 extract-modules (timeout 00:09:28) [common]
  226 02:03:09.067456  extracting modules file /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964194/extract-nfsrootfs-4a62ka9e
  227 02:03:10.793031  extracting modules file /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/964194/extract-overlay-ramdisk-pjbjiuky/ramdisk
  228 02:03:12.540228  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  229 02:03:12.540707  start: 1.6.5 apply-overlay-tftp (timeout 00:09:24) [common]
  230 02:03:12.540988  [common] Applying overlay to NFS
  231 02:03:12.541204  [common] Applying overlay /var/lib/lava/dispatcher/tmp/964194/compress-overlay-jk8z8qdz/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/964194/extract-nfsrootfs-4a62ka9e
  232 02:03:12.570682  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 02:03:12.571183  start: 1.6.6 prepare-kernel (timeout 00:09:24) [common]
  234 02:03:12.571469  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:24) [common]
  235 02:03:12.571708  Converting downloaded kernel to a uImage
  236 02:03:12.572049  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/kernel/Image /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/kernel/uImage
  237 02:03:14.238429  output: Image Name:   
  238 02:03:14.238855  output: Created:      Sat Nov  9 02:03:12 2024
  239 02:03:14.239070  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 02:03:14.239276  output: Data Size:    169937408 Bytes = 165954.50 KiB = 162.06 MiB
  241 02:03:14.239480  output: Load Address: 01080000
  242 02:03:14.239680  output: Entry Point:  01080000
  243 02:03:14.239879  output: 
  244 02:03:14.240265  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
  245 02:03:14.240535  end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
  246 02:03:14.240801  start: 1.6.7 configure-preseed-file (timeout 00:09:23) [common]
  247 02:03:14.241054  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 02:03:14.241309  start: 1.6.8 compress-ramdisk (timeout 00:09:23) [common]
  249 02:03:14.241570  Building ramdisk /var/lib/lava/dispatcher/tmp/964194/extract-overlay-ramdisk-pjbjiuky/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/964194/extract-overlay-ramdisk-pjbjiuky/ramdisk
  250 02:03:19.649127  >> 426772 blocks

  251 02:03:37.197462  Adding RAMdisk u-boot header.
  252 02:03:37.197923  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/964194/extract-overlay-ramdisk-pjbjiuky/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/964194/extract-overlay-ramdisk-pjbjiuky/ramdisk.cpio.gz.uboot
  253 02:03:37.728561  output: Image Name:   
  254 02:03:37.728995  output: Created:      Sat Nov  9 02:03:37 2024
  255 02:03:37.729435  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 02:03:37.729861  output: Data Size:    50968282 Bytes = 49773.71 KiB = 48.61 MiB
  257 02:03:37.730276  output: Load Address: 00000000
  258 02:03:37.730680  output: Entry Point:  00000000
  259 02:03:37.731084  output: 
  260 02:03:37.732190  rename /var/lib/lava/dispatcher/tmp/964194/extract-overlay-ramdisk-pjbjiuky/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/ramdisk/ramdisk.cpio.gz.uboot
  261 02:03:37.732951  end: 1.6.8 compress-ramdisk (duration 00:00:23) [common]
  262 02:03:37.733522  end: 1.6 prepare-tftp-overlay (duration 00:00:40) [common]
  263 02:03:37.734068  start: 1.7 lxc-create-udev-rule-action (timeout 00:08:59) [common]
  264 02:03:37.734540  No LXC device requested
  265 02:03:37.735060  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 02:03:37.735589  start: 1.8 deploy-device-env (timeout 00:08:59) [common]
  267 02:03:37.736237  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 02:03:37.736678  Checking files for TFTP limit of 4294967296 bytes.
  269 02:03:37.739361  end: 1 tftp-deploy (duration 00:01:01) [common]
  270 02:03:37.739973  start: 2 uboot-action (timeout 00:05:00) [common]
  271 02:03:37.740560  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 02:03:37.741076  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 02:03:37.741594  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 02:03:37.742135  Using kernel file from prepare-kernel: 964194/tftp-deploy-rnhvrpcz/kernel/uImage
  275 02:03:37.742778  substitutions:
  276 02:03:37.743193  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 02:03:37.743606  - {DTB_ADDR}: 0x01070000
  278 02:03:37.744388  - {DTB}: 964194/tftp-deploy-rnhvrpcz/dtb/meson-sm1-s905d3-libretech-cc.dtb
  279 02:03:37.744830  - {INITRD}: 964194/tftp-deploy-rnhvrpcz/ramdisk/ramdisk.cpio.gz.uboot
  280 02:03:37.745253  - {KERNEL_ADDR}: 0x01080000
  281 02:03:37.745660  - {KERNEL}: 964194/tftp-deploy-rnhvrpcz/kernel/uImage
  282 02:03:37.746063  - {LAVA_MAC}: None
  283 02:03:37.746513  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/964194/extract-nfsrootfs-4a62ka9e
  284 02:03:37.746922  - {NFS_SERVER_IP}: 192.168.6.2
  285 02:03:37.747323  - {PRESEED_CONFIG}: None
  286 02:03:37.747721  - {PRESEED_LOCAL}: None
  287 02:03:37.748149  - {RAMDISK_ADDR}: 0x08000000
  288 02:03:37.748554  - {RAMDISK}: 964194/tftp-deploy-rnhvrpcz/ramdisk/ramdisk.cpio.gz.uboot
  289 02:03:37.748953  - {ROOT_PART}: None
  290 02:03:37.749349  - {ROOT}: None
  291 02:03:37.749747  - {SERVER_IP}: 192.168.6.2
  292 02:03:37.750143  - {TEE_ADDR}: 0x83000000
  293 02:03:37.750538  - {TEE}: None
  294 02:03:37.750935  Parsed boot commands:
  295 02:03:37.751321  - setenv autoload no
  296 02:03:37.751716  - setenv initrd_high 0xffffffff
  297 02:03:37.752140  - setenv fdt_high 0xffffffff
  298 02:03:37.752539  - dhcp
  299 02:03:37.752935  - setenv serverip 192.168.6.2
  300 02:03:37.753327  - tftpboot 0x01080000 964194/tftp-deploy-rnhvrpcz/kernel/uImage
  301 02:03:37.753723  - tftpboot 0x08000000 964194/tftp-deploy-rnhvrpcz/ramdisk/ramdisk.cpio.gz.uboot
  302 02:03:37.754117  - tftpboot 0x01070000 964194/tftp-deploy-rnhvrpcz/dtb/meson-sm1-s905d3-libretech-cc.dtb
  303 02:03:37.754511  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/964194/extract-nfsrootfs-4a62ka9e,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 02:03:37.754919  - bootm 0x01080000 0x08000000 0x01070000
  305 02:03:37.755457  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 02:03:37.757051  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 02:03:37.757501  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  309 02:03:37.772411  Setting prompt string to ['lava-test: # ']
  310 02:03:37.773952  end: 2.3 connect-device (duration 00:00:00) [common]
  311 02:03:37.774565  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 02:03:37.775133  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 02:03:37.775673  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 02:03:37.776859  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  315 02:03:37.812338  >> OK - accepted request

  316 02:03:37.814344  Returned 0 in 0 seconds
  317 02:03:37.915508  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 02:03:37.917317  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 02:03:37.917960  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 02:03:37.918517  Setting prompt string to ['Hit any key to stop autoboot']
  322 02:03:37.919014  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 02:03:37.920634  Trying 192.168.56.21...
  324 02:03:37.921169  Connected to conserv1.
  325 02:03:37.921626  Escape character is '^]'.
  326 02:03:37.922071  
  327 02:03:37.922503  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
  328 02:03:37.922935  
  329 02:03:44.962830  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  330 02:03:44.963260  bl2_stage_init 0x01
  331 02:03:44.963488  bl2_stage_init 0x81
  332 02:03:44.968290  hw id: 0x0000 - pwm id 0x01
  333 02:03:44.968583  bl2_stage_init 0xc1
  334 02:03:44.972685  bl2_stage_init 0x02
  335 02:03:44.972953  
  336 02:03:44.973168  L0:00000000
  337 02:03:44.973372  L1:00000703
  338 02:03:44.973572  L2:00008067
  339 02:03:44.978430  L3:15000000
  340 02:03:44.978698  S1:00000000
  341 02:03:44.978921  B2:20282000
  342 02:03:44.979134  B1:a0f83180
  343 02:03:44.979337  
  344 02:03:44.979541  TE: 69036
  345 02:03:44.984279  
  346 02:03:44.989366  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  347 02:03:44.989648  
  348 02:03:44.989866  Board ID = 1
  349 02:03:44.990070  Set cpu clk to 24M
  350 02:03:44.995390  Set clk81 to 24M
  351 02:03:44.995653  Use GP1_pll as DSU clk.
  352 02:03:44.995860  DSU clk: 1200 Mhz
  353 02:03:44.996087  CPU clk: 1200 MHz
  354 02:03:45.001110  Set clk81 to 166.6M
  355 02:03:45.006707  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  356 02:03:45.006977  board id: 1
  357 02:03:45.013815  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 02:03:45.025543  fw parse done
  359 02:03:45.031440  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 02:03:45.074546  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 02:03:45.085707  PIEI prepare done
  362 02:03:45.086007  fastboot data load
  363 02:03:45.086228  fastboot data verify
  364 02:03:45.091326  verify result: 266
  365 02:03:45.096979  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  366 02:03:45.097421  LPDDR4 probe
  367 02:03:45.097792  ddr clk to 1584MHz
  368 02:03:45.104024  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 02:03:45.142664  
  370 02:03:45.143016  dmc_version 0001
  371 02:03:45.149657  Check phy result
  372 02:03:45.155601  INFO : End of CA training
  373 02:03:45.155876  INFO : End of initialization
  374 02:03:45.161225  INFO : Training has run successfully!
  375 02:03:45.161513  Check phy result
  376 02:03:45.166889  INFO : End of initialization
  377 02:03:45.167160  INFO : End of read enable training
  378 02:03:45.170130  INFO : End of fine write leveling
  379 02:03:45.175679  INFO : End of Write leveling coarse delay
  380 02:03:45.181231  INFO : Training has run successfully!
  381 02:03:45.181505  Check phy result
  382 02:03:45.181723  INFO : End of initialization
  383 02:03:45.186903  INFO : End of read dq deskew training
  384 02:03:45.192479  INFO : End of MPR read delay center optimization
  385 02:03:45.192781  INFO : End of write delay center optimization
  386 02:03:45.198040  INFO : End of read delay center optimization
  387 02:03:45.203720  INFO : End of max read latency training
  388 02:03:45.204040  INFO : Training has run successfully!
  389 02:03:45.209269  1D training succeed
  390 02:03:45.214325  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 02:03:45.263613  Check phy result
  392 02:03:45.264004  INFO : End of initialization
  393 02:03:45.289938  INFO : End of 2D read delay Voltage center optimization
  394 02:03:45.315270  INFO : End of 2D read delay Voltage center optimization
  395 02:03:45.371913  INFO : End of 2D write delay Voltage center optimization
  396 02:03:45.425999  INFO : End of 2D write delay Voltage center optimization
  397 02:03:45.431589  INFO : Training has run successfully!
  398 02:03:45.432094  
  399 02:03:45.432505  channel==0
  400 02:03:45.437084  RxClkDly_Margin_A0==69 ps 7
  401 02:03:45.437543  TxDqDly_Margin_A0==88 ps 9
  402 02:03:45.440373  RxClkDly_Margin_A1==88 ps 9
  403 02:03:45.440837  TxDqDly_Margin_A1==98 ps 10
  404 02:03:45.446048  TrainedVREFDQ_A0==74
  405 02:03:45.446537  TrainedVREFDQ_A1==74
  406 02:03:45.446940  VrefDac_Margin_A0==24
  407 02:03:45.451618  DeviceVref_Margin_A0==40
  408 02:03:45.452117  VrefDac_Margin_A1==23
  409 02:03:45.457204  DeviceVref_Margin_A1==40
  410 02:03:45.457653  
  411 02:03:45.458053  
  412 02:03:45.458452  channel==1
  413 02:03:45.458844  RxClkDly_Margin_A0==88 ps 9
  414 02:03:45.460468  TxDqDly_Margin_A0==88 ps 9
  415 02:03:45.466001  RxClkDly_Margin_A1==78 ps 8
  416 02:03:45.466460  TxDqDly_Margin_A1==88 ps 9
  417 02:03:45.466859  TrainedVREFDQ_A0==75
  418 02:03:45.471691  TrainedVREFDQ_A1==75
  419 02:03:45.472185  VrefDac_Margin_A0==22
  420 02:03:45.477237  DeviceVref_Margin_A0==39
  421 02:03:45.477691  VrefDac_Margin_A1==22
  422 02:03:45.478086  DeviceVref_Margin_A1==39
  423 02:03:45.478476  
  424 02:03:45.486089   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 02:03:45.486557  
  426 02:03:45.512066  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000060
  427 02:03:45.517680  2D training succeed
  428 02:03:45.523200  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 02:03:45.528800  auto size-- 65535DDR cs0 size: 2048MB
  430 02:03:45.529275  DDR cs1 size: 2048MB
  431 02:03:45.529673  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 02:03:45.534397  cs0 DataBus test pass
  433 02:03:45.534870  cs1 DataBus test pass
  434 02:03:45.540037  cs0 AddrBus test pass
  435 02:03:45.540349  cs1 AddrBus test pass
  436 02:03:45.540576  
  437 02:03:45.540795  100bdlr_step_size ps== 471
  438 02:03:45.545571  result report
  439 02:03:45.545890  boot times 0Enable ddr reg access
  440 02:03:45.553250  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 02:03:45.567939  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  442 02:03:46.227813  bl2z: ptr: 05129330, size: 00001e40
  443 02:03:46.236822  0.0;M3 CHK:0;cm4_sp_mode 0
  444 02:03:46.237314  MVN_1=0x00000000
  445 02:03:46.237723  MVN_2=0x00000000
  446 02:03:46.248347  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  447 02:03:46.248850  OPS=0x04
  448 02:03:46.249258  ring efuse init
  449 02:03:46.253936  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  450 02:03:46.254405  [0.017354 Inits done]
  451 02:03:46.254831  secure task start!
  452 02:03:46.261590  high task start!
  453 02:03:46.262073  low task start!
  454 02:03:46.262472  run into bl31
  455 02:03:46.270191  NOTICE:  BL31: v1.3(release):4fc40b1
  456 02:03:46.278009  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  457 02:03:46.278482  NOTICE:  BL31: G12A normal boot!
  458 02:03:46.293624  NOTICE:  BL31: BL33 decompress pass
  459 02:03:46.299186  ERROR:   Error initializing runtime service opteed_fast
  460 02:03:49.012586  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  461 02:03:49.013242  bl2_stage_init 0x01
  462 02:03:49.013709  bl2_stage_init 0x81
  463 02:03:49.018234  hw id: 0x0000 - pwm id 0x01
  464 02:03:49.018754  bl2_stage_init 0xc1
  465 02:03:49.023865  bl2_stage_init 0x02
  466 02:03:49.024436  
  467 02:03:49.024850  L0:00000000
  468 02:03:49.025244  L1:00000703
  469 02:03:49.025640  L2:00008067
  470 02:03:49.026032  L3:15000000
  471 02:03:49.029391  S1:00000000
  472 02:03:49.029868  B2:20282000
  473 02:03:49.030261  B1:a0f83180
  474 02:03:49.030649  
  475 02:03:49.031036  TE: 69083
  476 02:03:49.031427  
  477 02:03:49.035100  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  478 02:03:49.035571  
  479 02:03:49.040552  Board ID = 1
  480 02:03:49.041011  Set cpu clk to 24M
  481 02:03:49.041403  Set clk81 to 24M
  482 02:03:49.046159  Use GP1_pll as DSU clk.
  483 02:03:49.046614  DSU clk: 1200 Mhz
  484 02:03:49.047005  CPU clk: 1200 MHz
  485 02:03:49.051841  Set clk81 to 166.6M
  486 02:03:49.057388  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  487 02:03:49.057851  board id: 1
  488 02:03:49.064540  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  489 02:03:49.075232  fw parse done
  490 02:03:49.081219  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  491 02:03:49.123870  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  492 02:03:49.134757  PIEI prepare done
  493 02:03:49.135217  fastboot data load
  494 02:03:49.135613  fastboot data verify
  495 02:03:49.140339  verify result: 266
  496 02:03:49.145972  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  497 02:03:49.146490  LPDDR4 probe
  498 02:03:49.146887  ddr clk to 1584MHz
  499 02:03:49.153938  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  500 02:03:49.191219  
  501 02:03:49.191753  dmc_version 0001
  502 02:03:49.197864  Check phy result
  503 02:03:49.203813  INFO : End of CA training
  504 02:03:49.204335  INFO : End of initialization
  505 02:03:49.209451  INFO : Training has run successfully!
  506 02:03:49.209924  Check phy result
  507 02:03:49.214957  INFO : End of initialization
  508 02:03:49.215419  INFO : End of read enable training
  509 02:03:49.218290  INFO : End of fine write leveling
  510 02:03:49.223862  INFO : End of Write leveling coarse delay
  511 02:03:49.229471  INFO : Training has run successfully!
  512 02:03:49.229937  Check phy result
  513 02:03:49.230347  INFO : End of initialization
  514 02:03:49.235088  INFO : End of read dq deskew training
  515 02:03:49.240694  INFO : End of MPR read delay center optimization
  516 02:03:49.241162  INFO : End of write delay center optimization
  517 02:03:49.246282  INFO : End of read delay center optimization
  518 02:03:49.251884  INFO : End of max read latency training
  519 02:03:49.252385  INFO : Training has run successfully!
  520 02:03:49.257498  1D training succeed
  521 02:03:49.263376  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  522 02:03:49.311004  Check phy result
  523 02:03:49.311511  INFO : End of initialization
  524 02:03:49.333252  INFO : End of 2D read delay Voltage center optimization
  525 02:03:49.352436  INFO : End of 2D read delay Voltage center optimization
  526 02:03:49.404369  INFO : End of 2D write delay Voltage center optimization
  527 02:03:49.453525  INFO : End of 2D write delay Voltage center optimization
  528 02:03:49.459174  INFO : Training has run successfully!
  529 02:03:49.459650  
  530 02:03:49.460165  channel==0
  531 02:03:49.464684  RxClkDly_Margin_A0==88 ps 9
  532 02:03:49.465150  TxDqDly_Margin_A0==98 ps 10
  533 02:03:49.470239  RxClkDly_Margin_A1==88 ps 9
  534 02:03:49.470698  TxDqDly_Margin_A1==98 ps 10
  535 02:03:49.471108  TrainedVREFDQ_A0==74
  536 02:03:49.475890  TrainedVREFDQ_A1==74
  537 02:03:49.476385  VrefDac_Margin_A0==24
  538 02:03:49.476797  DeviceVref_Margin_A0==40
  539 02:03:49.482287  VrefDac_Margin_A1==23
  540 02:03:49.482758  DeviceVref_Margin_A1==40
  541 02:03:49.483166  
  542 02:03:49.483570  
  543 02:03:49.487138  channel==1
  544 02:03:49.487605  RxClkDly_Margin_A0==78 ps 8
  545 02:03:49.488046  TxDqDly_Margin_A0==98 ps 10
  546 02:03:49.492688  RxClkDly_Margin_A1==78 ps 8
  547 02:03:49.493184  TxDqDly_Margin_A1==88 ps 9
  548 02:03:49.498167  TrainedVREFDQ_A0==78
  549 02:03:49.498488  TrainedVREFDQ_A1==77
  550 02:03:49.498715  VrefDac_Margin_A0==22
  551 02:03:49.503836  DeviceVref_Margin_A0==36
  552 02:03:49.504297  VrefDac_Margin_A1==22
  553 02:03:49.509365  DeviceVref_Margin_A1==37
  554 02:03:49.509791  
  555 02:03:49.510132   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  556 02:03:49.510459  
  557 02:03:49.543121  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000015 00000016 dram_vref_reg_value 0x 00000061
  558 02:03:49.543540  2D training succeed
  559 02:03:49.548604  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  560 02:03:49.554172  auto size-- 65535DDR cs0 size: 2048MB
  561 02:03:49.554487  DDR cs1 size: 2048MB
  562 02:03:49.559830  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  563 02:03:49.560164  cs0 DataBus test pass
  564 02:03:49.565368  cs1 DataBus test pass
  565 02:03:49.565677  cs0 AddrBus test pass
  566 02:03:49.565898  cs1 AddrBus test pass
  567 02:03:49.566111  
  568 02:03:49.571166  100bdlr_step_size ps== 478
  569 02:03:49.571549  result report
  570 02:03:49.576583  boot times 0Enable ddr reg access
  571 02:03:49.581760  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  572 02:03:49.595555  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  573 02:03:50.250857  bl2z: ptr: 05129330, size: 00001e40
  574 02:03:50.256738  0.0;M3 CHK:0;cm4_sp_mode 0
  575 02:03:50.257267  MVN_1=0x00000000
  576 02:03:50.257694  MVN_2=0x00000000
  577 02:03:50.268425  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  578 02:03:50.268923  OPS=0x04
  579 02:03:50.269348  ring efuse init
  580 02:03:50.273866  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  581 02:03:50.274354  [0.017319 Inits done]
  582 02:03:50.274775  secure task start!
  583 02:03:50.281114  high task start!
  584 02:03:50.281605  low task start!
  585 02:03:50.282024  run into bl31
  586 02:03:50.289774  NOTICE:  BL31: v1.3(release):4fc40b1
  587 02:03:50.297476  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  588 02:03:50.297961  NOTICE:  BL31: G12A normal boot!
  589 02:03:50.313107  NOTICE:  BL31: BL33 decompress pass
  590 02:03:50.318742  ERROR:   Error initializing runtime service opteed_fast
  591 02:03:51.715339  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  592 02:03:51.715961  bl2_stage_init 0x01
  593 02:03:51.716448  bl2_stage_init 0x81
  594 02:03:51.720939  hw id: 0x0000 - pwm id 0x01
  595 02:03:51.721422  bl2_stage_init 0xc1
  596 02:03:51.724633  bl2_stage_init 0x02
  597 02:03:51.725110  
  598 02:03:51.725532  L0:00000000
  599 02:03:51.725938  L1:00000703
  600 02:03:51.730119  L2:00008067
  601 02:03:51.730598  L3:15000000
  602 02:03:51.731014  S1:00000000
  603 02:03:51.731418  B2:20282000
  604 02:03:51.731818  B1:a0f83180
  605 02:03:51.732312  
  606 02:03:51.735613  TE: 71273
  607 02:03:51.736123  
  608 02:03:51.741300  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  609 02:03:51.741793  
  610 02:03:51.742212  Board ID = 1
  611 02:03:51.742618  Set cpu clk to 24M
  612 02:03:51.746881  Set clk81 to 24M
  613 02:03:51.747363  Use GP1_pll as DSU clk.
  614 02:03:51.747771  DSU clk: 1200 Mhz
  615 02:03:51.752601  CPU clk: 1200 MHz
  616 02:03:51.753081  Set clk81 to 166.6M
  617 02:03:51.758047  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  618 02:03:51.758526  board id: 1
  619 02:03:51.767227  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  620 02:03:51.777845  fw parse done
  621 02:03:51.783832  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  622 02:03:51.826432  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  623 02:03:51.837424  PIEI prepare done
  624 02:03:51.837952  fastboot data load
  625 02:03:51.838375  fastboot data verify
  626 02:03:51.842957  verify result: 266
  627 02:03:51.848517  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  628 02:03:51.849014  LPDDR4 probe
  629 02:03:51.849429  ddr clk to 1584MHz
  630 02:03:51.856666  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  631 02:03:51.893862  
  632 02:03:51.894383  dmc_version 0001
  633 02:03:51.899629  Check phy result
  634 02:03:51.906408  INFO : End of CA training
  635 02:03:51.906883  INFO : End of initialization
  636 02:03:51.912056  INFO : Training has run successfully!
  637 02:03:51.912523  Check phy result
  638 02:03:51.917533  INFO : End of initialization
  639 02:03:51.917999  INFO : End of read enable training
  640 02:03:51.920930  INFO : End of fine write leveling
  641 02:03:51.926436  INFO : End of Write leveling coarse delay
  642 02:03:51.932086  INFO : Training has run successfully!
  643 02:03:51.932550  Check phy result
  644 02:03:51.932962  INFO : End of initialization
  645 02:03:51.937695  INFO : End of read dq deskew training
  646 02:03:51.941122  INFO : End of MPR read delay center optimization
  647 02:03:51.946713  INFO : End of write delay center optimization
  648 02:03:51.952330  INFO : End of read delay center optimization
  649 02:03:51.952807  INFO : End of max read latency training
  650 02:03:51.957884  INFO : Training has run successfully!
  651 02:03:51.958392  1D training succeed
  652 02:03:51.966061  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  653 02:03:52.013670  Check phy result
  654 02:03:52.014218  INFO : End of initialization
  655 02:03:52.035971  INFO : End of 2D read delay Voltage center optimization
  656 02:03:52.055110  INFO : End of 2D read delay Voltage center optimization
  657 02:03:52.107154  INFO : End of 2D write delay Voltage center optimization
  658 02:03:52.156339  INFO : End of 2D write delay Voltage center optimization
  659 02:03:52.161876  INFO : Training has run successfully!
  660 02:03:52.162449  
  661 02:03:52.162920  channel==0
  662 02:03:52.167464  RxClkDly_Margin_A0==88 ps 9
  663 02:03:52.168077  TxDqDly_Margin_A0==98 ps 10
  664 02:03:52.170719  RxClkDly_Margin_A1==88 ps 9
  665 02:03:52.171262  TxDqDly_Margin_A1==98 ps 10
  666 02:03:52.176412  TrainedVREFDQ_A0==75
  667 02:03:52.177007  TrainedVREFDQ_A1==75
  668 02:03:52.181917  VrefDac_Margin_A0==22
  669 02:03:52.182514  DeviceVref_Margin_A0==39
  670 02:03:52.182937  VrefDac_Margin_A1==23
  671 02:03:52.187399  DeviceVref_Margin_A1==39
  672 02:03:52.187968  
  673 02:03:52.188454  
  674 02:03:52.188868  channel==1
  675 02:03:52.189269  RxClkDly_Margin_A0==88 ps 9
  676 02:03:52.190904  TxDqDly_Margin_A0==98 ps 10
  677 02:03:52.196356  RxClkDly_Margin_A1==78 ps 8
  678 02:03:52.196931  TxDqDly_Margin_A1==88 ps 9
  679 02:03:52.197369  TrainedVREFDQ_A0==75
  680 02:03:52.201989  TrainedVREFDQ_A1==75
  681 02:03:52.202563  VrefDac_Margin_A0==22
  682 02:03:52.207614  DeviceVref_Margin_A0==39
  683 02:03:52.208208  VrefDac_Margin_A1==22
  684 02:03:52.208635  DeviceVref_Margin_A1==39
  685 02:03:52.209044  
  686 02:03:52.216619   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  687 02:03:52.217199  
  688 02:03:52.244660  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000018 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  689 02:03:52.245304  2D training succeed
  690 02:03:52.250265  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  691 02:03:52.256133  auto size-- 65535DDR cs0 size: 2048MB
  692 02:03:52.256741  DDR cs1 size: 2048MB
  693 02:03:52.261604  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  694 02:03:52.262108  cs0 DataBus test pass
  695 02:03:52.267080  cs1 DataBus test pass
  696 02:03:52.267573  cs0 AddrBus test pass
  697 02:03:52.272673  cs1 AddrBus test pass
  698 02:03:52.273162  
  699 02:03:52.273581  100bdlr_step_size ps== 478
  700 02:03:52.273983  result report
  701 02:03:52.278335  boot times 0Enable ddr reg access
  702 02:03:52.284681  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  703 02:03:52.298299  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  704 02:03:52.953281  bl2z: ptr: 05129330, size: 00001e40
  705 02:03:52.960280  0.0;M3 CHK:0;cm4_sp_mode 0
  706 02:03:52.960799  MVN_1=0x00000000
  707 02:03:52.961233  MVN_2=0x00000000
  708 02:03:52.971717  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  709 02:03:52.972262  OPS=0x04
  710 02:03:52.972706  ring efuse init
  711 02:03:52.977380  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  712 02:03:52.977879  [0.017319 Inits done]
  713 02:03:52.978302  secure task start!
  714 02:03:52.983591  high task start!
  715 02:03:52.984097  low task start!
  716 02:03:52.984520  run into bl31
  717 02:03:52.993133  NOTICE:  BL31: v1.3(release):4fc40b1
  718 02:03:53.000952  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  719 02:03:53.001440  NOTICE:  BL31: G12A normal boot!
  720 02:03:53.016543  NOTICE:  BL31: BL33 decompress pass
  721 02:03:53.022253  ERROR:   Error initializing runtime service opteed_fast
  722 02:03:53.817580  
  723 02:03:53.818178  
  724 02:03:53.823007  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  725 02:03:53.823484  
  726 02:03:53.825663  Model: Libre Computer AML-S905D3-CC Solitude
  727 02:03:53.973468  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  728 02:03:53.988910  DRAM:  2 GiB (effective 3.8 GiB)
  729 02:03:54.089854  Core:  406 devices, 33 uclasses, devicetree: separate
  730 02:03:54.095764  WDT:   Not starting watchdog@f0d0
  731 02:03:54.120790  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  732 02:03:54.132993  Loading Environment from FAT... Card did not respond to voltage select! : -110
  733 02:03:54.137990  ** Bad device specification mmc 0 **
  734 02:03:54.148091  Card did not respond to voltage select! : -110
  735 02:03:54.155762  ** Bad device specification mmc 0 **
  736 02:03:54.156336  Couldn't find partition mmc 0
  737 02:03:54.164092  Card did not respond to voltage select! : -110
  738 02:03:54.169681  ** Bad device specification mmc 0 **
  739 02:03:54.170162  Couldn't find partition mmc 0
  740 02:03:54.174722  Error: could not access storage.
  741 02:03:54.471041  Net:   eth0: ethernet@ff3f0000
  742 02:03:54.471674  starting USB...
  743 02:03:54.715663  Bus usb@ff500000: Register 3000140 NbrPorts 3
  744 02:03:54.716315  Starting the controller
  745 02:03:54.722700  USB XHCI 1.10
  746 02:03:56.276966  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  747 02:03:56.285303         scanning usb for storage devices... 0 Storage Device(s) found
  749 02:03:56.336888  Hit any key to stop autoboot:  1 
  750 02:03:56.337753  end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
  751 02:03:56.338136  start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
  752 02:03:56.338410  Setting prompt string to ['=>']
  753 02:03:56.338668  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
  754 02:03:56.351181   0 
  755 02:03:56.351877  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  757 02:03:56.452766  => setenv autoload no
  758 02:03:56.453677  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  759 02:03:56.457852  setenv autoload no
  761 02:03:56.559517  => setenv initrd_high 0xffffffff
  762 02:03:56.560635  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  763 02:03:56.564879  setenv initrd_high 0xffffffff
  765 02:03:56.666453  => setenv fdt_high 0xffffffff
  766 02:03:56.667503  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  767 02:03:56.671709  setenv fdt_high 0xffffffff
  769 02:03:56.773314  => dhcp
  770 02:03:56.773979  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  771 02:03:56.777807  dhcp
  772 02:03:57.933961  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete... done
  773 02:03:57.934394  Speed: 1000, full duplex
  774 02:03:57.934617  BOOTP broadcast 1
  775 02:03:58.182468  BOOTP broadcast 2
  776 02:03:58.193412  DHCP client bound to address 192.168.6.21 (258 ms)
  778 02:03:58.294837  => setenv serverip 192.168.6.2
  779 02:03:58.295853  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  780 02:03:58.300284  setenv serverip 192.168.6.2
  782 02:03:58.401759  => tftpboot 0x01080000 964194/tftp-deploy-rnhvrpcz/kernel/uImage
  783 02:03:58.402732  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  784 02:03:58.409332  tftpboot 0x01080000 964194/tftp-deploy-rnhvrpcz/kernel/uImage
  785 02:03:58.409824  Speed: 1000, full duplex
  786 02:03:58.410243  Using ethernet@ff3f0000 device
  787 02:03:58.414736  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  788 02:03:58.420256  Filename '964194/tftp-deploy-rnhvrpcz/kernel/uImage'.
  789 02:03:58.424156  Load address: 0x1080000
  790 02:04:02.522355  Loading: *###################
  791 02:04:02.522785  TFTP error: trying to overwrite reserved memory...
  793 02:04:02.523620  end: 2.4.3 bootloader-commands (duration 00:00:06) [common]
  796 02:04:02.524637  end: 2.4 uboot-commands (duration 00:00:25) [common]
  798 02:04:02.525329  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
  800 02:04:02.525860  end: 2 uboot-action (duration 00:00:25) [common]
  802 02:04:02.526676  Cleaning after the job
  803 02:04:02.526999  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/ramdisk
  804 02:04:02.541903  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/kernel
  805 02:04:02.586304  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/dtb
  806 02:04:02.587443  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/nfsrootfs
  807 02:04:02.768777  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/964194/tftp-deploy-rnhvrpcz/modules
  808 02:04:02.845351  start: 4.1 power-off (timeout 00:00:30) [common]
  809 02:04:02.846310  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  810 02:04:02.881137  >> OK - accepted request

  811 02:04:02.883326  Returned 0 in 0 seconds
  812 02:04:02.984067  end: 4.1 power-off (duration 00:00:00) [common]
  814 02:04:02.985005  start: 4.2 read-feedback (timeout 00:10:00) [common]
  815 02:04:02.985649  Listened to connection for namespace 'common' for up to 1s
  816 02:04:03.985749  Finalising connection for namespace 'common'
  817 02:04:03.986221  Disconnecting from shell: Finalise
  818 02:04:03.986498  => 
  819 02:04:04.087292  end: 4.2 read-feedback (duration 00:00:01) [common]
  820 02:04:04.088053  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/964194
  821 02:04:06.035793  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/964194
  822 02:04:06.037043  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.