Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:42:06.576301 lava-dispatcher, installed at version: 2024.01
2 23:42:06.577163 start: 0 validate
3 23:42:06.577654 Start time: 2024-11-09 23:42:06.577622+00:00 (UTC)
4 23:42:06.578227 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:42:06.578753 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:42:06.612614 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:42:06.613195 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 23:42:06.645639 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:42:06.646274 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 23:42:06.681285 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:42:06.681923 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:42:06.717360 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:42:06.717854 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 23:42:06.760005 validate duration: 0.18
16 23:42:06.760835 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:42:06.761171 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:42:06.761462 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:42:06.762056 Not decompressing ramdisk as can be used compressed.
20 23:42:06.762508 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 23:42:06.762776 saving as /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/ramdisk/initrd.cpio.gz
22 23:42:06.763050 total size: 5628182 (5 MB)
23 23:42:06.803360 progress 0 % (0 MB)
24 23:42:06.809798 progress 5 % (0 MB)
25 23:42:06.817779 progress 10 % (0 MB)
26 23:42:06.824499 progress 15 % (0 MB)
27 23:42:06.828727 progress 20 % (1 MB)
28 23:42:06.832602 progress 25 % (1 MB)
29 23:42:06.836818 progress 30 % (1 MB)
30 23:42:06.841092 progress 35 % (1 MB)
31 23:42:06.844772 progress 40 % (2 MB)
32 23:42:06.849017 progress 45 % (2 MB)
33 23:42:06.852803 progress 50 % (2 MB)
34 23:42:06.856989 progress 55 % (2 MB)
35 23:42:06.861237 progress 60 % (3 MB)
36 23:42:06.864983 progress 65 % (3 MB)
37 23:42:06.869145 progress 70 % (3 MB)
38 23:42:06.872727 progress 75 % (4 MB)
39 23:42:06.876891 progress 80 % (4 MB)
40 23:42:06.880369 progress 85 % (4 MB)
41 23:42:06.884153 progress 90 % (4 MB)
42 23:42:06.887761 progress 95 % (5 MB)
43 23:42:06.891097 progress 100 % (5 MB)
44 23:42:06.891769 5 MB downloaded in 0.13 s (41.71 MB/s)
45 23:42:06.892376 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:42:06.893288 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:42:06.893600 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:42:06.893874 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:42:06.894338 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig+debug/gcc-12/kernel/Image
51 23:42:06.894601 saving as /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/kernel/Image
52 23:42:06.894826 total size: 169937408 (162 MB)
53 23:42:06.895043 No compression specified
54 23:42:06.927043 progress 0 % (0 MB)
55 23:42:07.029317 progress 5 % (8 MB)
56 23:42:07.130672 progress 10 % (16 MB)
57 23:42:07.232214 progress 15 % (24 MB)
58 23:42:07.334740 progress 20 % (32 MB)
59 23:42:07.436592 progress 25 % (40 MB)
60 23:42:07.537039 progress 30 % (48 MB)
61 23:42:07.639177 progress 35 % (56 MB)
62 23:42:07.740280 progress 40 % (64 MB)
63 23:42:07.842112 progress 45 % (72 MB)
64 23:42:07.942627 progress 50 % (81 MB)
65 23:42:08.044203 progress 55 % (89 MB)
66 23:42:08.145242 progress 60 % (97 MB)
67 23:42:08.247010 progress 65 % (105 MB)
68 23:42:08.349422 progress 70 % (113 MB)
69 23:42:08.452575 progress 75 % (121 MB)
70 23:42:08.556065 progress 80 % (129 MB)
71 23:42:08.659697 progress 85 % (137 MB)
72 23:42:08.763558 progress 90 % (145 MB)
73 23:42:08.867688 progress 95 % (153 MB)
74 23:42:08.969416 progress 100 % (162 MB)
75 23:42:08.969939 162 MB downloaded in 2.08 s (78.10 MB/s)
76 23:42:08.970401 end: 1.2.1 http-download (duration 00:00:02) [common]
78 23:42:08.971221 end: 1.2 download-retry (duration 00:00:02) [common]
79 23:42:08.971497 start: 1.3 download-retry (timeout 00:09:58) [common]
80 23:42:08.971764 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 23:42:08.972236 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 23:42:08.972508 saving as /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 23:42:08.972716 total size: 53209 (0 MB)
84 23:42:08.972924 No compression specified
85 23:42:09.017258 progress 61 % (0 MB)
86 23:42:09.018126 progress 100 % (0 MB)
87 23:42:09.018671 0 MB downloaded in 0.05 s (1.10 MB/s)
88 23:42:09.019146 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:42:09.019971 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:42:09.020281 start: 1.4 download-retry (timeout 00:09:58) [common]
92 23:42:09.020549 start: 1.4.1 http-download (timeout 00:09:58) [common]
93 23:42:09.021037 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 23:42:09.021295 saving as /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/nfsrootfs/full.rootfs.tar
95 23:42:09.021500 total size: 107552908 (102 MB)
96 23:42:09.021711 Using unxz to decompress xz
97 23:42:09.056587 progress 0 % (0 MB)
98 23:42:09.693813 progress 5 % (5 MB)
99 23:42:10.411948 progress 10 % (10 MB)
100 23:42:11.130112 progress 15 % (15 MB)
101 23:42:11.881657 progress 20 % (20 MB)
102 23:42:12.453090 progress 25 % (25 MB)
103 23:42:13.072103 progress 30 % (30 MB)
104 23:42:13.803684 progress 35 % (35 MB)
105 23:42:14.159357 progress 40 % (41 MB)
106 23:42:14.580006 progress 45 % (46 MB)
107 23:42:15.271301 progress 50 % (51 MB)
108 23:42:15.959311 progress 55 % (56 MB)
109 23:42:16.725934 progress 60 % (61 MB)
110 23:42:17.492435 progress 65 % (66 MB)
111 23:42:18.220047 progress 70 % (71 MB)
112 23:42:18.986042 progress 75 % (76 MB)
113 23:42:19.663925 progress 80 % (82 MB)
114 23:42:20.368362 progress 85 % (87 MB)
115 23:42:21.115695 progress 90 % (92 MB)
116 23:42:21.827862 progress 95 % (97 MB)
117 23:42:22.573450 progress 100 % (102 MB)
118 23:42:22.585267 102 MB downloaded in 13.56 s (7.56 MB/s)
119 23:42:22.585835 end: 1.4.1 http-download (duration 00:00:14) [common]
121 23:42:22.586665 end: 1.4 download-retry (duration 00:00:14) [common]
122 23:42:22.586930 start: 1.5 download-retry (timeout 00:09:44) [common]
123 23:42:22.587188 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 23:42:22.587645 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 23:42:22.587885 saving as /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/modules/modules.tar
126 23:42:22.588313 total size: 27648112 (26 MB)
127 23:42:22.588774 Using unxz to decompress xz
128 23:42:22.637449 progress 0 % (0 MB)
129 23:42:22.823004 progress 5 % (1 MB)
130 23:42:23.019823 progress 10 % (2 MB)
131 23:42:23.247416 progress 15 % (3 MB)
132 23:42:23.481750 progress 20 % (5 MB)
133 23:42:23.681381 progress 25 % (6 MB)
134 23:42:23.884450 progress 30 % (7 MB)
135 23:42:24.085261 progress 35 % (9 MB)
136 23:42:24.277073 progress 40 % (10 MB)
137 23:42:24.466903 progress 45 % (11 MB)
138 23:42:24.674280 progress 50 % (13 MB)
139 23:42:24.875798 progress 55 % (14 MB)
140 23:42:25.086969 progress 60 % (15 MB)
141 23:42:25.287857 progress 65 % (17 MB)
142 23:42:25.485461 progress 70 % (18 MB)
143 23:42:25.694798 progress 75 % (19 MB)
144 23:42:25.898474 progress 80 % (21 MB)
145 23:42:26.106286 progress 85 % (22 MB)
146 23:42:26.309764 progress 90 % (23 MB)
147 23:42:26.505066 progress 95 % (25 MB)
148 23:42:26.702163 progress 100 % (26 MB)
149 23:42:26.715677 26 MB downloaded in 4.13 s (6.39 MB/s)
150 23:42:26.716451 end: 1.5.1 http-download (duration 00:00:04) [common]
152 23:42:26.718231 end: 1.5 download-retry (duration 00:00:04) [common]
153 23:42:26.718799 start: 1.6 prepare-tftp-overlay (timeout 00:09:40) [common]
154 23:42:26.719365 start: 1.6.1 extract-nfsrootfs (timeout 00:09:40) [common]
155 23:42:36.462007 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/968610/extract-nfsrootfs-fy5u6fi6
156 23:42:36.462604 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 23:42:36.462892 start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
158 23:42:36.463505 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh
159 23:42:36.463928 makedir: /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin
160 23:42:36.464291 makedir: /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/tests
161 23:42:36.464610 makedir: /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/results
162 23:42:36.464948 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-add-keys
163 23:42:36.465472 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-add-sources
164 23:42:36.465966 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-background-process-start
165 23:42:36.466469 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-background-process-stop
166 23:42:36.467009 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-common-functions
167 23:42:36.467491 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-echo-ipv4
168 23:42:36.467961 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-install-packages
169 23:42:36.468505 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-installed-packages
170 23:42:36.468983 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-os-build
171 23:42:36.469452 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-probe-channel
172 23:42:36.469918 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-probe-ip
173 23:42:36.470397 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-target-ip
174 23:42:36.470888 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-target-mac
175 23:42:36.471356 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-target-storage
176 23:42:36.471831 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-test-case
177 23:42:36.472325 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-test-event
178 23:42:36.472787 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-test-feedback
179 23:42:36.473250 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-test-raise
180 23:42:36.473713 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-test-reference
181 23:42:36.474198 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-test-runner
182 23:42:36.474689 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-test-set
183 23:42:36.475155 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-test-shell
184 23:42:36.475632 Updating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-install-packages (oe)
185 23:42:36.476205 Updating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/bin/lava-installed-packages (oe)
186 23:42:36.476653 Creating /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/environment
187 23:42:36.477015 LAVA metadata
188 23:42:36.477272 - LAVA_JOB_ID=968610
189 23:42:36.477487 - LAVA_DISPATCHER_IP=192.168.6.2
190 23:42:36.477830 start: 1.6.2.1 ssh-authorize (timeout 00:09:30) [common]
191 23:42:36.478752 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 23:42:36.479061 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:30) [common]
193 23:42:36.479267 skipped lava-vland-overlay
194 23:42:36.479510 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 23:42:36.479766 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:30) [common]
196 23:42:36.480007 skipped lava-multinode-overlay
197 23:42:36.480258 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 23:42:36.480511 start: 1.6.2.4 test-definition (timeout 00:09:30) [common]
199 23:42:36.480760 Loading test definitions
200 23:42:36.481038 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:30) [common]
201 23:42:36.481261 Using /lava-968610 at stage 0
202 23:42:36.482421 uuid=968610_1.6.2.4.1 testdef=None
203 23:42:36.482726 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 23:42:36.482992 start: 1.6.2.4.2 test-overlay (timeout 00:09:30) [common]
205 23:42:36.484777 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 23:42:36.485567 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:30) [common]
208 23:42:36.487771 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 23:42:36.488619 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:30) [common]
211 23:42:36.490752 runner path: /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/0/tests/0_dmesg test_uuid 968610_1.6.2.4.1
212 23:42:36.491283 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 23:42:36.492102 Creating lava-test-runner.conf files
215 23:42:36.492309 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/968610/lava-overlay-rvyygyvh/lava-968610/0 for stage 0
216 23:42:36.492636 - 0_dmesg
217 23:42:36.492974 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 23:42:36.493248 start: 1.6.2.5 compress-overlay (timeout 00:09:30) [common]
219 23:42:36.514473 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 23:42:36.514858 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:30) [common]
221 23:42:36.515123 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 23:42:36.515389 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 23:42:36.515655 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
224 23:42:37.202811 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 23:42:37.203248 start: 1.6.4 extract-modules (timeout 00:09:30) [common]
226 23:42:37.203495 extracting modules file /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968610/extract-nfsrootfs-fy5u6fi6
227 23:42:38.881448 extracting modules file /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968610/extract-overlay-ramdisk-64bwt2m0/ramdisk
228 23:42:40.609477 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 23:42:40.609969 start: 1.6.5 apply-overlay-tftp (timeout 00:09:26) [common]
230 23:42:40.610271 [common] Applying overlay to NFS
231 23:42:40.610501 [common] Applying overlay /var/lib/lava/dispatcher/tmp/968610/compress-overlay-ku0bj9ws/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/968610/extract-nfsrootfs-fy5u6fi6
232 23:42:40.639522 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 23:42:40.639937 start: 1.6.6 prepare-kernel (timeout 00:09:26) [common]
234 23:42:40.640255 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:26) [common]
235 23:42:40.640503 Converting downloaded kernel to a uImage
236 23:42:40.640823 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/kernel/Image /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/kernel/uImage
237 23:42:42.631087 output: Image Name:
238 23:42:42.631524 output: Created: Sat Nov 9 23:42:40 2024
239 23:42:42.631747 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 23:42:42.631972 output: Data Size: 169937408 Bytes = 165954.50 KiB = 162.06 MiB
241 23:42:42.632245 output: Load Address: 01080000
242 23:42:42.632457 output: Entry Point: 01080000
243 23:42:42.632663 output:
244 23:42:42.632997 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 23:42:42.633287 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 23:42:42.633579 start: 1.6.7 configure-preseed-file (timeout 00:09:24) [common]
247 23:42:42.633881 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 23:42:42.634178 start: 1.6.8 compress-ramdisk (timeout 00:09:24) [common]
249 23:42:42.634471 Building ramdisk /var/lib/lava/dispatcher/tmp/968610/extract-overlay-ramdisk-64bwt2m0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/968610/extract-overlay-ramdisk-64bwt2m0/ramdisk
250 23:42:47.943840 >> 426772 blocks
251 23:43:05.511497 Adding RAMdisk u-boot header.
252 23:43:05.511950 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/968610/extract-overlay-ramdisk-64bwt2m0/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/968610/extract-overlay-ramdisk-64bwt2m0/ramdisk.cpio.gz.uboot
253 23:43:06.073741 output: Image Name:
254 23:43:06.074383 output: Created: Sat Nov 9 23:43:05 2024
255 23:43:06.074827 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 23:43:06.075249 output: Data Size: 50965028 Bytes = 49770.54 KiB = 48.60 MiB
257 23:43:06.075662 output: Load Address: 00000000
258 23:43:06.076122 output: Entry Point: 00000000
259 23:43:06.076532 output:
260 23:43:06.077695 rename /var/lib/lava/dispatcher/tmp/968610/extract-overlay-ramdisk-64bwt2m0/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/ramdisk/ramdisk.cpio.gz.uboot
261 23:43:06.078458 end: 1.6.8 compress-ramdisk (duration 00:00:23) [common]
262 23:43:06.079029 end: 1.6 prepare-tftp-overlay (duration 00:00:39) [common]
263 23:43:06.079614 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:01) [common]
264 23:43:06.080126 No LXC device requested
265 23:43:06.080657 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 23:43:06.081191 start: 1.8 deploy-device-env (timeout 00:09:01) [common]
267 23:43:06.081706 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 23:43:06.082130 Checking files for TFTP limit of 4294967296 bytes.
269 23:43:06.084885 end: 1 tftp-deploy (duration 00:00:59) [common]
270 23:43:06.085502 start: 2 uboot-action (timeout 00:05:00) [common]
271 23:43:06.086052 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 23:43:06.086566 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 23:43:06.087085 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 23:43:06.087641 Using kernel file from prepare-kernel: 968610/tftp-deploy-3zdv0nax/kernel/uImage
275 23:43:06.088324 substitutions:
276 23:43:06.088754 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 23:43:06.089174 - {DTB_ADDR}: 0x01070000
278 23:43:06.089583 - {DTB}: 968610/tftp-deploy-3zdv0nax/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 23:43:06.089986 - {INITRD}: 968610/tftp-deploy-3zdv0nax/ramdisk/ramdisk.cpio.gz.uboot
280 23:43:06.090388 - {KERNEL_ADDR}: 0x01080000
281 23:43:06.090787 - {KERNEL}: 968610/tftp-deploy-3zdv0nax/kernel/uImage
282 23:43:06.091183 - {LAVA_MAC}: None
283 23:43:06.091624 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/968610/extract-nfsrootfs-fy5u6fi6
284 23:43:06.092061 - {NFS_SERVER_IP}: 192.168.6.2
285 23:43:06.092472 - {PRESEED_CONFIG}: None
286 23:43:06.092873 - {PRESEED_LOCAL}: None
287 23:43:06.093269 - {RAMDISK_ADDR}: 0x08000000
288 23:43:06.093659 - {RAMDISK}: 968610/tftp-deploy-3zdv0nax/ramdisk/ramdisk.cpio.gz.uboot
289 23:43:06.094052 - {ROOT_PART}: None
290 23:43:06.094445 - {ROOT}: None
291 23:43:06.094840 - {SERVER_IP}: 192.168.6.2
292 23:43:06.095229 - {TEE_ADDR}: 0x83000000
293 23:43:06.095619 - {TEE}: None
294 23:43:06.096039 Parsed boot commands:
295 23:43:06.096430 - setenv autoload no
296 23:43:06.096822 - setenv initrd_high 0xffffffff
297 23:43:06.097213 - setenv fdt_high 0xffffffff
298 23:43:06.097604 - dhcp
299 23:43:06.097992 - setenv serverip 192.168.6.2
300 23:43:06.098379 - tftpboot 0x01080000 968610/tftp-deploy-3zdv0nax/kernel/uImage
301 23:43:06.098767 - tftpboot 0x08000000 968610/tftp-deploy-3zdv0nax/ramdisk/ramdisk.cpio.gz.uboot
302 23:43:06.099158 - tftpboot 0x01070000 968610/tftp-deploy-3zdv0nax/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 23:43:06.099546 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/968610/extract-nfsrootfs-fy5u6fi6,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 23:43:06.099945 - bootm 0x01080000 0x08000000 0x01070000
305 23:43:06.100504 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 23:43:06.102014 start: 2.3 connect-device (timeout 00:05:00) [common]
308 23:43:06.102436 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 23:43:06.116578 Setting prompt string to ['lava-test: # ']
310 23:43:06.118055 end: 2.3 connect-device (duration 00:00:00) [common]
311 23:43:06.118668 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 23:43:06.119238 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 23:43:06.119792 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 23:43:06.120971 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 23:43:06.157830 >> OK - accepted request
316 23:43:06.160313 Returned 0 in 0 seconds
317 23:43:06.261423 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 23:43:06.263065 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 23:43:06.263647 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 23:43:06.264225 Setting prompt string to ['Hit any key to stop autoboot']
322 23:43:06.264709 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 23:43:06.266271 Trying 192.168.56.21...
324 23:43:06.266757 Connected to conserv1.
325 23:43:06.267168 Escape character is '^]'.
326 23:43:06.267591
327 23:43:06.268045 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 23:43:06.268480
329 23:43:13.887617 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 23:43:13.888314 bl2_stage_init 0x01
331 23:43:13.888764 bl2_stage_init 0x81
332 23:43:13.893022 hw id: 0x0000 - pwm id 0x01
333 23:43:13.893468 bl2_stage_init 0xc1
334 23:43:13.897764 bl2_stage_init 0x02
335 23:43:13.898266
336 23:43:13.898714 L0:00000000
337 23:43:13.899119 L1:00000703
338 23:43:13.899514 L2:00008067
339 23:43:13.903379 L3:15000000
340 23:43:13.903853 S1:00000000
341 23:43:13.904313 B2:20282000
342 23:43:13.904727 B1:a0f83180
343 23:43:13.905125
344 23:43:13.905525 TE: 69194
345 23:43:13.905922
346 23:43:13.914566 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 23:43:13.915062
348 23:43:13.915475 Board ID = 1
349 23:43:13.915878 Set cpu clk to 24M
350 23:43:13.916325 Set clk81 to 24M
351 23:43:13.920198 Use GP1_pll as DSU clk.
352 23:43:13.920724 DSU clk: 1200 Mhz
353 23:43:13.921137 CPU clk: 1200 MHz
354 23:43:13.925737 Set clk81 to 166.6M
355 23:43:13.931308 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 23:43:13.931760 board id: 1
357 23:43:13.939346 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 23:43:13.950241 fw parse done
359 23:43:13.956169 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 23:43:13.999441 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 23:43:14.010542 PIEI prepare done
362 23:43:14.011023 fastboot data load
363 23:43:14.011438 fastboot data verify
364 23:43:14.016074 verify result: 266
365 23:43:14.021658 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 23:43:14.022099 LPDDR4 probe
367 23:43:14.022502 ddr clk to 1584MHz
368 23:43:14.029682 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 23:43:14.066617
370 23:43:14.067056 dmc_version 0001
371 23:43:14.073582 Check phy result
372 23:43:14.080898 INFO : End of CA training
373 23:43:14.081334 INFO : End of initialization
374 23:43:14.086067 INFO : Training has run successfully!
375 23:43:14.086494 Check phy result
376 23:43:14.091758 INFO : End of initialization
377 23:43:14.092220 INFO : End of read enable training
378 23:43:14.095132 INFO : End of fine write leveling
379 23:43:14.100680 INFO : End of Write leveling coarse delay
380 23:43:14.106175 INFO : Training has run successfully!
381 23:43:14.106607 Check phy result
382 23:43:14.107007 INFO : End of initialization
383 23:43:14.111821 INFO : End of read dq deskew training
384 23:43:14.117333 INFO : End of MPR read delay center optimization
385 23:43:14.117772 INFO : End of write delay center optimization
386 23:43:14.123128 INFO : End of read delay center optimization
387 23:43:14.128661 INFO : End of max read latency training
388 23:43:14.129106 INFO : Training has run successfully!
389 23:43:14.134186 1D training succeed
390 23:43:14.140072 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 23:43:14.188359 Check phy result
392 23:43:14.188914 INFO : End of initialization
393 23:43:14.215682 INFO : End of 2D read delay Voltage center optimization
394 23:43:14.239805 INFO : End of 2D read delay Voltage center optimization
395 23:43:14.296528 INFO : End of 2D write delay Voltage center optimization
396 23:43:14.350590 INFO : End of 2D write delay Voltage center optimization
397 23:43:14.356070 INFO : Training has run successfully!
398 23:43:14.356516
399 23:43:14.356934 channel==0
400 23:43:14.362453 RxClkDly_Margin_A0==78 ps 8
401 23:43:14.363053 TxDqDly_Margin_A0==98 ps 10
402 23:43:14.367484 RxClkDly_Margin_A1==88 ps 9
403 23:43:14.368069 TxDqDly_Margin_A1==98 ps 10
404 23:43:14.368500 TrainedVREFDQ_A0==74
405 23:43:14.373619 TrainedVREFDQ_A1==75
406 23:43:14.374178 VrefDac_Margin_A0==24
407 23:43:14.374517 DeviceVref_Margin_A0==40
408 23:43:14.378631 VrefDac_Margin_A1==23
409 23:43:14.379108 DeviceVref_Margin_A1==39
410 23:43:14.379356
411 23:43:14.379568
412 23:43:14.384038 channel==1
413 23:43:14.384398 RxClkDly_Margin_A0==88 ps 9
414 23:43:14.384618 TxDqDly_Margin_A0==98 ps 10
415 23:43:14.389668 RxClkDly_Margin_A1==78 ps 8
416 23:43:14.390160 TxDqDly_Margin_A1==98 ps 10
417 23:43:14.395303 TrainedVREFDQ_A0==78
418 23:43:14.395786 TrainedVREFDQ_A1==77
419 23:43:14.396186 VrefDac_Margin_A0==22
420 23:43:14.400868 DeviceVref_Margin_A0==36
421 23:43:14.401246 VrefDac_Margin_A1==22
422 23:43:14.406586 DeviceVref_Margin_A1==37
423 23:43:14.406957
424 23:43:14.407177 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 23:43:14.407384
426 23:43:14.440093 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 23:43:14.440862 2D training succeed
428 23:43:14.445670 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 23:43:14.451293 auto size-- 65535DDR cs0 size: 2048MB
430 23:43:14.451841 DDR cs1 size: 2048MB
431 23:43:14.456825 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 23:43:14.457324 cs0 DataBus test pass
433 23:43:14.462537 cs1 DataBus test pass
434 23:43:14.463037 cs0 AddrBus test pass
435 23:43:14.463487 cs1 AddrBus test pass
436 23:43:14.463931
437 23:43:14.468041 100bdlr_step_size ps== 471
438 23:43:14.468549 result report
439 23:43:14.473720 boot times 0Enable ddr reg access
440 23:43:14.478978 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 23:43:14.492859 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 23:43:15.153227 bl2z: ptr: 05129330, size: 00001e40
443 23:43:15.162101 0.0;M3 CHK:0;cm4_sp_mode 0
444 23:43:15.162616 MVN_1=0x00000000
445 23:43:15.163073 MVN_2=0x00000000
446 23:43:15.173600 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 23:43:15.174100 OPS=0x04
448 23:43:15.174562 ring efuse init
449 23:43:15.176602 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 23:43:15.182238 [0.017354 Inits done]
451 23:43:15.182726 secure task start!
452 23:43:15.183180 high task start!
453 23:43:15.183629 low task start!
454 23:43:15.186427 run into bl31
455 23:43:15.195069 NOTICE: BL31: v1.3(release):4fc40b1
456 23:43:15.202849 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 23:43:15.203350 NOTICE: BL31: G12A normal boot!
458 23:43:15.218481 NOTICE: BL31: BL33 decompress pass
459 23:43:15.224175 ERROR: Error initializing runtime service opteed_fast
460 23:43:17.938443 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 23:43:17.939127 bl2_stage_init 0x01
462 23:43:17.939612 bl2_stage_init 0x81
463 23:43:17.944031 hw id: 0x0000 - pwm id 0x01
464 23:43:17.944574 bl2_stage_init 0xc1
465 23:43:17.949597 bl2_stage_init 0x02
466 23:43:17.950164
467 23:43:17.950608 L0:00000000
468 23:43:17.951040 L1:00000703
469 23:43:17.951472 L2:00008067
470 23:43:17.951898 L3:15000000
471 23:43:17.955111 S1:00000000
472 23:43:17.955573 B2:20282000
473 23:43:17.956044 B1:a0f83180
474 23:43:17.956479
475 23:43:17.956909 TE: 70313
476 23:43:17.957337
477 23:43:17.960789 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 23:43:17.961266
479 23:43:17.966349 Board ID = 1
480 23:43:17.966860 Set cpu clk to 24M
481 23:43:17.967292 Set clk81 to 24M
482 23:43:17.971964 Use GP1_pll as DSU clk.
483 23:43:17.972474 DSU clk: 1200 Mhz
484 23:43:17.972905 CPU clk: 1200 MHz
485 23:43:17.977563 Set clk81 to 166.6M
486 23:43:17.983126 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 23:43:17.983598 board id: 1
488 23:43:17.990332 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 23:43:18.001458 fw parse done
490 23:43:18.006269 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 23:43:18.050401 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 23:43:18.061558 PIEI prepare done
493 23:43:18.062028 fastboot data load
494 23:43:18.062460 fastboot data verify
495 23:43:18.067106 verify result: 266
496 23:43:18.072995 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 23:43:18.073468 LPDDR4 probe
498 23:43:18.073898 ddr clk to 1584MHz
499 23:43:18.086591 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 23:43:18.118452
501 23:43:18.118960 dmc_version 0001
502 23:43:18.125443 Check phy result
503 23:43:18.131411 INFO : End of CA training
504 23:43:18.131869 INFO : End of initialization
505 23:43:18.137085 INFO : Training has run successfully!
506 23:43:18.137623 Check phy result
507 23:43:18.142601 INFO : End of initialization
508 23:43:18.143076 INFO : End of read enable training
509 23:43:18.148228 INFO : End of fine write leveling
510 23:43:18.153777 INFO : End of Write leveling coarse delay
511 23:43:18.154259 INFO : Training has run successfully!
512 23:43:18.154709 Check phy result
513 23:43:18.159438 INFO : End of initialization
514 23:43:18.159922 INFO : End of read dq deskew training
515 23:43:18.165056 INFO : End of MPR read delay center optimization
516 23:43:18.170648 INFO : End of write delay center optimization
517 23:43:18.176240 INFO : End of read delay center optimization
518 23:43:18.176778 INFO : End of max read latency training
519 23:43:18.181787 INFO : Training has run successfully!
520 23:43:18.182282 1D training succeed
521 23:43:18.190186 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 23:43:18.239279 Check phy result
523 23:43:18.239835 INFO : End of initialization
524 23:43:18.266696 INFO : End of 2D read delay Voltage center optimization
525 23:43:18.290811 INFO : End of 2D read delay Voltage center optimization
526 23:43:18.347523 INFO : End of 2D write delay Voltage center optimization
527 23:43:18.401629 INFO : End of 2D write delay Voltage center optimization
528 23:43:18.407164 INFO : Training has run successfully!
529 23:43:18.407669
530 23:43:18.408188 channel==0
531 23:43:18.412779 RxClkDly_Margin_A0==88 ps 9
532 23:43:18.413289 TxDqDly_Margin_A0==88 ps 9
533 23:43:18.416256 RxClkDly_Margin_A1==88 ps 9
534 23:43:18.416755 TxDqDly_Margin_A1==88 ps 9
535 23:43:18.421749 TrainedVREFDQ_A0==74
536 23:43:18.422259 TrainedVREFDQ_A1==75
537 23:43:18.422727 VrefDac_Margin_A0==24
538 23:43:18.427360 DeviceVref_Margin_A0==40
539 23:43:18.427854 VrefDac_Margin_A1==23
540 23:43:18.432933 DeviceVref_Margin_A1==39
541 23:43:18.433440
542 23:43:18.433903
543 23:43:18.434358 channel==1
544 23:43:18.434804 RxClkDly_Margin_A0==78 ps 8
545 23:43:18.438535 TxDqDly_Margin_A0==98 ps 10
546 23:43:18.439039 RxClkDly_Margin_A1==88 ps 9
547 23:43:18.444153 TxDqDly_Margin_A1==88 ps 9
548 23:43:18.444644 TrainedVREFDQ_A0==75
549 23:43:18.445104 TrainedVREFDQ_A1==75
550 23:43:18.449752 VrefDac_Margin_A0==22
551 23:43:18.450280 DeviceVref_Margin_A0==39
552 23:43:18.450738 VrefDac_Margin_A1==22
553 23:43:18.455355 DeviceVref_Margin_A1==39
554 23:43:18.455850
555 23:43:18.460934 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 23:43:18.461442
557 23:43:18.489055 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000019 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 23:43:18.494561 2D training succeed
559 23:43:18.500179 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 23:43:18.500716 auto size-- 65535DDR cs0 size: 2048MB
561 23:43:18.505735 DDR cs1 size: 2048MB
562 23:43:18.506278 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 23:43:18.511341 cs0 DataBus test pass
564 23:43:18.511845 cs1 DataBus test pass
565 23:43:18.512371 cs0 AddrBus test pass
566 23:43:18.516945 cs1 AddrBus test pass
567 23:43:18.517443
568 23:43:18.517899 100bdlr_step_size ps== 478
569 23:43:18.518356 result report
570 23:43:18.522530 boot times 0Enable ddr reg access
571 23:43:18.529818 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 23:43:18.543675 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 23:43:19.203342 bl2z: ptr: 05129330, size: 00001e40
574 23:43:19.211405 0.0;M3 CHK:0;cm4_sp_mode 0
575 23:43:19.211953 MVN_1=0x00000000
576 23:43:19.212462 MVN_2=0x00000000
577 23:43:19.222862 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 23:43:19.223433 OPS=0x04
579 23:43:19.223905 ring efuse init
580 23:43:19.228430 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 23:43:19.228946 [0.017355 Inits done]
582 23:43:19.229404 secure task start!
583 23:43:19.236467 high task start!
584 23:43:19.236964 low task start!
585 23:43:19.237425 run into bl31
586 23:43:19.245137 NOTICE: BL31: v1.3(release):4fc40b1
587 23:43:19.252882 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 23:43:19.253394 NOTICE: BL31: G12A normal boot!
589 23:43:19.268508 NOTICE: BL31: BL33 decompress pass
590 23:43:19.274152 ERROR: Error initializing runtime service opteed_fast
591 23:43:20.639619 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 23:43:20.640312 bl2_stage_init 0x01
593 23:43:20.640786 bl2_stage_init 0x81
594 23:43:20.645070 hw id: 0x0000 - pwm id 0x01
595 23:43:20.645561 bl2_stage_init 0xc1
596 23:43:20.646017 bl2_stage_init 0x02
597 23:43:20.646461
598 23:43:20.650739 L0:00000000
599 23:43:20.651224 L1:00000703
600 23:43:20.651674 L2:00008067
601 23:43:20.652165 L3:15000000
602 23:43:20.652617 S1:00000000
603 23:43:20.656327 B2:20282000
604 23:43:20.656815 B1:a0f83180
605 23:43:20.657261
606 23:43:20.657705 TE: 69052
607 23:43:20.658151
608 23:43:20.661861 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 23:43:20.662355
610 23:43:20.667549 Board ID = 1
611 23:43:20.668067 Set cpu clk to 24M
612 23:43:20.668520 Set clk81 to 24M
613 23:43:20.673029 Use GP1_pll as DSU clk.
614 23:43:20.673509 DSU clk: 1200 Mhz
615 23:43:20.673955 CPU clk: 1200 MHz
616 23:43:20.674395 Set clk81 to 166.6M
617 23:43:20.684312 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 23:43:20.684819 board id: 1
619 23:43:20.690769 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 23:43:20.701373 fw parse done
621 23:43:20.707425 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 23:43:20.749917 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 23:43:20.760825 PIEI prepare done
624 23:43:20.761322 fastboot data load
625 23:43:20.761780 fastboot data verify
626 23:43:20.766481 verify result: 266
627 23:43:20.772014 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 23:43:20.772506 LPDDR4 probe
629 23:43:20.772963 ddr clk to 1584MHz
630 23:43:20.780008 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 23:43:20.817337
632 23:43:20.817878 dmc_version 0001
633 23:43:20.823931 Check phy result
634 23:43:20.829835 INFO : End of CA training
635 23:43:20.830321 INFO : End of initialization
636 23:43:20.835504 INFO : Training has run successfully!
637 23:43:20.836015 Check phy result
638 23:43:20.841106 INFO : End of initialization
639 23:43:20.841582 INFO : End of read enable training
640 23:43:20.844381 INFO : End of fine write leveling
641 23:43:20.849898 INFO : End of Write leveling coarse delay
642 23:43:20.855504 INFO : Training has run successfully!
643 23:43:20.855973 Check phy result
644 23:43:20.856468 INFO : End of initialization
645 23:43:20.861068 INFO : End of read dq deskew training
646 23:43:20.864562 INFO : End of MPR read delay center optimization
647 23:43:20.870076 INFO : End of write delay center optimization
648 23:43:20.875698 INFO : End of read delay center optimization
649 23:43:20.876217 INFO : End of max read latency training
650 23:43:20.881255 INFO : Training has run successfully!
651 23:43:20.881728 1D training succeed
652 23:43:20.889441 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 23:43:20.936988 Check phy result
654 23:43:20.937459 INFO : End of initialization
655 23:43:20.959348 INFO : End of 2D read delay Voltage center optimization
656 23:43:20.978604 INFO : End of 2D read delay Voltage center optimization
657 23:43:21.029781 INFO : End of 2D write delay Voltage center optimization
658 23:43:21.079589 INFO : End of 2D write delay Voltage center optimization
659 23:43:21.085244 INFO : Training has run successfully!
660 23:43:21.085727
661 23:43:21.086179 channel==0
662 23:43:21.090947 RxClkDly_Margin_A0==78 ps 8
663 23:43:21.091430 TxDqDly_Margin_A0==98 ps 10
664 23:43:21.096336 RxClkDly_Margin_A1==88 ps 9
665 23:43:21.096814 TxDqDly_Margin_A1==98 ps 10
666 23:43:21.097270 TrainedVREFDQ_A0==74
667 23:43:21.102010 TrainedVREFDQ_A1==74
668 23:43:21.102487 VrefDac_Margin_A0==24
669 23:43:21.102935 DeviceVref_Margin_A0==40
670 23:43:21.107581 VrefDac_Margin_A1==23
671 23:43:21.108092 DeviceVref_Margin_A1==40
672 23:43:21.108549
673 23:43:21.108994
674 23:43:21.113228 channel==1
675 23:43:21.113708 RxClkDly_Margin_A0==78 ps 8
676 23:43:21.114159 TxDqDly_Margin_A0==98 ps 10
677 23:43:21.118819 RxClkDly_Margin_A1==78 ps 8
678 23:43:21.119297 TxDqDly_Margin_A1==88 ps 9
679 23:43:21.124304 TrainedVREFDQ_A0==78
680 23:43:21.124796 TrainedVREFDQ_A1==76
681 23:43:21.125250 VrefDac_Margin_A0==22
682 23:43:21.130033 DeviceVref_Margin_A0==36
683 23:43:21.130510 VrefDac_Margin_A1==20
684 23:43:21.135587 DeviceVref_Margin_A1==38
685 23:43:21.136093
686 23:43:21.136547 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 23:43:21.136985
688 23:43:21.169204 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000016 dram_vref_reg_value 0x 00000061
689 23:43:21.169734 2D training succeed
690 23:43:21.174685 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 23:43:21.180292 auto size-- 65535DDR cs0 size: 2048MB
692 23:43:21.180771 DDR cs1 size: 2048MB
693 23:43:21.185844 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 23:43:21.186320 cs0 DataBus test pass
695 23:43:21.191448 cs1 DataBus test pass
696 23:43:21.191934 cs0 AddrBus test pass
697 23:43:21.192444 cs1 AddrBus test pass
698 23:43:21.192892
699 23:43:21.197121 100bdlr_step_size ps== 478
700 23:43:21.197610 result report
701 23:43:21.202725 boot times 0Enable ddr reg access
702 23:43:21.207938 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 23:43:21.221850 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 23:43:21.876059 bl2z: ptr: 05129330, size: 00001e40
705 23:43:21.883002 0.0;M3 CHK:0;cm4_sp_mode 0
706 23:43:21.883507 MVN_1=0x00000000
707 23:43:21.883961 MVN_2=0x00000000
708 23:43:21.894574 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 23:43:21.895058 OPS=0x04
710 23:43:21.895513 ring efuse init
711 23:43:21.900113 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 23:43:21.900607 [0.017319 Inits done]
713 23:43:21.901056 secure task start!
714 23:43:21.907953 high task start!
715 23:43:21.908457 low task start!
716 23:43:21.908904 run into bl31
717 23:43:21.916628 NOTICE: BL31: v1.3(release):4fc40b1
718 23:43:21.924400 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 23:43:21.924883 NOTICE: BL31: G12A normal boot!
720 23:43:21.939951 NOTICE: BL31: BL33 decompress pass
721 23:43:21.945646 ERROR: Error initializing runtime service opteed_fast
722 23:43:22.741121
723 23:43:22.741765
724 23:43:22.746466 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 23:43:22.746970
726 23:43:22.749961 Model: Libre Computer AML-S905D3-CC Solitude
727 23:43:22.897057 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 23:43:22.912418 DRAM: 2 GiB (effective 3.8 GiB)
729 23:43:23.013395 Core: 406 devices, 33 uclasses, devicetree: separate
730 23:43:23.019414 WDT: Not starting watchdog@f0d0
731 23:43:23.044407 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 23:43:23.056649 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 23:43:23.061656 ** Bad device specification mmc 0 **
734 23:43:23.071807 Card did not respond to voltage select! : -110
735 23:43:23.079323 ** Bad device specification mmc 0 **
736 23:43:23.079855 Couldn't find partition mmc 0
737 23:43:23.087826 Card did not respond to voltage select! : -110
738 23:43:23.093209 ** Bad device specification mmc 0 **
739 23:43:23.093738 Couldn't find partition mmc 0
740 23:43:23.098267 Error: could not access storage.
741 23:43:23.394871 Net: eth0: ethernet@ff3f0000
742 23:43:23.395487 starting USB...
743 23:43:23.640427 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 23:43:23.641087 Starting the controller
745 23:43:23.647395 USB XHCI 1.10
746 23:43:25.201569 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 23:43:25.209886 scanning usb for storage devices... 0 Storage Device(s) found
749 23:43:25.261562 Hit any key to stop autoboot: 1
750 23:43:25.262476 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 23:43:25.263303 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 23:43:25.263853 Setting prompt string to ['=>']
753 23:43:25.264519 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 23:43:25.275856 0
755 23:43:25.276905 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 23:43:25.378293 => setenv autoload no
758 23:43:25.379179 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 23:43:25.384595 setenv autoload no
761 23:43:25.486293 => setenv initrd_high 0xffffffff
762 23:43:25.487370 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 23:43:25.491629 setenv initrd_high 0xffffffff
765 23:43:25.593290 => setenv fdt_high 0xffffffff
766 23:43:25.594131 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 23:43:25.599213 setenv fdt_high 0xffffffff
769 23:43:25.700927 => dhcp
770 23:43:25.701731 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 23:43:25.705846 dhcp
772 23:43:26.411613 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 23:43:26.412286 Speed: 1000, full duplex
774 23:43:26.412700 BOOTP broadcast 1
775 23:43:26.660168 BOOTP broadcast 2
776 23:43:26.670968 DHCP client bound to address 192.168.6.21 (258 ms)
778 23:43:26.772498 => setenv serverip 192.168.6.2
779 23:43:26.773282 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
780 23:43:26.777921 setenv serverip 192.168.6.2
782 23:43:26.879360 => tftpboot 0x01080000 968610/tftp-deploy-3zdv0nax/kernel/uImage
783 23:43:26.880066 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
784 23:43:26.886814 tftpboot 0x01080000 968610/tftp-deploy-3zdv0nax/kernel/uImage
785 23:43:26.887296 Speed: 1000, full duplex
786 23:43:26.887696 Using ethernet@ff3f0000 device
787 23:43:26.892452 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
788 23:43:26.897780 Filename '968610/tftp-deploy-3zdv0nax/kernel/uImage'.
789 23:43:26.901723 Load address: 0x1080000
790 23:43:31.057127 Loading: *###################
791 23:43:31.057551 TFTP error: trying to overwrite reserved memory...
793 23:43:31.058412 end: 2.4.3 bootloader-commands (duration 00:00:06) [common]
796 23:43:31.059348 end: 2.4 uboot-commands (duration 00:00:25) [common]
798 23:43:31.060087 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
800 23:43:31.060704 end: 2 uboot-action (duration 00:00:25) [common]
802 23:43:31.061606 Cleaning after the job
803 23:43:31.061919 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/ramdisk
804 23:43:31.077320 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/kernel
805 23:43:31.117756 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/dtb
806 23:43:31.118627 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/nfsrootfs
807 23:43:31.238405 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968610/tftp-deploy-3zdv0nax/modules
808 23:43:31.295418 start: 4.1 power-off (timeout 00:00:30) [common]
809 23:43:31.296195 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
810 23:43:31.330359 >> OK - accepted request
811 23:43:31.332685 Returned 0 in 0 seconds
812 23:43:31.433564 end: 4.1 power-off (duration 00:00:00) [common]
814 23:43:31.434727 start: 4.2 read-feedback (timeout 00:10:00) [common]
815 23:43:31.435508 Listened to connection for namespace 'common' for up to 1s
816 23:43:32.436409 Finalising connection for namespace 'common'
817 23:43:32.436930 Disconnecting from shell: Finalise
818 23:43:32.437244 =>
819 23:43:32.537954 end: 4.2 read-feedback (duration 00:00:01) [common]
820 23:43:32.538393 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/968610
821 23:43:34.378845 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/968610
822 23:43:34.379477 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.