Boot log: meson-sm1-s905d3-libretech-cc

    1 23:56:26.969449  lava-dispatcher, installed at version: 2024.01
    2 23:56:26.970232  start: 0 validate
    3 23:56:26.970696  Start time: 2024-11-09 23:56:26.970665+00:00 (UTC)
    4 23:56:26.971230  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 23:56:26.971758  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 23:56:27.011049  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 23:56:27.011626  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fkernel%2FImage exists
    8 23:56:27.039010  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 23:56:27.039631  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 23:56:27.068267  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 23:56:27.068743  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 23:56:27.097992  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 23:56:27.098767  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
   14 23:56:27.132648  validate duration: 0.16
   16 23:56:27.133480  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 23:56:27.133817  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 23:56:27.134127  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 23:56:27.134730  Not decompressing ramdisk as can be used compressed.
   20 23:56:27.135197  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
   21 23:56:27.135484  saving as /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/ramdisk/initrd.cpio.gz
   22 23:56:27.135793  total size: 5628182 (5 MB)
   23 23:56:27.170107  progress   0 % (0 MB)
   24 23:56:27.174422  progress   5 % (0 MB)
   25 23:56:27.178682  progress  10 % (0 MB)
   26 23:56:27.182486  progress  15 % (0 MB)
   27 23:56:27.186615  progress  20 % (1 MB)
   28 23:56:27.190268  progress  25 % (1 MB)
   29 23:56:27.194411  progress  30 % (1 MB)
   30 23:56:27.198482  progress  35 % (1 MB)
   31 23:56:27.202169  progress  40 % (2 MB)
   32 23:56:27.206230  progress  45 % (2 MB)
   33 23:56:27.209886  progress  50 % (2 MB)
   34 23:56:27.214028  progress  55 % (2 MB)
   35 23:56:27.218109  progress  60 % (3 MB)
   36 23:56:27.221861  progress  65 % (3 MB)
   37 23:56:27.225927  progress  70 % (3 MB)
   38 23:56:27.229588  progress  75 % (4 MB)
   39 23:56:27.233630  progress  80 % (4 MB)
   40 23:56:27.237330  progress  85 % (4 MB)
   41 23:56:27.241351  progress  90 % (4 MB)
   42 23:56:27.245334  progress  95 % (5 MB)
   43 23:56:27.248674  progress 100 % (5 MB)
   44 23:56:27.249332  5 MB downloaded in 0.11 s (47.28 MB/s)
   45 23:56:27.249899  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 23:56:27.250813  end: 1.1 download-retry (duration 00:00:00) [common]
   48 23:56:27.251125  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 23:56:27.251408  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 23:56:27.251888  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/kernel/Image
   51 23:56:27.252188  saving as /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/kernel/Image
   52 23:56:27.252410  total size: 44138504 (42 MB)
   53 23:56:27.252627  No compression specified
   54 23:56:27.286524  progress   0 % (0 MB)
   55 23:56:27.314099  progress   5 % (2 MB)
   56 23:56:27.341229  progress  10 % (4 MB)
   57 23:56:27.368615  progress  15 % (6 MB)
   58 23:56:27.398111  progress  20 % (8 MB)
   59 23:56:27.437318  progress  25 % (10 MB)
   60 23:56:27.471356  progress  30 % (12 MB)
   61 23:56:27.503693  progress  35 % (14 MB)
   62 23:56:27.536084  progress  40 % (16 MB)
   63 23:56:27.569207  progress  45 % (18 MB)
   64 23:56:27.601258  progress  50 % (21 MB)
   65 23:56:27.633069  progress  55 % (23 MB)
   66 23:56:27.665138  progress  60 % (25 MB)
   67 23:56:27.697808  progress  65 % (27 MB)
   68 23:56:27.729772  progress  70 % (29 MB)
   69 23:56:27.762398  progress  75 % (31 MB)
   70 23:56:27.794402  progress  80 % (33 MB)
   71 23:56:27.826557  progress  85 % (35 MB)
   72 23:56:27.859085  progress  90 % (37 MB)
   73 23:56:27.890870  progress  95 % (40 MB)
   74 23:56:27.922412  progress 100 % (42 MB)
   75 23:56:27.923018  42 MB downloaded in 0.67 s (62.77 MB/s)
   76 23:56:27.923627  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 23:56:27.924726  end: 1.2 download-retry (duration 00:00:01) [common]
   79 23:56:27.925095  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 23:56:27.925438  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 23:56:27.926005  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 23:56:27.926307  saving as /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 23:56:27.926565  total size: 53209 (0 MB)
   84 23:56:27.926832  No compression specified
   85 23:56:27.959068  progress  61 % (0 MB)
   86 23:56:27.959937  progress 100 % (0 MB)
   87 23:56:27.960540  0 MB downloaded in 0.03 s (1.49 MB/s)
   88 23:56:27.961018  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 23:56:27.961850  end: 1.3 download-retry (duration 00:00:00) [common]
   91 23:56:27.962122  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 23:56:27.962397  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 23:56:27.962854  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
   94 23:56:27.963098  saving as /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/nfsrootfs/full.rootfs.tar
   95 23:56:27.963315  total size: 107552908 (102 MB)
   96 23:56:27.963533  Using unxz to decompress xz
   97 23:56:28.002924  progress   0 % (0 MB)
   98 23:56:28.675459  progress   5 % (5 MB)
   99 23:56:29.415347  progress  10 % (10 MB)
  100 23:56:30.144696  progress  15 % (15 MB)
  101 23:56:30.903965  progress  20 % (20 MB)
  102 23:56:31.476675  progress  25 % (25 MB)
  103 23:56:32.097000  progress  30 % (30 MB)
  104 23:56:32.832402  progress  35 % (35 MB)
  105 23:56:33.180190  progress  40 % (41 MB)
  106 23:56:33.609623  progress  45 % (46 MB)
  107 23:56:34.335275  progress  50 % (51 MB)
  108 23:56:35.063276  progress  55 % (56 MB)
  109 23:56:35.844004  progress  60 % (61 MB)
  110 23:56:36.632031  progress  65 % (66 MB)
  111 23:56:37.386083  progress  70 % (71 MB)
  112 23:56:38.146077  progress  75 % (76 MB)
  113 23:56:38.825832  progress  80 % (82 MB)
  114 23:56:39.532447  progress  85 % (87 MB)
  115 23:56:40.276401  progress  90 % (92 MB)
  116 23:56:41.000921  progress  95 % (97 MB)
  117 23:56:41.740916  progress 100 % (102 MB)
  118 23:56:41.753649  102 MB downloaded in 13.79 s (7.44 MB/s)
  119 23:56:41.754541  end: 1.4.1 http-download (duration 00:00:14) [common]
  121 23:56:41.756195  end: 1.4 download-retry (duration 00:00:14) [common]
  122 23:56:41.756718  start: 1.5 download-retry (timeout 00:09:45) [common]
  123 23:56:41.757231  start: 1.5.1 http-download (timeout 00:09:45) [common]
  124 23:56:41.758258  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/modules.tar.xz
  125 23:56:41.758756  saving as /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/modules/modules.tar
  126 23:56:41.759161  total size: 11452436 (10 MB)
  127 23:56:41.759572  Using unxz to decompress xz
  128 23:56:41.810742  progress   0 % (0 MB)
  129 23:56:41.878771  progress   5 % (0 MB)
  130 23:56:41.951041  progress  10 % (1 MB)
  131 23:56:42.049704  progress  15 % (1 MB)
  132 23:56:42.143644  progress  20 % (2 MB)
  133 23:56:42.225789  progress  25 % (2 MB)
  134 23:56:42.297550  progress  30 % (3 MB)
  135 23:56:42.378280  progress  35 % (3 MB)
  136 23:56:42.453509  progress  40 % (4 MB)
  137 23:56:42.529902  progress  45 % (4 MB)
  138 23:56:42.611412  progress  50 % (5 MB)
  139 23:56:42.696222  progress  55 % (6 MB)
  140 23:56:42.780627  progress  60 % (6 MB)
  141 23:56:42.863274  progress  65 % (7 MB)
  142 23:56:42.941709  progress  70 % (7 MB)
  143 23:56:43.025046  progress  75 % (8 MB)
  144 23:56:43.107055  progress  80 % (8 MB)
  145 23:56:43.188680  progress  85 % (9 MB)
  146 23:56:43.268065  progress  90 % (9 MB)
  147 23:56:43.347043  progress  95 % (10 MB)
  148 23:56:43.420118  progress 100 % (10 MB)
  149 23:56:43.433171  10 MB downloaded in 1.67 s (6.52 MB/s)
  150 23:56:43.433754  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 23:56:43.434576  end: 1.5 download-retry (duration 00:00:02) [common]
  153 23:56:43.434847  start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
  154 23:56:43.435113  start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
  155 23:56:53.287769  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/968685/extract-nfsrootfs-t1er5lhc
  156 23:56:53.288402  end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
  157 23:56:53.288690  start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
  158 23:56:53.289307  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_
  159 23:56:53.289736  makedir: /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin
  160 23:56:53.290065  makedir: /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/tests
  161 23:56:53.290380  makedir: /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/results
  162 23:56:53.290718  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-add-keys
  163 23:56:53.291276  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-add-sources
  164 23:56:53.291801  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-background-process-start
  165 23:56:53.292339  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-background-process-stop
  166 23:56:53.292875  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-common-functions
  167 23:56:53.293374  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-echo-ipv4
  168 23:56:53.293856  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-install-packages
  169 23:56:53.294350  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-installed-packages
  170 23:56:53.294827  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-os-build
  171 23:56:53.295301  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-probe-channel
  172 23:56:53.295777  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-probe-ip
  173 23:56:53.296305  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-target-ip
  174 23:56:53.296883  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-target-mac
  175 23:56:53.297374  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-target-storage
  176 23:56:53.297860  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-test-case
  177 23:56:53.298345  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-test-event
  178 23:56:53.298848  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-test-feedback
  179 23:56:53.299358  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-test-raise
  180 23:56:53.299859  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-test-reference
  181 23:56:53.300466  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-test-runner
  182 23:56:53.300963  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-test-set
  183 23:56:53.301440  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-test-shell
  184 23:56:53.301931  Updating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-install-packages (oe)
  185 23:56:53.302465  Updating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/bin/lava-installed-packages (oe)
  186 23:56:53.302909  Creating /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/environment
  187 23:56:53.303289  LAVA metadata
  188 23:56:53.303549  - LAVA_JOB_ID=968685
  189 23:56:53.303764  - LAVA_DISPATCHER_IP=192.168.6.2
  190 23:56:53.304137  start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
  191 23:56:53.305102  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 23:56:53.305413  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
  193 23:56:53.305623  skipped lava-vland-overlay
  194 23:56:53.305866  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 23:56:53.306122  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
  196 23:56:53.306341  skipped lava-multinode-overlay
  197 23:56:53.306585  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 23:56:53.306836  start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
  199 23:56:53.307084  Loading test definitions
  200 23:56:53.307366  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
  201 23:56:53.307587  Using /lava-968685 at stage 0
  202 23:56:53.308774  uuid=968685_1.6.2.4.1 testdef=None
  203 23:56:53.309087  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 23:56:53.309350  start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
  205 23:56:53.311125  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 23:56:53.311911  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
  208 23:56:53.314166  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 23:56:53.314980  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
  211 23:56:53.317168  runner path: /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/0/tests/0_dmesg test_uuid 968685_1.6.2.4.1
  212 23:56:53.317737  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 23:56:53.318490  Creating lava-test-runner.conf files
  215 23:56:53.318694  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/968685/lava-overlay-j5gls_5_/lava-968685/0 for stage 0
  216 23:56:53.319028  - 0_dmesg
  217 23:56:53.319368  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 23:56:53.319642  start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
  219 23:56:53.341187  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 23:56:53.341564  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
  221 23:56:53.341824  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 23:56:53.342089  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 23:56:53.342351  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
  224 23:56:53.968745  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 23:56:53.969218  start: 1.6.4 extract-modules (timeout 00:09:33) [common]
  226 23:56:53.969466  extracting modules file /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968685/extract-nfsrootfs-t1er5lhc
  227 23:56:55.312267  extracting modules file /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968685/extract-overlay-ramdisk-_xq_35tx/ramdisk
  228 23:56:56.677456  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  229 23:56:56.677931  start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
  230 23:56:56.678209  [common] Applying overlay to NFS
  231 23:56:56.678421  [common] Applying overlay /var/lib/lava/dispatcher/tmp/968685/compress-overlay-v8fsv6b6/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/968685/extract-nfsrootfs-t1er5lhc
  232 23:56:56.707383  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 23:56:56.707750  start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
  234 23:56:56.708047  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
  235 23:56:56.708288  Converting downloaded kernel to a uImage
  236 23:56:56.708595  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/kernel/Image /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/kernel/uImage
  237 23:56:57.176794  output: Image Name:   
  238 23:56:57.177205  output: Created:      Sat Nov  9 23:56:56 2024
  239 23:56:57.177413  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 23:56:57.177619  output: Data Size:    44138504 Bytes = 43104.01 KiB = 42.09 MiB
  241 23:56:57.177820  output: Load Address: 01080000
  242 23:56:57.178021  output: Entry Point:  01080000
  243 23:56:57.178220  output: 
  244 23:56:57.178554  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  245 23:56:57.178817  end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
  246 23:56:57.179084  start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
  247 23:56:57.179336  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 23:56:57.179590  start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
  249 23:56:57.179845  Building ramdisk /var/lib/lava/dispatcher/tmp/968685/extract-overlay-ramdisk-_xq_35tx/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/968685/extract-overlay-ramdisk-_xq_35tx/ramdisk
  250 23:56:59.303439  >> 165197 blocks

  251 23:57:07.775111  Adding RAMdisk u-boot header.
  252 23:57:07.775798  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/968685/extract-overlay-ramdisk-_xq_35tx/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/968685/extract-overlay-ramdisk-_xq_35tx/ramdisk.cpio.gz.uboot
  253 23:57:08.021296  output: Image Name:   
  254 23:57:08.021738  output: Created:      Sat Nov  9 23:57:07 2024
  255 23:57:08.022233  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 23:57:08.022700  output: Data Size:    23581989 Bytes = 23029.29 KiB = 22.49 MiB
  257 23:57:08.023170  output: Load Address: 00000000
  258 23:57:08.023617  output: Entry Point:  00000000
  259 23:57:08.024108  output: 
  260 23:57:08.025314  rename /var/lib/lava/dispatcher/tmp/968685/extract-overlay-ramdisk-_xq_35tx/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/ramdisk/ramdisk.cpio.gz.uboot
  261 23:57:08.026108  end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
  262 23:57:08.026723  end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
  263 23:57:08.027314  start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
  264 23:57:08.027816  No LXC device requested
  265 23:57:08.028432  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 23:57:08.029008  start: 1.8 deploy-device-env (timeout 00:09:19) [common]
  267 23:57:08.029559  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 23:57:08.030016  Checking files for TFTP limit of 4294967296 bytes.
  269 23:57:08.032962  end: 1 tftp-deploy (duration 00:00:41) [common]
  270 23:57:08.033599  start: 2 uboot-action (timeout 00:05:00) [common]
  271 23:57:08.034189  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 23:57:08.034747  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 23:57:08.035306  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 23:57:08.035887  Using kernel file from prepare-kernel: 968685/tftp-deploy-v5xtg8o_/kernel/uImage
  275 23:57:08.036631  substitutions:
  276 23:57:08.037092  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 23:57:08.037542  - {DTB_ADDR}: 0x01070000
  278 23:57:08.037989  - {DTB}: 968685/tftp-deploy-v5xtg8o_/dtb/meson-sm1-s905d3-libretech-cc.dtb
  279 23:57:08.038430  - {INITRD}: 968685/tftp-deploy-v5xtg8o_/ramdisk/ramdisk.cpio.gz.uboot
  280 23:57:08.038871  - {KERNEL_ADDR}: 0x01080000
  281 23:57:08.039306  - {KERNEL}: 968685/tftp-deploy-v5xtg8o_/kernel/uImage
  282 23:57:08.039761  - {LAVA_MAC}: None
  283 23:57:08.040288  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/968685/extract-nfsrootfs-t1er5lhc
  284 23:57:08.040742  - {NFS_SERVER_IP}: 192.168.6.2
  285 23:57:08.041182  - {PRESEED_CONFIG}: None
  286 23:57:08.041614  - {PRESEED_LOCAL}: None
  287 23:57:08.042045  - {RAMDISK_ADDR}: 0x08000000
  288 23:57:08.042473  - {RAMDISK}: 968685/tftp-deploy-v5xtg8o_/ramdisk/ramdisk.cpio.gz.uboot
  289 23:57:08.042907  - {ROOT_PART}: None
  290 23:57:08.043340  - {ROOT}: None
  291 23:57:08.043773  - {SERVER_IP}: 192.168.6.2
  292 23:57:08.044245  - {TEE_ADDR}: 0x83000000
  293 23:57:08.044682  - {TEE}: None
  294 23:57:08.045115  Parsed boot commands:
  295 23:57:08.045535  - setenv autoload no
  296 23:57:08.045966  - setenv initrd_high 0xffffffff
  297 23:57:08.046394  - setenv fdt_high 0xffffffff
  298 23:57:08.046819  - dhcp
  299 23:57:08.047245  - setenv serverip 192.168.6.2
  300 23:57:08.047669  - tftpboot 0x01080000 968685/tftp-deploy-v5xtg8o_/kernel/uImage
  301 23:57:08.048129  - tftpboot 0x08000000 968685/tftp-deploy-v5xtg8o_/ramdisk/ramdisk.cpio.gz.uboot
  302 23:57:08.048569  - tftpboot 0x01070000 968685/tftp-deploy-v5xtg8o_/dtb/meson-sm1-s905d3-libretech-cc.dtb
  303 23:57:08.049000  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/968685/extract-nfsrootfs-t1er5lhc,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 23:57:08.049447  - bootm 0x01080000 0x08000000 0x01070000
  305 23:57:08.049999  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 23:57:08.051645  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 23:57:08.052142  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  309 23:57:08.067258  Setting prompt string to ['lava-test: # ']
  310 23:57:08.068895  end: 2.3 connect-device (duration 00:00:00) [common]
  311 23:57:08.069576  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 23:57:08.070196  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 23:57:08.070778  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 23:57:08.072289  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  315 23:57:08.106739  >> OK - accepted request

  316 23:57:08.108877  Returned 0 in 0 seconds
  317 23:57:08.210190  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 23:57:08.212152  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 23:57:08.212613  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 23:57:08.212926  Setting prompt string to ['Hit any key to stop autoboot']
  322 23:57:08.213431  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 23:57:08.214588  Trying 192.168.56.21...
  324 23:57:08.215028  Connected to conserv1.
  325 23:57:08.215387  Escape character is '^]'.
  326 23:57:08.215747  
  327 23:57:08.216077  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
  328 23:57:08.216378  
  329 23:57:16.404509  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  330 23:57:16.405163  bl2_stage_init 0x01
  331 23:57:16.405639  bl2_stage_init 0x81
  332 23:57:16.410104  hw id: 0x0000 - pwm id 0x01
  333 23:57:16.410627  bl2_stage_init 0xc1
  334 23:57:16.415686  bl2_stage_init 0x02
  335 23:57:16.416281  
  336 23:57:16.416780  L0:00000000
  337 23:57:16.417246  L1:00000703
  338 23:57:16.417706  L2:00008067
  339 23:57:16.418158  L3:15000000
  340 23:57:16.421423  S1:00000000
  341 23:57:16.421967  B2:20282000
  342 23:57:16.422453  B1:a0f83180
  343 23:57:16.422910  
  344 23:57:16.423365  TE: 69365
  345 23:57:16.423812  
  346 23:57:16.426870  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  347 23:57:16.427369  
  348 23:57:16.432454  Board ID = 1
  349 23:57:16.432950  Set cpu clk to 24M
  350 23:57:16.433409  Set clk81 to 24M
  351 23:57:16.438053  Use GP1_pll as DSU clk.
  352 23:57:16.438547  DSU clk: 1200 Mhz
  353 23:57:16.439005  CPU clk: 1200 MHz
  354 23:57:16.443705  Set clk81 to 166.6M
  355 23:57:16.449429  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  356 23:57:16.449945  board id: 1
  357 23:57:16.456490  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 23:57:16.467147  fw parse done
  359 23:57:16.473102  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 23:57:16.515721  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 23:57:16.526714  PIEI prepare done
  362 23:57:16.527229  fastboot data load
  363 23:57:16.527692  fastboot data verify
  364 23:57:16.532285  verify result: 266
  365 23:57:16.537886  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  366 23:57:16.538394  LPDDR4 probe
  367 23:57:16.538846  ddr clk to 1584MHz
  368 23:57:16.545813  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 23:57:16.583128  
  370 23:57:16.583655  dmc_version 0001
  371 23:57:16.589815  Check phy result
  372 23:57:16.595717  INFO : End of CA training
  373 23:57:16.596267  INFO : End of initialization
  374 23:57:16.601299  INFO : Training has run successfully!
  375 23:57:16.601793  Check phy result
  376 23:57:16.606878  INFO : End of initialization
  377 23:57:16.607365  INFO : End of read enable training
  378 23:57:16.612504  INFO : End of fine write leveling
  379 23:57:16.618088  INFO : End of Write leveling coarse delay
  380 23:57:16.618574  INFO : Training has run successfully!
  381 23:57:16.619027  Check phy result
  382 23:57:16.623722  INFO : End of initialization
  383 23:57:16.624275  INFO : End of read dq deskew training
  384 23:57:16.629305  INFO : End of MPR read delay center optimization
  385 23:57:16.634896  INFO : End of write delay center optimization
  386 23:57:16.640535  INFO : End of read delay center optimization
  387 23:57:16.641025  INFO : End of max read latency training
  388 23:57:16.646094  INFO : Training has run successfully!
  389 23:57:16.646581  1D training succeed
  390 23:57:16.655263  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 23:57:16.702864  Check phy result
  392 23:57:16.703355  INFO : End of initialization
  393 23:57:16.725211  INFO : End of 2D read delay Voltage center optimization
  394 23:57:16.744390  INFO : End of 2D read delay Voltage center optimization
  395 23:57:16.796230  INFO : End of 2D write delay Voltage center optimization
  396 23:57:16.845568  INFO : End of 2D write delay Voltage center optimization
  397 23:57:16.851029  INFO : Training has run successfully!
  398 23:57:16.851535  
  399 23:57:16.852032  channel==0
  400 23:57:16.856641  RxClkDly_Margin_A0==88 ps 9
  401 23:57:16.857131  TxDqDly_Margin_A0==98 ps 10
  402 23:57:16.862249  RxClkDly_Margin_A1==88 ps 9
  403 23:57:16.862748  TxDqDly_Margin_A1==88 ps 9
  404 23:57:16.863201  TrainedVREFDQ_A0==74
  405 23:57:16.867813  TrainedVREFDQ_A1==74
  406 23:57:16.868334  VrefDac_Margin_A0==22
  407 23:57:16.868788  DeviceVref_Margin_A0==40
  408 23:57:16.873498  VrefDac_Margin_A1==22
  409 23:57:16.873981  DeviceVref_Margin_A1==40
  410 23:57:16.874428  
  411 23:57:16.874870  
  412 23:57:16.875313  channel==1
  413 23:57:16.878998  RxClkDly_Margin_A0==78 ps 8
  414 23:57:16.879482  TxDqDly_Margin_A0==98 ps 10
  415 23:57:16.884638  RxClkDly_Margin_A1==88 ps 9
  416 23:57:16.885120  TxDqDly_Margin_A1==88 ps 9
  417 23:57:16.890266  TrainedVREFDQ_A0==78
  418 23:57:16.890750  TrainedVREFDQ_A1==78
  419 23:57:16.891200  VrefDac_Margin_A0==22
  420 23:57:16.895836  DeviceVref_Margin_A0==36
  421 23:57:16.896347  VrefDac_Margin_A1==22
  422 23:57:16.901517  DeviceVref_Margin_A1==36
  423 23:57:16.901995  
  424 23:57:16.902445   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 23:57:16.902885  
  426 23:57:16.934995  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  427 23:57:16.935569  2D training succeed
  428 23:57:16.940636  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 23:57:16.946275  auto size-- 65535DDR cs0 size: 2048MB
  430 23:57:16.946756  DDR cs1 size: 2048MB
  431 23:57:16.951819  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 23:57:16.952340  cs0 DataBus test pass
  433 23:57:16.957532  cs1 DataBus test pass
  434 23:57:16.958019  cs0 AddrBus test pass
  435 23:57:16.958467  cs1 AddrBus test pass
  436 23:57:16.958904  
  437 23:57:16.963003  100bdlr_step_size ps== 478
  438 23:57:16.963494  result report
  439 23:57:16.968622  boot times 0Enable ddr reg access
  440 23:57:16.973804  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 23:57:16.987643  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  442 23:57:17.641564  bl2z: ptr: 05129330, size: 00001e40
  443 23:57:17.647719  0.0;M3 CHK:0;cm4_sp_mode 0
  444 23:57:17.648279  MVN_1=0x00000000
  445 23:57:17.648732  MVN_2=0x00000000
  446 23:57:17.659176  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  447 23:57:17.659679  OPS=0x04
  448 23:57:17.660186  ring efuse init
  449 23:57:17.664832  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  450 23:57:17.665333  [0.017319 Inits done]
  451 23:57:17.665782  secure task start!
  452 23:57:17.672733  high task start!
  453 23:57:17.673225  low task start!
  454 23:57:17.673675  run into bl31
  455 23:57:17.681374  NOTICE:  BL31: v1.3(release):4fc40b1
  456 23:57:17.689138  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  457 23:57:17.689651  NOTICE:  BL31: G12A normal boot!
  458 23:57:17.704652  NOTICE:  BL31: BL33 decompress pass
  459 23:57:17.710390  ERROR:   Error initializing runtime service opteed_fast
  460 23:57:20.455561  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  461 23:57:20.456302  bl2_stage_init 0x01
  462 23:57:20.456794  bl2_stage_init 0x81
  463 23:57:20.461142  hw id: 0x0000 - pwm id 0x01
  464 23:57:20.461673  bl2_stage_init 0xc1
  465 23:57:20.465442  bl2_stage_init 0x02
  466 23:57:20.465981  
  467 23:57:20.466464  L0:00000000
  468 23:57:20.466902  L1:00000703
  469 23:57:20.467335  L2:00008067
  470 23:57:20.471047  L3:15000000
  471 23:57:20.471540  S1:00000000
  472 23:57:20.471975  B2:20282000
  473 23:57:20.472442  B1:a0f83180
  474 23:57:20.472870  
  475 23:57:20.473300  TE: 71588
  476 23:57:20.473728  
  477 23:57:20.482117  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  478 23:57:20.482614  
  479 23:57:20.483049  Board ID = 1
  480 23:57:20.483476  Set cpu clk to 24M
  481 23:57:20.483904  Set clk81 to 24M
  482 23:57:20.487807  Use GP1_pll as DSU clk.
  483 23:57:20.488330  DSU clk: 1200 Mhz
  484 23:57:20.488768  CPU clk: 1200 MHz
  485 23:57:20.493270  Set clk81 to 166.6M
  486 23:57:20.499043  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  487 23:57:20.499541  board id: 1
  488 23:57:20.507471  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  489 23:57:20.518283  fw parse done
  490 23:57:20.524391  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  491 23:57:20.567286  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  492 23:57:20.578366  PIEI prepare done
  493 23:57:20.578869  fastboot data load
  494 23:57:20.579304  fastboot data verify
  495 23:57:20.584090  verify result: 266
  496 23:57:20.589590  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  497 23:57:20.590074  LPDDR4 probe
  498 23:57:20.590506  ddr clk to 1584MHz
  499 23:57:20.597561  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  500 23:57:20.635383  
  501 23:57:20.635930  dmc_version 0001
  502 23:57:20.642336  Check phy result
  503 23:57:20.648399  INFO : End of CA training
  504 23:57:20.648894  INFO : End of initialization
  505 23:57:20.654102  INFO : Training has run successfully!
  506 23:57:20.654594  Check phy result
  507 23:57:20.659596  INFO : End of initialization
  508 23:57:20.660113  INFO : End of read enable training
  509 23:57:20.662865  INFO : End of fine write leveling
  510 23:57:20.668397  INFO : End of Write leveling coarse delay
  511 23:57:20.674043  INFO : Training has run successfully!
  512 23:57:20.674533  Check phy result
  513 23:57:20.674982  INFO : End of initialization
  514 23:57:20.679645  INFO : End of read dq deskew training
  515 23:57:20.685240  INFO : End of MPR read delay center optimization
  516 23:57:20.685733  INFO : End of write delay center optimization
  517 23:57:20.690825  INFO : End of read delay center optimization
  518 23:57:20.696432  INFO : End of max read latency training
  519 23:57:20.696916  INFO : Training has run successfully!
  520 23:57:20.702031  1D training succeed
  521 23:57:20.708016  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  522 23:57:20.756296  Check phy result
  523 23:57:20.756788  INFO : End of initialization
  524 23:57:20.783683  INFO : End of 2D read delay Voltage center optimization
  525 23:57:20.807864  INFO : End of 2D read delay Voltage center optimization
  526 23:57:20.864602  INFO : End of 2D write delay Voltage center optimization
  527 23:57:20.918632  INFO : End of 2D write delay Voltage center optimization
  528 23:57:20.924309  INFO : Training has run successfully!
  529 23:57:20.924804  
  530 23:57:20.925264  channel==0
  531 23:57:20.929810  RxClkDly_Margin_A0==88 ps 9
  532 23:57:20.930302  TxDqDly_Margin_A0==98 ps 10
  533 23:57:20.935425  RxClkDly_Margin_A1==88 ps 9
  534 23:57:20.935908  TxDqDly_Margin_A1==98 ps 10
  535 23:57:20.936409  TrainedVREFDQ_A0==74
  536 23:57:20.940951  TrainedVREFDQ_A1==74
  537 23:57:20.941462  VrefDac_Margin_A0==24
  538 23:57:20.941914  DeviceVref_Margin_A0==40
  539 23:57:20.946632  VrefDac_Margin_A1==22
  540 23:57:20.947119  DeviceVref_Margin_A1==40
  541 23:57:20.947567  
  542 23:57:20.948143  
  543 23:57:20.952252  channel==1
  544 23:57:20.952748  RxClkDly_Margin_A0==78 ps 8
  545 23:57:20.953199  TxDqDly_Margin_A0==98 ps 10
  546 23:57:20.957894  RxClkDly_Margin_A1==78 ps 8
  547 23:57:20.958381  TxDqDly_Margin_A1==88 ps 9
  548 23:57:20.963416  TrainedVREFDQ_A0==75
  549 23:57:20.963912  TrainedVREFDQ_A1==75
  550 23:57:20.964408  VrefDac_Margin_A0==23
  551 23:57:20.969018  DeviceVref_Margin_A0==39
  552 23:57:20.969500  VrefDac_Margin_A1==22
  553 23:57:20.974623  DeviceVref_Margin_A1==39
  554 23:57:20.975104  
  555 23:57:20.975554   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  556 23:57:20.976027  
  557 23:57:21.008061  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
  558 23:57:21.008580  2D training succeed
  559 23:57:21.013658  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  560 23:57:21.019356  auto size-- 65535DDR cs0 size: 2048MB
  561 23:57:21.019849  DDR cs1 size: 2048MB
  562 23:57:21.024968  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  563 23:57:21.025477  cs0 DataBus test pass
  564 23:57:21.030485  cs1 DataBus test pass
  565 23:57:21.030987  cs0 AddrBus test pass
  566 23:57:21.031434  cs1 AddrBus test pass
  567 23:57:21.031869  
  568 23:57:21.036139  100bdlr_step_size ps== 471
  569 23:57:21.036641  result report
  570 23:57:21.041664  boot times 0Enable ddr reg access
  571 23:57:21.046182  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  572 23:57:21.060822  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  573 23:57:21.720173  bl2z: ptr: 05129330, size: 00001e40
  574 23:57:21.727675  0.0;M3 CHK:0;cm4_sp_mode 0
  575 23:57:21.727963  MVN_1=0x00000000
  576 23:57:21.728238  MVN_2=0x00000000
  577 23:57:21.739217  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  578 23:57:21.739715  OPS=0x04
  579 23:57:21.740182  ring efuse init
  580 23:57:21.742126  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  581 23:57:21.747635  [0.017354 Inits done]
  582 23:57:21.748110  secure task start!
  583 23:57:21.748530  high task start!
  584 23:57:21.748935  low task start!
  585 23:57:21.752370  run into bl31
  586 23:57:21.761079  NOTICE:  BL31: v1.3(release):4fc40b1
  587 23:57:21.768770  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  588 23:57:21.769229  NOTICE:  BL31: G12A normal boot!
  589 23:57:21.784333  NOTICE:  BL31: BL33 decompress pass
  590 23:57:21.790039  ERROR:   Error initializing runtime service opteed_fast
  591 23:57:23.156786  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  592 23:57:23.157360  bl2_stage_init 0x01
  593 23:57:23.157799  bl2_stage_init 0x81
  594 23:57:23.162387  hw id: 0x0000 - pwm id 0x01
  595 23:57:23.162860  bl2_stage_init 0xc1
  596 23:57:23.168073  bl2_stage_init 0x02
  597 23:57:23.168555  
  598 23:57:23.168974  L0:00000000
  599 23:57:23.169386  L1:00000703
  600 23:57:23.169818  L2:00008067
  601 23:57:23.170222  L3:15000000
  602 23:57:23.173603  S1:00000000
  603 23:57:23.174087  B2:20282000
  604 23:57:23.174504  B1:a0f83180
  605 23:57:23.174911  
  606 23:57:23.175312  TE: 72954
  607 23:57:23.175715  
  608 23:57:23.179288  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  609 23:57:23.179758  
  610 23:57:23.184788  Board ID = 1
  611 23:57:23.185256  Set cpu clk to 24M
  612 23:57:23.185676  Set clk81 to 24M
  613 23:57:23.190398  Use GP1_pll as DSU clk.
  614 23:57:23.190871  DSU clk: 1200 Mhz
  615 23:57:23.191290  CPU clk: 1200 MHz
  616 23:57:23.196058  Set clk81 to 166.6M
  617 23:57:23.201563  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  618 23:57:23.202031  board id: 1
  619 23:57:23.208754  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  620 23:57:23.219409  fw parse done
  621 23:57:23.225435  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  622 23:57:23.268144  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  623 23:57:23.279073  PIEI prepare done
  624 23:57:23.279587  fastboot data load
  625 23:57:23.280092  fastboot data verify
  626 23:57:23.284700  verify result: 266
  627 23:57:23.290239  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  628 23:57:23.290724  LPDDR4 probe
  629 23:57:23.291146  ddr clk to 1584MHz
  630 23:57:23.298249  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  631 23:57:23.335486  
  632 23:57:23.336022  dmc_version 0001
  633 23:57:23.342138  Check phy result
  634 23:57:23.348080  INFO : End of CA training
  635 23:57:23.348583  INFO : End of initialization
  636 23:57:23.353675  INFO : Training has run successfully!
  637 23:57:23.354168  Check phy result
  638 23:57:23.359288  INFO : End of initialization
  639 23:57:23.359777  INFO : End of read enable training
  640 23:57:23.364855  INFO : End of fine write leveling
  641 23:57:23.370529  INFO : End of Write leveling coarse delay
  642 23:57:23.371057  INFO : Training has run successfully!
  643 23:57:23.371501  Check phy result
  644 23:57:23.376110  INFO : End of initialization
  645 23:57:23.376601  INFO : End of read dq deskew training
  646 23:57:23.381678  INFO : End of MPR read delay center optimization
  647 23:57:23.387265  INFO : End of write delay center optimization
  648 23:57:23.392862  INFO : End of read delay center optimization
  649 23:57:23.393353  INFO : End of max read latency training
  650 23:57:23.398473  INFO : Training has run successfully!
  651 23:57:23.398956  1D training succeed
  652 23:57:23.407624  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  653 23:57:23.455241  Check phy result
  654 23:57:23.455768  INFO : End of initialization
  655 23:57:23.477586  INFO : End of 2D read delay Voltage center optimization
  656 23:57:23.496735  INFO : End of 2D read delay Voltage center optimization
  657 23:57:23.548614  INFO : End of 2D write delay Voltage center optimization
  658 23:57:23.597814  INFO : End of 2D write delay Voltage center optimization
  659 23:57:23.603434  INFO : Training has run successfully!
  660 23:57:23.603933  
  661 23:57:23.604417  channel==0
  662 23:57:23.608981  RxClkDly_Margin_A0==88 ps 9
  663 23:57:23.609477  TxDqDly_Margin_A0==98 ps 10
  664 23:57:23.614576  RxClkDly_Margin_A1==88 ps 9
  665 23:57:23.615065  TxDqDly_Margin_A1==88 ps 9
  666 23:57:23.615486  TrainedVREFDQ_A0==74
  667 23:57:23.620223  TrainedVREFDQ_A1==74
  668 23:57:23.620726  VrefDac_Margin_A0==23
  669 23:57:23.621145  DeviceVref_Margin_A0==40
  670 23:57:23.625801  VrefDac_Margin_A1==23
  671 23:57:23.626291  DeviceVref_Margin_A1==40
  672 23:57:23.626716  
  673 23:57:23.627125  
  674 23:57:23.627528  channel==1
  675 23:57:23.631423  RxClkDly_Margin_A0==78 ps 8
  676 23:57:23.631916  TxDqDly_Margin_A0==78 ps 8
  677 23:57:23.636983  RxClkDly_Margin_A1==78 ps 8
  678 23:57:23.637478  TxDqDly_Margin_A1==88 ps 9
  679 23:57:23.642586  TrainedVREFDQ_A0==75
  680 23:57:23.643084  TrainedVREFDQ_A1==75
  681 23:57:23.643503  VrefDac_Margin_A0==22
  682 23:57:23.648247  DeviceVref_Margin_A0==39
  683 23:57:23.648730  VrefDac_Margin_A1==20
  684 23:57:23.649150  DeviceVref_Margin_A1==39
  685 23:57:23.653841  
  686 23:57:23.654324   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  687 23:57:23.654743  
  688 23:57:23.687470  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
  689 23:57:23.688024  2D training succeed
  690 23:57:23.692966  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  691 23:57:23.698574  auto size-- 65535DDR cs0 size: 2048MB
  692 23:57:23.699066  DDR cs1 size: 2048MB
  693 23:57:23.704218  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  694 23:57:23.704711  cs0 DataBus test pass
  695 23:57:23.709815  cs1 DataBus test pass
  696 23:57:23.710305  cs0 AddrBus test pass
  697 23:57:23.710725  cs1 AddrBus test pass
  698 23:57:23.711132  
  699 23:57:23.715464  100bdlr_step_size ps== 478
  700 23:57:23.715962  result report
  701 23:57:23.720981  boot times 0Enable ddr reg access
  702 23:57:23.726113  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  703 23:57:23.739885  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  704 23:57:24.394780  bl2z: ptr: 05129330, size: 00001e40
  705 23:57:24.402915  0.0;M3 CHK:0;cm4_sp_mode 0
  706 23:57:24.403453  MVN_1=0x00000000
  707 23:57:24.403881  MVN_2=0x00000000
  708 23:57:24.414448  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  709 23:57:24.414988  OPS=0x04
  710 23:57:24.415415  ring efuse init
  711 23:57:24.420027  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  712 23:57:24.420550  [0.017310 Inits done]
  713 23:57:24.420971  secure task start!
  714 23:57:24.426835  high task start!
  715 23:57:24.427328  low task start!
  716 23:57:24.427745  run into bl31
  717 23:57:24.436345  NOTICE:  BL31: v1.3(release):4fc40b1
  718 23:57:24.444055  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  719 23:57:24.444561  NOTICE:  BL31: G12A normal boot!
  720 23:57:24.459522  NOTICE:  BL31: BL33 decompress pass
  721 23:57:24.465281  ERROR:   Error initializing runtime service opteed_fast
  722 23:57:25.260721  
  723 23:57:25.261311  
  724 23:57:25.265999  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  725 23:57:25.266463  
  726 23:57:25.269497  Model: Libre Computer AML-S905D3-CC Solitude
  727 23:57:25.416582  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  728 23:57:25.431896  DRAM:  2 GiB (effective 3.8 GiB)
  729 23:57:25.532911  Core:  406 devices, 33 uclasses, devicetree: separate
  730 23:57:25.538784  WDT:   Not starting watchdog@f0d0
  731 23:57:25.563874  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  732 23:57:25.576086  Loading Environment from FAT... Card did not respond to voltage select! : -110
  733 23:57:25.580181  ** Bad device specification mmc 0 **
  734 23:57:25.591079  Card did not respond to voltage select! : -110
  735 23:57:25.598730  ** Bad device specification mmc 0 **
  736 23:57:25.599166  Couldn't find partition mmc 0
  737 23:57:25.607066  Card did not respond to voltage select! : -110
  738 23:57:25.612603  ** Bad device specification mmc 0 **
  739 23:57:25.613034  Couldn't find partition mmc 0
  740 23:57:25.617682  Error: could not access storage.
  741 23:57:25.915092  Net:   eth0: ethernet@ff3f0000
  742 23:57:25.915620  starting USB...
  743 23:57:26.159965  Bus usb@ff500000: Register 3000140 NbrPorts 3
  744 23:57:26.160548  Starting the controller
  745 23:57:26.166982  USB XHCI 1.10
  746 23:57:27.723286  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  747 23:57:27.731500         scanning usb for storage devices... 0 Storage Device(s) found
  749 23:57:27.782979  Hit any key to stop autoboot:  1 
  750 23:57:27.783827  end: 2.4.2 bootloader-interrupt (duration 00:00:20) [common]
  751 23:57:27.784527  start: 2.4.3 bootloader-commands (timeout 00:04:40) [common]
  752 23:57:27.785018  Setting prompt string to ['=>']
  753 23:57:27.785503  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:40)
  754 23:57:27.797496   0 
  755 23:57:27.798396  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  757 23:57:27.899628  => setenv autoload no
  758 23:57:27.900576  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  759 23:57:27.905425  setenv autoload no
  761 23:57:28.006917  => setenv initrd_high 0xffffffff
  762 23:57:28.007856  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  763 23:57:28.012259  setenv initrd_high 0xffffffff
  765 23:57:28.113828  => setenv fdt_high 0xffffffff
  766 23:57:28.114783  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  767 23:57:28.119270  setenv fdt_high 0xffffffff
  769 23:57:28.220779  => dhcp
  770 23:57:28.221702  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  771 23:57:28.225965  dhcp
  772 23:57:28.730929  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
  773 23:57:28.731542  Speed: 1000, full duplex
  774 23:57:28.731962  BOOTP broadcast 1
  775 23:57:28.739904  DHCP client bound to address 192.168.6.21 (8 ms)
  777 23:57:28.841359  => setenv serverip 192.168.6.2
  778 23:57:28.842263  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  779 23:57:28.846711  setenv serverip 192.168.6.2
  781 23:57:28.948139  => tftpboot 0x01080000 968685/tftp-deploy-v5xtg8o_/kernel/uImage
  782 23:57:28.949077  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  783 23:57:28.955680  tftpboot 0x01080000 968685/tftp-deploy-v5xtg8o_/kernel/uImage
  784 23:57:28.956209  Speed: 1000, full duplex
  785 23:57:28.956626  Using ethernet@ff3f0000 device
  786 23:57:28.961238  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  787 23:57:28.966772  Filename '968685/tftp-deploy-v5xtg8o_/kernel/uImage'.
  788 23:57:28.970315  Load address: 0x1080000
  789 23:57:31.726806  Loading: *##################################################  42.1 MiB
  790 23:57:31.727430  	 15.3 MiB/s
  791 23:57:31.727863  done
  792 23:57:31.731246  Bytes transferred = 44138568 (2a18048 hex)
  794 23:57:31.832786  => tftpboot 0x08000000 968685/tftp-deploy-v5xtg8o_/ramdisk/ramdisk.cpio.gz.uboot
  795 23:57:31.833501  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
  796 23:57:31.840351  tftpboot 0x08000000 968685/tftp-deploy-v5xtg8o_/ramdisk/ramdisk.cpio.gz.uboot
  797 23:57:31.840799  Speed: 1000, full duplex
  798 23:57:31.841192  Using ethernet@ff3f0000 device
  799 23:57:31.845773  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  800 23:57:31.855478  Filename '968685/tftp-deploy-v5xtg8o_/ramdisk/ramdisk.cpio.gz.uboot'.
  801 23:57:31.855955  Load address: 0x8000000
  802 23:57:33.309682  Loading: *################################################# UDP wrong checksum 00000005 0000d76f
  803 23:57:38.311887  T  UDP wrong checksum 00000005 0000d76f
  804 23:57:48.313592  T T  UDP wrong checksum 00000005 0000d76f
  805 23:57:49.743855   UDP wrong checksum 000000ff 00005161
  806 23:57:49.766146   UDP wrong checksum 000000ff 0000da53
  807 23:58:08.317556  T T T T  UDP wrong checksum 00000005 0000d76f
  808 23:58:19.166961  T T  UDP wrong checksum 000000ff 0000ec7f
  809 23:58:19.221162   UDP wrong checksum 000000ff 00007f72
  810 23:58:25.652346  T  UDP wrong checksum 000000ff 00002beb
  811 23:58:25.692188   UDP wrong checksum 000000ff 0000c6dd
  812 23:58:28.322265  
  813 23:58:28.322862  Retry count exceeded; starting again
  815 23:58:28.324354  end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
  818 23:58:28.326174  end: 2.4 uboot-commands (duration 00:01:20) [common]
  820 23:58:28.327533  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
  822 23:58:28.328652  end: 2 uboot-action (duration 00:01:20) [common]
  824 23:58:28.330180  Cleaning after the job
  825 23:58:28.330735  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/ramdisk
  826 23:58:28.332071  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/kernel
  827 23:58:28.374274  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/dtb
  828 23:58:28.375076  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/nfsrootfs
  829 23:58:28.525184  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968685/tftp-deploy-v5xtg8o_/modules
  830 23:58:28.543811  start: 4.1 power-off (timeout 00:00:30) [common]
  831 23:58:28.544504  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  832 23:58:28.579884  >> OK - accepted request

  833 23:58:28.581940  Returned 0 in 0 seconds
  834 23:58:28.682690  end: 4.1 power-off (duration 00:00:00) [common]
  836 23:58:28.683620  start: 4.2 read-feedback (timeout 00:10:00) [common]
  837 23:58:28.684294  Listened to connection for namespace 'common' for up to 1s
  838 23:58:29.684477  Finalising connection for namespace 'common'
  839 23:58:29.684947  Disconnecting from shell: Finalise
  840 23:58:29.685233  => 
  841 23:58:29.786042  end: 4.2 read-feedback (duration 00:00:01) [common]
  842 23:58:29.786662  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/968685
  843 23:58:31.554793  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/968685
  844 23:58:31.555398  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.