Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:02:47.195482 lava-dispatcher, installed at version: 2024.01
2 00:02:47.196409 start: 0 validate
3 00:02:47.196919 Start time: 2024-11-10 00:02:47.196887+00:00 (UTC)
4 00:02:47.197486 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:02:47.198089 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:02:47.240965 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:02:47.241534 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 00:02:47.275189 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:02:47.276049 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 00:02:47.308809 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:02:47.309341 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:02:47.343270 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:02:47.343847 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 00:02:47.383485 validate duration: 0.19
16 00:02:47.384443 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:02:47.384782 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:02:47.385116 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:02:47.385846 Not decompressing ramdisk as can be used compressed.
20 00:02:47.386356 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 00:02:47.386656 saving as /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/ramdisk/initrd.cpio.gz
22 00:02:47.386935 total size: 5628169 (5 MB)
23 00:02:47.428738 progress 0 % (0 MB)
24 00:02:47.434144 progress 5 % (0 MB)
25 00:02:47.439607 progress 10 % (0 MB)
26 00:02:47.444273 progress 15 % (0 MB)
27 00:02:47.449336 progress 20 % (1 MB)
28 00:02:47.453895 progress 25 % (1 MB)
29 00:02:47.459053 progress 30 % (1 MB)
30 00:02:47.464142 progress 35 % (1 MB)
31 00:02:47.468804 progress 40 % (2 MB)
32 00:02:47.473754 progress 45 % (2 MB)
33 00:02:47.478281 progress 50 % (2 MB)
34 00:02:47.483300 progress 55 % (2 MB)
35 00:02:47.488401 progress 60 % (3 MB)
36 00:02:47.492939 progress 65 % (3 MB)
37 00:02:47.498005 progress 70 % (3 MB)
38 00:02:47.502521 progress 75 % (4 MB)
39 00:02:47.507609 progress 80 % (4 MB)
40 00:02:47.512148 progress 85 % (4 MB)
41 00:02:47.517101 progress 90 % (4 MB)
42 00:02:47.521846 progress 95 % (5 MB)
43 00:02:47.525926 progress 100 % (5 MB)
44 00:02:47.526798 5 MB downloaded in 0.14 s (38.39 MB/s)
45 00:02:47.527495 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:02:47.528648 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:02:47.529024 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:02:47.529356 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:02:47.529962 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/clang-15/kernel/Image
51 00:02:47.530276 saving as /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/kernel/Image
52 00:02:47.530533 total size: 37878272 (36 MB)
53 00:02:47.530797 No compression specified
54 00:02:47.567651 progress 0 % (0 MB)
55 00:02:47.595171 progress 5 % (1 MB)
56 00:02:47.622536 progress 10 % (3 MB)
57 00:02:47.650174 progress 15 % (5 MB)
58 00:02:47.677679 progress 20 % (7 MB)
59 00:02:47.704752 progress 25 % (9 MB)
60 00:02:47.732153 progress 30 % (10 MB)
61 00:02:47.759285 progress 35 % (12 MB)
62 00:02:47.786282 progress 40 % (14 MB)
63 00:02:47.813537 progress 45 % (16 MB)
64 00:02:47.840250 progress 50 % (18 MB)
65 00:02:47.867841 progress 55 % (19 MB)
66 00:02:47.895099 progress 60 % (21 MB)
67 00:02:47.922342 progress 65 % (23 MB)
68 00:02:47.949594 progress 70 % (25 MB)
69 00:02:47.976450 progress 75 % (27 MB)
70 00:02:48.003477 progress 80 % (28 MB)
71 00:02:48.030741 progress 85 % (30 MB)
72 00:02:48.058075 progress 90 % (32 MB)
73 00:02:48.085202 progress 95 % (34 MB)
74 00:02:48.111453 progress 100 % (36 MB)
75 00:02:48.112359 36 MB downloaded in 0.58 s (62.09 MB/s)
76 00:02:48.112940 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:02:48.113930 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:02:48.114261 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:02:48.114584 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:02:48.115150 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/clang-15/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 00:02:48.115487 saving as /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/dtb/meson-g12b-a311d-libretech-cc.dtb
83 00:02:48.115747 total size: 54703 (0 MB)
84 00:02:48.116071 No compression specified
85 00:02:48.155707 progress 59 % (0 MB)
86 00:02:48.156768 progress 100 % (0 MB)
87 00:02:48.157439 0 MB downloaded in 0.04 s (1.25 MB/s)
88 00:02:48.158020 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:02:48.159012 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:02:48.159323 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:02:48.159642 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:02:48.160218 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 00:02:48.160518 saving as /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/nfsrootfs/full.rootfs.tar
95 00:02:48.160768 total size: 120894716 (115 MB)
96 00:02:48.161020 Using unxz to decompress xz
97 00:02:48.196913 progress 0 % (0 MB)
98 00:02:48.990146 progress 5 % (5 MB)
99 00:02:49.828933 progress 10 % (11 MB)
100 00:02:50.619007 progress 15 % (17 MB)
101 00:02:51.353222 progress 20 % (23 MB)
102 00:02:51.947279 progress 25 % (28 MB)
103 00:02:52.807219 progress 30 % (34 MB)
104 00:02:53.590972 progress 35 % (40 MB)
105 00:02:53.952896 progress 40 % (46 MB)
106 00:02:54.322225 progress 45 % (51 MB)
107 00:02:55.035530 progress 50 % (57 MB)
108 00:02:55.911689 progress 55 % (63 MB)
109 00:02:56.687043 progress 60 % (69 MB)
110 00:02:57.434623 progress 65 % (74 MB)
111 00:02:58.209248 progress 70 % (80 MB)
112 00:02:59.026350 progress 75 % (86 MB)
113 00:02:59.806432 progress 80 % (92 MB)
114 00:03:00.562740 progress 85 % (98 MB)
115 00:03:01.411189 progress 90 % (103 MB)
116 00:03:02.185234 progress 95 % (109 MB)
117 00:03:03.013216 progress 100 % (115 MB)
118 00:03:03.025937 115 MB downloaded in 14.87 s (7.76 MB/s)
119 00:03:03.026536 end: 1.4.1 http-download (duration 00:00:15) [common]
121 00:03:03.027367 end: 1.4 download-retry (duration 00:00:15) [common]
122 00:03:03.027633 start: 1.5 download-retry (timeout 00:09:44) [common]
123 00:03:03.027892 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 00:03:03.028661 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/clang-15/modules.tar.xz
125 00:03:03.029132 saving as /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/modules/modules.tar
126 00:03:03.029535 total size: 11775236 (11 MB)
127 00:03:03.029952 Using unxz to decompress xz
128 00:03:03.070381 progress 0 % (0 MB)
129 00:03:03.138602 progress 5 % (0 MB)
130 00:03:03.215046 progress 10 % (1 MB)
131 00:03:03.311604 progress 15 % (1 MB)
132 00:03:03.407815 progress 20 % (2 MB)
133 00:03:03.487592 progress 25 % (2 MB)
134 00:03:03.564573 progress 30 % (3 MB)
135 00:03:03.645150 progress 35 % (3 MB)
136 00:03:03.724082 progress 40 % (4 MB)
137 00:03:03.799741 progress 45 % (5 MB)
138 00:03:03.884705 progress 50 % (5 MB)
139 00:03:03.966549 progress 55 % (6 MB)
140 00:03:04.052052 progress 60 % (6 MB)
141 00:03:04.133507 progress 65 % (7 MB)
142 00:03:04.215885 progress 70 % (7 MB)
143 00:03:04.300191 progress 75 % (8 MB)
144 00:03:04.384024 progress 80 % (9 MB)
145 00:03:04.465337 progress 85 % (9 MB)
146 00:03:04.549805 progress 90 % (10 MB)
147 00:03:04.629423 progress 95 % (10 MB)
148 00:03:04.707734 progress 100 % (11 MB)
149 00:03:04.719478 11 MB downloaded in 1.69 s (6.65 MB/s)
150 00:03:04.720445 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:03:04.722303 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:03:04.722894 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 00:03:04.723459 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 00:03:21.242950 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/968410/extract-nfsrootfs-f2dyn6pv
156 00:03:21.243560 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 00:03:21.243887 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 00:03:21.244754 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0
159 00:03:21.245264 makedir: /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin
160 00:03:21.245677 makedir: /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/tests
161 00:03:21.246070 makedir: /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/results
162 00:03:21.246427 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-add-keys
163 00:03:21.247046 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-add-sources
164 00:03:21.247679 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-background-process-start
165 00:03:21.248302 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-background-process-stop
166 00:03:21.248841 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-common-functions
167 00:03:21.249335 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-echo-ipv4
168 00:03:21.249818 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-install-packages
169 00:03:21.250326 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-installed-packages
170 00:03:21.250802 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-os-build
171 00:03:21.251301 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-probe-channel
172 00:03:21.251845 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-probe-ip
173 00:03:21.252391 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-target-ip
174 00:03:21.252882 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-target-mac
175 00:03:21.253356 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-target-storage
176 00:03:21.253839 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-test-case
177 00:03:21.254312 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-test-event
178 00:03:21.254779 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-test-feedback
179 00:03:21.255268 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-test-raise
180 00:03:21.255782 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-test-reference
181 00:03:21.256305 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-test-runner
182 00:03:21.256787 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-test-set
183 00:03:21.257258 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-test-shell
184 00:03:21.257733 Updating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-add-keys (debian)
185 00:03:21.258256 Updating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-add-sources (debian)
186 00:03:21.258751 Updating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-install-packages (debian)
187 00:03:21.259298 Updating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-installed-packages (debian)
188 00:03:21.259800 Updating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/bin/lava-os-build (debian)
189 00:03:21.260268 Creating /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/environment
190 00:03:21.260637 LAVA metadata
191 00:03:21.260900 - LAVA_JOB_ID=968410
192 00:03:21.261114 - LAVA_DISPATCHER_IP=192.168.6.2
193 00:03:21.261472 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 00:03:21.262401 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 00:03:21.262707 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 00:03:21.262915 skipped lava-vland-overlay
197 00:03:21.263156 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 00:03:21.263410 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 00:03:21.263627 skipped lava-multinode-overlay
200 00:03:21.263867 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 00:03:21.264147 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 00:03:21.264395 Loading test definitions
203 00:03:21.264671 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 00:03:21.264889 Using /lava-968410 at stage 0
205 00:03:21.265947 uuid=968410_1.6.2.4.1 testdef=None
206 00:03:21.266245 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 00:03:21.266506 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 00:03:21.268044 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 00:03:21.268830 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 00:03:21.270724 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 00:03:21.271544 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 00:03:21.273388 runner path: /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/0/tests/0_timesync-off test_uuid 968410_1.6.2.4.1
215 00:03:21.273924 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 00:03:21.274733 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 00:03:21.274954 Using /lava-968410 at stage 0
219 00:03:21.275302 Fetching tests from https://github.com/kernelci/test-definitions.git
220 00:03:21.275592 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/0/tests/1_kselftest-alsa'
221 00:03:24.778200 Running '/usr/bin/git checkout kernelci.org
222 00:03:25.225242 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 00:03:25.226658 uuid=968410_1.6.2.4.5 testdef=None
224 00:03:25.226996 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 00:03:25.227744 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 00:03:25.232970 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 00:03:25.234548 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 00:03:25.241620 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 00:03:25.243289 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 00:03:25.250179 runner path: /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/0/tests/1_kselftest-alsa test_uuid 968410_1.6.2.4.5
234 00:03:25.250695 BOARD='meson-g12b-a311d-libretech-cc'
235 00:03:25.251099 BRANCH='mainline'
236 00:03:25.251492 SKIPFILE='/dev/null'
237 00:03:25.251882 SKIP_INSTALL='True'
238 00:03:25.252302 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/clang-15/kselftest.tar.xz'
239 00:03:25.252702 TST_CASENAME=''
240 00:03:25.253092 TST_CMDFILES='alsa'
241 00:03:25.254045 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 00:03:25.255566 Creating lava-test-runner.conf files
244 00:03:25.255968 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/968410/lava-overlay-dp1gt1s0/lava-968410/0 for stage 0
245 00:03:25.256631 - 0_timesync-off
246 00:03:25.257075 - 1_kselftest-alsa
247 00:03:25.257688 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 00:03:25.258219 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 00:03:48.393800 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 00:03:48.394231 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 00:03:48.394496 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 00:03:48.394768 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 00:03:48.395033 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 00:03:49.090606 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 00:03:49.091089 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 00:03:49.091345 extracting modules file /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968410/extract-nfsrootfs-f2dyn6pv
257 00:03:50.436758 extracting modules file /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968410/extract-overlay-ramdisk-1gkglmtl/ramdisk
258 00:03:51.901571 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 00:03:51.902076 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 00:03:51.902361 [common] Applying overlay to NFS
261 00:03:51.902582 [common] Applying overlay /var/lib/lava/dispatcher/tmp/968410/compress-overlay-i5msd2uk/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/968410/extract-nfsrootfs-f2dyn6pv
262 00:03:54.616086 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 00:03:54.616528 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 00:03:54.616804 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 00:03:54.617037 Converting downloaded kernel to a uImage
266 00:03:54.617351 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/kernel/Image /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/kernel/uImage
267 00:03:55.034556 output: Image Name:
268 00:03:55.034973 output: Created: Sun Nov 10 00:03:54 2024
269 00:03:55.035187 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 00:03:55.035394 output: Data Size: 37878272 Bytes = 36990.50 KiB = 36.12 MiB
271 00:03:55.035596 output: Load Address: 01080000
272 00:03:55.035799 output: Entry Point: 01080000
273 00:03:55.036034 output:
274 00:03:55.036381 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 00:03:55.036655 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 00:03:55.036930 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 00:03:55.037189 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 00:03:55.037450 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 00:03:55.037720 Building ramdisk /var/lib/lava/dispatcher/tmp/968410/extract-overlay-ramdisk-1gkglmtl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/968410/extract-overlay-ramdisk-1gkglmtl/ramdisk
280 00:03:57.541668 >> 173438 blocks
281 00:04:05.250785 Adding RAMdisk u-boot header.
282 00:04:05.251460 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/968410/extract-overlay-ramdisk-1gkglmtl/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/968410/extract-overlay-ramdisk-1gkglmtl/ramdisk.cpio.gz.uboot
283 00:04:05.505115 output: Image Name:
284 00:04:05.505543 output: Created: Sun Nov 10 00:04:05 2024
285 00:04:05.505753 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 00:04:05.505961 output: Data Size: 24147385 Bytes = 23581.43 KiB = 23.03 MiB
287 00:04:05.506163 output: Load Address: 00000000
288 00:04:05.506364 output: Entry Point: 00000000
289 00:04:05.506565 output:
290 00:04:05.507233 rename /var/lib/lava/dispatcher/tmp/968410/extract-overlay-ramdisk-1gkglmtl/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/ramdisk/ramdisk.cpio.gz.uboot
291 00:04:05.507664 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 00:04:05.507951 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 00:04:05.508606 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 00:04:05.509141 No LXC device requested
295 00:04:05.509703 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 00:04:05.510268 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 00:04:05.510816 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 00:04:05.511270 Checking files for TFTP limit of 4294967296 bytes.
299 00:04:05.514220 end: 1 tftp-deploy (duration 00:01:18) [common]
300 00:04:05.514852 start: 2 uboot-action (timeout 00:05:00) [common]
301 00:04:05.515429 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 00:04:05.515977 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 00:04:05.516583 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 00:04:05.517167 Using kernel file from prepare-kernel: 968410/tftp-deploy-jtfi_n0s/kernel/uImage
305 00:04:05.517858 substitutions:
306 00:04:05.518313 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 00:04:05.518761 - {DTB_ADDR}: 0x01070000
308 00:04:05.519204 - {DTB}: 968410/tftp-deploy-jtfi_n0s/dtb/meson-g12b-a311d-libretech-cc.dtb
309 00:04:05.519650 - {INITRD}: 968410/tftp-deploy-jtfi_n0s/ramdisk/ramdisk.cpio.gz.uboot
310 00:04:05.520121 - {KERNEL_ADDR}: 0x01080000
311 00:04:05.520562 - {KERNEL}: 968410/tftp-deploy-jtfi_n0s/kernel/uImage
312 00:04:05.521003 - {LAVA_MAC}: None
313 00:04:05.521481 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/968410/extract-nfsrootfs-f2dyn6pv
314 00:04:05.521921 - {NFS_SERVER_IP}: 192.168.6.2
315 00:04:05.522357 - {PRESEED_CONFIG}: None
316 00:04:05.522790 - {PRESEED_LOCAL}: None
317 00:04:05.523223 - {RAMDISK_ADDR}: 0x08000000
318 00:04:05.523651 - {RAMDISK}: 968410/tftp-deploy-jtfi_n0s/ramdisk/ramdisk.cpio.gz.uboot
319 00:04:05.524109 - {ROOT_PART}: None
320 00:04:05.524542 - {ROOT}: None
321 00:04:05.524972 - {SERVER_IP}: 192.168.6.2
322 00:04:05.525401 - {TEE_ADDR}: 0x83000000
323 00:04:05.525828 - {TEE}: None
324 00:04:05.526258 Parsed boot commands:
325 00:04:05.526675 - setenv autoload no
326 00:04:05.527099 - setenv initrd_high 0xffffffff
327 00:04:05.527520 - setenv fdt_high 0xffffffff
328 00:04:05.527945 - dhcp
329 00:04:05.528399 - setenv serverip 192.168.6.2
330 00:04:05.528832 - tftpboot 0x01080000 968410/tftp-deploy-jtfi_n0s/kernel/uImage
331 00:04:05.529263 - tftpboot 0x08000000 968410/tftp-deploy-jtfi_n0s/ramdisk/ramdisk.cpio.gz.uboot
332 00:04:05.529693 - tftpboot 0x01070000 968410/tftp-deploy-jtfi_n0s/dtb/meson-g12b-a311d-libretech-cc.dtb
333 00:04:05.530120 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/968410/extract-nfsrootfs-f2dyn6pv,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 00:04:05.530562 - bootm 0x01080000 0x08000000 0x01070000
335 00:04:05.531111 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 00:04:05.532791 start: 2.3 connect-device (timeout 00:05:00) [common]
338 00:04:05.533257 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 00:04:05.549100 Setting prompt string to ['lava-test: # ']
340 00:04:05.550753 end: 2.3 connect-device (duration 00:00:00) [common]
341 00:04:05.551427 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 00:04:05.552078 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 00:04:05.552679 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 00:04:05.553936 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 00:04:05.592733 >> OK - accepted request
346 00:04:05.594656 Returned 0 in 0 seconds
347 00:04:05.695776 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 00:04:05.697499 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 00:04:05.698097 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 00:04:05.698647 Setting prompt string to ['Hit any key to stop autoboot']
352 00:04:05.699143 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 00:04:05.700837 Trying 192.168.56.21...
354 00:04:05.701353 Connected to conserv1.
355 00:04:05.701795 Escape character is '^]'.
356 00:04:05.702251
357 00:04:05.702710 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 00:04:05.703168
359 00:04:16.690411 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 00:04:16.690848 bl2_stage_init 0x01
361 00:04:16.691076 bl2_stage_init 0x81
362 00:04:16.696171 hw id: 0x0000 - pwm id 0x01
363 00:04:16.696790 bl2_stage_init 0xc1
364 00:04:16.697287 bl2_stage_init 0x02
365 00:04:16.697770
366 00:04:16.701614 L0:00000000
367 00:04:16.702174 L1:20000703
368 00:04:16.702663 L2:00008067
369 00:04:16.703123 L3:14000000
370 00:04:16.707158 B2:00402000
371 00:04:16.707692 B1:e0f83180
372 00:04:16.708226
373 00:04:16.708707 TE: 58124
374 00:04:16.709173
375 00:04:16.712786 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 00:04:16.713336
377 00:04:16.713838 Board ID = 1
378 00:04:16.718355 Set A53 clk to 24M
379 00:04:16.718869 Set A73 clk to 24M
380 00:04:16.719303 Set clk81 to 24M
381 00:04:16.724073 A53 clk: 1200 MHz
382 00:04:16.724541 A73 clk: 1200 MHz
383 00:04:16.724971 CLK81: 166.6M
384 00:04:16.725397 smccc: 00012a91
385 00:04:16.729487 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 00:04:16.735123 board id: 1
387 00:04:16.741127 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 00:04:16.752010 fw parse done
389 00:04:16.757664 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 00:04:16.800559 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 00:04:16.811202 PIEI prepare done
392 00:04:16.811648 fastboot data load
393 00:04:16.811881 fastboot data verify
394 00:04:16.816763 verify result: 266
395 00:04:16.822366 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 00:04:16.822780 LPDDR4 probe
397 00:04:16.823008 ddr clk to 1584MHz
398 00:04:16.830410 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 00:04:16.867737
400 00:04:16.868184 dmc_version 0001
401 00:04:16.874307 Check phy result
402 00:04:16.880069 INFO : End of CA training
403 00:04:16.880519 INFO : End of initialization
404 00:04:16.885777 INFO : Training has run successfully!
405 00:04:16.886096 Check phy result
406 00:04:16.891370 INFO : End of initialization
407 00:04:16.891682 INFO : End of read enable training
408 00:04:16.894674 INFO : End of fine write leveling
409 00:04:16.900202 INFO : End of Write leveling coarse delay
410 00:04:16.905756 INFO : Training has run successfully!
411 00:04:16.906072 Check phy result
412 00:04:16.906305 INFO : End of initialization
413 00:04:16.911326 INFO : End of read dq deskew training
414 00:04:16.914836 INFO : End of MPR read delay center optimization
415 00:04:16.920413 INFO : End of write delay center optimization
416 00:04:16.926026 INFO : End of read delay center optimization
417 00:04:16.926473 INFO : End of max read latency training
418 00:04:16.931607 INFO : Training has run successfully!
419 00:04:16.931917 1D training succeed
420 00:04:16.939765 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 00:04:16.987321 Check phy result
422 00:04:16.987699 INFO : End of initialization
423 00:04:17.009929 INFO : End of 2D read delay Voltage center optimization
424 00:04:17.030217 INFO : End of 2D read delay Voltage center optimization
425 00:04:17.082281 INFO : End of 2D write delay Voltage center optimization
426 00:04:17.131737 INFO : End of 2D write delay Voltage center optimization
427 00:04:17.137137 INFO : Training has run successfully!
428 00:04:17.137650
429 00:04:17.138116 channel==0
430 00:04:17.143028 RxClkDly_Margin_A0==88 ps 9
431 00:04:17.143520 TxDqDly_Margin_A0==98 ps 10
432 00:04:17.146130 RxClkDly_Margin_A1==88 ps 9
433 00:04:17.146612 TxDqDly_Margin_A1==98 ps 10
434 00:04:17.151704 TrainedVREFDQ_A0==74
435 00:04:17.152227 TrainedVREFDQ_A1==74
436 00:04:17.152686 VrefDac_Margin_A0==24
437 00:04:17.157265 DeviceVref_Margin_A0==40
438 00:04:17.157743 VrefDac_Margin_A1==24
439 00:04:17.162925 DeviceVref_Margin_A1==40
440 00:04:17.163399
441 00:04:17.163853
442 00:04:17.164350 channel==1
443 00:04:17.164795 RxClkDly_Margin_A0==98 ps 10
444 00:04:17.166411 TxDqDly_Margin_A0==98 ps 10
445 00:04:17.171922 RxClkDly_Margin_A1==88 ps 9
446 00:04:17.172458 TxDqDly_Margin_A1==88 ps 9
447 00:04:17.172915 TrainedVREFDQ_A0==77
448 00:04:17.177477 TrainedVREFDQ_A1==77
449 00:04:17.177965 VrefDac_Margin_A0==22
450 00:04:17.183050 DeviceVref_Margin_A0==37
451 00:04:17.183529 VrefDac_Margin_A1==24
452 00:04:17.184008 DeviceVref_Margin_A1==37
453 00:04:17.184464
454 00:04:17.188632 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 00:04:17.189102
456 00:04:17.222216 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000019 00000017 00000018 00000017 00000018 00000015 00000018 00000019 00000017 00000018 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
457 00:04:17.222859 2D training succeed
458 00:04:17.227846 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 00:04:17.233435 auto size-- 65535DDR cs0 size: 2048MB
460 00:04:17.233923 DDR cs1 size: 2048MB
461 00:04:17.239023 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 00:04:17.239532 cs0 DataBus test pass
463 00:04:17.240025 cs1 DataBus test pass
464 00:04:17.244629 cs0 AddrBus test pass
465 00:04:17.245109 cs1 AddrBus test pass
466 00:04:17.245553
467 00:04:17.250221 100bdlr_step_size ps== 420
468 00:04:17.250714 result report
469 00:04:17.251161 boot times 0Enable ddr reg access
470 00:04:17.260039 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 00:04:17.273539 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 00:04:17.847638 0.0;M3 CHK:0;cm4_sp_mode 0
473 00:04:17.848371 MVN_1=0x00000000
474 00:04:17.852836 MVN_2=0x00000000
475 00:04:17.858710 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 00:04:17.859217 OPS=0x10
477 00:04:17.859678 ring efuse init
478 00:04:17.860170 chipver efuse init
479 00:04:17.866978 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 00:04:17.867491 [0.018961 Inits done]
481 00:04:17.867946 secure task start!
482 00:04:17.874387 high task start!
483 00:04:17.874899 low task start!
484 00:04:17.875356 run into bl31
485 00:04:17.881169 NOTICE: BL31: v1.3(release):4fc40b1
486 00:04:17.888783 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 00:04:17.889270 NOTICE: BL31: G12A normal boot!
488 00:04:17.914253 NOTICE: BL31: BL33 decompress pass
489 00:04:17.919903 ERROR: Error initializing runtime service opteed_fast
490 00:04:19.152842
491 00:04:19.153481
492 00:04:19.161064 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 00:04:19.161554
494 00:04:19.162011 Model: Libre Computer AML-A311D-CC Alta
495 00:04:19.369551 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 00:04:19.392975 DRAM: 2 GiB (effective 3.8 GiB)
497 00:04:19.536280 Core: 408 devices, 31 uclasses, devicetree: separate
498 00:04:19.542008 WDT: Not starting watchdog@f0d0
499 00:04:19.574158 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 00:04:19.586469 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 00:04:19.591390 ** Bad device specification mmc 0 **
502 00:04:19.601821 Card did not respond to voltage select! : -110
503 00:04:19.609428 ** Bad device specification mmc 0 **
504 00:04:19.609969 Couldn't find partition mmc 0
505 00:04:19.617924 Card did not respond to voltage select! : -110
506 00:04:19.623245 ** Bad device specification mmc 0 **
507 00:04:19.623740 Couldn't find partition mmc 0
508 00:04:19.628363 Error: could not access storage.
509 00:04:20.890964 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
510 00:04:20.891649 bl2_stage_init 0x81
511 00:04:20.896430 hw id: 0x0000 - pwm id 0x01
512 00:04:20.896935 bl2_stage_init 0xc1
513 00:04:20.897389 bl2_stage_init 0x02
514 00:04:20.897836
515 00:04:20.902087 L0:00000000
516 00:04:20.902561 L1:20000703
517 00:04:20.903006 L2:00008067
518 00:04:20.903444 L3:14000000
519 00:04:20.903881 B2:00402000
520 00:04:20.907530 B1:e0f83180
521 00:04:20.908045
522 00:04:20.908500 TE: 58150
523 00:04:20.908945
524 00:04:20.913305 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
525 00:04:20.913831
526 00:04:20.914285 Board ID = 1
527 00:04:20.918861 Set A53 clk to 24M
528 00:04:20.919343 Set A73 clk to 24M
529 00:04:20.919788 Set clk81 to 24M
530 00:04:20.924414 A53 clk: 1200 MHz
531 00:04:20.924892 A73 clk: 1200 MHz
532 00:04:20.925336 CLK81: 166.6M
533 00:04:20.925773 smccc: 00012aac
534 00:04:20.929909 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
535 00:04:20.935479 board id: 1
536 00:04:20.941284 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
537 00:04:20.951896 fw parse done
538 00:04:20.957919 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 00:04:21.000556 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
540 00:04:21.011417 PIEI prepare done
541 00:04:21.011904 fastboot data load
542 00:04:21.012416 fastboot data verify
543 00:04:21.017145 verify result: 266
544 00:04:21.022682 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
545 00:04:21.023199 LPDDR4 probe
546 00:04:21.023664 ddr clk to 1584MHz
547 00:04:21.030666 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
548 00:04:21.068032
549 00:04:21.068531 dmc_version 0001
550 00:04:21.074615 Check phy result
551 00:04:21.080462 INFO : End of CA training
552 00:04:21.080941 INFO : End of initialization
553 00:04:21.086134 INFO : Training has run successfully!
554 00:04:21.086615 Check phy result
555 00:04:21.091680 INFO : End of initialization
556 00:04:21.092184 INFO : End of read enable training
557 00:04:21.094978 INFO : End of fine write leveling
558 00:04:21.100450 INFO : End of Write leveling coarse delay
559 00:04:21.106120 INFO : Training has run successfully!
560 00:04:21.106590 Check phy result
561 00:04:21.107039 INFO : End of initialization
562 00:04:21.111682 INFO : End of read dq deskew training
563 00:04:21.115274 INFO : End of MPR read delay center optimization
564 00:04:21.120712 INFO : End of write delay center optimization
565 00:04:21.126333 INFO : End of read delay center optimization
566 00:04:21.126825 INFO : End of max read latency training
567 00:04:21.131928 INFO : Training has run successfully!
568 00:04:21.132437 1D training succeed
569 00:04:21.140064 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
570 00:04:21.187686 Check phy result
571 00:04:21.188212 INFO : End of initialization
572 00:04:21.209212 INFO : End of 2D read delay Voltage center optimization
573 00:04:21.229406 INFO : End of 2D read delay Voltage center optimization
574 00:04:21.281403 INFO : End of 2D write delay Voltage center optimization
575 00:04:21.330603 INFO : End of 2D write delay Voltage center optimization
576 00:04:21.336172 INFO : Training has run successfully!
577 00:04:21.336654
578 00:04:21.337137 channel==0
579 00:04:21.341872 RxClkDly_Margin_A0==88 ps 9
580 00:04:21.342657 TxDqDly_Margin_A0==98 ps 10
581 00:04:21.347380 RxClkDly_Margin_A1==88 ps 9
582 00:04:21.347900 TxDqDly_Margin_A1==88 ps 9
583 00:04:21.348425 TrainedVREFDQ_A0==74
584 00:04:21.353089 TrainedVREFDQ_A1==74
585 00:04:21.353568 VrefDac_Margin_A0==25
586 00:04:21.354017 DeviceVref_Margin_A0==40
587 00:04:21.358534 VrefDac_Margin_A1==25
588 00:04:21.359003 DeviceVref_Margin_A1==40
589 00:04:21.359449
590 00:04:21.359891
591 00:04:21.360379 channel==1
592 00:04:21.364138 RxClkDly_Margin_A0==98 ps 10
593 00:04:21.364617 TxDqDly_Margin_A0==98 ps 10
594 00:04:21.369757 RxClkDly_Margin_A1==88 ps 9
595 00:04:21.370232 TxDqDly_Margin_A1==88 ps 9
596 00:04:21.375498 TrainedVREFDQ_A0==77
597 00:04:21.375974 TrainedVREFDQ_A1==77
598 00:04:21.376463 VrefDac_Margin_A0==22
599 00:04:21.381380 DeviceVref_Margin_A0==37
600 00:04:21.381868 VrefDac_Margin_A1==24
601 00:04:21.386875 DeviceVref_Margin_A1==37
602 00:04:21.387356
603 00:04:21.387809 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
604 00:04:21.388300
605 00:04:21.420190 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
606 00:04:21.420789 2D training succeed
607 00:04:21.425765 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
608 00:04:21.431335 auto size-- 65535DDR cs0 size: 2048MB
609 00:04:21.431815 DDR cs1 size: 2048MB
610 00:04:21.436898 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
611 00:04:21.437382 cs0 DataBus test pass
612 00:04:21.442376 cs1 DataBus test pass
613 00:04:21.442845 cs0 AddrBus test pass
614 00:04:21.443298 cs1 AddrBus test pass
615 00:04:21.443743
616 00:04:21.447977 100bdlr_step_size ps== 420
617 00:04:21.448522 result report
618 00:04:21.453657 boot times 0Enable ddr reg access
619 00:04:21.458966 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
620 00:04:21.472310 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
621 00:04:22.044467 0.0;M3 CHK:0;cm4_sp_mode 0
622 00:04:22.045171 MVN_1=0x00000000
623 00:04:22.049790 MVN_2=0x00000000
624 00:04:22.055606 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
625 00:04:22.056193 OPS=0x10
626 00:04:22.056666 ring efuse init
627 00:04:22.057152 chipver efuse init
628 00:04:22.063959 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
629 00:04:22.064570 [0.018960 Inits done]
630 00:04:22.065011 secure task start!
631 00:04:22.071416 high task start!
632 00:04:22.071943 low task start!
633 00:04:22.072216 run into bl31
634 00:04:22.078132 NOTICE: BL31: v1.3(release):4fc40b1
635 00:04:22.085958 NOTICE: BL31: Built : 15:58:17, May 22 2019
636 00:04:22.086589 NOTICE: BL31: G12A normal boot!
637 00:04:22.111299 NOTICE: BL31: BL33 decompress pass
638 00:04:22.116960 ERROR: Error initializing runtime service opteed_fast
639 00:04:23.349793
640 00:04:23.350410
641 00:04:23.358283 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
642 00:04:23.358770
643 00:04:23.359186 Model: Libre Computer AML-A311D-CC Alta
644 00:04:23.566765 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
645 00:04:23.590048 DRAM: 2 GiB (effective 3.8 GiB)
646 00:04:23.733127 Core: 408 devices, 31 uclasses, devicetree: separate
647 00:04:23.738837 WDT: Not starting watchdog@f0d0
648 00:04:23.771257 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
649 00:04:23.783727 Loading Environment from FAT... Card did not respond to voltage select! : -110
650 00:04:23.788598 ** Bad device specification mmc 0 **
651 00:04:23.799002 Card did not respond to voltage select! : -110
652 00:04:23.806566 ** Bad device specification mmc 0 **
653 00:04:23.807168 Couldn't find partition mmc 0
654 00:04:23.814939 Card did not respond to voltage select! : -110
655 00:04:23.820414 ** Bad device specification mmc 0 **
656 00:04:23.821030 Couldn't find partition mmc 0
657 00:04:23.825467 Error: could not access storage.
658 00:04:24.168068 Net: eth0: ethernet@ff3f0000
659 00:04:24.168627 starting USB...
660 00:04:24.419920 Bus usb@ff500000: Register 3000140 NbrPorts 3
661 00:04:24.420539 Starting the controller
662 00:04:24.426666 USB XHCI 1.10
663 00:04:26.140892 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
664 00:04:26.141556 bl2_stage_init 0x01
665 00:04:26.142038 bl2_stage_init 0x81
666 00:04:26.146391 hw id: 0x0000 - pwm id 0x01
667 00:04:26.146907 bl2_stage_init 0xc1
668 00:04:26.147365 bl2_stage_init 0x02
669 00:04:26.147811
670 00:04:26.151930 L0:00000000
671 00:04:26.152448 L1:20000703
672 00:04:26.152898 L2:00008067
673 00:04:26.153340 L3:14000000
674 00:04:26.157563 B2:00402000
675 00:04:26.158161 B1:e0f83180
676 00:04:26.158712
677 00:04:26.159247 TE: 58124
678 00:04:26.159767
679 00:04:26.163138 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
680 00:04:26.163657
681 00:04:26.164154 Board ID = 1
682 00:04:26.168788 Set A53 clk to 24M
683 00:04:26.169285 Set A73 clk to 24M
684 00:04:26.169738 Set clk81 to 24M
685 00:04:26.174372 A53 clk: 1200 MHz
686 00:04:26.174932 A73 clk: 1200 MHz
687 00:04:26.175463 CLK81: 166.6M
688 00:04:26.175968 smccc: 00012a92
689 00:04:26.179945 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
690 00:04:26.185569 board id: 1
691 00:04:26.191472 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
692 00:04:26.202120 fw parse done
693 00:04:26.208063 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 00:04:26.250766 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
695 00:04:26.261581 PIEI prepare done
696 00:04:26.262086 fastboot data load
697 00:04:26.262546 fastboot data verify
698 00:04:26.267233 verify result: 266
699 00:04:26.272843 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
700 00:04:26.273390 LPDDR4 probe
701 00:04:26.273927 ddr clk to 1584MHz
702 00:04:26.280823 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
703 00:04:26.318078
704 00:04:26.318625 dmc_version 0001
705 00:04:26.324775 Check phy result
706 00:04:26.330639 INFO : End of CA training
707 00:04:26.331149 INFO : End of initialization
708 00:04:26.336339 INFO : Training has run successfully!
709 00:04:26.336942 Check phy result
710 00:04:26.341896 INFO : End of initialization
711 00:04:26.342401 INFO : End of read enable training
712 00:04:26.347409 INFO : End of fine write leveling
713 00:04:26.353117 INFO : End of Write leveling coarse delay
714 00:04:26.354033 INFO : Training has run successfully!
715 00:04:26.354601 Check phy result
716 00:04:26.358646 INFO : End of initialization
717 00:04:26.359201 INFO : End of read dq deskew training
718 00:04:26.364603 INFO : End of MPR read delay center optimization
719 00:04:26.369833 INFO : End of write delay center optimization
720 00:04:26.375527 INFO : End of read delay center optimization
721 00:04:26.376076 INFO : End of max read latency training
722 00:04:26.381725 INFO : Training has run successfully!
723 00:04:26.382258 1D training succeed
724 00:04:26.390234 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
725 00:04:26.438084 Check phy result
726 00:04:26.438687 INFO : End of initialization
727 00:04:26.459733 INFO : End of 2D read delay Voltage center optimization
728 00:04:26.479937 INFO : End of 2D read delay Voltage center optimization
729 00:04:26.532163 INFO : End of 2D write delay Voltage center optimization
730 00:04:26.581220 INFO : End of 2D write delay Voltage center optimization
731 00:04:26.586863 INFO : Training has run successfully!
732 00:04:26.587393
733 00:04:26.587787 channel==0
734 00:04:26.592483 RxClkDly_Margin_A0==88 ps 9
735 00:04:26.592996 TxDqDly_Margin_A0==98 ps 10
736 00:04:26.595654 RxClkDly_Margin_A1==88 ps 9
737 00:04:26.596193 TxDqDly_Margin_A1==98 ps 10
738 00:04:26.601628 TrainedVREFDQ_A0==74
739 00:04:26.602188 TrainedVREFDQ_A1==74
740 00:04:26.602659 VrefDac_Margin_A0==25
741 00:04:26.606932 DeviceVref_Margin_A0==40
742 00:04:26.607446 VrefDac_Margin_A1==25
743 00:04:26.612799 DeviceVref_Margin_A1==40
744 00:04:26.613329
745 00:04:26.613859
746 00:04:26.614377 channel==1
747 00:04:26.614874 RxClkDly_Margin_A0==98 ps 10
748 00:04:26.618838 TxDqDly_Margin_A0==88 ps 9
749 00:04:26.619356 RxClkDly_Margin_A1==98 ps 10
750 00:04:26.623894 TxDqDly_Margin_A1==88 ps 9
751 00:04:26.624428 TrainedVREFDQ_A0==76
752 00:04:26.624883 TrainedVREFDQ_A1==77
753 00:04:26.629387 VrefDac_Margin_A0==22
754 00:04:26.630008 DeviceVref_Margin_A0==38
755 00:04:26.634945 VrefDac_Margin_A1==22
756 00:04:26.635447 DeviceVref_Margin_A1==37
757 00:04:26.635966
758 00:04:26.641575 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
759 00:04:26.642135
760 00:04:26.668476 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
761 00:04:26.674599 2D training succeed
762 00:04:26.679710 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
763 00:04:26.680273 auto size-- 65535DDR cs0 size: 2048MB
764 00:04:26.686273 DDR cs1 size: 2048MB
765 00:04:26.686775 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
766 00:04:26.691270 cs0 DataBus test pass
767 00:04:26.691775 cs1 DataBus test pass
768 00:04:26.692290 cs0 AddrBus test pass
769 00:04:26.696671 cs1 AddrBus test pass
770 00:04:26.697188
771 00:04:26.697653 100bdlr_step_size ps== 420
772 00:04:26.698124 result report
773 00:04:26.702171 boot times 0Enable ddr reg access
774 00:04:26.709910 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
775 00:04:26.725979 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
776 00:04:27.297112 0.0;M3 CHK:0;cm4_sp_mode 0
777 00:04:27.297803 MVN_1=0x00000000
778 00:04:27.302554 MVN_2=0x00000000
779 00:04:27.308227 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
780 00:04:27.308795 OPS=0x10
781 00:04:27.309242 ring efuse init
782 00:04:27.309678 chipver efuse init
783 00:04:27.316577 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
784 00:04:27.317103 [0.018961 Inits done]
785 00:04:27.317546 secure task start!
786 00:04:27.324133 high task start!
787 00:04:27.324414 low task start!
788 00:04:27.324617 run into bl31
789 00:04:27.330805 NOTICE: BL31: v1.3(release):4fc40b1
790 00:04:27.338503 NOTICE: BL31: Built : 15:58:17, May 22 2019
791 00:04:27.338997 NOTICE: BL31: G12A normal boot!
792 00:04:27.363849 NOTICE: BL31: BL33 decompress pass
793 00:04:27.369512 ERROR: Error initializing runtime service opteed_fast
794 00:04:28.602501
795 00:04:28.603191
796 00:04:28.610913 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
797 00:04:28.611443
798 00:04:28.611892 Model: Libre Computer AML-A311D-CC Alta
799 00:04:28.819339 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
800 00:04:28.842683 DRAM: 2 GiB (effective 3.8 GiB)
801 00:04:28.985661 Core: 408 devices, 31 uclasses, devicetree: separate
802 00:04:28.991528 WDT: Not starting watchdog@f0d0
803 00:04:29.023732 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
804 00:04:29.036302 Loading Environment from FAT... Card did not respond to voltage select! : -110
805 00:04:29.041227 ** Bad device specification mmc 0 **
806 00:04:29.051504 Card did not respond to voltage select! : -110
807 00:04:29.059158 ** Bad device specification mmc 0 **
808 00:04:29.059640 Couldn't find partition mmc 0
809 00:04:29.067441 Card did not respond to voltage select! : -110
810 00:04:29.072983 ** Bad device specification mmc 0 **
811 00:04:29.073471 Couldn't find partition mmc 0
812 00:04:29.078075 Error: could not access storage.
813 00:04:29.421673 Net: eth0: ethernet@ff3f0000
814 00:04:29.422327 starting USB...
815 00:04:29.673441 Bus usb@ff500000: Register 3000140 NbrPorts 3
816 00:04:29.674029 Starting the controller
817 00:04:29.680420 USB XHCI 1.10
818 00:04:31.841270 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
819 00:04:31.841934 bl2_stage_init 0x01
820 00:04:31.842407 bl2_stage_init 0x81
821 00:04:31.846882 hw id: 0x0000 - pwm id 0x01
822 00:04:31.847379 bl2_stage_init 0xc1
823 00:04:31.847829 bl2_stage_init 0x02
824 00:04:31.848383
825 00:04:31.852504 L0:00000000
826 00:04:31.853007 L1:20000703
827 00:04:31.853455 L2:00008067
828 00:04:31.853893 L3:14000000
829 00:04:31.857939 B2:00402000
830 00:04:31.858440 B1:e0f83180
831 00:04:31.858895
832 00:04:31.859336 TE: 58159
833 00:04:31.859780
834 00:04:31.863503 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 00:04:31.864013
836 00:04:31.864471 Board ID = 1
837 00:04:31.869239 Set A53 clk to 24M
838 00:04:31.869715 Set A73 clk to 24M
839 00:04:31.870159 Set clk81 to 24M
840 00:04:31.874826 A53 clk: 1200 MHz
841 00:04:31.875299 A73 clk: 1200 MHz
842 00:04:31.875743 CLK81: 166.6M
843 00:04:31.876223 smccc: 00012ab5
844 00:04:31.880428 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 00:04:31.885928 board id: 1
846 00:04:31.891911 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 00:04:31.902611 fw parse done
848 00:04:31.908576 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 00:04:31.951035 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 00:04:31.961899 PIEI prepare done
851 00:04:31.962392 fastboot data load
852 00:04:31.962849 fastboot data verify
853 00:04:31.967600 verify result: 266
854 00:04:31.973168 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 00:04:31.973666 LPDDR4 probe
856 00:04:31.974124 ddr clk to 1584MHz
857 00:04:31.981104 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 00:04:32.018391
859 00:04:32.018920 dmc_version 0001
860 00:04:32.025044 Check phy result
861 00:04:32.030906 INFO : End of CA training
862 00:04:32.031387 INFO : End of initialization
863 00:04:32.036568 INFO : Training has run successfully!
864 00:04:32.037078 Check phy result
865 00:04:32.042176 INFO : End of initialization
866 00:04:32.042666 INFO : End of read enable training
867 00:04:32.047718 INFO : End of fine write leveling
868 00:04:32.053410 INFO : End of Write leveling coarse delay
869 00:04:32.053882 INFO : Training has run successfully!
870 00:04:32.054318 Check phy result
871 00:04:32.058912 INFO : End of initialization
872 00:04:32.059388 INFO : End of read dq deskew training
873 00:04:32.064489 INFO : End of MPR read delay center optimization
874 00:04:32.070136 INFO : End of write delay center optimization
875 00:04:32.075662 INFO : End of read delay center optimization
876 00:04:32.076159 INFO : End of max read latency training
877 00:04:32.081425 INFO : Training has run successfully!
878 00:04:32.081900 1D training succeed
879 00:04:32.090612 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 00:04:32.138132 Check phy result
881 00:04:32.138666 INFO : End of initialization
882 00:04:32.159741 INFO : End of 2D read delay Voltage center optimization
883 00:04:32.179858 INFO : End of 2D read delay Voltage center optimization
884 00:04:32.231779 INFO : End of 2D write delay Voltage center optimization
885 00:04:32.281038 INFO : End of 2D write delay Voltage center optimization
886 00:04:32.286650 INFO : Training has run successfully!
887 00:04:32.287124
888 00:04:32.287561 channel==0
889 00:04:32.292284 RxClkDly_Margin_A0==88 ps 9
890 00:04:32.292741 TxDqDly_Margin_A0==98 ps 10
891 00:04:32.295573 RxClkDly_Margin_A1==88 ps 9
892 00:04:32.296063 TxDqDly_Margin_A1==88 ps 9
893 00:04:32.301148 TrainedVREFDQ_A0==74
894 00:04:32.301626 TrainedVREFDQ_A1==74
895 00:04:32.302058 VrefDac_Margin_A0==25
896 00:04:32.306752 DeviceVref_Margin_A0==40
897 00:04:32.307220 VrefDac_Margin_A1==25
898 00:04:32.312287 DeviceVref_Margin_A1==40
899 00:04:32.312763
900 00:04:32.313201
901 00:04:32.313631 channel==1
902 00:04:32.314053 RxClkDly_Margin_A0==98 ps 10
903 00:04:32.315787 TxDqDly_Margin_A0==98 ps 10
904 00:04:32.321273 RxClkDly_Margin_A1==88 ps 9
905 00:04:32.321734 TxDqDly_Margin_A1==88 ps 9
906 00:04:32.322166 TrainedVREFDQ_A0==77
907 00:04:32.326895 TrainedVREFDQ_A1==77
908 00:04:32.327355 VrefDac_Margin_A0==22
909 00:04:32.332506 DeviceVref_Margin_A0==37
910 00:04:32.332989 VrefDac_Margin_A1==24
911 00:04:32.333432 DeviceVref_Margin_A1==37
912 00:04:32.333858
913 00:04:32.341667 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 00:04:32.342160
915 00:04:32.369666 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
916 00:04:32.370156 2D training succeed
917 00:04:32.375394 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 00:04:32.380802 auto size-- 65535DDR cs0 size: 2048MB
919 00:04:32.381283 DDR cs1 size: 2048MB
920 00:04:32.386503 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 00:04:32.386972 cs0 DataBus test pass
922 00:04:32.391905 cs1 DataBus test pass
923 00:04:32.392402 cs0 AddrBus test pass
924 00:04:32.392831 cs1 AddrBus test pass
925 00:04:32.397519
926 00:04:32.398015 100bdlr_step_size ps== 420
927 00:04:32.398459 result report
928 00:04:32.403241 boot times 0Enable ddr reg access
929 00:04:32.409388 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 00:04:32.422815 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 00:04:32.994806 0.0;M3 CHK:0;cm4_sp_mode 0
932 00:04:32.995449 MVN_1=0x00000000
933 00:04:33.000281 MVN_2=0x00000000
934 00:04:33.006051 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 00:04:33.006551 OPS=0x10
936 00:04:33.007009 ring efuse init
937 00:04:33.007445 chipver efuse init
938 00:04:33.011613 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 00:04:33.017260 [0.018961 Inits done]
940 00:04:33.017763 secure task start!
941 00:04:33.018217 high task start!
942 00:04:33.021812 low task start!
943 00:04:33.022289 run into bl31
944 00:04:33.028525 NOTICE: BL31: v1.3(release):4fc40b1
945 00:04:33.036286 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 00:04:33.036781 NOTICE: BL31: G12A normal boot!
947 00:04:33.061613 NOTICE: BL31: BL33 decompress pass
948 00:04:33.067332 ERROR: Error initializing runtime service opteed_fast
949 00:04:34.300279
950 00:04:34.300928
951 00:04:34.308716 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 00:04:34.309204
953 00:04:34.309657 Model: Libre Computer AML-A311D-CC Alta
954 00:04:34.517109 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 00:04:34.540500 DRAM: 2 GiB (effective 3.8 GiB)
956 00:04:34.683486 Core: 408 devices, 31 uclasses, devicetree: separate
957 00:04:34.689302 WDT: Not starting watchdog@f0d0
958 00:04:34.721730 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 00:04:34.734012 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 00:04:34.739007 ** Bad device specification mmc 0 **
961 00:04:34.749355 Card did not respond to voltage select! : -110
962 00:04:34.757016 ** Bad device specification mmc 0 **
963 00:04:34.757513 Couldn't find partition mmc 0
964 00:04:34.765308 Card did not respond to voltage select! : -110
965 00:04:34.770809 ** Bad device specification mmc 0 **
966 00:04:34.771285 Couldn't find partition mmc 0
967 00:04:34.775890 Error: could not access storage.
968 00:04:35.119464 Net: eth0: ethernet@ff3f0000
969 00:04:35.120099 starting USB...
970 00:04:35.371228 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 00:04:35.371804 Starting the controller
972 00:04:35.378214 USB XHCI 1.10
973 00:04:36.932285 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
974 00:04:36.940490 scanning usb for storage devices... 0 Storage Device(s) found
976 00:04:36.992110 Hit any key to stop autoboot: 1
977 00:04:36.992953 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
978 00:04:36.993589 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
979 00:04:36.994098 Setting prompt string to ['=>']
980 00:04:36.994629 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
981 00:04:37.008114 0
982 00:04:37.009018 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
983 00:04:37.009570 Sending with 10 millisecond of delay
985 00:04:38.144394 => setenv autoload no
986 00:04:38.155224 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
987 00:04:38.160678 setenv autoload no
988 00:04:38.161466 Sending with 10 millisecond of delay
990 00:04:39.958433 => setenv initrd_high 0xffffffff
991 00:04:39.969245 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
992 00:04:39.970151 setenv initrd_high 0xffffffff
993 00:04:39.970921 Sending with 10 millisecond of delay
995 00:04:41.587369 => setenv fdt_high 0xffffffff
996 00:04:41.598306 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
997 00:04:41.599205 setenv fdt_high 0xffffffff
998 00:04:41.599968 Sending with 10 millisecond of delay
1000 00:04:41.891900 => dhcp
1001 00:04:41.902668 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
1002 00:04:41.903533 dhcp
1003 00:04:41.904051 Speed: 1000, full duplex
1004 00:04:41.904514 BOOTP broadcast 1
1005 00:04:41.910892 DHCP client bound to address 192.168.6.27 (7 ms)
1006 00:04:41.911666 Sending with 10 millisecond of delay
1008 00:04:43.588806 => setenv serverip 192.168.6.2
1009 00:04:43.599702 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1010 00:04:43.600831 setenv serverip 192.168.6.2
1011 00:04:43.601696 Sending with 10 millisecond of delay
1013 00:04:47.326481 => tftpboot 0x01080000 968410/tftp-deploy-jtfi_n0s/kernel/uImage
1014 00:04:47.337346 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1015 00:04:47.338263 tftpboot 0x01080000 968410/tftp-deploy-jtfi_n0s/kernel/uImage
1016 00:04:47.338764 Speed: 1000, full duplex
1017 00:04:47.339223 Using ethernet@ff3f0000 device
1018 00:04:47.340274 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1019 00:04:47.345689 Filename '968410/tftp-deploy-jtfi_n0s/kernel/uImage'.
1020 00:04:47.349578 Load address: 0x1080000
1021 00:04:49.984246 Loading: *################################################## 36.1 MiB
1022 00:04:49.984684 13.7 MiB/s
1023 00:04:49.984914 done
1024 00:04:49.988724 Bytes transferred = 37878336 (241fa40 hex)
1025 00:04:49.989239 Sending with 10 millisecond of delay
1027 00:04:54.677377 => tftpboot 0x08000000 968410/tftp-deploy-jtfi_n0s/ramdisk/ramdisk.cpio.gz.uboot
1028 00:04:54.688234 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1029 00:04:54.689164 tftpboot 0x08000000 968410/tftp-deploy-jtfi_n0s/ramdisk/ramdisk.cpio.gz.uboot
1030 00:04:54.689754 Speed: 1000, full duplex
1031 00:04:54.690223 Using ethernet@ff3f0000 device
1032 00:04:54.691019 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1033 00:04:54.699590 Filename '968410/tftp-deploy-jtfi_n0s/ramdisk/ramdisk.cpio.gz.uboot'.
1034 00:04:54.700195 Load address: 0x8000000
1035 00:05:01.657714 Loading: *############################T ##################### UDP wrong checksum 00000005 0000db3d
1036 00:05:06.658321 T UDP wrong checksum 00000005 0000db3d
1037 00:05:16.660037 T T UDP wrong checksum 00000005 0000db3d
1038 00:05:21.708883 T UDP wrong checksum 000000ff 00006ed5
1039 00:05:21.750724 UDP wrong checksum 000000ff 0000ffc7
1040 00:05:36.665481 T T T UDP wrong checksum 00000005 0000db3d
1041 00:05:51.669605 T T
1042 00:05:51.670293 Retry count exceeded; starting again
1044 00:05:51.671853 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1047 00:05:51.674092 end: 2.4 uboot-commands (duration 00:01:46) [common]
1049 00:05:51.675866 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1051 00:05:51.677034 end: 2 uboot-action (duration 00:01:46) [common]
1053 00:05:51.678698 Cleaning after the job
1054 00:05:51.679289 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/ramdisk
1055 00:05:51.680685 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/kernel
1056 00:05:51.725502 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/dtb
1057 00:05:51.726834 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/nfsrootfs
1058 00:05:51.902271 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968410/tftp-deploy-jtfi_n0s/modules
1059 00:05:51.924623 start: 4.1 power-off (timeout 00:00:30) [common]
1060 00:05:51.925313 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1061 00:05:51.971143 >> OK - accepted request
1062 00:05:51.973259 Returned 0 in 0 seconds
1063 00:05:52.073988 end: 4.1 power-off (duration 00:00:00) [common]
1065 00:05:52.074964 start: 4.2 read-feedback (timeout 00:10:00) [common]
1066 00:05:52.075616 Listened to connection for namespace 'common' for up to 1s
1067 00:05:53.075800 Finalising connection for namespace 'common'
1068 00:05:53.076320 Disconnecting from shell: Finalise
1069 00:05:53.076612 =>
1070 00:05:53.177432 end: 4.2 read-feedback (duration 00:00:01) [common]
1071 00:05:53.178168 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/968410
1072 00:05:56.148355 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/968410
1073 00:05:56.148967 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.