Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:09:47.416780 lava-dispatcher, installed at version: 2024.01
2 00:09:47.417600 start: 0 validate
3 00:09:47.418074 Start time: 2024-11-10 00:09:47.418043+00:00 (UTC)
4 00:09:47.418606 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:09:47.419147 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:09:47.463855 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:09:47.464421 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 00:09:47.497187 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:09:47.497799 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 00:09:47.530975 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:09:47.531773 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:09:47.565188 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:09:47.565707 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 00:09:47.609481 validate duration: 0.19
16 00:09:47.610966 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:09:47.611576 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:09:47.612215 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:09:47.613167 Not decompressing ramdisk as can be used compressed.
20 00:09:47.613921 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 00:09:47.614435 saving as /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/ramdisk/initrd.cpio.gz
22 00:09:47.614940 total size: 5628169 (5 MB)
23 00:09:47.655636 progress 0 % (0 MB)
24 00:09:47.663692 progress 5 % (0 MB)
25 00:09:47.672284 progress 10 % (0 MB)
26 00:09:47.679802 progress 15 % (0 MB)
27 00:09:47.688403 progress 20 % (1 MB)
28 00:09:47.693683 progress 25 % (1 MB)
29 00:09:47.697613 progress 30 % (1 MB)
30 00:09:47.701623 progress 35 % (1 MB)
31 00:09:47.705176 progress 40 % (2 MB)
32 00:09:47.709097 progress 45 % (2 MB)
33 00:09:47.712673 progress 50 % (2 MB)
34 00:09:47.716625 progress 55 % (2 MB)
35 00:09:47.720529 progress 60 % (3 MB)
36 00:09:47.724050 progress 65 % (3 MB)
37 00:09:47.728003 progress 70 % (3 MB)
38 00:09:47.731495 progress 75 % (4 MB)
39 00:09:47.735368 progress 80 % (4 MB)
40 00:09:47.738856 progress 85 % (4 MB)
41 00:09:47.742835 progress 90 % (4 MB)
42 00:09:47.746550 progress 95 % (5 MB)
43 00:09:47.749757 progress 100 % (5 MB)
44 00:09:47.750404 5 MB downloaded in 0.14 s (39.63 MB/s)
45 00:09:47.750944 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:09:47.751855 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:09:47.752201 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:09:47.752497 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:09:47.752978 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/clang-15/kernel/Image
51 00:09:47.753232 saving as /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/kernel/Image
52 00:09:47.753452 total size: 37878272 (36 MB)
53 00:09:47.753672 No compression specified
54 00:09:47.791910 progress 0 % (0 MB)
55 00:09:47.814579 progress 5 % (1 MB)
56 00:09:47.837564 progress 10 % (3 MB)
57 00:09:47.860748 progress 15 % (5 MB)
58 00:09:47.883565 progress 20 % (7 MB)
59 00:09:47.906160 progress 25 % (9 MB)
60 00:09:47.929027 progress 30 % (10 MB)
61 00:09:47.951610 progress 35 % (12 MB)
62 00:09:47.974715 progress 40 % (14 MB)
63 00:09:47.997711 progress 45 % (16 MB)
64 00:09:48.020266 progress 50 % (18 MB)
65 00:09:48.043354 progress 55 % (19 MB)
66 00:09:48.066653 progress 60 % (21 MB)
67 00:09:48.089479 progress 65 % (23 MB)
68 00:09:48.112321 progress 70 % (25 MB)
69 00:09:48.134669 progress 75 % (27 MB)
70 00:09:48.157849 progress 80 % (28 MB)
71 00:09:48.180538 progress 85 % (30 MB)
72 00:09:48.203451 progress 90 % (32 MB)
73 00:09:48.226513 progress 95 % (34 MB)
74 00:09:48.248642 progress 100 % (36 MB)
75 00:09:48.249393 36 MB downloaded in 0.50 s (72.84 MB/s)
76 00:09:48.249889 end: 1.2.1 http-download (duration 00:00:00) [common]
78 00:09:48.250737 end: 1.2 download-retry (duration 00:00:00) [common]
79 00:09:48.251036 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:09:48.251317 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:09:48.251785 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/clang-15/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 00:09:48.252089 saving as /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/dtb/meson-g12b-a311d-libretech-cc.dtb
83 00:09:48.252312 total size: 54703 (0 MB)
84 00:09:48.252532 No compression specified
85 00:09:48.290963 progress 59 % (0 MB)
86 00:09:48.291811 progress 100 % (0 MB)
87 00:09:48.292426 0 MB downloaded in 0.04 s (1.30 MB/s)
88 00:09:48.292930 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:09:48.293774 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:09:48.294053 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:09:48.294330 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:09:48.294783 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 00:09:48.295029 saving as /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/nfsrootfs/full.rootfs.tar
95 00:09:48.295244 total size: 120894716 (115 MB)
96 00:09:48.295459 Using unxz to decompress xz
97 00:09:48.334377 progress 0 % (0 MB)
98 00:09:49.123005 progress 5 % (5 MB)
99 00:09:49.956386 progress 10 % (11 MB)
100 00:09:50.756874 progress 15 % (17 MB)
101 00:09:51.496757 progress 20 % (23 MB)
102 00:09:52.090973 progress 25 % (28 MB)
103 00:09:52.920988 progress 30 % (34 MB)
104 00:09:53.712265 progress 35 % (40 MB)
105 00:09:54.055324 progress 40 % (46 MB)
106 00:09:54.426456 progress 45 % (51 MB)
107 00:09:55.139657 progress 50 % (57 MB)
108 00:09:56.021196 progress 55 % (63 MB)
109 00:09:56.799328 progress 60 % (69 MB)
110 00:09:57.552792 progress 65 % (74 MB)
111 00:09:58.323053 progress 70 % (80 MB)
112 00:09:59.140491 progress 75 % (86 MB)
113 00:09:59.920313 progress 80 % (92 MB)
114 00:10:00.676818 progress 85 % (98 MB)
115 00:10:01.520396 progress 90 % (103 MB)
116 00:10:02.283784 progress 95 % (109 MB)
117 00:10:03.105141 progress 100 % (115 MB)
118 00:10:03.117727 115 MB downloaded in 14.82 s (7.78 MB/s)
119 00:10:03.118604 end: 1.4.1 http-download (duration 00:00:15) [common]
121 00:10:03.120281 end: 1.4 download-retry (duration 00:00:15) [common]
122 00:10:03.120815 start: 1.5 download-retry (timeout 00:09:44) [common]
123 00:10:03.121335 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 00:10:03.122281 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/clang-15/modules.tar.xz
125 00:10:03.122760 saving as /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/modules/modules.tar
126 00:10:03.123186 total size: 11775236 (11 MB)
127 00:10:03.123611 Using unxz to decompress xz
128 00:10:03.169605 progress 0 % (0 MB)
129 00:10:03.236344 progress 5 % (0 MB)
130 00:10:03.310570 progress 10 % (1 MB)
131 00:10:03.404944 progress 15 % (1 MB)
132 00:10:03.500757 progress 20 % (2 MB)
133 00:10:03.580359 progress 25 % (2 MB)
134 00:10:03.656208 progress 30 % (3 MB)
135 00:10:03.735787 progress 35 % (3 MB)
136 00:10:03.814364 progress 40 % (4 MB)
137 00:10:03.889807 progress 45 % (5 MB)
138 00:10:03.974076 progress 50 % (5 MB)
139 00:10:04.055523 progress 55 % (6 MB)
140 00:10:04.140921 progress 60 % (6 MB)
141 00:10:04.221889 progress 65 % (7 MB)
142 00:10:04.303889 progress 70 % (7 MB)
143 00:10:04.387337 progress 75 % (8 MB)
144 00:10:04.471166 progress 80 % (9 MB)
145 00:10:04.552134 progress 85 % (9 MB)
146 00:10:04.635810 progress 90 % (10 MB)
147 00:10:04.714601 progress 95 % (10 MB)
148 00:10:04.792470 progress 100 % (11 MB)
149 00:10:04.803950 11 MB downloaded in 1.68 s (6.68 MB/s)
150 00:10:04.804968 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:10:04.806619 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:10:04.807151 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 00:10:04.807674 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 00:10:22.260412 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/968432/extract-nfsrootfs-n7cwboga
156 00:10:22.261020 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 00:10:22.261305 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 00:10:22.261909 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8
159 00:10:22.262343 makedir: /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin
160 00:10:22.262671 makedir: /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/tests
161 00:10:22.262982 makedir: /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/results
162 00:10:22.263313 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-add-keys
163 00:10:22.263919 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-add-sources
164 00:10:22.264477 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-background-process-start
165 00:10:22.264975 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-background-process-stop
166 00:10:22.265525 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-common-functions
167 00:10:22.266023 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-echo-ipv4
168 00:10:22.266499 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-install-packages
169 00:10:22.266965 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-installed-packages
170 00:10:22.267432 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-os-build
171 00:10:22.267923 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-probe-channel
172 00:10:22.268468 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-probe-ip
173 00:10:22.268947 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-target-ip
174 00:10:22.269418 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-target-mac
175 00:10:22.269885 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-target-storage
176 00:10:22.270360 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-test-case
177 00:10:22.270831 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-test-event
178 00:10:22.271296 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-test-feedback
179 00:10:22.271783 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-test-raise
180 00:10:22.272302 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-test-reference
181 00:10:22.272778 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-test-runner
182 00:10:22.273254 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-test-set
183 00:10:22.273721 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-test-shell
184 00:10:22.274202 Updating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-add-keys (debian)
185 00:10:22.274724 Updating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-add-sources (debian)
186 00:10:22.275221 Updating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-install-packages (debian)
187 00:10:22.275712 Updating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-installed-packages (debian)
188 00:10:22.276227 Updating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/bin/lava-os-build (debian)
189 00:10:22.276680 Creating /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/environment
190 00:10:22.277055 LAVA metadata
191 00:10:22.277309 - LAVA_JOB_ID=968432
192 00:10:22.277523 - LAVA_DISPATCHER_IP=192.168.6.2
193 00:10:22.277880 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 00:10:22.278814 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 00:10:22.279126 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 00:10:22.279333 skipped lava-vland-overlay
197 00:10:22.279574 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 00:10:22.279825 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 00:10:22.280069 skipped lava-multinode-overlay
200 00:10:22.280320 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 00:10:22.280572 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 00:10:22.280818 Loading test definitions
203 00:10:22.281094 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 00:10:22.281313 Using /lava-968432 at stage 0
205 00:10:22.282422 uuid=968432_1.6.2.4.1 testdef=None
206 00:10:22.282739 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 00:10:22.283004 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 00:10:22.284583 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 00:10:22.285375 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 00:10:22.287301 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 00:10:22.288156 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 00:10:22.290023 runner path: /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/0/tests/0_timesync-off test_uuid 968432_1.6.2.4.1
215 00:10:22.290591 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 00:10:22.291412 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 00:10:22.291635 Using /lava-968432 at stage 0
219 00:10:22.292042 Fetching tests from https://github.com/kernelci/test-definitions.git
220 00:10:22.292346 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/0/tests/1_kselftest-dt'
221 00:10:25.770697 Running '/usr/bin/git checkout kernelci.org
222 00:10:26.214817 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 00:10:26.216282 uuid=968432_1.6.2.4.5 testdef=None
224 00:10:26.216628 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 00:10:26.217380 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 00:10:26.220281 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 00:10:26.221109 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 00:10:26.224809 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 00:10:26.225667 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 00:10:26.229262 runner path: /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/0/tests/1_kselftest-dt test_uuid 968432_1.6.2.4.5
234 00:10:26.229543 BOARD='meson-g12b-a311d-libretech-cc'
235 00:10:26.229749 BRANCH='mainline'
236 00:10:26.229947 SKIPFILE='/dev/null'
237 00:10:26.230144 SKIP_INSTALL='True'
238 00:10:26.230339 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/clang-15/kselftest.tar.xz'
239 00:10:26.230538 TST_CASENAME=''
240 00:10:26.230734 TST_CMDFILES='dt'
241 00:10:26.231276 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 00:10:26.232099 Creating lava-test-runner.conf files
244 00:10:26.232307 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/968432/lava-overlay-6j10sip8/lava-968432/0 for stage 0
245 00:10:26.232656 - 0_timesync-off
246 00:10:26.232893 - 1_kselftest-dt
247 00:10:26.233223 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 00:10:26.233503 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 00:10:49.472313 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 00:10:49.472770 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 00:10:49.473037 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 00:10:49.473309 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 00:10:49.473576 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 00:10:50.202957 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 00:10:50.203439 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 00:10:50.203696 extracting modules file /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968432/extract-nfsrootfs-n7cwboga
257 00:10:51.590833 extracting modules file /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968432/extract-overlay-ramdisk-_tbrgjut/ramdisk
258 00:10:53.019034 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 00:10:53.019516 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 00:10:53.019799 [common] Applying overlay to NFS
261 00:10:53.020040 [common] Applying overlay /var/lib/lava/dispatcher/tmp/968432/compress-overlay-jkm7rx_u/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/968432/extract-nfsrootfs-n7cwboga
262 00:10:55.739043 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 00:10:55.739515 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 00:10:55.739789 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 00:10:55.740051 Converting downloaded kernel to a uImage
266 00:10:55.740380 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/kernel/Image /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/kernel/uImage
267 00:10:56.124633 output: Image Name:
268 00:10:56.125065 output: Created: Sun Nov 10 00:10:55 2024
269 00:10:56.125287 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 00:10:56.125501 output: Data Size: 37878272 Bytes = 36990.50 KiB = 36.12 MiB
271 00:10:56.125712 output: Load Address: 01080000
272 00:10:56.125919 output: Entry Point: 01080000
273 00:10:56.126122 output:
274 00:10:56.126463 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 00:10:56.126751 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 00:10:56.127039 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 00:10:56.127317 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 00:10:56.127591 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 00:10:56.127863 Building ramdisk /var/lib/lava/dispatcher/tmp/968432/extract-overlay-ramdisk-_tbrgjut/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/968432/extract-overlay-ramdisk-_tbrgjut/ramdisk
280 00:10:58.382850 >> 173438 blocks
281 00:11:06.063065 Adding RAMdisk u-boot header.
282 00:11:06.063787 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/968432/extract-overlay-ramdisk-_tbrgjut/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/968432/extract-overlay-ramdisk-_tbrgjut/ramdisk.cpio.gz.uboot
283 00:11:06.330902 output: Image Name:
284 00:11:06.331309 output: Created: Sun Nov 10 00:11:06 2024
285 00:11:06.331520 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 00:11:06.331725 output: Data Size: 24147895 Bytes = 23581.93 KiB = 23.03 MiB
287 00:11:06.331927 output: Load Address: 00000000
288 00:11:06.332368 output: Entry Point: 00000000
289 00:11:06.332772 output:
290 00:11:06.333739 rename /var/lib/lava/dispatcher/tmp/968432/extract-overlay-ramdisk-_tbrgjut/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/ramdisk/ramdisk.cpio.gz.uboot
291 00:11:06.334442 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 00:11:06.334981 end: 1.6 prepare-tftp-overlay (duration 00:01:02) [common]
293 00:11:06.335534 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 00:11:06.335974 No LXC device requested
295 00:11:06.336508 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 00:11:06.337016 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 00:11:06.337505 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 00:11:06.337910 Checking files for TFTP limit of 4294967296 bytes.
299 00:11:06.340566 end: 1 tftp-deploy (duration 00:01:19) [common]
300 00:11:06.341138 start: 2 uboot-action (timeout 00:05:00) [common]
301 00:11:06.341660 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 00:11:06.342155 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 00:11:06.342655 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 00:11:06.343176 Using kernel file from prepare-kernel: 968432/tftp-deploy-xei8mx9c/kernel/uImage
305 00:11:06.343798 substitutions:
306 00:11:06.344243 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 00:11:06.344651 - {DTB_ADDR}: 0x01070000
308 00:11:06.345052 - {DTB}: 968432/tftp-deploy-xei8mx9c/dtb/meson-g12b-a311d-libretech-cc.dtb
309 00:11:06.345452 - {INITRD}: 968432/tftp-deploy-xei8mx9c/ramdisk/ramdisk.cpio.gz.uboot
310 00:11:06.345847 - {KERNEL_ADDR}: 0x01080000
311 00:11:06.346238 - {KERNEL}: 968432/tftp-deploy-xei8mx9c/kernel/uImage
312 00:11:06.346628 - {LAVA_MAC}: None
313 00:11:06.347053 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/968432/extract-nfsrootfs-n7cwboga
314 00:11:06.347448 - {NFS_SERVER_IP}: 192.168.6.2
315 00:11:06.347838 - {PRESEED_CONFIG}: None
316 00:11:06.348260 - {PRESEED_LOCAL}: None
317 00:11:06.348653 - {RAMDISK_ADDR}: 0x08000000
318 00:11:06.349038 - {RAMDISK}: 968432/tftp-deploy-xei8mx9c/ramdisk/ramdisk.cpio.gz.uboot
319 00:11:06.349426 - {ROOT_PART}: None
320 00:11:06.349815 - {ROOT}: None
321 00:11:06.350201 - {SERVER_IP}: 192.168.6.2
322 00:11:06.350586 - {TEE_ADDR}: 0x83000000
323 00:11:06.350968 - {TEE}: None
324 00:11:06.351351 Parsed boot commands:
325 00:11:06.351724 - setenv autoload no
326 00:11:06.352128 - setenv initrd_high 0xffffffff
327 00:11:06.352513 - setenv fdt_high 0xffffffff
328 00:11:06.352893 - dhcp
329 00:11:06.353271 - setenv serverip 192.168.6.2
330 00:11:06.353653 - tftpboot 0x01080000 968432/tftp-deploy-xei8mx9c/kernel/uImage
331 00:11:06.354040 - tftpboot 0x08000000 968432/tftp-deploy-xei8mx9c/ramdisk/ramdisk.cpio.gz.uboot
332 00:11:06.354423 - tftpboot 0x01070000 968432/tftp-deploy-xei8mx9c/dtb/meson-g12b-a311d-libretech-cc.dtb
333 00:11:06.354807 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/968432/extract-nfsrootfs-n7cwboga,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 00:11:06.355204 - bootm 0x01080000 0x08000000 0x01070000
335 00:11:06.355694 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 00:11:06.357240 start: 2.3 connect-device (timeout 00:05:00) [common]
338 00:11:06.357653 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 00:11:06.372514 Setting prompt string to ['lava-test: # ']
340 00:11:06.373496 end: 2.3 connect-device (duration 00:00:00) [common]
341 00:11:06.373912 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 00:11:06.374261 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 00:11:06.374590 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 00:11:06.375289 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 00:11:06.409668 >> OK - accepted request
346 00:11:06.411612 Returned 0 in 0 seconds
347 00:11:06.512928 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 00:11:06.514763 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 00:11:06.515404 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 00:11:06.516019 Setting prompt string to ['Hit any key to stop autoboot']
352 00:11:06.516555 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 00:11:06.518310 Trying 192.168.56.21...
354 00:11:06.518860 Connected to conserv1.
355 00:11:06.519333 Escape character is '^]'.
356 00:11:06.519809
357 00:11:06.520322 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 00:11:06.520812
359 00:11:17.794402 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 00:11:17.794829 bl2_stage_init 0x01
361 00:11:17.795060 bl2_stage_init 0x81
362 00:11:17.800150 hw id: 0x0000 - pwm id 0x01
363 00:11:17.800696 bl2_stage_init 0xc1
364 00:11:17.801116 bl2_stage_init 0x02
365 00:11:17.801522
366 00:11:17.805589 L0:00000000
367 00:11:17.806053 L1:20000703
368 00:11:17.806470 L2:00008067
369 00:11:17.806883 L3:14000000
370 00:11:17.808489 B2:00402000
371 00:11:17.808927 B1:e0f83180
372 00:11:17.809338
373 00:11:17.809735 TE: 58124
374 00:11:17.810130
375 00:11:17.819689 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 00:11:17.820159
377 00:11:17.820557 Board ID = 1
378 00:11:17.820943 Set A53 clk to 24M
379 00:11:17.821327 Set A73 clk to 24M
380 00:11:17.825301 Set clk81 to 24M
381 00:11:17.825724 A53 clk: 1200 MHz
382 00:11:17.826114 A73 clk: 1200 MHz
383 00:11:17.830885 CLK81: 166.6M
384 00:11:17.831300 smccc: 00012a92
385 00:11:17.836480 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 00:11:17.836900 board id: 1
387 00:11:17.845275 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 00:11:17.855603 fw parse done
389 00:11:17.861540 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 00:11:17.904173 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 00:11:17.915061 PIEI prepare done
392 00:11:17.915499 fastboot data load
393 00:11:17.915898 fastboot data verify
394 00:11:17.920659 verify result: 266
395 00:11:17.926259 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 00:11:17.926692 LPDDR4 probe
397 00:11:17.927111 ddr clk to 1584MHz
398 00:11:17.934239 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 00:11:17.971519
400 00:11:17.971963 dmc_version 0001
401 00:11:17.978188 Check phy result
402 00:11:17.984076 INFO : End of CA training
403 00:11:17.984537 INFO : End of initialization
404 00:11:17.989634 INFO : Training has run successfully!
405 00:11:17.990081 Check phy result
406 00:11:17.995231 INFO : End of initialization
407 00:11:17.995673 INFO : End of read enable training
408 00:11:18.000938 INFO : End of fine write leveling
409 00:11:18.006430 INFO : End of Write leveling coarse delay
410 00:11:18.006874 INFO : Training has run successfully!
411 00:11:18.007296 Check phy result
412 00:11:18.012067 INFO : End of initialization
413 00:11:18.012510 INFO : End of read dq deskew training
414 00:11:18.017649 INFO : End of MPR read delay center optimization
415 00:11:18.023257 INFO : End of write delay center optimization
416 00:11:18.028900 INFO : End of read delay center optimization
417 00:11:18.029360 INFO : End of max read latency training
418 00:11:18.034441 INFO : Training has run successfully!
419 00:11:18.034893 1D training succeed
420 00:11:18.043637 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 00:11:18.091296 Check phy result
422 00:11:18.091758 INFO : End of initialization
423 00:11:18.113690 INFO : End of 2D read delay Voltage center optimization
424 00:11:18.133786 INFO : End of 2D read delay Voltage center optimization
425 00:11:18.185701 INFO : End of 2D write delay Voltage center optimization
426 00:11:18.235006 INFO : End of 2D write delay Voltage center optimization
427 00:11:18.240483 INFO : Training has run successfully!
428 00:11:18.240939
429 00:11:18.241361 channel==0
430 00:11:18.246142 RxClkDly_Margin_A0==88 ps 9
431 00:11:18.246593 TxDqDly_Margin_A0==98 ps 10
432 00:11:18.251690 RxClkDly_Margin_A1==88 ps 9
433 00:11:18.252177 TxDqDly_Margin_A1==98 ps 10
434 00:11:18.252602 TrainedVREFDQ_A0==74
435 00:11:18.257288 TrainedVREFDQ_A1==74
436 00:11:18.257745 VrefDac_Margin_A0==25
437 00:11:18.258163 DeviceVref_Margin_A0==40
438 00:11:18.262942 VrefDac_Margin_A1==25
439 00:11:18.263386 DeviceVref_Margin_A1==40
440 00:11:18.263797
441 00:11:18.264283
442 00:11:18.268474 channel==1
443 00:11:18.268927 RxClkDly_Margin_A0==98 ps 10
444 00:11:18.269342 TxDqDly_Margin_A0==88 ps 9
445 00:11:18.274115 RxClkDly_Margin_A1==98 ps 10
446 00:11:18.274567 TxDqDly_Margin_A1==88 ps 9
447 00:11:18.279670 TrainedVREFDQ_A0==76
448 00:11:18.280141 TrainedVREFDQ_A1==77
449 00:11:18.280560 VrefDac_Margin_A0==22
450 00:11:18.285268 DeviceVref_Margin_A0==38
451 00:11:18.285720 VrefDac_Margin_A1==23
452 00:11:18.290953 DeviceVref_Margin_A1==37
453 00:11:18.291400
454 00:11:18.291820 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 00:11:18.292269
456 00:11:18.324530 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000018 00000018 00000019 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
457 00:11:18.325062 2D training succeed
458 00:11:18.330092 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 00:11:18.335692 auto size-- 65535DDR cs0 size: 2048MB
460 00:11:18.336177 DDR cs1 size: 2048MB
461 00:11:18.341303 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 00:11:18.341760 cs0 DataBus test pass
463 00:11:18.346857 cs1 DataBus test pass
464 00:11:18.347312 cs0 AddrBus test pass
465 00:11:18.347730 cs1 AddrBus test pass
466 00:11:18.348181
467 00:11:18.352460 100bdlr_step_size ps== 420
468 00:11:18.352920 result report
469 00:11:18.358060 boot times 0Enable ddr reg access
470 00:11:18.363439 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 00:11:18.376893 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 00:11:18.948989 0.0;M3 CHK:0;cm4_sp_mode 0
473 00:11:18.949595 MVN_1=0x00000000
474 00:11:18.954442 MVN_2=0x00000000
475 00:11:18.960210 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 00:11:18.960671 OPS=0x10
477 00:11:18.961099 ring efuse init
478 00:11:18.961514 chipver efuse init
479 00:11:18.965772 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 00:11:18.971370 [0.018961 Inits done]
481 00:11:18.971817 secure task start!
482 00:11:18.972286 high task start!
483 00:11:18.975953 low task start!
484 00:11:18.976437 run into bl31
485 00:11:18.982610 NOTICE: BL31: v1.3(release):4fc40b1
486 00:11:18.990414 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 00:11:18.990868 NOTICE: BL31: G12A normal boot!
488 00:11:19.015801 NOTICE: BL31: BL33 decompress pass
489 00:11:19.021463 ERROR: Error initializing runtime service opteed_fast
490 00:11:20.254432
491 00:11:20.255027
492 00:11:20.262786 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 00:11:20.263252
494 00:11:20.263680 Model: Libre Computer AML-A311D-CC Alta
495 00:11:20.471293 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 00:11:20.494625 DRAM: 2 GiB (effective 3.8 GiB)
497 00:11:20.637727 Core: 408 devices, 31 uclasses, devicetree: separate
498 00:11:20.643539 WDT: Not starting watchdog@f0d0
499 00:11:20.675760 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 00:11:20.688206 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 00:11:20.693159 ** Bad device specification mmc 0 **
502 00:11:20.703542 Card did not respond to voltage select! : -110
503 00:11:20.711164 ** Bad device specification mmc 0 **
504 00:11:20.711653 Couldn't find partition mmc 0
505 00:11:20.719569 Card did not respond to voltage select! : -110
506 00:11:20.725018 ** Bad device specification mmc 0 **
507 00:11:20.725500 Couldn't find partition mmc 0
508 00:11:20.730081 Error: could not access storage.
509 00:11:21.994947 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 00:11:21.995632 bl2_stage_init 0x01
511 00:11:21.996227 bl2_stage_init 0x81
512 00:11:22.000604 hw id: 0x0000 - pwm id 0x01
513 00:11:22.001133 bl2_stage_init 0xc1
514 00:11:22.001603 bl2_stage_init 0x02
515 00:11:22.002063
516 00:11:22.006110 L0:00000000
517 00:11:22.006625 L1:20000703
518 00:11:22.007086 L2:00008067
519 00:11:22.007537 L3:14000000
520 00:11:22.011746 B2:00402000
521 00:11:22.012305 B1:e0f83180
522 00:11:22.012770
523 00:11:22.013232 TE: 58159
524 00:11:22.013687
525 00:11:22.017337 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 00:11:22.017891
527 00:11:22.018356 Board ID = 1
528 00:11:22.022923 Set A53 clk to 24M
529 00:11:22.023462 Set A73 clk to 24M
530 00:11:22.023930 Set clk81 to 24M
531 00:11:22.028583 A53 clk: 1200 MHz
532 00:11:22.029109 A73 clk: 1200 MHz
533 00:11:22.029567 CLK81: 166.6M
534 00:11:22.030017 smccc: 00012ab5
535 00:11:22.034113 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 00:11:22.039736 board id: 1
537 00:11:22.045637 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 00:11:22.056244 fw parse done
539 00:11:22.062188 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 00:11:22.104817 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 00:11:22.115770 PIEI prepare done
542 00:11:22.116332 fastboot data load
543 00:11:22.116801 fastboot data verify
544 00:11:22.121433 verify result: 266
545 00:11:22.127036 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 00:11:22.127554 LPDDR4 probe
547 00:11:22.128043 ddr clk to 1584MHz
548 00:11:22.135021 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 00:11:22.172279
550 00:11:22.172811 dmc_version 0001
551 00:11:22.178935 Check phy result
552 00:11:22.184848 INFO : End of CA training
553 00:11:22.185364 INFO : End of initialization
554 00:11:22.190416 INFO : Training has run successfully!
555 00:11:22.190925 Check phy result
556 00:11:22.196032 INFO : End of initialization
557 00:11:22.196541 INFO : End of read enable training
558 00:11:22.201675 INFO : End of fine write leveling
559 00:11:22.207202 INFO : End of Write leveling coarse delay
560 00:11:22.207706 INFO : Training has run successfully!
561 00:11:22.208203 Check phy result
562 00:11:22.212800 INFO : End of initialization
563 00:11:22.213309 INFO : End of read dq deskew training
564 00:11:22.218410 INFO : End of MPR read delay center optimization
565 00:11:22.224044 INFO : End of write delay center optimization
566 00:11:22.229678 INFO : End of read delay center optimization
567 00:11:22.230186 INFO : End of max read latency training
568 00:11:22.235216 INFO : Training has run successfully!
569 00:11:22.235730 1D training succeed
570 00:11:22.244362 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 00:11:22.291950 Check phy result
572 00:11:22.292515 INFO : End of initialization
573 00:11:22.313601 INFO : End of 2D read delay Voltage center optimization
574 00:11:22.332819 INFO : End of 2D read delay Voltage center optimization
575 00:11:22.385651 INFO : End of 2D write delay Voltage center optimization
576 00:11:22.434811 INFO : End of 2D write delay Voltage center optimization
577 00:11:22.440303 INFO : Training has run successfully!
578 00:11:22.440618
579 00:11:22.440851 channel==0
580 00:11:22.445900 RxClkDly_Margin_A0==88 ps 9
581 00:11:22.446319 TxDqDly_Margin_A0==98 ps 10
582 00:11:22.451493 RxClkDly_Margin_A1==88 ps 9
583 00:11:22.451887 TxDqDly_Margin_A1==98 ps 10
584 00:11:22.452267 TrainedVREFDQ_A0==74
585 00:11:22.457078 TrainedVREFDQ_A1==74
586 00:11:22.457360 VrefDac_Margin_A0==25
587 00:11:22.457579 DeviceVref_Margin_A0==40
588 00:11:22.462683 VrefDac_Margin_A1==25
589 00:11:22.463057 DeviceVref_Margin_A1==40
590 00:11:22.463384
591 00:11:22.463711
592 00:11:22.468267 channel==1
593 00:11:22.468642 RxClkDly_Margin_A0==98 ps 10
594 00:11:22.468893 TxDqDly_Margin_A0==88 ps 9
595 00:11:22.473866 RxClkDly_Margin_A1==88 ps 9
596 00:11:22.474143 TxDqDly_Margin_A1==88 ps 9
597 00:11:22.479513 TrainedVREFDQ_A0==77
598 00:11:22.479831 TrainedVREFDQ_A1==77
599 00:11:22.480106 VrefDac_Margin_A0==22
600 00:11:22.485113 DeviceVref_Margin_A0==37
601 00:11:22.485440 VrefDac_Margin_A1==24
602 00:11:22.490772 DeviceVref_Margin_A1==37
603 00:11:22.491262
604 00:11:22.491660 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 00:11:22.492101
606 00:11:22.524313 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
607 00:11:22.524935 2D training succeed
608 00:11:22.529909 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 00:11:22.535530 auto size-- 65535DDR cs0 size: 2048MB
610 00:11:22.536094 DDR cs1 size: 2048MB
611 00:11:22.541123 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 00:11:22.541652 cs0 DataBus test pass
613 00:11:22.546741 cs1 DataBus test pass
614 00:11:22.547275 cs0 AddrBus test pass
615 00:11:22.547746 cs1 AddrBus test pass
616 00:11:22.548256
617 00:11:22.552352 100bdlr_step_size ps== 420
618 00:11:22.552879 result report
619 00:11:22.557937 boot times 0Enable ddr reg access
620 00:11:22.563200 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 00:11:22.576705 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 00:11:23.148871 0.0;M3 CHK:0;cm4_sp_mode 0
623 00:11:23.149486 MVN_1=0x00000000
624 00:11:23.154341 MVN_2=0x00000000
625 00:11:23.160126 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 00:11:23.160704 OPS=0x10
627 00:11:23.161195 ring efuse init
628 00:11:23.161696 chipver efuse init
629 00:11:23.165640 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 00:11:23.171214 [0.018961 Inits done]
631 00:11:23.171713 secure task start!
632 00:11:23.172193 high task start!
633 00:11:23.175821 low task start!
634 00:11:23.176337 run into bl31
635 00:11:23.182381 NOTICE: BL31: v1.3(release):4fc40b1
636 00:11:23.190250 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 00:11:23.190755 NOTICE: BL31: G12A normal boot!
638 00:11:23.215545 NOTICE: BL31: BL33 decompress pass
639 00:11:23.221274 ERROR: Error initializing runtime service opteed_fast
640 00:11:24.454485
641 00:11:24.455093
642 00:11:24.462595 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 00:11:24.463119
644 00:11:24.463586 Model: Libre Computer AML-A311D-CC Alta
645 00:11:24.671102 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 00:11:24.694551 DRAM: 2 GiB (effective 3.8 GiB)
647 00:11:24.837412 Core: 408 devices, 31 uclasses, devicetree: separate
648 00:11:24.843339 WDT: Not starting watchdog@f0d0
649 00:11:24.875462 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 00:11:24.888070 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 00:11:24.893056 ** Bad device specification mmc 0 **
652 00:11:24.903338 Card did not respond to voltage select! : -110
653 00:11:24.911001 ** Bad device specification mmc 0 **
654 00:11:24.911496 Couldn't find partition mmc 0
655 00:11:24.919233 Card did not respond to voltage select! : -110
656 00:11:24.924795 ** Bad device specification mmc 0 **
657 00:11:24.925298 Couldn't find partition mmc 0
658 00:11:24.929870 Error: could not access storage.
659 00:11:25.274387 Net: eth0: ethernet@ff3f0000
660 00:11:25.274950 starting USB...
661 00:11:25.525385 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 00:11:25.525947 Starting the controller
663 00:11:25.532204 USB XHCI 1.10
664 00:11:27.244017 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 00:11:27.244699 bl2_stage_init 0x01
666 00:11:27.245182 bl2_stage_init 0x81
667 00:11:27.249327 hw id: 0x0000 - pwm id 0x01
668 00:11:27.249830 bl2_stage_init 0xc1
669 00:11:27.250294 bl2_stage_init 0x02
670 00:11:27.250748
671 00:11:27.254960 L0:00000000
672 00:11:27.255449 L1:20000703
673 00:11:27.255905 L2:00008067
674 00:11:27.256396 L3:14000000
675 00:11:27.258009 B2:00402000
676 00:11:27.258489 B1:e0f83180
677 00:11:27.258942
678 00:11:27.259394 TE: 58124
679 00:11:27.259841
680 00:11:27.269051 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 00:11:27.269558
682 00:11:27.270018 Board ID = 1
683 00:11:27.270465 Set A53 clk to 24M
684 00:11:27.270910 Set A73 clk to 24M
685 00:11:27.274836 Set clk81 to 24M
686 00:11:27.275321 A53 clk: 1200 MHz
687 00:11:27.275776 A73 clk: 1200 MHz
688 00:11:27.280260 CLK81: 166.6M
689 00:11:27.280749 smccc: 00012a92
690 00:11:27.285813 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 00:11:27.286295 board id: 1
692 00:11:27.294508 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 00:11:27.304913 fw parse done
694 00:11:27.310882 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 00:11:27.353534 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 00:11:27.364442 PIEI prepare done
697 00:11:27.364933 fastboot data load
698 00:11:27.365392 fastboot data verify
699 00:11:27.370009 verify result: 266
700 00:11:27.375616 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 00:11:27.376155 LPDDR4 probe
702 00:11:27.376620 ddr clk to 1584MHz
703 00:11:27.383624 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 00:11:27.421245
705 00:11:27.421774 dmc_version 0001
706 00:11:27.427536 Check phy result
707 00:11:27.433507 INFO : End of CA training
708 00:11:27.433997 INFO : End of initialization
709 00:11:27.438991 INFO : Training has run successfully!
710 00:11:27.439472 Check phy result
711 00:11:27.444600 INFO : End of initialization
712 00:11:27.445089 INFO : End of read enable training
713 00:11:27.450198 INFO : End of fine write leveling
714 00:11:27.455816 INFO : End of Write leveling coarse delay
715 00:11:27.456328 INFO : Training has run successfully!
716 00:11:27.456783 Check phy result
717 00:11:27.461456 INFO : End of initialization
718 00:11:27.461948 INFO : End of read dq deskew training
719 00:11:27.467010 INFO : End of MPR read delay center optimization
720 00:11:27.472600 INFO : End of write delay center optimization
721 00:11:27.478188 INFO : End of read delay center optimization
722 00:11:27.478685 INFO : End of max read latency training
723 00:11:27.483813 INFO : Training has run successfully!
724 00:11:27.484354 1D training succeed
725 00:11:27.493063 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 00:11:27.540603 Check phy result
727 00:11:27.541124 INFO : End of initialization
728 00:11:27.562662 INFO : End of 2D read delay Voltage center optimization
729 00:11:27.582744 INFO : End of 2D read delay Voltage center optimization
730 00:11:27.634843 INFO : End of 2D write delay Voltage center optimization
731 00:11:27.684102 INFO : End of 2D write delay Voltage center optimization
732 00:11:27.689569 INFO : Training has run successfully!
733 00:11:27.690162
734 00:11:27.690645 channel==0
735 00:11:27.695346 RxClkDly_Margin_A0==88 ps 9
736 00:11:27.695962 TxDqDly_Margin_A0==98 ps 10
737 00:11:27.700924 RxClkDly_Margin_A1==88 ps 9
738 00:11:27.701492 TxDqDly_Margin_A1==98 ps 10
739 00:11:27.701977 TrainedVREFDQ_A0==74
740 00:11:27.706480 TrainedVREFDQ_A1==74
741 00:11:27.707050 VrefDac_Margin_A0==25
742 00:11:27.707533 DeviceVref_Margin_A0==40
743 00:11:27.712084 VrefDac_Margin_A1==25
744 00:11:27.712640 DeviceVref_Margin_A1==40
745 00:11:27.713113
746 00:11:27.713581
747 00:11:27.717654 channel==1
748 00:11:27.718203 RxClkDly_Margin_A0==98 ps 10
749 00:11:27.718671 TxDqDly_Margin_A0==98 ps 10
750 00:11:27.723259 RxClkDly_Margin_A1==98 ps 10
751 00:11:27.723823 TxDqDly_Margin_A1==88 ps 9
752 00:11:27.728866 TrainedVREFDQ_A0==77
753 00:11:27.729418 TrainedVREFDQ_A1==77
754 00:11:27.729896 VrefDac_Margin_A0==22
755 00:11:27.734482 DeviceVref_Margin_A0==37
756 00:11:27.735033 VrefDac_Margin_A1==22
757 00:11:27.740056 DeviceVref_Margin_A1==37
758 00:11:27.740611
759 00:11:27.741091 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 00:11:27.745658
761 00:11:27.773603 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 0000001a 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
762 00:11:27.774212 2D training succeed
763 00:11:27.779254 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 00:11:27.784841 auto size-- 65535DDR cs0 size: 2048MB
765 00:11:27.785391 DDR cs1 size: 2048MB
766 00:11:27.790437 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 00:11:27.790987 cs0 DataBus test pass
768 00:11:27.796095 cs1 DataBus test pass
769 00:11:27.796645 cs0 AddrBus test pass
770 00:11:27.797112 cs1 AddrBus test pass
771 00:11:27.797570
772 00:11:27.801658 100bdlr_step_size ps== 420
773 00:11:27.802226 result report
774 00:11:27.807230 boot times 0Enable ddr reg access
775 00:11:27.812667 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 00:11:27.826122 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 00:11:28.399816 0.0;M3 CHK:0;cm4_sp_mode 0
778 00:11:28.400539 MVN_1=0x00000000
779 00:11:28.405334 MVN_2=0x00000000
780 00:11:28.411074 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 00:11:28.411667 OPS=0x10
782 00:11:28.412168 ring efuse init
783 00:11:28.412615 chipver efuse init
784 00:11:28.416651 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 00:11:28.422807 [0.018961 Inits done]
786 00:11:28.423334 secure task start!
787 00:11:28.423780 high task start!
788 00:11:28.426806 low task start!
789 00:11:28.427323 run into bl31
790 00:11:28.433557 NOTICE: BL31: v1.3(release):4fc40b1
791 00:11:28.440385 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 00:11:28.440917 NOTICE: BL31: G12A normal boot!
793 00:11:28.466649 NOTICE: BL31: BL33 decompress pass
794 00:11:28.472307 ERROR: Error initializing runtime service opteed_fast
795 00:11:29.705143
796 00:11:29.705833
797 00:11:29.713587 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 00:11:29.714178
799 00:11:29.714666 Model: Libre Computer AML-A311D-CC Alta
800 00:11:29.922038 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 00:11:29.945385 DRAM: 2 GiB (effective 3.8 GiB)
802 00:11:30.088356 Core: 408 devices, 31 uclasses, devicetree: separate
803 00:11:30.094205 WDT: Not starting watchdog@f0d0
804 00:11:30.126531 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 00:11:30.138911 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 00:11:30.143951 ** Bad device specification mmc 0 **
807 00:11:30.154276 Card did not respond to voltage select! : -110
808 00:11:30.161949 ** Bad device specification mmc 0 **
809 00:11:30.162480 Couldn't find partition mmc 0
810 00:11:30.170274 Card did not respond to voltage select! : -110
811 00:11:30.175826 ** Bad device specification mmc 0 **
812 00:11:30.176436 Couldn't find partition mmc 0
813 00:11:30.180897 Error: could not access storage.
814 00:11:30.524420 Net: eth0: ethernet@ff3f0000
815 00:11:30.525101 starting USB...
816 00:11:30.776221 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 00:11:30.776903 Starting the controller
818 00:11:30.783160 USB XHCI 1.10
819 00:11:33.003946 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
820 00:11:33.004671 bl2_stage_init 0x81
821 00:11:33.009838 hw id: 0x0000 - pwm id 0x01
822 00:11:33.010370 bl2_stage_init 0xc1
823 00:11:33.010841 bl2_stage_init 0x02
824 00:11:33.011298
825 00:11:33.015245 L0:00000000
826 00:11:33.015779 L1:20000703
827 00:11:33.016291 L2:00008067
828 00:11:33.016748 L3:14000000
829 00:11:33.017200 B2:00402000
830 00:11:33.018284 B1:e0f83180
831 00:11:33.018809
832 00:11:33.019276 TE: 58150
833 00:11:33.019736
834 00:11:33.029321 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 00:11:33.029894
836 00:11:33.030365 Board ID = 1
837 00:11:33.030822 Set A53 clk to 24M
838 00:11:33.031272 Set A73 clk to 24M
839 00:11:33.034892 Set clk81 to 24M
840 00:11:33.035428 A53 clk: 1200 MHz
841 00:11:33.035890 A73 clk: 1200 MHz
842 00:11:33.038420 CLK81: 166.6M
843 00:11:33.038940 smccc: 00012aab
844 00:11:33.044008 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 00:11:33.044535 board id: 1
846 00:11:33.053442 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 00:11:33.065155 fw parse done
848 00:11:33.070943 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 00:11:33.112604 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 00:11:33.124622 PIEI prepare done
851 00:11:33.125147 fastboot data load
852 00:11:33.125609 fastboot data verify
853 00:11:33.130184 verify result: 266
854 00:11:33.135744 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 00:11:33.136311 LPDDR4 probe
856 00:11:33.136773 ddr clk to 1584MHz
857 00:11:33.143773 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 00:11:33.180081
859 00:11:33.180636 dmc_version 0001
860 00:11:33.186760 Check phy result
861 00:11:33.193544 INFO : End of CA training
862 00:11:33.194075 INFO : End of initialization
863 00:11:33.199232 INFO : Training has run successfully!
864 00:11:33.199775 Check phy result
865 00:11:33.204762 INFO : End of initialization
866 00:11:33.205301 INFO : End of read enable training
867 00:11:33.208109 INFO : End of fine write leveling
868 00:11:33.213624 INFO : End of Write leveling coarse delay
869 00:11:33.219228 INFO : Training has run successfully!
870 00:11:33.219773 Check phy result
871 00:11:33.220281 INFO : End of initialization
872 00:11:33.224804 INFO : End of read dq deskew training
873 00:11:33.230396 INFO : End of MPR read delay center optimization
874 00:11:33.230934 INFO : End of write delay center optimization
875 00:11:33.235959 INFO : End of read delay center optimization
876 00:11:33.241587 INFO : End of max read latency training
877 00:11:33.242121 INFO : Training has run successfully!
878 00:11:33.247184 1D training succeed
879 00:11:33.253179 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 00:11:33.300725 Check phy result
881 00:11:33.301332 INFO : End of initialization
882 00:11:33.321497 INFO : End of 2D read delay Voltage center optimization
883 00:11:33.342407 INFO : End of 2D read delay Voltage center optimization
884 00:11:33.394390 INFO : End of 2D write delay Voltage center optimization
885 00:11:33.443633 INFO : End of 2D write delay Voltage center optimization
886 00:11:33.449198 INFO : Training has run successfully!
887 00:11:33.449758
888 00:11:33.450233 channel==0
889 00:11:33.454736 RxClkDly_Margin_A0==78 ps 8
890 00:11:33.455267 TxDqDly_Margin_A0==98 ps 10
891 00:11:33.460343 RxClkDly_Margin_A1==88 ps 9
892 00:11:33.460858 TxDqDly_Margin_A1==98 ps 10
893 00:11:33.461305 TrainedVREFDQ_A0==74
894 00:11:33.465929 TrainedVREFDQ_A1==74
895 00:11:33.466438 VrefDac_Margin_A0==25
896 00:11:33.466875 DeviceVref_Margin_A0==40
897 00:11:33.471560 VrefDac_Margin_A1==25
898 00:11:33.472089 DeviceVref_Margin_A1==40
899 00:11:33.472535
900 00:11:33.472970
901 00:11:33.477124 channel==1
902 00:11:33.477637 RxClkDly_Margin_A0==98 ps 10
903 00:11:33.478079 TxDqDly_Margin_A0==88 ps 9
904 00:11:33.482739 RxClkDly_Margin_A1==88 ps 9
905 00:11:33.483242 TxDqDly_Margin_A1==88 ps 9
906 00:11:33.488373 TrainedVREFDQ_A0==76
907 00:11:33.488934 TrainedVREFDQ_A1==77
908 00:11:33.489395 VrefDac_Margin_A0==22
909 00:11:33.493999 DeviceVref_Margin_A0==38
910 00:11:33.494514 VrefDac_Margin_A1==24
911 00:11:33.499586 DeviceVref_Margin_A1==37
912 00:11:33.500137
913 00:11:33.500585 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 00:11:33.501020
915 00:11:33.533119 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
916 00:11:33.533737 2D training succeed
917 00:11:33.538768 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 00:11:33.544364 auto size-- 65535DDR cs0 size: 2048MB
919 00:11:33.544908 DDR cs1 size: 2048MB
920 00:11:33.549953 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 00:11:33.550467 cs0 DataBus test pass
922 00:11:33.555548 cs1 DataBus test pass
923 00:11:33.556137 cs0 AddrBus test pass
924 00:11:33.556612 cs1 AddrBus test pass
925 00:11:33.557076
926 00:11:33.561170 100bdlr_step_size ps== 420
927 00:11:33.561717 result report
928 00:11:33.566720 boot times 0Enable ddr reg access
929 00:11:33.571386 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 00:11:33.585409 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 00:11:34.157521 0.0;M3 CHK:0;cm4_sp_mode 0
932 00:11:34.158184 MVN_1=0x00000000
933 00:11:34.162923 MVN_2=0x00000000
934 00:11:34.168672 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 00:11:34.169198 OPS=0x10
936 00:11:34.169667 ring efuse init
937 00:11:34.170117 chipver efuse init
938 00:11:34.174374 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 00:11:34.179866 [0.018961 Inits done]
940 00:11:34.180432 secure task start!
941 00:11:34.180900 high task start!
942 00:11:34.184451 low task start!
943 00:11:34.184971 run into bl31
944 00:11:34.191035 NOTICE: BL31: v1.3(release):4fc40b1
945 00:11:34.198851 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 00:11:34.199384 NOTICE: BL31: G12A normal boot!
947 00:11:34.224247 NOTICE: BL31: BL33 decompress pass
948 00:11:34.229880 ERROR: Error initializing runtime service opteed_fast
949 00:11:35.462746
950 00:11:35.463426
951 00:11:35.471138 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 00:11:35.471679
953 00:11:35.472217 Model: Libre Computer AML-A311D-CC Alta
954 00:11:35.678701 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 00:11:35.702993 DRAM: 2 GiB (effective 3.8 GiB)
956 00:11:35.845967 Core: 408 devices, 31 uclasses, devicetree: separate
957 00:11:35.851797 WDT: Not starting watchdog@f0d0
958 00:11:35.884101 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 00:11:35.896615 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 00:11:35.901542 ** Bad device specification mmc 0 **
961 00:11:35.911813 Card did not respond to voltage select! : -110
962 00:11:35.919460 ** Bad device specification mmc 0 **
963 00:11:35.920021 Couldn't find partition mmc 0
964 00:11:35.927803 Card did not respond to voltage select! : -110
965 00:11:35.933342 ** Bad device specification mmc 0 **
966 00:11:35.933860 Couldn't find partition mmc 0
967 00:11:35.938386 Error: could not access storage.
968 00:11:36.280857 Net: eth0: ethernet@ff3f0000
969 00:11:36.281513 starting USB...
970 00:11:36.532818 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 00:11:36.533495 Starting the controller
972 00:11:36.539648 USB XHCI 1.10
973 00:11:38.093864 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
974 00:11:38.102189 scanning usb for storage devices... 0 Storage Device(s) found
976 00:11:38.153950 Hit any key to stop autoboot: 1
977 00:11:38.154976 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
978 00:11:38.155683 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
979 00:11:38.156259 Setting prompt string to ['=>']
980 00:11:38.156806 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
981 00:11:38.169698 0
982 00:11:38.170673 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
983 00:11:38.171232 Sending with 10 millisecond of delay
985 00:11:39.306314 => setenv autoload no
986 00:11:39.317183 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
987 00:11:39.322672 setenv autoload no
988 00:11:39.323460 Sending with 10 millisecond of delay
990 00:11:41.120824 => setenv initrd_high 0xffffffff
991 00:11:41.131660 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
992 00:11:41.132638 setenv initrd_high 0xffffffff
993 00:11:41.133407 Sending with 10 millisecond of delay
995 00:11:42.750102 => setenv fdt_high 0xffffffff
996 00:11:42.760906 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
997 00:11:42.761782 setenv fdt_high 0xffffffff
998 00:11:42.762532 Sending with 10 millisecond of delay
1000 00:11:43.054418 => dhcp
1001 00:11:43.065177 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1002 00:11:43.066017 dhcp
1003 00:11:43.066483 Speed: 1000, full duplex
1004 00:11:43.066934 BOOTP broadcast 1
1005 00:11:43.068432 DHCP client bound to address 192.168.6.27 (4 ms)
1006 00:11:43.069163 Sending with 10 millisecond of delay
1008 00:11:44.745656 => setenv serverip 192.168.6.2
1009 00:11:44.756480 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1010 00:11:44.757416 setenv serverip 192.168.6.2
1011 00:11:44.758161 Sending with 10 millisecond of delay
1013 00:11:48.481884 => tftpboot 0x01080000 968432/tftp-deploy-xei8mx9c/kernel/uImage
1014 00:11:48.492493 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1015 00:11:48.493098 tftpboot 0x01080000 968432/tftp-deploy-xei8mx9c/kernel/uImage
1016 00:11:48.493384 Speed: 1000, full duplex
1017 00:11:48.493635 Using ethernet@ff3f0000 device
1018 00:11:48.495168 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1019 00:11:48.500829 Filename '968432/tftp-deploy-xei8mx9c/kernel/uImage'.
1020 00:11:48.504181 Load address: 0x1080000
1021 00:11:50.879756 Loading: *################################################## 36.1 MiB
1022 00:11:50.880457 15.2 MiB/s
1023 00:11:50.880953 done
1024 00:11:50.884144 Bytes transferred = 37878336 (241fa40 hex)
1025 00:11:50.885005 Sending with 10 millisecond of delay
1027 00:11:55.573519 => tftpboot 0x08000000 968432/tftp-deploy-xei8mx9c/ramdisk/ramdisk.cpio.gz.uboot
1028 00:11:55.584489 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1029 00:11:55.585073 tftpboot 0x08000000 968432/tftp-deploy-xei8mx9c/ramdisk/ramdisk.cpio.gz.uboot
1030 00:11:55.585347 Speed: 1000, full duplex
1031 00:11:55.585593 Using ethernet@ff3f0000 device
1032 00:11:55.587018 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1033 00:11:55.598847 Filename '968432/tftp-deploy-xei8mx9c/ramdisk/ramdisk.cpio.gz.uboot'.
1034 00:11:55.599305 Load address: 0x8000000
1035 00:12:02.404941 Loading: *###T ############################################## UDP wrong checksum 00000005 0000c073
1036 00:12:07.405673 T UDP wrong checksum 00000005 0000c073
1037 00:12:17.408067 T T UDP wrong checksum 00000005 0000c073
1038 00:12:37.412988 T T T T UDP wrong checksum 00000005 0000c073
1039 00:12:50.262673 T T UDP wrong checksum 000000ff 00001609
1040 00:12:50.302613 UDP wrong checksum 000000ff 0000aefb
1041 00:12:52.417150
1042 00:12:52.417804 Retry count exceeded; starting again
1044 00:12:52.419206 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1047 00:12:52.421090 end: 2.4 uboot-commands (duration 00:01:46) [common]
1049 00:12:52.422457 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1051 00:12:52.423504 end: 2 uboot-action (duration 00:01:46) [common]
1053 00:12:52.425082 Cleaning after the job
1054 00:12:52.425650 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/ramdisk
1055 00:12:52.426948 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/kernel
1056 00:12:52.452853 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/dtb
1057 00:12:52.454030 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/nfsrootfs
1058 00:12:52.534163 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968432/tftp-deploy-xei8mx9c/modules
1059 00:12:52.546696 start: 4.1 power-off (timeout 00:00:30) [common]
1060 00:12:52.547348 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1061 00:12:52.581488 >> OK - accepted request
1062 00:12:52.583707 Returned 0 in 0 seconds
1063 00:12:52.684567 end: 4.1 power-off (duration 00:00:00) [common]
1065 00:12:52.685730 start: 4.2 read-feedback (timeout 00:10:00) [common]
1066 00:12:52.686389 Listened to connection for namespace 'common' for up to 1s
1067 00:12:53.687325 Finalising connection for namespace 'common'
1068 00:12:53.687804 Disconnecting from shell: Finalise
1069 00:12:53.688118 =>
1070 00:12:53.788847 end: 4.2 read-feedback (duration 00:00:01) [common]
1071 00:12:53.789404 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/968432
1072 00:12:56.703845 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/968432
1073 00:12:56.704461 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.