Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:17:07.760762 lava-dispatcher, installed at version: 2024.01
2 00:17:07.761764 start: 0 validate
3 00:17:07.762494 Start time: 2024-11-10 00:17:07.762463+00:00 (UTC)
4 00:17:07.763223 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:17:07.763995 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:17:07.811062 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:17:07.811668 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 00:17:07.841664 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:17:07.842289 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 00:17:07.875686 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:17:07.876211 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:17:07.908792 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:17:07.909271 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 00:17:07.952206 validate duration: 0.19
16 00:17:07.953685 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:17:07.954290 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:17:07.954888 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:17:07.955838 Not decompressing ramdisk as can be used compressed.
20 00:17:07.956644 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 00:17:07.957166 saving as /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/ramdisk/initrd.cpio.gz
22 00:17:07.957665 total size: 5628169 (5 MB)
23 00:17:08.001419 progress 0 % (0 MB)
24 00:17:08.009429 progress 5 % (0 MB)
25 00:17:08.017845 progress 10 % (0 MB)
26 00:17:08.025132 progress 15 % (0 MB)
27 00:17:08.032515 progress 20 % (1 MB)
28 00:17:08.036227 progress 25 % (1 MB)
29 00:17:08.040449 progress 30 % (1 MB)
30 00:17:08.044551 progress 35 % (1 MB)
31 00:17:08.048204 progress 40 % (2 MB)
32 00:17:08.052182 progress 45 % (2 MB)
33 00:17:08.055775 progress 50 % (2 MB)
34 00:17:08.059720 progress 55 % (2 MB)
35 00:17:08.063739 progress 60 % (3 MB)
36 00:17:08.067344 progress 65 % (3 MB)
37 00:17:08.071388 progress 70 % (3 MB)
38 00:17:08.074987 progress 75 % (4 MB)
39 00:17:08.078974 progress 80 % (4 MB)
40 00:17:08.082626 progress 85 % (4 MB)
41 00:17:08.086496 progress 90 % (4 MB)
42 00:17:08.090185 progress 95 % (5 MB)
43 00:17:08.093521 progress 100 % (5 MB)
44 00:17:08.094169 5 MB downloaded in 0.14 s (39.32 MB/s)
45 00:17:08.094697 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:17:08.095589 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:17:08.095877 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:17:08.096174 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:17:08.096645 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/clang-15/kernel/Image
51 00:17:08.096891 saving as /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/kernel/Image
52 00:17:08.097100 total size: 37878272 (36 MB)
53 00:17:08.097311 No compression specified
54 00:17:08.141091 progress 0 % (0 MB)
55 00:17:08.164129 progress 5 % (1 MB)
56 00:17:08.186919 progress 10 % (3 MB)
57 00:17:08.209980 progress 15 % (5 MB)
58 00:17:08.232892 progress 20 % (7 MB)
59 00:17:08.255310 progress 25 % (9 MB)
60 00:17:08.278344 progress 30 % (10 MB)
61 00:17:08.300947 progress 35 % (12 MB)
62 00:17:08.323696 progress 40 % (14 MB)
63 00:17:08.346610 progress 45 % (16 MB)
64 00:17:08.369247 progress 50 % (18 MB)
65 00:17:08.392568 progress 55 % (19 MB)
66 00:17:08.415811 progress 60 % (21 MB)
67 00:17:08.438687 progress 65 % (23 MB)
68 00:17:08.461759 progress 70 % (25 MB)
69 00:17:08.484167 progress 75 % (27 MB)
70 00:17:08.507460 progress 80 % (28 MB)
71 00:17:08.530405 progress 85 % (30 MB)
72 00:17:08.553421 progress 90 % (32 MB)
73 00:17:08.576492 progress 95 % (34 MB)
74 00:17:08.598395 progress 100 % (36 MB)
75 00:17:08.599143 36 MB downloaded in 0.50 s (71.95 MB/s)
76 00:17:08.599631 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:17:08.600516 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:17:08.600798 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:17:08.601062 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:17:08.601524 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/clang-15/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 00:17:08.601797 saving as /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/dtb/meson-g12b-a311d-libretech-cc.dtb
83 00:17:08.602005 total size: 54703 (0 MB)
84 00:17:08.602212 No compression specified
85 00:17:08.641453 progress 59 % (0 MB)
86 00:17:08.642292 progress 100 % (0 MB)
87 00:17:08.642838 0 MB downloaded in 0.04 s (1.28 MB/s)
88 00:17:08.643324 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:17:08.644187 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:17:08.644452 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:17:08.644716 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:17:08.645171 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 00:17:08.645419 saving as /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/nfsrootfs/full.rootfs.tar
95 00:17:08.645622 total size: 120894716 (115 MB)
96 00:17:08.645832 Using unxz to decompress xz
97 00:17:08.683401 progress 0 % (0 MB)
98 00:17:09.504312 progress 5 % (5 MB)
99 00:17:10.345647 progress 10 % (11 MB)
100 00:17:11.140737 progress 15 % (17 MB)
101 00:17:11.880535 progress 20 % (23 MB)
102 00:17:12.476031 progress 25 % (28 MB)
103 00:17:13.301499 progress 30 % (34 MB)
104 00:17:14.094565 progress 35 % (40 MB)
105 00:17:14.437104 progress 40 % (46 MB)
106 00:17:14.809368 progress 45 % (51 MB)
107 00:17:15.531385 progress 50 % (57 MB)
108 00:17:16.427543 progress 55 % (63 MB)
109 00:17:17.211903 progress 60 % (69 MB)
110 00:17:17.966763 progress 65 % (74 MB)
111 00:17:18.809366 progress 70 % (80 MB)
112 00:17:19.728363 progress 75 % (86 MB)
113 00:17:20.598887 progress 80 % (92 MB)
114 00:17:21.396754 progress 85 % (98 MB)
115 00:17:22.241582 progress 90 % (103 MB)
116 00:17:23.012952 progress 95 % (109 MB)
117 00:17:23.851200 progress 100 % (115 MB)
118 00:17:23.863756 115 MB downloaded in 15.22 s (7.58 MB/s)
119 00:17:23.864579 end: 1.4.1 http-download (duration 00:00:15) [common]
121 00:17:23.866315 end: 1.4 download-retry (duration 00:00:15) [common]
122 00:17:23.866871 start: 1.5 download-retry (timeout 00:09:44) [common]
123 00:17:23.867427 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 00:17:23.868295 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/clang-15/modules.tar.xz
125 00:17:23.868786 saving as /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/modules/modules.tar
126 00:17:23.869224 total size: 11775236 (11 MB)
127 00:17:23.869671 Using unxz to decompress xz
128 00:17:23.917123 progress 0 % (0 MB)
129 00:17:23.996706 progress 5 % (0 MB)
130 00:17:24.086277 progress 10 % (1 MB)
131 00:17:24.185784 progress 15 % (1 MB)
132 00:17:24.280864 progress 20 % (2 MB)
133 00:17:24.359775 progress 25 % (2 MB)
134 00:17:24.435779 progress 30 % (3 MB)
135 00:17:24.515277 progress 35 % (3 MB)
136 00:17:24.594790 progress 40 % (4 MB)
137 00:17:24.670078 progress 45 % (5 MB)
138 00:17:24.754449 progress 50 % (5 MB)
139 00:17:24.835583 progress 55 % (6 MB)
140 00:17:24.920581 progress 60 % (6 MB)
141 00:17:25.001592 progress 65 % (7 MB)
142 00:17:25.084159 progress 70 % (7 MB)
143 00:17:25.167105 progress 75 % (8 MB)
144 00:17:25.250110 progress 80 % (9 MB)
145 00:17:25.330157 progress 85 % (9 MB)
146 00:17:25.413516 progress 90 % (10 MB)
147 00:17:25.491739 progress 95 % (10 MB)
148 00:17:25.569471 progress 100 % (11 MB)
149 00:17:25.580849 11 MB downloaded in 1.71 s (6.56 MB/s)
150 00:17:25.581724 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:17:25.583307 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:17:25.583844 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 00:17:25.584430 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 00:17:41.949615 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/968442/extract-nfsrootfs-_zd40gn1
156 00:17:41.950223 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 00:17:41.950511 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 00:17:41.951123 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca
159 00:17:41.951549 makedir: /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin
160 00:17:41.951872 makedir: /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/tests
161 00:17:41.952246 makedir: /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/results
162 00:17:41.952578 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-add-keys
163 00:17:41.953100 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-add-sources
164 00:17:41.953603 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-background-process-start
165 00:17:41.954098 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-background-process-stop
166 00:17:41.954616 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-common-functions
167 00:17:41.955115 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-echo-ipv4
168 00:17:41.955601 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-install-packages
169 00:17:41.956112 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-installed-packages
170 00:17:41.956596 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-os-build
171 00:17:41.957068 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-probe-channel
172 00:17:41.957535 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-probe-ip
173 00:17:41.958020 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-target-ip
174 00:17:41.958526 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-target-mac
175 00:17:41.959005 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-target-storage
176 00:17:41.959482 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-test-case
177 00:17:41.959951 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-test-event
178 00:17:41.960526 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-test-feedback
179 00:17:41.961028 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-test-raise
180 00:17:41.961497 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-test-reference
181 00:17:41.961984 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-test-runner
182 00:17:41.962482 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-test-set
183 00:17:41.962954 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-test-shell
184 00:17:41.963429 Updating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-add-keys (debian)
185 00:17:41.963952 Updating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-add-sources (debian)
186 00:17:41.964543 Updating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-install-packages (debian)
187 00:17:41.965038 Updating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-installed-packages (debian)
188 00:17:41.965517 Updating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/bin/lava-os-build (debian)
189 00:17:41.965937 Creating /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/environment
190 00:17:41.966295 LAVA metadata
191 00:17:41.966551 - LAVA_JOB_ID=968442
192 00:17:41.966767 - LAVA_DISPATCHER_IP=192.168.6.2
193 00:17:41.967118 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 00:17:41.968070 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 00:17:41.968381 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 00:17:41.968588 skipped lava-vland-overlay
197 00:17:41.968827 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 00:17:41.969079 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 00:17:41.969296 skipped lava-multinode-overlay
200 00:17:41.969535 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 00:17:41.969784 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 00:17:41.970027 Loading test definitions
203 00:17:41.970299 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 00:17:41.970516 Using /lava-968442 at stage 0
205 00:17:41.971588 uuid=968442_1.6.2.4.1 testdef=None
206 00:17:41.971889 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 00:17:41.972172 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 00:17:41.973702 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 00:17:41.974483 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 00:17:41.976366 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 00:17:41.977173 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 00:17:41.978946 runner path: /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/0/tests/0_timesync-off test_uuid 968442_1.6.2.4.1
215 00:17:41.979492 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 00:17:41.980332 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 00:17:41.980572 Using /lava-968442 at stage 0
219 00:17:41.980923 Fetching tests from https://github.com/kernelci/test-definitions.git
220 00:17:41.981207 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/0/tests/1_kselftest-rtc'
221 00:17:45.318852 Running '/usr/bin/git checkout kernelci.org
222 00:17:45.606903 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 00:17:45.608386 uuid=968442_1.6.2.4.5 testdef=None
224 00:17:45.608745 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 00:17:45.609516 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 00:17:45.612405 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 00:17:45.613253 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 00:17:45.617083 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 00:17:45.617995 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 00:17:45.621701 runner path: /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/0/tests/1_kselftest-rtc test_uuid 968442_1.6.2.4.5
234 00:17:45.622001 BOARD='meson-g12b-a311d-libretech-cc'
235 00:17:45.622222 BRANCH='mainline'
236 00:17:45.622428 SKIPFILE='/dev/null'
237 00:17:45.622631 SKIP_INSTALL='True'
238 00:17:45.622831 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/clang-15/kselftest.tar.xz'
239 00:17:45.623036 TST_CASENAME=''
240 00:17:45.623236 TST_CMDFILES='rtc'
241 00:17:45.623832 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 00:17:45.624674 Creating lava-test-runner.conf files
244 00:17:45.624890 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/968442/lava-overlay-ao0ov8ca/lava-968442/0 for stage 0
245 00:17:45.625270 - 0_timesync-off
246 00:17:45.625527 - 1_kselftest-rtc
247 00:17:45.625887 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 00:17:45.626188 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 00:18:09.049831 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 00:18:09.050293 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 00:18:09.050592 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 00:18:09.050905 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 00:18:09.051201 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 00:18:09.661225 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 00:18:09.661710 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 00:18:09.661964 extracting modules file /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968442/extract-nfsrootfs-_zd40gn1
257 00:18:11.057841 extracting modules file /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968442/extract-overlay-ramdisk-0bhf9tb6/ramdisk
258 00:18:12.466066 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 00:18:12.466554 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 00:18:12.466831 [common] Applying overlay to NFS
261 00:18:12.467048 [common] Applying overlay /var/lib/lava/dispatcher/tmp/968442/compress-overlay-20o3t3mc/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/968442/extract-nfsrootfs-_zd40gn1
262 00:18:15.197731 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 00:18:15.198210 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 00:18:15.198484 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 00:18:15.198715 Converting downloaded kernel to a uImage
266 00:18:15.199022 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/kernel/Image /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/kernel/uImage
267 00:18:15.615815 output: Image Name:
268 00:18:15.616233 output: Created: Sun Nov 10 00:18:15 2024
269 00:18:15.616447 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 00:18:15.616652 output: Data Size: 37878272 Bytes = 36990.50 KiB = 36.12 MiB
271 00:18:15.616854 output: Load Address: 01080000
272 00:18:15.617054 output: Entry Point: 01080000
273 00:18:15.617254 output:
274 00:18:15.617586 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 00:18:15.617854 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 00:18:15.618121 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 00:18:15.618376 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 00:18:15.618634 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 00:18:15.618889 Building ramdisk /var/lib/lava/dispatcher/tmp/968442/extract-overlay-ramdisk-0bhf9tb6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/968442/extract-overlay-ramdisk-0bhf9tb6/ramdisk
280 00:18:17.956318 >> 173438 blocks
281 00:18:25.640710 Adding RAMdisk u-boot header.
282 00:18:25.641163 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/968442/extract-overlay-ramdisk-0bhf9tb6/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/968442/extract-overlay-ramdisk-0bhf9tb6/ramdisk.cpio.gz.uboot
283 00:18:25.892215 output: Image Name:
284 00:18:25.892899 output: Created: Sun Nov 10 00:18:25 2024
285 00:18:25.893384 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 00:18:25.893833 output: Data Size: 24147583 Bytes = 23581.62 KiB = 23.03 MiB
287 00:18:25.894280 output: Load Address: 00000000
288 00:18:25.894718 output: Entry Point: 00000000
289 00:18:25.895159 output:
290 00:18:25.896379 rename /var/lib/lava/dispatcher/tmp/968442/extract-overlay-ramdisk-0bhf9tb6/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/ramdisk/ramdisk.cpio.gz.uboot
291 00:18:25.897155 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 00:18:25.897747 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 00:18:25.898321 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 00:18:25.898815 No LXC device requested
295 00:18:25.899361 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 00:18:25.899916 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 00:18:25.900506 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 00:18:25.900958 Checking files for TFTP limit of 4294967296 bytes.
299 00:18:25.903872 end: 1 tftp-deploy (duration 00:01:18) [common]
300 00:18:25.904524 start: 2 uboot-action (timeout 00:05:00) [common]
301 00:18:25.905100 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 00:18:25.905641 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 00:18:25.906190 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 00:18:25.906763 Using kernel file from prepare-kernel: 968442/tftp-deploy-hbvjg169/kernel/uImage
305 00:18:25.907444 substitutions:
306 00:18:25.907891 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 00:18:25.908373 - {DTB_ADDR}: 0x01070000
308 00:18:25.908814 - {DTB}: 968442/tftp-deploy-hbvjg169/dtb/meson-g12b-a311d-libretech-cc.dtb
309 00:18:25.909257 - {INITRD}: 968442/tftp-deploy-hbvjg169/ramdisk/ramdisk.cpio.gz.uboot
310 00:18:25.909697 - {KERNEL_ADDR}: 0x01080000
311 00:18:25.910129 - {KERNEL}: 968442/tftp-deploy-hbvjg169/kernel/uImage
312 00:18:25.910563 - {LAVA_MAC}: None
313 00:18:25.911036 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/968442/extract-nfsrootfs-_zd40gn1
314 00:18:25.911473 - {NFS_SERVER_IP}: 192.168.6.2
315 00:18:25.911901 - {PRESEED_CONFIG}: None
316 00:18:25.912374 - {PRESEED_LOCAL}: None
317 00:18:25.912808 - {RAMDISK_ADDR}: 0x08000000
318 00:18:25.913233 - {RAMDISK}: 968442/tftp-deploy-hbvjg169/ramdisk/ramdisk.cpio.gz.uboot
319 00:18:25.913664 - {ROOT_PART}: None
320 00:18:25.914090 - {ROOT}: None
321 00:18:25.914513 - {SERVER_IP}: 192.168.6.2
322 00:18:25.914935 - {TEE_ADDR}: 0x83000000
323 00:18:25.915360 - {TEE}: None
324 00:18:25.915783 Parsed boot commands:
325 00:18:25.916226 - setenv autoload no
326 00:18:25.916654 - setenv initrd_high 0xffffffff
327 00:18:25.917079 - setenv fdt_high 0xffffffff
328 00:18:25.917502 - dhcp
329 00:18:25.917922 - setenv serverip 192.168.6.2
330 00:18:25.918347 - tftpboot 0x01080000 968442/tftp-deploy-hbvjg169/kernel/uImage
331 00:18:25.918775 - tftpboot 0x08000000 968442/tftp-deploy-hbvjg169/ramdisk/ramdisk.cpio.gz.uboot
332 00:18:25.919203 - tftpboot 0x01070000 968442/tftp-deploy-hbvjg169/dtb/meson-g12b-a311d-libretech-cc.dtb
333 00:18:25.919628 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/968442/extract-nfsrootfs-_zd40gn1,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 00:18:25.920122 - bootm 0x01080000 0x08000000 0x01070000
335 00:18:25.920670 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 00:18:25.922297 start: 2.3 connect-device (timeout 00:05:00) [common]
338 00:18:25.922757 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 00:18:25.937835 Setting prompt string to ['lava-test: # ']
340 00:18:25.939450 end: 2.3 connect-device (duration 00:00:00) [common]
341 00:18:25.940179 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 00:18:25.940810 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 00:18:25.941439 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 00:18:25.942678 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 00:18:25.980035 >> OK - accepted request
346 00:18:25.981891 Returned 0 in 0 seconds
347 00:18:26.083044 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 00:18:26.084870 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 00:18:26.085476 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 00:18:26.086021 Setting prompt string to ['Hit any key to stop autoboot']
352 00:18:26.086510 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 00:18:26.088213 Trying 192.168.56.21...
354 00:18:26.088738 Connected to conserv1.
355 00:18:26.089188 Escape character is '^]'.
356 00:18:26.089643
357 00:18:26.090098 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 00:18:26.090559
359 00:18:37.437110 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 00:18:37.437529 bl2_stage_init 0x01
361 00:18:37.437764 bl2_stage_init 0x81
362 00:18:37.442515 hw id: 0x0000 - pwm id 0x01
363 00:18:37.442825 bl2_stage_init 0xc1
364 00:18:37.443047 bl2_stage_init 0x02
365 00:18:37.443251
366 00:18:37.448170 L0:00000000
367 00:18:37.448478 L1:20000703
368 00:18:37.448700 L2:00008067
369 00:18:37.448913 L3:14000000
370 00:18:37.453766 B2:00402000
371 00:18:37.454040 B1:e0f83180
372 00:18:37.454254
373 00:18:37.454456 TE: 58159
374 00:18:37.454655
375 00:18:37.459343 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 00:18:37.459593
377 00:18:37.459795 Board ID = 1
378 00:18:37.464914 Set A53 clk to 24M
379 00:18:37.465156 Set A73 clk to 24M
380 00:18:37.465361 Set clk81 to 24M
381 00:18:37.470445 A53 clk: 1200 MHz
382 00:18:37.470686 A73 clk: 1200 MHz
383 00:18:37.470886 CLK81: 166.6M
384 00:18:37.471082 smccc: 00012ab5
385 00:18:37.476142 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 00:18:37.481723 board id: 1
387 00:18:37.487575 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 00:18:37.498280 fw parse done
389 00:18:37.504278 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 00:18:37.546866 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 00:18:37.557720 PIEI prepare done
392 00:18:37.558021 fastboot data load
393 00:18:37.558242 fastboot data verify
394 00:18:37.563334 verify result: 266
395 00:18:37.569023 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 00:18:37.569332 LPDDR4 probe
397 00:18:37.569557 ddr clk to 1584MHz
398 00:18:37.576878 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 00:18:37.614194
400 00:18:37.614539 dmc_version 0001
401 00:18:37.620915 Check phy result
402 00:18:37.626808 INFO : End of CA training
403 00:18:37.627103 INFO : End of initialization
404 00:18:37.632353 INFO : Training has run successfully!
405 00:18:37.632641 Check phy result
406 00:18:37.637950 INFO : End of initialization
407 00:18:37.638242 INFO : End of read enable training
408 00:18:37.643569 INFO : End of fine write leveling
409 00:18:37.649179 INFO : End of Write leveling coarse delay
410 00:18:37.649474 INFO : Training has run successfully!
411 00:18:37.649687 Check phy result
412 00:18:37.654745 INFO : End of initialization
413 00:18:37.655056 INFO : End of read dq deskew training
414 00:18:37.660360 INFO : End of MPR read delay center optimization
415 00:18:37.665973 INFO : End of write delay center optimization
416 00:18:37.671534 INFO : End of read delay center optimization
417 00:18:37.671792 INFO : End of max read latency training
418 00:18:37.677167 INFO : Training has run successfully!
419 00:18:37.677455 1D training succeed
420 00:18:37.686360 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 00:18:37.733963 Check phy result
422 00:18:37.734268 INFO : End of initialization
423 00:18:37.755680 INFO : End of 2D read delay Voltage center optimization
424 00:18:37.775894 INFO : End of 2D read delay Voltage center optimization
425 00:18:37.828145 INFO : End of 2D write delay Voltage center optimization
426 00:18:37.877433 INFO : End of 2D write delay Voltage center optimization
427 00:18:37.882960 INFO : Training has run successfully!
428 00:18:37.883284
429 00:18:37.883525 channel==0
430 00:18:37.888743 RxClkDly_Margin_A0==88 ps 9
431 00:18:37.889265 TxDqDly_Margin_A0==98 ps 10
432 00:18:37.891945 RxClkDly_Margin_A1==88 ps 9
433 00:18:37.892452 TxDqDly_Margin_A1==98 ps 10
434 00:18:37.897544 TrainedVREFDQ_A0==74
435 00:18:37.898021 TrainedVREFDQ_A1==74
436 00:18:37.898459 VrefDac_Margin_A0==25
437 00:18:37.903027 DeviceVref_Margin_A0==40
438 00:18:37.903493 VrefDac_Margin_A1==25
439 00:18:37.908695 DeviceVref_Margin_A1==40
440 00:18:37.909165
441 00:18:37.909603
442 00:18:37.910036 channel==1
443 00:18:37.910463 RxClkDly_Margin_A0==98 ps 10
444 00:18:37.914225 TxDqDly_Margin_A0==98 ps 10
445 00:18:37.914695 RxClkDly_Margin_A1==98 ps 10
446 00:18:37.919817 TxDqDly_Margin_A1==88 ps 9
447 00:18:37.920318 TrainedVREFDQ_A0==77
448 00:18:37.920758 TrainedVREFDQ_A1==77
449 00:18:37.925516 VrefDac_Margin_A0==22
450 00:18:37.925978 DeviceVref_Margin_A0==37
451 00:18:37.931013 VrefDac_Margin_A1==22
452 00:18:37.931485 DeviceVref_Margin_A1==37
453 00:18:37.931919
454 00:18:37.936615 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 00:18:37.937085
456 00:18:37.964559 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 00:18:37.970149 2D training succeed
458 00:18:37.975773 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 00:18:37.976295 auto size-- 65535DDR cs0 size: 2048MB
460 00:18:37.981385 DDR cs1 size: 2048MB
461 00:18:37.981855 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 00:18:37.986936 cs0 DataBus test pass
463 00:18:37.987411 cs1 DataBus test pass
464 00:18:37.987846 cs0 AddrBus test pass
465 00:18:37.992550 cs1 AddrBus test pass
466 00:18:37.993022
467 00:18:37.993458 100bdlr_step_size ps== 420
468 00:18:37.993901 result report
469 00:18:37.998156 boot times 0Enable ddr reg access
470 00:18:38.005893 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 00:18:38.019519 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 00:18:38.593190 0.0;M3 CHK:0;cm4_sp_mode 0
473 00:18:38.593874 MVN_1=0x00000000
474 00:18:38.598536 MVN_2=0x00000000
475 00:18:38.604334 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 00:18:38.604819 OPS=0x10
477 00:18:38.605263 ring efuse init
478 00:18:38.605699 chipver efuse init
479 00:18:38.609945 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 00:18:38.615582 [0.018961 Inits done]
481 00:18:38.616102 secure task start!
482 00:18:38.616547 high task start!
483 00:18:38.620149 low task start!
484 00:18:38.620634 run into bl31
485 00:18:38.626820 NOTICE: BL31: v1.3(release):4fc40b1
486 00:18:38.634665 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 00:18:38.635162 NOTICE: BL31: G12A normal boot!
488 00:18:38.660059 NOTICE: BL31: BL33 decompress pass
489 00:18:38.665734 ERROR: Error initializing runtime service opteed_fast
490 00:18:39.898681
491 00:18:39.899317
492 00:18:39.907128 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 00:18:39.907642
494 00:18:39.908143 Model: Libre Computer AML-A311D-CC Alta
495 00:18:40.115561 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 00:18:40.138900 DRAM: 2 GiB (effective 3.8 GiB)
497 00:18:40.281841 Core: 408 devices, 31 uclasses, devicetree: separate
498 00:18:40.287709 WDT: Not starting watchdog@f0d0
499 00:18:40.320079 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 00:18:40.332438 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 00:18:40.337413 ** Bad device specification mmc 0 **
502 00:18:40.347815 Card did not respond to voltage select! : -110
503 00:18:40.355404 ** Bad device specification mmc 0 **
504 00:18:40.355891 Couldn't find partition mmc 0
505 00:18:40.363743 Card did not respond to voltage select! : -110
506 00:18:40.369255 ** Bad device specification mmc 0 **
507 00:18:40.369744 Couldn't find partition mmc 0
508 00:18:40.374389 Error: could not access storage.
509 00:18:41.637446 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
510 00:18:41.638130 bl2_stage_init 0x81
511 00:18:41.643057 hw id: 0x0000 - pwm id 0x01
512 00:18:41.643580 bl2_stage_init 0xc1
513 00:18:41.644093 bl2_stage_init 0x02
514 00:18:41.644559
515 00:18:41.648647 L0:00000000
516 00:18:41.649164 L1:20000703
517 00:18:41.649618 L2:00008067
518 00:18:41.650065 L3:14000000
519 00:18:41.650507 B2:00402000
520 00:18:41.654251 B1:e0f83180
521 00:18:41.654731
522 00:18:41.655186 TE: 58150
523 00:18:41.655640
524 00:18:41.659852 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
525 00:18:41.660378
526 00:18:41.660834 Board ID = 1
527 00:18:41.665437 Set A53 clk to 24M
528 00:18:41.665918 Set A73 clk to 24M
529 00:18:41.666371 Set clk81 to 24M
530 00:18:41.671049 A53 clk: 1200 MHz
531 00:18:41.671525 A73 clk: 1200 MHz
532 00:18:41.671976 CLK81: 166.6M
533 00:18:41.672458 smccc: 00012aac
534 00:18:41.676640 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
535 00:18:41.682238 board id: 1
536 00:18:41.688069 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
537 00:18:41.698690 fw parse done
538 00:18:41.704660 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 00:18:41.747338 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
540 00:18:41.758263 PIEI prepare done
541 00:18:41.758751 fastboot data load
542 00:18:41.759210 fastboot data verify
543 00:18:41.763796 verify result: 266
544 00:18:41.769407 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
545 00:18:41.769891 LPDDR4 probe
546 00:18:41.770340 ddr clk to 1584MHz
547 00:18:41.777408 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
548 00:18:41.814632
549 00:18:41.815118 dmc_version 0001
550 00:18:41.821363 Check phy result
551 00:18:41.827285 INFO : End of CA training
552 00:18:41.827760 INFO : End of initialization
553 00:18:41.832794 INFO : Training has run successfully!
554 00:18:41.833270 Check phy result
555 00:18:41.838390 INFO : End of initialization
556 00:18:41.838881 INFO : End of read enable training
557 00:18:41.844050 INFO : End of fine write leveling
558 00:18:41.849581 INFO : End of Write leveling coarse delay
559 00:18:41.850060 INFO : Training has run successfully!
560 00:18:41.850510 Check phy result
561 00:18:41.855280 INFO : End of initialization
562 00:18:41.855758 INFO : End of read dq deskew training
563 00:18:41.860786 INFO : End of MPR read delay center optimization
564 00:18:41.866356 INFO : End of write delay center optimization
565 00:18:41.872048 INFO : End of read delay center optimization
566 00:18:41.872534 INFO : End of max read latency training
567 00:18:41.877582 INFO : Training has run successfully!
568 00:18:41.878060 1D training succeed
569 00:18:41.886765 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
570 00:18:41.934392 Check phy result
571 00:18:41.934888 INFO : End of initialization
572 00:18:41.956916 INFO : End of 2D read delay Voltage center optimization
573 00:18:41.977146 INFO : End of 2D read delay Voltage center optimization
574 00:18:42.029340 INFO : End of 2D write delay Voltage center optimization
575 00:18:42.078579 INFO : End of 2D write delay Voltage center optimization
576 00:18:42.084198 INFO : Training has run successfully!
577 00:18:42.084728
578 00:18:42.085189 channel==0
579 00:18:42.089731 RxClkDly_Margin_A0==88 ps 9
580 00:18:42.090218 TxDqDly_Margin_A0==98 ps 10
581 00:18:42.093067 RxClkDly_Margin_A1==88 ps 9
582 00:18:42.093551 TxDqDly_Margin_A1==98 ps 10
583 00:18:42.098648 TrainedVREFDQ_A0==74
584 00:18:42.099130 TrainedVREFDQ_A1==74
585 00:18:42.099585 VrefDac_Margin_A0==25
586 00:18:42.104311 DeviceVref_Margin_A0==40
587 00:18:42.104796 VrefDac_Margin_A1==25
588 00:18:42.109864 DeviceVref_Margin_A1==40
589 00:18:42.110345
590 00:18:42.110793
591 00:18:42.111241 channel==1
592 00:18:42.111679 RxClkDly_Margin_A0==98 ps 10
593 00:18:42.115452 TxDqDly_Margin_A0==98 ps 10
594 00:18:42.115942 RxClkDly_Margin_A1==98 ps 10
595 00:18:42.121071 TxDqDly_Margin_A1==88 ps 9
596 00:18:42.121557 TrainedVREFDQ_A0==77
597 00:18:42.122010 TrainedVREFDQ_A1==77
598 00:18:42.126639 VrefDac_Margin_A0==22
599 00:18:42.127110 DeviceVref_Margin_A0==37
600 00:18:42.132309 VrefDac_Margin_A1==22
601 00:18:42.132775 DeviceVref_Margin_A1==37
602 00:18:42.133223
603 00:18:42.137836 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
604 00:18:42.138320
605 00:18:42.165864 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000016 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
606 00:18:42.171456 2D training succeed
607 00:18:42.177076 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
608 00:18:42.177569 auto size-- 65535DDR cs0 size: 2048MB
609 00:18:42.182643 DDR cs1 size: 2048MB
610 00:18:42.183139 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
611 00:18:42.188340 cs0 DataBus test pass
612 00:18:42.188822 cs1 DataBus test pass
613 00:18:42.189271 cs0 AddrBus test pass
614 00:18:42.193872 cs1 AddrBus test pass
615 00:18:42.194359
616 00:18:42.194811 100bdlr_step_size ps== 420
617 00:18:42.195265 result report
618 00:18:42.199474 boot times 0Enable ddr reg access
619 00:18:42.207219 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
620 00:18:42.220691 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
621 00:18:42.794688 0.0;M3 CHK:0;cm4_sp_mode 0
622 00:18:42.795367 MVN_1=0x00000000
623 00:18:42.799901 MVN_2=0x00000000
624 00:18:42.805679 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
625 00:18:42.806217 OPS=0x10
626 00:18:42.806680 ring efuse init
627 00:18:42.807160 chipver efuse init
628 00:18:42.813975 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
629 00:18:42.814532 [0.018961 Inits done]
630 00:18:42.814972 secure task start!
631 00:18:42.821501 high task start!
632 00:18:42.821978 low task start!
633 00:18:42.822413 run into bl31
634 00:18:42.828079 NOTICE: BL31: v1.3(release):4fc40b1
635 00:18:42.835887 NOTICE: BL31: Built : 15:58:17, May 22 2019
636 00:18:42.836401 NOTICE: BL31: G12A normal boot!
637 00:18:42.861292 NOTICE: BL31: BL33 decompress pass
638 00:18:42.866956 ERROR: Error initializing runtime service opteed_fast
639 00:18:44.100169
640 00:18:44.100812
641 00:18:44.108437 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
642 00:18:44.108944
643 00:18:44.109407 Model: Libre Computer AML-A311D-CC Alta
644 00:18:44.316913 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
645 00:18:44.340217 DRAM: 2 GiB (effective 3.8 GiB)
646 00:18:44.483367 Core: 408 devices, 31 uclasses, devicetree: separate
647 00:18:44.489078 WDT: Not starting watchdog@f0d0
648 00:18:44.521237 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
649 00:18:44.533757 Loading Environment from FAT... Card did not respond to voltage select! : -110
650 00:18:44.538846 ** Bad device specification mmc 0 **
651 00:18:44.548976 Card did not respond to voltage select! : -110
652 00:18:44.556695 ** Bad device specification mmc 0 **
653 00:18:44.557194 Couldn't find partition mmc 0
654 00:18:44.565001 Card did not respond to voltage select! : -110
655 00:18:44.570571 ** Bad device specification mmc 0 **
656 00:18:44.571077 Couldn't find partition mmc 0
657 00:18:44.575647 Error: could not access storage.
658 00:18:44.918137 Net: eth0: ethernet@ff3f0000
659 00:18:44.918694 starting USB...
660 00:18:45.169996 Bus usb@ff500000: Register 3000140 NbrPorts 3
661 00:18:45.170606 Starting the controller
662 00:18:45.176979 USB XHCI 1.10
663 00:18:46.886121 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
664 00:18:46.886778 bl2_stage_init 0x01
665 00:18:46.887250 bl2_stage_init 0x81
666 00:18:46.891749 hw id: 0x0000 - pwm id 0x01
667 00:18:46.892279 bl2_stage_init 0xc1
668 00:18:46.892742 bl2_stage_init 0x02
669 00:18:46.893199
670 00:18:46.897339 L0:00000000
671 00:18:46.897821 L1:20000703
672 00:18:46.898271 L2:00008067
673 00:18:46.898716 L3:14000000
674 00:18:46.903074 B2:00402000
675 00:18:46.903559 B1:e0f83180
676 00:18:46.904037
677 00:18:46.904494 TE: 58124
678 00:18:46.904944
679 00:18:46.908490 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
680 00:18:46.908985
681 00:18:46.909443 Board ID = 1
682 00:18:46.914169 Set A53 clk to 24M
683 00:18:46.914652 Set A73 clk to 24M
684 00:18:46.915102 Set clk81 to 24M
685 00:18:46.919747 A53 clk: 1200 MHz
686 00:18:46.920260 A73 clk: 1200 MHz
687 00:18:46.920713 CLK81: 166.6M
688 00:18:46.921156 smccc: 00012a91
689 00:18:46.925328 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
690 00:18:46.931053 board id: 1
691 00:18:46.937016 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
692 00:18:46.947363 fw parse done
693 00:18:46.953359 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 00:18:46.996088 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
695 00:18:47.007008 PIEI prepare done
696 00:18:47.007484 fastboot data load
697 00:18:47.007938 fastboot data verify
698 00:18:47.012541 verify result: 266
699 00:18:47.018244 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
700 00:18:47.018733 LPDDR4 probe
701 00:18:47.019184 ddr clk to 1584MHz
702 00:18:47.026236 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
703 00:18:47.063464
704 00:18:47.064021 dmc_version 0001
705 00:18:47.070180 Check phy result
706 00:18:47.075943 INFO : End of CA training
707 00:18:47.076457 INFO : End of initialization
708 00:18:47.081518 INFO : Training has run successfully!
709 00:18:47.081995 Check phy result
710 00:18:47.087085 INFO : End of initialization
711 00:18:47.087564 INFO : End of read enable training
712 00:18:47.090448 INFO : End of fine write leveling
713 00:18:47.096103 INFO : End of Write leveling coarse delay
714 00:18:47.101630 INFO : Training has run successfully!
715 00:18:47.102104 Check phy result
716 00:18:47.102553 INFO : End of initialization
717 00:18:47.107233 INFO : End of read dq deskew training
718 00:18:47.112835 INFO : End of MPR read delay center optimization
719 00:18:47.113319 INFO : End of write delay center optimization
720 00:18:47.118399 INFO : End of read delay center optimization
721 00:18:47.124088 INFO : End of max read latency training
722 00:18:47.124565 INFO : Training has run successfully!
723 00:18:47.129577 1D training succeed
724 00:18:47.135619 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
725 00:18:47.183189 Check phy result
726 00:18:47.183680 INFO : End of initialization
727 00:18:47.204701 INFO : End of 2D read delay Voltage center optimization
728 00:18:47.224831 INFO : End of 2D read delay Voltage center optimization
729 00:18:47.276764 INFO : End of 2D write delay Voltage center optimization
730 00:18:47.325905 INFO : End of 2D write delay Voltage center optimization
731 00:18:47.331557 INFO : Training has run successfully!
732 00:18:47.332083
733 00:18:47.332544 channel==0
734 00:18:47.337175 RxClkDly_Margin_A0==88 ps 9
735 00:18:47.337653 TxDqDly_Margin_A0==98 ps 10
736 00:18:47.340454 RxClkDly_Margin_A1==88 ps 9
737 00:18:47.340929 TxDqDly_Margin_A1==98 ps 10
738 00:18:47.345993 TrainedVREFDQ_A0==74
739 00:18:47.346469 TrainedVREFDQ_A1==74
740 00:18:47.351623 VrefDac_Margin_A0==25
741 00:18:47.352125 DeviceVref_Margin_A0==40
742 00:18:47.352576 VrefDac_Margin_A1==23
743 00:18:47.357174 DeviceVref_Margin_A1==40
744 00:18:47.357653
745 00:18:47.358102
746 00:18:47.358546 channel==1
747 00:18:47.358984 RxClkDly_Margin_A0==98 ps 10
748 00:18:47.362864 TxDqDly_Margin_A0==98 ps 10
749 00:18:47.363346 RxClkDly_Margin_A1==98 ps 10
750 00:18:47.368404 TxDqDly_Margin_A1==88 ps 9
751 00:18:47.368900 TrainedVREFDQ_A0==77
752 00:18:47.369355 TrainedVREFDQ_A1==77
753 00:18:47.374016 VrefDac_Margin_A0==22
754 00:18:47.374498 DeviceVref_Margin_A0==37
755 00:18:47.379532 VrefDac_Margin_A1==22
756 00:18:47.380035 DeviceVref_Margin_A1==37
757 00:18:47.380486
758 00:18:47.385150 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
759 00:18:47.385638
760 00:18:47.413201 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
761 00:18:47.418960 2D training succeed
762 00:18:47.424472 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
763 00:18:47.425022 auto size-- 65535DDR cs0 size: 2048MB
764 00:18:47.430034 DDR cs1 size: 2048MB
765 00:18:47.430566 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
766 00:18:47.435647 cs0 DataBus test pass
767 00:18:47.436221 cs1 DataBus test pass
768 00:18:47.436696 cs0 AddrBus test pass
769 00:18:47.441264 cs1 AddrBus test pass
770 00:18:47.441794
771 00:18:47.442259 100bdlr_step_size ps== 420
772 00:18:47.442723 result report
773 00:18:47.446886 boot times 0Enable ddr reg access
774 00:18:47.454651 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
775 00:18:47.468094 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
776 00:18:48.040254 0.0;M3 CHK:0;cm4_sp_mode 0
777 00:18:48.040934 MVN_1=0x00000000
778 00:18:48.045668 MVN_2=0x00000000
779 00:18:48.051510 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
780 00:18:48.052180 OPS=0x10
781 00:18:48.052639 ring efuse init
782 00:18:48.053076 chipver efuse init
783 00:18:48.059672 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
784 00:18:48.060270 [0.018961 Inits done]
785 00:18:48.060713 secure task start!
786 00:18:48.067158 high task start!
787 00:18:48.067679 low task start!
788 00:18:48.068150 run into bl31
789 00:18:48.073792 NOTICE: BL31: v1.3(release):4fc40b1
790 00:18:48.081711 NOTICE: BL31: Built : 15:58:17, May 22 2019
791 00:18:48.082246 NOTICE: BL31: G12A normal boot!
792 00:18:48.107013 NOTICE: BL31: BL33 decompress pass
793 00:18:48.112740 ERROR: Error initializing runtime service opteed_fast
794 00:18:49.345700
795 00:18:49.346377
796 00:18:49.354046 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
797 00:18:49.354624
798 00:18:49.355097 Model: Libre Computer AML-A311D-CC Alta
799 00:18:49.562403 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
800 00:18:49.585709 DRAM: 2 GiB (effective 3.8 GiB)
801 00:18:49.728744 Core: 408 devices, 31 uclasses, devicetree: separate
802 00:18:49.734772 WDT: Not starting watchdog@f0d0
803 00:18:49.767584 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
804 00:18:49.779430 Loading Environment from FAT... Card did not respond to voltage select! : -110
805 00:18:49.785045 ** Bad device specification mmc 0 **
806 00:18:49.795219 Card did not respond to voltage select! : -110
807 00:18:49.802336 ** Bad device specification mmc 0 **
808 00:18:49.802744 Couldn't find partition mmc 0
809 00:18:49.811242 Card did not respond to voltage select! : -110
810 00:18:49.816343 ** Bad device specification mmc 0 **
811 00:18:49.817974 Couldn't find partition mmc 0
812 00:18:49.821749 Error: could not access storage.
813 00:18:50.163789 Net: eth0: ethernet@ff3f0000
814 00:18:50.164446 starting USB...
815 00:18:50.415512 Bus usb@ff500000: Register 3000140 NbrPorts 3
816 00:18:50.416123 Starting the controller
817 00:18:50.422550 USB XHCI 1.10
818 00:18:52.586282 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
819 00:18:52.586707 bl2_stage_init 0x01
820 00:18:52.586936 bl2_stage_init 0x81
821 00:18:52.591789 hw id: 0x0000 - pwm id 0x01
822 00:18:52.592109 bl2_stage_init 0xc1
823 00:18:52.592337 bl2_stage_init 0x02
824 00:18:52.592551
825 00:18:52.597292 L0:00000000
826 00:18:52.597565 L1:20000703
827 00:18:52.597782 L2:00008067
828 00:18:52.597992 L3:14000000
829 00:18:52.602972 B2:00402000
830 00:18:52.603453 B1:e0f83180
831 00:18:52.603888
832 00:18:52.604341 TE: 58124
833 00:18:52.604753
834 00:18:52.608659 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 00:18:52.609203
836 00:18:52.609671 Board ID = 1
837 00:18:52.614141 Set A53 clk to 24M
838 00:18:52.614662 Set A73 clk to 24M
839 00:18:52.615113 Set clk81 to 24M
840 00:18:52.619942 A53 clk: 1200 MHz
841 00:18:52.620496 A73 clk: 1200 MHz
842 00:18:52.620954 CLK81: 166.6M
843 00:18:52.621400 smccc: 00012a92
844 00:18:52.625356 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 00:18:52.631064 board id: 1
846 00:18:52.637007 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 00:18:52.647557 fw parse done
848 00:18:52.653550 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 00:18:52.696077 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 00:18:52.706967 PIEI prepare done
851 00:18:52.707492 fastboot data load
852 00:18:52.707957 fastboot data verify
853 00:18:52.712662 verify result: 266
854 00:18:52.718260 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 00:18:52.718787 LPDDR4 probe
856 00:18:52.719248 ddr clk to 1584MHz
857 00:18:52.726242 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 00:18:52.763521
859 00:18:52.764106 dmc_version 0001
860 00:18:52.770180 Check phy result
861 00:18:52.776085 INFO : End of CA training
862 00:18:52.776611 INFO : End of initialization
863 00:18:52.781684 INFO : Training has run successfully!
864 00:18:52.782200 Check phy result
865 00:18:52.787220 INFO : End of initialization
866 00:18:52.787738 INFO : End of read enable training
867 00:18:52.792990 INFO : End of fine write leveling
868 00:18:52.798435 INFO : End of Write leveling coarse delay
869 00:18:52.798946 INFO : Training has run successfully!
870 00:18:52.799400 Check phy result
871 00:18:52.804028 INFO : End of initialization
872 00:18:52.804547 INFO : End of read dq deskew training
873 00:18:52.809691 INFO : End of MPR read delay center optimization
874 00:18:52.815223 INFO : End of write delay center optimization
875 00:18:52.820988 INFO : End of read delay center optimization
876 00:18:52.821505 INFO : End of max read latency training
877 00:18:52.826505 INFO : Training has run successfully!
878 00:18:52.827019 1D training succeed
879 00:18:52.835659 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 00:18:52.883282 Check phy result
881 00:18:52.883811 INFO : End of initialization
882 00:18:52.904841 INFO : End of 2D read delay Voltage center optimization
883 00:18:52.925098 INFO : End of 2D read delay Voltage center optimization
884 00:18:52.976892 INFO : End of 2D write delay Voltage center optimization
885 00:18:53.026156 INFO : End of 2D write delay Voltage center optimization
886 00:18:53.031893 INFO : Training has run successfully!
887 00:18:53.032509
888 00:18:53.032996 channel==0
889 00:18:53.037436 RxClkDly_Margin_A0==88 ps 9
890 00:18:53.037979 TxDqDly_Margin_A0==98 ps 10
891 00:18:53.040709 RxClkDly_Margin_A1==88 ps 9
892 00:18:53.041277 TxDqDly_Margin_A1==98 ps 10
893 00:18:53.046282 TrainedVREFDQ_A0==74
894 00:18:53.046855 TrainedVREFDQ_A1==74
895 00:18:53.051710 VrefDac_Margin_A0==25
896 00:18:53.052226 DeviceVref_Margin_A0==40
897 00:18:53.052667 VrefDac_Margin_A1==24
898 00:18:53.057298 DeviceVref_Margin_A1==40
899 00:18:53.057775
900 00:18:53.058216
901 00:18:53.058647 channel==1
902 00:18:53.059069 RxClkDly_Margin_A0==98 ps 10
903 00:18:53.062941 TxDqDly_Margin_A0==98 ps 10
904 00:18:53.063420 RxClkDly_Margin_A1==98 ps 10
905 00:18:53.068485 TxDqDly_Margin_A1==88 ps 9
906 00:18:53.068960 TrainedVREFDQ_A0==77
907 00:18:53.069394 TrainedVREFDQ_A1==77
908 00:18:53.074087 VrefDac_Margin_A0==22
909 00:18:53.074622 DeviceVref_Margin_A0==37
910 00:18:53.079707 VrefDac_Margin_A1==22
911 00:18:53.080222 DeviceVref_Margin_A1==37
912 00:18:53.080652
913 00:18:53.085277 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 00:18:53.085759
915 00:18:53.113308 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
916 00:18:53.118865 2D training succeed
917 00:18:53.124445 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 00:18:53.124922 auto size-- 65535DDR cs0 size: 2048MB
919 00:18:53.130045 DDR cs1 size: 2048MB
920 00:18:53.130522 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 00:18:53.135587 cs0 DataBus test pass
922 00:18:53.136100 cs1 DataBus test pass
923 00:18:53.136533 cs0 AddrBus test pass
924 00:18:53.141134 cs1 AddrBus test pass
925 00:18:53.141606
926 00:18:53.142039 100bdlr_step_size ps== 420
927 00:18:53.142479 result report
928 00:18:53.146826 boot times 0Enable ddr reg access
929 00:18:53.154537 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 00:18:53.168042 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 00:18:53.740193 0.0;M3 CHK:0;cm4_sp_mode 0
932 00:18:53.740882 MVN_1=0x00000000
933 00:18:53.745506 MVN_2=0x00000000
934 00:18:53.751301 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 00:18:53.751834 OPS=0x10
936 00:18:53.752464 ring efuse init
937 00:18:53.752930 chipver efuse init
938 00:18:53.756846 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 00:18:53.762441 [0.018960 Inits done]
940 00:18:53.763030 secure task start!
941 00:18:53.763580 high task start!
942 00:18:53.767025 low task start!
943 00:18:53.767536 run into bl31
944 00:18:53.773804 NOTICE: BL31: v1.3(release):4fc40b1
945 00:18:53.781734 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 00:18:53.782404 NOTICE: BL31: G12A normal boot!
947 00:18:53.806955 NOTICE: BL31: BL33 decompress pass
948 00:18:53.812605 ERROR: Error initializing runtime service opteed_fast
949 00:18:55.045655
950 00:18:55.046500
951 00:18:55.054029 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 00:18:55.054787
953 00:18:55.055370 Model: Libre Computer AML-A311D-CC Alta
954 00:18:55.262489 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 00:18:55.285733 DRAM: 2 GiB (effective 3.8 GiB)
956 00:18:55.428849 Core: 408 devices, 31 uclasses, devicetree: separate
957 00:18:55.434539 WDT: Not starting watchdog@f0d0
958 00:18:55.466921 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 00:18:55.479281 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 00:18:55.484252 ** Bad device specification mmc 0 **
961 00:18:55.494614 Card did not respond to voltage select! : -110
962 00:18:55.502315 ** Bad device specification mmc 0 **
963 00:18:55.502916 Couldn't find partition mmc 0
964 00:18:55.510657 Card did not respond to voltage select! : -110
965 00:18:55.516159 ** Bad device specification mmc 0 **
966 00:18:55.516671 Couldn't find partition mmc 0
967 00:18:55.521197 Error: could not access storage.
968 00:18:55.864791 Net: eth0: ethernet@ff3f0000
969 00:18:55.865442 starting USB...
970 00:18:56.116698 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 00:18:56.117329 Starting the controller
972 00:18:56.123519 USB XHCI 1.10
973 00:18:57.677689 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
974 00:18:57.684869 scanning usb for storage devices... 0 Storage Device(s) found
976 00:18:57.736518 Hit any key to stop autoboot: 1
977 00:18:57.737433 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
978 00:18:57.738078 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
979 00:18:57.738603 Setting prompt string to ['=>']
980 00:18:57.739132 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
981 00:18:57.743379 0
982 00:18:57.744289 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
983 00:18:57.744841 Sending with 10 millisecond of delay
985 00:18:58.879777 => setenv autoload no
986 00:18:58.890659 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
987 00:18:58.896211 setenv autoload no
988 00:18:58.896995 Sending with 10 millisecond of delay
990 00:19:00.695803 => setenv initrd_high 0xffffffff
991 00:19:00.706655 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
992 00:19:00.707583 setenv initrd_high 0xffffffff
993 00:19:00.708373 Sending with 10 millisecond of delay
995 00:19:02.325052 => setenv fdt_high 0xffffffff
996 00:19:02.336461 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
997 00:19:02.338097 setenv fdt_high 0xffffffff
998 00:19:02.339313 Sending with 10 millisecond of delay
1000 00:19:02.632188 => dhcp
1001 00:19:02.643642 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1002 00:19:02.645214 dhcp
1003 00:19:02.646126 Speed: 1000, full duplex
1004 00:19:02.646948 BOOTP broadcast 1
1005 00:19:02.655767 DHCP client bound to address 192.168.6.27 (12 ms)
1006 00:19:02.657797 Sending with 10 millisecond of delay
1008 00:19:04.336168 => setenv serverip 192.168.6.2
1009 00:19:04.347104 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1010 00:19:04.348170 setenv serverip 192.168.6.2
1011 00:19:04.348936 Sending with 10 millisecond of delay
1013 00:19:08.073901 => tftpboot 0x01080000 968442/tftp-deploy-hbvjg169/kernel/uImage
1014 00:19:08.084727 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1015 00:19:08.085636 tftpboot 0x01080000 968442/tftp-deploy-hbvjg169/kernel/uImage
1016 00:19:08.086123 Speed: 1000, full duplex
1017 00:19:08.086578 Using ethernet@ff3f0000 device
1018 00:19:08.087544 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1019 00:19:08.093121 Filename '968442/tftp-deploy-hbvjg169/kernel/uImage'.
1020 00:19:08.096965 Load address: 0x1080000
1021 00:19:10.515219 Loading: *################################################## 36.1 MiB
1022 00:19:10.515901 14.9 MiB/s
1023 00:19:10.516439 done
1024 00:19:10.519756 Bytes transferred = 37878336 (241fa40 hex)
1025 00:19:10.520655 Sending with 10 millisecond of delay
1027 00:19:15.209128 => tftpboot 0x08000000 968442/tftp-deploy-hbvjg169/ramdisk/ramdisk.cpio.gz.uboot
1028 00:19:15.219949 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1029 00:19:15.220836 tftpboot 0x08000000 968442/tftp-deploy-hbvjg169/ramdisk/ramdisk.cpio.gz.uboot
1030 00:19:15.221323 Speed: 1000, full duplex
1031 00:19:15.221779 Using ethernet@ff3f0000 device
1032 00:19:15.222794 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1033 00:19:15.234632 Filename '968442/tftp-deploy-hbvjg169/ramdisk/ramdisk.cpio.gz.uboot'.
1034 00:19:15.235185 Load address: 0x8000000
1035 00:19:22.198879 Loading: *T ################################################# UDP wrong checksum 00000005 0000b1b6
1036 00:19:27.199159 T UDP wrong checksum 00000005 0000b1b6
1037 00:19:37.201887 T T UDP wrong checksum 00000005 0000b1b6
1038 00:19:57.206696 T T T T UDP wrong checksum 00000005 0000b1b6
1039 00:20:11.268601 T T UDP wrong checksum 000000ff 00006a06
1040 00:20:11.276418 UDP wrong checksum 000000ff 0000f6f8
1041 00:20:12.209656
1042 00:20:12.210254 Retry count exceeded; starting again
1044 00:20:12.211652 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1047 00:20:12.213537 end: 2.4 uboot-commands (duration 00:01:46) [common]
1049 00:20:12.214902 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1051 00:20:12.215953 end: 2 uboot-action (duration 00:01:46) [common]
1053 00:20:12.217552 Cleaning after the job
1054 00:20:12.218111 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/ramdisk
1055 00:20:12.219435 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/kernel
1056 00:20:12.242525 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/dtb
1057 00:20:12.243846 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/nfsrootfs
1058 00:20:12.291648 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968442/tftp-deploy-hbvjg169/modules
1059 00:20:12.299366 start: 4.1 power-off (timeout 00:00:30) [common]
1060 00:20:12.300023 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1061 00:20:12.334178 >> OK - accepted request
1062 00:20:12.336184 Returned 0 in 0 seconds
1063 00:20:12.437082 end: 4.1 power-off (duration 00:00:00) [common]
1065 00:20:12.438298 start: 4.2 read-feedback (timeout 00:10:00) [common]
1066 00:20:12.439042 Listened to connection for namespace 'common' for up to 1s
1067 00:20:13.440036 Finalising connection for namespace 'common'
1068 00:20:13.440538 Disconnecting from shell: Finalise
1069 00:20:13.440839 =>
1070 00:20:13.541712 end: 4.2 read-feedback (duration 00:00:01) [common]
1071 00:20:13.542449 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/968442
1072 00:20:16.572055 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/968442
1073 00:20:16.572657 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.