Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:02:05.519903 lava-dispatcher, installed at version: 2024.01
2 23:02:05.520750 start: 0 validate
3 23:02:05.521225 Start time: 2024-11-09 23:02:05.521194+00:00 (UTC)
4 23:02:05.521779 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:02:05.522321 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:02:05.561862 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:02:05.562418 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 23:02:05.592591 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:02:05.593217 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 23:02:11.669539 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:02:11.670056 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:02:11.701766 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:02:11.702257 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 23:02:13.757395 validate duration: 8.24
16 23:02:13.759030 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:02:13.759698 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:02:13.760395 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:02:13.761429 Not decompressing ramdisk as can be used compressed.
20 23:02:13.762260 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 23:02:13.762824 saving as /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/ramdisk/initrd.cpio.gz
22 23:02:13.763379 total size: 5628140 (5 MB)
23 23:02:13.805673 progress 0 % (0 MB)
24 23:02:13.814148 progress 5 % (0 MB)
25 23:02:13.822872 progress 10 % (0 MB)
26 23:02:13.830623 progress 15 % (0 MB)
27 23:02:13.839048 progress 20 % (1 MB)
28 23:02:13.846551 progress 25 % (1 MB)
29 23:02:13.853272 progress 30 % (1 MB)
30 23:02:13.857412 progress 35 % (1 MB)
31 23:02:13.861036 progress 40 % (2 MB)
32 23:02:13.865066 progress 45 % (2 MB)
33 23:02:13.868760 progress 50 % (2 MB)
34 23:02:13.872813 progress 55 % (2 MB)
35 23:02:13.876836 progress 60 % (3 MB)
36 23:02:13.880481 progress 65 % (3 MB)
37 23:02:13.884491 progress 70 % (3 MB)
38 23:02:13.888112 progress 75 % (4 MB)
39 23:02:13.892137 progress 80 % (4 MB)
40 23:02:13.895723 progress 85 % (4 MB)
41 23:02:13.899766 progress 90 % (4 MB)
42 23:02:13.903697 progress 95 % (5 MB)
43 23:02:13.906989 progress 100 % (5 MB)
44 23:02:13.907657 5 MB downloaded in 0.14 s (37.20 MB/s)
45 23:02:13.908239 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:02:13.909159 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:02:13.909474 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:02:13.909762 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:02:13.910249 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/gcc-12/kernel/Image
51 23:02:13.910504 saving as /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/kernel/Image
52 23:02:13.910725 total size: 45713920 (43 MB)
53 23:02:13.910947 No compression specified
54 23:02:13.946985 progress 0 % (0 MB)
55 23:02:13.975216 progress 5 % (2 MB)
56 23:02:14.003494 progress 10 % (4 MB)
57 23:02:14.030847 progress 15 % (6 MB)
58 23:02:14.057911 progress 20 % (8 MB)
59 23:02:14.085043 progress 25 % (10 MB)
60 23:02:14.112561 progress 30 % (13 MB)
61 23:02:14.139974 progress 35 % (15 MB)
62 23:02:14.167818 progress 40 % (17 MB)
63 23:02:14.194891 progress 45 % (19 MB)
64 23:02:14.222279 progress 50 % (21 MB)
65 23:02:14.249500 progress 55 % (24 MB)
66 23:02:14.276918 progress 60 % (26 MB)
67 23:02:14.305110 progress 65 % (28 MB)
68 23:02:14.332332 progress 70 % (30 MB)
69 23:02:14.360124 progress 75 % (32 MB)
70 23:02:14.388282 progress 80 % (34 MB)
71 23:02:14.415467 progress 85 % (37 MB)
72 23:02:14.442758 progress 90 % (39 MB)
73 23:02:14.470264 progress 95 % (41 MB)
74 23:02:14.497510 progress 100 % (43 MB)
75 23:02:14.498084 43 MB downloaded in 0.59 s (74.23 MB/s)
76 23:02:14.498576 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:02:14.499393 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:02:14.499671 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:02:14.499943 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:02:14.500510 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 23:02:14.500786 saving as /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/dtb/meson-g12b-a311d-libretech-cc.dtb
83 23:02:14.500994 total size: 54703 (0 MB)
84 23:02:14.501204 No compression specified
85 23:02:14.534568 progress 59 % (0 MB)
86 23:02:14.535497 progress 100 % (0 MB)
87 23:02:14.536086 0 MB downloaded in 0.04 s (1.49 MB/s)
88 23:02:14.536592 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:02:14.537412 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:02:14.537677 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:02:14.537942 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:02:14.538454 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 23:02:14.538751 saving as /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/nfsrootfs/full.rootfs.tar
95 23:02:14.538986 total size: 474398908 (452 MB)
96 23:02:14.539202 Using unxz to decompress xz
97 23:02:14.574484 progress 0 % (0 MB)
98 23:02:15.666327 progress 5 % (22 MB)
99 23:02:17.111648 progress 10 % (45 MB)
100 23:02:17.554993 progress 15 % (67 MB)
101 23:02:18.331605 progress 20 % (90 MB)
102 23:02:18.850811 progress 25 % (113 MB)
103 23:02:19.207524 progress 30 % (135 MB)
104 23:02:19.813464 progress 35 % (158 MB)
105 23:02:20.754488 progress 40 % (181 MB)
106 23:02:21.569921 progress 45 % (203 MB)
107 23:02:22.138562 progress 50 % (226 MB)
108 23:02:22.775258 progress 55 % (248 MB)
109 23:02:23.991787 progress 60 % (271 MB)
110 23:02:25.494104 progress 65 % (294 MB)
111 23:02:27.081001 progress 70 % (316 MB)
112 23:02:30.312866 progress 75 % (339 MB)
113 23:02:32.753825 progress 80 % (361 MB)
114 23:02:35.657083 progress 85 % (384 MB)
115 23:02:38.945128 progress 90 % (407 MB)
116 23:02:42.147939 progress 95 % (429 MB)
117 23:02:45.357951 progress 100 % (452 MB)
118 23:02:45.370972 452 MB downloaded in 30.83 s (14.67 MB/s)
119 23:02:45.371665 end: 1.4.1 http-download (duration 00:00:31) [common]
121 23:02:45.373544 end: 1.4 download-retry (duration 00:00:31) [common]
122 23:02:45.374220 start: 1.5 download-retry (timeout 00:09:28) [common]
123 23:02:45.374869 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 23:02:45.375951 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/gcc-12/modules.tar.xz
125 23:02:45.376609 saving as /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/modules/modules.tar
126 23:02:45.377123 total size: 11611856 (11 MB)
127 23:02:45.377649 Using unxz to decompress xz
128 23:02:45.425006 progress 0 % (0 MB)
129 23:02:45.494500 progress 5 % (0 MB)
130 23:02:45.569507 progress 10 % (1 MB)
131 23:02:45.665946 progress 15 % (1 MB)
132 23:02:45.758535 progress 20 % (2 MB)
133 23:02:45.838309 progress 25 % (2 MB)
134 23:02:45.914449 progress 30 % (3 MB)
135 23:02:45.993615 progress 35 % (3 MB)
136 23:02:46.067289 progress 40 % (4 MB)
137 23:02:46.143765 progress 45 % (5 MB)
138 23:02:46.228843 progress 50 % (5 MB)
139 23:02:46.307167 progress 55 % (6 MB)
140 23:02:46.392953 progress 60 % (6 MB)
141 23:02:46.475642 progress 65 % (7 MB)
142 23:02:46.558419 progress 70 % (7 MB)
143 23:02:46.637801 progress 75 % (8 MB)
144 23:02:46.722547 progress 80 % (8 MB)
145 23:02:46.803941 progress 85 % (9 MB)
146 23:02:46.884342 progress 90 % (9 MB)
147 23:02:46.962936 progress 95 % (10 MB)
148 23:02:47.040714 progress 100 % (11 MB)
149 23:02:47.052343 11 MB downloaded in 1.68 s (6.61 MB/s)
150 23:02:47.052977 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:02:47.053847 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:02:47.054120 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 23:02:47.054388 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 23:03:03.081983 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/968201/extract-nfsrootfs-amc0e2xa
156 23:03:03.082578 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 23:03:03.082866 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 23:03:03.083601 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl
159 23:03:03.084083 makedir: /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin
160 23:03:03.084428 makedir: /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/tests
161 23:03:03.084774 makedir: /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/results
162 23:03:03.085115 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-add-keys
163 23:03:03.085637 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-add-sources
164 23:03:03.086145 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-background-process-start
165 23:03:03.086640 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-background-process-stop
166 23:03:03.087167 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-common-functions
167 23:03:03.087670 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-echo-ipv4
168 23:03:03.088233 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-install-packages
169 23:03:03.088743 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-installed-packages
170 23:03:03.089247 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-os-build
171 23:03:03.089730 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-probe-channel
172 23:03:03.090230 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-probe-ip
173 23:03:03.090714 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-target-ip
174 23:03:03.091264 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-target-mac
175 23:03:03.091760 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-target-storage
176 23:03:03.092283 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-test-case
177 23:03:03.092783 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-test-event
178 23:03:03.093267 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-test-feedback
179 23:03:03.093748 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-test-raise
180 23:03:03.094232 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-test-reference
181 23:03:03.094729 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-test-runner
182 23:03:03.095214 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-test-set
183 23:03:03.095692 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-test-shell
184 23:03:03.096210 Updating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-install-packages (oe)
185 23:03:03.096777 Updating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/bin/lava-installed-packages (oe)
186 23:03:03.097236 Creating /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/environment
187 23:03:03.097608 LAVA metadata
188 23:03:03.097869 - LAVA_JOB_ID=968201
189 23:03:03.098086 - LAVA_DISPATCHER_IP=192.168.6.2
190 23:03:03.098460 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 23:03:03.099436 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 23:03:03.099766 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 23:03:03.099973 skipped lava-vland-overlay
194 23:03:03.100258 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 23:03:03.100515 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 23:03:03.100736 skipped lava-multinode-overlay
197 23:03:03.100978 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 23:03:03.101228 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 23:03:03.101479 Loading test definitions
200 23:03:03.101759 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 23:03:03.101981 Using /lava-968201 at stage 0
202 23:03:03.103233 uuid=968201_1.6.2.4.1 testdef=None
203 23:03:03.103551 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 23:03:03.103815 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 23:03:03.105727 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 23:03:03.106525 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 23:03:03.108787 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 23:03:03.109637 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 23:03:03.111732 runner path: /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 968201_1.6.2.4.1
212 23:03:03.112349 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 23:03:03.113105 Creating lava-test-runner.conf files
215 23:03:03.113307 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/968201/lava-overlay-f46z_8nl/lava-968201/0 for stage 0
216 23:03:03.113645 - 0_v4l2-decoder-conformance-h264
217 23:03:03.113987 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 23:03:03.114263 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 23:03:03.136142 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 23:03:03.136583 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 23:03:03.136845 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 23:03:03.137119 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 23:03:03.137383 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 23:03:03.770286 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 23:03:03.770745 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 23:03:03.770995 extracting modules file /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968201/extract-nfsrootfs-amc0e2xa
227 23:03:05.278947 extracting modules file /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968201/extract-overlay-ramdisk-2byt9izr/ramdisk
228 23:03:06.843962 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 23:03:06.844459 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 23:03:06.844737 [common] Applying overlay to NFS
231 23:03:06.844950 [common] Applying overlay /var/lib/lava/dispatcher/tmp/968201/compress-overlay-39dsr9hb/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/968201/extract-nfsrootfs-amc0e2xa
232 23:03:06.875016 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 23:03:06.875442 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 23:03:06.875750 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 23:03:06.876010 Converting downloaded kernel to a uImage
236 23:03:06.876363 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/kernel/Image /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/kernel/uImage
237 23:03:07.369566 output: Image Name:
238 23:03:07.369994 output: Created: Sat Nov 9 23:03:06 2024
239 23:03:07.370227 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 23:03:07.370456 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 23:03:07.370672 output: Load Address: 01080000
242 23:03:07.370880 output: Entry Point: 01080000
243 23:03:07.371084 output:
244 23:03:07.371428 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 23:03:07.371706 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 23:03:07.372020 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 23:03:07.372300 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 23:03:07.372574 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 23:03:07.372838 Building ramdisk /var/lib/lava/dispatcher/tmp/968201/extract-overlay-ramdisk-2byt9izr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/968201/extract-overlay-ramdisk-2byt9izr/ramdisk
250 23:03:09.572606 >> 166827 blocks
251 23:03:17.428617 Adding RAMdisk u-boot header.
252 23:03:17.429250 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/968201/extract-overlay-ramdisk-2byt9izr/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/968201/extract-overlay-ramdisk-2byt9izr/ramdisk.cpio.gz.uboot
253 23:03:17.695085 output: Image Name:
254 23:03:17.695574 output: Created: Sat Nov 9 23:03:17 2024
255 23:03:17.695831 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 23:03:17.696303 output: Data Size: 23434359 Bytes = 22885.12 KiB = 22.35 MiB
257 23:03:17.696838 output: Load Address: 00000000
258 23:03:17.697368 output: Entry Point: 00000000
259 23:03:17.697885 output:
260 23:03:17.699146 rename /var/lib/lava/dispatcher/tmp/968201/extract-overlay-ramdisk-2byt9izr/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/ramdisk/ramdisk.cpio.gz.uboot
261 23:03:17.700078 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 23:03:17.700796 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 23:03:17.701516 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 23:03:17.702110 No LXC device requested
265 23:03:17.702763 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 23:03:17.703415 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 23:03:17.704089 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 23:03:17.704635 Checking files for TFTP limit of 4294967296 bytes.
269 23:03:17.708186 end: 1 tftp-deploy (duration 00:01:04) [common]
270 23:03:17.708941 start: 2 uboot-action (timeout 00:05:00) [common]
271 23:03:17.709619 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 23:03:17.710258 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 23:03:17.710899 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 23:03:17.711579 Using kernel file from prepare-kernel: 968201/tftp-deploy-ee38lnh1/kernel/uImage
275 23:03:17.712420 substitutions:
276 23:03:17.712965 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 23:03:17.713499 - {DTB_ADDR}: 0x01070000
278 23:03:17.714018 - {DTB}: 968201/tftp-deploy-ee38lnh1/dtb/meson-g12b-a311d-libretech-cc.dtb
279 23:03:17.714547 - {INITRD}: 968201/tftp-deploy-ee38lnh1/ramdisk/ramdisk.cpio.gz.uboot
280 23:03:17.715063 - {KERNEL_ADDR}: 0x01080000
281 23:03:17.715570 - {KERNEL}: 968201/tftp-deploy-ee38lnh1/kernel/uImage
282 23:03:17.716163 - {LAVA_MAC}: None
283 23:03:17.716745 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/968201/extract-nfsrootfs-amc0e2xa
284 23:03:17.717261 - {NFS_SERVER_IP}: 192.168.6.2
285 23:03:17.717768 - {PRESEED_CONFIG}: None
286 23:03:17.718273 - {PRESEED_LOCAL}: None
287 23:03:17.718775 - {RAMDISK_ADDR}: 0x08000000
288 23:03:17.719277 - {RAMDISK}: 968201/tftp-deploy-ee38lnh1/ramdisk/ramdisk.cpio.gz.uboot
289 23:03:17.719780 - {ROOT_PART}: None
290 23:03:17.720325 - {ROOT}: None
291 23:03:17.720845 - {SERVER_IP}: 192.168.6.2
292 23:03:17.721358 - {TEE_ADDR}: 0x83000000
293 23:03:17.721866 - {TEE}: None
294 23:03:17.722381 Parsed boot commands:
295 23:03:17.722876 - setenv autoload no
296 23:03:17.723390 - setenv initrd_high 0xffffffff
297 23:03:17.723897 - setenv fdt_high 0xffffffff
298 23:03:17.724445 - dhcp
299 23:03:17.724952 - setenv serverip 192.168.6.2
300 23:03:17.725460 - tftpboot 0x01080000 968201/tftp-deploy-ee38lnh1/kernel/uImage
301 23:03:17.725968 - tftpboot 0x08000000 968201/tftp-deploy-ee38lnh1/ramdisk/ramdisk.cpio.gz.uboot
302 23:03:17.726480 - tftpboot 0x01070000 968201/tftp-deploy-ee38lnh1/dtb/meson-g12b-a311d-libretech-cc.dtb
303 23:03:17.726987 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/968201/extract-nfsrootfs-amc0e2xa,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 23:03:17.727548 - bootm 0x01080000 0x08000000 0x01070000
305 23:03:17.728601 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 23:03:17.730651 start: 2.3 connect-device (timeout 00:05:00) [common]
308 23:03:17.731232 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 23:03:17.747366 Setting prompt string to ['lava-test: # ']
310 23:03:17.749203 end: 2.3 connect-device (duration 00:00:00) [common]
311 23:03:17.749969 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 23:03:17.750733 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 23:03:17.751491 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 23:03:17.752941 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 23:03:17.790844 >> OK - accepted request
316 23:03:17.792956 Returned 0 in 0 seconds
317 23:03:17.894308 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 23:03:17.896418 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 23:03:17.897135 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 23:03:17.897803 Setting prompt string to ['Hit any key to stop autoboot']
322 23:03:17.898392 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 23:03:17.900394 Trying 192.168.56.21...
324 23:03:17.901023 Connected to conserv1.
325 23:03:17.901572 Escape character is '^]'.
326 23:03:17.902105
327 23:03:17.902648 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 23:03:17.903191
329 23:03:29.295893 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 23:03:29.296682 bl2_stage_init 0x01
331 23:03:29.297220 bl2_stage_init 0x81
332 23:03:29.301434 hw id: 0x0000 - pwm id 0x01
333 23:03:29.301995 bl2_stage_init 0xc1
334 23:03:29.302503 bl2_stage_init 0x02
335 23:03:29.303004
336 23:03:29.307014 L0:00000000
337 23:03:29.307556 L1:20000703
338 23:03:29.308262 L2:00008067
339 23:03:29.308790 L3:14000000
340 23:03:29.312599 B2:00402000
341 23:03:29.313169 B1:e0f83180
342 23:03:29.313685
343 23:03:29.314443 TE: 58124
344 23:03:29.314969
345 23:03:29.318188 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 23:03:29.318733
347 23:03:29.319241 Board ID = 1
348 23:03:29.323782 Set A53 clk to 24M
349 23:03:29.324345 Set A73 clk to 24M
350 23:03:29.324862 Set clk81 to 24M
351 23:03:29.329403 A53 clk: 1200 MHz
352 23:03:29.329945 A73 clk: 1200 MHz
353 23:03:29.330446 CLK81: 166.6M
354 23:03:29.330942 smccc: 00012a92
355 23:03:29.335011 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 23:03:29.340580 board id: 1
357 23:03:29.346463 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 23:03:29.357141 fw parse done
359 23:03:29.363080 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 23:03:29.405808 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 23:03:29.416733 PIEI prepare done
362 23:03:29.417302 fastboot data load
363 23:03:29.417814 fastboot data verify
364 23:03:29.422295 verify result: 266
365 23:03:29.427905 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 23:03:29.428491 LPDDR4 probe
367 23:03:29.429004 ddr clk to 1584MHz
368 23:03:29.435858 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 23:03:29.473110
370 23:03:29.473677 dmc_version 0001
371 23:03:29.479800 Check phy result
372 23:03:29.485660 INFO : End of CA training
373 23:03:29.486198 INFO : End of initialization
374 23:03:29.491351 INFO : Training has run successfully!
375 23:03:29.491886 Check phy result
376 23:03:29.496871 INFO : End of initialization
377 23:03:29.497405 INFO : End of read enable training
378 23:03:29.502493 INFO : End of fine write leveling
379 23:03:29.508139 INFO : End of Write leveling coarse delay
380 23:03:29.508693 INFO : Training has run successfully!
381 23:03:29.509199 Check phy result
382 23:03:29.513670 INFO : End of initialization
383 23:03:29.514208 INFO : End of read dq deskew training
384 23:03:29.519275 INFO : End of MPR read delay center optimization
385 23:03:29.524878 INFO : End of write delay center optimization
386 23:03:29.530489 INFO : End of read delay center optimization
387 23:03:29.531033 INFO : End of max read latency training
388 23:03:29.536134 INFO : Training has run successfully!
389 23:03:29.536676 1D training succeed
390 23:03:29.545307 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 23:03:29.592846 Check phy result
392 23:03:29.593445 INFO : End of initialization
393 23:03:29.614628 INFO : End of 2D read delay Voltage center optimization
394 23:03:29.634836 INFO : End of 2D read delay Voltage center optimization
395 23:03:29.686924 INFO : End of 2D write delay Voltage center optimization
396 23:03:29.736272 INFO : End of 2D write delay Voltage center optimization
397 23:03:29.741838 INFO : Training has run successfully!
398 23:03:29.742379
399 23:03:29.742890 channel==0
400 23:03:29.747449 RxClkDly_Margin_A0==88 ps 9
401 23:03:29.748061 TxDqDly_Margin_A0==98 ps 10
402 23:03:29.753035 RxClkDly_Margin_A1==88 ps 9
403 23:03:29.753590 TxDqDly_Margin_A1==98 ps 10
404 23:03:29.754102 TrainedVREFDQ_A0==74
405 23:03:29.758625 TrainedVREFDQ_A1==74
406 23:03:29.759166 VrefDac_Margin_A0==25
407 23:03:29.759672 DeviceVref_Margin_A0==40
408 23:03:29.764267 VrefDac_Margin_A1==25
409 23:03:29.764788 DeviceVref_Margin_A1==40
410 23:03:29.765291
411 23:03:29.765794
412 23:03:29.769840 channel==1
413 23:03:29.770365 RxClkDly_Margin_A0==98 ps 10
414 23:03:29.770869 TxDqDly_Margin_A0==88 ps 9
415 23:03:29.775406 RxClkDly_Margin_A1==98 ps 10
416 23:03:29.775927 TxDqDly_Margin_A1==88 ps 9
417 23:03:29.781025 TrainedVREFDQ_A0==76
418 23:03:29.781558 TrainedVREFDQ_A1==77
419 23:03:29.782064 VrefDac_Margin_A0==23
420 23:03:29.786625 DeviceVref_Margin_A0==38
421 23:03:29.787146 VrefDac_Margin_A1==24
422 23:03:29.792268 DeviceVref_Margin_A1==37
423 23:03:29.792795
424 23:03:29.793299 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 23:03:29.793786
426 23:03:29.825850 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 23:03:29.826490 2D training succeed
428 23:03:29.831427 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 23:03:29.837020 auto size-- 65535DDR cs0 size: 2048MB
430 23:03:29.837562 DDR cs1 size: 2048MB
431 23:03:29.842632 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 23:03:29.843165 cs0 DataBus test pass
433 23:03:29.848270 cs1 DataBus test pass
434 23:03:29.849074 cs0 AddrBus test pass
435 23:03:29.849620 cs1 AddrBus test pass
436 23:03:29.850124
437 23:03:29.853802 100bdlr_step_size ps== 420
438 23:03:29.854354 result report
439 23:03:29.859415 boot times 0Enable ddr reg access
440 23:03:29.864780 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 23:03:29.878356 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 23:03:30.452140 0.0;M3 CHK:0;cm4_sp_mode 0
443 23:03:30.452920 MVN_1=0x00000000
444 23:03:30.457548 MVN_2=0x00000000
445 23:03:30.463356 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 23:03:30.463907 OPS=0x10
447 23:03:30.464447 ring efuse init
448 23:03:30.464956 chipver efuse init
449 23:03:30.468865 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 23:03:30.474433 [0.018960 Inits done]
451 23:03:30.474981 secure task start!
452 23:03:30.475487 high task start!
453 23:03:30.479014 low task start!
454 23:03:30.479562 run into bl31
455 23:03:30.485700 NOTICE: BL31: v1.3(release):4fc40b1
456 23:03:30.493592 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 23:03:30.494207 NOTICE: BL31: G12A normal boot!
458 23:03:30.519448 NOTICE: BL31: BL33 decompress pass
459 23:03:30.525104 ERROR: Error initializing runtime service opteed_fast
460 23:03:31.758089
461 23:03:31.758852
462 23:03:31.766427 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 23:03:31.767003
464 23:03:31.767550 Model: Libre Computer AML-A311D-CC Alta
465 23:03:31.974848 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 23:03:31.998229 DRAM: 2 GiB (effective 3.8 GiB)
467 23:03:32.141245 Core: 408 devices, 31 uclasses, devicetree: separate
468 23:03:32.147133 WDT: Not starting watchdog@f0d0
469 23:03:32.179364 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 23:03:32.191840 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 23:03:32.196811 ** Bad device specification mmc 0 **
472 23:03:32.207143 Card did not respond to voltage select! : -110
473 23:03:32.214826 ** Bad device specification mmc 0 **
474 23:03:32.215383 Couldn't find partition mmc 0
475 23:03:32.223148 Card did not respond to voltage select! : -110
476 23:03:32.228664 ** Bad device specification mmc 0 **
477 23:03:32.229221 Couldn't find partition mmc 0
478 23:03:32.233731 Error: could not access storage.
479 23:03:33.496572 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 23:03:33.497316 bl2_stage_init 0x01
481 23:03:33.497872 bl2_stage_init 0x81
482 23:03:33.502081 hw id: 0x0000 - pwm id 0x01
483 23:03:33.502663 bl2_stage_init 0xc1
484 23:03:33.503199 bl2_stage_init 0x02
485 23:03:33.503717
486 23:03:33.507594 L0:00000000
487 23:03:33.508190 L1:20000703
488 23:03:33.508728 L2:00008067
489 23:03:33.509246 L3:14000000
490 23:03:33.513252 B2:00402000
491 23:03:33.513810 B1:e0f83180
492 23:03:33.514337
493 23:03:33.514855 TE: 58159
494 23:03:33.515368
495 23:03:33.518932 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 23:03:33.519502
497 23:03:33.520089 Board ID = 1
498 23:03:33.524486 Set A53 clk to 24M
499 23:03:33.525050 Set A73 clk to 24M
500 23:03:33.525587 Set clk81 to 24M
501 23:03:33.530079 A53 clk: 1200 MHz
502 23:03:33.530632 A73 clk: 1200 MHz
503 23:03:33.531159 CLK81: 166.6M
504 23:03:33.531674 smccc: 00012ab5
505 23:03:33.535651 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 23:03:33.541293 board id: 1
507 23:03:33.547227 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 23:03:33.557694 fw parse done
509 23:03:33.563669 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 23:03:33.606312 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 23:03:33.617160 PIEI prepare done
512 23:03:33.617729 fastboot data load
513 23:03:33.618253 fastboot data verify
514 23:03:33.622830 verify result: 266
515 23:03:33.628354 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 23:03:33.628902 LPDDR4 probe
517 23:03:33.629422 ddr clk to 1584MHz
518 23:03:33.636358 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 23:03:33.673677
520 23:03:33.674275 dmc_version 0001
521 23:03:33.680359 Check phy result
522 23:03:33.686207 INFO : End of CA training
523 23:03:33.686756 INFO : End of initialization
524 23:03:33.691903 INFO : Training has run successfully!
525 23:03:33.692500 Check phy result
526 23:03:33.697433 INFO : End of initialization
527 23:03:33.697984 INFO : End of read enable training
528 23:03:33.700713 INFO : End of fine write leveling
529 23:03:33.706279 INFO : End of Write leveling coarse delay
530 23:03:33.711890 INFO : Training has run successfully!
531 23:03:33.712689 Check phy result
532 23:03:33.713233 INFO : End of initialization
533 23:03:33.717468 INFO : End of read dq deskew training
534 23:03:33.723048 INFO : End of MPR read delay center optimization
535 23:03:33.723624 INFO : End of write delay center optimization
536 23:03:33.728656 INFO : End of read delay center optimization
537 23:03:33.734253 INFO : End of max read latency training
538 23:03:33.734807 INFO : Training has run successfully!
539 23:03:33.739907 1D training succeed
540 23:03:33.745863 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 23:03:33.793284 Check phy result
542 23:03:33.793877 INFO : End of initialization
543 23:03:33.815777 INFO : End of 2D read delay Voltage center optimization
544 23:03:33.835959 INFO : End of 2D read delay Voltage center optimization
545 23:03:33.887802 INFO : End of 2D write delay Voltage center optimization
546 23:03:33.937014 INFO : End of 2D write delay Voltage center optimization
547 23:03:33.942563 INFO : Training has run successfully!
548 23:03:33.943124
549 23:03:33.943680 channel==0
550 23:03:33.948228 RxClkDly_Margin_A0==88 ps 9
551 23:03:33.948794 TxDqDly_Margin_A0==98 ps 10
552 23:03:33.953844 RxClkDly_Margin_A1==88 ps 9
553 23:03:33.954399 TxDqDly_Margin_A1==98 ps 10
554 23:03:33.954934 TrainedVREFDQ_A0==74
555 23:03:33.959360 TrainedVREFDQ_A1==74
556 23:03:33.959909 VrefDac_Margin_A0==25
557 23:03:33.960456 DeviceVref_Margin_A0==40
558 23:03:33.964984 VrefDac_Margin_A1==25
559 23:03:33.965527 DeviceVref_Margin_A1==40
560 23:03:33.966044
561 23:03:33.966559
562 23:03:33.970575 channel==1
563 23:03:33.971156 RxClkDly_Margin_A0==98 ps 10
564 23:03:33.971690 TxDqDly_Margin_A0==98 ps 10
565 23:03:33.976175 RxClkDly_Margin_A1==98 ps 10
566 23:03:33.976726 TxDqDly_Margin_A1==88 ps 9
567 23:03:33.981843 TrainedVREFDQ_A0==77
568 23:03:33.982399 TrainedVREFDQ_A1==77
569 23:03:33.982916 VrefDac_Margin_A0==24
570 23:03:33.987364 DeviceVref_Margin_A0==37
571 23:03:33.987899 VrefDac_Margin_A1==22
572 23:03:33.992980 DeviceVref_Margin_A1==37
573 23:03:33.993514
574 23:03:33.994043 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 23:03:33.998564
576 23:03:34.026582 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000019 00000018 0000001a 00000018 00000018 00000019 0000001a 0000001a 00000017 00000019 00000018 dram_vref_reg_value 0x 00000060
577 23:03:34.027205 2D training succeed
578 23:03:34.032175 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 23:03:34.037849 auto size-- 65535DDR cs0 size: 2048MB
580 23:03:34.038415 DDR cs1 size: 2048MB
581 23:03:34.043393 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 23:03:34.043941 cs0 DataBus test pass
583 23:03:34.048981 cs1 DataBus test pass
584 23:03:34.049534 cs0 AddrBus test pass
585 23:03:34.050064 cs1 AddrBus test pass
586 23:03:34.050579
587 23:03:34.054581 100bdlr_step_size ps== 420
588 23:03:34.055147 result report
589 23:03:34.060200 boot times 0Enable ddr reg access
590 23:03:34.065611 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 23:03:34.078114 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 23:03:34.651238 0.0;M3 CHK:0;cm4_sp_mode 0
593 23:03:34.652048 MVN_1=0x00000000
594 23:03:34.656595 MVN_2=0x00000000
595 23:03:34.662403 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 23:03:34.663036 OPS=0x10
597 23:03:34.663624 ring efuse init
598 23:03:34.664193 chipver efuse init
599 23:03:34.670609 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 23:03:34.671188 [0.018960 Inits done]
601 23:03:34.678158 secure task start!
602 23:03:34.678704 high task start!
603 23:03:34.679211 low task start!
604 23:03:34.679708 run into bl31
605 23:03:34.684814 NOTICE: BL31: v1.3(release):4fc40b1
606 23:03:34.692619 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 23:03:34.693208 NOTICE: BL31: G12A normal boot!
608 23:03:34.718006 NOTICE: BL31: BL33 decompress pass
609 23:03:34.723697 ERROR: Error initializing runtime service opteed_fast
610 23:03:35.956715
611 23:03:35.957479
612 23:03:35.964971 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 23:03:35.965591
614 23:03:35.966136 Model: Libre Computer AML-A311D-CC Alta
615 23:03:36.173383 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 23:03:36.195877 DRAM: 2 GiB (effective 3.8 GiB)
617 23:03:36.339771 Core: 408 devices, 31 uclasses, devicetree: separate
618 23:03:36.345622 WDT: Not starting watchdog@f0d0
619 23:03:36.377904 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 23:03:36.390348 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 23:03:36.395305 ** Bad device specification mmc 0 **
622 23:03:36.405637 Card did not respond to voltage select! : -110
623 23:03:36.413352 ** Bad device specification mmc 0 **
624 23:03:36.413827 Couldn't find partition mmc 0
625 23:03:36.421626 Card did not respond to voltage select! : -110
626 23:03:36.427183 ** Bad device specification mmc 0 **
627 23:03:36.427651 Couldn't find partition mmc 0
628 23:03:36.432275 Error: could not access storage.
629 23:03:36.774642 Net: eth0: ethernet@ff3f0000
630 23:03:36.775187 starting USB...
631 23:03:37.026680 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 23:03:37.027324 Starting the controller
633 23:03:37.033477 USB XHCI 1.10
634 23:03:38.746332 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 23:03:38.746925 bl2_stage_init 0x01
636 23:03:38.747350 bl2_stage_init 0x81
637 23:03:38.751855 hw id: 0x0000 - pwm id 0x01
638 23:03:38.752336 bl2_stage_init 0xc1
639 23:03:38.752749 bl2_stage_init 0x02
640 23:03:38.753152
641 23:03:38.757480 L0:00000000
642 23:03:38.757924 L1:20000703
643 23:03:38.758334 L2:00008067
644 23:03:38.758732 L3:14000000
645 23:03:38.763050 B2:00402000
646 23:03:38.763484 B1:e0f83180
647 23:03:38.763885
648 23:03:38.764327 TE: 58159
649 23:03:38.764728
650 23:03:38.768646 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 23:03:38.769080
652 23:03:38.769484 Board ID = 1
653 23:03:38.774335 Set A53 clk to 24M
654 23:03:38.774767 Set A73 clk to 24M
655 23:03:38.775169 Set clk81 to 24M
656 23:03:38.779977 A53 clk: 1200 MHz
657 23:03:38.780432 A73 clk: 1200 MHz
658 23:03:38.780831 CLK81: 166.6M
659 23:03:38.781227 smccc: 00012ab5
660 23:03:38.785606 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 23:03:38.791223 board id: 1
662 23:03:38.797132 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 23:03:38.807729 fw parse done
664 23:03:38.813716 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 23:03:38.856298 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 23:03:38.867227 PIEI prepare done
667 23:03:38.867679 fastboot data load
668 23:03:38.868122 fastboot data verify
669 23:03:38.872939 verify result: 266
670 23:03:38.878607 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 23:03:38.879041 LPDDR4 probe
672 23:03:38.879445 ddr clk to 1584MHz
673 23:03:38.885984 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 23:03:38.923680
675 23:03:38.924146 dmc_version 0001
676 23:03:38.930341 Check phy result
677 23:03:38.936233 INFO : End of CA training
678 23:03:38.936683 INFO : End of initialization
679 23:03:38.941832 INFO : Training has run successfully!
680 23:03:38.942263 Check phy result
681 23:03:38.947449 INFO : End of initialization
682 23:03:38.947877 INFO : End of read enable training
683 23:03:38.950711 INFO : End of fine write leveling
684 23:03:38.956318 INFO : End of Write leveling coarse delay
685 23:03:38.961919 INFO : Training has run successfully!
686 23:03:38.962345 Check phy result
687 23:03:38.962750 INFO : End of initialization
688 23:03:38.967562 INFO : End of read dq deskew training
689 23:03:38.973107 INFO : End of MPR read delay center optimization
690 23:03:38.973536 INFO : End of write delay center optimization
691 23:03:38.978688 INFO : End of read delay center optimization
692 23:03:38.984320 INFO : End of max read latency training
693 23:03:38.984750 INFO : Training has run successfully!
694 23:03:38.989898 1D training succeed
695 23:03:38.995794 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 23:03:39.042519 Check phy result
697 23:03:39.042968 INFO : End of initialization
698 23:03:39.065973 INFO : End of 2D read delay Voltage center optimization
699 23:03:39.086266 INFO : End of 2D read delay Voltage center optimization
700 23:03:39.138299 INFO : End of 2D write delay Voltage center optimization
701 23:03:39.187693 INFO : End of 2D write delay Voltage center optimization
702 23:03:39.193181 INFO : Training has run successfully!
703 23:03:39.193620
704 23:03:39.194025 channel==0
705 23:03:39.198833 RxClkDly_Margin_A0==88 ps 9
706 23:03:39.199263 TxDqDly_Margin_A0==98 ps 10
707 23:03:39.204440 RxClkDly_Margin_A1==88 ps 9
708 23:03:39.204871 TxDqDly_Margin_A1==98 ps 10
709 23:03:39.205277 TrainedVREFDQ_A0==74
710 23:03:39.210080 TrainedVREFDQ_A1==74
711 23:03:39.210514 VrefDac_Margin_A0==25
712 23:03:39.210919 DeviceVref_Margin_A0==40
713 23:03:39.215673 VrefDac_Margin_A1==25
714 23:03:39.216130 DeviceVref_Margin_A1==40
715 23:03:39.216535
716 23:03:39.216931
717 23:03:39.221295 channel==1
718 23:03:39.221749 RxClkDly_Margin_A0==88 ps 9
719 23:03:39.222159 TxDqDly_Margin_A0==88 ps 9
720 23:03:39.226866 RxClkDly_Margin_A1==98 ps 10
721 23:03:39.227300 TxDqDly_Margin_A1==98 ps 10
722 23:03:39.232485 TrainedVREFDQ_A0==76
723 23:03:39.232918 TrainedVREFDQ_A1==77
724 23:03:39.233322 VrefDac_Margin_A0==22
725 23:03:39.238031 DeviceVref_Margin_A0==38
726 23:03:39.238454 VrefDac_Margin_A1==23
727 23:03:39.243711 DeviceVref_Margin_A1==37
728 23:03:39.244161
729 23:03:39.244568 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 23:03:39.244968
731 23:03:39.277256 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
732 23:03:39.277721 2D training succeed
733 23:03:39.282850 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 23:03:39.288320 auto size-- 65535DDR cs0 size: 2048MB
735 23:03:39.288752 DDR cs1 size: 2048MB
736 23:03:39.293874 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 23:03:39.294324 cs0 DataBus test pass
738 23:03:39.299602 cs1 DataBus test pass
739 23:03:39.300077 cs0 AddrBus test pass
740 23:03:39.300496 cs1 AddrBus test pass
741 23:03:39.300894
742 23:03:39.305126 100bdlr_step_size ps== 420
743 23:03:39.305588 result report
744 23:03:39.310701 boot times 0Enable ddr reg access
745 23:03:39.316072 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 23:03:39.329650 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 23:03:39.903315 0.0;M3 CHK:0;cm4_sp_mode 0
748 23:03:39.904052 MVN_1=0x00000000
749 23:03:39.908837 MVN_2=0x00000000
750 23:03:39.914570 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 23:03:39.915121 OPS=0x10
752 23:03:39.915574 ring efuse init
753 23:03:39.916049 chipver efuse init
754 23:03:39.920175 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 23:03:39.925783 [0.018961 Inits done]
756 23:03:39.926528 secure task start!
757 23:03:39.927022 high task start!
758 23:03:39.930340 low task start!
759 23:03:39.930906 run into bl31
760 23:03:39.936996 NOTICE: BL31: v1.3(release):4fc40b1
761 23:03:39.944876 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 23:03:39.945452 NOTICE: BL31: G12A normal boot!
763 23:03:39.970182 NOTICE: BL31: BL33 decompress pass
764 23:03:39.975833 ERROR: Error initializing runtime service opteed_fast
765 23:03:41.208740
766 23:03:41.209392
767 23:03:41.217150 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 23:03:41.217677
769 23:03:41.218161 Model: Libre Computer AML-A311D-CC Alta
770 23:03:41.425559 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 23:03:41.448988 DRAM: 2 GiB (effective 3.8 GiB)
772 23:03:41.592073 Core: 408 devices, 31 uclasses, devicetree: separate
773 23:03:41.597896 WDT: Not starting watchdog@f0d0
774 23:03:41.630076 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 23:03:41.642475 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 23:03:41.647488 ** Bad device specification mmc 0 **
777 23:03:41.657923 Card did not respond to voltage select! : -110
778 23:03:41.665450 ** Bad device specification mmc 0 **
779 23:03:41.665968 Couldn't find partition mmc 0
780 23:03:41.673932 Card did not respond to voltage select! : -110
781 23:03:41.679355 ** Bad device specification mmc 0 **
782 23:03:41.679876 Couldn't find partition mmc 0
783 23:03:41.684098 Error: could not access storage.
784 23:03:42.026826 Net: eth0: ethernet@ff3f0000
785 23:03:42.027450 starting USB...
786 23:03:42.278684 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 23:03:42.279332 Starting the controller
788 23:03:42.285638 USB XHCI 1.10
789 23:03:44.448223 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 23:03:44.448870 bl2_stage_init 0x01
791 23:03:44.449347 bl2_stage_init 0x81
792 23:03:44.453698 hw id: 0x0000 - pwm id 0x01
793 23:03:44.454275 bl2_stage_init 0xc1
794 23:03:44.454766 bl2_stage_init 0x02
795 23:03:44.455222
796 23:03:44.459280 L0:00000000
797 23:03:44.459840 L1:20000703
798 23:03:44.460343 L2:00008067
799 23:03:44.460794 L3:14000000
800 23:03:44.464843 B2:00402000
801 23:03:44.465349 B1:e0f83180
802 23:03:44.465797
803 23:03:44.466244 TE: 58167
804 23:03:44.466687
805 23:03:44.470487 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 23:03:44.471043
807 23:03:44.471504 Board ID = 1
808 23:03:44.476051 Set A53 clk to 24M
809 23:03:44.476569 Set A73 clk to 24M
810 23:03:44.477020 Set clk81 to 24M
811 23:03:44.481652 A53 clk: 1200 MHz
812 23:03:44.482160 A73 clk: 1200 MHz
813 23:03:44.482609 CLK81: 166.6M
814 23:03:44.483048 smccc: 00012abd
815 23:03:44.487139 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 23:03:44.492835 board id: 1
817 23:03:44.498735 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 23:03:44.509378 fw parse done
819 23:03:44.515335 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 23:03:44.557859 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 23:03:44.568796 PIEI prepare done
822 23:03:44.569357 fastboot data load
823 23:03:44.569819 fastboot data verify
824 23:03:44.574472 verify result: 266
825 23:03:44.580306 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 23:03:44.580835 LPDDR4 probe
827 23:03:44.581299 ddr clk to 1584MHz
828 23:03:44.588020 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 23:03:44.625411
830 23:03:44.625958 dmc_version 0001
831 23:03:44.632101 Check phy result
832 23:03:44.637937 INFO : End of CA training
833 23:03:44.638450 INFO : End of initialization
834 23:03:44.643515 INFO : Training has run successfully!
835 23:03:44.644055 Check phy result
836 23:03:44.649026 INFO : End of initialization
837 23:03:44.649534 INFO : End of read enable training
838 23:03:44.654667 INFO : End of fine write leveling
839 23:03:44.660265 INFO : End of Write leveling coarse delay
840 23:03:44.660787 INFO : Training has run successfully!
841 23:03:44.661238 Check phy result
842 23:03:44.665898 INFO : End of initialization
843 23:03:44.666398 INFO : End of read dq deskew training
844 23:03:44.671501 INFO : End of MPR read delay center optimization
845 23:03:44.677102 INFO : End of write delay center optimization
846 23:03:44.682745 INFO : End of read delay center optimization
847 23:03:44.683269 INFO : End of max read latency training
848 23:03:44.688297 INFO : Training has run successfully!
849 23:03:44.688802 1D training succeed
850 23:03:44.697550 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 23:03:44.745057 Check phy result
852 23:03:44.745617 INFO : End of initialization
853 23:03:44.766810 INFO : End of 2D read delay Voltage center optimization
854 23:03:44.787062 INFO : End of 2D read delay Voltage center optimization
855 23:03:44.839127 INFO : End of 2D write delay Voltage center optimization
856 23:03:44.888604 INFO : End of 2D write delay Voltage center optimization
857 23:03:44.894061 INFO : Training has run successfully!
858 23:03:44.894566
859 23:03:44.895021 channel==0
860 23:03:44.899705 RxClkDly_Margin_A0==88 ps 9
861 23:03:44.900249 TxDqDly_Margin_A0==98 ps 10
862 23:03:44.905263 RxClkDly_Margin_A1==88 ps 9
863 23:03:44.905765 TxDqDly_Margin_A1==98 ps 10
864 23:03:44.906234 TrainedVREFDQ_A0==74
865 23:03:44.910933 TrainedVREFDQ_A1==74
866 23:03:44.911452 VrefDac_Margin_A0==25
867 23:03:44.911884 DeviceVref_Margin_A0==40
868 23:03:44.916579 VrefDac_Margin_A1==25
869 23:03:44.917098 DeviceVref_Margin_A1==40
870 23:03:44.917545
871 23:03:44.917998
872 23:03:44.922091 channel==1
873 23:03:44.922609 RxClkDly_Margin_A0==98 ps 10
874 23:03:44.923043 TxDqDly_Margin_A0==98 ps 10
875 23:03:44.927629 RxClkDly_Margin_A1==98 ps 10
876 23:03:44.928159 TxDqDly_Margin_A1==98 ps 10
877 23:03:44.933193 TrainedVREFDQ_A0==77
878 23:03:44.933703 TrainedVREFDQ_A1==77
879 23:03:44.934135 VrefDac_Margin_A0==24
880 23:03:44.938842 DeviceVref_Margin_A0==37
881 23:03:44.939357 VrefDac_Margin_A1==22
882 23:03:44.944477 DeviceVref_Margin_A1==37
883 23:03:44.944990
884 23:03:44.945423 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 23:03:44.949976
886 23:03:44.980183 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000019 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000018 dram_vref_reg_value 0x 00000060
887 23:03:44.980805 2D training succeed
888 23:03:44.983636 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 23:03:44.989230 auto size-- 65535DDR cs0 size: 2048MB
890 23:03:44.989765 DDR cs1 size: 2048MB
891 23:03:44.994821 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 23:03:44.995338 cs0 DataBus test pass
893 23:03:45.000550 cs1 DataBus test pass
894 23:03:45.001076 cs0 AddrBus test pass
895 23:03:45.001520 cs1 AddrBus test pass
896 23:03:45.001958
897 23:03:45.006029 100bdlr_step_size ps== 420
898 23:03:45.006552 result report
899 23:03:45.011624 boot times 0Enable ddr reg access
900 23:03:45.017144 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 23:03:45.030634 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 23:03:45.604138 0.0;M3 CHK:0;cm4_sp_mode 0
903 23:03:45.604797 MVN_1=0x00000000
904 23:03:45.609641 MVN_2=0x00000000
905 23:03:45.615415 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 23:03:45.615926 OPS=0x10
907 23:03:45.616428 ring efuse init
908 23:03:45.616880 chipver efuse init
909 23:03:45.620986 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 23:03:45.626568 [0.018961 Inits done]
911 23:03:45.627074 secure task start!
912 23:03:45.627528 high task start!
913 23:03:45.631143 low task start!
914 23:03:45.631641 run into bl31
915 23:03:45.637846 NOTICE: BL31: v1.3(release):4fc40b1
916 23:03:45.645666 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 23:03:45.646173 NOTICE: BL31: G12A normal boot!
918 23:03:45.670976 NOTICE: BL31: BL33 decompress pass
919 23:03:45.676664 ERROR: Error initializing runtime service opteed_fast
920 23:03:46.909567
921 23:03:46.910212
922 23:03:46.917958 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 23:03:46.918562
924 23:03:46.919104 Model: Libre Computer AML-A311D-CC Alta
925 23:03:47.126356 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 23:03:47.149844 DRAM: 2 GiB (effective 3.8 GiB)
927 23:03:47.292780 Core: 408 devices, 31 uclasses, devicetree: separate
928 23:03:47.298604 WDT: Not starting watchdog@f0d0
929 23:03:47.330848 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 23:03:47.343277 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 23:03:47.348266 ** Bad device specification mmc 0 **
932 23:03:47.358581 Card did not respond to voltage select! : -110
933 23:03:47.366219 ** Bad device specification mmc 0 **
934 23:03:47.366742 Couldn't find partition mmc 0
935 23:03:47.374576 Card did not respond to voltage select! : -110
936 23:03:47.380124 ** Bad device specification mmc 0 **
937 23:03:47.380649 Couldn't find partition mmc 0
938 23:03:47.385149 Error: could not access storage.
939 23:03:47.727633 Net: eth0: ethernet@ff3f0000
940 23:03:47.728316 starting USB...
941 23:03:47.979467 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 23:03:47.980159 Starting the controller
943 23:03:47.986425 USB XHCI 1.10
944 23:03:49.540420 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 23:03:49.548701 scanning usb for storage devices... 0 Storage Device(s) found
947 23:03:49.600351 Hit any key to stop autoboot: 1
948 23:03:49.601220 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 23:03:49.601868 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 23:03:49.602439 Setting prompt string to ['=>']
951 23:03:49.602985 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 23:03:49.616275 0
953 23:03:49.617261 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 23:03:49.617829 Sending with 10 millisecond of delay
956 23:03:50.752830 => setenv autoload no
957 23:03:50.763678 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 23:03:50.769088 setenv autoload no
959 23:03:50.769864 Sending with 10 millisecond of delay
961 23:03:52.570261 => setenv initrd_high 0xffffffff
962 23:03:52.581111 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 23:03:52.582036 setenv initrd_high 0xffffffff
964 23:03:52.582799 Sending with 10 millisecond of delay
966 23:03:54.199527 => setenv fdt_high 0xffffffff
967 23:03:54.210436 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 23:03:54.211337 setenv fdt_high 0xffffffff
969 23:03:54.212101 Sending with 10 millisecond of delay
971 23:03:54.504150 => dhcp
972 23:03:54.515002 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 23:03:54.515937 dhcp
974 23:03:54.516477 Speed: 1000, full duplex
975 23:03:54.516939 BOOTP broadcast 1
976 23:03:54.737313 DHCP client bound to address 192.168.6.27 (222 ms)
977 23:03:54.738202 Sending with 10 millisecond of delay
979 23:03:56.415018 => setenv serverip 192.168.6.2
980 23:03:56.425899 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 23:03:56.426881 setenv serverip 192.168.6.2
982 23:03:56.427615 Sending with 10 millisecond of delay
984 23:04:00.152086 => tftpboot 0x01080000 968201/tftp-deploy-ee38lnh1/kernel/uImage
985 23:04:00.162901 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 23:04:00.163805 tftpboot 0x01080000 968201/tftp-deploy-ee38lnh1/kernel/uImage
987 23:04:00.164343 Speed: 1000, full duplex
988 23:04:00.164799 Using ethernet@ff3f0000 device
989 23:04:00.165756 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 23:04:00.171281 Filename '968201/tftp-deploy-ee38lnh1/kernel/uImage'.
991 23:04:00.175257 Load address: 0x1080000
992 23:04:03.094161 Loading: *################################################## 43.6 MiB
993 23:04:03.094962 14.9 MiB/s
994 23:04:03.095483 done
995 23:04:03.098465 Bytes transferred = 45713984 (2b98a40 hex)
996 23:04:03.099329 Sending with 10 millisecond of delay
998 23:04:07.787789 => tftpboot 0x08000000 968201/tftp-deploy-ee38lnh1/ramdisk/ramdisk.cpio.gz.uboot
999 23:04:07.798819 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 23:04:07.799824 tftpboot 0x08000000 968201/tftp-deploy-ee38lnh1/ramdisk/ramdisk.cpio.gz.uboot
1001 23:04:07.800437 Speed: 1000, full duplex
1002 23:04:07.800977 Using ethernet@ff3f0000 device
1003 23:04:07.801595 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 23:04:07.813475 Filename '968201/tftp-deploy-ee38lnh1/ramdisk/ramdisk.cpio.gz.uboot'.
1005 23:04:07.814015 Load address: 0x8000000
1006 23:04:14.448495 Loading: *###################T ############################## UDP wrong checksum 00000005 00009153
1007 23:04:19.449487 T UDP wrong checksum 00000005 00009153
1008 23:04:21.163827 UDP wrong checksum 000000ff 00005f07
1009 23:04:21.204837 UDP wrong checksum 000000ff 0000e9f9
1010 23:04:29.452585 T T UDP wrong checksum 00000005 00009153
1011 23:04:49.456638 T T T T UDP wrong checksum 00000005 00009153
1012 23:05:01.406172 T T UDP wrong checksum 000000ff 000019c0
1013 23:05:01.445357 UDP wrong checksum 000000ff 0000a3b2
1014 23:05:04.460706
1015 23:05:04.461345 Retry count exceeded; starting again
1017 23:05:04.462833 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1020 23:05:04.464884 end: 2.4 uboot-commands (duration 00:01:47) [common]
1022 23:05:04.466379 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1024 23:05:04.467534 end: 2 uboot-action (duration 00:01:47) [common]
1026 23:05:04.469266 Cleaning after the job
1027 23:05:04.469882 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/ramdisk
1028 23:05:04.471120 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/kernel
1029 23:05:04.518629 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/dtb
1030 23:05:04.519434 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/nfsrootfs
1031 23:05:04.635199 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968201/tftp-deploy-ee38lnh1/modules
1032 23:05:04.653561 start: 4.1 power-off (timeout 00:00:30) [common]
1033 23:05:04.654209 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1034 23:05:04.693565 >> OK - accepted request
1035 23:05:04.696000 Returned 0 in 0 seconds
1036 23:05:04.796899 end: 4.1 power-off (duration 00:00:00) [common]
1038 23:05:04.798166 start: 4.2 read-feedback (timeout 00:10:00) [common]
1039 23:05:04.798817 Listened to connection for namespace 'common' for up to 1s
1040 23:05:05.799102 Finalising connection for namespace 'common'
1041 23:05:05.799891 Disconnecting from shell: Finalise
1042 23:05:05.800525 =>
1043 23:05:05.901697 end: 4.2 read-feedback (duration 00:00:01) [common]
1044 23:05:05.902462 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/968201
1045 23:05:08.739331 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/968201
1046 23:05:08.740747 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.