Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:33:26.062237 lava-dispatcher, installed at version: 2024.01
2 23:33:26.063052 start: 0 validate
3 23:33:26.063532 Start time: 2024-11-09 23:33:26.063502+00:00 (UTC)
4 23:33:26.064103 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:33:26.064636 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:33:26.113879 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:33:26.114616 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 23:33:26.145158 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:33:26.145946 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 23:33:26.179716 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:33:26.180290 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:33:26.209982 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:33:26.210483 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-279-gde2f378f2b77%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 23:33:26.248599 validate duration: 0.19
16 23:33:26.249500 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:33:26.249849 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:33:26.250157 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:33:26.250791 Not decompressing ramdisk as can be used compressed.
20 23:33:26.251267 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 23:33:26.251546 saving as /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/ramdisk/initrd.cpio.gz
22 23:33:26.251837 total size: 5628140 (5 MB)
23 23:33:26.292178 progress 0 % (0 MB)
24 23:33:26.296972 progress 5 % (0 MB)
25 23:33:26.301062 progress 10 % (0 MB)
26 23:33:26.304731 progress 15 % (0 MB)
27 23:33:26.308813 progress 20 % (1 MB)
28 23:33:26.312464 progress 25 % (1 MB)
29 23:33:26.316465 progress 30 % (1 MB)
30 23:33:26.320452 progress 35 % (1 MB)
31 23:33:26.324111 progress 40 % (2 MB)
32 23:33:26.328119 progress 45 % (2 MB)
33 23:33:26.331707 progress 50 % (2 MB)
34 23:33:26.335747 progress 55 % (2 MB)
35 23:33:26.339739 progress 60 % (3 MB)
36 23:33:26.343263 progress 65 % (3 MB)
37 23:33:26.347237 progress 70 % (3 MB)
38 23:33:26.350827 progress 75 % (4 MB)
39 23:33:26.354682 progress 80 % (4 MB)
40 23:33:26.358032 progress 85 % (4 MB)
41 23:33:26.361713 progress 90 % (4 MB)
42 23:33:26.365376 progress 95 % (5 MB)
43 23:33:26.368691 progress 100 % (5 MB)
44 23:33:26.369356 5 MB downloaded in 0.12 s (45.68 MB/s)
45 23:33:26.369935 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:33:26.370918 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:33:26.371248 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:33:26.371552 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:33:26.372076 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/gcc-12/kernel/Image
51 23:33:26.372357 saving as /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/kernel/Image
52 23:33:26.372583 total size: 45713920 (43 MB)
53 23:33:26.372807 No compression specified
54 23:33:26.410066 progress 0 % (0 MB)
55 23:33:26.437791 progress 5 % (2 MB)
56 23:33:26.465403 progress 10 % (4 MB)
57 23:33:26.492883 progress 15 % (6 MB)
58 23:33:26.520470 progress 20 % (8 MB)
59 23:33:26.547826 progress 25 % (10 MB)
60 23:33:26.575116 progress 30 % (13 MB)
61 23:33:26.602460 progress 35 % (15 MB)
62 23:33:26.631275 progress 40 % (17 MB)
63 23:33:26.658756 progress 45 % (19 MB)
64 23:33:26.686111 progress 50 % (21 MB)
65 23:33:26.713397 progress 55 % (24 MB)
66 23:33:26.740589 progress 60 % (26 MB)
67 23:33:26.768866 progress 65 % (28 MB)
68 23:33:26.796251 progress 70 % (30 MB)
69 23:33:26.823889 progress 75 % (32 MB)
70 23:33:26.851101 progress 80 % (34 MB)
71 23:33:26.878253 progress 85 % (37 MB)
72 23:33:26.905568 progress 90 % (39 MB)
73 23:33:26.932801 progress 95 % (41 MB)
74 23:33:26.959224 progress 100 % (43 MB)
75 23:33:26.959777 43 MB downloaded in 0.59 s (74.25 MB/s)
76 23:33:26.960296 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:33:26.961150 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:33:26.961446 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:33:26.961726 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:33:26.962226 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 23:33:26.962510 saving as /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 23:33:26.962730 total size: 53209 (0 MB)
84 23:33:26.962949 No compression specified
85 23:33:27.004565 progress 61 % (0 MB)
86 23:33:27.005409 progress 100 % (0 MB)
87 23:33:27.005959 0 MB downloaded in 0.04 s (1.17 MB/s)
88 23:33:27.006460 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:33:27.007298 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:33:27.007574 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:33:27.007849 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:33:27.008365 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 23:33:27.008625 saving as /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/nfsrootfs/full.rootfs.tar
95 23:33:27.008843 total size: 474398908 (452 MB)
96 23:33:27.009066 Using unxz to decompress xz
97 23:33:27.043546 progress 0 % (0 MB)
98 23:33:28.136450 progress 5 % (22 MB)
99 23:33:29.578568 progress 10 % (45 MB)
100 23:33:30.001967 progress 15 % (67 MB)
101 23:33:30.760576 progress 20 % (90 MB)
102 23:33:31.295094 progress 25 % (113 MB)
103 23:33:31.649624 progress 30 % (135 MB)
104 23:33:32.254075 progress 35 % (158 MB)
105 23:33:33.082767 progress 40 % (181 MB)
106 23:33:33.958843 progress 45 % (203 MB)
107 23:33:34.716042 progress 50 % (226 MB)
108 23:33:35.356226 progress 55 % (248 MB)
109 23:33:36.570396 progress 60 % (271 MB)
110 23:33:38.062874 progress 65 % (294 MB)
111 23:33:39.703613 progress 70 % (316 MB)
112 23:33:42.825965 progress 75 % (339 MB)
113 23:33:45.294993 progress 80 % (361 MB)
114 23:33:48.227019 progress 85 % (384 MB)
115 23:33:51.592873 progress 90 % (407 MB)
116 23:33:54.817381 progress 95 % (429 MB)
117 23:33:58.044463 progress 100 % (452 MB)
118 23:33:58.058854 452 MB downloaded in 31.05 s (14.57 MB/s)
119 23:33:58.059561 end: 1.4.1 http-download (duration 00:00:31) [common]
121 23:33:58.060963 end: 1.4 download-retry (duration 00:00:31) [common]
122 23:33:58.061511 start: 1.5 download-retry (timeout 00:09:28) [common]
123 23:33:58.062022 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 23:33:58.063042 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-279-gde2f378f2b77/arm64/defconfig/gcc-12/modules.tar.xz
125 23:33:58.063562 saving as /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/modules/modules.tar
126 23:33:58.063969 total size: 11611856 (11 MB)
127 23:33:58.064424 Using unxz to decompress xz
128 23:33:58.105299 progress 0 % (0 MB)
129 23:33:58.175156 progress 5 % (0 MB)
130 23:33:58.249848 progress 10 % (1 MB)
131 23:33:58.346484 progress 15 % (1 MB)
132 23:33:58.440385 progress 20 % (2 MB)
133 23:33:58.520354 progress 25 % (2 MB)
134 23:33:58.598243 progress 30 % (3 MB)
135 23:33:58.679147 progress 35 % (3 MB)
136 23:33:58.756117 progress 40 % (4 MB)
137 23:33:58.833421 progress 45 % (5 MB)
138 23:33:58.917885 progress 50 % (5 MB)
139 23:33:58.994598 progress 55 % (6 MB)
140 23:33:59.079675 progress 60 % (6 MB)
141 23:33:59.161062 progress 65 % (7 MB)
142 23:33:59.242999 progress 70 % (7 MB)
143 23:33:59.321081 progress 75 % (8 MB)
144 23:33:59.405355 progress 80 % (8 MB)
145 23:33:59.485374 progress 85 % (9 MB)
146 23:33:59.572963 progress 90 % (9 MB)
147 23:33:59.650495 progress 95 % (10 MB)
148 23:33:59.727136 progress 100 % (11 MB)
149 23:33:59.738712 11 MB downloaded in 1.67 s (6.61 MB/s)
150 23:33:59.739289 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:33:59.740448 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:33:59.741049 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 23:33:59.741624 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 23:34:15.144189 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/968252/extract-nfsrootfs-q3h2vlhk
156 23:34:15.144803 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 23:34:15.145129 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 23:34:15.145841 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh
159 23:34:15.146324 makedir: /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin
160 23:34:15.146726 makedir: /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/tests
161 23:34:15.147104 makedir: /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/results
162 23:34:15.147472 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-add-keys
163 23:34:15.148019 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-add-sources
164 23:34:15.148589 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-background-process-start
165 23:34:15.149106 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-background-process-stop
166 23:34:15.149621 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-common-functions
167 23:34:15.150099 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-echo-ipv4
168 23:34:15.150569 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-install-packages
169 23:34:15.151045 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-installed-packages
170 23:34:15.151512 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-os-build
171 23:34:15.151974 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-probe-channel
172 23:34:15.152500 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-probe-ip
173 23:34:15.152991 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-target-ip
174 23:34:15.153457 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-target-mac
175 23:34:15.153999 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-target-storage
176 23:34:15.154484 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-test-case
177 23:34:15.154952 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-test-event
178 23:34:15.155412 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-test-feedback
179 23:34:15.155869 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-test-raise
180 23:34:15.156376 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-test-reference
181 23:34:15.156855 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-test-runner
182 23:34:15.157323 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-test-set
183 23:34:15.157790 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-test-shell
184 23:34:15.158263 Updating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-install-packages (oe)
185 23:34:15.158774 Updating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/bin/lava-installed-packages (oe)
186 23:34:15.159203 Creating /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/environment
187 23:34:15.159566 LAVA metadata
188 23:34:15.159823 - LAVA_JOB_ID=968252
189 23:34:15.160065 - LAVA_DISPATCHER_IP=192.168.6.2
190 23:34:15.160434 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 23:34:15.161371 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 23:34:15.161684 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 23:34:15.161893 skipped lava-vland-overlay
194 23:34:15.162136 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 23:34:15.162388 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 23:34:15.162606 skipped lava-multinode-overlay
197 23:34:15.162847 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 23:34:15.163096 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 23:34:15.163342 Loading test definitions
200 23:34:15.163616 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 23:34:15.163837 Using /lava-968252 at stage 0
202 23:34:15.165021 uuid=968252_1.6.2.4.1 testdef=None
203 23:34:15.165327 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 23:34:15.165592 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 23:34:15.167348 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 23:34:15.168165 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 23:34:15.170294 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 23:34:15.171128 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 23:34:15.173209 runner path: /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 968252_1.6.2.4.1
212 23:34:15.173787 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 23:34:15.174546 Creating lava-test-runner.conf files
215 23:34:15.174751 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/968252/lava-overlay-v_8mzxjh/lava-968252/0 for stage 0
216 23:34:15.175077 - 0_v4l2-decoder-conformance-h264
217 23:34:15.175415 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 23:34:15.175688 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 23:34:15.196854 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 23:34:15.197227 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 23:34:15.197487 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 23:34:15.197753 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 23:34:15.198015 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 23:34:15.817281 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 23:34:15.817746 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 23:34:15.818016 extracting modules file /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968252/extract-nfsrootfs-q3h2vlhk
227 23:34:17.164538 extracting modules file /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/968252/extract-overlay-ramdisk-9by7ah26/ramdisk
228 23:34:18.546833 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 23:34:18.547327 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 23:34:18.547627 [common] Applying overlay to NFS
231 23:34:18.547856 [common] Applying overlay /var/lib/lava/dispatcher/tmp/968252/compress-overlay-t1c9bsjd/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/968252/extract-nfsrootfs-q3h2vlhk
232 23:34:18.577105 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 23:34:18.577551 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 23:34:18.577850 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 23:34:18.578093 Converting downloaded kernel to a uImage
236 23:34:18.578424 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/kernel/Image /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/kernel/uImage
237 23:34:19.055949 output: Image Name:
238 23:34:19.056546 output: Created: Sat Nov 9 23:34:18 2024
239 23:34:19.056786 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 23:34:19.057008 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 23:34:19.057221 output: Load Address: 01080000
242 23:34:19.057429 output: Entry Point: 01080000
243 23:34:19.057634 output:
244 23:34:19.057981 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 23:34:19.058265 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 23:34:19.058552 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 23:34:19.058826 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 23:34:19.059107 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 23:34:19.059385 Building ramdisk /var/lib/lava/dispatcher/tmp/968252/extract-overlay-ramdisk-9by7ah26/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/968252/extract-overlay-ramdisk-9by7ah26/ramdisk
250 23:34:21.500831 >> 166827 blocks
251 23:34:29.984416 Adding RAMdisk u-boot header.
252 23:34:29.985140 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/968252/extract-overlay-ramdisk-9by7ah26/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/968252/extract-overlay-ramdisk-9by7ah26/ramdisk.cpio.gz.uboot
253 23:34:30.236763 output: Image Name:
254 23:34:30.237427 output: Created: Sat Nov 9 23:34:29 2024
255 23:34:30.237905 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 23:34:30.238367 output: Data Size: 23435257 Bytes = 22885.99 KiB = 22.35 MiB
257 23:34:30.238822 output: Load Address: 00000000
258 23:34:30.239268 output: Entry Point: 00000000
259 23:34:30.239711 output:
260 23:34:30.240954 rename /var/lib/lava/dispatcher/tmp/968252/extract-overlay-ramdisk-9by7ah26/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/ramdisk/ramdisk.cpio.gz.uboot
261 23:34:30.241744 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 23:34:30.242365 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 23:34:30.242999 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 23:34:30.243519 No LXC device requested
265 23:34:30.244122 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 23:34:30.244722 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 23:34:30.245291 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 23:34:30.245764 Checking files for TFTP limit of 4294967296 bytes.
269 23:34:30.248722 end: 1 tftp-deploy (duration 00:01:04) [common]
270 23:34:30.249369 start: 2 uboot-action (timeout 00:05:00) [common]
271 23:34:30.249969 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 23:34:30.250536 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 23:34:30.251110 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 23:34:30.251704 Using kernel file from prepare-kernel: 968252/tftp-deploy-qvm2rtzj/kernel/uImage
275 23:34:30.252445 substitutions:
276 23:34:30.252909 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 23:34:30.253365 - {DTB_ADDR}: 0x01070000
278 23:34:30.253811 - {DTB}: 968252/tftp-deploy-qvm2rtzj/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 23:34:30.254258 - {INITRD}: 968252/tftp-deploy-qvm2rtzj/ramdisk/ramdisk.cpio.gz.uboot
280 23:34:30.254702 - {KERNEL_ADDR}: 0x01080000
281 23:34:30.255142 - {KERNEL}: 968252/tftp-deploy-qvm2rtzj/kernel/uImage
282 23:34:30.255580 - {LAVA_MAC}: None
283 23:34:30.256090 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/968252/extract-nfsrootfs-q3h2vlhk
284 23:34:30.256547 - {NFS_SERVER_IP}: 192.168.6.2
285 23:34:30.256987 - {PRESEED_CONFIG}: None
286 23:34:30.257425 - {PRESEED_LOCAL}: None
287 23:34:30.257858 - {RAMDISK_ADDR}: 0x08000000
288 23:34:30.258287 - {RAMDISK}: 968252/tftp-deploy-qvm2rtzj/ramdisk/ramdisk.cpio.gz.uboot
289 23:34:30.258723 - {ROOT_PART}: None
290 23:34:30.259155 - {ROOT}: None
291 23:34:30.259588 - {SERVER_IP}: 192.168.6.2
292 23:34:30.260050 - {TEE_ADDR}: 0x83000000
293 23:34:30.260494 - {TEE}: None
294 23:34:30.260932 Parsed boot commands:
295 23:34:30.261354 - setenv autoload no
296 23:34:30.261786 - setenv initrd_high 0xffffffff
297 23:34:30.262217 - setenv fdt_high 0xffffffff
298 23:34:30.262646 - dhcp
299 23:34:30.263074 - setenv serverip 192.168.6.2
300 23:34:30.263503 - tftpboot 0x01080000 968252/tftp-deploy-qvm2rtzj/kernel/uImage
301 23:34:30.263937 - tftpboot 0x08000000 968252/tftp-deploy-qvm2rtzj/ramdisk/ramdisk.cpio.gz.uboot
302 23:34:30.264400 - tftpboot 0x01070000 968252/tftp-deploy-qvm2rtzj/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 23:34:30.264834 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/968252/extract-nfsrootfs-q3h2vlhk,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 23:34:30.265280 - bootm 0x01080000 0x08000000 0x01070000
305 23:34:30.265837 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 23:34:30.267494 start: 2.3 connect-device (timeout 00:05:00) [common]
308 23:34:30.267964 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 23:34:30.283349 Setting prompt string to ['lava-test: # ']
310 23:34:30.284986 end: 2.3 connect-device (duration 00:00:00) [common]
311 23:34:30.285665 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 23:34:30.286603 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 23:34:30.287301 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 23:34:30.288588 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 23:34:30.326002 >> OK - accepted request
316 23:34:30.328149 Returned 0 in 0 seconds
317 23:34:30.429201 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 23:34:30.431053 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 23:34:30.431698 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 23:34:30.432377 Setting prompt string to ['Hit any key to stop autoboot']
322 23:34:30.432910 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 23:34:30.434644 Trying 192.168.56.21...
324 23:34:30.435177 Connected to conserv1.
325 23:34:30.435664 Escape character is '^]'.
326 23:34:30.436171
327 23:34:30.436653 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 23:34:30.437132
329 23:34:38.165830 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 23:34:38.166519 bl2_stage_init 0x01
331 23:34:38.167008 bl2_stage_init 0x81
332 23:34:38.171305 hw id: 0x0000 - pwm id 0x01
333 23:34:38.171805 bl2_stage_init 0xc1
334 23:34:38.172343 bl2_stage_init 0x02
335 23:34:38.172808
336 23:34:38.176926 L0:00000000
337 23:34:38.177433 L1:00000703
338 23:34:38.177892 L2:00008067
339 23:34:38.178352 L3:15000000
340 23:34:38.178809 S1:00000000
341 23:34:38.182501 B2:20282000
342 23:34:38.183002 B1:a0f83180
343 23:34:38.183458
344 23:34:38.183912 TE: 69889
345 23:34:38.184412
346 23:34:38.188135 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 23:34:38.188634
348 23:34:38.193793 Board ID = 1
349 23:34:38.194287 Set cpu clk to 24M
350 23:34:38.194745 Set clk81 to 24M
351 23:34:38.199296 Use GP1_pll as DSU clk.
352 23:34:38.199780 DSU clk: 1200 Mhz
353 23:34:38.200276 CPU clk: 1200 MHz
354 23:34:38.200729 Set clk81 to 166.6M
355 23:34:38.210527 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 23:34:38.211023 board id: 1
357 23:34:38.216938 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 23:34:38.227837 fw parse done
359 23:34:38.233780 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 23:34:38.277043 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 23:34:38.288032 PIEI prepare done
362 23:34:38.288523 fastboot data load
363 23:34:38.288982 fastboot data verify
364 23:34:38.293589 verify result: 266
365 23:34:38.299289 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 23:34:38.299769 LPDDR4 probe
367 23:34:38.300259 ddr clk to 1584MHz
368 23:34:38.307186 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 23:34:38.344951
370 23:34:38.345468 dmc_version 0001
371 23:34:38.351239 Check phy result
372 23:34:38.358022 INFO : End of CA training
373 23:34:38.358514 INFO : End of initialization
374 23:34:38.363575 INFO : Training has run successfully!
375 23:34:38.364085 Check phy result
376 23:34:38.369187 INFO : End of initialization
377 23:34:38.369673 INFO : End of read enable training
378 23:34:38.372586 INFO : End of fine write leveling
379 23:34:38.378207 INFO : End of Write leveling coarse delay
380 23:34:38.383757 INFO : Training has run successfully!
381 23:34:38.384265 Check phy result
382 23:34:38.384722 INFO : End of initialization
383 23:34:38.389292 INFO : End of read dq deskew training
384 23:34:38.392741 INFO : End of MPR read delay center optimization
385 23:34:38.398338 INFO : End of write delay center optimization
386 23:34:38.403912 INFO : End of read delay center optimization
387 23:34:38.404442 INFO : End of max read latency training
388 23:34:38.409614 INFO : Training has run successfully!
389 23:34:38.410103 1D training succeed
390 23:34:38.417725 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 23:34:38.465942 Check phy result
392 23:34:38.466449 INFO : End of initialization
393 23:34:38.493198 INFO : End of 2D read delay Voltage center optimization
394 23:34:38.517343 INFO : End of 2D read delay Voltage center optimization
395 23:34:38.574070 INFO : End of 2D write delay Voltage center optimization
396 23:34:38.628097 INFO : End of 2D write delay Voltage center optimization
397 23:34:38.633812 INFO : Training has run successfully!
398 23:34:38.634296
399 23:34:38.634755 channel==0
400 23:34:38.639153 RxClkDly_Margin_A0==78 ps 8
401 23:34:38.639686 TxDqDly_Margin_A0==98 ps 10
402 23:34:38.644827 RxClkDly_Margin_A1==88 ps 9
403 23:34:38.645313 TxDqDly_Margin_A1==98 ps 10
404 23:34:38.645776 TrainedVREFDQ_A0==74
405 23:34:38.653094 TrainedVREFDQ_A1==75
406 23:34:38.653617 VrefDac_Margin_A0==23
407 23:34:38.654077 DeviceVref_Margin_A0==40
408 23:34:38.655940 VrefDac_Margin_A1==23
409 23:34:38.656444 DeviceVref_Margin_A1==39
410 23:34:38.656896
411 23:34:38.657343
412 23:34:38.661727 channel==1
413 23:34:38.662215 RxClkDly_Margin_A0==88 ps 9
414 23:34:38.662684 TxDqDly_Margin_A0==98 ps 10
415 23:34:38.667205 RxClkDly_Margin_A1==78 ps 8
416 23:34:38.667692 TxDqDly_Margin_A1==88 ps 9
417 23:34:38.672779 TrainedVREFDQ_A0==78
418 23:34:38.673318 TrainedVREFDQ_A1==75
419 23:34:38.673802 VrefDac_Margin_A0==23
420 23:34:38.678458 DeviceVref_Margin_A0==36
421 23:34:38.678943 VrefDac_Margin_A1==20
422 23:34:38.684030 DeviceVref_Margin_A1==39
423 23:34:38.684529
424 23:34:38.685000 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 23:34:38.685471
426 23:34:38.717554 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000017 00000017 00000016 00000017 00000017 00000017 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 23:34:38.718261 2D training succeed
428 23:34:38.723095 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 23:34:38.728633 auto size-- 65535DDR cs0 size: 2048MB
430 23:34:38.729170 DDR cs1 size: 2048MB
431 23:34:38.734257 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 23:34:38.734784 cs0 DataBus test pass
433 23:34:38.739867 cs1 DataBus test pass
434 23:34:38.740447 cs0 AddrBus test pass
435 23:34:38.740918 cs1 AddrBus test pass
436 23:34:38.741368
437 23:34:38.745634 100bdlr_step_size ps== 471
438 23:34:38.746138 result report
439 23:34:38.751019 boot times 0Enable ddr reg access
440 23:34:38.756321 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 23:34:38.770208 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 23:34:39.429897 bl2z: ptr: 05129330, size: 00001e40
443 23:34:39.438696 0.0;M3 CHK:0;cm4_sp_mode 0
444 23:34:39.439220 MVN_1=0x00000000
445 23:34:39.439680 MVN_2=0x00000000
446 23:34:39.450220 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 23:34:39.450723 OPS=0x04
448 23:34:39.451187 ring efuse init
449 23:34:39.453122 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 23:34:39.458866 [0.017354 Inits done]
451 23:34:39.459347 secure task start!
452 23:34:39.459802 high task start!
453 23:34:39.460297 low task start!
454 23:34:39.463259 run into bl31
455 23:34:39.471835 NOTICE: BL31: v1.3(release):4fc40b1
456 23:34:39.479741 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 23:34:39.480277 NOTICE: BL31: G12A normal boot!
458 23:34:39.495224 NOTICE: BL31: BL33 decompress pass
459 23:34:39.500949 ERROR: Error initializing runtime service opteed_fast
460 23:34:42.213039 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 23:34:42.213723 bl2_stage_init 0x01
462 23:34:42.214213 bl2_stage_init 0x81
463 23:34:42.218587 hw id: 0x0000 - pwm id 0x01
464 23:34:42.219112 bl2_stage_init 0xc1
465 23:34:42.224190 bl2_stage_init 0x02
466 23:34:42.224756
467 23:34:42.225204 L0:00000000
468 23:34:42.225640 L1:00000703
469 23:34:42.226079 L2:00008067
470 23:34:42.226510 L3:15000000
471 23:34:42.229775 S1:00000000
472 23:34:42.230250 B2:20282000
473 23:34:42.230689 B1:a0f83180
474 23:34:42.231119
475 23:34:42.231555 TE: 68098
476 23:34:42.232044
477 23:34:42.235335 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 23:34:42.235815
479 23:34:42.240959 Board ID = 1
480 23:34:42.241428 Set cpu clk to 24M
481 23:34:42.241864 Set clk81 to 24M
482 23:34:42.246556 Use GP1_pll as DSU clk.
483 23:34:42.247039 DSU clk: 1200 Mhz
484 23:34:42.247477 CPU clk: 1200 MHz
485 23:34:42.252161 Set clk81 to 166.6M
486 23:34:42.257750 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 23:34:42.258218 board id: 1
488 23:34:42.264111 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 23:34:42.275967 fw parse done
490 23:34:42.281974 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 23:34:42.325014 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 23:34:42.336125 PIEI prepare done
493 23:34:42.336647 fastboot data load
494 23:34:42.337092 fastboot data verify
495 23:34:42.341710 verify result: 266
496 23:34:42.347300 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 23:34:42.347777 LPDDR4 probe
498 23:34:42.348267 ddr clk to 1584MHz
499 23:34:42.355033 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 23:34:42.392298
501 23:34:42.392799 dmc_version 0001
502 23:34:42.399615 Check phy result
503 23:34:42.406070 INFO : End of CA training
504 23:34:42.406609 INFO : End of initialization
505 23:34:42.411744 INFO : Training has run successfully!
506 23:34:42.412290 Check phy result
507 23:34:42.417400 INFO : End of initialization
508 23:34:42.417902 INFO : End of read enable training
509 23:34:42.422883 INFO : End of fine write leveling
510 23:34:42.428460 INFO : End of Write leveling coarse delay
511 23:34:42.428944 INFO : Training has run successfully!
512 23:34:42.429402 Check phy result
513 23:34:42.434068 INFO : End of initialization
514 23:34:42.434548 INFO : End of read dq deskew training
515 23:34:42.439700 INFO : End of MPR read delay center optimization
516 23:34:42.445233 INFO : End of write delay center optimization
517 23:34:42.450869 INFO : End of read delay center optimization
518 23:34:42.451388 INFO : End of max read latency training
519 23:34:42.456504 INFO : Training has run successfully!
520 23:34:42.457007 1D training succeed
521 23:34:42.464688 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 23:34:42.513227 Check phy result
523 23:34:42.513878 INFO : End of initialization
524 23:34:42.540553 INFO : End of 2D read delay Voltage center optimization
525 23:34:42.564889 INFO : End of 2D read delay Voltage center optimization
526 23:34:42.621769 INFO : End of 2D write delay Voltage center optimization
527 23:34:42.676245 INFO : End of 2D write delay Voltage center optimization
528 23:34:42.681798 INFO : Training has run successfully!
529 23:34:42.682294
530 23:34:42.682773 channel==0
531 23:34:42.687350 RxClkDly_Margin_A0==78 ps 8
532 23:34:42.687848 TxDqDly_Margin_A0==98 ps 10
533 23:34:42.693102 RxClkDly_Margin_A1==88 ps 9
534 23:34:42.693590 TxDqDly_Margin_A1==98 ps 10
535 23:34:42.694052 TrainedVREFDQ_A0==74
536 23:34:42.698568 TrainedVREFDQ_A1==74
537 23:34:42.699051 VrefDac_Margin_A0==23
538 23:34:42.699509 DeviceVref_Margin_A0==40
539 23:34:42.704187 VrefDac_Margin_A1==22
540 23:34:42.704672 DeviceVref_Margin_A1==40
541 23:34:42.705125
542 23:34:42.705576
543 23:34:42.709767 channel==1
544 23:34:42.710249 RxClkDly_Margin_A0==78 ps 8
545 23:34:42.710703 TxDqDly_Margin_A0==98 ps 10
546 23:34:42.715367 RxClkDly_Margin_A1==78 ps 8
547 23:34:42.715847 TxDqDly_Margin_A1==88 ps 9
548 23:34:42.720996 TrainedVREFDQ_A0==78
549 23:34:42.721494 TrainedVREFDQ_A1==78
550 23:34:42.721955 VrefDac_Margin_A0==22
551 23:34:42.726543 DeviceVref_Margin_A0==36
552 23:34:42.727016 VrefDac_Margin_A1==22
553 23:34:42.732145 DeviceVref_Margin_A1==36
554 23:34:42.732631
555 23:34:42.733089 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 23:34:42.733542
557 23:34:42.765753 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 23:34:42.766289 2D training succeed
559 23:34:42.771381 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 23:34:42.776950 auto size-- 65535DDR cs0 size: 2048MB
561 23:34:42.777435 DDR cs1 size: 2048MB
562 23:34:42.782549 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 23:34:42.783030 cs0 DataBus test pass
564 23:34:42.788209 cs1 DataBus test pass
565 23:34:42.788690 cs0 AddrBus test pass
566 23:34:42.789140 cs1 AddrBus test pass
567 23:34:42.789590
568 23:34:42.793731 100bdlr_step_size ps== 471
569 23:34:42.794225 result report
570 23:34:42.799362 boot times 0Enable ddr reg access
571 23:34:42.804391 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 23:34:42.817519 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 23:34:43.477744 bl2z: ptr: 05129330, size: 00001e40
574 23:34:43.487767 0.0;M3 CHK:0;cm4_sp_mode 0
575 23:34:43.488350 MVN_1=0x00000000
576 23:34:43.488816 MVN_2=0x00000000
577 23:34:43.499327 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 23:34:43.499844 OPS=0x04
579 23:34:43.500346 ring efuse init
580 23:34:43.504975 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 23:34:43.505482 [0.017354 Inits done]
582 23:34:43.505940 secure task start!
583 23:34:43.511255 high task start!
584 23:34:43.511751 low task start!
585 23:34:43.512243 run into bl31
586 23:34:43.520825 NOTICE: BL31: v1.3(release):4fc40b1
587 23:34:43.528581 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 23:34:43.529091 NOTICE: BL31: G12A normal boot!
589 23:34:43.544345 NOTICE: BL31: BL33 decompress pass
590 23:34:43.549687 ERROR: Error initializing runtime service opteed_fast
591 23:34:44.913571 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 23:34:44.914208 bl2_stage_init 0x01
593 23:34:44.914689 bl2_stage_init 0x81
594 23:34:44.919151 hw id: 0x0000 - pwm id 0x01
595 23:34:44.919655 bl2_stage_init 0xc1
596 23:34:44.924654 bl2_stage_init 0x02
597 23:34:44.925152
598 23:34:44.925616 L0:00000000
599 23:34:44.926075 L1:00000703
600 23:34:44.926528 L2:00008067
601 23:34:44.926976 L3:15000000
602 23:34:44.930173 S1:00000000
603 23:34:44.930658 B2:20282000
604 23:34:44.931116 B1:a0f83180
605 23:34:44.931566
606 23:34:44.932050 TE: 66799
607 23:34:44.932506
608 23:34:44.935845 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 23:34:44.936371
610 23:34:44.941474 Board ID = 1
611 23:34:44.941967 Set cpu clk to 24M
612 23:34:44.942422 Set clk81 to 24M
613 23:34:44.947086 Use GP1_pll as DSU clk.
614 23:34:44.947583 DSU clk: 1200 Mhz
615 23:34:44.948067 CPU clk: 1200 MHz
616 23:34:44.952667 Set clk81 to 166.6M
617 23:34:44.958173 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 23:34:44.958652 board id: 1
619 23:34:44.965463 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 23:34:44.976434 fw parse done
621 23:34:44.981487 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 23:34:45.024647 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 23:34:45.036515 PIEI prepare done
624 23:34:45.037037 fastboot data load
625 23:34:45.037505 fastboot data verify
626 23:34:45.042096 verify result: 266
627 23:34:45.047727 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 23:34:45.048275 LPDDR4 probe
629 23:34:45.048737 ddr clk to 1584MHz
630 23:34:45.054787 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 23:34:45.093007
632 23:34:45.093522 dmc_version 0001
633 23:34:45.100387 Check phy result
634 23:34:45.106420 INFO : End of CA training
635 23:34:45.106904 INFO : End of initialization
636 23:34:45.112039 INFO : Training has run successfully!
637 23:34:45.112543 Check phy result
638 23:34:45.117636 INFO : End of initialization
639 23:34:45.118117 INFO : End of read enable training
640 23:34:45.123261 INFO : End of fine write leveling
641 23:34:45.128840 INFO : End of Write leveling coarse delay
642 23:34:45.129324 INFO : Training has run successfully!
643 23:34:45.129780 Check phy result
644 23:34:45.134455 INFO : End of initialization
645 23:34:45.134935 INFO : End of read dq deskew training
646 23:34:45.140042 INFO : End of MPR read delay center optimization
647 23:34:45.145611 INFO : End of write delay center optimization
648 23:34:45.151208 INFO : End of read delay center optimization
649 23:34:45.151685 INFO : End of max read latency training
650 23:34:45.156857 INFO : Training has run successfully!
651 23:34:45.157363 1D training succeed
652 23:34:45.165372 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 23:34:45.213475 Check phy result
654 23:34:45.214053 INFO : End of initialization
655 23:34:45.241102 INFO : End of 2D read delay Voltage center optimization
656 23:34:45.265884 INFO : End of 2D read delay Voltage center optimization
657 23:34:45.321717 INFO : End of 2D write delay Voltage center optimization
658 23:34:45.376597 INFO : End of 2D write delay Voltage center optimization
659 23:34:45.382015 INFO : Training has run successfully!
660 23:34:45.382530
661 23:34:45.382999 channel==0
662 23:34:45.387571 RxClkDly_Margin_A0==78 ps 8
663 23:34:45.388269 TxDqDly_Margin_A0==98 ps 10
664 23:34:45.393134 RxClkDly_Margin_A1==88 ps 9
665 23:34:45.393630 TxDqDly_Margin_A1==98 ps 10
666 23:34:45.394092 TrainedVREFDQ_A0==74
667 23:34:45.398747 TrainedVREFDQ_A1==75
668 23:34:45.399240 VrefDac_Margin_A0==24
669 23:34:45.399696 DeviceVref_Margin_A0==40
670 23:34:45.404567 VrefDac_Margin_A1==23
671 23:34:45.405079 DeviceVref_Margin_A1==39
672 23:34:45.405542
673 23:34:45.405998
674 23:34:45.410197 channel==1
675 23:34:45.410689 RxClkDly_Margin_A0==78 ps 8
676 23:34:45.411145 TxDqDly_Margin_A0==98 ps 10
677 23:34:45.415715 RxClkDly_Margin_A1==78 ps 8
678 23:34:45.416248 TxDqDly_Margin_A1==88 ps 9
679 23:34:45.421154 TrainedVREFDQ_A0==78
680 23:34:45.421682 TrainedVREFDQ_A1==78
681 23:34:45.422149 VrefDac_Margin_A0==22
682 23:34:45.426740 DeviceVref_Margin_A0==36
683 23:34:45.427240 VrefDac_Margin_A1==22
684 23:34:45.432511 DeviceVref_Margin_A1==36
685 23:34:45.433002
686 23:34:45.433461 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 23:34:45.433909
688 23:34:45.466018 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
689 23:34:45.466631 2D training succeed
690 23:34:45.471550 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 23:34:45.477138 auto size-- 65535DDR cs0 size: 2048MB
692 23:34:45.477630 DDR cs1 size: 2048MB
693 23:34:45.482733 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 23:34:45.483226 cs0 DataBus test pass
695 23:34:45.488474 cs1 DataBus test pass
696 23:34:45.488966 cs0 AddrBus test pass
697 23:34:45.489424 cs1 AddrBus test pass
698 23:34:45.489870
699 23:34:45.493899 100bdlr_step_size ps== 471
700 23:34:45.494394 result report
701 23:34:45.499545 boot times 0Enable ddr reg access
702 23:34:45.504311 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 23:34:45.518276 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 23:34:46.179949 bl2z: ptr: 05129330, size: 00001e40
705 23:34:46.188817 0.0;M3 CHK:0;cm4_sp_mode 0
706 23:34:46.189431 MVN_1=0x00000000
707 23:34:46.189721 MVN_2=0x00000000
708 23:34:46.197821 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 23:34:46.198595 OPS=0x04
710 23:34:46.199299 ring efuse init
711 23:34:46.200549 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 23:34:46.206964 [0.017354 Inits done]
713 23:34:46.207728 secure task start!
714 23:34:46.208242 high task start!
715 23:34:46.208640 low task start!
716 23:34:46.210251 run into bl31
717 23:34:46.220045 NOTICE: BL31: v1.3(release):4fc40b1
718 23:34:46.227053 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 23:34:46.227450 NOTICE: BL31: G12A normal boot!
720 23:34:46.243350 NOTICE: BL31: BL33 decompress pass
721 23:34:46.248107 ERROR: Error initializing runtime service opteed_fast
722 23:34:47.043077
723 23:34:47.043714
724 23:34:47.048566 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 23:34:47.049096
726 23:34:47.051912 Model: Libre Computer AML-S905D3-CC Solitude
727 23:34:47.197958 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 23:34:47.213572 DRAM: 2 GiB (effective 3.8 GiB)
729 23:34:47.315390 Core: 406 devices, 33 uclasses, devicetree: separate
730 23:34:47.320584 WDT: Not starting watchdog@f0d0
731 23:34:47.346135 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 23:34:47.358396 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 23:34:47.363087 ** Bad device specification mmc 0 **
734 23:34:47.373568 Card did not respond to voltage select! : -110
735 23:34:47.380850 ** Bad device specification mmc 0 **
736 23:34:47.381228 Couldn't find partition mmc 0
737 23:34:47.389417 Card did not respond to voltage select! : -110
738 23:34:47.394932 ** Bad device specification mmc 0 **
739 23:34:47.395297 Couldn't find partition mmc 0
740 23:34:47.399308 Error: could not access storage.
741 23:34:47.697558 Net: eth0: ethernet@ff3f0000
742 23:34:47.698200 starting USB...
743 23:34:47.942172 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 23:34:47.942846 Starting the controller
745 23:34:47.949106 USB XHCI 1.10
746 23:34:49.502606 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 23:34:49.510045 scanning usb for storage devices... 0 Storage Device(s) found
749 23:34:49.561309 Hit any key to stop autoboot: 1
750 23:34:49.562130 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 23:34:49.562497 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 23:34:49.562764 Setting prompt string to ['=>']
753 23:34:49.563038 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 23:34:49.565931 0
755 23:34:49.566539 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 23:34:49.667343 => setenv autoload no
758 23:34:49.667885 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 23:34:49.671336 setenv autoload no
761 23:34:49.772507 => setenv initrd_high 0xffffffff
762 23:34:49.773050 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
763 23:34:49.776481 setenv initrd_high 0xffffffff
765 23:34:49.877633 => setenv fdt_high 0xffffffff
766 23:34:49.878206 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 23:34:49.881832 setenv fdt_high 0xffffffff
769 23:34:49.983149 => dhcp
770 23:34:49.984495 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 23:34:49.987534 dhcp
772 23:34:50.543088 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
773 23:34:50.543842 Speed: 1000, full duplex
774 23:34:50.544449 BOOTP broadcast 1
775 23:34:50.551593 DHCP client bound to address 192.168.6.21 (8 ms)
777 23:34:50.653487 => setenv serverip 192.168.6.2
778 23:34:50.654454 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
779 23:34:50.657927 setenv serverip 192.168.6.2
781 23:34:50.759695 => tftpboot 0x01080000 968252/tftp-deploy-qvm2rtzj/kernel/uImage
782 23:34:50.760663 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
783 23:34:50.767312 tftpboot 0x01080000 968252/tftp-deploy-qvm2rtzj/kernel/uImage
784 23:34:50.767909 Speed: 1000, full duplex
785 23:34:50.768482 Using ethernet@ff3f0000 device
786 23:34:50.772857 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 23:34:50.778379 Filename '968252/tftp-deploy-qvm2rtzj/kernel/uImage'.
788 23:34:50.781733 Load address: 0x1080000
789 23:34:53.775119 Loading: *################################################## 43.6 MiB
790 23:34:53.775747 14.6 MiB/s
791 23:34:53.776222 done
792 23:34:53.779520 Bytes transferred = 45713984 (2b98a40 hex)
794 23:34:53.881173 => tftpboot 0x08000000 968252/tftp-deploy-qvm2rtzj/ramdisk/ramdisk.cpio.gz.uboot
795 23:34:53.881930 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
796 23:34:53.888635 tftpboot 0x08000000 968252/tftp-deploy-qvm2rtzj/ramdisk/ramdisk.cpio.gz.uboot
797 23:34:53.889143 Speed: 1000, full duplex
798 23:34:53.889549 Using ethernet@ff3f0000 device
799 23:34:53.894178 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
800 23:34:53.903975 Filename '968252/tftp-deploy-qvm2rtzj/ramdisk/ramdisk.cpio.gz.uboot'.
801 23:34:53.904368 Load address: 0x8000000
802 23:34:54.493650 Loading: *################# UDP wrong checksum 000000ff 00005e54
803 23:34:54.508854 UDP wrong checksum 000000ff 0000e746
804 23:34:55.519046 ################################ UDP wrong checksum 00000005 0000b95a
805 23:35:00.519435 T UDP wrong checksum 00000005 0000b95a
806 23:35:06.608493 T UDP wrong checksum 000000ff 00005ce2
807 23:35:06.754655 UDP wrong checksum 000000ff 0000ecd4
808 23:35:10.521426 T UDP wrong checksum 00000005 0000b95a
809 23:35:17.599112 T UDP wrong checksum 000000ff 0000ee55
810 23:35:17.605800 UDP wrong checksum 000000ff 00007b48
811 23:35:30.524658 T T UDP wrong checksum 00000005 0000b95a
812 23:35:50.530093 T T T T
813 23:35:50.530524 Retry count exceeded; starting again
815 23:35:50.532995 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
818 23:35:50.534786 end: 2.4 uboot-commands (duration 00:01:20) [common]
820 23:35:50.536174 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
822 23:35:50.537234 end: 2 uboot-action (duration 00:01:20) [common]
824 23:35:50.538731 Cleaning after the job
825 23:35:50.539281 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/ramdisk
826 23:35:50.540684 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/kernel
827 23:35:50.547940 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/dtb
828 23:35:50.549162 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/nfsrootfs
829 23:35:50.616370 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/968252/tftp-deploy-qvm2rtzj/modules
830 23:35:50.623150 start: 4.1 power-off (timeout 00:00:30) [common]
831 23:35:50.623808 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
832 23:35:50.670104 >> OK - accepted request
833 23:35:50.672171 Returned 0 in 0 seconds
834 23:35:50.773027 end: 4.1 power-off (duration 00:00:00) [common]
836 23:35:50.774225 start: 4.2 read-feedback (timeout 00:10:00) [common]
837 23:35:50.774892 Listened to connection for namespace 'common' for up to 1s
838 23:35:51.775876 Finalising connection for namespace 'common'
839 23:35:51.776655 Disconnecting from shell: Finalise
840 23:35:51.777181 =>
841 23:35:51.878191 end: 4.2 read-feedback (duration 00:00:01) [common]
842 23:35:51.878838 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/968252
843 23:35:54.492586 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/968252
844 23:35:54.493323 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.