Boot log: meson-sm1-s905d3-libretech-cc

    1 19:12:31.395440  lava-dispatcher, installed at version: 2024.01
    2 19:12:31.396256  start: 0 validate
    3 19:12:31.396740  Start time: 2024-11-10 19:12:31.396710+00:00 (UTC)
    4 19:12:31.397285  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 19:12:31.397828  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 19:12:31.435710  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 19:12:31.436356  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-318-ga9cda7c0ffed%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
    8 19:12:31.467626  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 19:12:31.468293  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-318-ga9cda7c0ffed%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 19:12:31.496430  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 19:12:31.496902  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 19:12:31.527124  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 19:12:31.527637  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-318-ga9cda7c0ffed%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
   14 19:12:31.563877  validate duration: 0.17
   16 19:12:31.564811  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 19:12:31.565198  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 19:12:31.565532  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 19:12:31.566182  Not decompressing ramdisk as can be used compressed.
   20 19:12:31.566672  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
   21 19:12:31.566991  saving as /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/ramdisk/initrd.cpio.gz
   22 19:12:31.567298  total size: 5628182 (5 MB)
   23 19:12:31.599464  progress   0 % (0 MB)
   24 19:12:31.603789  progress   5 % (0 MB)
   25 19:12:31.608159  progress  10 % (0 MB)
   26 19:12:31.612237  progress  15 % (0 MB)
   27 19:12:31.617273  progress  20 % (1 MB)
   28 19:12:31.622164  progress  25 % (1 MB)
   29 19:12:31.627229  progress  30 % (1 MB)
   30 19:12:31.632883  progress  35 % (1 MB)
   31 19:12:31.637284  progress  40 % (2 MB)
   32 19:12:31.644437  progress  45 % (2 MB)
   33 19:12:31.649698  progress  50 % (2 MB)
   34 19:12:31.656530  progress  55 % (2 MB)
   35 19:12:31.662210  progress  60 % (3 MB)
   36 19:12:31.666528  progress  65 % (3 MB)
   37 19:12:31.670761  progress  70 % (3 MB)
   38 19:12:31.675773  progress  75 % (4 MB)
   39 19:12:31.681077  progress  80 % (4 MB)
   40 19:12:31.685297  progress  85 % (4 MB)
   41 19:12:31.691006  progress  90 % (4 MB)
   42 19:12:31.696298  progress  95 % (5 MB)
   43 19:12:31.699755  progress 100 % (5 MB)
   44 19:12:31.700531  5 MB downloaded in 0.13 s (40.29 MB/s)
   45 19:12:31.701116  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 19:12:31.702020  end: 1.1 download-retry (duration 00:00:00) [common]
   48 19:12:31.702318  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 19:12:31.702589  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 19:12:31.703075  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-318-ga9cda7c0ffed/arm64/defconfig/gcc-12/kernel/Image
   51 19:12:31.703334  saving as /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/kernel/Image
   52 19:12:31.703544  total size: 45713920 (43 MB)
   53 19:12:31.703758  No compression specified
   54 19:12:31.739754  progress   0 % (0 MB)
   55 19:12:31.770300  progress   5 % (2 MB)
   56 19:12:31.806024  progress  10 % (4 MB)
   57 19:12:31.842568  progress  15 % (6 MB)
   58 19:12:31.878585  progress  20 % (8 MB)
   59 19:12:31.914778  progress  25 % (10 MB)
   60 19:12:31.949429  progress  30 % (13 MB)
   61 19:12:31.983730  progress  35 % (15 MB)
   62 19:12:32.017905  progress  40 % (17 MB)
   63 19:12:32.051582  progress  45 % (19 MB)
   64 19:12:32.085888  progress  50 % (21 MB)
   65 19:12:32.119775  progress  55 % (24 MB)
   66 19:12:32.154297  progress  60 % (26 MB)
   67 19:12:32.188193  progress  65 % (28 MB)
   68 19:12:32.224120  progress  70 % (30 MB)
   69 19:12:32.257774  progress  75 % (32 MB)
   70 19:12:32.291678  progress  80 % (34 MB)
   71 19:12:32.325511  progress  85 % (37 MB)
   72 19:12:32.359541  progress  90 % (39 MB)
   73 19:12:32.394378  progress  95 % (41 MB)
   74 19:12:32.428302  progress 100 % (43 MB)
   75 19:12:32.428988  43 MB downloaded in 0.73 s (60.10 MB/s)
   76 19:12:32.429562  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 19:12:32.430559  end: 1.2 download-retry (duration 00:00:01) [common]
   79 19:12:32.430892  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 19:12:32.431215  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 19:12:32.431762  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-318-ga9cda7c0ffed/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 19:12:32.432101  saving as /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 19:12:32.432355  total size: 53209 (0 MB)
   84 19:12:32.432606  No compression specified
   85 19:12:32.468970  progress  61 % (0 MB)
   86 19:12:32.469812  progress 100 % (0 MB)
   87 19:12:32.470365  0 MB downloaded in 0.04 s (1.34 MB/s)
   88 19:12:32.470866  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 19:12:32.471694  end: 1.3 download-retry (duration 00:00:00) [common]
   91 19:12:32.471965  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 19:12:32.472268  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 19:12:32.472730  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
   94 19:12:32.472977  saving as /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/nfsrootfs/full.rootfs.tar
   95 19:12:32.473214  total size: 107552908 (102 MB)
   96 19:12:32.473435  Using unxz to decompress xz
   97 19:12:32.510305  progress   0 % (0 MB)
   98 19:12:33.163433  progress   5 % (5 MB)
   99 19:12:33.887822  progress  10 % (10 MB)
  100 19:12:34.615664  progress  15 % (15 MB)
  101 19:12:35.368065  progress  20 % (20 MB)
  102 19:12:35.942335  progress  25 % (25 MB)
  103 19:12:36.563828  progress  30 % (30 MB)
  104 19:12:37.308546  progress  35 % (35 MB)
  105 19:12:37.656164  progress  40 % (41 MB)
  106 19:12:38.095027  progress  45 % (46 MB)
  107 19:12:38.798997  progress  50 % (51 MB)
  108 19:12:39.500692  progress  55 % (56 MB)
  109 19:12:40.258849  progress  60 % (61 MB)
  110 19:12:41.016954  progress  65 % (66 MB)
  111 19:12:41.757100  progress  70 % (71 MB)
  112 19:12:42.525409  progress  75 % (76 MB)
  113 19:12:43.206668  progress  80 % (82 MB)
  114 19:12:43.923045  progress  85 % (87 MB)
  115 19:12:44.719765  progress  90 % (92 MB)
  116 19:12:45.903896  progress  95 % (97 MB)
  117 19:12:46.676547  progress 100 % (102 MB)
  118 19:12:46.689269  102 MB downloaded in 14.22 s (7.22 MB/s)
  119 19:12:46.689868  end: 1.4.1 http-download (duration 00:00:14) [common]
  121 19:12:46.690697  end: 1.4 download-retry (duration 00:00:14) [common]
  122 19:12:46.690964  start: 1.5 download-retry (timeout 00:09:45) [common]
  123 19:12:46.691228  start: 1.5.1 http-download (timeout 00:09:45) [common]
  124 19:12:46.691683  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-318-ga9cda7c0ffed/arm64/defconfig/gcc-12/modules.tar.xz
  125 19:12:46.691941  saving as /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/modules/modules.tar
  126 19:12:46.692398  total size: 11611460 (11 MB)
  127 19:12:46.692818  Using unxz to decompress xz
  128 19:12:46.733046  progress   0 % (0 MB)
  129 19:12:46.813012  progress   5 % (0 MB)
  130 19:12:46.892052  progress  10 % (1 MB)
  131 19:12:46.996711  progress  15 % (1 MB)
  132 19:12:47.096815  progress  20 % (2 MB)
  133 19:12:47.181783  progress  25 % (2 MB)
  134 19:12:47.260691  progress  30 % (3 MB)
  135 19:12:47.342405  progress  35 % (3 MB)
  136 19:12:47.416933  progress  40 % (4 MB)
  137 19:12:47.496737  progress  45 % (5 MB)
  138 19:12:47.584068  progress  50 % (5 MB)
  139 19:12:47.663661  progress  55 % (6 MB)
  140 19:12:47.753990  progress  60 % (6 MB)
  141 19:12:47.839252  progress  65 % (7 MB)
  142 19:12:47.922729  progress  70 % (7 MB)
  143 19:12:48.002509  progress  75 % (8 MB)
  144 19:12:48.087892  progress  80 % (8 MB)
  145 19:12:48.171546  progress  85 % (9 MB)
  146 19:12:48.256149  progress  90 % (9 MB)
  147 19:12:48.340556  progress  95 % (10 MB)
  148 19:12:48.423380  progress 100 % (11 MB)
  149 19:12:48.435775  11 MB downloaded in 1.74 s (6.35 MB/s)
  150 19:12:48.436837  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 19:12:48.438647  end: 1.5 download-retry (duration 00:00:02) [common]
  153 19:12:48.439264  start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
  154 19:12:48.439856  start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
  155 19:12:59.346452  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/972004/extract-nfsrootfs-dqg56gq_
  156 19:12:59.347063  end: 1.6.1 extract-nfsrootfs (duration 00:00:11) [common]
  157 19:12:59.347348  start: 1.6.2 lava-overlay (timeout 00:09:32) [common]
  158 19:12:59.348067  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd
  159 19:12:59.348547  makedir: /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin
  160 19:12:59.348878  makedir: /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/tests
  161 19:12:59.349199  makedir: /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/results
  162 19:12:59.349533  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-add-keys
  163 19:12:59.350064  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-add-sources
  164 19:12:59.350564  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-background-process-start
  165 19:12:59.351053  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-background-process-stop
  166 19:12:59.351581  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-common-functions
  167 19:12:59.352090  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-echo-ipv4
  168 19:12:59.352585  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-install-packages
  169 19:12:59.353068  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-installed-packages
  170 19:12:59.353537  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-os-build
  171 19:12:59.354005  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-probe-channel
  172 19:12:59.354476  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-probe-ip
  173 19:12:59.354941  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-target-ip
  174 19:12:59.355408  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-target-mac
  175 19:12:59.355879  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-target-storage
  176 19:12:59.356398  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-test-case
  177 19:12:59.356878  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-test-event
  178 19:12:59.357343  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-test-feedback
  179 19:12:59.357807  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-test-raise
  180 19:12:59.358298  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-test-reference
  181 19:12:59.358784  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-test-runner
  182 19:12:59.359263  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-test-set
  183 19:12:59.359729  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-test-shell
  184 19:12:59.360247  Updating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-install-packages (oe)
  185 19:12:59.360845  Updating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/bin/lava-installed-packages (oe)
  186 19:12:59.361300  Creating /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/environment
  187 19:12:59.361671  LAVA metadata
  188 19:12:59.361924  - LAVA_JOB_ID=972004
  189 19:12:59.362138  - LAVA_DISPATCHER_IP=192.168.6.2
  190 19:12:59.362496  start: 1.6.2.1 ssh-authorize (timeout 00:09:32) [common]
  191 19:12:59.363437  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 19:12:59.363743  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:32) [common]
  193 19:12:59.363949  skipped lava-vland-overlay
  194 19:12:59.364216  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 19:12:59.364471  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:32) [common]
  196 19:12:59.364688  skipped lava-multinode-overlay
  197 19:12:59.364926  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 19:12:59.365174  start: 1.6.2.4 test-definition (timeout 00:09:32) [common]
  199 19:12:59.365423  Loading test definitions
  200 19:12:59.365699  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:32) [common]
  201 19:12:59.365919  Using /lava-972004 at stage 0
  202 19:12:59.367103  uuid=972004_1.6.2.4.1 testdef=None
  203 19:12:59.367402  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 19:12:59.367661  start: 1.6.2.4.2 test-overlay (timeout 00:09:32) [common]
  205 19:12:59.369470  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 19:12:59.370247  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:32) [common]
  208 19:12:59.372480  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 19:12:59.373299  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:32) [common]
  211 19:12:59.375440  runner path: /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/0/tests/0_dmesg test_uuid 972004_1.6.2.4.1
  212 19:12:59.376016  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 19:12:59.376777  Creating lava-test-runner.conf files
  215 19:12:59.376977  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/972004/lava-overlay-30j8asdd/lava-972004/0 for stage 0
  216 19:12:59.377317  - 0_dmesg
  217 19:12:59.377653  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 19:12:59.377922  start: 1.6.2.5 compress-overlay (timeout 00:09:32) [common]
  219 19:12:59.399657  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 19:12:59.400087  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:32) [common]
  221 19:12:59.400357  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 19:12:59.400623  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 19:12:59.400881  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:32) [common]
  224 19:13:00.057393  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 19:13:00.057864  start: 1.6.4 extract-modules (timeout 00:09:32) [common]
  226 19:13:00.058131  extracting modules file /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/972004/extract-nfsrootfs-dqg56gq_
  227 19:13:01.527201  extracting modules file /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/972004/extract-overlay-ramdisk-f9ojisd0/ramdisk
  228 19:13:02.948684  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  229 19:13:02.949158  start: 1.6.5 apply-overlay-tftp (timeout 00:09:29) [common]
  230 19:13:02.949438  [common] Applying overlay to NFS
  231 19:13:02.949651  [common] Applying overlay /var/lib/lava/dispatcher/tmp/972004/compress-overlay-bty5zmb6/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/972004/extract-nfsrootfs-dqg56gq_
  232 19:13:02.978761  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 19:13:02.979158  start: 1.6.6 prepare-kernel (timeout 00:09:29) [common]
  234 19:13:02.979430  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:29) [common]
  235 19:13:02.979657  Converting downloaded kernel to a uImage
  236 19:13:02.979966  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/kernel/Image /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/kernel/uImage
  237 19:13:03.456093  output: Image Name:   
  238 19:13:03.456523  output: Created:      Sun Nov 10 19:13:02 2024
  239 19:13:03.456737  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 19:13:03.456943  output: Data Size:    45713920 Bytes = 44642.50 KiB = 43.60 MiB
  241 19:13:03.457145  output: Load Address: 01080000
  242 19:13:03.457345  output: Entry Point:  01080000
  243 19:13:03.457544  output: 
  244 19:13:03.457877  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  245 19:13:03.458139  end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
  246 19:13:03.458407  start: 1.6.7 configure-preseed-file (timeout 00:09:28) [common]
  247 19:13:03.458658  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 19:13:03.458915  start: 1.6.8 compress-ramdisk (timeout 00:09:28) [common]
  249 19:13:03.459171  Building ramdisk /var/lib/lava/dispatcher/tmp/972004/extract-overlay-ramdisk-f9ojisd0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/972004/extract-overlay-ramdisk-f9ojisd0/ramdisk
  250 19:13:05.648482  >> 166829 blocks

  251 19:13:13.488417  Adding RAMdisk u-boot header.
  252 19:13:13.488871  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/972004/extract-overlay-ramdisk-f9ojisd0/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/972004/extract-overlay-ramdisk-f9ojisd0/ramdisk.cpio.gz.uboot
  253 19:13:13.758423  output: Image Name:   
  254 19:13:13.758934  output: Created:      Sun Nov 10 19:13:13 2024
  255 19:13:13.759194  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 19:13:13.759448  output: Data Size:    23435643 Bytes = 22886.37 KiB = 22.35 MiB
  257 19:13:13.759696  output: Load Address: 00000000
  258 19:13:13.759936  output: Entry Point:  00000000
  259 19:13:13.760515  output: 
  260 19:13:13.761881  rename /var/lib/lava/dispatcher/tmp/972004/extract-overlay-ramdisk-f9ojisd0/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/ramdisk/ramdisk.cpio.gz.uboot
  261 19:13:13.762814  end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
  262 19:13:13.763519  end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
  263 19:13:13.764238  start: 1.7 lxc-create-udev-rule-action (timeout 00:09:18) [common]
  264 19:13:13.764843  No LXC device requested
  265 19:13:13.765502  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 19:13:13.766151  start: 1.8 deploy-device-env (timeout 00:09:18) [common]
  267 19:13:13.766789  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 19:13:13.767323  Checking files for TFTP limit of 4294967296 bytes.
  269 19:13:13.770814  end: 1 tftp-deploy (duration 00:00:42) [common]
  270 19:13:13.771578  start: 2 uboot-action (timeout 00:05:00) [common]
  271 19:13:13.772332  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 19:13:13.772987  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 19:13:13.773648  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 19:13:13.774334  Using kernel file from prepare-kernel: 972004/tftp-deploy-k5o04qsz/kernel/uImage
  275 19:13:13.775155  substitutions:
  276 19:13:13.775676  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 19:13:13.776236  - {DTB_ADDR}: 0x01070000
  278 19:13:13.776749  - {DTB}: 972004/tftp-deploy-k5o04qsz/dtb/meson-sm1-s905d3-libretech-cc.dtb
  279 19:13:13.777256  - {INITRD}: 972004/tftp-deploy-k5o04qsz/ramdisk/ramdisk.cpio.gz.uboot
  280 19:13:13.777763  - {KERNEL_ADDR}: 0x01080000
  281 19:13:13.778269  - {KERNEL}: 972004/tftp-deploy-k5o04qsz/kernel/uImage
  282 19:13:13.778776  - {LAVA_MAC}: None
  283 19:13:13.779348  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/972004/extract-nfsrootfs-dqg56gq_
  284 19:13:13.779866  - {NFS_SERVER_IP}: 192.168.6.2
  285 19:13:13.780552  - {PRESEED_CONFIG}: None
  286 19:13:13.781067  - {PRESEED_LOCAL}: None
  287 19:13:13.781572  - {RAMDISK_ADDR}: 0x08000000
  288 19:13:13.782074  - {RAMDISK}: 972004/tftp-deploy-k5o04qsz/ramdisk/ramdisk.cpio.gz.uboot
  289 19:13:13.782574  - {ROOT_PART}: None
  290 19:13:13.783074  - {ROOT}: None
  291 19:13:13.783575  - {SERVER_IP}: 192.168.6.2
  292 19:13:13.784097  - {TEE_ADDR}: 0x83000000
  293 19:13:13.784601  - {TEE}: None
  294 19:13:13.785104  Parsed boot commands:
  295 19:13:13.785586  - setenv autoload no
  296 19:13:13.786083  - setenv initrd_high 0xffffffff
  297 19:13:13.786582  - setenv fdt_high 0xffffffff
  298 19:13:13.787068  - dhcp
  299 19:13:13.787564  - setenv serverip 192.168.6.2
  300 19:13:13.788084  - tftpboot 0x01080000 972004/tftp-deploy-k5o04qsz/kernel/uImage
  301 19:13:13.788589  - tftpboot 0x08000000 972004/tftp-deploy-k5o04qsz/ramdisk/ramdisk.cpio.gz.uboot
  302 19:13:13.789094  - tftpboot 0x01070000 972004/tftp-deploy-k5o04qsz/dtb/meson-sm1-s905d3-libretech-cc.dtb
  303 19:13:13.789595  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/972004/extract-nfsrootfs-dqg56gq_,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 19:13:13.790107  - bootm 0x01080000 0x08000000 0x01070000
  305 19:13:13.790774  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 19:13:13.792741  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 19:13:13.793289  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  309 19:13:13.809576  Setting prompt string to ['lava-test: # ']
  310 19:13:13.811504  end: 2.3 connect-device (duration 00:00:00) [common]
  311 19:13:13.812359  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 19:13:13.813083  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 19:13:13.814183  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 19:13:13.815636  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  315 19:13:13.850988  >> OK - accepted request

  316 19:13:13.853103  Returned 0 in 0 seconds
  317 19:13:13.954598  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 19:13:13.956960  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 19:13:13.957748  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 19:13:13.958402  Setting prompt string to ['Hit any key to stop autoboot']
  322 19:13:13.958999  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 19:13:13.961048  Trying 192.168.56.21...
  324 19:13:13.961723  Connected to conserv1.
  325 19:13:13.962313  Escape character is '^]'.
  326 19:13:13.962983  
  327 19:13:13.963539  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
  328 19:13:13.964144  
  329 19:13:21.152676  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  330 19:13:21.153093  bl2_stage_init 0x01
  331 19:13:21.153312  bl2_stage_init 0x81
  332 19:13:21.157926  hw id: 0x0000 - pwm id 0x01
  333 19:13:21.158216  bl2_stage_init 0xc1
  334 19:13:21.163511  bl2_stage_init 0x02
  335 19:13:21.163789  
  336 19:13:21.164155  L0:00000000
  337 19:13:21.164399  L1:00000703
  338 19:13:21.164604  L2:00008067
  339 19:13:21.164812  L3:15000000
  340 19:13:21.169119  S1:00000000
  341 19:13:21.169406  B2:20282000
  342 19:13:21.169618  B1:a0f83180
  343 19:13:21.169824  
  344 19:13:21.170028  TE: 68707
  345 19:13:21.170232  
  346 19:13:21.174653  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  347 19:13:21.174942  
  348 19:13:21.180289  Board ID = 1
  349 19:13:21.180573  Set cpu clk to 24M
  350 19:13:21.181635  Set clk81 to 24M
  351 19:13:21.185927  Use GP1_pll as DSU clk.
  352 19:13:21.186428  DSU clk: 1200 Mhz
  353 19:13:21.186887  CPU clk: 1200 MHz
  354 19:13:21.191521  Set clk81 to 166.6M
  355 19:13:21.196902  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  356 19:13:21.197398  board id: 1
  357 19:13:21.204168  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 19:13:21.215051  fw parse done
  359 19:13:21.221012  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 19:13:21.264165  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 19:13:21.275325  PIEI prepare done
  362 19:13:21.275819  fastboot data load
  363 19:13:21.276356  fastboot data verify
  364 19:13:21.280913  verify result: 266
  365 19:13:21.286417  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  366 19:13:21.286921  LPDDR4 probe
  367 19:13:21.287393  ddr clk to 1584MHz
  368 19:13:21.293707  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 19:13:21.331810  
  370 19:13:21.332385  dmc_version 0001
  371 19:13:21.339240  Check phy result
  372 19:13:21.345305  INFO : End of CA training
  373 19:13:21.345877  INFO : End of initialization
  374 19:13:21.350855  INFO : Training has run successfully!
  375 19:13:21.351422  Check phy result
  376 19:13:21.356437  INFO : End of initialization
  377 19:13:21.357000  INFO : End of read enable training
  378 19:13:21.359887  INFO : End of fine write leveling
  379 19:13:21.365498  INFO : End of Write leveling coarse delay
  380 19:13:21.371056  INFO : Training has run successfully!
  381 19:13:21.371603  Check phy result
  382 19:13:21.372131  INFO : End of initialization
  383 19:13:21.376840  INFO : End of read dq deskew training
  384 19:13:21.380093  INFO : End of MPR read delay center optimization
  385 19:13:21.385681  INFO : End of write delay center optimization
  386 19:13:21.391304  INFO : End of read delay center optimization
  387 19:13:21.391833  INFO : End of max read latency training
  388 19:13:21.396944  INFO : Training has run successfully!
  389 19:13:21.397440  1D training succeed
  390 19:13:21.404980  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 19:13:21.453244  Check phy result
  392 19:13:21.453882  INFO : End of initialization
  393 19:13:21.480586  INFO : End of 2D read delay Voltage center optimization
  394 19:13:21.504907  INFO : End of 2D read delay Voltage center optimization
  395 19:13:21.561566  INFO : End of 2D write delay Voltage center optimization
  396 19:13:21.615487  INFO : End of 2D write delay Voltage center optimization
  397 19:13:21.620939  INFO : Training has run successfully!
  398 19:13:21.621512  
  399 19:13:21.621984  channel==0
  400 19:13:21.626549  RxClkDly_Margin_A0==88 ps 9
  401 19:13:21.627055  TxDqDly_Margin_A0==98 ps 10
  402 19:13:21.629928  RxClkDly_Margin_A1==88 ps 9
  403 19:13:21.630424  TxDqDly_Margin_A1==98 ps 10
  404 19:13:21.635487  TrainedVREFDQ_A0==74
  405 19:13:21.636006  TrainedVREFDQ_A1==75
  406 19:13:21.636479  VrefDac_Margin_A0==23
  407 19:13:21.641886  DeviceVref_Margin_A0==40
  408 19:13:21.642399  VrefDac_Margin_A1==23
  409 19:13:21.646736  DeviceVref_Margin_A1==39
  410 19:13:21.647289  
  411 19:13:21.647755  
  412 19:13:21.648307  channel==1
  413 19:13:21.648784  RxClkDly_Margin_A0==78 ps 8
  414 19:13:21.652247  TxDqDly_Margin_A0==98 ps 10
  415 19:13:21.652745  RxClkDly_Margin_A1==78 ps 8
  416 19:13:21.658022  TxDqDly_Margin_A1==88 ps 9
  417 19:13:21.658584  TrainedVREFDQ_A0==78
  418 19:13:21.659060  TrainedVREFDQ_A1==76
  419 19:13:21.663515  VrefDac_Margin_A0==22
  420 19:13:21.664065  DeviceVref_Margin_A0==36
  421 19:13:21.669090  VrefDac_Margin_A1==22
  422 19:13:21.669618  DeviceVref_Margin_A1==38
  423 19:13:21.670068  
  424 19:13:21.674756   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 19:13:21.675257  
  426 19:13:21.702974  soc_vref_reg_value 0x 00000019 00000018 00000019 00000017 00000018 00000015 00000018 00000016 00000018 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000060
  427 19:13:21.708294  2D training succeed
  428 19:13:21.714070  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 19:13:21.714579  auto size-- 65535DDR cs0 size: 2048MB
  430 19:13:21.719460  DDR cs1 size: 2048MB
  431 19:13:21.719957  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 19:13:21.725496  cs0 DataBus test pass
  433 19:13:21.726048  cs1 DataBus test pass
  434 19:13:21.726514  cs0 AddrBus test pass
  435 19:13:21.730801  cs1 AddrBus test pass
  436 19:13:21.731334  
  437 19:13:21.731793  100bdlr_step_size ps== 471
  438 19:13:21.732293  result report
  439 19:13:21.736426  boot times 0Enable ddr reg access
  440 19:13:21.743928  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 19:13:21.756953  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  442 19:13:22.416894  bl2z: ptr: 05129330, size: 00001e40
  443 19:13:22.424132  0.0;M3 CHK:0;cm4_sp_mode 0
  444 19:13:22.424682  MVN_1=0x00000000
  445 19:13:22.425153  MVN_2=0x00000000
  446 19:13:22.435468  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  447 19:13:22.436030  OPS=0x04
  448 19:13:22.436505  ring efuse init
  449 19:13:22.441049  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  450 19:13:22.441559  [0.017354 Inits done]
  451 19:13:22.442013  secure task start!
  452 19:13:22.448962  high task start!
  453 19:13:22.449461  low task start!
  454 19:13:22.449916  run into bl31
  455 19:13:22.457551  NOTICE:  BL31: v1.3(release):4fc40b1
  456 19:13:22.465462  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  457 19:13:22.465978  NOTICE:  BL31: G12A normal boot!
  458 19:13:22.481073  NOTICE:  BL31: BL33 decompress pass
  459 19:13:22.486616  ERROR:   Error initializing runtime service opteed_fast
  460 19:13:25.205393  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  461 19:13:25.206105  bl2_stage_init 0x01
  462 19:13:25.206615  bl2_stage_init 0x81
  463 19:13:25.213132  hw id: 0x0000 - pwm id 0x01
  464 19:13:25.213761  bl2_stage_init 0xc1
  465 19:13:25.215859  bl2_stage_init 0x02
  466 19:13:25.216529  
  467 19:13:25.216992  L0:00000000
  468 19:13:25.217423  L1:00000703
  469 19:13:25.217857  L2:00008067
  470 19:13:25.221853  L3:15000000
  471 19:13:25.222354  S1:00000000
  472 19:13:25.222791  B2:20282000
  473 19:13:25.223219  B1:a0f83180
  474 19:13:25.223640  
  475 19:13:25.224102  TE: 70277
  476 19:13:25.224535  
  477 19:13:25.232851  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  478 19:13:25.233477  
  479 19:13:25.233919  Board ID = 1
  480 19:13:25.234347  Set cpu clk to 24M
  481 19:13:25.234795  Set clk81 to 24M
  482 19:13:25.238191  Use GP1_pll as DSU clk.
  483 19:13:25.238579  DSU clk: 1200 Mhz
  484 19:13:25.238796  CPU clk: 1200 MHz
  485 19:13:25.243744  Set clk81 to 166.6M
  486 19:13:25.249426  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  487 19:13:25.249768  board id: 1
  488 19:13:25.256998  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  489 19:13:25.267689  fw parse done
  490 19:13:25.273639  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  491 19:13:25.316350  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  492 19:13:25.327354  PIEI prepare done
  493 19:13:25.327791  fastboot data load
  494 19:13:25.328152  fastboot data verify
  495 19:13:25.332858  verify result: 266
  496 19:13:25.338506  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  497 19:13:25.338934  LPDDR4 probe
  498 19:13:25.339163  ddr clk to 1584MHz
  499 19:13:25.346680  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  500 19:13:25.384008  
  501 19:13:25.384536  dmc_version 0001
  502 19:13:25.390442  Check phy result
  503 19:13:25.396536  INFO : End of CA training
  504 19:13:25.397287  INFO : End of initialization
  505 19:13:25.409329  INFO : Training has run successfully!
  506 19:13:25.409758  Check phy result
  507 19:13:25.409967  INFO : End of initialization
  508 19:13:25.410170  INFO : End of read enable training
  509 19:13:25.414217  INFO : End of fine write leveling
  510 19:13:25.418840  INFO : End of Write leveling coarse delay
  511 19:13:25.419255  INFO : Training has run successfully!
  512 19:13:25.419471  Check phy result
  513 19:13:25.424599  INFO : End of initialization
  514 19:13:25.424899  INFO : End of read dq deskew training
  515 19:13:25.429981  INFO : End of MPR read delay center optimization
  516 19:13:25.436067  INFO : End of write delay center optimization
  517 19:13:25.440960  INFO : End of read delay center optimization
  518 19:13:25.441331  INFO : End of max read latency training
  519 19:13:25.446659  INFO : Training has run successfully!
  520 19:13:25.447052  1D training succeed
  521 19:13:25.455792  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  522 19:13:25.503550  Check phy result
  523 19:13:25.504009  INFO : End of initialization
  524 19:13:25.525866  INFO : End of 2D read delay Voltage center optimization
  525 19:13:25.544997  INFO : End of 2D read delay Voltage center optimization
  526 19:13:25.596712  INFO : End of 2D write delay Voltage center optimization
  527 19:13:25.646203  INFO : End of 2D write delay Voltage center optimization
  528 19:13:25.651599  INFO : Training has run successfully!
  529 19:13:25.652018  
  530 19:13:25.652252  channel==0
  531 19:13:25.657190  RxClkDly_Margin_A0==78 ps 8
  532 19:13:25.657539  TxDqDly_Margin_A0==98 ps 10
  533 19:13:25.662736  RxClkDly_Margin_A1==88 ps 9
  534 19:13:25.663052  TxDqDly_Margin_A1==88 ps 9
  535 19:13:25.663263  TrainedVREFDQ_A0==74
  536 19:13:25.668412  TrainedVREFDQ_A1==74
  537 19:13:25.668764  VrefDac_Margin_A0==24
  538 19:13:25.668990  DeviceVref_Margin_A0==40
  539 19:13:25.673986  VrefDac_Margin_A1==23
  540 19:13:25.674344  DeviceVref_Margin_A1==40
  541 19:13:25.674559  
  542 19:13:25.674783  
  543 19:13:25.675003  channel==1
  544 19:13:25.679554  RxClkDly_Margin_A0==78 ps 8
  545 19:13:25.679872  TxDqDly_Margin_A0==98 ps 10
  546 19:13:25.685123  RxClkDly_Margin_A1==88 ps 9
  547 19:13:25.685462  TxDqDly_Margin_A1==88 ps 9
  548 19:13:25.690741  TrainedVREFDQ_A0==78
  549 19:13:25.691083  TrainedVREFDQ_A1==77
  550 19:13:25.691296  VrefDac_Margin_A0==22
  551 19:13:25.696292  DeviceVref_Margin_A0==36
  552 19:13:25.696778  VrefDac_Margin_A1==22
  553 19:13:25.701945  DeviceVref_Margin_A1==37
  554 19:13:25.702443  
  555 19:13:25.702699   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  556 19:13:25.702918  
  557 19:13:25.735528  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  558 19:13:25.735952  2D training succeed
  559 19:13:25.741185  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  560 19:13:25.746758  auto size-- 65535DDR cs0 size: 2048MB
  561 19:13:25.747107  DDR cs1 size: 2048MB
  562 19:13:25.752385  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  563 19:13:25.752736  cs0 DataBus test pass
  564 19:13:25.760309  cs1 DataBus test pass
  565 19:13:25.760680  cs0 AddrBus test pass
  566 19:13:25.760897  cs1 AddrBus test pass
  567 19:13:25.761110  
  568 19:13:25.763560  100bdlr_step_size ps== 478
  569 19:13:25.763895  result report
  570 19:13:25.769179  boot times 0Enable ddr reg access
  571 19:13:25.773771  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  572 19:13:25.788223  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  573 19:13:26.442714  bl2z: ptr: 05129330, size: 00001e40
  574 19:13:26.450516  0.0;M3 CHK:0;cm4_sp_mode 0
  575 19:13:26.451067  MVN_1=0x00000000
  576 19:13:26.451339  MVN_2=0x00000000
  577 19:13:26.461984  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  578 19:13:26.462377  OPS=0x04
  579 19:13:26.462611  ring efuse init
  580 19:13:26.467779  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  581 19:13:26.468197  [0.017310 Inits done]
  582 19:13:26.468414  secure task start!
  583 19:13:26.475522  high task start!
  584 19:13:26.475928  low task start!
  585 19:13:26.476185  run into bl31
  586 19:13:26.483950  NOTICE:  BL31: v1.3(release):4fc40b1
  587 19:13:26.491811  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  588 19:13:26.492303  NOTICE:  BL31: G12A normal boot!
  589 19:13:26.507449  NOTICE:  BL31: BL33 decompress pass
  590 19:13:26.513096  ERROR:   Error initializing runtime service opteed_fast
  591 19:13:27.904627  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  592 19:13:27.905021  bl2_stage_init 0x01
  593 19:13:27.905247  bl2_stage_init 0x81
  594 19:13:27.910177  hw id: 0x0000 - pwm id 0x01
  595 19:13:27.910467  bl2_stage_init 0xc1
  596 19:13:27.915737  bl2_stage_init 0x02
  597 19:13:27.916161  
  598 19:13:27.916506  L0:00000000
  599 19:13:27.916835  L1:00000703
  600 19:13:27.917073  L2:00008067
  601 19:13:27.917281  L3:15000000
  602 19:13:27.921355  S1:00000000
  603 19:13:27.921636  B2:20282000
  604 19:13:27.921861  B1:a0f83180
  605 19:13:27.922078  
  606 19:13:27.922294  TE: 70860
  607 19:13:27.922507  
  608 19:13:27.926862  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  609 19:13:27.927130  
  610 19:13:27.932472  Board ID = 1
  611 19:13:27.932755  Set cpu clk to 24M
  612 19:13:27.932980  Set clk81 to 24M
  613 19:13:27.938078  Use GP1_pll as DSU clk.
  614 19:13:27.938346  DSU clk: 1200 Mhz
  615 19:13:27.938569  CPU clk: 1200 MHz
  616 19:13:27.943667  Set clk81 to 166.6M
  617 19:13:27.949260  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  618 19:13:27.949538  board id: 1
  619 19:13:27.956555  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  620 19:13:27.967491  fw parse done
  621 19:13:27.973393  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  622 19:13:28.016560  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  623 19:13:28.027610  PIEI prepare done
  624 19:13:28.027969  fastboot data load
  625 19:13:28.028229  fastboot data verify
  626 19:13:28.033202  verify result: 266
  627 19:13:28.038779  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  628 19:13:28.039057  LPDDR4 probe
  629 19:13:28.039271  ddr clk to 1584MHz
  630 19:13:28.046778  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  631 19:13:28.084687  
  632 19:13:28.085098  dmc_version 0001
  633 19:13:28.091699  Check phy result
  634 19:13:28.097623  INFO : End of CA training
  635 19:13:28.097988  INFO : End of initialization
  636 19:13:28.103224  INFO : Training has run successfully!
  637 19:13:28.103566  Check phy result
  638 19:13:28.108776  INFO : End of initialization
  639 19:13:28.109132  INFO : End of read enable training
  640 19:13:28.114416  INFO : End of fine write leveling
  641 19:13:28.120081  INFO : End of Write leveling coarse delay
  642 19:13:28.120680  INFO : Training has run successfully!
  643 19:13:28.121167  Check phy result
  644 19:13:28.125667  INFO : End of initialization
  645 19:13:28.126173  INFO : End of read dq deskew training
  646 19:13:28.131189  INFO : End of MPR read delay center optimization
  647 19:13:28.136892  INFO : End of write delay center optimization
  648 19:13:28.142515  INFO : End of read delay center optimization
  649 19:13:28.143021  INFO : End of max read latency training
  650 19:13:28.147973  INFO : Training has run successfully!
  651 19:13:28.148498  1D training succeed
  652 19:13:28.156377  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  653 19:13:28.204512  Check phy result
  654 19:13:28.205029  INFO : End of initialization
  655 19:13:28.232898  INFO : End of 2D read delay Voltage center optimization
  656 19:13:28.257032  INFO : End of 2D read delay Voltage center optimization
  657 19:13:28.313648  INFO : End of 2D write delay Voltage center optimization
  658 19:13:28.367592  INFO : End of 2D write delay Voltage center optimization
  659 19:13:28.373153  INFO : Training has run successfully!
  660 19:13:28.373743  
  661 19:13:28.374240  channel==0
  662 19:13:28.378721  RxClkDly_Margin_A0==78 ps 8
  663 19:13:28.379248  TxDqDly_Margin_A0==88 ps 9
  664 19:13:28.384369  RxClkDly_Margin_A1==88 ps 9
  665 19:13:28.384903  TxDqDly_Margin_A1==98 ps 10
  666 19:13:28.385348  TrainedVREFDQ_A0==74
  667 19:13:28.389983  TrainedVREFDQ_A1==74
  668 19:13:28.390474  VrefDac_Margin_A0==24
  669 19:13:28.390906  DeviceVref_Margin_A0==40
  670 19:13:28.395499  VrefDac_Margin_A1==23
  671 19:13:28.396003  DeviceVref_Margin_A1==40
  672 19:13:28.396454  
  673 19:13:28.396901  
  674 19:13:28.397338  channel==1
  675 19:13:28.401115  RxClkDly_Margin_A0==88 ps 9
  676 19:13:28.401619  TxDqDly_Margin_A0==98 ps 10
  677 19:13:28.406700  RxClkDly_Margin_A1==88 ps 9
  678 19:13:28.407172  TxDqDly_Margin_A1==88 ps 9
  679 19:13:28.412312  TrainedVREFDQ_A0==75
  680 19:13:28.412800  TrainedVREFDQ_A1==77
  681 19:13:28.413237  VrefDac_Margin_A0==22
  682 19:13:28.417899  DeviceVref_Margin_A0==39
  683 19:13:28.418374  VrefDac_Margin_A1==22
  684 19:13:28.423590  DeviceVref_Margin_A1==37
  685 19:13:28.424085  
  686 19:13:28.424529   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  687 19:13:28.424964  
  688 19:13:28.457073  soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  689 19:13:28.457611  2D training succeed
  690 19:13:28.462664  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  691 19:13:28.468307  auto size-- 65535DDR cs0 size: 2048MB
  692 19:13:28.468812  DDR cs1 size: 2048MB
  693 19:13:28.473903  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  694 19:13:28.474380  cs0 DataBus test pass
  695 19:13:28.479478  cs1 DataBus test pass
  696 19:13:28.479953  cs0 AddrBus test pass
  697 19:13:28.480451  cs1 AddrBus test pass
  698 19:13:28.480892  
  699 19:13:28.485075  100bdlr_step_size ps== 471
  700 19:13:28.485563  result report
  701 19:13:28.490710  boot times 0Enable ddr reg access
  702 19:13:28.495910  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  703 19:13:28.509719  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  704 19:13:29.168651  bl2z: ptr: 05129330, size: 00001e40
  705 19:13:29.177236  0.0;M3 CHK:0;cm4_sp_mode 0
  706 19:13:29.177535  MVN_1=0x00000000
  707 19:13:29.177750  MVN_2=0x00000000
  708 19:13:29.188727  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  709 19:13:29.189025  OPS=0x04
  710 19:13:29.189241  ring efuse init
  711 19:13:29.191876  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  712 19:13:29.197960  [0.017354 Inits done]
  713 19:13:29.198240  secure task start!
  714 19:13:29.198457  high task start!
  715 19:13:29.198663  low task start!
  716 19:13:29.202261  run into bl31
  717 19:13:29.210943  NOTICE:  BL31: v1.3(release):4fc40b1
  718 19:13:29.218835  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  719 19:13:29.219329  NOTICE:  BL31: G12A normal boot!
  720 19:13:29.234259  NOTICE:  BL31: BL33 decompress pass
  721 19:13:29.239890  ERROR:   Error initializing runtime service opteed_fast
  722 19:13:30.034350  
  723 19:13:30.034973  
  724 19:13:30.039697  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  725 19:13:30.040232  
  726 19:13:30.042362  Model: Libre Computer AML-S905D3-CC Solitude
  727 19:13:30.189064  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  728 19:13:30.205414  DRAM:  2 GiB (effective 3.8 GiB)
  729 19:13:30.306594  Core:  406 devices, 33 uclasses, devicetree: separate
  730 19:13:30.312531  WDT:   Not starting watchdog@f0d0
  731 19:13:30.337482  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  732 19:13:30.349625  Loading Environment from FAT... Card did not respond to voltage select! : -110
  733 19:13:30.354841  ** Bad device specification mmc 0 **
  734 19:13:30.364683  Card did not respond to voltage select! : -110
  735 19:13:30.372470  ** Bad device specification mmc 0 **
  736 19:13:30.373120  Couldn't find partition mmc 0
  737 19:13:30.381128  Card did not respond to voltage select! : -110
  738 19:13:30.386124  ** Bad device specification mmc 0 **
  739 19:13:30.386774  Couldn't find partition mmc 0
  740 19:13:30.391308  Error: could not access storage.
  741 19:13:30.687826  Net:   eth0: ethernet@ff3f0000
  742 19:13:30.688664  starting USB...
  743 19:13:30.932553  Bus usb@ff500000: Register 3000140 NbrPorts 3
  744 19:13:30.933319  Starting the controller
  745 19:13:30.939526  USB XHCI 1.10
  746 19:13:32.495900  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  747 19:13:32.504422         scanning usb for storage devices... 0 Storage Device(s) found
  749 19:13:32.556216  Hit any key to stop autoboot:  1 
  750 19:13:32.557369  end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
  751 19:13:32.558022  start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
  752 19:13:32.558509  Setting prompt string to ['=>']
  753 19:13:32.558999  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
  754 19:13:32.570244   0 
  755 19:13:32.571228  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  757 19:13:32.672501  => setenv autoload no
  758 19:13:32.673276  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  759 19:13:32.678177  setenv autoload no
  761 19:13:32.779694  => setenv initrd_high 0xffffffff
  762 19:13:32.780470  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  763 19:13:32.784991  setenv initrd_high 0xffffffff
  765 19:13:32.886460  => setenv fdt_high 0xffffffff
  766 19:13:32.887230  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  767 19:13:32.891963  setenv fdt_high 0xffffffff
  769 19:13:32.993531  => dhcp
  770 19:13:32.994272  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  771 19:13:32.997758  dhcp
  772 19:13:34.004517  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
  773 19:13:34.005156  Speed: 1000, full duplex
  774 19:13:34.005588  BOOTP broadcast 1
  775 19:13:34.017076  DHCP client bound to address 192.168.6.21 (12 ms)
  777 19:13:34.118695  => setenv serverip 192.168.6.2
  778 19:13:34.119475  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  779 19:13:34.123952  setenv serverip 192.168.6.2
  781 19:13:34.225538  => tftpboot 0x01080000 972004/tftp-deploy-k5o04qsz/kernel/uImage
  782 19:13:34.226313  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  783 19:13:34.232962  tftpboot 0x01080000 972004/tftp-deploy-k5o04qsz/kernel/uImage
  784 19:13:34.233512  Speed: 1000, full duplex
  785 19:13:34.233909  Using ethernet@ff3f0000 device
  786 19:13:34.238727  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  787 19:13:34.244077  Filename '972004/tftp-deploy-k5o04qsz/kernel/uImage'.
  788 19:13:34.248026  Load address: 0x1080000
  789 19:13:36.502062  Loading: *##################################### UDP wrong checksum 000000ff 0000d8fd
  790 19:13:36.537059  # UDP wrong checksum 000000ff 00005cf0
  791 19:13:37.175241  ############  43.6 MiB
  792 19:13:37.176283  	 14.9 MiB/s
  793 19:13:37.177007  done
  794 19:13:37.179594  Bytes transferred = 45713984 (2b98a40 hex)
  796 19:13:37.282012  => tftpboot 0x08000000 972004/tftp-deploy-k5o04qsz/ramdisk/ramdisk.cpio.gz.uboot
  797 19:13:37.283204  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
  798 19:13:37.290180  tftpboot 0x08000000 972004/tftp-deploy-k5o04qsz/ramdisk/ramdisk.cpio.gz.uboot
  799 19:13:37.291064  Speed: 1000, full duplex
  800 19:13:37.291761  Using ethernet@ff3f0000 device
  801 19:13:37.295619  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  802 19:13:37.305301  Filename '972004/tftp-deploy-k5o04qsz/ramdisk/ramdisk.cpio.gz.uboot'.
  803 19:13:37.305828  Load address: 0x8000000
  804 19:13:38.848844  Loading: *################################################# UDP wrong checksum 00000005 00000be9
  805 19:13:43.849313  T  UDP wrong checksum 00000005 00000be9
  806 19:13:53.851443  T T  UDP wrong checksum 00000005 00000be9
  807 19:13:56.391226   UDP wrong checksum 000000ff 0000ac22
  808 19:13:56.401430   UDP wrong checksum 000000ff 00004215
  809 19:14:13.855249  T T T T  UDP wrong checksum 00000005 00000be9
  810 19:14:19.221178  T  UDP wrong checksum 000000ff 0000a313
  811 19:14:19.239859   UDP wrong checksum 000000ff 00003706
  812 19:14:20.332344   UDP wrong checksum 000000ff 000073fe
  813 19:14:20.351276   UDP wrong checksum 000000ff 000008f1
  814 19:14:30.246459  T T  UDP wrong checksum 000000ff 00008d49
  815 19:14:30.259356   UDP wrong checksum 000000ff 0000243c
  816 19:14:33.858917  
  817 19:14:33.859561  Retry count exceeded; starting again
  819 19:14:33.861165  end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
  822 19:14:33.863214  end: 2.4 uboot-commands (duration 00:01:20) [common]
  824 19:14:33.865099  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
  826 19:14:33.866243  end: 2 uboot-action (duration 00:01:20) [common]
  828 19:14:33.867901  Cleaning after the job
  829 19:14:33.868532  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/ramdisk
  830 19:14:33.870133  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/kernel
  831 19:14:33.909220  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/dtb
  832 19:14:33.910624  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/nfsrootfs
  833 19:14:33.999797  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/972004/tftp-deploy-k5o04qsz/modules
  834 19:14:34.021392  start: 4.1 power-off (timeout 00:00:30) [common]
  835 19:14:34.022087  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  836 19:14:34.055091  >> OK - accepted request

  837 19:14:34.056915  Returned 0 in 0 seconds
  838 19:14:34.157724  end: 4.1 power-off (duration 00:00:00) [common]
  840 19:14:34.159354  start: 4.2 read-feedback (timeout 00:10:00) [common]
  841 19:14:34.161722  Listened to connection for namespace 'common' for up to 1s
  842 19:14:35.162665  Finalising connection for namespace 'common'
  843 19:14:35.163175  Disconnecting from shell: Finalise
  844 19:14:35.163456  => 
  845 19:14:35.264151  end: 4.2 read-feedback (duration 00:00:01) [common]
  846 19:14:35.264559  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/972004
  847 19:14:36.966040  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/972004
  848 19:14:36.966654  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.