Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 19:38:12.526288 lava-dispatcher, installed at version: 2024.01
2 19:38:12.527115 start: 0 validate
3 19:38:12.527601 Start time: 2024-11-10 19:38:12.527572+00:00 (UTC)
4 19:38:12.528182 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 19:38:12.528734 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 19:38:12.565540 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 19:38:12.566115 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-318-ga9cda7c0ffed%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 19:38:12.597290 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 19:38:12.598427 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-318-ga9cda7c0ffed%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 19:38:12.636780 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 19:38:12.637256 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 19:38:12.666125 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 19:38:12.666614 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-318-ga9cda7c0ffed%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 19:38:12.702579 validate duration: 0.18
16 19:38:12.703376 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 19:38:12.703698 start: 1.1 download-retry (timeout 00:10:00) [common]
18 19:38:12.704118 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 19:38:12.704751 Not decompressing ramdisk as can be used compressed.
20 19:38:12.705199 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 19:38:12.705463 saving as /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/ramdisk/initrd.cpio.gz
22 19:38:12.705727 total size: 5628169 (5 MB)
23 19:38:12.740166 progress 0 % (0 MB)
24 19:38:12.744822 progress 5 % (0 MB)
25 19:38:12.748996 progress 10 % (0 MB)
26 19:38:12.752724 progress 15 % (0 MB)
27 19:38:12.756883 progress 20 % (1 MB)
28 19:38:12.760963 progress 25 % (1 MB)
29 19:38:12.765141 progress 30 % (1 MB)
30 19:38:12.769304 progress 35 % (1 MB)
31 19:38:12.773027 progress 40 % (2 MB)
32 19:38:12.777179 progress 45 % (2 MB)
33 19:38:12.781002 progress 50 % (2 MB)
34 19:38:12.785124 progress 55 % (2 MB)
35 19:38:12.789217 progress 60 % (3 MB)
36 19:38:12.792941 progress 65 % (3 MB)
37 19:38:12.797058 progress 70 % (3 MB)
38 19:38:12.800628 progress 75 % (4 MB)
39 19:38:12.804613 progress 80 % (4 MB)
40 19:38:12.808191 progress 85 % (4 MB)
41 19:38:12.811793 progress 90 % (4 MB)
42 19:38:12.815460 progress 95 % (5 MB)
43 19:38:12.818742 progress 100 % (5 MB)
44 19:38:12.819399 5 MB downloaded in 0.11 s (47.23 MB/s)
45 19:38:12.819917 end: 1.1.1 http-download (duration 00:00:00) [common]
47 19:38:12.820825 end: 1.1 download-retry (duration 00:00:00) [common]
48 19:38:12.821122 start: 1.2 download-retry (timeout 00:10:00) [common]
49 19:38:12.821392 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 19:38:12.821870 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-318-ga9cda7c0ffed/arm64/defconfig/gcc-12/kernel/Image
51 19:38:12.822112 saving as /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/kernel/Image
52 19:38:12.822316 total size: 45713920 (43 MB)
53 19:38:12.822521 No compression specified
54 19:38:12.857298 progress 0 % (0 MB)
55 19:38:12.887720 progress 5 % (2 MB)
56 19:38:12.918238 progress 10 % (4 MB)
57 19:38:12.948977 progress 15 % (6 MB)
58 19:38:12.979122 progress 20 % (8 MB)
59 19:38:13.008754 progress 25 % (10 MB)
60 19:38:13.038889 progress 30 % (13 MB)
61 19:38:13.069254 progress 35 % (15 MB)
62 19:38:13.099116 progress 40 % (17 MB)
63 19:38:13.128848 progress 45 % (19 MB)
64 19:38:13.158692 progress 50 % (21 MB)
65 19:38:13.189263 progress 55 % (24 MB)
66 19:38:13.219486 progress 60 % (26 MB)
67 19:38:13.250183 progress 65 % (28 MB)
68 19:38:13.281459 progress 70 % (30 MB)
69 19:38:13.311136 progress 75 % (32 MB)
70 19:38:13.340751 progress 80 % (34 MB)
71 19:38:13.370470 progress 85 % (37 MB)
72 19:38:13.400209 progress 90 % (39 MB)
73 19:38:13.430102 progress 95 % (41 MB)
74 19:38:13.458974 progress 100 % (43 MB)
75 19:38:13.459525 43 MB downloaded in 0.64 s (68.42 MB/s)
76 19:38:13.460019 end: 1.2.1 http-download (duration 00:00:01) [common]
78 19:38:13.460846 end: 1.2 download-retry (duration 00:00:01) [common]
79 19:38:13.461120 start: 1.3 download-retry (timeout 00:09:59) [common]
80 19:38:13.461384 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 19:38:13.461863 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-318-ga9cda7c0ffed/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 19:38:13.462154 saving as /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 19:38:13.462362 total size: 53209 (0 MB)
84 19:38:13.462576 No compression specified
85 19:38:13.494851 progress 61 % (0 MB)
86 19:38:13.495762 progress 100 % (0 MB)
87 19:38:13.496361 0 MB downloaded in 0.03 s (1.49 MB/s)
88 19:38:13.496898 end: 1.3.1 http-download (duration 00:00:00) [common]
90 19:38:13.497834 end: 1.3 download-retry (duration 00:00:00) [common]
91 19:38:13.498175 start: 1.4 download-retry (timeout 00:09:59) [common]
92 19:38:13.498472 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 19:38:13.498951 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 19:38:13.499212 saving as /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/nfsrootfs/full.rootfs.tar
95 19:38:13.499451 total size: 120894716 (115 MB)
96 19:38:13.499674 Using unxz to decompress xz
97 19:38:13.532305 progress 0 % (0 MB)
98 19:38:14.337035 progress 5 % (5 MB)
99 19:38:15.187433 progress 10 % (11 MB)
100 19:38:15.985799 progress 15 % (17 MB)
101 19:38:16.732160 progress 20 % (23 MB)
102 19:38:17.360019 progress 25 % (28 MB)
103 19:38:18.204545 progress 30 % (34 MB)
104 19:38:19.005446 progress 35 % (40 MB)
105 19:38:19.371923 progress 40 % (46 MB)
106 19:38:19.744606 progress 45 % (51 MB)
107 19:38:20.480734 progress 50 % (57 MB)
108 19:38:21.381516 progress 55 % (63 MB)
109 19:38:22.166967 progress 60 % (69 MB)
110 19:38:22.929993 progress 65 % (74 MB)
111 19:38:23.712348 progress 70 % (80 MB)
112 19:38:24.545471 progress 75 % (86 MB)
113 19:38:25.339845 progress 80 % (92 MB)
114 19:38:26.104335 progress 85 % (98 MB)
115 19:38:26.972410 progress 90 % (103 MB)
116 19:38:27.763952 progress 95 % (109 MB)
117 19:38:28.600543 progress 100 % (115 MB)
118 19:38:28.614083 115 MB downloaded in 15.11 s (7.63 MB/s)
119 19:38:28.615054 end: 1.4.1 http-download (duration 00:00:15) [common]
121 19:38:28.616878 end: 1.4 download-retry (duration 00:00:15) [common]
122 19:38:28.617464 start: 1.5 download-retry (timeout 00:09:44) [common]
123 19:38:28.618039 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 19:38:28.618918 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-318-ga9cda7c0ffed/arm64/defconfig/gcc-12/modules.tar.xz
125 19:38:28.619430 saving as /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/modules/modules.tar
126 19:38:28.619888 total size: 11611460 (11 MB)
127 19:38:28.620415 Using unxz to decompress xz
128 19:38:28.673944 progress 0 % (0 MB)
129 19:38:28.741313 progress 5 % (0 MB)
130 19:38:28.815383 progress 10 % (1 MB)
131 19:38:28.911477 progress 15 % (1 MB)
132 19:38:29.004436 progress 20 % (2 MB)
133 19:38:29.084145 progress 25 % (2 MB)
134 19:38:29.160626 progress 30 % (3 MB)
135 19:38:29.240113 progress 35 % (3 MB)
136 19:38:29.313321 progress 40 % (4 MB)
137 19:38:29.390449 progress 45 % (5 MB)
138 19:38:29.477052 progress 50 % (5 MB)
139 19:38:29.555129 progress 55 % (6 MB)
140 19:38:29.640787 progress 60 % (6 MB)
141 19:38:29.721506 progress 65 % (7 MB)
142 19:38:29.802480 progress 70 % (7 MB)
143 19:38:29.881740 progress 75 % (8 MB)
144 19:38:29.966944 progress 80 % (8 MB)
145 19:38:30.047960 progress 85 % (9 MB)
146 19:38:30.130149 progress 90 % (9 MB)
147 19:38:30.207729 progress 95 % (10 MB)
148 19:38:30.284565 progress 100 % (11 MB)
149 19:38:30.296197 11 MB downloaded in 1.68 s (6.61 MB/s)
150 19:38:30.297135 end: 1.5.1 http-download (duration 00:00:02) [common]
152 19:38:30.298921 end: 1.5 download-retry (duration 00:00:02) [common]
153 19:38:30.299508 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 19:38:30.300139 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 19:38:47.316060 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/971990/extract-nfsrootfs-gz00kuai
156 19:38:47.316674 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 19:38:47.317010 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 19:38:47.317661 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9
159 19:38:47.318197 makedir: /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin
160 19:38:47.318650 makedir: /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/tests
161 19:38:47.319257 makedir: /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/results
162 19:38:47.319677 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-add-keys
163 19:38:47.320292 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-add-sources
164 19:38:47.320943 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-background-process-start
165 19:38:47.321491 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-background-process-stop
166 19:38:47.322035 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-common-functions
167 19:38:47.322543 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-echo-ipv4
168 19:38:47.323037 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-install-packages
169 19:38:47.323543 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-installed-packages
170 19:38:47.324079 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-os-build
171 19:38:47.324601 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-probe-channel
172 19:38:47.325105 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-probe-ip
173 19:38:47.325633 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-target-ip
174 19:38:47.326202 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-target-mac
175 19:38:47.326787 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-target-storage
176 19:38:47.327314 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-test-case
177 19:38:47.327836 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-test-event
178 19:38:47.328404 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-test-feedback
179 19:38:47.328924 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-test-raise
180 19:38:47.329424 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-test-reference
181 19:38:47.329930 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-test-runner
182 19:38:47.330443 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-test-set
183 19:38:47.331011 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-test-shell
184 19:38:47.331587 Updating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-add-keys (debian)
185 19:38:47.332220 Updating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-add-sources (debian)
186 19:38:47.332820 Updating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-install-packages (debian)
187 19:38:47.333353 Updating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-installed-packages (debian)
188 19:38:47.333881 Updating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/bin/lava-os-build (debian)
189 19:38:47.334347 Creating /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/environment
190 19:38:47.334738 LAVA metadata
191 19:38:47.335007 - LAVA_JOB_ID=971990
192 19:38:47.335224 - LAVA_DISPATCHER_IP=192.168.6.2
193 19:38:47.335616 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 19:38:47.336666 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 19:38:47.337005 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 19:38:47.337213 skipped lava-vland-overlay
197 19:38:47.337455 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 19:38:47.337710 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 19:38:47.337928 skipped lava-multinode-overlay
200 19:38:47.338172 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 19:38:47.338423 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 19:38:47.338673 Loading test definitions
203 19:38:47.338957 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 19:38:47.339180 Using /lava-971990 at stage 0
205 19:38:47.340365 uuid=971990_1.6.2.4.1 testdef=None
206 19:38:47.340682 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 19:38:47.340949 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 19:38:47.342631 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 19:38:47.343431 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 19:38:47.345493 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 19:38:47.346333 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 19:38:47.348523 runner path: /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/0/tests/0_timesync-off test_uuid 971990_1.6.2.4.1
215 19:38:47.349270 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 19:38:47.350130 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 19:38:47.350381 Using /lava-971990 at stage 0
219 19:38:47.350775 Fetching tests from https://github.com/kernelci/test-definitions.git
220 19:38:47.351079 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/0/tests/1_kselftest-alsa'
221 19:38:50.898147 Running '/usr/bin/git checkout kernelci.org
222 19:38:51.349865 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 19:38:51.351632 uuid=971990_1.6.2.4.5 testdef=None
224 19:38:51.352073 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 19:38:51.353026 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 19:38:51.356523 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 19:38:51.357556 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 19:38:51.362090 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 19:38:51.363146 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 19:38:51.367550 runner path: /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/0/tests/1_kselftest-alsa test_uuid 971990_1.6.2.4.5
234 19:38:51.367895 BOARD='meson-sm1-s905d3-libretech-cc'
235 19:38:51.368185 BRANCH='mainline'
236 19:38:51.368435 SKIPFILE='/dev/null'
237 19:38:51.368683 SKIP_INSTALL='True'
238 19:38:51.368927 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-318-ga9cda7c0ffed/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 19:38:51.369175 TST_CASENAME=''
240 19:38:51.369420 TST_CMDFILES='alsa'
241 19:38:51.370109 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 19:38:51.371094 Creating lava-test-runner.conf files
244 19:38:51.371355 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/971990/lava-overlay-xartsyr9/lava-971990/0 for stage 0
245 19:38:51.371858 - 0_timesync-off
246 19:38:51.372212 - 1_kselftest-alsa
247 19:38:51.372648 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 19:38:51.373013 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 19:39:15.490711 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 19:39:15.491156 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:57) [common]
251 19:39:15.491420 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 19:39:15.491692 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 19:39:15.491957 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:57) [common]
254 19:39:16.109892 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 19:39:16.110382 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 19:39:16.110657 extracting modules file /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/971990/extract-nfsrootfs-gz00kuai
257 19:39:17.484203 extracting modules file /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/971990/extract-overlay-ramdisk-96ix1kxy/ramdisk
258 19:39:18.910585 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 19:39:18.911069 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 19:39:18.911343 [common] Applying overlay to NFS
261 19:39:18.911556 [common] Applying overlay /var/lib/lava/dispatcher/tmp/971990/compress-overlay-t8pvhlk2/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/971990/extract-nfsrootfs-gz00kuai
262 19:39:21.728704 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 19:39:21.729191 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 19:39:21.729526 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 19:39:21.729806 Converting downloaded kernel to a uImage
266 19:39:21.730163 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/kernel/Image /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/kernel/uImage
267 19:39:22.324843 output: Image Name:
268 19:39:22.325258 output: Created: Sun Nov 10 19:39:21 2024
269 19:39:22.325487 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 19:39:22.325720 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 19:39:22.325933 output: Load Address: 01080000
272 19:39:22.326136 output: Entry Point: 01080000
273 19:39:22.326346 output:
274 19:39:22.326839 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 19:39:22.327170 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 19:39:22.327470 start: 1.6.7 configure-preseed-file (timeout 00:08:50) [common]
277 19:39:22.327744 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 19:39:22.328051 start: 1.6.8 compress-ramdisk (timeout 00:08:50) [common]
279 19:39:22.328329 Building ramdisk /var/lib/lava/dispatcher/tmp/971990/extract-overlay-ramdisk-96ix1kxy/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/971990/extract-overlay-ramdisk-96ix1kxy/ramdisk
280 19:39:24.840584 >> 166829 blocks
281 19:39:32.607134 Adding RAMdisk u-boot header.
282 19:39:32.607580 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/971990/extract-overlay-ramdisk-96ix1kxy/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/971990/extract-overlay-ramdisk-96ix1kxy/ramdisk.cpio.gz.uboot
283 19:39:32.862424 output: Image Name:
284 19:39:32.862844 output: Created: Sun Nov 10 19:39:32 2024
285 19:39:32.863275 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 19:39:32.863695 output: Data Size: 23435685 Bytes = 22886.41 KiB = 22.35 MiB
287 19:39:32.864152 output: Load Address: 00000000
288 19:39:32.864563 output: Entry Point: 00000000
289 19:39:32.864857 output:
290 19:39:32.865445 rename /var/lib/lava/dispatcher/tmp/971990/extract-overlay-ramdisk-96ix1kxy/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/ramdisk/ramdisk.cpio.gz.uboot
291 19:39:32.865954 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
292 19:39:32.866530 end: 1.6 prepare-tftp-overlay (duration 00:01:03) [common]
293 19:39:32.867090 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:40) [common]
294 19:39:32.867374 No LXC device requested
295 19:39:32.867652 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 19:39:32.867928 start: 1.8 deploy-device-env (timeout 00:08:40) [common]
297 19:39:32.868284 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 19:39:32.868726 Checking files for TFTP limit of 4294967296 bytes.
299 19:39:32.871465 end: 1 tftp-deploy (duration 00:01:20) [common]
300 19:39:32.872090 start: 2 uboot-action (timeout 00:05:00) [common]
301 19:39:32.872640 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 19:39:32.873151 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 19:39:32.873666 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 19:39:32.874199 Using kernel file from prepare-kernel: 971990/tftp-deploy-rxk4tpsk/kernel/uImage
305 19:39:32.874837 substitutions:
306 19:39:32.875251 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 19:39:32.875661 - {DTB_ADDR}: 0x01070000
308 19:39:32.876100 - {DTB}: 971990/tftp-deploy-rxk4tpsk/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 19:39:32.876510 - {INITRD}: 971990/tftp-deploy-rxk4tpsk/ramdisk/ramdisk.cpio.gz.uboot
310 19:39:32.876914 - {KERNEL_ADDR}: 0x01080000
311 19:39:32.877315 - {KERNEL}: 971990/tftp-deploy-rxk4tpsk/kernel/uImage
312 19:39:32.877874 - {LAVA_MAC}: None
313 19:39:32.878337 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/971990/extract-nfsrootfs-gz00kuai
314 19:39:32.878751 - {NFS_SERVER_IP}: 192.168.6.2
315 19:39:32.879149 - {PRESEED_CONFIG}: None
316 19:39:32.879549 - {PRESEED_LOCAL}: None
317 19:39:32.879948 - {RAMDISK_ADDR}: 0x08000000
318 19:39:32.880375 - {RAMDISK}: 971990/tftp-deploy-rxk4tpsk/ramdisk/ramdisk.cpio.gz.uboot
319 19:39:32.880775 - {ROOT_PART}: None
320 19:39:32.881172 - {ROOT}: None
321 19:39:32.881564 - {SERVER_IP}: 192.168.6.2
322 19:39:32.881954 - {TEE_ADDR}: 0x83000000
323 19:39:32.882344 - {TEE}: None
324 19:39:32.882738 Parsed boot commands:
325 19:39:32.883120 - setenv autoload no
326 19:39:32.883509 - setenv initrd_high 0xffffffff
327 19:39:32.883898 - setenv fdt_high 0xffffffff
328 19:39:32.884348 - dhcp
329 19:39:32.884744 - setenv serverip 192.168.6.2
330 19:39:32.885138 - tftpboot 0x01080000 971990/tftp-deploy-rxk4tpsk/kernel/uImage
331 19:39:32.885534 - tftpboot 0x08000000 971990/tftp-deploy-rxk4tpsk/ramdisk/ramdisk.cpio.gz.uboot
332 19:39:32.885926 - tftpboot 0x01070000 971990/tftp-deploy-rxk4tpsk/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 19:39:32.886318 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/971990/extract-nfsrootfs-gz00kuai,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 19:39:32.886725 - bootm 0x01080000 0x08000000 0x01070000
335 19:39:32.887241 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 19:39:32.888790 start: 2.3 connect-device (timeout 00:05:00) [common]
338 19:39:32.889217 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 19:39:32.904919 Setting prompt string to ['lava-test: # ']
340 19:39:32.906484 end: 2.3 connect-device (duration 00:00:00) [common]
341 19:39:32.907142 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 19:39:32.907737 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 19:39:32.908341 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 19:39:32.909489 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 19:39:32.944552 >> OK - accepted request
346 19:39:32.946377 Returned 0 in 0 seconds
347 19:39:33.047290 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 19:39:33.049076 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 19:39:33.049657 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 19:39:33.050180 Setting prompt string to ['Hit any key to stop autoboot']
352 19:39:33.050648 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 19:39:33.052288 Trying 192.168.56.21...
354 19:39:33.052793 Connected to conserv1.
355 19:39:33.053221 Escape character is '^]'.
356 19:39:33.053649
357 19:39:33.054077 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 19:39:33.054518
359 19:39:40.473923 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 19:39:40.474335 bl2_stage_init 0x01
361 19:39:40.474590 bl2_stage_init 0x81
362 19:39:40.479489 hw id: 0x0000 - pwm id 0x01
363 19:39:40.479788 bl2_stage_init 0xc1
364 19:39:40.485487 bl2_stage_init 0x02
365 19:39:40.485798
366 19:39:40.486047 L0:00000000
367 19:39:40.486376 L1:00000703
368 19:39:40.486641 L2:00008067
369 19:39:40.486887 L3:15000000
370 19:39:40.490630 S1:00000000
371 19:39:40.490940 B2:20282000
372 19:39:40.491173 B1:a0f83180
373 19:39:40.491405
374 19:39:40.491641 TE: 70007
375 19:39:40.491883
376 19:39:40.496204 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 19:39:40.496499
378 19:39:40.501945 Board ID = 1
379 19:39:40.502253 Set cpu clk to 24M
380 19:39:40.502561 Set clk81 to 24M
381 19:39:40.507388 Use GP1_pll as DSU clk.
382 19:39:40.507706 DSU clk: 1200 Mhz
383 19:39:40.507945 CPU clk: 1200 MHz
384 19:39:40.513172 Set clk81 to 166.6M
385 19:39:40.519244 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 19:39:40.519533 board id: 1
387 19:39:40.525014 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 19:39:40.536681 fw parse done
389 19:39:40.541597 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 19:39:40.585867 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 19:39:40.596941 PIEI prepare done
392 19:39:40.597440 fastboot data load
393 19:39:40.597861 fastboot data verify
394 19:39:40.602834 verify result: 266
395 19:39:40.608265 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 19:39:40.608558 LPDDR4 probe
397 19:39:40.608791 ddr clk to 1584MHz
398 19:39:40.616451 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 19:39:40.654714
400 19:39:40.655077 dmc_version 0001
401 19:39:40.660365 Check phy result
402 19:39:40.666842 INFO : End of CA training
403 19:39:40.667128 INFO : End of initialization
404 19:39:40.672479 INFO : Training has run successfully!
405 19:39:40.672767 Check phy result
406 19:39:40.678119 INFO : End of initialization
407 19:39:40.678399 INFO : End of read enable training
408 19:39:40.683712 INFO : End of fine write leveling
409 19:39:40.690229 INFO : End of Write leveling coarse delay
410 19:39:40.690525 INFO : Training has run successfully!
411 19:39:40.690744 Check phy result
412 19:39:40.695314 INFO : End of initialization
413 19:39:40.695597 INFO : End of read dq deskew training
414 19:39:40.700475 INFO : End of MPR read delay center optimization
415 19:39:40.706249 INFO : End of write delay center optimization
416 19:39:40.712009 INFO : End of read delay center optimization
417 19:39:40.712304 INFO : End of max read latency training
418 19:39:40.717395 INFO : Training has run successfully!
419 19:39:40.717850 1D training succeed
420 19:39:40.725683 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 19:39:40.773877 Check phy result
422 19:39:40.774229 INFO : End of initialization
423 19:39:40.801526 INFO : End of 2D read delay Voltage center optimization
424 19:39:40.825446 INFO : End of 2D read delay Voltage center optimization
425 19:39:40.883479 INFO : End of 2D write delay Voltage center optimization
426 19:39:40.937187 INFO : End of 2D write delay Voltage center optimization
427 19:39:40.942746 INFO : Training has run successfully!
428 19:39:40.943294
429 19:39:40.943734 channel==0
430 19:39:40.948364 RxClkDly_Margin_A0==78 ps 8
431 19:39:40.949765 TxDqDly_Margin_A0==98 ps 10
432 19:39:40.953828 RxClkDly_Margin_A1==88 ps 9
433 19:39:40.954155 TxDqDly_Margin_A1==98 ps 10
434 19:39:40.954402 TrainedVREFDQ_A0==74
435 19:39:40.959880 TrainedVREFDQ_A1==74
436 19:39:40.960248 VrefDac_Margin_A0==24
437 19:39:40.960498 DeviceVref_Margin_A0==40
438 19:39:40.964996 VrefDac_Margin_A1==23
439 19:39:40.965324 DeviceVref_Margin_A1==40
440 19:39:40.965558
441 19:39:40.965780
442 19:39:40.970684 channel==1
443 19:39:40.971016 RxClkDly_Margin_A0==88 ps 9
444 19:39:40.971259 TxDqDly_Margin_A0==98 ps 10
445 19:39:40.976294 RxClkDly_Margin_A1==78 ps 8
446 19:39:40.976879 TxDqDly_Margin_A1==78 ps 8
447 19:39:40.981987 TrainedVREFDQ_A0==78
448 19:39:40.984594 TrainedVREFDQ_A1==75
449 19:39:40.985431 VrefDac_Margin_A0==22
450 19:39:40.987786 DeviceVref_Margin_A0==36
451 19:39:40.988493 VrefDac_Margin_A1==22
452 19:39:40.994389 DeviceVref_Margin_A1==39
453 19:39:40.995120
454 19:39:40.995395 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 19:39:40.995621
456 19:39:41.027532 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 19:39:41.028213 2D training succeed
458 19:39:41.032669 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 19:39:41.038829 auto size-- 65535DDR cs0 size: 2048MB
460 19:39:41.039166 DDR cs1 size: 2048MB
461 19:39:41.043946 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 19:39:41.044327 cs0 DataBus test pass
463 19:39:41.049908 cs1 DataBus test pass
464 19:39:41.050313 cs0 AddrBus test pass
465 19:39:41.050590 cs1 AddrBus test pass
466 19:39:41.050855
467 19:39:41.054746 100bdlr_step_size ps== 471
468 19:39:41.055359 result report
469 19:39:41.060569 boot times 0Enable ddr reg access
470 19:39:41.064598 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 19:39:41.079177 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 19:39:41.739384 bl2z: ptr: 05129330, size: 00001e40
473 19:39:41.748757 0.0;M3 CHK:0;cm4_sp_mode 0
474 19:39:41.749434 MVN_1=0x00000000
475 19:39:41.749960 MVN_2=0x00000000
476 19:39:41.761929 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 19:39:41.762394 OPS=0x04
478 19:39:41.762668 ring efuse init
479 19:39:41.763240 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 19:39:41.767717 [0.017354 Inits done]
481 19:39:41.768151 secure task start!
482 19:39:41.768421 high task start!
483 19:39:41.768678 low task start!
484 19:39:41.771809 run into bl31
485 19:39:41.780500 NOTICE: BL31: v1.3(release):4fc40b1
486 19:39:41.787299 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 19:39:41.787671 NOTICE: BL31: G12A normal boot!
488 19:39:41.804310 NOTICE: BL31: BL33 decompress pass
489 19:39:41.809558 ERROR: Error initializing runtime service opteed_fast
490 19:39:44.522170 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 19:39:44.522621 bl2_stage_init 0x01
492 19:39:44.522845 bl2_stage_init 0x81
493 19:39:44.527637 hw id: 0x0000 - pwm id 0x01
494 19:39:44.527953 bl2_stage_init 0xc1
495 19:39:44.533272 bl2_stage_init 0x02
496 19:39:44.533576
497 19:39:44.533809 L0:00000000
498 19:39:44.534024 L1:00000703
499 19:39:44.534230 L2:00008067
500 19:39:44.534429 L3:15000000
501 19:39:44.538848 S1:00000000
502 19:39:44.539147 B2:20282000
503 19:39:44.539355 B1:a0f83180
504 19:39:44.539560
505 19:39:44.539783 TE: 68073
506 19:39:44.540022
507 19:39:44.544405 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 19:39:44.544717
509 19:39:44.550001 Board ID = 1
510 19:39:44.550312 Set cpu clk to 24M
511 19:39:44.550542 Set clk81 to 24M
512 19:39:44.555602 Use GP1_pll as DSU clk.
513 19:39:44.555929 DSU clk: 1200 Mhz
514 19:39:44.556515 CPU clk: 1200 MHz
515 19:39:44.561315 Set clk81 to 166.6M
516 19:39:44.566899 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 19:39:44.567351 board id: 1
518 19:39:44.573984 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 19:39:44.584908 fw parse done
520 19:39:44.590881 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 19:39:44.926270 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 19:39:44.926713 PIEI prepare done
523 19:39:44.926989 fastboot data load
524 19:39:44.927257 fastboot data verify
525 19:39:44.927843 verify result: 266
526 19:39:44.928204 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 19:39:44.928486 LPDDR4 probe
528 19:39:44.928743 ddr clk to 1584MHz
529 19:39:44.929022 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 19:39:44.929288
531 19:39:44.929541 dmc_version 0001
532 19:39:44.929786 Check phy result
533 19:39:44.930041 INFO : End of CA training
534 19:39:44.930294 INFO : End of initialization
535 19:39:44.930538 INFO : Training has run successfully!
536 19:39:44.930790 Check phy result
537 19:39:44.931057 INFO : End of initialization
538 19:39:44.931312 INFO : End of read enable training
539 19:39:44.931551 INFO : End of fine write leveling
540 19:39:44.931811 INFO : End of Write leveling coarse delay
541 19:39:44.932088 INFO : Training has run successfully!
542 19:39:44.932320 Check phy result
543 19:39:44.932564 INFO : End of initialization
544 19:39:44.932807 INFO : End of read dq deskew training
545 19:39:44.933053 INFO : End of MPR read delay center optimization
546 19:39:44.933299 INFO : End of write delay center optimization
547 19:39:44.933545 INFO : End of read delay center optimization
548 19:39:44.933783 INFO : End of max read latency training
549 19:39:44.934024 INFO : Training has run successfully!
550 19:39:44.934416 1D training succeed
551 19:39:44.934732 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 19:39:44.935000 Check phy result
553 19:39:44.935344 INFO : End of initialization
554 19:39:44.935632 INFO : End of 2D read delay Voltage center optimization
555 19:39:44.935892 INFO : End of 2D read delay Voltage center optimization
556 19:39:44.936180 INFO : End of 2D write delay Voltage center optimization
557 19:39:44.985338 INFO : End of 2D write delay Voltage center optimization
558 19:39:44.990743 INFO : Training has run successfully!
559 19:39:44.991109
560 19:39:44.991389 channel==0
561 19:39:44.996440 RxClkDly_Margin_A0==78 ps 8
562 19:39:44.996809 TxDqDly_Margin_A0==98 ps 10
563 19:39:45.002091 RxClkDly_Margin_A1==88 ps 9
564 19:39:45.002447 TxDqDly_Margin_A1==98 ps 10
565 19:39:45.002717 TrainedVREFDQ_A0==74
566 19:39:45.007623 TrainedVREFDQ_A1==74
567 19:39:45.007999 VrefDac_Margin_A0==25
568 19:39:45.008292 DeviceVref_Margin_A0==40
569 19:39:45.013338 VrefDac_Margin_A1==23
570 19:39:45.013707 DeviceVref_Margin_A1==40
571 19:39:45.013933
572 19:39:45.014138
573 19:39:45.018809 channel==1
574 19:39:45.019190 RxClkDly_Margin_A0==88 ps 9
575 19:39:45.019481 TxDqDly_Margin_A0==98 ps 10
576 19:39:45.024355 RxClkDly_Margin_A1==78 ps 8
577 19:39:45.024733 TxDqDly_Margin_A1==88 ps 9
578 19:39:45.029934 TrainedVREFDQ_A0==78
579 19:39:45.030456 TrainedVREFDQ_A1==77
580 19:39:45.030891 VrefDac_Margin_A0==22
581 19:39:45.035465 DeviceVref_Margin_A0==36
582 19:39:45.035818 VrefDac_Margin_A1==22
583 19:39:45.041140 DeviceVref_Margin_A1==37
584 19:39:45.041502
585 19:39:45.041767 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 19:39:45.042026
587 19:39:45.074756 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000018 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
588 19:39:45.075186 2D training succeed
589 19:39:45.080263 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 19:39:45.085851 auto size-- 65535DDR cs0 size: 2048MB
591 19:39:45.086201 DDR cs1 size: 2048MB
592 19:39:45.091509 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 19:39:45.091874 cs0 DataBus test pass
594 19:39:45.097125 cs1 DataBus test pass
595 19:39:45.097483 cs0 AddrBus test pass
596 19:39:45.097759 cs1 AddrBus test pass
597 19:39:45.098023
598 19:39:45.102641 100bdlr_step_size ps== 471
599 19:39:45.103001 result report
600 19:39:45.108296 boot times 0Enable ddr reg access
601 19:39:45.113551 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 19:39:45.127513 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 19:39:45.787029 bl2z: ptr: 05129330, size: 00001e40
604 19:39:45.795609 0.0;M3 CHK:0;cm4_sp_mode 0
605 19:39:45.796031 MVN_1=0x00000000
606 19:39:45.796305 MVN_2=0x00000000
607 19:39:45.807227 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 19:39:45.807744 OPS=0x04
609 19:39:45.808173 ring efuse init
610 19:39:45.812702 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 19:39:45.813026 [0.017354 Inits done]
612 19:39:45.813265 secure task start!
613 19:39:45.820081 high task start!
614 19:39:45.820587 low task start!
615 19:39:45.820986 run into bl31
616 19:39:45.828623 NOTICE: BL31: v1.3(release):4fc40b1
617 19:39:45.836400 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 19:39:45.836738 NOTICE: BL31: G12A normal boot!
619 19:39:45.852060 NOTICE: BL31: BL33 decompress pass
620 19:39:45.857684 ERROR: Error initializing runtime service opteed_fast
621 19:39:47.224215 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 19:39:47.224614 bl2_stage_init 0x01
623 19:39:47.224841 bl2_stage_init 0x81
624 19:39:47.229722 hw id: 0x0000 - pwm id 0x01
625 19:39:47.230251 bl2_stage_init 0xc1
626 19:39:47.230715 bl2_stage_init 0x02
627 19:39:47.231173
628 19:39:47.235479 L0:00000000
629 19:39:47.236046 L1:00000703
630 19:39:47.236520 L2:00008067
631 19:39:47.236972 L3:15000000
632 19:39:47.237417 S1:00000000
633 19:39:47.240965 B2:20282000
634 19:39:47.241241 B1:a0f83180
635 19:39:47.241456
636 19:39:47.241661 TE: 69144
637 19:39:47.241865
638 19:39:47.246575 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 19:39:47.247106
640 19:39:47.252172 Board ID = 1
641 19:39:47.252688 Set cpu clk to 24M
642 19:39:47.253042 Set clk81 to 24M
643 19:39:47.257828 Use GP1_pll as DSU clk.
644 19:39:47.258354 DSU clk: 1200 Mhz
645 19:39:47.258808 CPU clk: 1200 MHz
646 19:39:47.259251 Set clk81 to 166.6M
647 19:39:47.268956 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 19:39:47.269527 board id: 1
649 19:39:47.274455 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 19:39:47.286308 fw parse done
651 19:39:47.291457 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 19:39:47.335350 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 19:39:47.346598 PIEI prepare done
654 19:39:47.346928 fastboot data load
655 19:39:47.347153 fastboot data verify
656 19:39:47.351901 verify result: 266
657 19:39:47.357482 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 19:39:47.357906 LPDDR4 probe
659 19:39:47.358257 ddr clk to 1584MHz
660 19:39:47.365683 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 19:39:47.403353
662 19:39:47.403973 dmc_version 0001
663 19:39:47.409874 Check phy result
664 19:39:47.416426 INFO : End of CA training
665 19:39:47.416980 INFO : End of initialization
666 19:39:47.421988 INFO : Training has run successfully!
667 19:39:47.422508 Check phy result
668 19:39:47.427591 INFO : End of initialization
669 19:39:47.428137 INFO : End of read enable training
670 19:39:47.433212 INFO : End of fine write leveling
671 19:39:47.438825 INFO : End of Write leveling coarse delay
672 19:39:47.439360 INFO : Training has run successfully!
673 19:39:47.439826 Check phy result
674 19:39:47.444682 INFO : End of initialization
675 19:39:47.444963 INFO : End of read dq deskew training
676 19:39:47.450003 INFO : End of MPR read delay center optimization
677 19:39:47.455588 INFO : End of write delay center optimization
678 19:39:47.461201 INFO : End of read delay center optimization
679 19:39:47.461733 INFO : End of max read latency training
680 19:39:47.466637 INFO : Training has run successfully!
681 19:39:47.466963 1D training succeed
682 19:39:47.476003 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 19:39:47.524340 Check phy result
684 19:39:47.524979 INFO : End of initialization
685 19:39:47.551692 INFO : End of 2D read delay Voltage center optimization
686 19:39:47.575800 INFO : End of 2D read delay Voltage center optimization
687 19:39:47.632477 INFO : End of 2D write delay Voltage center optimization
688 19:39:47.686465 INFO : End of 2D write delay Voltage center optimization
689 19:39:47.692096 INFO : Training has run successfully!
690 19:39:47.692620
691 19:39:47.693104 channel==0
692 19:39:47.697593 RxClkDly_Margin_A0==78 ps 8
693 19:39:47.698124 TxDqDly_Margin_A0==98 ps 10
694 19:39:47.703237 RxClkDly_Margin_A1==69 ps 7
695 19:39:47.703752 TxDqDly_Margin_A1==98 ps 10
696 19:39:47.704248 TrainedVREFDQ_A0==74
697 19:39:47.708768 TrainedVREFDQ_A1==75
698 19:39:47.709085 VrefDac_Margin_A0==23
699 19:39:47.709309 DeviceVref_Margin_A0==40
700 19:39:47.714466 VrefDac_Margin_A1==22
701 19:39:47.714868 DeviceVref_Margin_A1==39
702 19:39:47.715213
703 19:39:47.715547
704 19:39:47.719949 channel==1
705 19:39:47.720559 RxClkDly_Margin_A0==88 ps 9
706 19:39:47.720837 TxDqDly_Margin_A0==88 ps 9
707 19:39:47.725540 RxClkDly_Margin_A1==78 ps 8
708 19:39:47.725845 TxDqDly_Margin_A1==88 ps 9
709 19:39:47.731198 TrainedVREFDQ_A0==75
710 19:39:47.731514 TrainedVREFDQ_A1==78
711 19:39:47.731743 VrefDac_Margin_A0==22
712 19:39:47.736897 DeviceVref_Margin_A0==38
713 19:39:47.737443 VrefDac_Margin_A1==22
714 19:39:47.742459 DeviceVref_Margin_A1==36
715 19:39:47.742996
716 19:39:47.743468 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 19:39:47.743929
718 19:39:47.776009 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
719 19:39:47.776634 2D training succeed
720 19:39:47.781656 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 19:39:47.787264 auto size-- 65535DDR cs0 size: 2048MB
722 19:39:47.787823 DDR cs1 size: 2048MB
723 19:39:47.792893 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 19:39:47.793447 cs0 DataBus test pass
725 19:39:47.798456 cs1 DataBus test pass
726 19:39:47.799020 cs0 AddrBus test pass
727 19:39:47.799490 cs1 AddrBus test pass
728 19:39:47.799948
729 19:39:47.804087 100bdlr_step_size ps== 471
730 19:39:47.804663 result report
731 19:39:47.809675 boot times 0Enable ddr reg access
732 19:39:47.814834 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 19:39:47.828653 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 19:39:48.737929 bl2z: ptr: 05129330, size: 00001e40
735 19:39:48.738566 0.0;M3 CHK:0;cm4_sp_mode 0
736 19:39:48.739062 MVN_1=0x00000000
737 19:39:48.739524 MVN_2=0x00000000
738 19:39:48.740060 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 19:39:48.740572 OPS=0x04
740 19:39:48.741040 ring efuse init
741 19:39:48.741493 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 19:39:48.741955 [0.017354 Inits done]
743 19:39:48.742399 secure task start!
744 19:39:48.742840 high task start!
745 19:39:48.743286 low task start!
746 19:39:48.743726 run into bl31
747 19:39:48.744203 NOTICE: BL31: v1.3(release):4fc40b1
748 19:39:48.744662 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 19:39:48.745112 NOTICE: BL31: G12A normal boot!
750 19:39:48.745561 NOTICE: BL31: BL33 decompress pass
751 19:39:48.746405 ERROR: Error initializing runtime service opteed_fast
752 19:39:49.354199
753 19:39:49.354634
754 19:39:49.359605 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 19:39:49.359923
756 19:39:49.363048 Model: Libre Computer AML-S905D3-CC Solitude
757 19:39:49.510306 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 19:39:49.525748 DRAM: 2 GiB (effective 3.8 GiB)
759 19:39:49.626662 Core: 406 devices, 33 uclasses, devicetree: separate
760 19:39:49.632452 WDT: Not starting watchdog@f0d0
761 19:39:49.657512 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 19:39:49.669704 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 19:39:49.674791 ** Bad device specification mmc 0 **
764 19:39:49.684866 Card did not respond to voltage select! : -110
765 19:39:49.692479 ** Bad device specification mmc 0 **
766 19:39:49.693025 Couldn't find partition mmc 0
767 19:39:49.700782 Card did not respond to voltage select! : -110
768 19:39:49.706274 ** Bad device specification mmc 0 **
769 19:39:49.706802 Couldn't find partition mmc 0
770 19:39:49.711371 Error: could not access storage.
771 19:39:50.007811 Net: eth0: ethernet@ff3f0000
772 19:39:50.008462 starting USB...
773 19:39:50.252786 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 19:39:50.253206 Starting the controller
775 19:39:50.258415 USB XHCI 1.10
776 19:39:51.813566 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 19:39:51.821804 scanning usb for storage devices... 0 Storage Device(s) found
779 19:39:51.872841 Hit any key to stop autoboot: 1
780 19:39:51.873561 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
781 19:39:51.873945 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
782 19:39:51.874205 Setting prompt string to ['=>']
783 19:39:51.874460 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
784 19:39:51.887929 0
785 19:39:51.888680 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 19:39:51.989532 => setenv autoload no
788 19:39:51.990113 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 19:39:51.994628 setenv autoload no
791 19:39:52.095789 => setenv initrd_high 0xffffffff
792 19:39:52.096488 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 19:39:52.101224 setenv initrd_high 0xffffffff
795 19:39:52.202844 => setenv fdt_high 0xffffffff
796 19:39:52.203892 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 19:39:52.208394 setenv fdt_high 0xffffffff
799 19:39:52.310103 => dhcp
800 19:39:52.311153 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
801 19:39:52.315310 dhcp
802 19:39:53.220099 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
803 19:39:53.220743 Speed: 1000, full duplex
804 19:39:53.221218 BOOTP broadcast 1
805 19:39:53.239800 DHCP client bound to address 192.168.6.21 (19 ms)
807 19:39:53.341449 => setenv serverip 192.168.6.2
808 19:39:53.342282 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
809 19:39:53.346735 setenv serverip 192.168.6.2
811 19:39:53.448677 => tftpboot 0x01080000 971990/tftp-deploy-rxk4tpsk/kernel/uImage
812 19:39:53.449484 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
813 19:39:53.456229 tftpboot 0x01080000 971990/tftp-deploy-rxk4tpsk/kernel/uImage
814 19:39:53.456770 Speed: 1000, full duplex
815 19:39:53.457232 Using ethernet@ff3f0000 device
816 19:39:53.461729 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
817 19:39:53.467195 Filename '971990/tftp-deploy-rxk4tpsk/kernel/uImage'.
818 19:39:53.471150 Load address: 0x1080000
819 19:39:56.699549 Loading: *################################################## 43.6 MiB
820 19:39:56.699971 13.5 MiB/s
821 19:39:56.700577 done
822 19:39:56.703107 Bytes transferred = 45713984 (2b98a40 hex)
824 19:39:56.804904 => tftpboot 0x08000000 971990/tftp-deploy-rxk4tpsk/ramdisk/ramdisk.cpio.gz.uboot
825 19:39:56.805890 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
826 19:39:56.812402 tftpboot 0x08000000 971990/tftp-deploy-rxk4tpsk/ramdisk/ramdisk.cpio.gz.uboot
827 19:39:56.812780 Speed: 1000, full duplex
828 19:39:56.812993 Using ethernet@ff3f0000 device
829 19:39:56.817753 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
830 19:39:56.827577 Filename '971990/tftp-deploy-rxk4tpsk/ramdisk/ramdisk.cpio.gz.uboot'.
831 19:39:56.827971 Load address: 0x8000000
832 19:39:58.300624 Loading: *################################################# UDP wrong checksum 00000005 00004349
833 19:40:03.301914 T UDP wrong checksum 00000005 00004349
834 19:40:07.403710 UDP wrong checksum 000000ff 00004305
835 19:40:07.442282 UDP wrong checksum 000000ff 0000d9f7
836 19:40:13.304686 T T UDP wrong checksum 00000005 00004349
837 19:40:24.806409 T T UDP wrong checksum 000000ff 0000a04b
838 19:40:24.845717 UDP wrong checksum 000000ff 0000253e
839 19:40:28.637019 T UDP wrong checksum 000000ff 0000f71a
840 19:40:28.698935 UDP wrong checksum 000000ff 0000820d
841 19:40:33.308045 T UDP wrong checksum 00000005 00004349
842 19:40:53.312973 T T T
843 19:40:53.313698 Retry count exceeded; starting again
845 19:40:53.315138 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
848 19:40:53.317034 end: 2.4 uboot-commands (duration 00:01:20) [common]
850 19:40:53.318472 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
852 19:40:53.320711 end: 2 uboot-action (duration 00:01:20) [common]
854 19:40:53.322387 Cleaning after the job
855 19:40:53.322949 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/ramdisk
856 19:40:53.324247 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/kernel
857 19:40:53.370863 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/dtb
858 19:40:53.371755 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/nfsrootfs
859 19:40:53.401335 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/971990/tftp-deploy-rxk4tpsk/modules
860 19:40:53.410080 start: 4.1 power-off (timeout 00:00:30) [common]
861 19:40:53.410749 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
862 19:40:53.446313 >> OK - accepted request
863 19:40:53.448521 Returned 0 in 0 seconds
864 19:40:53.550821 end: 4.1 power-off (duration 00:00:00) [common]
866 19:40:53.552837 start: 4.2 read-feedback (timeout 00:10:00) [common]
867 19:40:53.553511 Listened to connection for namespace 'common' for up to 1s
868 19:40:54.554494 Finalising connection for namespace 'common'
869 19:40:54.555012 Disconnecting from shell: Finalise
870 19:40:54.555300 =>
871 19:40:54.656195 end: 4.2 read-feedback (duration 00:00:01) [common]
872 19:40:54.656901 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/971990
873 19:40:57.849095 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/971990
874 19:40:57.849705 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.