Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 21:21:38.944881 lava-dispatcher, installed at version: 2024.01
2 21:21:38.945687 start: 0 validate
3 21:21:38.946182 Start time: 2024-11-04 21:21:38.946151+00:00 (UTC)
4 21:21:38.946727 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 21:21:38.947280 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 21:21:38.992331 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 21:21:38.992894 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-5-g557329bcecc2%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 21:21:39.025222 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 21:21:39.025891 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-5-g557329bcecc2%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 21:21:39.055380 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 21:21:39.055904 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 21:21:39.093435 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 21:21:39.093939 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-5-g557329bcecc2%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 21:21:39.140188 validate duration: 0.19
16 21:21:39.141709 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 21:21:39.142346 start: 1.1 download-retry (timeout 00:10:00) [common]
18 21:21:39.142951 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 21:21:39.143921 Not decompressing ramdisk as can be used compressed.
20 21:21:39.144741 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 21:21:39.145263 saving as /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/ramdisk/initrd.cpio.gz
22 21:21:39.145769 total size: 5628169 (5 MB)
23 21:21:39.190663 progress 0 % (0 MB)
24 21:21:39.199471 progress 5 % (0 MB)
25 21:21:39.208403 progress 10 % (0 MB)
26 21:21:39.215824 progress 15 % (0 MB)
27 21:21:39.222146 progress 20 % (1 MB)
28 21:21:39.225836 progress 25 % (1 MB)
29 21:21:39.230041 progress 30 % (1 MB)
30 21:21:39.234304 progress 35 % (1 MB)
31 21:21:39.238039 progress 40 % (2 MB)
32 21:21:39.242166 progress 45 % (2 MB)
33 21:21:39.245930 progress 50 % (2 MB)
34 21:21:39.250041 progress 55 % (2 MB)
35 21:21:39.254240 progress 60 % (3 MB)
36 21:21:39.257987 progress 65 % (3 MB)
37 21:21:39.262214 progress 70 % (3 MB)
38 21:21:39.266144 progress 75 % (4 MB)
39 21:21:39.270293 progress 80 % (4 MB)
40 21:21:39.274171 progress 85 % (4 MB)
41 21:21:39.278441 progress 90 % (4 MB)
42 21:21:39.282388 progress 95 % (5 MB)
43 21:21:39.285872 progress 100 % (5 MB)
44 21:21:39.286655 5 MB downloaded in 0.14 s (38.10 MB/s)
45 21:21:39.287260 end: 1.1.1 http-download (duration 00:00:00) [common]
47 21:21:39.288353 end: 1.1 download-retry (duration 00:00:00) [common]
48 21:21:39.288689 start: 1.2 download-retry (timeout 00:10:00) [common]
49 21:21:39.288987 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 21:21:39.289584 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-5-g557329bcecc2/arm64/defconfig/gcc-12/kernel/Image
51 21:21:39.289876 saving as /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/kernel/Image
52 21:21:39.290102 total size: 45713920 (43 MB)
53 21:21:39.290328 No compression specified
54 21:21:39.330770 progress 0 % (0 MB)
55 21:21:39.359719 progress 5 % (2 MB)
56 21:21:39.388656 progress 10 % (4 MB)
57 21:21:39.417617 progress 15 % (6 MB)
58 21:21:39.446328 progress 20 % (8 MB)
59 21:21:39.474463 progress 25 % (10 MB)
60 21:21:39.503492 progress 30 % (13 MB)
61 21:21:39.532010 progress 35 % (15 MB)
62 21:21:39.560772 progress 40 % (17 MB)
63 21:21:39.590098 progress 45 % (19 MB)
64 21:21:39.618569 progress 50 % (21 MB)
65 21:21:39.647022 progress 55 % (24 MB)
66 21:21:39.675337 progress 60 % (26 MB)
67 21:21:39.703640 progress 65 % (28 MB)
68 21:21:39.732141 progress 70 % (30 MB)
69 21:21:39.760386 progress 75 % (32 MB)
70 21:21:39.789167 progress 80 % (34 MB)
71 21:21:39.817277 progress 85 % (37 MB)
72 21:21:39.845704 progress 90 % (39 MB)
73 21:21:39.874000 progress 95 % (41 MB)
74 21:21:39.902447 progress 100 % (43 MB)
75 21:21:39.903049 43 MB downloaded in 0.61 s (71.13 MB/s)
76 21:21:39.903547 end: 1.2.1 http-download (duration 00:00:01) [common]
78 21:21:39.904413 end: 1.2 download-retry (duration 00:00:01) [common]
79 21:21:39.904697 start: 1.3 download-retry (timeout 00:09:59) [common]
80 21:21:39.904967 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 21:21:39.905468 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-5-g557329bcecc2/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 21:21:39.905762 saving as /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/dtb/meson-g12b-a311d-libretech-cc.dtb
83 21:21:39.905973 total size: 54703 (0 MB)
84 21:21:39.906185 No compression specified
85 21:21:39.950435 progress 59 % (0 MB)
86 21:21:39.951602 progress 100 % (0 MB)
87 21:21:39.952501 0 MB downloaded in 0.05 s (1.12 MB/s)
88 21:21:39.953242 end: 1.3.1 http-download (duration 00:00:00) [common]
90 21:21:39.954514 end: 1.3 download-retry (duration 00:00:00) [common]
91 21:21:39.954966 start: 1.4 download-retry (timeout 00:09:59) [common]
92 21:21:39.955388 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 21:21:39.956167 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 21:21:39.956589 saving as /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/nfsrootfs/full.rootfs.tar
95 21:21:39.956939 total size: 120894716 (115 MB)
96 21:21:39.957259 Using unxz to decompress xz
97 21:21:40.003598 progress 0 % (0 MB)
98 21:21:40.832313 progress 5 % (5 MB)
99 21:21:41.669769 progress 10 % (11 MB)
100 21:21:42.469161 progress 15 % (17 MB)
101 21:21:43.210512 progress 20 % (23 MB)
102 21:21:43.806158 progress 25 % (28 MB)
103 21:21:44.632035 progress 30 % (34 MB)
104 21:21:45.422186 progress 35 % (40 MB)
105 21:21:45.770818 progress 40 % (46 MB)
106 21:21:46.151045 progress 45 % (51 MB)
107 21:21:46.866376 progress 50 % (57 MB)
108 21:21:47.741725 progress 55 % (63 MB)
109 21:21:48.517151 progress 60 % (69 MB)
110 21:21:49.271325 progress 65 % (74 MB)
111 21:21:50.049143 progress 70 % (80 MB)
112 21:21:50.872530 progress 75 % (86 MB)
113 21:21:51.658047 progress 80 % (92 MB)
114 21:21:52.415471 progress 85 % (98 MB)
115 21:21:53.260375 progress 90 % (103 MB)
116 21:21:54.066173 progress 95 % (109 MB)
117 21:21:54.890780 progress 100 % (115 MB)
118 21:21:54.903117 115 MB downloaded in 14.95 s (7.71 MB/s)
119 21:21:54.903970 end: 1.4.1 http-download (duration 00:00:15) [common]
121 21:21:54.905599 end: 1.4 download-retry (duration 00:00:15) [common]
122 21:21:54.906111 start: 1.5 download-retry (timeout 00:09:44) [common]
123 21:21:54.906623 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 21:21:54.907411 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-5-g557329bcecc2/arm64/defconfig/gcc-12/modules.tar.xz
125 21:21:54.907861 saving as /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/modules/modules.tar
126 21:21:54.908304 total size: 11612232 (11 MB)
127 21:21:54.908718 Using unxz to decompress xz
128 21:21:54.951585 progress 0 % (0 MB)
129 21:21:55.017338 progress 5 % (0 MB)
130 21:21:55.090340 progress 10 % (1 MB)
131 21:21:55.185018 progress 15 % (1 MB)
132 21:21:55.276380 progress 20 % (2 MB)
133 21:21:55.354781 progress 25 % (2 MB)
134 21:21:55.429409 progress 30 % (3 MB)
135 21:21:55.506646 progress 35 % (3 MB)
136 21:21:55.578323 progress 40 % (4 MB)
137 21:21:55.652829 progress 45 % (5 MB)
138 21:21:55.735895 progress 50 % (5 MB)
139 21:21:55.811921 progress 55 % (6 MB)
140 21:21:55.896009 progress 60 % (6 MB)
141 21:21:55.975282 progress 65 % (7 MB)
142 21:21:56.054652 progress 70 % (7 MB)
143 21:21:56.131209 progress 75 % (8 MB)
144 21:21:56.213659 progress 80 % (8 MB)
145 21:21:56.292883 progress 85 % (9 MB)
146 21:21:56.370499 progress 90 % (9 MB)
147 21:21:56.448109 progress 95 % (10 MB)
148 21:21:56.524338 progress 100 % (11 MB)
149 21:21:56.535831 11 MB downloaded in 1.63 s (6.80 MB/s)
150 21:21:56.536717 end: 1.5.1 http-download (duration 00:00:02) [common]
152 21:21:56.538395 end: 1.5 download-retry (duration 00:00:02) [common]
153 21:21:56.538939 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 21:21:56.539478 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 21:22:13.077960 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/936452/extract-nfsrootfs-73gden0m
156 21:22:13.078574 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 21:22:13.078861 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 21:22:13.079651 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b
159 21:22:13.080181 makedir: /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin
160 21:22:13.080550 makedir: /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/tests
161 21:22:13.080871 makedir: /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/results
162 21:22:13.081203 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-add-keys
163 21:22:13.081744 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-add-sources
164 21:22:13.082256 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-background-process-start
165 21:22:13.082780 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-background-process-stop
166 21:22:13.083366 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-common-functions
167 21:22:13.083875 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-echo-ipv4
168 21:22:13.084429 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-install-packages
169 21:22:13.084915 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-installed-packages
170 21:22:13.085389 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-os-build
171 21:22:13.085866 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-probe-channel
172 21:22:13.086341 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-probe-ip
173 21:22:13.086837 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-target-ip
174 21:22:13.087364 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-target-mac
175 21:22:13.087848 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-target-storage
176 21:22:13.088375 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-test-case
177 21:22:13.088863 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-test-event
178 21:22:13.089340 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-test-feedback
179 21:22:13.089881 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-test-raise
180 21:22:13.090374 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-test-reference
181 21:22:13.090913 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-test-runner
182 21:22:13.091410 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-test-set
183 21:22:13.091888 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-test-shell
184 21:22:13.092408 Updating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-add-keys (debian)
185 21:22:13.092947 Updating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-add-sources (debian)
186 21:22:13.093451 Updating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-install-packages (debian)
187 21:22:13.093952 Updating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-installed-packages (debian)
188 21:22:13.094446 Updating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/bin/lava-os-build (debian)
189 21:22:13.094884 Creating /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/environment
190 21:22:13.095253 LAVA metadata
191 21:22:13.095513 - LAVA_JOB_ID=936452
192 21:22:13.095728 - LAVA_DISPATCHER_IP=192.168.6.2
193 21:22:13.096108 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 21:22:13.097081 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 21:22:13.097391 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 21:22:13.097601 skipped lava-vland-overlay
197 21:22:13.097839 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 21:22:13.098091 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 21:22:13.098308 skipped lava-multinode-overlay
200 21:22:13.098549 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 21:22:13.098798 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 21:22:13.099042 Loading test definitions
203 21:22:13.099315 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 21:22:13.099531 Using /lava-936452 at stage 0
205 21:22:13.100656 uuid=936452_1.6.2.4.1 testdef=None
206 21:22:13.100969 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 21:22:13.101233 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 21:22:13.102778 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 21:22:13.103562 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 21:22:13.105567 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 21:22:13.106394 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 21:22:13.108233 runner path: /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/0/tests/0_timesync-off test_uuid 936452_1.6.2.4.1
215 21:22:13.108788 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 21:22:13.109599 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 21:22:13.109822 Using /lava-936452 at stage 0
219 21:22:13.110175 Fetching tests from https://github.com/kernelci/test-definitions.git
220 21:22:13.110466 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/0/tests/1_kselftest-dt'
221 21:22:16.658635 Running '/usr/bin/git checkout kernelci.org
222 21:22:17.098712 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 21:22:17.100179 uuid=936452_1.6.2.4.5 testdef=None
224 21:22:17.100530 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 21:22:17.101277 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 21:22:17.104110 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 21:22:17.104929 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 21:22:17.108632 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 21:22:17.109489 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 21:22:17.113079 runner path: /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/0/tests/1_kselftest-dt test_uuid 936452_1.6.2.4.5
234 21:22:17.113359 BOARD='meson-g12b-a311d-libretech-cc'
235 21:22:17.113566 BRANCH='mainline'
236 21:22:17.113765 SKIPFILE='/dev/null'
237 21:22:17.113962 SKIP_INSTALL='True'
238 21:22:17.114156 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-5-g557329bcecc2/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 21:22:17.114355 TST_CASENAME=''
240 21:22:17.114550 TST_CMDFILES='dt'
241 21:22:17.115116 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 21:22:17.115910 Creating lava-test-runner.conf files
244 21:22:17.116136 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/936452/lava-overlay-vf8jow4b/lava-936452/0 for stage 0
245 21:22:17.116488 - 0_timesync-off
246 21:22:17.116724 - 1_kselftest-dt
247 21:22:17.117052 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 21:22:17.117328 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 21:22:40.345472 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 21:22:40.345895 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 21:22:40.346161 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 21:22:40.346433 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 21:22:40.346700 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 21:22:40.992671 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 21:22:40.993154 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 21:22:40.993410 extracting modules file /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/936452/extract-nfsrootfs-73gden0m
257 21:22:42.317139 extracting modules file /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/936452/extract-overlay-ramdisk-m49msku7/ramdisk
258 21:22:43.680044 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 21:22:43.680523 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 21:22:43.680799 [common] Applying overlay to NFS
261 21:22:43.681017 [common] Applying overlay /var/lib/lava/dispatcher/tmp/936452/compress-overlay-_bkd0sic/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/936452/extract-nfsrootfs-73gden0m
262 21:22:46.391008 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 21:22:46.391460 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 21:22:46.391732 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 21:22:46.391962 Converting downloaded kernel to a uImage
266 21:22:46.392307 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/kernel/Image /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/kernel/uImage
267 21:22:46.886926 output: Image Name:
268 21:22:46.887353 output: Created: Mon Nov 4 21:22:46 2024
269 21:22:46.887564 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 21:22:46.887769 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 21:22:46.887970 output: Load Address: 01080000
272 21:22:46.888210 output: Entry Point: 01080000
273 21:22:46.888409 output:
274 21:22:46.888745 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 21:22:46.889013 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 21:22:46.889283 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 21:22:46.889539 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 21:22:46.889797 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 21:22:46.890063 Building ramdisk /var/lib/lava/dispatcher/tmp/936452/extract-overlay-ramdisk-m49msku7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/936452/extract-overlay-ramdisk-m49msku7/ramdisk
280 21:22:49.024974 >> 166824 blocks
281 21:22:56.866732 Adding RAMdisk u-boot header.
282 21:22:56.867393 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/936452/extract-overlay-ramdisk-m49msku7/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/936452/extract-overlay-ramdisk-m49msku7/ramdisk.cpio.gz.uboot
283 21:22:57.134780 output: Image Name:
284 21:22:57.135382 output: Created: Mon Nov 4 21:22:56 2024
285 21:22:57.135810 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 21:22:57.136291 output: Data Size: 23432481 Bytes = 22883.28 KiB = 22.35 MiB
287 21:22:57.136711 output: Load Address: 00000000
288 21:22:57.137120 output: Entry Point: 00000000
289 21:22:57.137524 output:
290 21:22:57.138643 rename /var/lib/lava/dispatcher/tmp/936452/extract-overlay-ramdisk-m49msku7/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/ramdisk/ramdisk.cpio.gz.uboot
291 21:22:57.139384 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 21:22:57.139945 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 21:22:57.140525 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 21:22:57.140993 No LXC device requested
295 21:22:57.141511 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 21:22:57.142036 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 21:22:57.142543 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 21:22:57.142964 Checking files for TFTP limit of 4294967296 bytes.
299 21:22:57.145656 end: 1 tftp-deploy (duration 00:01:18) [common]
300 21:22:57.146244 start: 2 uboot-action (timeout 00:05:00) [common]
301 21:22:57.146790 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 21:22:57.147304 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 21:22:57.147824 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 21:22:57.148390 Using kernel file from prepare-kernel: 936452/tftp-deploy-9u6i6ad4/kernel/uImage
305 21:22:57.149029 substitutions:
306 21:22:57.149443 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 21:22:57.149854 - {DTB_ADDR}: 0x01070000
308 21:22:57.150257 - {DTB}: 936452/tftp-deploy-9u6i6ad4/dtb/meson-g12b-a311d-libretech-cc.dtb
309 21:22:57.150662 - {INITRD}: 936452/tftp-deploy-9u6i6ad4/ramdisk/ramdisk.cpio.gz.uboot
310 21:22:57.151064 - {KERNEL_ADDR}: 0x01080000
311 21:22:57.151460 - {KERNEL}: 936452/tftp-deploy-9u6i6ad4/kernel/uImage
312 21:22:57.151859 - {LAVA_MAC}: None
313 21:22:57.152322 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/936452/extract-nfsrootfs-73gden0m
314 21:22:57.152736 - {NFS_SERVER_IP}: 192.168.6.2
315 21:22:57.153134 - {PRESEED_CONFIG}: None
316 21:22:57.153535 - {PRESEED_LOCAL}: None
317 21:22:57.153933 - {RAMDISK_ADDR}: 0x08000000
318 21:22:57.154325 - {RAMDISK}: 936452/tftp-deploy-9u6i6ad4/ramdisk/ramdisk.cpio.gz.uboot
319 21:22:57.154718 - {ROOT_PART}: None
320 21:22:57.155110 - {ROOT}: None
321 21:22:57.155501 - {SERVER_IP}: 192.168.6.2
322 21:22:57.155892 - {TEE_ADDR}: 0x83000000
323 21:22:57.156314 - {TEE}: None
324 21:22:57.156711 Parsed boot commands:
325 21:22:57.157092 - setenv autoload no
326 21:22:57.157481 - setenv initrd_high 0xffffffff
327 21:22:57.157865 - setenv fdt_high 0xffffffff
328 21:22:57.158250 - dhcp
329 21:22:57.158635 - setenv serverip 192.168.6.2
330 21:22:57.159027 - tftpboot 0x01080000 936452/tftp-deploy-9u6i6ad4/kernel/uImage
331 21:22:57.159421 - tftpboot 0x08000000 936452/tftp-deploy-9u6i6ad4/ramdisk/ramdisk.cpio.gz.uboot
332 21:22:57.159816 - tftpboot 0x01070000 936452/tftp-deploy-9u6i6ad4/dtb/meson-g12b-a311d-libretech-cc.dtb
333 21:22:57.160265 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/936452/extract-nfsrootfs-73gden0m,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 21:22:57.160678 - bootm 0x01080000 0x08000000 0x01070000
335 21:22:57.161186 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 21:22:57.162677 start: 2.3 connect-device (timeout 00:05:00) [common]
338 21:22:57.163100 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 21:22:57.179326 Setting prompt string to ['lava-test: # ']
340 21:22:57.180895 end: 2.3 connect-device (duration 00:00:00) [common]
341 21:22:57.181535 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 21:22:57.182130 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 21:22:57.182673 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 21:22:57.183828 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 21:22:57.220629 >> OK - accepted request
346 21:22:57.222613 Returned 0 in 0 seconds
347 21:22:57.323668 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 21:22:57.325288 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 21:22:57.325869 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 21:22:57.326387 Setting prompt string to ['Hit any key to stop autoboot']
352 21:22:57.326855 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 21:22:57.328433 Trying 192.168.56.21...
354 21:22:57.328918 Connected to conserv1.
355 21:22:57.329348 Escape character is '^]'.
356 21:22:57.329770
357 21:22:57.330195 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 21:22:57.330627
359 21:23:09.031212 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 21:23:09.031822 bl2_stage_init 0x01
361 21:23:09.032294 bl2_stage_init 0x81
362 21:23:09.036649 hw id: 0x0000 - pwm id 0x01
363 21:23:09.037119 bl2_stage_init 0xc1
364 21:23:09.037537 bl2_stage_init 0x02
365 21:23:09.037943
366 21:23:09.042203 L0:00000000
367 21:23:09.042657 L1:20000703
368 21:23:09.043062 L2:00008067
369 21:23:09.043466 L3:14000000
370 21:23:09.047760 B2:00402000
371 21:23:09.048232 B1:e0f83180
372 21:23:09.048625
373 21:23:09.049017 TE: 58124
374 21:23:09.049405
375 21:23:09.053355 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 21:23:09.053782
377 21:23:09.054172 Board ID = 1
378 21:23:09.059053 Set A53 clk to 24M
379 21:23:09.059487 Set A73 clk to 24M
380 21:23:09.059876 Set clk81 to 24M
381 21:23:09.064550 A53 clk: 1200 MHz
382 21:23:09.064972 A73 clk: 1200 MHz
383 21:23:09.065358 CLK81: 166.6M
384 21:23:09.065738 smccc: 00012a92
385 21:23:09.070244 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 21:23:09.075736 board id: 1
387 21:23:09.081643 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 21:23:09.092306 fw parse done
389 21:23:09.097346 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 21:23:09.140542 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 21:23:09.151816 PIEI prepare done
392 21:23:09.152290 fastboot data load
393 21:23:09.152686 fastboot data verify
394 21:23:09.157431 verify result: 266
395 21:23:09.163120 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 21:23:09.163558 LPDDR4 probe
397 21:23:09.163949 ddr clk to 1584MHz
398 21:23:09.170741 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 21:23:09.207332
400 21:23:09.207808 dmc_version 0001
401 21:23:09.214926 Check phy result
402 21:23:09.220786 INFO : End of CA training
403 21:23:09.221224 INFO : End of initialization
404 21:23:09.226483 INFO : Training has run successfully!
405 21:23:09.226918 Check phy result
406 21:23:09.232023 INFO : End of initialization
407 21:23:09.232461 INFO : End of read enable training
408 21:23:09.237600 INFO : End of fine write leveling
409 21:23:09.243179 INFO : End of Write leveling coarse delay
410 21:23:09.243643 INFO : Training has run successfully!
411 21:23:09.244084 Check phy result
412 21:23:09.248791 INFO : End of initialization
413 21:23:09.249225 INFO : End of read dq deskew training
414 21:23:09.254372 INFO : End of MPR read delay center optimization
415 21:23:09.259976 INFO : End of write delay center optimization
416 21:23:09.265590 INFO : End of read delay center optimization
417 21:23:09.266038 INFO : End of max read latency training
418 21:23:09.271313 INFO : Training has run successfully!
419 21:23:09.271833 1D training succeed
420 21:23:09.279622 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 21:23:09.327759 Check phy result
422 21:23:09.328294 INFO : End of initialization
423 21:23:09.348884 INFO : End of 2D read delay Voltage center optimization
424 21:23:09.369118 INFO : End of 2D read delay Voltage center optimization
425 21:23:09.421125 INFO : End of 2D write delay Voltage center optimization
426 21:23:09.471314 INFO : End of 2D write delay Voltage center optimization
427 21:23:09.476903 INFO : Training has run successfully!
428 21:23:09.477340
429 21:23:09.477748 channel==0
430 21:23:09.482497 RxClkDly_Margin_A0==88 ps 9
431 21:23:09.482923 TxDqDly_Margin_A0==98 ps 10
432 21:23:09.488192 RxClkDly_Margin_A1==88 ps 9
433 21:23:09.488616 TxDqDly_Margin_A1==98 ps 10
434 21:23:09.489019 TrainedVREFDQ_A0==74
435 21:23:09.493692 TrainedVREFDQ_A1==74
436 21:23:09.494130 VrefDac_Margin_A0==25
437 21:23:09.494532 DeviceVref_Margin_A0==40
438 21:23:09.499302 VrefDac_Margin_A1==25
439 21:23:09.499726 DeviceVref_Margin_A1==40
440 21:23:09.500160
441 21:23:09.500562
442 21:23:09.504952 channel==1
443 21:23:09.505376 RxClkDly_Margin_A0==98 ps 10
444 21:23:09.505776 TxDqDly_Margin_A0==98 ps 10
445 21:23:09.510525 RxClkDly_Margin_A1==88 ps 9
446 21:23:09.510951 TxDqDly_Margin_A1==108 ps 11
447 21:23:09.516206 TrainedVREFDQ_A0==77
448 21:23:09.516633 TrainedVREFDQ_A1==77
449 21:23:09.517036 VrefDac_Margin_A0==22
450 21:23:09.521728 DeviceVref_Margin_A0==37
451 21:23:09.522153 VrefDac_Margin_A1==24
452 21:23:09.527292 DeviceVref_Margin_A1==37
453 21:23:09.527719
454 21:23:09.528159 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 21:23:09.532896
456 21:23:09.560915 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
457 21:23:09.561402 2D training succeed
458 21:23:09.566491 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 21:23:09.572197 auto size-- 65535DDR cs0 size: 2048MB
460 21:23:09.572626 DDR cs1 size: 2048MB
461 21:23:09.577694 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 21:23:09.578117 cs0 DataBus test pass
463 21:23:09.583293 cs1 DataBus test pass
464 21:23:09.583713 cs0 AddrBus test pass
465 21:23:09.584157 cs1 AddrBus test pass
466 21:23:09.584565
467 21:23:09.588907 100bdlr_step_size ps== 420
468 21:23:09.589348 result report
469 21:23:09.594469 boot times 0Enable ddr reg access
470 21:23:09.599104 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 21:23:09.612574 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 21:23:10.187215 0.0;M3 CHK:0;cm4_sp_mode 0
473 21:23:10.187794 MVN_1=0x00000000
474 21:23:10.192652 MVN_2=0x00000000
475 21:23:10.198430 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 21:23:10.198874 OPS=0x10
477 21:23:10.199281 ring efuse init
478 21:23:10.199682 chipver efuse init
479 21:23:10.206754 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 21:23:10.207199 [0.018961 Inits done]
481 21:23:10.207604 secure task start!
482 21:23:10.214269 high task start!
483 21:23:10.214696 low task start!
484 21:23:10.215101 run into bl31
485 21:23:10.220861 NOTICE: BL31: v1.3(release):4fc40b1
486 21:23:10.228657 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 21:23:10.229087 NOTICE: BL31: G12A normal boot!
488 21:23:10.254228 NOTICE: BL31: BL33 decompress pass
489 21:23:10.259863 ERROR: Error initializing runtime service opteed_fast
490 21:23:11.492727
491 21:23:11.493337
492 21:23:11.501098 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 21:23:11.501568
494 21:23:11.501984 Model: Libre Computer AML-A311D-CC Alta
495 21:23:11.709609 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 21:23:11.733064 DRAM: 2 GiB (effective 3.8 GiB)
497 21:23:11.876074 Core: 408 devices, 31 uclasses, devicetree: separate
498 21:23:11.881811 WDT: Not starting watchdog@f0d0
499 21:23:11.914188 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 21:23:11.926582 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 21:23:11.931559 ** Bad device specification mmc 0 **
502 21:23:11.941883 Card did not respond to voltage select! : -110
503 21:23:11.949558 ** Bad device specification mmc 0 **
504 21:23:11.950032 Couldn't find partition mmc 0
505 21:23:11.957865 Card did not respond to voltage select! : -110
506 21:23:11.963455 ** Bad device specification mmc 0 **
507 21:23:11.963887 Couldn't find partition mmc 0
508 21:23:11.968525 Error: could not access storage.
509 21:23:13.231389 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 21:23:13.231969 bl2_stage_init 0x01
511 21:23:13.232446 bl2_stage_init 0x81
512 21:23:13.236940 hw id: 0x0000 - pwm id 0x01
513 21:23:13.237378 bl2_stage_init 0xc1
514 21:23:13.237791 bl2_stage_init 0x02
515 21:23:13.238195
516 21:23:13.242650 L0:00000000
517 21:23:13.243079 L1:20000703
518 21:23:13.243480 L2:00008067
519 21:23:13.243875 L3:14000000
520 21:23:13.248182 B2:00402000
521 21:23:13.248610 B1:e0f83180
522 21:23:13.249015
523 21:23:13.249416 TE: 58167
524 21:23:13.249817
525 21:23:13.253738 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 21:23:13.254170
527 21:23:13.254577 Board ID = 1
528 21:23:13.259325 Set A53 clk to 24M
529 21:23:13.259753 Set A73 clk to 24M
530 21:23:13.260193 Set clk81 to 24M
531 21:23:13.264926 A53 clk: 1200 MHz
532 21:23:13.265349 A73 clk: 1200 MHz
533 21:23:13.265754 CLK81: 166.6M
534 21:23:13.266152 smccc: 00012abd
535 21:23:13.270636 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 21:23:13.276143 board id: 1
537 21:23:13.282016 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 21:23:13.292699 fw parse done
539 21:23:13.298725 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 21:23:13.341285 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 21:23:13.352150 PIEI prepare done
542 21:23:13.352574 fastboot data load
543 21:23:13.352982 fastboot data verify
544 21:23:13.357747 verify result: 266
545 21:23:13.363402 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 21:23:13.363829 LPDDR4 probe
547 21:23:13.364282 ddr clk to 1584MHz
548 21:23:13.371346 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 21:23:13.408752
550 21:23:13.409210 dmc_version 0001
551 21:23:13.415300 Check phy result
552 21:23:13.421158 INFO : End of CA training
553 21:23:13.421583 INFO : End of initialization
554 21:23:13.426752 INFO : Training has run successfully!
555 21:23:13.427173 Check phy result
556 21:23:13.432342 INFO : End of initialization
557 21:23:13.432762 INFO : End of read enable training
558 21:23:13.437965 INFO : End of fine write leveling
559 21:23:13.443555 INFO : End of Write leveling coarse delay
560 21:23:13.444002 INFO : Training has run successfully!
561 21:23:13.444415 Check phy result
562 21:23:13.449181 INFO : End of initialization
563 21:23:13.449603 INFO : End of read dq deskew training
564 21:23:13.454742 INFO : End of MPR read delay center optimization
565 21:23:13.460353 INFO : End of write delay center optimization
566 21:23:13.466020 INFO : End of read delay center optimization
567 21:23:13.466441 INFO : End of max read latency training
568 21:23:13.471681 INFO : Training has run successfully!
569 21:23:13.472151 1D training succeed
570 21:23:13.480898 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 21:23:13.528193 Check phy result
572 21:23:13.528627 INFO : End of initialization
573 21:23:13.551093 INFO : End of 2D read delay Voltage center optimization
574 21:23:13.571233 INFO : End of 2D read delay Voltage center optimization
575 21:23:13.623281 INFO : End of 2D write delay Voltage center optimization
576 21:23:13.672775 INFO : End of 2D write delay Voltage center optimization
577 21:23:13.678256 INFO : Training has run successfully!
578 21:23:13.678682
579 21:23:13.679091 channel==0
580 21:23:13.683885 RxClkDly_Margin_A0==88 ps 9
581 21:23:13.684342 TxDqDly_Margin_A0==98 ps 10
582 21:23:13.687173 RxClkDly_Margin_A1==88 ps 9
583 21:23:13.687594 TxDqDly_Margin_A1==88 ps 9
584 21:23:13.692924 TrainedVREFDQ_A0==74
585 21:23:13.693349 TrainedVREFDQ_A1==74
586 21:23:13.693756 VrefDac_Margin_A0==25
587 21:23:13.698324 DeviceVref_Margin_A0==40
588 21:23:13.698746 VrefDac_Margin_A1==24
589 21:23:13.703841 DeviceVref_Margin_A1==40
590 21:23:13.704307
591 21:23:13.704718
592 21:23:13.705118 channel==1
593 21:23:13.705514 RxClkDly_Margin_A0==98 ps 10
594 21:23:13.709542 TxDqDly_Margin_A0==98 ps 10
595 21:23:13.709970 RxClkDly_Margin_A1==98 ps 10
596 21:23:13.715088 TxDqDly_Margin_A1==88 ps 9
597 21:23:13.715514 TrainedVREFDQ_A0==77
598 21:23:13.715920 TrainedVREFDQ_A1==77
599 21:23:13.720781 VrefDac_Margin_A0==22
600 21:23:13.721204 DeviceVref_Margin_A0==37
601 21:23:13.726327 VrefDac_Margin_A1==22
602 21:23:13.726746 DeviceVref_Margin_A1==37
603 21:23:13.727144
604 21:23:13.731845 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 21:23:13.732307
606 21:23:13.759897 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
607 21:23:13.765550 2D training succeed
608 21:23:13.770971 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 21:23:13.771403 auto size-- 65535DDR cs0 size: 2048MB
610 21:23:13.776616 DDR cs1 size: 2048MB
611 21:23:13.777054 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 21:23:13.782186 cs0 DataBus test pass
613 21:23:13.782617 cs1 DataBus test pass
614 21:23:13.783026 cs0 AddrBus test pass
615 21:23:13.787802 cs1 AddrBus test pass
616 21:23:13.788274
617 21:23:13.788684 100bdlr_step_size ps== 420
618 21:23:13.789094 result report
619 21:23:13.793370 boot times 0Enable ddr reg access
620 21:23:13.801084 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 21:23:13.814590 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 21:23:14.387734 0.0;M3 CHK:0;cm4_sp_mode 0
623 21:23:14.388370 MVN_1=0x00000000
624 21:23:14.393200 MVN_2=0x00000000
625 21:23:14.398958 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 21:23:14.399439 OPS=0x10
627 21:23:14.399872 ring efuse init
628 21:23:14.400331 chipver efuse init
629 21:23:14.404552 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 21:23:14.410070 [0.018960 Inits done]
631 21:23:14.410496 secure task start!
632 21:23:14.410884 high task start!
633 21:23:14.414805 low task start!
634 21:23:14.415219 run into bl31
635 21:23:14.421395 NOTICE: BL31: v1.3(release):4fc40b1
636 21:23:14.429143 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 21:23:14.429569 NOTICE: BL31: G12A normal boot!
638 21:23:14.454576 NOTICE: BL31: BL33 decompress pass
639 21:23:14.460208 ERROR: Error initializing runtime service opteed_fast
640 21:23:15.693190
641 21:23:15.693817
642 21:23:15.701423 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 21:23:15.701879
644 21:23:15.702295 Model: Libre Computer AML-A311D-CC Alta
645 21:23:15.909848 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 21:23:15.933186 DRAM: 2 GiB (effective 3.8 GiB)
647 21:23:16.076240 Core: 408 devices, 31 uclasses, devicetree: separate
648 21:23:16.082108 WDT: Not starting watchdog@f0d0
649 21:23:16.114337 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 21:23:16.126911 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 21:23:16.130882 ** Bad device specification mmc 0 **
652 21:23:16.142171 Card did not respond to voltage select! : -110
653 21:23:16.149836 ** Bad device specification mmc 0 **
654 21:23:16.150270 Couldn't find partition mmc 0
655 21:23:16.158168 Card did not respond to voltage select! : -110
656 21:23:16.163655 ** Bad device specification mmc 0 **
657 21:23:16.164127 Couldn't find partition mmc 0
658 21:23:16.167740 Error: could not access storage.
659 21:23:16.511253 Net: eth0: ethernet@ff3f0000
660 21:23:16.511781 starting USB...
661 21:23:16.763033 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 21:23:16.763500 Starting the controller
663 21:23:16.769967 USB XHCI 1.10
664 21:23:18.481571 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 21:23:18.482187 bl2_stage_init 0x01
666 21:23:18.482612 bl2_stage_init 0x81
667 21:23:18.487207 hw id: 0x0000 - pwm id 0x01
668 21:23:18.487651 bl2_stage_init 0xc1
669 21:23:18.488101 bl2_stage_init 0x02
670 21:23:18.488508
671 21:23:18.492726 L0:00000000
672 21:23:18.493152 L1:20000703
673 21:23:18.493556 L2:00008067
674 21:23:18.493949 L3:14000000
675 21:23:18.498330 B2:00402000
676 21:23:18.498762 B1:e0f83180
677 21:23:18.499168
678 21:23:18.499570 TE: 58167
679 21:23:18.499970
680 21:23:18.503949 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 21:23:18.504420
682 21:23:18.504830 Board ID = 1
683 21:23:18.509551 Set A53 clk to 24M
684 21:23:18.509986 Set A73 clk to 24M
685 21:23:18.510386 Set clk81 to 24M
686 21:23:18.515225 A53 clk: 1200 MHz
687 21:23:18.515653 A73 clk: 1200 MHz
688 21:23:18.516086 CLK81: 166.6M
689 21:23:18.516494 smccc: 00012abe
690 21:23:18.520736 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 21:23:18.526344 board id: 1
692 21:23:18.532272 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 21:23:18.542889 fw parse done
694 21:23:18.548871 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 21:23:18.591484 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 21:23:18.602375 PIEI prepare done
697 21:23:18.602815 fastboot data load
698 21:23:18.603228 fastboot data verify
699 21:23:18.608061 verify result: 266
700 21:23:18.613654 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 21:23:18.614088 LPDDR4 probe
702 21:23:18.614491 ddr clk to 1584MHz
703 21:23:18.621647 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 21:23:18.658879
705 21:23:18.659326 dmc_version 0001
706 21:23:18.665548 Check phy result
707 21:23:18.671419 INFO : End of CA training
708 21:23:18.671847 INFO : End of initialization
709 21:23:18.677030 INFO : Training has run successfully!
710 21:23:18.677460 Check phy result
711 21:23:18.682599 INFO : End of initialization
712 21:23:18.683026 INFO : End of read enable training
713 21:23:18.688306 INFO : End of fine write leveling
714 21:23:18.693825 INFO : End of Write leveling coarse delay
715 21:23:18.694256 INFO : Training has run successfully!
716 21:23:18.694660 Check phy result
717 21:23:18.699419 INFO : End of initialization
718 21:23:18.699844 INFO : End of read dq deskew training
719 21:23:18.705025 INFO : End of MPR read delay center optimization
720 21:23:18.710613 INFO : End of write delay center optimization
721 21:23:18.716301 INFO : End of read delay center optimization
722 21:23:18.716733 INFO : End of max read latency training
723 21:23:18.721822 INFO : Training has run successfully!
724 21:23:18.722244 1D training succeed
725 21:23:18.731014 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 21:23:18.778772 Check phy result
727 21:23:18.779208 INFO : End of initialization
728 21:23:18.801403 INFO : End of 2D read delay Voltage center optimization
729 21:23:18.821626 INFO : End of 2D read delay Voltage center optimization
730 21:23:18.873730 INFO : End of 2D write delay Voltage center optimization
731 21:23:18.922997 INFO : End of 2D write delay Voltage center optimization
732 21:23:18.928564 INFO : Training has run successfully!
733 21:23:18.928993
734 21:23:18.929399 channel==0
735 21:23:18.934129 RxClkDly_Margin_A0==88 ps 9
736 21:23:18.934553 TxDqDly_Margin_A0==98 ps 10
737 21:23:18.937439 RxClkDly_Margin_A1==88 ps 9
738 21:23:18.937860 TxDqDly_Margin_A1==98 ps 10
739 21:23:18.943065 TrainedVREFDQ_A0==74
740 21:23:18.943493 TrainedVREFDQ_A1==74
741 21:23:18.943898 VrefDac_Margin_A0==25
742 21:23:18.948692 DeviceVref_Margin_A0==40
743 21:23:18.949118 VrefDac_Margin_A1==25
744 21:23:18.954285 DeviceVref_Margin_A1==40
745 21:23:18.954715
746 21:23:18.955119
747 21:23:18.955518 channel==1
748 21:23:18.955912 RxClkDly_Margin_A0==98 ps 10
749 21:23:18.957628 TxDqDly_Margin_A0==88 ps 9
750 21:23:18.963183 RxClkDly_Margin_A1==98 ps 10
751 21:23:18.963612 TxDqDly_Margin_A1==88 ps 9
752 21:23:18.964045 TrainedVREFDQ_A0==76
753 21:23:18.968792 TrainedVREFDQ_A1==77
754 21:23:18.969224 VrefDac_Margin_A0==22
755 21:23:18.974416 DeviceVref_Margin_A0==38
756 21:23:18.974838 VrefDac_Margin_A1==22
757 21:23:18.975238 DeviceVref_Margin_A1==37
758 21:23:18.975631
759 21:23:18.979913 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 21:23:18.980372
761 21:23:19.013521 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000017 00000017 00000017 00000015 00000017 00000019 00000017 00000018 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000018 dram_vref_reg_value 0x 00000060
762 21:23:19.014029 2D training succeed
763 21:23:19.019108 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 21:23:19.024731 auto size-- 65535DDR cs0 size: 2048MB
765 21:23:19.025195 DDR cs1 size: 2048MB
766 21:23:19.030352 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 21:23:19.030786 cs0 DataBus test pass
768 21:23:19.031199 cs1 DataBus test pass
769 21:23:19.035912 cs0 AddrBus test pass
770 21:23:19.036370 cs1 AddrBus test pass
771 21:23:19.036773
772 21:23:19.041521 100bdlr_step_size ps== 420
773 21:23:19.041978 result report
774 21:23:19.042385 boot times 0Enable ddr reg access
775 21:23:19.051457 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 21:23:19.064924 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 21:23:19.638671 0.0;M3 CHK:0;cm4_sp_mode 0
778 21:23:19.639105 MVN_1=0x00000000
779 21:23:19.644168 MVN_2=0x00000000
780 21:23:19.649938 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 21:23:19.650446 OPS=0x10
782 21:23:19.650857 ring efuse init
783 21:23:19.651249 chipver efuse init
784 21:23:19.655482 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 21:23:19.660971 [0.018961 Inits done]
786 21:23:19.661401 secure task start!
787 21:23:19.661797 high task start!
788 21:23:19.665611 low task start!
789 21:23:19.666048 run into bl31
790 21:23:19.672175 NOTICE: BL31: v1.3(release):4fc40b1
791 21:23:19.680135 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 21:23:19.680582 NOTICE: BL31: G12A normal boot!
793 21:23:19.705499 NOTICE: BL31: BL33 decompress pass
794 21:23:19.711095 ERROR: Error initializing runtime service opteed_fast
795 21:23:20.944155
796 21:23:20.944784
797 21:23:20.952566 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 21:23:20.953046
799 21:23:20.953476 Model: Libre Computer AML-A311D-CC Alta
800 21:23:21.160938 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 21:23:21.184227 DRAM: 2 GiB (effective 3.8 GiB)
802 21:23:21.327181 Core: 408 devices, 31 uclasses, devicetree: separate
803 21:23:21.333186 WDT: Not starting watchdog@f0d0
804 21:23:21.365369 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 21:23:21.377812 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 21:23:21.382915 ** Bad device specification mmc 0 **
807 21:23:21.393217 Card did not respond to voltage select! : -110
808 21:23:21.400898 ** Bad device specification mmc 0 **
809 21:23:21.401344 Couldn't find partition mmc 0
810 21:23:21.409062 Card did not respond to voltage select! : -110
811 21:23:21.414586 ** Bad device specification mmc 0 **
812 21:23:21.415036 Couldn't find partition mmc 0
813 21:23:21.419790 Error: could not access storage.
814 21:23:21.762262 Net: eth0: ethernet@ff3f0000
815 21:23:21.762886 starting USB...
816 21:23:22.013995 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 21:23:22.014601 Starting the controller
818 21:23:22.020991 USB XHCI 1.10
819 21:23:24.183481 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 21:23:24.184157 bl2_stage_init 0x01
821 21:23:24.184603 bl2_stage_init 0x81
822 21:23:24.188952 hw id: 0x0000 - pwm id 0x01
823 21:23:24.189408 bl2_stage_init 0xc1
824 21:23:24.189829 bl2_stage_init 0x02
825 21:23:24.190238
826 21:23:24.194595 L0:00000000
827 21:23:24.195039 L1:20000703
828 21:23:24.195446 L2:00008067
829 21:23:24.195848 L3:14000000
830 21:23:24.197485 B2:00402000
831 21:23:24.197930 B1:e0f83180
832 21:23:24.198334
833 21:23:24.198737 TE: 58167
834 21:23:24.199141
835 21:23:24.208554 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 21:23:24.209003
837 21:23:24.209413 Board ID = 1
838 21:23:24.209813 Set A53 clk to 24M
839 21:23:24.210211 Set A73 clk to 24M
840 21:23:24.214164 Set clk81 to 24M
841 21:23:24.214603 A53 clk: 1200 MHz
842 21:23:24.215007 A73 clk: 1200 MHz
843 21:23:24.217685 CLK81: 166.6M
844 21:23:24.218133 smccc: 00012abe
845 21:23:24.223220 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 21:23:24.228805 board id: 1
847 21:23:24.234027 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 21:23:24.244703 fw parse done
849 21:23:24.250647 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 21:23:24.293275 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 21:23:24.304247 PIEI prepare done
852 21:23:24.304689 fastboot data load
853 21:23:24.305101 fastboot data verify
854 21:23:24.309812 verify result: 266
855 21:23:24.315405 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 21:23:24.315845 LPDDR4 probe
857 21:23:24.316308 ddr clk to 1584MHz
858 21:23:24.323406 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 21:23:24.360631
860 21:23:24.361073 dmc_version 0001
861 21:23:24.367323 Check phy result
862 21:23:24.373221 INFO : End of CA training
863 21:23:24.373698 INFO : End of initialization
864 21:23:24.378792 INFO : Training has run successfully!
865 21:23:24.379231 Check phy result
866 21:23:24.384383 INFO : End of initialization
867 21:23:24.384814 INFO : End of read enable training
868 21:23:24.389996 INFO : End of fine write leveling
869 21:23:24.395556 INFO : End of Write leveling coarse delay
870 21:23:24.396021 INFO : Training has run successfully!
871 21:23:24.396445 Check phy result
872 21:23:24.401177 INFO : End of initialization
873 21:23:24.401611 INFO : End of read dq deskew training
874 21:23:24.406784 INFO : End of MPR read delay center optimization
875 21:23:24.412429 INFO : End of write delay center optimization
876 21:23:24.417974 INFO : End of read delay center optimization
877 21:23:24.418406 INFO : End of max read latency training
878 21:23:24.423572 INFO : Training has run successfully!
879 21:23:24.424041 1D training succeed
880 21:23:24.432848 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 21:23:24.480379 Check phy result
882 21:23:24.480886 INFO : End of initialization
883 21:23:24.502763 INFO : End of 2D read delay Voltage center optimization
884 21:23:24.522955 INFO : End of 2D read delay Voltage center optimization
885 21:23:24.574831 INFO : End of 2D write delay Voltage center optimization
886 21:23:24.624086 INFO : End of 2D write delay Voltage center optimization
887 21:23:24.629681 INFO : Training has run successfully!
888 21:23:24.630126
889 21:23:24.630545 channel==0
890 21:23:24.635216 RxClkDly_Margin_A0==88 ps 9
891 21:23:24.635654 TxDqDly_Margin_A0==98 ps 10
892 21:23:24.640886 RxClkDly_Margin_A1==88 ps 9
893 21:23:24.641328 TxDqDly_Margin_A1==98 ps 10
894 21:23:24.641766 TrainedVREFDQ_A0==74
895 21:23:24.646502 TrainedVREFDQ_A1==75
896 21:23:24.646984 VrefDac_Margin_A0==25
897 21:23:24.647399 DeviceVref_Margin_A0==40
898 21:23:24.652033 VrefDac_Margin_A1==24
899 21:23:24.652503 DeviceVref_Margin_A1==39
900 21:23:24.652894
901 21:23:24.653285
902 21:23:24.657674 channel==1
903 21:23:24.658096 RxClkDly_Margin_A0==98 ps 10
904 21:23:24.658486 TxDqDly_Margin_A0==98 ps 10
905 21:23:24.663177 RxClkDly_Margin_A1==88 ps 9
906 21:23:24.663596 TxDqDly_Margin_A1==98 ps 10
907 21:23:24.668893 TrainedVREFDQ_A0==77
908 21:23:24.669336 TrainedVREFDQ_A1==77
909 21:23:24.669732 VrefDac_Margin_A0==22
910 21:23:24.674510 DeviceVref_Margin_A0==37
911 21:23:24.674980 VrefDac_Margin_A1==24
912 21:23:24.680023 DeviceVref_Margin_A1==37
913 21:23:24.680451
914 21:23:24.680843 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 21:23:24.685676
916 21:23:24.713683 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
917 21:23:24.714138 2D training succeed
918 21:23:24.719204 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 21:23:24.724743 auto size-- 65535DDR cs0 size: 2048MB
920 21:23:24.725165 DDR cs1 size: 2048MB
921 21:23:24.730339 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 21:23:24.730757 cs0 DataBus test pass
923 21:23:24.735936 cs1 DataBus test pass
924 21:23:24.736393 cs0 AddrBus test pass
925 21:23:24.736786 cs1 AddrBus test pass
926 21:23:24.737169
927 21:23:24.741537 100bdlr_step_size ps== 426
928 21:23:24.741972 result report
929 21:23:24.747167 boot times 0Enable ddr reg access
930 21:23:24.752578 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 21:23:24.766043 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 21:23:25.338023 0.0;M3 CHK:0;cm4_sp_mode 0
933 21:23:25.338554 MVN_1=0x00000000
934 21:23:25.343520 MVN_2=0x00000000
935 21:23:25.349264 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 21:23:25.349712 OPS=0x10
937 21:23:25.350124 ring efuse init
938 21:23:25.350522 chipver efuse init
939 21:23:25.354864 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 21:23:25.360476 [0.018960 Inits done]
941 21:23:25.360918 secure task start!
942 21:23:25.361333 high task start!
943 21:23:25.365045 low task start!
944 21:23:25.365493 run into bl31
945 21:23:25.371718 NOTICE: BL31: v1.3(release):4fc40b1
946 21:23:25.379544 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 21:23:25.380059 NOTICE: BL31: G12A normal boot!
948 21:23:25.404874 NOTICE: BL31: BL33 decompress pass
949 21:23:25.410554 ERROR: Error initializing runtime service opteed_fast
950 21:23:26.643488
951 21:23:26.644081
952 21:23:26.651832 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 21:23:26.652311
954 21:23:26.652733 Model: Libre Computer AML-A311D-CC Alta
955 21:23:26.860273 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 21:23:26.883712 DRAM: 2 GiB (effective 3.8 GiB)
957 21:23:27.026699 Core: 408 devices, 31 uclasses, devicetree: separate
958 21:23:27.032515 WDT: Not starting watchdog@f0d0
959 21:23:27.064745 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 21:23:27.077235 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 21:23:27.082275 ** Bad device specification mmc 0 **
962 21:23:27.092602 Card did not respond to voltage select! : -110
963 21:23:27.100265 ** Bad device specification mmc 0 **
964 21:23:27.100731 Couldn't find partition mmc 0
965 21:23:27.108668 Card did not respond to voltage select! : -110
966 21:23:27.114099 ** Bad device specification mmc 0 **
967 21:23:27.114548 Couldn't find partition mmc 0
968 21:23:27.119167 Error: could not access storage.
969 21:23:27.462676 Net: eth0: ethernet@ff3f0000
970 21:23:27.463283 starting USB...
971 21:23:27.714502 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 21:23:27.715017 Starting the controller
973 21:23:27.721430 USB XHCI 1.10
974 21:23:29.275562 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 21:23:29.283828 scanning usb for storage devices... 0 Storage Device(s) found
977 21:23:29.335357 Hit any key to stop autoboot: 1
978 21:23:29.336199 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 21:23:29.336802 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 21:23:29.337316 Setting prompt string to ['=>']
981 21:23:29.337823 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 21:23:29.351224 0
983 21:23:29.352107 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 21:23:29.352615 Sending with 10 millisecond of delay
986 21:23:30.487290 => setenv autoload no
987 21:23:30.498007 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 21:23:30.502966 setenv autoload no
989 21:23:30.503713 Sending with 10 millisecond of delay
991 21:23:32.300532 => setenv initrd_high 0xffffffff
992 21:23:32.311220 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 21:23:32.312096 setenv initrd_high 0xffffffff
994 21:23:32.312813 Sending with 10 millisecond of delay
996 21:23:33.929005 => setenv fdt_high 0xffffffff
997 21:23:33.939729 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 21:23:33.940546 setenv fdt_high 0xffffffff
999 21:23:33.941257 Sending with 10 millisecond of delay
1001 21:23:34.233068 => dhcp
1002 21:23:34.243740 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 21:23:34.244541 dhcp
1004 21:23:34.244980 Speed: 1000, full duplex
1005 21:23:34.245390 BOOTP broadcast 1
1006 21:23:34.253743 DHCP client bound to address 192.168.6.27 (10 ms)
1007 21:23:34.254419 Sending with 10 millisecond of delay
1009 21:23:35.930716 => setenv serverip 192.168.6.2
1010 21:23:35.941412 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 21:23:35.942255 setenv serverip 192.168.6.2
1012 21:23:35.942941 Sending with 10 millisecond of delay
1014 21:23:39.666068 => tftpboot 0x01080000 936452/tftp-deploy-9u6i6ad4/kernel/uImage
1015 21:23:39.676818 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1016 21:23:39.677606 tftpboot 0x01080000 936452/tftp-deploy-9u6i6ad4/kernel/uImage
1017 21:23:39.678050 Speed: 1000, full duplex
1018 21:23:39.678468 Using ethernet@ff3f0000 device
1019 21:23:39.680372 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 21:23:39.685295 Filename '936452/tftp-deploy-9u6i6ad4/kernel/uImage'.
1021 21:23:39.688938 Load address: 0x1080000
1022 21:23:42.474789 Loading: *################################################## 43.6 MiB
1023 21:23:42.475449 15.6 MiB/s
1024 21:23:42.475907 done
1025 21:23:42.479113 Bytes transferred = 45713984 (2b98a40 hex)
1026 21:23:42.479904 Sending with 10 millisecond of delay
1028 21:23:47.166476 => tftpboot 0x08000000 936452/tftp-deploy-9u6i6ad4/ramdisk/ramdisk.cpio.gz.uboot
1029 21:23:47.177264 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1030 21:23:47.178054 tftpboot 0x08000000 936452/tftp-deploy-9u6i6ad4/ramdisk/ramdisk.cpio.gz.uboot
1031 21:23:47.178503 Speed: 1000, full duplex
1032 21:23:47.178920 Using ethernet@ff3f0000 device
1033 21:23:47.179932 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 21:23:47.191830 Filename '936452/tftp-deploy-9u6i6ad4/ramdisk/ramdisk.cpio.gz.uboot'.
1035 21:23:47.192392 Load address: 0x8000000
1036 21:23:54.144872 Loading: *##################T ############################### UDP wrong checksum 00000005 00004197
1037 21:23:59.145562 T UDP wrong checksum 00000005 00004197
1038 21:24:09.148863 T T UDP wrong checksum 00000005 00004197
1039 21:24:29.152465 T T T T UDP wrong checksum 00000005 00004197
1040 21:24:37.171503 T UDP wrong checksum 000000ff 000004c6
1041 21:24:37.212623 UDP wrong checksum 000000ff 00009eb8
1042 21:24:44.156936 T
1043 21:24:44.157596 Retry count exceeded; starting again
1045 21:24:44.159100 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1048 21:24:44.161209 end: 2.4 uboot-commands (duration 00:01:47) [common]
1050 21:24:44.162725 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1052 21:24:44.163857 end: 2 uboot-action (duration 00:01:47) [common]
1054 21:24:44.165604 Cleaning after the job
1055 21:24:44.166223 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/ramdisk
1056 21:24:44.167730 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/kernel
1057 21:24:44.215851 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/dtb
1058 21:24:44.216689 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/nfsrootfs
1059 21:24:44.386151 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936452/tftp-deploy-9u6i6ad4/modules
1060 21:24:44.406402 start: 4.1 power-off (timeout 00:00:30) [common]
1061 21:24:44.407066 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1062 21:24:44.440202 >> OK - accepted request
1063 21:24:44.442582 Returned 0 in 0 seconds
1064 21:24:44.543324 end: 4.1 power-off (duration 00:00:00) [common]
1066 21:24:44.544348 start: 4.2 read-feedback (timeout 00:10:00) [common]
1067 21:24:44.545006 Listened to connection for namespace 'common' for up to 1s
1068 21:24:45.545918 Finalising connection for namespace 'common'
1069 21:24:45.546381 Disconnecting from shell: Finalise
1070 21:24:45.546652 =>
1071 21:24:45.647357 end: 4.2 read-feedback (duration 00:00:01) [common]
1072 21:24:45.647810 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/936452
1073 21:24:48.677812 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/936452
1074 21:24:48.678463 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.