Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 21:14:18.703192 lava-dispatcher, installed at version: 2024.01
2 21:14:18.704105 start: 0 validate
3 21:14:18.704895 Start time: 2024-11-04 21:14:18.704862+00:00 (UTC)
4 21:14:18.705494 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 21:14:18.706074 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 21:14:18.752525 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 21:14:18.753091 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-5-g557329bcecc2%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 21:14:18.783616 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 21:14:18.784335 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-5-g557329bcecc2%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 21:14:18.818284 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 21:14:18.818837 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 21:14:18.851319 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 21:14:18.851850 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-5-g557329bcecc2%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 21:14:18.892011 validate duration: 0.19
16 21:14:18.893590 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 21:14:18.894191 start: 1.1 download-retry (timeout 00:10:00) [common]
18 21:14:18.894777 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 21:14:18.895792 Not decompressing ramdisk as can be used compressed.
20 21:14:18.896678 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 21:14:18.897208 saving as /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/ramdisk/initrd.cpio.gz
22 21:14:18.897702 total size: 5628169 (5 MB)
23 21:14:18.944738 progress 0 % (0 MB)
24 21:14:18.953443 progress 5 % (0 MB)
25 21:14:18.962794 progress 10 % (0 MB)
26 21:14:18.970187 progress 15 % (0 MB)
27 21:14:18.977631 progress 20 % (1 MB)
28 21:14:18.984660 progress 25 % (1 MB)
29 21:14:18.989101 progress 30 % (1 MB)
30 21:14:18.993454 progress 35 % (1 MB)
31 21:14:18.997418 progress 40 % (2 MB)
32 21:14:19.001861 progress 45 % (2 MB)
33 21:14:19.006153 progress 50 % (2 MB)
34 21:14:19.010456 progress 55 % (2 MB)
35 21:14:19.014790 progress 60 % (3 MB)
36 21:14:19.018787 progress 65 % (3 MB)
37 21:14:19.023100 progress 70 % (3 MB)
38 21:14:19.027014 progress 75 % (4 MB)
39 21:14:19.031328 progress 80 % (4 MB)
40 21:14:19.035247 progress 85 % (4 MB)
41 21:14:19.039764 progress 90 % (4 MB)
42 21:14:19.043959 progress 95 % (5 MB)
43 21:14:19.047429 progress 100 % (5 MB)
44 21:14:19.048190 5 MB downloaded in 0.15 s (35.67 MB/s)
45 21:14:19.048785 end: 1.1.1 http-download (duration 00:00:00) [common]
47 21:14:19.049740 end: 1.1 download-retry (duration 00:00:00) [common]
48 21:14:19.050064 start: 1.2 download-retry (timeout 00:10:00) [common]
49 21:14:19.050354 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 21:14:19.050898 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-5-g557329bcecc2/arm64/defconfig/gcc-12/kernel/Image
51 21:14:19.051178 saving as /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/kernel/Image
52 21:14:19.051402 total size: 45713920 (43 MB)
53 21:14:19.051625 No compression specified
54 21:14:19.092547 progress 0 % (0 MB)
55 21:14:19.121203 progress 5 % (2 MB)
56 21:14:19.150248 progress 10 % (4 MB)
57 21:14:19.179345 progress 15 % (6 MB)
58 21:14:19.208523 progress 20 % (8 MB)
59 21:14:19.236637 progress 25 % (10 MB)
60 21:14:19.266801 progress 30 % (13 MB)
61 21:14:19.295224 progress 35 % (15 MB)
62 21:14:19.325038 progress 40 % (17 MB)
63 21:14:19.353130 progress 45 % (19 MB)
64 21:14:19.381632 progress 50 % (21 MB)
65 21:14:19.410587 progress 55 % (24 MB)
66 21:14:19.439662 progress 60 % (26 MB)
67 21:14:19.467673 progress 65 % (28 MB)
68 21:14:19.495886 progress 70 % (30 MB)
69 21:14:19.524722 progress 75 % (32 MB)
70 21:14:19.553022 progress 80 % (34 MB)
71 21:14:19.580454 progress 85 % (37 MB)
72 21:14:19.608640 progress 90 % (39 MB)
73 21:14:19.636507 progress 95 % (41 MB)
74 21:14:19.663903 progress 100 % (43 MB)
75 21:14:19.664439 43 MB downloaded in 0.61 s (71.12 MB/s)
76 21:14:19.664926 end: 1.2.1 http-download (duration 00:00:01) [common]
78 21:14:19.665766 end: 1.2 download-retry (duration 00:00:01) [common]
79 21:14:19.666059 start: 1.3 download-retry (timeout 00:09:59) [common]
80 21:14:19.666342 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 21:14:19.666806 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-5-g557329bcecc2/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 21:14:19.667080 saving as /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/dtb/meson-g12b-a311d-libretech-cc.dtb
83 21:14:19.667302 total size: 54703 (0 MB)
84 21:14:19.667523 No compression specified
85 21:14:19.707312 progress 59 % (0 MB)
86 21:14:19.708186 progress 100 % (0 MB)
87 21:14:19.708752 0 MB downloaded in 0.04 s (1.26 MB/s)
88 21:14:19.709249 end: 1.3.1 http-download (duration 00:00:00) [common]
90 21:14:19.710099 end: 1.3 download-retry (duration 00:00:00) [common]
91 21:14:19.710374 start: 1.4 download-retry (timeout 00:09:59) [common]
92 21:14:19.710648 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 21:14:19.711100 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 21:14:19.711344 saving as /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/nfsrootfs/full.rootfs.tar
95 21:14:19.711561 total size: 120894716 (115 MB)
96 21:14:19.711781 Using unxz to decompress xz
97 21:14:19.749833 progress 0 % (0 MB)
98 21:14:20.555011 progress 5 % (5 MB)
99 21:14:21.405784 progress 10 % (11 MB)
100 21:14:22.200154 progress 15 % (17 MB)
101 21:14:22.936751 progress 20 % (23 MB)
102 21:14:23.532967 progress 25 % (28 MB)
103 21:14:24.356163 progress 30 % (34 MB)
104 21:14:25.153595 progress 35 % (40 MB)
105 21:14:25.524706 progress 40 % (46 MB)
106 21:14:25.904415 progress 45 % (51 MB)
107 21:14:26.627620 progress 50 % (57 MB)
108 21:14:27.547968 progress 55 % (63 MB)
109 21:14:28.326957 progress 60 % (69 MB)
110 21:14:29.083995 progress 65 % (74 MB)
111 21:14:29.862164 progress 70 % (80 MB)
112 21:14:30.683577 progress 75 % (86 MB)
113 21:14:31.469692 progress 80 % (92 MB)
114 21:14:32.229976 progress 85 % (98 MB)
115 21:14:33.079146 progress 90 % (103 MB)
116 21:14:33.852929 progress 95 % (109 MB)
117 21:14:34.675733 progress 100 % (115 MB)
118 21:14:34.688118 115 MB downloaded in 14.98 s (7.70 MB/s)
119 21:14:34.688988 end: 1.4.1 http-download (duration 00:00:15) [common]
121 21:14:34.690598 end: 1.4 download-retry (duration 00:00:15) [common]
122 21:14:34.691127 start: 1.5 download-retry (timeout 00:09:44) [common]
123 21:14:34.691650 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 21:14:34.692488 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-5-g557329bcecc2/arm64/defconfig/gcc-12/modules.tar.xz
125 21:14:34.692955 saving as /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/modules/modules.tar
126 21:14:34.693371 total size: 11612232 (11 MB)
127 21:14:34.693795 Using unxz to decompress xz
128 21:14:34.738348 progress 0 % (0 MB)
129 21:14:34.804443 progress 5 % (0 MB)
130 21:14:34.877414 progress 10 % (1 MB)
131 21:14:34.971870 progress 15 % (1 MB)
132 21:14:35.063058 progress 20 % (2 MB)
133 21:14:35.141453 progress 25 % (2 MB)
134 21:14:35.216130 progress 30 % (3 MB)
135 21:14:35.293422 progress 35 % (3 MB)
136 21:14:35.364958 progress 40 % (4 MB)
137 21:14:35.439266 progress 45 % (5 MB)
138 21:14:35.522273 progress 50 % (5 MB)
139 21:14:35.598204 progress 55 % (6 MB)
140 21:14:35.682068 progress 60 % (6 MB)
141 21:14:35.761336 progress 65 % (7 MB)
142 21:14:35.840630 progress 70 % (7 MB)
143 21:14:35.917068 progress 75 % (8 MB)
144 21:14:35.999448 progress 80 % (8 MB)
145 21:14:36.078274 progress 85 % (9 MB)
146 21:14:36.155786 progress 90 % (9 MB)
147 21:14:36.232566 progress 95 % (10 MB)
148 21:14:36.308752 progress 100 % (11 MB)
149 21:14:36.320221 11 MB downloaded in 1.63 s (6.81 MB/s)
150 21:14:36.320899 end: 1.5.1 http-download (duration 00:00:02) [common]
152 21:14:36.321896 end: 1.5 download-retry (duration 00:00:02) [common]
153 21:14:36.322221 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 21:14:36.322538 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 21:14:52.777037 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/936406/extract-nfsrootfs-p2b74zg8
156 21:14:52.777656 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 21:14:52.777946 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 21:14:52.778683 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm
159 21:14:52.779224 makedir: /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin
160 21:14:52.779604 makedir: /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/tests
161 21:14:52.779963 makedir: /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/results
162 21:14:52.780370 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-add-keys
163 21:14:52.780982 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-add-sources
164 21:14:52.781554 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-background-process-start
165 21:14:52.782096 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-background-process-stop
166 21:14:52.782665 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-common-functions
167 21:14:52.783200 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-echo-ipv4
168 21:14:52.783746 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-install-packages
169 21:14:52.784333 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-installed-packages
170 21:14:52.784832 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-os-build
171 21:14:52.785330 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-probe-channel
172 21:14:52.785810 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-probe-ip
173 21:14:52.786284 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-target-ip
174 21:14:52.786753 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-target-mac
175 21:14:52.787221 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-target-storage
176 21:14:52.787740 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-test-case
177 21:14:52.788325 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-test-event
178 21:14:52.788854 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-test-feedback
179 21:14:52.789368 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-test-raise
180 21:14:52.789879 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-test-reference
181 21:14:52.790390 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-test-runner
182 21:14:52.790897 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-test-set
183 21:14:52.791448 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-test-shell
184 21:14:52.792013 Updating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-add-keys (debian)
185 21:14:52.792593 Updating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-add-sources (debian)
186 21:14:52.793105 Updating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-install-packages (debian)
187 21:14:52.793629 Updating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-installed-packages (debian)
188 21:14:52.794172 Updating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/bin/lava-os-build (debian)
189 21:14:52.794628 Creating /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/environment
190 21:14:52.795013 LAVA metadata
191 21:14:52.795279 - LAVA_JOB_ID=936406
192 21:14:52.795496 - LAVA_DISPATCHER_IP=192.168.6.2
193 21:14:52.795882 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 21:14:52.796927 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 21:14:52.797248 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 21:14:52.797456 skipped lava-vland-overlay
197 21:14:52.797694 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 21:14:52.797946 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 21:14:52.798164 skipped lava-multinode-overlay
200 21:14:52.798405 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 21:14:52.798654 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 21:14:52.798899 Loading test definitions
203 21:14:52.799177 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 21:14:52.799395 Using /lava-936406 at stage 0
205 21:14:52.804476 uuid=936406_1.6.2.4.1 testdef=None
206 21:14:52.804887 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 21:14:52.805198 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 21:14:52.807236 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 21:14:52.808078 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 21:14:52.810512 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 21:14:52.811345 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 21:14:52.813208 runner path: /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/0/tests/0_timesync-off test_uuid 936406_1.6.2.4.1
215 21:14:52.813765 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 21:14:52.814578 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 21:14:52.814802 Using /lava-936406 at stage 0
219 21:14:52.815159 Fetching tests from https://github.com/kernelci/test-definitions.git
220 21:14:52.815452 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/0/tests/1_kselftest-rtc'
221 21:14:56.327880 Running '/usr/bin/git checkout kernelci.org
222 21:14:56.622713 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 21:14:56.625104 uuid=936406_1.6.2.4.5 testdef=None
224 21:14:56.625737 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 21:14:56.627232 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 21:14:56.632696 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 21:14:56.634300 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 21:14:56.641535 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 21:14:56.643206 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 21:14:56.650183 runner path: /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/0/tests/1_kselftest-rtc test_uuid 936406_1.6.2.4.5
234 21:14:56.650707 BOARD='meson-g12b-a311d-libretech-cc'
235 21:14:56.651124 BRANCH='mainline'
236 21:14:56.651525 SKIPFILE='/dev/null'
237 21:14:56.651925 SKIP_INSTALL='True'
238 21:14:56.652351 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-5-g557329bcecc2/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 21:14:56.652757 TST_CASENAME=''
240 21:14:56.653155 TST_CMDFILES='rtc'
241 21:14:56.654149 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 21:14:56.655700 Creating lava-test-runner.conf files
244 21:14:56.656145 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/936406/lava-overlay-tsa1myzm/lava-936406/0 for stage 0
245 21:14:56.656857 - 0_timesync-off
246 21:14:56.657334 - 1_kselftest-rtc
247 21:14:56.657977 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 21:14:56.658522 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 21:15:20.264813 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 21:15:20.265333 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 21:15:20.265704 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 21:15:20.266070 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 21:15:20.266433 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 21:15:20.963873 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 21:15:20.964371 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 21:15:20.964644 extracting modules file /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/936406/extract-nfsrootfs-p2b74zg8
257 21:15:22.322151 extracting modules file /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/modules/modules.tar to /var/lib/lava/dispatcher/tmp/936406/extract-overlay-ramdisk-v6qi3rhh/ramdisk
258 21:15:23.720836 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 21:15:23.721317 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 21:15:23.721609 [common] Applying overlay to NFS
261 21:15:23.721838 [common] Applying overlay /var/lib/lava/dispatcher/tmp/936406/compress-overlay-xyhp_nd2/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/936406/extract-nfsrootfs-p2b74zg8
262 21:15:26.459808 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 21:15:26.460301 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 21:15:26.460598 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 21:15:26.460856 Converting downloaded kernel to a uImage
266 21:15:26.461192 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/kernel/Image /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/kernel/uImage
267 21:15:26.920402 output: Image Name:
268 21:15:26.920832 output: Created: Mon Nov 4 21:15:26 2024
269 21:15:26.921060 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 21:15:26.921276 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 21:15:26.921484 output: Load Address: 01080000
272 21:15:26.921690 output: Entry Point: 01080000
273 21:15:26.921895 output:
274 21:15:26.922236 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 21:15:26.922515 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 21:15:26.922794 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 21:15:26.923058 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 21:15:26.923328 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 21:15:26.923591 Building ramdisk /var/lib/lava/dispatcher/tmp/936406/extract-overlay-ramdisk-v6qi3rhh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/936406/extract-overlay-ramdisk-v6qi3rhh/ramdisk
280 21:15:29.108648 >> 166824 blocks
281 21:15:36.983415 Adding RAMdisk u-boot header.
282 21:15:36.984164 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/936406/extract-overlay-ramdisk-v6qi3rhh/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/936406/extract-overlay-ramdisk-v6qi3rhh/ramdisk.cpio.gz.uboot
283 21:15:37.229874 output: Image Name:
284 21:15:37.230305 output: Created: Mon Nov 4 21:15:36 2024
285 21:15:37.230520 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 21:15:37.230728 output: Data Size: 23434779 Bytes = 22885.53 KiB = 22.35 MiB
287 21:15:37.230933 output: Load Address: 00000000
288 21:15:37.231134 output: Entry Point: 00000000
289 21:15:37.231335 output:
290 21:15:37.232065 rename /var/lib/lava/dispatcher/tmp/936406/extract-overlay-ramdisk-v6qi3rhh/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/ramdisk/ramdisk.cpio.gz.uboot
291 21:15:37.232904 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 21:15:37.233629 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 21:15:37.234280 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 21:15:37.234807 No LXC device requested
295 21:15:37.235374 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 21:15:37.236010 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 21:15:37.236608 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 21:15:37.237063 Checking files for TFTP limit of 4294967296 bytes.
299 21:15:37.240013 end: 1 tftp-deploy (duration 00:01:18) [common]
300 21:15:37.240656 start: 2 uboot-action (timeout 00:05:00) [common]
301 21:15:37.241229 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 21:15:37.241774 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 21:15:37.242328 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 21:15:37.242910 Using kernel file from prepare-kernel: 936406/tftp-deploy-2b72ra0s/kernel/uImage
305 21:15:37.243614 substitutions:
306 21:15:37.244097 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 21:15:37.244549 - {DTB_ADDR}: 0x01070000
308 21:15:37.244995 - {DTB}: 936406/tftp-deploy-2b72ra0s/dtb/meson-g12b-a311d-libretech-cc.dtb
309 21:15:37.245440 - {INITRD}: 936406/tftp-deploy-2b72ra0s/ramdisk/ramdisk.cpio.gz.uboot
310 21:15:37.245883 - {KERNEL_ADDR}: 0x01080000
311 21:15:37.246321 - {KERNEL}: 936406/tftp-deploy-2b72ra0s/kernel/uImage
312 21:15:37.246757 - {LAVA_MAC}: None
313 21:15:37.247235 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/936406/extract-nfsrootfs-p2b74zg8
314 21:15:37.247678 - {NFS_SERVER_IP}: 192.168.6.2
315 21:15:37.248150 - {PRESEED_CONFIG}: None
316 21:15:37.248594 - {PRESEED_LOCAL}: None
317 21:15:37.249033 - {RAMDISK_ADDR}: 0x08000000
318 21:15:37.249464 - {RAMDISK}: 936406/tftp-deploy-2b72ra0s/ramdisk/ramdisk.cpio.gz.uboot
319 21:15:37.249900 - {ROOT_PART}: None
320 21:15:37.250329 - {ROOT}: None
321 21:15:37.250758 - {SERVER_IP}: 192.168.6.2
322 21:15:37.251186 - {TEE_ADDR}: 0x83000000
323 21:15:37.251615 - {TEE}: None
324 21:15:37.252070 Parsed boot commands:
325 21:15:37.252495 - setenv autoload no
326 21:15:37.252925 - setenv initrd_high 0xffffffff
327 21:15:37.253353 - setenv fdt_high 0xffffffff
328 21:15:37.253777 - dhcp
329 21:15:37.254202 - setenv serverip 192.168.6.2
330 21:15:37.254631 - tftpboot 0x01080000 936406/tftp-deploy-2b72ra0s/kernel/uImage
331 21:15:37.255063 - tftpboot 0x08000000 936406/tftp-deploy-2b72ra0s/ramdisk/ramdisk.cpio.gz.uboot
332 21:15:37.255494 - tftpboot 0x01070000 936406/tftp-deploy-2b72ra0s/dtb/meson-g12b-a311d-libretech-cc.dtb
333 21:15:37.255925 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/936406/extract-nfsrootfs-p2b74zg8,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 21:15:37.256396 - bootm 0x01080000 0x08000000 0x01070000
335 21:15:37.256956 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 21:15:37.258610 start: 2.3 connect-device (timeout 00:05:00) [common]
338 21:15:37.259073 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 21:15:37.275109 Setting prompt string to ['lava-test: # ']
340 21:15:37.276835 end: 2.3 connect-device (duration 00:00:00) [common]
341 21:15:37.277517 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 21:15:37.278144 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 21:15:37.278918 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 21:15:37.280203 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 21:15:37.318298 >> OK - accepted request
346 21:15:37.320442 Returned 0 in 0 seconds
347 21:15:37.421634 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 21:15:37.423431 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 21:15:37.424088 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 21:15:37.424649 Setting prompt string to ['Hit any key to stop autoboot']
352 21:15:37.425146 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 21:15:37.426902 Trying 192.168.56.21...
354 21:15:37.427445 Connected to conserv1.
355 21:15:37.427903 Escape character is '^]'.
356 21:15:37.428400
357 21:15:37.428862 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 21:15:37.429322
359 21:15:49.549031 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 21:15:49.549707 bl2_stage_init 0x01
361 21:15:49.550175 bl2_stage_init 0x81
362 21:15:49.554369 hw id: 0x0000 - pwm id 0x01
363 21:15:49.554940 bl2_stage_init 0xc1
364 21:15:49.555415 bl2_stage_init 0x02
365 21:15:49.555868
366 21:15:49.560092 L0:00000000
367 21:15:49.560599 L1:20000703
368 21:15:49.561055 L2:00008067
369 21:15:49.561501 L3:14000000
370 21:15:49.563001 B2:00402000
371 21:15:49.563487 B1:e0f83180
372 21:15:49.563920
373 21:15:49.564388 TE: 58159
374 21:15:49.564822
375 21:15:49.574170 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 21:15:49.574653
377 21:15:49.575091 Board ID = 1
378 21:15:49.575519 Set A53 clk to 24M
379 21:15:49.575945 Set A73 clk to 24M
380 21:15:49.579822 Set clk81 to 24M
381 21:15:49.580324 A53 clk: 1200 MHz
382 21:15:49.580755 A73 clk: 1200 MHz
383 21:15:49.585345 CLK81: 166.6M
384 21:15:49.585807 smccc: 00012ab5
385 21:15:49.590874 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 21:15:49.591393 board id: 1
387 21:15:49.599384 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 21:15:49.610022 fw parse done
389 21:15:49.616018 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 21:15:49.658648 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 21:15:49.669567 PIEI prepare done
392 21:15:49.670085 fastboot data load
393 21:15:49.670520 fastboot data verify
394 21:15:49.675261 verify result: 266
395 21:15:49.680837 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 21:15:49.681339 LPDDR4 probe
397 21:15:49.681775 ddr clk to 1584MHz
398 21:15:49.688837 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 21:15:49.726097
400 21:15:49.726619 dmc_version 0001
401 21:15:49.732755 Check phy result
402 21:15:49.738632 INFO : End of CA training
403 21:15:49.739121 INFO : End of initialization
404 21:15:49.744261 INFO : Training has run successfully!
405 21:15:49.744758 Check phy result
406 21:15:49.749803 INFO : End of initialization
407 21:15:49.750292 INFO : End of read enable training
408 21:15:49.755412 INFO : End of fine write leveling
409 21:15:49.761011 INFO : End of Write leveling coarse delay
410 21:15:49.761496 INFO : Training has run successfully!
411 21:15:49.761936 Check phy result
412 21:15:49.766638 INFO : End of initialization
413 21:15:49.767128 INFO : End of read dq deskew training
414 21:15:49.772238 INFO : End of MPR read delay center optimization
415 21:15:49.777802 INFO : End of write delay center optimization
416 21:15:49.783418 INFO : End of read delay center optimization
417 21:15:49.783911 INFO : End of max read latency training
418 21:15:49.789033 INFO : Training has run successfully!
419 21:15:49.789529 1D training succeed
420 21:15:49.798185 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 21:15:49.845834 Check phy result
422 21:15:49.846344 INFO : End of initialization
423 21:15:49.867605 INFO : End of 2D read delay Voltage center optimization
424 21:15:49.887919 INFO : End of 2D read delay Voltage center optimization
425 21:15:49.939966 INFO : End of 2D write delay Voltage center optimization
426 21:15:49.989276 INFO : End of 2D write delay Voltage center optimization
427 21:15:49.994883 INFO : Training has run successfully!
428 21:15:49.995380
429 21:15:49.995823 channel==0
430 21:15:50.000479 RxClkDly_Margin_A0==88 ps 9
431 21:15:50.000976 TxDqDly_Margin_A0==98 ps 10
432 21:15:50.003748 RxClkDly_Margin_A1==88 ps 9
433 21:15:50.004263 TxDqDly_Margin_A1==98 ps 10
434 21:15:50.009314 TrainedVREFDQ_A0==74
435 21:15:50.009819 TrainedVREFDQ_A1==74
436 21:15:50.014904 VrefDac_Margin_A0==25
437 21:15:50.015388 DeviceVref_Margin_A0==40
438 21:15:50.015821 VrefDac_Margin_A1==24
439 21:15:50.020525 DeviceVref_Margin_A1==40
440 21:15:50.021007
441 21:15:50.021447
442 21:15:50.021879 channel==1
443 21:15:50.022309 RxClkDly_Margin_A0==98 ps 10
444 21:15:50.026083 TxDqDly_Margin_A0==98 ps 10
445 21:15:50.026576 RxClkDly_Margin_A1==98 ps 10
446 21:15:50.031698 TxDqDly_Margin_A1==88 ps 9
447 21:15:50.032225 TrainedVREFDQ_A0==77
448 21:15:50.032666 TrainedVREFDQ_A1==77
449 21:15:50.037309 VrefDac_Margin_A0==22
450 21:15:50.037794 DeviceVref_Margin_A0==37
451 21:15:50.042912 VrefDac_Margin_A1==22
452 21:15:50.043393 DeviceVref_Margin_A1==37
453 21:15:50.043828
454 21:15:50.048541 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 21:15:50.049029
456 21:15:50.076487 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
457 21:15:50.082167 2D training succeed
458 21:15:50.087687 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 21:15:50.088213 auto size-- 65535DDR cs0 size: 2048MB
460 21:15:50.093185 DDR cs1 size: 2048MB
461 21:15:50.093670 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 21:15:50.098754 cs0 DataBus test pass
463 21:15:50.099241 cs1 DataBus test pass
464 21:15:50.099676 cs0 AddrBus test pass
465 21:15:50.104385 cs1 AddrBus test pass
466 21:15:50.104873
467 21:15:50.105311 100bdlr_step_size ps== 420
468 21:15:50.105754 result report
469 21:15:50.109996 boot times 0Enable ddr reg access
470 21:15:50.117774 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 21:15:50.131224 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 21:15:50.704800 0.0;M3 CHK:0;cm4_sp_mode 0
473 21:15:50.705355 MVN_1=0x00000000
474 21:15:50.710278 MVN_2=0x00000000
475 21:15:50.716131 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 21:15:50.716644 OPS=0x10
477 21:15:50.717099 ring efuse init
478 21:15:50.717545 chipver efuse init
479 21:15:50.721644 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 21:15:50.727232 [0.018961 Inits done]
481 21:15:50.727709 secure task start!
482 21:15:50.728191 high task start!
483 21:15:50.731824 low task start!
484 21:15:50.732333 run into bl31
485 21:15:50.738570 NOTICE: BL31: v1.3(release):4fc40b1
486 21:15:50.746294 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 21:15:50.746780 NOTICE: BL31: G12A normal boot!
488 21:15:50.771636 NOTICE: BL31: BL33 decompress pass
489 21:15:50.777391 ERROR: Error initializing runtime service opteed_fast
490 21:15:52.010298
491 21:15:52.010960
492 21:15:52.018634 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 21:15:52.019129
494 21:15:52.019583 Model: Libre Computer AML-A311D-CC Alta
495 21:15:52.227062 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 21:15:52.250429 DRAM: 2 GiB (effective 3.8 GiB)
497 21:15:52.393423 Core: 408 devices, 31 uclasses, devicetree: separate
498 21:15:52.399293 WDT: Not starting watchdog@f0d0
499 21:15:52.431552 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 21:15:52.444005 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 21:15:52.448997 ** Bad device specification mmc 0 **
502 21:15:52.459297 Card did not respond to voltage select! : -110
503 21:15:52.466939 ** Bad device specification mmc 0 **
504 21:15:52.467424 Couldn't find partition mmc 0
505 21:15:52.475305 Card did not respond to voltage select! : -110
506 21:15:52.480828 ** Bad device specification mmc 0 **
507 21:15:52.481319 Couldn't find partition mmc 0
508 21:15:52.485870 Error: could not access storage.
509 21:15:53.749062 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 21:15:53.749489 bl2_stage_init 0x01
511 21:15:53.749701 bl2_stage_init 0x81
512 21:15:53.754580 hw id: 0x0000 - pwm id 0x01
513 21:15:53.754986 bl2_stage_init 0xc1
514 21:15:53.755302 bl2_stage_init 0x02
515 21:15:53.755604
516 21:15:53.760170 L0:00000000
517 21:15:53.760578 L1:20000703
518 21:15:53.760810 L2:00008067
519 21:15:53.761011 L3:14000000
520 21:15:53.765775 B2:00402000
521 21:15:53.766173 B1:e0f83180
522 21:15:53.766486
523 21:15:53.766789 TE: 58124
524 21:15:53.767090
525 21:15:53.771368 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 21:15:53.771663
527 21:15:53.771870 Board ID = 1
528 21:15:53.776968 Set A53 clk to 24M
529 21:15:53.777268 Set A73 clk to 24M
530 21:15:53.777475 Set clk81 to 24M
531 21:15:53.782570 A53 clk: 1200 MHz
532 21:15:53.782982 A73 clk: 1200 MHz
533 21:15:53.783303 CLK81: 166.6M
534 21:15:53.783613 smccc: 00012a92
535 21:15:53.788162 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 21:15:53.793776 board id: 1
537 21:15:53.799713 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 21:15:53.810341 fw parse done
539 21:15:53.816325 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 21:15:53.859001 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 21:15:53.869837 PIEI prepare done
542 21:15:53.870326 fastboot data load
543 21:15:53.870788 fastboot data verify
544 21:15:53.875565 verify result: 266
545 21:15:53.881157 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 21:15:53.881663 LPDDR4 probe
547 21:15:53.882112 ddr clk to 1584MHz
548 21:15:53.889164 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 21:15:53.926396
550 21:15:53.926903 dmc_version 0001
551 21:15:53.933085 Check phy result
552 21:15:53.938963 INFO : End of CA training
553 21:15:53.939460 INFO : End of initialization
554 21:15:53.944532 INFO : Training has run successfully!
555 21:15:53.945029 Check phy result
556 21:15:53.950173 INFO : End of initialization
557 21:15:53.950671 INFO : End of read enable training
558 21:15:53.955732 INFO : End of fine write leveling
559 21:15:53.961329 INFO : End of Write leveling coarse delay
560 21:15:53.961823 INFO : Training has run successfully!
561 21:15:53.962271 Check phy result
562 21:15:53.966924 INFO : End of initialization
563 21:15:53.967420 INFO : End of read dq deskew training
564 21:15:53.972553 INFO : End of MPR read delay center optimization
565 21:15:53.978157 INFO : End of write delay center optimization
566 21:15:53.983773 INFO : End of read delay center optimization
567 21:15:53.984310 INFO : End of max read latency training
568 21:15:53.989346 INFO : Training has run successfully!
569 21:15:53.989843 1D training succeed
570 21:15:53.998497 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 21:15:54.046099 Check phy result
572 21:15:54.046596 INFO : End of initialization
573 21:15:54.068480 INFO : End of 2D read delay Voltage center optimization
574 21:15:54.088203 INFO : End of 2D read delay Voltage center optimization
575 21:15:54.140259 INFO : End of 2D write delay Voltage center optimization
576 21:15:54.189589 INFO : End of 2D write delay Voltage center optimization
577 21:15:54.195092 INFO : Training has run successfully!
578 21:15:54.195603
579 21:15:54.196112 channel==0
580 21:15:54.200709 RxClkDly_Margin_A0==88 ps 9
581 21:15:54.201210 TxDqDly_Margin_A0==98 ps 10
582 21:15:54.206299 RxClkDly_Margin_A1==88 ps 9
583 21:15:54.206791 TxDqDly_Margin_A1==88 ps 9
584 21:15:54.207242 TrainedVREFDQ_A0==74
585 21:15:54.211875 TrainedVREFDQ_A1==75
586 21:15:54.212428 VrefDac_Margin_A0==25
587 21:15:54.212879 DeviceVref_Margin_A0==40
588 21:15:54.217506 VrefDac_Margin_A1==25
589 21:15:54.218013 DeviceVref_Margin_A1==39
590 21:15:54.218460
591 21:15:54.218902
592 21:15:54.219339 channel==1
593 21:15:54.223097 RxClkDly_Margin_A0==98 ps 10
594 21:15:54.223595 TxDqDly_Margin_A0==98 ps 10
595 21:15:54.228711 RxClkDly_Margin_A1==88 ps 9
596 21:15:54.229214 TxDqDly_Margin_A1==88 ps 9
597 21:15:54.234309 TrainedVREFDQ_A0==77
598 21:15:54.234810 TrainedVREFDQ_A1==77
599 21:15:54.235262 VrefDac_Margin_A0==22
600 21:15:54.239901 DeviceVref_Margin_A0==37
601 21:15:54.240423 VrefDac_Margin_A1==24
602 21:15:54.245485 DeviceVref_Margin_A1==37
603 21:15:54.245978
604 21:15:54.246426 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 21:15:54.246871
606 21:15:54.279082 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
607 21:15:54.279622 2D training succeed
608 21:15:54.284739 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 21:15:54.290299 auto size-- 65535DDR cs0 size: 2048MB
610 21:15:54.290799 DDR cs1 size: 2048MB
611 21:15:54.295896 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 21:15:54.296431 cs0 DataBus test pass
613 21:15:54.301467 cs1 DataBus test pass
614 21:15:54.301967 cs0 AddrBus test pass
615 21:15:54.302414 cs1 AddrBus test pass
616 21:15:54.302851
617 21:15:54.307084 100bdlr_step_size ps== 420
618 21:15:54.307588 result report
619 21:15:54.312684 boot times 0Enable ddr reg access
620 21:15:54.317948 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 21:15:54.331382 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 21:15:54.904294 0.0;M3 CHK:0;cm4_sp_mode 0
623 21:15:54.904839 MVN_1=0x00000000
624 21:15:54.909855 MVN_2=0x00000000
625 21:15:54.915626 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 21:15:54.916194 OPS=0x10
627 21:15:54.916683 ring efuse init
628 21:15:54.917139 chipver efuse init
629 21:15:54.921225 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 21:15:54.926803 [0.018961 Inits done]
631 21:15:54.927275 secure task start!
632 21:15:54.927703 high task start!
633 21:15:54.931359 low task start!
634 21:15:54.931857 run into bl31
635 21:15:54.938049 NOTICE: BL31: v1.3(release):4fc40b1
636 21:15:54.945836 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 21:15:54.946313 NOTICE: BL31: G12A normal boot!
638 21:15:54.971205 NOTICE: BL31: BL33 decompress pass
639 21:15:54.976851 ERROR: Error initializing runtime service opteed_fast
640 21:15:56.210159
641 21:15:56.210782
642 21:15:56.218345 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 21:15:56.218839
644 21:15:56.219290 Model: Libre Computer AML-A311D-CC Alta
645 21:15:56.426754 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 21:15:56.450094 DRAM: 2 GiB (effective 3.8 GiB)
647 21:15:56.593073 Core: 408 devices, 31 uclasses, devicetree: separate
648 21:15:56.598982 WDT: Not starting watchdog@f0d0
649 21:15:56.631140 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 21:15:56.643762 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 21:15:56.648681 ** Bad device specification mmc 0 **
652 21:15:56.658984 Card did not respond to voltage select! : -110
653 21:15:56.666659 ** Bad device specification mmc 0 **
654 21:15:56.667144 Couldn't find partition mmc 0
655 21:15:56.674914 Card did not respond to voltage select! : -110
656 21:15:56.680600 ** Bad device specification mmc 0 **
657 21:15:56.681085 Couldn't find partition mmc 0
658 21:15:56.685557 Error: could not access storage.
659 21:15:57.028061 Net: eth0: ethernet@ff3f0000
660 21:15:57.028653 starting USB...
661 21:15:57.279886 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 21:15:57.280496 Starting the controller
663 21:15:57.286841 USB XHCI 1.10
664 21:15:58.999600 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 21:15:59.000295 bl2_stage_init 0x01
666 21:15:59.000770 bl2_stage_init 0x81
667 21:15:59.005131 hw id: 0x0000 - pwm id 0x01
668 21:15:59.005623 bl2_stage_init 0xc1
669 21:15:59.006074 bl2_stage_init 0x02
670 21:15:59.006515
671 21:15:59.010677 L0:00000000
672 21:15:59.011162 L1:20000703
673 21:15:59.011614 L2:00008067
674 21:15:59.012089 L3:14000000
675 21:15:59.016219 B2:00402000
676 21:15:59.016699 B1:e0f83180
677 21:15:59.017149
678 21:15:59.017594 TE: 58167
679 21:15:59.018040
680 21:15:59.021904 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 21:15:59.022394
682 21:15:59.022846 Board ID = 1
683 21:15:59.027517 Set A53 clk to 24M
684 21:15:59.028025 Set A73 clk to 24M
685 21:15:59.028474 Set clk81 to 24M
686 21:15:59.033126 A53 clk: 1200 MHz
687 21:15:59.033609 A73 clk: 1200 MHz
688 21:15:59.034056 CLK81: 166.6M
689 21:15:59.034503 smccc: 00012abe
690 21:15:59.038642 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 21:15:59.046116 board id: 1
692 21:15:59.050158 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 21:15:59.060783 fw parse done
694 21:15:59.066773 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 21:15:59.109245 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 21:15:59.120178 PIEI prepare done
697 21:15:59.120665 fastboot data load
698 21:15:59.121119 fastboot data verify
699 21:15:59.125881 verify result: 266
700 21:15:59.131436 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 21:15:59.131933 LPDDR4 probe
702 21:15:59.132429 ddr clk to 1584MHz
703 21:15:59.139440 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 21:15:59.176786
705 21:15:59.177293 dmc_version 0001
706 21:15:59.183466 Check phy result
707 21:15:59.189328 INFO : End of CA training
708 21:15:59.189822 INFO : End of initialization
709 21:15:59.194939 INFO : Training has run successfully!
710 21:15:59.195433 Check phy result
711 21:15:59.200450 INFO : End of initialization
712 21:15:59.200944 INFO : End of read enable training
713 21:15:59.206070 INFO : End of fine write leveling
714 21:15:59.211678 INFO : End of Write leveling coarse delay
715 21:15:59.212204 INFO : Training has run successfully!
716 21:15:59.212653 Check phy result
717 21:15:59.217273 INFO : End of initialization
718 21:15:59.217773 INFO : End of read dq deskew training
719 21:15:59.222940 INFO : End of MPR read delay center optimization
720 21:15:59.228453 INFO : End of write delay center optimization
721 21:15:59.234092 INFO : End of read delay center optimization
722 21:15:59.234587 INFO : End of max read latency training
723 21:15:59.239669 INFO : Training has run successfully!
724 21:15:59.240197 1D training succeed
725 21:15:59.248826 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 21:15:59.296418 Check phy result
727 21:15:59.296939 INFO : End of initialization
728 21:15:59.318099 INFO : End of 2D read delay Voltage center optimization
729 21:15:59.338180 INFO : End of 2D read delay Voltage center optimization
730 21:15:59.390101 INFO : End of 2D write delay Voltage center optimization
731 21:15:59.439292 INFO : End of 2D write delay Voltage center optimization
732 21:15:59.444925 INFO : Training has run successfully!
733 21:15:59.445423
734 21:15:59.445879 channel==0
735 21:15:59.450496 RxClkDly_Margin_A0==88 ps 9
736 21:15:59.450988 TxDqDly_Margin_A0==98 ps 10
737 21:15:59.456092 RxClkDly_Margin_A1==88 ps 9
738 21:15:59.456601 TxDqDly_Margin_A1==88 ps 9
739 21:15:59.457055 TrainedVREFDQ_A0==74
740 21:15:59.461697 TrainedVREFDQ_A1==74
741 21:15:59.462193 VrefDac_Margin_A0==25
742 21:15:59.462641 DeviceVref_Margin_A0==40
743 21:15:59.467312 VrefDac_Margin_A1==25
744 21:15:59.467803 DeviceVref_Margin_A1==40
745 21:15:59.468290
746 21:15:59.468742
747 21:15:59.469188 channel==1
748 21:15:59.472954 RxClkDly_Margin_A0==98 ps 10
749 21:15:59.473451 TxDqDly_Margin_A0==88 ps 9
750 21:15:59.478490 RxClkDly_Margin_A1==88 ps 9
751 21:15:59.478987 TxDqDly_Margin_A1==88 ps 9
752 21:15:59.484093 TrainedVREFDQ_A0==77
753 21:15:59.484594 TrainedVREFDQ_A1==77
754 21:15:59.485047 VrefDac_Margin_A0==22
755 21:15:59.489693 DeviceVref_Margin_A0==37
756 21:15:59.490184 VrefDac_Margin_A1==24
757 21:15:59.495299 DeviceVref_Margin_A1==37
758 21:15:59.495788
759 21:15:59.496277 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 21:15:59.496727
761 21:15:59.528904 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 0000005f
762 21:15:59.529437 2D training succeed
763 21:15:59.534475 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 21:15:59.540091 auto size-- 65535DDR cs0 size: 2048MB
765 21:15:59.540589 DDR cs1 size: 2048MB
766 21:15:59.545690 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 21:15:59.546186 cs0 DataBus test pass
768 21:15:59.551297 cs1 DataBus test pass
769 21:15:59.551784 cs0 AddrBus test pass
770 21:15:59.552282 cs1 AddrBus test pass
771 21:15:59.552731
772 21:15:59.556959 100bdlr_step_size ps== 420
773 21:15:59.557464 result report
774 21:15:59.562479 boot times 0Enable ddr reg access
775 21:15:59.567648 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 21:15:59.581106 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 21:16:00.153030 0.0;M3 CHK:0;cm4_sp_mode 0
778 21:16:00.153596 MVN_1=0x00000000
779 21:16:00.158559 MVN_2=0x00000000
780 21:16:00.164298 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 21:16:00.164820 OPS=0x10
782 21:16:00.165261 ring efuse init
783 21:16:00.165689 chipver efuse init
784 21:16:00.169859 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 21:16:00.175447 [0.018961 Inits done]
786 21:16:00.175918 secure task start!
787 21:16:00.176417 high task start!
788 21:16:00.180110 low task start!
789 21:16:00.180595 run into bl31
790 21:16:00.186692 NOTICE: BL31: v1.3(release):4fc40b1
791 21:16:00.197333 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 21:16:00.197816 NOTICE: BL31: G12A normal boot!
793 21:16:00.220008 NOTICE: BL31: BL33 decompress pass
794 21:16:00.225606 ERROR: Error initializing runtime service opteed_fast
795 21:16:01.458575
796 21:16:01.459224
797 21:16:01.466928 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 21:16:01.467433
799 21:16:01.467902 Model: Libre Computer AML-A311D-CC Alta
800 21:16:01.675373 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 21:16:01.698761 DRAM: 2 GiB (effective 3.8 GiB)
802 21:16:01.841788 Core: 408 devices, 31 uclasses, devicetree: separate
803 21:16:01.847632 WDT: Not starting watchdog@f0d0
804 21:16:01.879897 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 21:16:01.892351 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 21:16:01.897331 ** Bad device specification mmc 0 **
807 21:16:01.907658 Card did not respond to voltage select! : -110
808 21:16:01.915301 ** Bad device specification mmc 0 **
809 21:16:01.915807 Couldn't find partition mmc 0
810 21:16:01.923653 Card did not respond to voltage select! : -110
811 21:16:01.929191 ** Bad device specification mmc 0 **
812 21:16:01.929684 Couldn't find partition mmc 0
813 21:16:01.934224 Error: could not access storage.
814 21:16:02.276663 Net: eth0: ethernet@ff3f0000
815 21:16:02.277256 starting USB...
816 21:16:02.528438 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 21:16:02.528949 Starting the controller
818 21:16:02.535451 USB XHCI 1.10
819 21:16:04.609715 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 21:16:04.610366 bl2_stage_init 0x01
821 21:16:04.610829 bl2_stage_init 0x81
822 21:16:04.615136 hw id: 0x0000 - pwm id 0x01
823 21:16:04.615641 bl2_stage_init 0xc1
824 21:16:04.616148 bl2_stage_init 0x02
825 21:16:04.616607
826 21:16:04.620746 L0:00000000
827 21:16:04.621239 L1:20000703
828 21:16:04.621687 L2:00008067
829 21:16:04.622135 L3:14000000
830 21:16:04.626355 B2:00402000
831 21:16:04.626863 B1:e0f83180
832 21:16:04.627310
833 21:16:04.627756 TE: 58167
834 21:16:04.628243
835 21:16:04.631944 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 21:16:04.632476
837 21:16:04.632927 Board ID = 1
838 21:16:04.637578 Set A53 clk to 24M
839 21:16:04.638077 Set A73 clk to 24M
840 21:16:04.638522 Set clk81 to 24M
841 21:16:04.643139 A53 clk: 1200 MHz
842 21:16:04.643642 A73 clk: 1200 MHz
843 21:16:04.644123 CLK81: 166.6M
844 21:16:04.644574 smccc: 00012abe
845 21:16:04.648730 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 21:16:04.654327 board id: 1
847 21:16:04.660218 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 21:16:04.670734 fw parse done
849 21:16:04.676721 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 21:16:04.719303 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 21:16:04.730208 PIEI prepare done
852 21:16:04.730732 fastboot data load
853 21:16:04.731192 fastboot data verify
854 21:16:04.736028 verify result: 266
855 21:16:04.741575 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 21:16:04.742095 LPDDR4 probe
857 21:16:04.742553 ddr clk to 1584MHz
858 21:16:04.749536 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 21:16:04.785857
860 21:16:04.786412 dmc_version 0001
861 21:16:04.793460 Check phy result
862 21:16:04.799324 INFO : End of CA training
863 21:16:04.799810 INFO : End of initialization
864 21:16:04.804956 INFO : Training has run successfully!
865 21:16:04.805436 Check phy result
866 21:16:04.810496 INFO : End of initialization
867 21:16:04.810973 INFO : End of read enable training
868 21:16:04.816025 INFO : End of fine write leveling
869 21:16:04.821609 INFO : End of Write leveling coarse delay
870 21:16:04.822082 INFO : Training has run successfully!
871 21:16:04.822531 Check phy result
872 21:16:04.827208 INFO : End of initialization
873 21:16:04.827690 INFO : End of read dq deskew training
874 21:16:04.832813 INFO : End of MPR read delay center optimization
875 21:16:04.838392 INFO : End of write delay center optimization
876 21:16:04.844079 INFO : End of read delay center optimization
877 21:16:04.844593 INFO : End of max read latency training
878 21:16:04.849677 INFO : Training has run successfully!
879 21:16:04.850164 1D training succeed
880 21:16:04.858781 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 21:16:04.906402 Check phy result
882 21:16:04.906905 INFO : End of initialization
883 21:16:04.928302 INFO : End of 2D read delay Voltage center optimization
884 21:16:04.948408 INFO : End of 2D read delay Voltage center optimization
885 21:16:04.999567 INFO : End of 2D write delay Voltage center optimization
886 21:16:05.049925 INFO : End of 2D write delay Voltage center optimization
887 21:16:05.055370 INFO : Training has run successfully!
888 21:16:05.055861
889 21:16:05.056360 channel==0
890 21:16:05.060947 RxClkDly_Margin_A0==88 ps 9
891 21:16:05.061431 TxDqDly_Margin_A0==98 ps 10
892 21:16:05.066591 RxClkDly_Margin_A1==88 ps 9
893 21:16:05.067070 TxDqDly_Margin_A1==98 ps 10
894 21:16:05.067523 TrainedVREFDQ_A0==74
895 21:16:05.072157 TrainedVREFDQ_A1==74
896 21:16:05.072636 VrefDac_Margin_A0==25
897 21:16:05.073083 DeviceVref_Margin_A0==40
898 21:16:05.077742 VrefDac_Margin_A1==25
899 21:16:05.078221 DeviceVref_Margin_A1==40
900 21:16:05.078668
901 21:16:05.079113
902 21:16:05.083360 channel==1
903 21:16:05.083856 RxClkDly_Margin_A0==98 ps 10
904 21:16:05.084345 TxDqDly_Margin_A0==98 ps 10
905 21:16:05.088924 RxClkDly_Margin_A1==88 ps 9
906 21:16:05.089398 TxDqDly_Margin_A1==88 ps 9
907 21:16:05.094590 TrainedVREFDQ_A0==77
908 21:16:05.095070 TrainedVREFDQ_A1==77
909 21:16:05.095516 VrefDac_Margin_A0==22
910 21:16:05.100112 DeviceVref_Margin_A0==37
911 21:16:05.100587 VrefDac_Margin_A1==24
912 21:16:05.105766 DeviceVref_Margin_A1==37
913 21:16:05.106248
914 21:16:05.106697 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 21:16:05.107138
916 21:16:05.139339 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
917 21:16:05.139868 2D training succeed
918 21:16:05.144934 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 21:16:05.150519 auto size-- 65535DDR cs0 size: 2048MB
920 21:16:05.151000 DDR cs1 size: 2048MB
921 21:16:05.156144 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 21:16:05.156632 cs0 DataBus test pass
923 21:16:05.161751 cs1 DataBus test pass
924 21:16:05.162272 cs0 AddrBus test pass
925 21:16:05.162715 cs1 AddrBus test pass
926 21:16:05.163158
927 21:16:05.167329 100bdlr_step_size ps== 420
928 21:16:05.167858 result report
929 21:16:05.172915 boot times 0Enable ddr reg access
930 21:16:05.178276 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 21:16:05.191779 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 21:16:05.765495 0.0;M3 CHK:0;cm4_sp_mode 0
933 21:16:05.766124 MVN_1=0x00000000
934 21:16:05.771000 MVN_2=0x00000000
935 21:16:05.776751 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 21:16:05.777231 OPS=0x10
937 21:16:05.777681 ring efuse init
938 21:16:05.778122 chipver efuse init
939 21:16:05.782310 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 21:16:05.787948 [0.018961 Inits done]
941 21:16:05.788498 secure task start!
942 21:16:05.788949 high task start!
943 21:16:05.792551 low task start!
944 21:16:05.793034 run into bl31
945 21:16:05.799177 NOTICE: BL31: v1.3(release):4fc40b1
946 21:16:05.806975 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 21:16:05.807480 NOTICE: BL31: G12A normal boot!
948 21:16:05.832347 NOTICE: BL31: BL33 decompress pass
949 21:16:05.838026 ERROR: Error initializing runtime service opteed_fast
950 21:16:07.071067
951 21:16:07.071767
952 21:16:07.079308 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 21:16:07.079807
954 21:16:07.080302 Model: Libre Computer AML-A311D-CC Alta
955 21:16:07.287727 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 21:16:07.311140 DRAM: 2 GiB (effective 3.8 GiB)
957 21:16:07.454109 Core: 408 devices, 31 uclasses, devicetree: separate
958 21:16:07.460055 WDT: Not starting watchdog@f0d0
959 21:16:07.492343 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 21:16:07.504787 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 21:16:07.509683 ** Bad device specification mmc 0 **
962 21:16:07.520050 Card did not respond to voltage select! : -110
963 21:16:07.527684 ** Bad device specification mmc 0 **
964 21:16:07.528210 Couldn't find partition mmc 0
965 21:16:07.536039 Card did not respond to voltage select! : -110
966 21:16:07.541524 ** Bad device specification mmc 0 **
967 21:16:07.542014 Couldn't find partition mmc 0
968 21:16:07.546586 Error: could not access storage.
969 21:16:07.889107 Net: eth0: ethernet@ff3f0000
970 21:16:07.889714 starting USB...
971 21:16:08.140878 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 21:16:08.141457 Starting the controller
973 21:16:08.147830 USB XHCI 1.10
974 21:16:09.702178 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 21:16:09.710458 scanning usb for storage devices... 0 Storage Device(s) found
977 21:16:09.762043 Hit any key to stop autoboot: 1
978 21:16:09.762916 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 21:16:09.763569 start: 2.4.3 bootloader-commands (timeout 00:04:27) [common]
980 21:16:09.764138 Setting prompt string to ['=>']
981 21:16:09.764688 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:27)
982 21:16:09.777869 0
983 21:16:09.778797 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 21:16:09.779335 Sending with 10 millisecond of delay
986 21:16:10.914199 => setenv autoload no
987 21:16:10.925090 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
988 21:16:10.930531 setenv autoload no
989 21:16:10.931316 Sending with 10 millisecond of delay
991 21:16:12.728134 => setenv initrd_high 0xffffffff
992 21:16:12.738901 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 21:16:12.739463 setenv initrd_high 0xffffffff
994 21:16:12.739948 Sending with 10 millisecond of delay
996 21:16:14.355555 => setenv fdt_high 0xffffffff
997 21:16:14.366426 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 21:16:14.367300 setenv fdt_high 0xffffffff
999 21:16:14.368089 Sending with 10 millisecond of delay
1001 21:16:14.660015 => dhcp
1002 21:16:14.670734 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 21:16:14.671572 dhcp
1004 21:16:14.672072 Speed: 1000, full duplex
1005 21:16:14.672525 BOOTP broadcast 1
1006 21:16:14.679348 DHCP client bound to address 192.168.6.27 (8 ms)
1007 21:16:14.680082 Sending with 10 millisecond of delay
1009 21:16:16.356596 => setenv serverip 192.168.6.2
1010 21:16:16.367452 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 21:16:16.368449 setenv serverip 192.168.6.2
1012 21:16:16.369193 Sending with 10 millisecond of delay
1014 21:16:20.092571 => tftpboot 0x01080000 936406/tftp-deploy-2b72ra0s/kernel/uImage
1015 21:16:20.103388 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1016 21:16:20.104301 tftpboot 0x01080000 936406/tftp-deploy-2b72ra0s/kernel/uImage
1017 21:16:20.104801 Speed: 1000, full duplex
1018 21:16:20.105262 Using ethernet@ff3f0000 device
1019 21:16:20.106184 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 21:16:20.111793 Filename '936406/tftp-deploy-2b72ra0s/kernel/uImage'.
1021 21:16:20.115497 Load address: 0x1080000
1022 21:16:22.898068 Loading: *################################################## 43.6 MiB
1023 21:16:22.898729 15.7 MiB/s
1024 21:16:22.899205 done
1025 21:16:22.902452 Bytes transferred = 45713984 (2b98a40 hex)
1026 21:16:22.903292 Sending with 10 millisecond of delay
1028 21:16:27.589711 => tftpboot 0x08000000 936406/tftp-deploy-2b72ra0s/ramdisk/ramdisk.cpio.gz.uboot
1029 21:16:27.600508 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1030 21:16:27.601353 tftpboot 0x08000000 936406/tftp-deploy-2b72ra0s/ramdisk/ramdisk.cpio.gz.uboot
1031 21:16:27.601839 Speed: 1000, full duplex
1032 21:16:27.602294 Using ethernet@ff3f0000 device
1033 21:16:27.603400 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 21:16:27.612014 Filename '936406/tftp-deploy-2b72ra0s/ramdisk/ramdisk.cpio.gz.uboot'.
1035 21:16:27.612520 Load address: 0x8000000
1036 21:16:28.178779 Loading: *################### UDP wrong checksum 000000ff 0000bf5d
1037 21:16:28.229175 ## UDP wrong checksum 000000ff 00004a50
1038 21:16:29.498631 UDP wrong checksum 000000ff 0000731d
1039 21:16:29.541057 UDP wrong checksum 000000ff 00000310
1040 21:16:34.586807 T ############################ UDP wrong checksum 00000005 000058f4
1041 21:16:38.911727 UDP wrong checksum 000000ff 00000d1c
1042 21:16:38.945241 UDP wrong checksum 000000ff 0000a30e
1043 21:16:39.587770 T UDP wrong checksum 00000005 000058f4
1044 21:16:49.590097 T T UDP wrong checksum 00000005 000058f4
1045 21:17:09.594436 T T T T UDP wrong checksum 00000005 000058f4
1046 21:17:24.597313 T T
1047 21:17:24.598018 Retry count exceeded; starting again
1049 21:17:24.599609 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1052 21:17:24.601806 end: 2.4 uboot-commands (duration 00:01:47) [common]
1054 21:17:24.603337 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1056 21:17:24.604535 end: 2 uboot-action (duration 00:01:47) [common]
1058 21:17:24.606183 Cleaning after the job
1059 21:17:24.606772 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/ramdisk
1060 21:17:24.608195 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/kernel
1061 21:17:24.639580 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/dtb
1062 21:17:24.640850 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/nfsrootfs
1063 21:17:24.813434 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/936406/tftp-deploy-2b72ra0s/modules
1064 21:17:24.833140 start: 4.1 power-off (timeout 00:00:30) [common]
1065 21:17:24.833792 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1066 21:17:24.868875 >> OK - accepted request
1067 21:17:24.870831 Returned 0 in 0 seconds
1068 21:17:24.971571 end: 4.1 power-off (duration 00:00:00) [common]
1070 21:17:24.972529 start: 4.2 read-feedback (timeout 00:10:00) [common]
1071 21:17:24.973170 Listened to connection for namespace 'common' for up to 1s
1072 21:17:25.973269 Finalising connection for namespace 'common'
1073 21:17:25.974021 Disconnecting from shell: Finalise
1074 21:17:25.974581 =>
1075 21:17:26.075644 end: 4.2 read-feedback (duration 00:00:01) [common]
1076 21:17:26.076369 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/936406
1077 21:17:28.918772 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/936406
1078 21:17:28.919405 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.