Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:50:54.531469 lava-dispatcher, installed at version: 2024.01
2 03:50:54.532258 start: 0 validate
3 03:50:54.532740 Start time: 2024-11-05 03:50:54.532710+00:00 (UTC)
4 03:50:54.533282 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:50:54.533821 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:50:54.567540 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:50:54.568121 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fkernel%2FImage exists
8 03:50:54.598758 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:50:54.599360 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 03:50:54.636060 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:50:54.636654 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:50:54.666745 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:50:54.667688 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fmodules.tar.xz exists
14 03:50:54.708781 validate duration: 0.18
16 03:50:54.709603 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:50:54.709909 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:50:54.710205 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:50:54.710771 Not decompressing ramdisk as can be used compressed.
20 03:50:54.711197 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 03:50:54.711463 saving as /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/ramdisk/initrd.cpio.gz
22 03:50:54.711722 total size: 5628182 (5 MB)
23 03:50:54.750233 progress 0 % (0 MB)
24 03:50:54.755301 progress 5 % (0 MB)
25 03:50:54.760511 progress 10 % (0 MB)
26 03:50:54.765113 progress 15 % (0 MB)
27 03:50:54.770304 progress 20 % (1 MB)
28 03:50:54.774759 progress 25 % (1 MB)
29 03:50:54.779651 progress 30 % (1 MB)
30 03:50:54.784629 progress 35 % (1 MB)
31 03:50:54.789094 progress 40 % (2 MB)
32 03:50:54.794091 progress 45 % (2 MB)
33 03:50:54.798576 progress 50 % (2 MB)
34 03:50:54.803610 progress 55 % (2 MB)
35 03:50:54.808601 progress 60 % (3 MB)
36 03:50:54.813066 progress 65 % (3 MB)
37 03:50:54.817896 progress 70 % (3 MB)
38 03:50:54.822331 progress 75 % (4 MB)
39 03:50:54.827223 progress 80 % (4 MB)
40 03:50:54.831640 progress 85 % (4 MB)
41 03:50:54.836516 progress 90 % (4 MB)
42 03:50:54.841462 progress 95 % (5 MB)
43 03:50:54.845503 progress 100 % (5 MB)
44 03:50:54.846306 5 MB downloaded in 0.13 s (39.89 MB/s)
45 03:50:54.847009 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:50:54.848175 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:50:54.848581 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:50:54.848943 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:50:54.849550 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig+kselftest/gcc-12/kernel/Image
51 03:50:54.849870 saving as /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/kernel/Image
52 03:50:54.850137 total size: 66443776 (63 MB)
53 03:50:54.850409 No compression specified
54 03:50:54.884654 progress 0 % (0 MB)
55 03:50:54.933543 progress 5 % (3 MB)
56 03:50:54.982019 progress 10 % (6 MB)
57 03:50:55.030658 progress 15 % (9 MB)
58 03:50:55.078890 progress 20 % (12 MB)
59 03:50:55.126762 progress 25 % (15 MB)
60 03:50:55.175555 progress 30 % (19 MB)
61 03:50:55.223403 progress 35 % (22 MB)
62 03:50:55.272078 progress 40 % (25 MB)
63 03:50:55.319946 progress 45 % (28 MB)
64 03:50:55.367898 progress 50 % (31 MB)
65 03:50:55.416305 progress 55 % (34 MB)
66 03:50:55.464554 progress 60 % (38 MB)
67 03:50:55.515996 progress 65 % (41 MB)
68 03:50:55.564115 progress 70 % (44 MB)
69 03:50:55.612282 progress 75 % (47 MB)
70 03:50:55.660583 progress 80 % (50 MB)
71 03:50:55.709779 progress 85 % (53 MB)
72 03:50:55.758804 progress 90 % (57 MB)
73 03:50:55.806464 progress 95 % (60 MB)
74 03:50:55.853806 progress 100 % (63 MB)
75 03:50:55.854655 63 MB downloaded in 1.00 s (63.08 MB/s)
76 03:50:55.855230 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:50:55.856259 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:50:55.856597 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:50:55.856912 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:50:55.857485 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig+kselftest/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 03:50:55.857810 saving as /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/dtb/meson-g12b-a311d-libretech-cc.dtb
83 03:50:55.858062 total size: 54703 (0 MB)
84 03:50:55.858313 No compression specified
85 03:50:55.891878 progress 59 % (0 MB)
86 03:50:55.892797 progress 100 % (0 MB)
87 03:50:55.893415 0 MB downloaded in 0.04 s (1.48 MB/s)
88 03:50:55.893916 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:50:55.894799 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:50:55.895091 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:50:55.895381 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:50:55.895846 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 03:50:55.896138 saving as /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/nfsrootfs/full.rootfs.tar
95 03:50:55.896363 total size: 107552908 (102 MB)
96 03:50:55.896610 Using unxz to decompress xz
97 03:50:55.937186 progress 0 % (0 MB)
98 03:50:56.578666 progress 5 % (5 MB)
99 03:50:57.300618 progress 10 % (10 MB)
100 03:50:58.021280 progress 15 % (15 MB)
101 03:50:58.780529 progress 20 % (20 MB)
102 03:50:59.346855 progress 25 % (25 MB)
103 03:50:59.965636 progress 30 % (30 MB)
104 03:51:00.696438 progress 35 % (35 MB)
105 03:51:01.047044 progress 40 % (41 MB)
106 03:51:01.470135 progress 45 % (46 MB)
107 03:51:02.163754 progress 50 % (51 MB)
108 03:51:02.846280 progress 55 % (56 MB)
109 03:51:03.602088 progress 60 % (61 MB)
110 03:51:04.356533 progress 65 % (66 MB)
111 03:51:05.084575 progress 70 % (71 MB)
112 03:51:05.847349 progress 75 % (76 MB)
113 03:51:06.530233 progress 80 % (82 MB)
114 03:51:07.253555 progress 85 % (87 MB)
115 03:51:07.998049 progress 90 % (92 MB)
116 03:51:08.717019 progress 95 % (97 MB)
117 03:51:09.456149 progress 100 % (102 MB)
118 03:51:09.467958 102 MB downloaded in 13.57 s (7.56 MB/s)
119 03:51:09.468891 end: 1.4.1 http-download (duration 00:00:14) [common]
121 03:51:09.470532 end: 1.4 download-retry (duration 00:00:14) [common]
122 03:51:09.471064 start: 1.5 download-retry (timeout 00:09:45) [common]
123 03:51:09.471584 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 03:51:09.472431 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig+kselftest/gcc-12/modules.tar.xz
125 03:51:09.472907 saving as /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/modules/modules.tar
126 03:51:09.473325 total size: 16128444 (15 MB)
127 03:51:09.473751 Using unxz to decompress xz
128 03:51:09.513728 progress 0 % (0 MB)
129 03:51:09.615719 progress 5 % (0 MB)
130 03:51:09.733838 progress 10 % (1 MB)
131 03:51:09.851075 progress 15 % (2 MB)
132 03:51:09.982752 progress 20 % (3 MB)
133 03:51:10.120522 progress 25 % (3 MB)
134 03:51:10.230553 progress 30 % (4 MB)
135 03:51:10.342318 progress 35 % (5 MB)
136 03:51:10.466399 progress 40 % (6 MB)
137 03:51:10.575077 progress 45 % (6 MB)
138 03:51:10.693875 progress 50 % (7 MB)
139 03:51:10.806140 progress 55 % (8 MB)
140 03:51:10.930199 progress 60 % (9 MB)
141 03:51:11.041264 progress 65 % (10 MB)
142 03:51:11.157023 progress 70 % (10 MB)
143 03:51:11.276551 progress 75 % (11 MB)
144 03:51:11.388543 progress 80 % (12 MB)
145 03:51:11.504018 progress 85 % (13 MB)
146 03:51:11.613497 progress 90 % (13 MB)
147 03:51:11.718835 progress 95 % (14 MB)
148 03:51:11.838262 progress 100 % (15 MB)
149 03:51:11.848979 15 MB downloaded in 2.38 s (6.47 MB/s)
150 03:51:11.849762 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:51:11.851592 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:51:11.852243 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 03:51:11.852843 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 03:51:22.021895 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/937864/extract-nfsrootfs-pwgl255z
156 03:51:22.022499 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 03:51:22.022828 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 03:51:22.023551 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij
159 03:51:22.024078 makedir: /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin
160 03:51:22.024503 makedir: /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/tests
161 03:51:22.024895 makedir: /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/results
162 03:51:22.025250 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-add-keys
163 03:51:22.025788 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-add-sources
164 03:51:22.026371 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-background-process-start
165 03:51:22.026929 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-background-process-stop
166 03:51:22.027505 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-common-functions
167 03:51:22.028034 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-echo-ipv4
168 03:51:22.028539 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-install-packages
169 03:51:22.029050 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-installed-packages
170 03:51:22.029615 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-os-build
171 03:51:22.030107 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-probe-channel
172 03:51:22.030600 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-probe-ip
173 03:51:22.031125 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-target-ip
174 03:51:22.031625 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-target-mac
175 03:51:22.032135 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-target-storage
176 03:51:22.032641 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-test-case
177 03:51:22.033171 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-test-event
178 03:51:22.033680 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-test-feedback
179 03:51:22.034249 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-test-raise
180 03:51:22.034741 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-test-reference
181 03:51:22.035223 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-test-runner
182 03:51:22.035710 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-test-set
183 03:51:22.036225 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-test-shell
184 03:51:22.036736 Updating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-install-packages (oe)
185 03:51:22.037290 Updating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/bin/lava-installed-packages (oe)
186 03:51:22.037740 Creating /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/environment
187 03:51:22.038132 LAVA metadata
188 03:51:22.038393 - LAVA_JOB_ID=937864
189 03:51:22.038606 - LAVA_DISPATCHER_IP=192.168.6.2
190 03:51:22.038978 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 03:51:22.039935 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 03:51:22.040305 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 03:51:22.040517 skipped lava-vland-overlay
194 03:51:22.040759 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 03:51:22.041015 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 03:51:22.041235 skipped lava-multinode-overlay
197 03:51:22.041476 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 03:51:22.041727 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 03:51:22.041983 Loading test definitions
200 03:51:22.042265 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 03:51:22.042487 Using /lava-937864 at stage 0
202 03:51:22.043779 uuid=937864_1.6.2.4.1 testdef=None
203 03:51:22.044137 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 03:51:22.044408 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 03:51:22.046254 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 03:51:22.047049 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 03:51:22.049393 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 03:51:22.050240 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 03:51:22.052542 runner path: /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/0/tests/0_dmesg test_uuid 937864_1.6.2.4.1
212 03:51:22.053131 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 03:51:22.053891 Creating lava-test-runner.conf files
215 03:51:22.054091 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/937864/lava-overlay-b0kt71ij/lava-937864/0 for stage 0
216 03:51:22.054434 - 0_dmesg
217 03:51:22.054784 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 03:51:22.055063 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 03:51:22.077449 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 03:51:22.077863 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 03:51:22.078123 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 03:51:22.078387 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 03:51:22.078645 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 03:51:22.695219 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 03:51:22.695689 start: 1.6.4 extract-modules (timeout 00:09:32) [common]
226 03:51:22.695939 extracting modules file /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/modules/modules.tar to /var/lib/lava/dispatcher/tmp/937864/extract-nfsrootfs-pwgl255z
227 03:51:24.258289 extracting modules file /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/modules/modules.tar to /var/lib/lava/dispatcher/tmp/937864/extract-overlay-ramdisk-k5eqni2q/ramdisk
228 03:51:25.860818 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 03:51:25.861260 start: 1.6.5 apply-overlay-tftp (timeout 00:09:29) [common]
230 03:51:25.861538 [common] Applying overlay to NFS
231 03:51:25.861752 [common] Applying overlay /var/lib/lava/dispatcher/tmp/937864/compress-overlay-limjh6_m/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/937864/extract-nfsrootfs-pwgl255z
232 03:51:25.890617 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 03:51:25.890965 start: 1.6.6 prepare-kernel (timeout 00:09:29) [common]
234 03:51:25.891238 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:29) [common]
235 03:51:25.891465 Converting downloaded kernel to a uImage
236 03:51:25.891764 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/kernel/Image /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/kernel/uImage
237 03:51:26.669066 output: Image Name:
238 03:51:26.669483 output: Created: Tue Nov 5 03:51:25 2024
239 03:51:26.669691 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 03:51:26.669897 output: Data Size: 66443776 Bytes = 64886.50 KiB = 63.37 MiB
241 03:51:26.670097 output: Load Address: 01080000
242 03:51:26.670298 output: Entry Point: 01080000
243 03:51:26.670496 output:
244 03:51:26.670832 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 03:51:26.671098 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 03:51:26.671369 start: 1.6.7 configure-preseed-file (timeout 00:09:28) [common]
247 03:51:26.671620 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 03:51:26.671876 start: 1.6.8 compress-ramdisk (timeout 00:09:28) [common]
249 03:51:26.672187 Building ramdisk /var/lib/lava/dispatcher/tmp/937864/extract-overlay-ramdisk-k5eqni2q/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/937864/extract-overlay-ramdisk-k5eqni2q/ramdisk
250 03:51:30.432171 >> 239643 blocks
251 03:51:40.686462 Adding RAMdisk u-boot header.
252 03:51:40.687128 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/937864/extract-overlay-ramdisk-k5eqni2q/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/937864/extract-overlay-ramdisk-k5eqni2q/ramdisk.cpio.gz.uboot
253 03:51:41.009566 output: Image Name:
254 03:51:41.009987 output: Created: Tue Nov 5 03:51:40 2024
255 03:51:41.010198 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 03:51:41.010406 output: Data Size: 30954067 Bytes = 30228.58 KiB = 29.52 MiB
257 03:51:41.010610 output: Load Address: 00000000
258 03:51:41.010808 output: Entry Point: 00000000
259 03:51:41.011006 output:
260 03:51:41.011581 rename /var/lib/lava/dispatcher/tmp/937864/extract-overlay-ramdisk-k5eqni2q/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/ramdisk/ramdisk.cpio.gz.uboot
261 03:51:41.012086 end: 1.6.8 compress-ramdisk (duration 00:00:14) [common]
262 03:51:41.012658 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 03:51:41.013208 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:14) [common]
264 03:51:41.013662 No LXC device requested
265 03:51:41.014160 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 03:51:41.014666 start: 1.8 deploy-device-env (timeout 00:09:14) [common]
267 03:51:41.015158 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 03:51:41.015564 Checking files for TFTP limit of 4294967296 bytes.
269 03:51:41.018215 end: 1 tftp-deploy (duration 00:00:46) [common]
270 03:51:41.018791 start: 2 uboot-action (timeout 00:05:00) [common]
271 03:51:41.019312 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 03:51:41.019807 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 03:51:41.020345 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 03:51:41.020867 Using kernel file from prepare-kernel: 937864/tftp-deploy-oyflvfas/kernel/uImage
275 03:51:41.021487 substitutions:
276 03:51:41.021890 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 03:51:41.022292 - {DTB_ADDR}: 0x01070000
278 03:51:41.022687 - {DTB}: 937864/tftp-deploy-oyflvfas/dtb/meson-g12b-a311d-libretech-cc.dtb
279 03:51:41.023085 - {INITRD}: 937864/tftp-deploy-oyflvfas/ramdisk/ramdisk.cpio.gz.uboot
280 03:51:41.023479 - {KERNEL_ADDR}: 0x01080000
281 03:51:41.023866 - {KERNEL}: 937864/tftp-deploy-oyflvfas/kernel/uImage
282 03:51:41.024290 - {LAVA_MAC}: None
283 03:51:41.024722 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/937864/extract-nfsrootfs-pwgl255z
284 03:51:41.025117 - {NFS_SERVER_IP}: 192.168.6.2
285 03:51:41.025505 - {PRESEED_CONFIG}: None
286 03:51:41.025890 - {PRESEED_LOCAL}: None
287 03:51:41.026275 - {RAMDISK_ADDR}: 0x08000000
288 03:51:41.026658 - {RAMDISK}: 937864/tftp-deploy-oyflvfas/ramdisk/ramdisk.cpio.gz.uboot
289 03:51:41.027042 - {ROOT_PART}: None
290 03:51:41.027430 - {ROOT}: None
291 03:51:41.027819 - {SERVER_IP}: 192.168.6.2
292 03:51:41.028237 - {TEE_ADDR}: 0x83000000
293 03:51:41.028628 - {TEE}: None
294 03:51:41.029017 Parsed boot commands:
295 03:51:41.029399 - setenv autoload no
296 03:51:41.029785 - setenv initrd_high 0xffffffff
297 03:51:41.030171 - setenv fdt_high 0xffffffff
298 03:51:41.030555 - dhcp
299 03:51:41.030938 - setenv serverip 192.168.6.2
300 03:51:41.031321 - tftpboot 0x01080000 937864/tftp-deploy-oyflvfas/kernel/uImage
301 03:51:41.031705 - tftpboot 0x08000000 937864/tftp-deploy-oyflvfas/ramdisk/ramdisk.cpio.gz.uboot
302 03:51:41.032118 - tftpboot 0x01070000 937864/tftp-deploy-oyflvfas/dtb/meson-g12b-a311d-libretech-cc.dtb
303 03:51:41.032507 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/937864/extract-nfsrootfs-pwgl255z,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 03:51:41.032906 - bootm 0x01080000 0x08000000 0x01070000
305 03:51:41.033395 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 03:51:41.034868 start: 2.3 connect-device (timeout 00:05:00) [common]
308 03:51:41.035284 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 03:51:41.049695 Setting prompt string to ['lava-test: # ']
310 03:51:41.051170 end: 2.3 connect-device (duration 00:00:00) [common]
311 03:51:41.051741 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 03:51:41.052335 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 03:51:41.052850 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 03:51:41.053975 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 03:51:41.093649 >> OK - accepted request
316 03:51:41.095840 Returned 0 in 0 seconds
317 03:51:41.196983 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 03:51:41.198536 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 03:51:41.199105 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 03:51:41.199609 Setting prompt string to ['Hit any key to stop autoboot']
322 03:51:41.200122 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 03:51:41.201717 Trying 192.168.56.21...
324 03:51:41.202202 Connected to conserv1.
325 03:51:41.202613 Escape character is '^]'.
326 03:51:41.203025
327 03:51:41.203441 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 03:51:41.203865
329 03:51:53.257005 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
330 03:51:53.257622 bl2_stage_init 0x81
331 03:51:53.262671 hw id: 0x0000 - pwm id 0x01
332 03:51:53.263111 bl2_stage_init 0xc1
333 03:51:53.263521 bl2_stage_init 0x02
334 03:51:53.263913
335 03:51:53.268277 L0:00000000
336 03:51:53.268707 L1:20000703
337 03:51:53.269113 L2:00008067
338 03:51:53.269502 L3:14000000
339 03:51:53.269887 B2:00402000
340 03:51:53.270990 B1:e0f83180
341 03:51:53.271405
342 03:51:53.271799 TE: 58150
343 03:51:53.272235
344 03:51:53.282279 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
345 03:51:53.282705
346 03:51:53.283099 Board ID = 1
347 03:51:53.283486 Set A53 clk to 24M
348 03:51:53.283869 Set A73 clk to 24M
349 03:51:53.287780 Set clk81 to 24M
350 03:51:53.288232 A53 clk: 1200 MHz
351 03:51:53.288626 A73 clk: 1200 MHz
352 03:51:53.291355 CLK81: 166.6M
353 03:51:53.291769 smccc: 00012aac
354 03:51:53.296913 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
355 03:51:53.302618 board id: 1
356 03:51:53.307523 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
357 03:51:53.318092 fw parse done
358 03:51:53.323947 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
359 03:51:53.366612 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
360 03:51:53.377608 PIEI prepare done
361 03:51:53.378019 fastboot data load
362 03:51:53.378409 fastboot data verify
363 03:51:53.383166 verify result: 266
364 03:51:53.388772 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
365 03:51:53.389183 LPDDR4 probe
366 03:51:53.389568 ddr clk to 1584MHz
367 03:51:53.396748 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
368 03:51:53.433986
369 03:51:53.434418 dmc_version 0001
370 03:51:53.440673 Check phy result
371 03:51:53.446552 INFO : End of CA training
372 03:51:53.446965 INFO : End of initialization
373 03:51:53.452218 INFO : Training has run successfully!
374 03:51:53.452633 Check phy result
375 03:51:53.457775 INFO : End of initialization
376 03:51:53.458196 INFO : End of read enable training
377 03:51:53.463377 INFO : End of fine write leveling
378 03:51:53.468952 INFO : End of Write leveling coarse delay
379 03:51:53.469374 INFO : Training has run successfully!
380 03:51:53.469769 Check phy result
381 03:51:53.474555 INFO : End of initialization
382 03:51:53.474972 INFO : End of read dq deskew training
383 03:51:53.480210 INFO : End of MPR read delay center optimization
384 03:51:53.485786 INFO : End of write delay center optimization
385 03:51:53.491392 INFO : End of read delay center optimization
386 03:51:53.491812 INFO : End of max read latency training
387 03:51:53.496990 INFO : Training has run successfully!
388 03:51:53.497414 1D training succeed
389 03:51:53.506224 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 03:51:53.549432 Check phy result
391 03:51:53.553768 INFO : End of initialization
392 03:51:53.575518 INFO : End of 2D read delay Voltage center optimization
393 03:51:53.595739 INFO : End of 2D read delay Voltage center optimization
394 03:51:53.647798 INFO : End of 2D write delay Voltage center optimization
395 03:51:53.697223 INFO : End of 2D write delay Voltage center optimization
396 03:51:53.702746 INFO : Training has run successfully!
397 03:51:53.703195
398 03:51:53.703593 channel==0
399 03:51:53.708366 RxClkDly_Margin_A0==88 ps 9
400 03:51:53.708802 TxDqDly_Margin_A0==98 ps 10
401 03:51:53.713905 RxClkDly_Margin_A1==88 ps 9
402 03:51:53.714324 TxDqDly_Margin_A1==98 ps 10
403 03:51:53.714721 TrainedVREFDQ_A0==74
404 03:51:53.719492 TrainedVREFDQ_A1==74
405 03:51:53.719918 VrefDac_Margin_A0==25
406 03:51:53.720363 DeviceVref_Margin_A0==40
407 03:51:53.725217 VrefDac_Margin_A1==25
408 03:51:53.725641 DeviceVref_Margin_A1==40
409 03:51:53.726034
410 03:51:53.726422
411 03:51:53.730738 channel==1
412 03:51:53.731159 RxClkDly_Margin_A0==98 ps 10
413 03:51:53.731549 TxDqDly_Margin_A0==88 ps 9
414 03:51:53.736314 RxClkDly_Margin_A1==98 ps 10
415 03:51:53.736733 TxDqDly_Margin_A1==88 ps 9
416 03:51:53.741891 TrainedVREFDQ_A0==77
417 03:51:53.742326 TrainedVREFDQ_A1==77
418 03:51:53.742721 VrefDac_Margin_A0==22
419 03:51:53.747497 DeviceVref_Margin_A0==37
420 03:51:53.747920 VrefDac_Margin_A1==22
421 03:51:53.753217 DeviceVref_Margin_A1==37
422 03:51:53.753633
423 03:51:53.754023 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
424 03:51:53.754409
425 03:51:53.786736 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
426 03:51:53.787260 2D training succeed
427 03:51:53.792316 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
428 03:51:53.797940 auto size-- 65535DDR cs0 size: 2048MB
429 03:51:53.798366 DDR cs1 size: 2048MB
430 03:51:53.803508 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
431 03:51:53.803934 cs0 DataBus test pass
432 03:51:53.809227 cs1 DataBus test pass
433 03:51:53.809659 cs0 AddrBus test pass
434 03:51:53.810055 cs1 AddrBus test pass
435 03:51:53.810440
436 03:51:53.814690 100bdlr_step_size ps== 420
437 03:51:53.815121 result report
438 03:51:53.820294 boot times 0Enable ddr reg access
439 03:51:53.825665 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
440 03:51:53.839142 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
441 03:51:54.412905 0.0;M3 CHK:0;cm4_sp_mode 0
442 03:51:54.413534 MVN_1=0x00000000
443 03:51:54.418283 MVN_2=0x00000000
444 03:51:54.424145 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
445 03:51:54.424735 OPS=0x10
446 03:51:54.425193 ring efuse init
447 03:51:54.425643 chipver efuse init
448 03:51:54.429689 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
449 03:51:54.435273 [0.018960 Inits done]
450 03:51:54.435779 secure task start!
451 03:51:54.436268 high task start!
452 03:51:54.439858 low task start!
453 03:51:54.440376 run into bl31
454 03:51:54.446552 NOTICE: BL31: v1.3(release):4fc40b1
455 03:51:54.454431 NOTICE: BL31: Built : 15:58:17, May 22 2019
456 03:51:54.455011 NOTICE: BL31: G12A normal boot!
457 03:51:54.479716 NOTICE: BL31: BL33 decompress pass
458 03:51:54.485327 ERROR: Error initializing runtime service opteed_fast
459 03:51:55.718294
460 03:51:55.718975
461 03:51:55.726614 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
462 03:51:55.727126
463 03:51:55.727590 Model: Libre Computer AML-A311D-CC Alta
464 03:51:55.935021 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
465 03:51:55.958571 DRAM: 2 GiB (effective 3.8 GiB)
466 03:51:56.101484 Core: 408 devices, 31 uclasses, devicetree: separate
467 03:51:56.107321 WDT: Not starting watchdog@f0d0
468 03:51:56.139530 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
469 03:51:56.152061 Loading Environment from FAT... Card did not respond to voltage select! : -110
470 03:51:56.156969 ** Bad device specification mmc 0 **
471 03:51:56.167319 Card did not respond to voltage select! : -110
472 03:51:56.174981 ** Bad device specification mmc 0 **
473 03:51:56.175483 Couldn't find partition mmc 0
474 03:51:56.183307 Card did not respond to voltage select! : -110
475 03:51:56.188792 ** Bad device specification mmc 0 **
476 03:51:56.189264 Couldn't find partition mmc 0
477 03:51:56.193910 Error: could not access storage.
478 03:51:57.457311 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
479 03:51:57.457696 bl2_stage_init 0x01
480 03:51:57.457909 bl2_stage_init 0x81
481 03:51:57.462814 hw id: 0x0000 - pwm id 0x01
482 03:51:57.463220 bl2_stage_init 0xc1
483 03:51:57.463541 bl2_stage_init 0x02
484 03:51:57.463854
485 03:51:57.468404 L0:00000000
486 03:51:57.468787 L1:20000703
487 03:51:57.469026 L2:00008067
488 03:51:57.469232 L3:14000000
489 03:51:57.473981 B2:00402000
490 03:51:57.474360 B1:e0f83180
491 03:51:57.474681
492 03:51:57.474992 TE: 58159
493 03:51:57.475306
494 03:51:57.479619 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 03:51:57.479903
496 03:51:57.480142 Board ID = 1
497 03:51:57.485229 Set A53 clk to 24M
498 03:51:57.485510 Set A73 clk to 24M
499 03:51:57.485722 Set clk81 to 24M
500 03:51:57.490805 A53 clk: 1200 MHz
501 03:51:57.491207 A73 clk: 1200 MHz
502 03:51:57.491529 CLK81: 166.6M
503 03:51:57.491846 smccc: 00012ab5
504 03:51:57.496363 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 03:51:57.502012 board id: 1
506 03:51:57.508070 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 03:51:57.518852 fw parse done
508 03:51:57.524677 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 03:51:57.567286 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 03:51:57.578210 PIEI prepare done
511 03:51:57.578776 fastboot data load
512 03:51:57.579258 fastboot data verify
513 03:51:57.583850 verify result: 266
514 03:51:57.589503 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 03:51:57.590060 LPDDR4 probe
516 03:51:57.590538 ddr clk to 1584MHz
517 03:51:57.597375 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 03:51:57.634674
519 03:51:57.635254 dmc_version 0001
520 03:51:57.641383 Check phy result
521 03:51:57.647211 INFO : End of CA training
522 03:51:57.647770 INFO : End of initialization
523 03:51:57.652839 INFO : Training has run successfully!
524 03:51:57.653398 Check phy result
525 03:51:57.658471 INFO : End of initialization
526 03:51:57.659023 INFO : End of read enable training
527 03:51:57.664126 INFO : End of fine write leveling
528 03:51:57.669695 INFO : End of Write leveling coarse delay
529 03:51:57.670258 INFO : Training has run successfully!
530 03:51:57.670727 Check phy result
531 03:51:57.675251 INFO : End of initialization
532 03:51:57.675814 INFO : End of read dq deskew training
533 03:51:57.680893 INFO : End of MPR read delay center optimization
534 03:51:57.686451 INFO : End of write delay center optimization
535 03:51:57.692090 INFO : End of read delay center optimization
536 03:51:57.692668 INFO : End of max read latency training
537 03:51:57.697673 INFO : Training has run successfully!
538 03:51:57.698245 1D training succeed
539 03:51:57.706891 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 03:51:57.754392 Check phy result
541 03:51:57.754961 INFO : End of initialization
542 03:51:57.776288 INFO : End of 2D read delay Voltage center optimization
543 03:51:57.796402 INFO : End of 2D read delay Voltage center optimization
544 03:51:57.848507 INFO : End of 2D write delay Voltage center optimization
545 03:51:57.897969 INFO : End of 2D write delay Voltage center optimization
546 03:51:57.903409 INFO : Training has run successfully!
547 03:51:57.903966
548 03:51:57.904687 channel==0
549 03:51:57.908951 RxClkDly_Margin_A0==88 ps 9
550 03:51:57.909449 TxDqDly_Margin_A0==98 ps 10
551 03:51:57.914492 RxClkDly_Margin_A1==88 ps 9
552 03:51:57.914962 TxDqDly_Margin_A1==88 ps 9
553 03:51:57.915394 TrainedVREFDQ_A0==74
554 03:51:57.920114 TrainedVREFDQ_A1==74
555 03:51:57.920597 VrefDac_Margin_A0==25
556 03:51:57.921026 DeviceVref_Margin_A0==40
557 03:51:57.925795 VrefDac_Margin_A1==25
558 03:51:57.926253 DeviceVref_Margin_A1==40
559 03:51:57.926671
560 03:51:57.927090
561 03:51:57.927499 channel==1
562 03:51:57.931308 RxClkDly_Margin_A0==98 ps 10
563 03:51:57.931779 TxDqDly_Margin_A0==98 ps 10
564 03:51:57.936857 RxClkDly_Margin_A1==98 ps 10
565 03:51:57.937323 TxDqDly_Margin_A1==88 ps 9
566 03:51:57.942467 TrainedVREFDQ_A0==77
567 03:51:57.942925 TrainedVREFDQ_A1==77
568 03:51:57.943338 VrefDac_Margin_A0==22
569 03:51:57.948063 DeviceVref_Margin_A0==37
570 03:51:57.948535 VrefDac_Margin_A1==22
571 03:51:57.953775 DeviceVref_Margin_A1==37
572 03:51:57.954235
573 03:51:57.954657 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 03:51:57.955069
575 03:51:57.987281 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 0000005f
576 03:51:57.987794 2D training succeed
577 03:51:57.992870 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 03:51:57.998459 auto size-- 65535DDR cs0 size: 2048MB
579 03:51:57.998926 DDR cs1 size: 2048MB
580 03:51:58.004075 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 03:51:58.004541 cs0 DataBus test pass
582 03:51:58.009786 cs1 DataBus test pass
583 03:51:58.010245 cs0 AddrBus test pass
584 03:51:58.010664 cs1 AddrBus test pass
585 03:51:58.011074
586 03:51:58.015285 100bdlr_step_size ps== 420
587 03:51:58.015781 result report
588 03:51:58.020870 boot times 0Enable ddr reg access
589 03:51:58.026204 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 03:51:58.039697 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 03:51:58.613036 0.0;M3 CHK:0;cm4_sp_mode 0
592 03:51:58.613656 MVN_1=0x00000000
593 03:51:58.618471 MVN_2=0x00000000
594 03:51:58.624250 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 03:51:58.624792 OPS=0x10
596 03:51:58.625278 ring efuse init
597 03:51:58.625695 chipver efuse init
598 03:51:58.629826 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 03:51:58.635409 [0.018961 Inits done]
600 03:51:58.635863 secure task start!
601 03:51:58.636310 high task start!
602 03:51:58.639255 low task start!
603 03:51:58.639693 run into bl31
604 03:51:58.646727 NOTICE: BL31: v1.3(release):4fc40b1
605 03:51:58.654502 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 03:51:58.654966 NOTICE: BL31: G12A normal boot!
607 03:51:58.679791 NOTICE: BL31: BL33 decompress pass
608 03:51:58.685421 ERROR: Error initializing runtime service opteed_fast
609 03:51:59.918284
610 03:51:59.918930
611 03:51:59.926641 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 03:51:59.927117
613 03:51:59.927546 Model: Libre Computer AML-A311D-CC Alta
614 03:52:00.135149 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 03:52:00.158460 DRAM: 2 GiB (effective 3.8 GiB)
616 03:52:00.301412 Core: 408 devices, 31 uclasses, devicetree: separate
617 03:52:00.307303 WDT: Not starting watchdog@f0d0
618 03:52:00.339567 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 03:52:00.352027 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 03:52:00.357046 ** Bad device specification mmc 0 **
621 03:52:00.367269 Card did not respond to voltage select! : -110
622 03:52:00.375072 ** Bad device specification mmc 0 **
623 03:52:00.375529 Couldn't find partition mmc 0
624 03:52:00.383420 Card did not respond to voltage select! : -110
625 03:52:00.389003 ** Bad device specification mmc 0 **
626 03:52:00.389455 Couldn't find partition mmc 0
627 03:52:00.394027 Error: could not access storage.
628 03:52:00.736636 Net: eth0: ethernet@ff3f0000
629 03:52:00.737245 starting USB...
630 03:52:00.988297 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 03:52:00.988881 Starting the controller
632 03:52:00.995252 USB XHCI 1.10
633 03:52:02.707615 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
634 03:52:02.708346 bl2_stage_init 0x01
635 03:52:02.708794 bl2_stage_init 0x81
636 03:52:02.713177 hw id: 0x0000 - pwm id 0x01
637 03:52:02.713635 bl2_stage_init 0xc1
638 03:52:02.714055 bl2_stage_init 0x02
639 03:52:02.714462
640 03:52:02.718702 L0:00000000
641 03:52:02.719148 L1:20000703
642 03:52:02.719559 L2:00008067
643 03:52:02.719962 L3:14000000
644 03:52:02.724323 B2:00402000
645 03:52:02.724772 B1:e0f83180
646 03:52:02.725181
647 03:52:02.725585 TE: 58124
648 03:52:02.725985
649 03:52:02.729950 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 03:52:02.730395
651 03:52:02.730808 Board ID = 1
652 03:52:02.735603 Set A53 clk to 24M
653 03:52:02.736066 Set A73 clk to 24M
654 03:52:02.736483 Set clk81 to 24M
655 03:52:02.741326 A53 clk: 1200 MHz
656 03:52:02.741767 A73 clk: 1200 MHz
657 03:52:02.742180 CLK81: 166.6M
658 03:52:02.742587 smccc: 00012a92
659 03:52:02.746739 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 03:52:02.752427 board id: 1
661 03:52:02.758373 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 03:52:02.768910 fw parse done
663 03:52:02.774863 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 03:52:02.817388 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 03:52:02.828270 PIEI prepare done
666 03:52:02.828717 fastboot data load
667 03:52:02.829139 fastboot data verify
668 03:52:02.833904 verify result: 266
669 03:52:02.839482 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 03:52:02.839924 LPDDR4 probe
671 03:52:02.840381 ddr clk to 1584MHz
672 03:52:02.847467 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 03:52:02.884739
674 03:52:02.885192 dmc_version 0001
675 03:52:02.891394 Check phy result
676 03:52:02.897281 INFO : End of CA training
677 03:52:02.897721 INFO : End of initialization
678 03:52:02.902860 INFO : Training has run successfully!
679 03:52:02.903297 Check phy result
680 03:52:02.908488 INFO : End of initialization
681 03:52:02.908939 INFO : End of read enable training
682 03:52:02.914140 INFO : End of fine write leveling
683 03:52:02.919709 INFO : End of Write leveling coarse delay
684 03:52:02.920184 INFO : Training has run successfully!
685 03:52:02.920601 Check phy result
686 03:52:02.925303 INFO : End of initialization
687 03:52:02.925743 INFO : End of read dq deskew training
688 03:52:02.930934 INFO : End of MPR read delay center optimization
689 03:52:02.936527 INFO : End of write delay center optimization
690 03:52:02.942151 INFO : End of read delay center optimization
691 03:52:02.942591 INFO : End of max read latency training
692 03:52:02.947616 INFO : Training has run successfully!
693 03:52:02.948089 1D training succeed
694 03:52:02.956884 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 03:52:03.004416 Check phy result
696 03:52:03.004869 INFO : End of initialization
697 03:52:03.026938 INFO : End of 2D read delay Voltage center optimization
698 03:52:03.047031 INFO : End of 2D read delay Voltage center optimization
699 03:52:03.098939 INFO : End of 2D write delay Voltage center optimization
700 03:52:03.148315 INFO : End of 2D write delay Voltage center optimization
701 03:52:03.153675 INFO : Training has run successfully!
702 03:52:03.153980
703 03:52:03.154213 channel==0
704 03:52:03.159336 RxClkDly_Margin_A0==88 ps 9
705 03:52:03.159783 TxDqDly_Margin_A0==98 ps 10
706 03:52:03.164953 RxClkDly_Margin_A1==88 ps 9
707 03:52:03.165390 TxDqDly_Margin_A1==98 ps 10
708 03:52:03.165749 TrainedVREFDQ_A0==74
709 03:52:03.170649 TrainedVREFDQ_A1==74
710 03:52:03.171232 VrefDac_Margin_A0==25
711 03:52:03.171712 DeviceVref_Margin_A0==40
712 03:52:03.176396 VrefDac_Margin_A1==24
713 03:52:03.176938 DeviceVref_Margin_A1==40
714 03:52:03.177623
715 03:52:03.178125
716 03:52:03.181923 channel==1
717 03:52:03.182455 RxClkDly_Margin_A0==98 ps 10
718 03:52:03.182914 TxDqDly_Margin_A0==98 ps 10
719 03:52:03.187427 RxClkDly_Margin_A1==88 ps 9
720 03:52:03.187966 TxDqDly_Margin_A1==88 ps 9
721 03:52:03.193119 TrainedVREFDQ_A0==77
722 03:52:03.193662 TrainedVREFDQ_A1==77
723 03:52:03.194132 VrefDac_Margin_A0==22
724 03:52:03.198745 DeviceVref_Margin_A0==37
725 03:52:03.199284 VrefDac_Margin_A1==24
726 03:52:03.204347 DeviceVref_Margin_A1==37
727 03:52:03.204890
728 03:52:03.205358 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 03:52:03.205810
730 03:52:03.237761 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
731 03:52:03.238355 2D training succeed
732 03:52:03.243463 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 03:52:03.248943 auto size-- 65535DDR cs0 size: 2048MB
734 03:52:03.249505 DDR cs1 size: 2048MB
735 03:52:03.254676 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 03:52:03.255232 cs0 DataBus test pass
737 03:52:03.260240 cs1 DataBus test pass
738 03:52:03.260795 cs0 AddrBus test pass
739 03:52:03.261263 cs1 AddrBus test pass
740 03:52:03.261717
741 03:52:03.265798 100bdlr_step_size ps== 420
742 03:52:03.266363 result report
743 03:52:03.271395 boot times 0Enable ddr reg access
744 03:52:03.276749 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 03:52:03.290214 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 03:52:03.862132 0.0;M3 CHK:0;cm4_sp_mode 0
747 03:52:03.862783 MVN_1=0x00000000
748 03:52:03.867765 MVN_2=0x00000000
749 03:52:03.873439 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 03:52:03.873935 OPS=0x10
751 03:52:03.874342 ring efuse init
752 03:52:03.874738 chipver efuse init
753 03:52:03.878955 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 03:52:03.884571 [0.018961 Inits done]
755 03:52:03.885014 secure task start!
756 03:52:03.885416 high task start!
757 03:52:03.889170 low task start!
758 03:52:03.889604 run into bl31
759 03:52:03.895831 NOTICE: BL31: v1.3(release):4fc40b1
760 03:52:03.903691 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 03:52:03.904169 NOTICE: BL31: G12A normal boot!
762 03:52:03.929596 NOTICE: BL31: BL33 decompress pass
763 03:52:03.935205 ERROR: Error initializing runtime service opteed_fast
764 03:52:05.168132
765 03:52:05.168715
766 03:52:05.176530 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 03:52:05.177063
768 03:52:05.177496 Model: Libre Computer AML-A311D-CC Alta
769 03:52:05.384959 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 03:52:05.408336 DRAM: 2 GiB (effective 3.8 GiB)
771 03:52:05.551322 Core: 408 devices, 31 uclasses, devicetree: separate
772 03:52:05.557176 WDT: Not starting watchdog@f0d0
773 03:52:05.589477 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 03:52:05.601967 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 03:52:05.606934 ** Bad device specification mmc 0 **
776 03:52:05.617302 Card did not respond to voltage select! : -110
777 03:52:05.624930 ** Bad device specification mmc 0 **
778 03:52:05.625435 Couldn't find partition mmc 0
779 03:52:05.633231 Card did not respond to voltage select! : -110
780 03:52:05.638837 ** Bad device specification mmc 0 **
781 03:52:05.639334 Couldn't find partition mmc 0
782 03:52:05.643954 Error: could not access storage.
783 03:52:05.986266 Net: eth0: ethernet@ff3f0000
784 03:52:05.986832 starting USB...
785 03:52:06.238019 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 03:52:06.238546 Starting the controller
787 03:52:06.245005 USB XHCI 1.10
788 03:52:08.409163 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 03:52:08.409832 bl2_stage_init 0x01
790 03:52:08.410320 bl2_stage_init 0x81
791 03:52:08.414773 hw id: 0x0000 - pwm id 0x01
792 03:52:08.415320 bl2_stage_init 0xc1
793 03:52:08.415792 bl2_stage_init 0x02
794 03:52:08.416301
795 03:52:08.420485 L0:00000000
796 03:52:08.421026 L1:20000703
797 03:52:08.421488 L2:00008067
798 03:52:08.421939 L3:14000000
799 03:52:08.423256 B2:00402000
800 03:52:08.423789 B1:e0f83180
801 03:52:08.424292
802 03:52:08.424755 TE: 58159
803 03:52:08.425212
804 03:52:08.434365 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 03:52:08.434923
806 03:52:08.435386 Board ID = 1
807 03:52:08.435834 Set A53 clk to 24M
808 03:52:08.436316 Set A73 clk to 24M
809 03:52:08.440069 Set clk81 to 24M
810 03:52:08.440611 A53 clk: 1200 MHz
811 03:52:08.441074 A73 clk: 1200 MHz
812 03:52:08.445606 CLK81: 166.6M
813 03:52:08.446141 smccc: 00012ab5
814 03:52:08.451209 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 03:52:08.451747 board id: 1
816 03:52:08.459279 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 03:52:08.470360 fw parse done
818 03:52:08.476556 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 03:52:08.518389 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 03:52:08.529963 PIEI prepare done
821 03:52:08.530508 fastboot data load
822 03:52:08.530979 fastboot data verify
823 03:52:08.535635 verify result: 266
824 03:52:08.541304 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 03:52:08.541849 LPDDR4 probe
826 03:52:08.542309 ddr clk to 1584MHz
827 03:52:08.548173 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 03:52:08.585638
829 03:52:08.586204 dmc_version 0001
830 03:52:08.593143 Check phy result
831 03:52:08.598902 INFO : End of CA training
832 03:52:08.599439 INFO : End of initialization
833 03:52:08.604566 INFO : Training has run successfully!
834 03:52:08.605105 Check phy result
835 03:52:08.610141 INFO : End of initialization
836 03:52:08.610670 INFO : End of read enable training
837 03:52:08.613542 INFO : End of fine write leveling
838 03:52:08.619057 INFO : End of Write leveling coarse delay
839 03:52:08.624653 INFO : Training has run successfully!
840 03:52:08.625188 Check phy result
841 03:52:08.625649 INFO : End of initialization
842 03:52:08.630223 INFO : End of read dq deskew training
843 03:52:08.635865 INFO : End of MPR read delay center optimization
844 03:52:08.636472 INFO : End of write delay center optimization
845 03:52:08.641469 INFO : End of read delay center optimization
846 03:52:08.647046 INFO : End of max read latency training
847 03:52:08.647596 INFO : Training has run successfully!
848 03:52:08.652629 1D training succeed
849 03:52:08.658485 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 03:52:08.705584 Check phy result
851 03:52:08.706159 INFO : End of initialization
852 03:52:08.727168 INFO : End of 2D read delay Voltage center optimization
853 03:52:08.747528 INFO : End of 2D read delay Voltage center optimization
854 03:52:08.799845 INFO : End of 2D write delay Voltage center optimization
855 03:52:08.849471 INFO : End of 2D write delay Voltage center optimization
856 03:52:08.855134 INFO : Training has run successfully!
857 03:52:08.855676
858 03:52:08.856200 channel==0
859 03:52:08.860608 RxClkDly_Margin_A0==88 ps 9
860 03:52:08.861157 TxDqDly_Margin_A0==98 ps 10
861 03:52:08.864003 RxClkDly_Margin_A1==88 ps 9
862 03:52:08.864543 TxDqDly_Margin_A1==98 ps 10
863 03:52:08.869570 TrainedVREFDQ_A0==74
864 03:52:08.870141 TrainedVREFDQ_A1==74
865 03:52:08.875131 VrefDac_Margin_A0==25
866 03:52:08.875683 DeviceVref_Margin_A0==40
867 03:52:08.876160 VrefDac_Margin_A1==25
868 03:52:08.880735 DeviceVref_Margin_A1==40
869 03:52:08.881257
870 03:52:08.881719
871 03:52:08.882153 channel==1
872 03:52:08.882581 RxClkDly_Margin_A0==98 ps 10
873 03:52:08.884227 TxDqDly_Margin_A0==88 ps 9
874 03:52:08.889717 RxClkDly_Margin_A1==98 ps 10
875 03:52:08.890242 TxDqDly_Margin_A1==108 ps 11
876 03:52:08.895254 TrainedVREFDQ_A0==76
877 03:52:08.895785 TrainedVREFDQ_A1==78
878 03:52:08.896265 VrefDac_Margin_A0==22
879 03:52:08.900945 DeviceVref_Margin_A0==38
880 03:52:08.901393 VrefDac_Margin_A1==22
881 03:52:08.901750 DeviceVref_Margin_A1==36
882 03:52:08.902111
883 03:52:08.909938 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 03:52:08.910514
885 03:52:08.935605 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 00000019 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
886 03:52:08.941159 2D training succeed
887 03:52:08.946760 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 03:52:08.952405 auto size-- 65535DDR cs0 size: 2048MB
889 03:52:08.952959 DDR cs1 size: 2048MB
890 03:52:08.957957 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 03:52:08.958503 cs0 DataBus test pass
892 03:52:08.958943 cs1 DataBus test pass
893 03:52:08.963560 cs0 AddrBus test pass
894 03:52:08.964148 cs1 AddrBus test pass
895 03:52:08.964619
896 03:52:08.965088 100bdlr_step_size ps== 420
897 03:52:08.969145 result report
898 03:52:08.969689 boot times 0Enable ddr reg access
899 03:52:08.977082 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 03:52:08.991372 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 03:52:09.565186 0.0;M3 CHK:0;cm4_sp_mode 0
902 03:52:09.565858 MVN_1=0x00000000
903 03:52:09.570632 MVN_2=0x00000000
904 03:52:09.576379 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 03:52:09.576939 OPS=0x10
906 03:52:09.577418 ring efuse init
907 03:52:09.577872 chipver efuse init
908 03:52:09.581975 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 03:52:09.587678 [0.018961 Inits done]
910 03:52:09.588299 secure task start!
911 03:52:09.588781 high task start!
912 03:52:09.591567 low task start!
913 03:52:09.592161 run into bl31
914 03:52:09.598833 NOTICE: BL31: v1.3(release):4fc40b1
915 03:52:09.605650 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 03:52:09.606216 NOTICE: BL31: G12A normal boot!
917 03:52:09.632516 NOTICE: BL31: BL33 decompress pass
918 03:52:09.637810 ERROR: Error initializing runtime service opteed_fast
919 03:52:10.871081
920 03:52:10.871731
921 03:52:10.878977 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 03:52:10.879517
923 03:52:10.880034 Model: Libre Computer AML-A311D-CC Alta
924 03:52:11.087027 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 03:52:11.110747 DRAM: 2 GiB (effective 3.8 GiB)
926 03:52:11.254520 Core: 408 devices, 31 uclasses, devicetree: separate
927 03:52:11.260226 WDT: Not starting watchdog@f0d0
928 03:52:11.292607 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 03:52:11.305040 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 03:52:11.309510 ** Bad device specification mmc 0 **
931 03:52:11.320359 Card did not respond to voltage select! : -110
932 03:52:11.328003 ** Bad device specification mmc 0 **
933 03:52:11.328665 Couldn't find partition mmc 0
934 03:52:11.336384 Card did not respond to voltage select! : -110
935 03:52:11.341879 ** Bad device specification mmc 0 **
936 03:52:11.342559 Couldn't find partition mmc 0
937 03:52:11.346333 Error: could not access storage.
938 03:52:11.689625 Net: eth0: ethernet@ff3f0000
939 03:52:11.690411 starting USB...
940 03:52:11.942304 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 03:52:11.943106 Starting the controller
942 03:52:11.948271 USB XHCI 1.10
943 03:52:13.503073 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 03:52:13.511270 scanning usb for storage devices... 0 Storage Device(s) found
946 03:52:13.563292 Hit any key to stop autoboot: 1
947 03:52:13.564453 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 03:52:13.565247 start: 2.4.3 bootloader-commands (timeout 00:04:27) [common]
949 03:52:13.565873 Setting prompt string to ['=>']
950 03:52:13.566508 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:27)
951 03:52:13.578799 0
952 03:52:13.579893 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 03:52:13.580585 Sending with 10 millisecond of delay
955 03:52:14.715937 => setenv autoload no
956 03:52:14.726969 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
957 03:52:14.733296 setenv autoload no
958 03:52:14.734193 Sending with 10 millisecond of delay
960 03:52:16.532111 => setenv initrd_high 0xffffffff
961 03:52:16.543103 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
962 03:52:16.544209 setenv initrd_high 0xffffffff
963 03:52:16.545087 Sending with 10 millisecond of delay
965 03:52:18.162055 => setenv fdt_high 0xffffffff
966 03:52:18.172826 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
967 03:52:18.173678 setenv fdt_high 0xffffffff
968 03:52:18.174397 Sending with 10 millisecond of delay
970 03:52:18.466269 => dhcp
971 03:52:18.477270 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 03:52:18.478337 dhcp
973 03:52:18.478913 Speed: 1000, full duplex
974 03:52:18.479452 BOOTP broadcast 1
975 03:52:18.486236 DHCP client bound to address 192.168.6.27 (10 ms)
976 03:52:18.487134 Sending with 10 millisecond of delay
978 03:52:20.164081 => setenv serverip 192.168.6.2
979 03:52:20.175059 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
980 03:52:20.176187 setenv serverip 192.168.6.2
981 03:52:20.177030 Sending with 10 millisecond of delay
983 03:52:23.903662 => tftpboot 0x01080000 937864/tftp-deploy-oyflvfas/kernel/uImage
984 03:52:23.914458 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
985 03:52:23.915272 tftpboot 0x01080000 937864/tftp-deploy-oyflvfas/kernel/uImage
986 03:52:23.915716 Speed: 1000, full duplex
987 03:52:23.916165 Using ethernet@ff3f0000 device
988 03:52:23.917180 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 03:52:23.922708 Filename '937864/tftp-deploy-oyflvfas/kernel/uImage'.
990 03:52:23.926721 Load address: 0x1080000
991 03:52:28.233630 Loading: *################################################## 63.4 MiB
992 03:52:28.234442 14.7 MiB/s
993 03:52:28.235047 done
994 03:52:28.236454 Bytes transferred = 66443840 (3f5da40 hex)
995 03:52:28.237420 Sending with 10 millisecond of delay
997 03:52:32.925668 => tftpboot 0x08000000 937864/tftp-deploy-oyflvfas/ramdisk/ramdisk.cpio.gz.uboot
998 03:52:32.936440 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:08)
999 03:52:32.937264 tftpboot 0x08000000 937864/tftp-deploy-oyflvfas/ramdisk/ramdisk.cpio.gz.uboot
1000 03:52:32.937733 Speed: 1000, full duplex
1001 03:52:32.938167 Using ethernet@ff3f0000 device
1002 03:52:32.938999 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1003 03:52:32.950776 Filename '937864/tftp-deploy-oyflvfas/ramdisk/ramdisk.cpio.gz.uboot'.
1004 03:52:32.951295 Load address: 0x8000000
1005 03:52:34.881586 Loading: *################################################# UDP wrong checksum 00000007 00003481
1006 03:52:39.882764 T UDP wrong checksum 00000007 00003481
1007 03:52:40.263237 UDP wrong checksum 000000ff 0000ed84
1008 03:52:40.276853 UDP wrong checksum 000000ff 00007677
1009 03:52:56.108675 T T T UDP wrong checksum 000000ff 0000e3e2
1010 03:52:56.142285 UDP wrong checksum 000000ff 00007fd5
1011 03:53:09.890150 T T T UDP wrong checksum 00000007 00003481
1012 03:53:24.392189 T T UDP wrong checksum 000000ff 000090c3
1013 03:53:24.432065 UDP wrong checksum 000000ff 00001cb6
1014 03:53:29.895331 T
1015 03:53:29.896175 Retry count exceeded; starting again
1017 03:53:29.897969 end: 2.4.3 bootloader-commands (duration 00:01:16) [common]
1020 03:53:29.900443 end: 2.4 uboot-commands (duration 00:01:49) [common]
1022 03:53:29.902256 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1024 03:53:29.903614 end: 2 uboot-action (duration 00:01:49) [common]
1026 03:53:29.905668 Cleaning after the job
1027 03:53:29.906399 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/ramdisk
1028 03:53:29.908132 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/kernel
1029 03:53:29.952216 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/dtb
1030 03:53:29.953269 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/nfsrootfs
1031 03:53:30.084486 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937864/tftp-deploy-oyflvfas/modules
1032 03:53:30.120500 start: 4.1 power-off (timeout 00:00:30) [common]
1033 03:53:30.121308 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1034 03:53:30.156195 >> OK - accepted request
1035 03:53:30.158241 Returned 0 in 0 seconds
1036 03:53:30.259224 end: 4.1 power-off (duration 00:00:00) [common]
1038 03:53:30.260346 start: 4.2 read-feedback (timeout 00:10:00) [common]
1039 03:53:30.261055 Listened to connection for namespace 'common' for up to 1s
1040 03:53:31.261958 Finalising connection for namespace 'common'
1041 03:53:31.262457 Disconnecting from shell: Finalise
1042 03:53:31.262736 =>
1043 03:53:31.363380 end: 4.2 read-feedback (duration 00:00:01) [common]
1044 03:53:31.363814 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/937864
1045 03:53:33.284350 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/937864
1046 03:53:33.284983 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.