Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 4
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:09:15.010978 lava-dispatcher, installed at version: 2024.01
2 04:09:15.011799 start: 0 validate
3 04:09:15.012301 Start time: 2024-11-05 04:09:15.012269+00:00 (UTC)
4 04:09:15.012846 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:09:15.013391 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:09:15.060093 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:09:15.060688 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-15%2Fkernel%2FImage exists
8 04:09:15.091900 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:09:15.092529 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 04:09:15.131890 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:09:15.132378 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:09:15.166928 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:09:15.167399 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-15%2Fmodules.tar.xz exists
14 04:09:15.211054 validate duration: 0.20
16 04:09:15.212508 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:09:15.213123 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:09:15.213690 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:09:15.214665 Not decompressing ramdisk as can be used compressed.
20 04:09:15.215445 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 04:09:15.215948 saving as /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/ramdisk/initrd.cpio.gz
22 04:09:15.216513 total size: 5628182 (5 MB)
23 04:09:15.263207 progress 0 % (0 MB)
24 04:09:15.271808 progress 5 % (0 MB)
25 04:09:15.280425 progress 10 % (0 MB)
26 04:09:15.288183 progress 15 % (0 MB)
27 04:09:15.296857 progress 20 % (1 MB)
28 04:09:15.303711 progress 25 % (1 MB)
29 04:09:15.307931 progress 30 % (1 MB)
30 04:09:15.311904 progress 35 % (1 MB)
31 04:09:15.315502 progress 40 % (2 MB)
32 04:09:15.319397 progress 45 % (2 MB)
33 04:09:15.322936 progress 50 % (2 MB)
34 04:09:15.326858 progress 55 % (2 MB)
35 04:09:15.330856 progress 60 % (3 MB)
36 04:09:15.334406 progress 65 % (3 MB)
37 04:09:15.338322 progress 70 % (3 MB)
38 04:09:15.341979 progress 75 % (4 MB)
39 04:09:15.345889 progress 80 % (4 MB)
40 04:09:15.349415 progress 85 % (4 MB)
41 04:09:15.353174 progress 90 % (4 MB)
42 04:09:15.356722 progress 95 % (5 MB)
43 04:09:15.359906 progress 100 % (5 MB)
44 04:09:15.360573 5 MB downloaded in 0.14 s (37.26 MB/s)
45 04:09:15.361132 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:09:15.362045 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:09:15.362358 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:09:15.362644 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:09:15.363120 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-15/kernel/Image
51 04:09:15.363392 saving as /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/kernel/Image
52 04:09:15.363611 total size: 39424512 (37 MB)
53 04:09:15.363828 No compression specified
54 04:09:15.403030 progress 0 % (0 MB)
55 04:09:15.427396 progress 5 % (1 MB)
56 04:09:15.451513 progress 10 % (3 MB)
57 04:09:15.475553 progress 15 % (5 MB)
58 04:09:15.499614 progress 20 % (7 MB)
59 04:09:15.523792 progress 25 % (9 MB)
60 04:09:15.547755 progress 30 % (11 MB)
61 04:09:15.572221 progress 35 % (13 MB)
62 04:09:15.596145 progress 40 % (15 MB)
63 04:09:15.620262 progress 45 % (16 MB)
64 04:09:15.644400 progress 50 % (18 MB)
65 04:09:15.668385 progress 55 % (20 MB)
66 04:09:15.692561 progress 60 % (22 MB)
67 04:09:15.717121 progress 65 % (24 MB)
68 04:09:15.740941 progress 70 % (26 MB)
69 04:09:15.764934 progress 75 % (28 MB)
70 04:09:15.788884 progress 80 % (30 MB)
71 04:09:15.812997 progress 85 % (31 MB)
72 04:09:15.837019 progress 90 % (33 MB)
73 04:09:15.860910 progress 95 % (35 MB)
74 04:09:15.886796 progress 100 % (37 MB)
75 04:09:15.887360 37 MB downloaded in 0.52 s (71.79 MB/s)
76 04:09:15.887840 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:09:15.888679 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:09:15.888954 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:09:15.889218 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:09:15.889677 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-15/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 04:09:15.889921 saving as /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 04:09:15.890125 total size: 53209 (0 MB)
84 04:09:15.890332 No compression specified
85 04:09:15.932283 progress 61 % (0 MB)
86 04:09:15.933127 progress 100 % (0 MB)
87 04:09:15.933669 0 MB downloaded in 0.04 s (1.17 MB/s)
88 04:09:15.934138 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:09:15.934936 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:09:15.935200 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:09:15.935463 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:09:15.935915 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 04:09:15.936192 saving as /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/nfsrootfs/full.rootfs.tar
95 04:09:15.936399 total size: 107552908 (102 MB)
96 04:09:15.936607 Using unxz to decompress xz
97 04:09:15.975410 progress 0 % (0 MB)
98 04:09:16.629843 progress 5 % (5 MB)
99 04:09:17.355191 progress 10 % (10 MB)
100 04:09:18.076230 progress 15 % (15 MB)
101 04:09:18.843682 progress 20 % (20 MB)
102 04:09:19.452369 progress 25 % (25 MB)
103 04:09:20.142468 progress 30 % (30 MB)
104 04:09:20.958748 progress 35 % (35 MB)
105 04:09:21.326527 progress 40 % (41 MB)
106 04:09:21.759497 progress 45 % (46 MB)
107 04:09:22.449784 progress 50 % (51 MB)
108 04:09:23.137164 progress 55 % (56 MB)
109 04:09:23.914478 progress 60 % (61 MB)
110 04:09:24.673630 progress 65 % (66 MB)
111 04:09:25.413777 progress 70 % (71 MB)
112 04:09:26.182016 progress 75 % (76 MB)
113 04:09:26.865778 progress 80 % (82 MB)
114 04:09:27.576515 progress 85 % (87 MB)
115 04:09:28.303184 progress 90 % (92 MB)
116 04:09:29.019318 progress 95 % (97 MB)
117 04:09:29.781835 progress 100 % (102 MB)
118 04:09:29.794177 102 MB downloaded in 13.86 s (7.40 MB/s)
119 04:09:29.795285 end: 1.4.1 http-download (duration 00:00:14) [common]
121 04:09:29.797127 end: 1.4 download-retry (duration 00:00:14) [common]
122 04:09:29.798626 start: 1.5 download-retry (timeout 00:09:45) [common]
123 04:09:29.799584 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 04:09:29.800946 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-15/modules.tar.xz
125 04:09:29.801630 saving as /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/modules/modules.tar
126 04:09:29.802159 total size: 11765612 (11 MB)
127 04:09:29.802699 Using unxz to decompress xz
128 04:09:29.856181 progress 0 % (0 MB)
129 04:09:29.926476 progress 5 % (0 MB)
130 04:09:30.003925 progress 10 % (1 MB)
131 04:09:30.100696 progress 15 % (1 MB)
132 04:09:30.197386 progress 20 % (2 MB)
133 04:09:30.277226 progress 25 % (2 MB)
134 04:09:30.354745 progress 30 % (3 MB)
135 04:09:30.435215 progress 35 % (3 MB)
136 04:09:30.515272 progress 40 % (4 MB)
137 04:09:30.591405 progress 45 % (5 MB)
138 04:09:30.676620 progress 50 % (5 MB)
139 04:09:30.759572 progress 55 % (6 MB)
140 04:09:30.845718 progress 60 % (6 MB)
141 04:09:30.928270 progress 65 % (7 MB)
142 04:09:31.010359 progress 70 % (7 MB)
143 04:09:31.093905 progress 75 % (8 MB)
144 04:09:31.177894 progress 80 % (9 MB)
145 04:09:31.258876 progress 85 % (9 MB)
146 04:09:31.343214 progress 90 % (10 MB)
147 04:09:31.422676 progress 95 % (10 MB)
148 04:09:31.500816 progress 100 % (11 MB)
149 04:09:31.511015 11 MB downloaded in 1.71 s (6.57 MB/s)
150 04:09:31.511701 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:09:31.513566 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:09:31.514236 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 04:09:31.514900 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 04:09:42.808654 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/938067/extract-nfsrootfs-z8dezgte
156 04:09:42.809269 end: 1.6.1 extract-nfsrootfs (duration 00:00:11) [common]
157 04:09:42.809573 start: 1.6.2 lava-overlay (timeout 00:09:32) [common]
158 04:09:42.810247 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq
159 04:09:42.810686 makedir: /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin
160 04:09:42.811008 makedir: /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/tests
161 04:09:42.811314 makedir: /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/results
162 04:09:42.811644 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-add-keys
163 04:09:42.812212 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-add-sources
164 04:09:42.812773 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-background-process-start
165 04:09:42.813300 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-background-process-stop
166 04:09:42.813828 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-common-functions
167 04:09:42.814336 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-echo-ipv4
168 04:09:42.814830 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-install-packages
169 04:09:42.815307 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-installed-packages
170 04:09:42.815816 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-os-build
171 04:09:42.816379 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-probe-channel
172 04:09:42.816892 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-probe-ip
173 04:09:42.817367 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-target-ip
174 04:09:42.817830 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-target-mac
175 04:09:42.818313 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-target-storage
176 04:09:42.818804 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-test-case
177 04:09:42.819328 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-test-event
178 04:09:42.819842 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-test-feedback
179 04:09:42.820454 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-test-raise
180 04:09:42.820938 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-test-reference
181 04:09:42.821408 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-test-runner
182 04:09:42.821882 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-test-set
183 04:09:42.822367 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-test-shell
184 04:09:42.822914 Updating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-install-packages (oe)
185 04:09:42.823480 Updating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/bin/lava-installed-packages (oe)
186 04:09:42.823925 Creating /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/environment
187 04:09:42.824328 LAVA metadata
188 04:09:42.824586 - LAVA_JOB_ID=938067
189 04:09:42.824800 - LAVA_DISPATCHER_IP=192.168.6.2
190 04:09:42.825158 start: 1.6.2.1 ssh-authorize (timeout 00:09:32) [common]
191 04:09:42.826120 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 04:09:42.826446 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:32) [common]
193 04:09:42.826668 skipped lava-vland-overlay
194 04:09:42.826914 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 04:09:42.827167 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:32) [common]
196 04:09:42.827387 skipped lava-multinode-overlay
197 04:09:42.827632 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 04:09:42.827880 start: 1.6.2.4 test-definition (timeout 00:09:32) [common]
199 04:09:42.828147 Loading test definitions
200 04:09:42.828424 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:32) [common]
201 04:09:42.828640 Using /lava-938067 at stage 0
202 04:09:42.829830 uuid=938067_1.6.2.4.1 testdef=None
203 04:09:42.830145 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 04:09:42.830410 start: 1.6.2.4.2 test-overlay (timeout 00:09:32) [common]
205 04:09:42.832222 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 04:09:42.833068 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:32) [common]
208 04:09:42.835301 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 04:09:42.836164 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:32) [common]
211 04:09:42.838344 runner path: /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/0/tests/0_dmesg test_uuid 938067_1.6.2.4.1
212 04:09:42.838892 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 04:09:42.839673 Creating lava-test-runner.conf files
215 04:09:42.839876 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/938067/lava-overlay-83891fwq/lava-938067/0 for stage 0
216 04:09:42.840306 - 0_dmesg
217 04:09:42.840655 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 04:09:42.840923 start: 1.6.2.5 compress-overlay (timeout 00:09:32) [common]
219 04:09:42.862758 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 04:09:42.863162 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:32) [common]
221 04:09:42.863428 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 04:09:42.863696 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 04:09:42.863966 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:32) [common]
224 04:09:43.481054 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 04:09:43.481627 start: 1.6.4 extract-modules (timeout 00:09:32) [common]
226 04:09:43.481925 extracting modules file /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/modules/modules.tar to /var/lib/lava/dispatcher/tmp/938067/extract-nfsrootfs-z8dezgte
227 04:09:45.212324 extracting modules file /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/modules/modules.tar to /var/lib/lava/dispatcher/tmp/938067/extract-overlay-ramdisk-k_xy8ajd/ramdisk
228 04:09:46.747152 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 04:09:46.747644 start: 1.6.5 apply-overlay-tftp (timeout 00:09:28) [common]
230 04:09:46.747925 [common] Applying overlay to NFS
231 04:09:46.748163 [common] Applying overlay /var/lib/lava/dispatcher/tmp/938067/compress-overlay-n13w6lzt/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/938067/extract-nfsrootfs-z8dezgte
232 04:09:46.778029 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 04:09:46.778510 start: 1.6.6 prepare-kernel (timeout 00:09:28) [common]
234 04:09:46.778792 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:28) [common]
235 04:09:46.779033 Converting downloaded kernel to a uImage
236 04:09:46.779372 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/kernel/Image /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/kernel/uImage
237 04:09:47.182487 output: Image Name:
238 04:09:47.182906 output: Created: Tue Nov 5 04:09:46 2024
239 04:09:47.183116 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 04:09:47.183320 output: Data Size: 39424512 Bytes = 38500.50 KiB = 37.60 MiB
241 04:09:47.183520 output: Load Address: 01080000
242 04:09:47.183720 output: Entry Point: 01080000
243 04:09:47.183916 output:
244 04:09:47.184289 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 04:09:47.184558 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 04:09:47.184825 start: 1.6.7 configure-preseed-file (timeout 00:09:28) [common]
247 04:09:47.185075 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 04:09:47.185329 start: 1.6.8 compress-ramdisk (timeout 00:09:28) [common]
249 04:09:47.185583 Building ramdisk /var/lib/lava/dispatcher/tmp/938067/extract-overlay-ramdisk-k_xy8ajd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/938067/extract-overlay-ramdisk-k_xy8ajd/ramdisk
250 04:09:49.454706 >> 173477 blocks
251 04:09:57.114350 Adding RAMdisk u-boot header.
252 04:09:57.115023 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/938067/extract-overlay-ramdisk-k_xy8ajd/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/938067/extract-overlay-ramdisk-k_xy8ajd/ramdisk.cpio.gz.uboot
253 04:09:57.362300 output: Image Name:
254 04:09:57.362726 output: Created: Tue Nov 5 04:09:57 2024
255 04:09:57.363256 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 04:09:57.363716 output: Data Size: 24140717 Bytes = 23574.92 KiB = 23.02 MiB
257 04:09:57.364238 output: Load Address: 00000000
258 04:09:57.364688 output: Entry Point: 00000000
259 04:09:57.365129 output:
260 04:09:57.366245 rename /var/lib/lava/dispatcher/tmp/938067/extract-overlay-ramdisk-k_xy8ajd/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/ramdisk/ramdisk.cpio.gz.uboot
261 04:09:57.367032 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 04:09:57.367642 end: 1.6 prepare-tftp-overlay (duration 00:00:26) [common]
263 04:09:57.368272 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:18) [common]
264 04:09:57.368786 No LXC device requested
265 04:09:57.369350 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 04:09:57.369919 start: 1.8 deploy-device-env (timeout 00:09:18) [common]
267 04:09:57.370470 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 04:09:57.370925 Checking files for TFTP limit of 4294967296 bytes.
269 04:09:57.373882 end: 1 tftp-deploy (duration 00:00:42) [common]
270 04:09:57.374525 start: 2 uboot-action (timeout 00:05:00) [common]
271 04:09:57.375108 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 04:09:57.375666 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 04:09:57.376267 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 04:09:57.376854 Using kernel file from prepare-kernel: 938067/tftp-deploy-4bz1x6ep/kernel/uImage
275 04:09:57.377549 substitutions:
276 04:09:57.378000 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 04:09:57.378448 - {DTB_ADDR}: 0x01070000
278 04:09:57.378889 - {DTB}: 938067/tftp-deploy-4bz1x6ep/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 04:09:57.379327 - {INITRD}: 938067/tftp-deploy-4bz1x6ep/ramdisk/ramdisk.cpio.gz.uboot
280 04:09:57.379764 - {KERNEL_ADDR}: 0x01080000
281 04:09:57.380233 - {KERNEL}: 938067/tftp-deploy-4bz1x6ep/kernel/uImage
282 04:09:57.380674 - {LAVA_MAC}: None
283 04:09:57.381152 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/938067/extract-nfsrootfs-z8dezgte
284 04:09:57.381593 - {NFS_SERVER_IP}: 192.168.6.2
285 04:09:57.382031 - {PRESEED_CONFIG}: None
286 04:09:57.382461 - {PRESEED_LOCAL}: None
287 04:09:57.382892 - {RAMDISK_ADDR}: 0x08000000
288 04:09:57.383319 - {RAMDISK}: 938067/tftp-deploy-4bz1x6ep/ramdisk/ramdisk.cpio.gz.uboot
289 04:09:57.383751 - {ROOT_PART}: None
290 04:09:57.384225 - {ROOT}: None
291 04:09:57.384665 - {SERVER_IP}: 192.168.6.2
292 04:09:57.385096 - {TEE_ADDR}: 0x83000000
293 04:09:57.385527 - {TEE}: None
294 04:09:57.385955 Parsed boot commands:
295 04:09:57.386374 - setenv autoload no
296 04:09:57.386804 - setenv initrd_high 0xffffffff
297 04:09:57.387232 - setenv fdt_high 0xffffffff
298 04:09:57.387656 - dhcp
299 04:09:57.388141 - setenv serverip 192.168.6.2
300 04:09:57.388581 - tftpboot 0x01080000 938067/tftp-deploy-4bz1x6ep/kernel/uImage
301 04:09:57.389013 - tftpboot 0x08000000 938067/tftp-deploy-4bz1x6ep/ramdisk/ramdisk.cpio.gz.uboot
302 04:09:57.389445 - tftpboot 0x01070000 938067/tftp-deploy-4bz1x6ep/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 04:09:57.389875 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/938067/extract-nfsrootfs-z8dezgte,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 04:09:57.390318 - bootm 0x01080000 0x08000000 0x01070000
305 04:09:57.390874 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 04:09:57.392574 start: 2.3 connect-device (timeout 00:05:00) [common]
308 04:09:57.393047 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 04:09:57.408614 Setting prompt string to ['lava-test: # ']
310 04:09:57.410238 end: 2.3 connect-device (duration 00:00:00) [common]
311 04:09:57.410917 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 04:09:57.411885 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 04:09:57.412526 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 04:09:57.413880 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 04:09:57.453116 >> OK - accepted request
316 04:09:57.455455 Returned 0 in 0 seconds
317 04:09:57.556782 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 04:09:57.558704 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 04:09:57.559380 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 04:09:57.559961 Setting prompt string to ['Hit any key to stop autoboot']
322 04:09:57.560546 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 04:09:57.562257 Trying 192.168.56.21...
324 04:09:57.562773 Connected to conserv1.
325 04:09:57.563222 Escape character is '^]'.
326 04:09:57.563672
327 04:09:57.564179 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 04:09:57.564655
329 04:10:05.003798 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 04:10:05.004540 bl2_stage_init 0x01
331 04:10:05.005018 bl2_stage_init 0x81
332 04:10:05.009340 hw id: 0x0000 - pwm id 0x01
333 04:10:05.009852 bl2_stage_init 0xc1
334 04:10:05.010310 bl2_stage_init 0x02
335 04:10:05.010777
336 04:10:05.014947 L0:00000000
337 04:10:05.015466 L1:00000703
338 04:10:05.015937 L2:00008067
339 04:10:05.016443 L3:15000000
340 04:10:05.016907 S1:00000000
341 04:10:05.017672 B2:20282000
342 04:10:05.022703 B1:a0f83180
343 04:10:05.023201
344 04:10:05.023655 TE: 73009
345 04:10:05.024147
346 04:10:05.028317 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 04:10:05.028818
348 04:10:05.029273 Board ID = 1
349 04:10:05.029714 Set cpu clk to 24M
350 04:10:05.033911 Set clk81 to 24M
351 04:10:05.034409 Use GP1_pll as DSU clk.
352 04:10:05.034854 DSU clk: 1200 Mhz
353 04:10:05.039508 CPU clk: 1200 MHz
354 04:10:05.040027 Set clk81 to 166.6M
355 04:10:05.045130 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 04:10:05.045629 board id: 1
357 04:10:05.054905 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 04:10:05.065838 fw parse done
359 04:10:05.071790 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 04:10:05.114980 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 04:10:05.126111 PIEI prepare done
362 04:10:05.126612 fastboot data load
363 04:10:05.127067 fastboot data verify
364 04:10:05.131688 verify result: 266
365 04:10:05.137276 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 04:10:05.137760 LPDDR4 probe
367 04:10:05.138201 ddr clk to 1584MHz
368 04:10:05.145301 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 04:10:05.183001
370 04:10:05.183523 dmc_version 0001
371 04:10:05.190018 Check phy result
372 04:10:05.196022 INFO : End of CA training
373 04:10:05.196513 INFO : End of initialization
374 04:10:05.201595 INFO : Training has run successfully!
375 04:10:05.202076 Check phy result
376 04:10:05.207254 INFO : End of initialization
377 04:10:05.207723 INFO : End of read enable training
378 04:10:05.212787 INFO : End of fine write leveling
379 04:10:05.218402 INFO : End of Write leveling coarse delay
380 04:10:05.218882 INFO : Training has run successfully!
381 04:10:05.219326 Check phy result
382 04:10:05.224053 INFO : End of initialization
383 04:10:05.224623 INFO : End of read dq deskew training
384 04:10:05.229639 INFO : End of MPR read delay center optimization
385 04:10:05.235249 INFO : End of write delay center optimization
386 04:10:05.240842 INFO : End of read delay center optimization
387 04:10:05.241349 INFO : End of max read latency training
388 04:10:05.246427 INFO : Training has run successfully!
389 04:10:05.246929 1D training succeed
390 04:10:05.255570 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 04:10:05.304049 Check phy result
392 04:10:05.304735 INFO : End of initialization
393 04:10:05.331274 INFO : End of 2D read delay Voltage center optimization
394 04:10:05.355433 INFO : End of 2D read delay Voltage center optimization
395 04:10:05.412169 INFO : End of 2D write delay Voltage center optimization
396 04:10:05.466094 INFO : End of 2D write delay Voltage center optimization
397 04:10:05.471541 INFO : Training has run successfully!
398 04:10:05.472075
399 04:10:05.472522 channel==0
400 04:10:05.477120 RxClkDly_Margin_A0==78 ps 8
401 04:10:05.477618 TxDqDly_Margin_A0==98 ps 10
402 04:10:05.481706 RxClkDly_Margin_A1==69 ps 7
403 04:10:05.482174 TxDqDly_Margin_A1==88 ps 9
404 04:10:05.485953 TrainedVREFDQ_A0==74
405 04:10:05.486420 TrainedVREFDQ_A1==74
406 04:10:05.486853 VrefDac_Margin_A0==24
407 04:10:05.491584 DeviceVref_Margin_A0==40
408 04:10:05.492074 VrefDac_Margin_A1==23
409 04:10:05.497227 DeviceVref_Margin_A1==40
410 04:10:05.497693
411 04:10:05.498129
412 04:10:05.498559 channel==1
413 04:10:05.498983 RxClkDly_Margin_A0==78 ps 8
414 04:10:05.502757 TxDqDly_Margin_A0==98 ps 10
415 04:10:05.503224 RxClkDly_Margin_A1==88 ps 9
416 04:10:05.508337 TxDqDly_Margin_A1==88 ps 9
417 04:10:05.508805 TrainedVREFDQ_A0==78
418 04:10:05.509238 TrainedVREFDQ_A1==75
419 04:10:05.513941 VrefDac_Margin_A0==22
420 04:10:05.514406 DeviceVref_Margin_A0==36
421 04:10:05.519546 VrefDac_Margin_A1==22
422 04:10:05.520031 DeviceVref_Margin_A1==39
423 04:10:05.520461
424 04:10:05.525231 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 04:10:05.525694
426 04:10:05.553281 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
427 04:10:05.558750 2D training succeed
428 04:10:05.564355 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 04:10:05.564855 auto size-- 65535DDR cs0 size: 2048MB
430 04:10:05.569994 DDR cs1 size: 2048MB
431 04:10:05.570555 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 04:10:05.575589 cs0 DataBus test pass
433 04:10:05.576213 cs1 DataBus test pass
434 04:10:05.576696 cs0 AddrBus test pass
435 04:10:05.581279 cs1 AddrBus test pass
436 04:10:05.581758
437 04:10:05.582197 100bdlr_step_size ps== 478
438 04:10:05.582637 result report
439 04:10:05.586735 boot times 0Enable ddr reg access
440 04:10:05.594307 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 04:10:05.608181 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 04:10:06.267688 bl2z: ptr: 05129330, size: 00001e40
443 04:10:06.274790 0.0;M3 CHK:0;cm4_sp_mode 0
444 04:10:06.275349 MVN_1=0x00000000
445 04:10:06.275792 MVN_2=0x00000000
446 04:10:06.286396 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 04:10:06.286957 OPS=0x04
448 04:10:06.287405 ring efuse init
449 04:10:06.291874 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 04:10:06.292474 [0.017354 Inits done]
451 04:10:06.292951 secure task start!
452 04:10:06.299762 high task start!
453 04:10:06.300354 low task start!
454 04:10:06.300832 run into bl31
455 04:10:06.308469 NOTICE: BL31: v1.3(release):4fc40b1
456 04:10:06.316180 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 04:10:06.316743 NOTICE: BL31: G12A normal boot!
458 04:10:06.331712 NOTICE: BL31: BL33 decompress pass
459 04:10:06.337518 ERROR: Error initializing runtime service opteed_fast
460 04:10:09.055620 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 04:10:09.056103 bl2_stage_init 0x01
462 04:10:09.056338 bl2_stage_init 0x81
463 04:10:09.059105 hw id: 0x0000 - pwm id 0x01
464 04:10:09.059404 bl2_stage_init 0xc1
465 04:10:09.059621 bl2_stage_init 0x02
466 04:10:09.059831
467 04:10:09.064582 L0:00000000
468 04:10:09.064927 L1:00000703
469 04:10:09.065151 L2:00008067
470 04:10:09.065361 L3:15000000
471 04:10:09.065566 S1:00000000
472 04:10:09.073590 B2:20282000
473 04:10:09.073960 B1:a0f83180
474 04:10:09.074174
475 04:10:09.074385 TE: 72611
476 04:10:09.074596
477 04:10:09.075562 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 04:10:09.075849
479 04:10:09.081175 Board ID = 1
480 04:10:09.081519 Set cpu clk to 24M
481 04:10:09.081736 Set clk81 to 24M
482 04:10:09.090462 Use GP1_pll as DSU clk.
483 04:10:09.090806 DSU clk: 1200 Mhz
484 04:10:09.091024 CPU clk: 1200 MHz
485 04:10:09.091228 Set clk81 to 166.6M
486 04:10:09.099452 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 04:10:09.099847 board id: 1
488 04:10:09.108400 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 04:10:09.117327 fw parse done
490 04:10:09.120984 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 04:10:09.163541 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 04:10:09.174509 PIEI prepare done
493 04:10:09.174815 fastboot data load
494 04:10:09.175040 fastboot data verify
495 04:10:09.180622 verify result: 266
496 04:10:09.188850 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 04:10:09.189278 LPDDR4 probe
498 04:10:09.189513 ddr clk to 1584MHz
499 04:10:09.193925 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 04:10:09.233325
501 04:10:09.233744 dmc_version 0001
502 04:10:09.242066 Check phy result
503 04:10:09.243468 INFO : End of CA training
504 04:10:09.243732 INFO : End of initialization
505 04:10:09.251016 INFO : Training has run successfully!
506 04:10:09.251384 Check phy result
507 04:10:09.254703 INFO : End of initialization
508 04:10:09.255076 INFO : End of read enable training
509 04:10:09.263700 INFO : End of fine write leveling
510 04:10:09.268769 INFO : End of Write leveling coarse delay
511 04:10:09.269113 INFO : Training has run successfully!
512 04:10:09.269320 Check phy result
513 04:10:09.271472 INFO : End of initialization
514 04:10:09.271762 INFO : End of read dq deskew training
515 04:10:09.278640 INFO : End of MPR read delay center optimization
516 04:10:09.282970 INFO : End of write delay center optimization
517 04:10:09.288354 INFO : End of read delay center optimization
518 04:10:09.289090 INFO : End of max read latency training
519 04:10:09.295680 INFO : Training has run successfully!
520 04:10:09.296414 1D training succeed
521 04:10:09.305368 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 04:10:09.350987 Check phy result
523 04:10:09.351631 INFO : End of initialization
524 04:10:09.375884 INFO : End of 2D read delay Voltage center optimization
525 04:10:09.392318 INFO : End of 2D read delay Voltage center optimization
526 04:10:09.444282 INFO : End of 2D write delay Voltage center optimization
527 04:10:09.493458 INFO : End of 2D write delay Voltage center optimization
528 04:10:09.501577 INFO : Training has run successfully!
529 04:10:09.502220
530 04:10:09.502764 channel==0
531 04:10:09.504442 RxClkDly_Margin_A0==88 ps 9
532 04:10:09.505025 TxDqDly_Margin_A0==98 ps 10
533 04:10:09.510465 RxClkDly_Margin_A1==78 ps 8
534 04:10:09.511051 TxDqDly_Margin_A1==98 ps 10
535 04:10:09.513417 TrainedVREFDQ_A0==74
536 04:10:09.514025 TrainedVREFDQ_A1==75
537 04:10:09.514558 VrefDac_Margin_A0==23
538 04:10:09.519333 DeviceVref_Margin_A0==40
539 04:10:09.520061 VrefDac_Margin_A1==23
540 04:10:09.528245 DeviceVref_Margin_A1==39
541 04:10:09.528839
542 04:10:09.529368
543 04:10:09.529881 channel==1
544 04:10:09.530383 RxClkDly_Margin_A0==88 ps 9
545 04:10:09.531213 TxDqDly_Margin_A0==98 ps 10
546 04:10:09.531750 RxClkDly_Margin_A1==78 ps 8
547 04:10:09.537048 TxDqDly_Margin_A1==88 ps 9
548 04:10:09.537637 TrainedVREFDQ_A0==78
549 04:10:09.538145 TrainedVREFDQ_A1==78
550 04:10:09.541900 VrefDac_Margin_A0==22
551 04:10:09.542480 DeviceVref_Margin_A0==36
552 04:10:09.547093 VrefDac_Margin_A1==22
553 04:10:09.547671 DeviceVref_Margin_A1==36
554 04:10:09.548264
555 04:10:09.552735 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 04:10:09.553403
557 04:10:09.581749 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000060
558 04:10:09.591259 2D training succeed
559 04:10:09.592425 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 04:10:09.593053 auto size-- 65535DDR cs0 size: 2048MB
561 04:10:09.597638 DDR cs1 size: 2048MB
562 04:10:09.598199 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 04:10:09.603280 cs0 DataBus test pass
564 04:10:09.603843 cs1 DataBus test pass
565 04:10:09.604315 cs0 AddrBus test pass
566 04:10:09.608786 cs1 AddrBus test pass
567 04:10:09.609274
568 04:10:09.609691 100bdlr_step_size ps== 478
569 04:10:09.610105 result report
570 04:10:09.614387 boot times 0Enable ddr reg access
571 04:10:09.621967 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 04:10:09.635592 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 04:10:10.290610 bl2z: ptr: 05129330, size: 00001e40
574 04:10:10.297844 0.0;M3 CHK:0;cm4_sp_mode 0
575 04:10:10.298339 MVN_1=0x00000000
576 04:10:10.298755 MVN_2=0x00000000
577 04:10:10.309304 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 04:10:10.309818 OPS=0x04
579 04:10:10.310240 ring efuse init
580 04:10:10.312392 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 04:10:10.318685 [0.017319 Inits done]
582 04:10:10.319227 secure task start!
583 04:10:10.319661 high task start!
584 04:10:10.320156 low task start!
585 04:10:10.322791 run into bl31
586 04:10:10.331399 NOTICE: BL31: v1.3(release):4fc40b1
587 04:10:10.339236 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 04:10:10.339768 NOTICE: BL31: G12A normal boot!
589 04:10:10.354741 NOTICE: BL31: BL33 decompress pass
590 04:10:10.360437 ERROR: Error initializing runtime service opteed_fast
591 04:10:11.752220 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 04:10:11.752641 bl2_stage_init 0x01
593 04:10:11.752856 bl2_stage_init 0x81
594 04:10:11.757791 hw id: 0x0000 - pwm id 0x01
595 04:10:11.758238 bl2_stage_init 0xc1
596 04:10:11.758480 bl2_stage_init 0x02
597 04:10:11.758687
598 04:10:11.763343 L0:00000000
599 04:10:11.763746 L1:00000703
600 04:10:11.764162 L2:00008067
601 04:10:11.764686 L3:15000000
602 04:10:11.765217 S1:00000000
603 04:10:11.765771 B2:20282000
604 04:10:11.766025 B1:a0f83180
605 04:10:11.771300
606 04:10:11.771587 TE: 69958
607 04:10:11.771799
608 04:10:11.776852 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 04:10:11.777258
610 04:10:11.777491 Board ID = 1
611 04:10:11.777696 Set cpu clk to 24M
612 04:10:11.782800 Set clk81 to 24M
613 04:10:11.783370 Use GP1_pll as DSU clk.
614 04:10:11.783797 DSU clk: 1200 Mhz
615 04:10:11.788063 CPU clk: 1200 MHz
616 04:10:11.788531 Set clk81 to 166.6M
617 04:10:11.795525 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 04:10:11.796092 board id: 1
619 04:10:11.803683 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 04:10:11.814542 fw parse done
621 04:10:11.823517 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 04:10:11.864515 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 04:10:11.875360 PIEI prepare done
624 04:10:11.875929 fastboot data load
625 04:10:11.876407 fastboot data verify
626 04:10:11.880432 verify result: 266
627 04:10:11.886198 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 04:10:11.886773 LPDDR4 probe
629 04:10:11.887208 ddr clk to 1584MHz
630 04:10:11.895190 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 04:10:11.931607
632 04:10:11.932245 dmc_version 0001
633 04:10:11.940666 Check phy result
634 04:10:11.945136 INFO : End of CA training
635 04:10:11.945685 INFO : End of initialization
636 04:10:11.950558 INFO : Training has run successfully!
637 04:10:11.951029 Check phy result
638 04:10:11.955673 INFO : End of initialization
639 04:10:11.956247 INFO : End of read enable training
640 04:10:11.962916 INFO : End of fine write leveling
641 04:10:11.966818 INFO : End of Write leveling coarse delay
642 04:10:11.967320 INFO : Training has run successfully!
643 04:10:11.967743 Check phy result
644 04:10:11.976134 INFO : End of initialization
645 04:10:11.976691 INFO : End of read dq deskew training
646 04:10:11.979138 INFO : End of MPR read delay center optimization
647 04:10:11.984580 INFO : End of write delay center optimization
648 04:10:11.989651 INFO : End of read delay center optimization
649 04:10:11.990201 INFO : End of max read latency training
650 04:10:11.994920 INFO : Training has run successfully!
651 04:10:11.995436 1D training succeed
652 04:10:12.004150 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 04:10:12.053022 Check phy result
654 04:10:12.054776 INFO : End of initialization
655 04:10:12.081047 INFO : End of 2D read delay Voltage center optimization
656 04:10:12.104303 INFO : End of 2D read delay Voltage center optimization
657 04:10:12.163381 INFO : End of 2D write delay Voltage center optimization
658 04:10:12.214712 INFO : End of 2D write delay Voltage center optimization
659 04:10:12.221987 INFO : Training has run successfully!
660 04:10:12.222473
661 04:10:12.222892 channel==0
662 04:10:12.225745 RxClkDly_Margin_A0==78 ps 8
663 04:10:12.226205 TxDqDly_Margin_A0==98 ps 10
664 04:10:12.230913 RxClkDly_Margin_A1==88 ps 9
665 04:10:12.231393 TxDqDly_Margin_A1==98 ps 10
666 04:10:12.234669 TrainedVREFDQ_A0==74
667 04:10:12.235128 TrainedVREFDQ_A1==75
668 04:10:12.235545 VrefDac_Margin_A0==24
669 04:10:12.243468 DeviceVref_Margin_A0==40
670 04:10:12.243933 VrefDac_Margin_A1==22
671 04:10:12.245855 DeviceVref_Margin_A1==39
672 04:10:12.246302
673 04:10:12.246709
674 04:10:12.247110 channel==1
675 04:10:12.247505 RxClkDly_Margin_A0==78 ps 8
676 04:10:12.251390 TxDqDly_Margin_A0==98 ps 10
677 04:10:12.251843 RxClkDly_Margin_A1==78 ps 8
678 04:10:12.257586 TxDqDly_Margin_A1==88 ps 9
679 04:10:12.258092 TrainedVREFDQ_A0==78
680 04:10:12.258527 TrainedVREFDQ_A1==75
681 04:10:12.262620 VrefDac_Margin_A0==22
682 04:10:12.263080 DeviceVref_Margin_A0==36
683 04:10:12.270258 VrefDac_Margin_A1==22
684 04:10:12.270719 DeviceVref_Margin_A1==39
685 04:10:12.271131
686 04:10:12.275315 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 04:10:12.275779
688 04:10:12.302287 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000016 dram_vref_reg_value 0x 00000061
689 04:10:12.307369 2D training succeed
690 04:10:12.312972 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 04:10:12.313435 auto size-- 65535DDR cs0 size: 2048MB
692 04:10:12.318583 DDR cs1 size: 2048MB
693 04:10:12.319045 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 04:10:12.324256 cs0 DataBus test pass
695 04:10:12.324716 cs1 DataBus test pass
696 04:10:12.325124 cs0 AddrBus test pass
697 04:10:12.329784 cs1 AddrBus test pass
698 04:10:12.330246
699 04:10:12.330664 100bdlr_step_size ps== 471
700 04:10:12.331078 result report
701 04:10:12.335361 boot times 0Enable ddr reg access
702 04:10:12.342807 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 04:10:12.356670 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 04:10:13.015377 bl2z: ptr: 05129330, size: 00001e40
705 04:10:13.024453 0.0;M3 CHK:0;cm4_sp_mode 0
706 04:10:13.024950 MVN_1=0x00000000
707 04:10:13.025203 MVN_2=0x00000000
708 04:10:13.037006 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 04:10:13.037372 OPS=0x04
710 04:10:13.037609 ring efuse init
711 04:10:13.037827 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 04:10:13.045963 [0.017354 Inits done]
713 04:10:13.046442 secure task start!
714 04:10:13.046798 high task start!
715 04:10:13.047134 low task start!
716 04:10:13.047740 run into bl31
717 04:10:13.055859 NOTICE: BL31: v1.3(release):4fc40b1
718 04:10:13.063728 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 04:10:13.064070 NOTICE: BL31: G12A normal boot!
720 04:10:13.079240 NOTICE: BL31: BL33 decompress pass
721 04:10:13.084880 ERROR: Error initializing runtime service opteed_fast
722 04:10:13.880070
723 04:10:13.880501
724 04:10:13.884402 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 04:10:13.884796
726 04:10:13.888946 Model: Libre Computer AML-S905D3-CC Solitude
727 04:10:14.034932 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 04:10:14.050275 DRAM: 2 GiB (effective 3.8 GiB)
729 04:10:14.281426 Connection closed by foreign host.
731 04:10:14.283541 end: 2.4.2 bootloader-interrupt (duration 00:00:17) [common]
734 04:10:14.285403 end: 2.4 uboot-commands (duration 00:00:17) [common]
736 04:10:14.286723 uboot-action failed: 1 of 1 attempts. 'Connection closed'
738 04:10:14.287710 end: 2 uboot-action (duration 00:00:17) [common]
740 04:10:14.289263 Cleaning after the job
741 04:10:14.289814 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/ramdisk
742 04:10:14.303287 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/kernel
743 04:10:14.337276 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/dtb
744 04:10:14.338057 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/nfsrootfs
745 04:10:14.496402 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938067/tftp-deploy-4bz1x6ep/modules
746 04:10:14.519537 start: 4.1 power-off (timeout 00:00:30) [common]
747 04:10:14.521070 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
748 04:10:14.552811 >> curl: (7) Failed to connect to conserv1.mayfield.sirena.org.uk port 16421 after 3 ms: Couldn't connect to server
749 04:10:14.554722 Returned 7 in 0 seconds
750 04:10:14.555005 Unable to run '['curl', 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01']'
752 04:10:14.555618 end: 4.1 power-off (duration 00:00:00) [common]
754 04:10:14.556392 Failed to run 'finalize': Unable to power-off: 'curl http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix\&port=solitude-01' failed
756 04:10:14.671067 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/938067
757 04:10:16.482457 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/938067
758 04:10:16.483051 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.