Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:21:15.388298 lava-dispatcher, installed at version: 2024.01
2 04:21:15.389079 start: 0 validate
3 04:21:15.389562 Start time: 2024-11-05 04:21:15.389532+00:00 (UTC)
4 04:21:15.390104 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:21:15.390654 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:21:15.435041 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:21:15.435592 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:21:15.467854 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:21:15.468509 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 04:21:15.501685 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:21:15.502181 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:21:15.533792 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:21:15.534270 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:21:15.579589 validate duration: 0.19
16 04:21:15.581154 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:21:15.581809 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:21:15.582416 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:21:15.583373 Not decompressing ramdisk as can be used compressed.
20 04:21:15.584169 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 04:21:15.584705 saving as /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/ramdisk/initrd.cpio.gz
22 04:21:15.585210 total size: 5628169 (5 MB)
23 04:21:15.627234 progress 0 % (0 MB)
24 04:21:15.635690 progress 5 % (0 MB)
25 04:21:15.644308 progress 10 % (0 MB)
26 04:21:15.652152 progress 15 % (0 MB)
27 04:21:15.660206 progress 20 % (1 MB)
28 04:21:15.665623 progress 25 % (1 MB)
29 04:21:15.669584 progress 30 % (1 MB)
30 04:21:15.673533 progress 35 % (1 MB)
31 04:21:15.677084 progress 40 % (2 MB)
32 04:21:15.680954 progress 45 % (2 MB)
33 04:21:15.684497 progress 50 % (2 MB)
34 04:21:15.688387 progress 55 % (2 MB)
35 04:21:15.692276 progress 60 % (3 MB)
36 04:21:15.695734 progress 65 % (3 MB)
37 04:21:15.699640 progress 70 % (3 MB)
38 04:21:15.703139 progress 75 % (4 MB)
39 04:21:15.707094 progress 80 % (4 MB)
40 04:21:15.710616 progress 85 % (4 MB)
41 04:21:15.714370 progress 90 % (4 MB)
42 04:21:15.717981 progress 95 % (5 MB)
43 04:21:15.721349 progress 100 % (5 MB)
44 04:21:15.722036 5 MB downloaded in 0.14 s (39.23 MB/s)
45 04:21:15.722641 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:21:15.723630 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:21:15.724012 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:21:15.724356 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:21:15.724890 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig/gcc-12/kernel/Image
51 04:21:15.725180 saving as /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/kernel/Image
52 04:21:15.725422 total size: 45713920 (43 MB)
53 04:21:15.725656 No compression specified
54 04:21:15.763944 progress 0 % (0 MB)
55 04:21:15.792509 progress 5 % (2 MB)
56 04:21:15.821434 progress 10 % (4 MB)
57 04:21:15.850171 progress 15 % (6 MB)
58 04:21:15.878704 progress 20 % (8 MB)
59 04:21:15.907087 progress 25 % (10 MB)
60 04:21:15.935620 progress 30 % (13 MB)
61 04:21:15.964265 progress 35 % (15 MB)
62 04:21:15.992858 progress 40 % (17 MB)
63 04:21:16.020951 progress 45 % (19 MB)
64 04:21:16.049442 progress 50 % (21 MB)
65 04:21:16.077831 progress 55 % (24 MB)
66 04:21:16.106473 progress 60 % (26 MB)
67 04:21:16.134436 progress 65 % (28 MB)
68 04:21:16.162654 progress 70 % (30 MB)
69 04:21:16.190987 progress 75 % (32 MB)
70 04:21:16.219204 progress 80 % (34 MB)
71 04:21:16.247188 progress 85 % (37 MB)
72 04:21:16.275321 progress 90 % (39 MB)
73 04:21:16.303482 progress 95 % (41 MB)
74 04:21:16.331081 progress 100 % (43 MB)
75 04:21:16.331632 43 MB downloaded in 0.61 s (71.92 MB/s)
76 04:21:16.332127 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:21:16.332947 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:21:16.333222 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:21:16.333488 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:21:16.333945 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 04:21:16.334220 saving as /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/dtb/meson-g12b-a311d-libretech-cc.dtb
83 04:21:16.334431 total size: 54703 (0 MB)
84 04:21:16.334642 No compression specified
85 04:21:16.378020 progress 59 % (0 MB)
86 04:21:16.378930 progress 100 % (0 MB)
87 04:21:16.379519 0 MB downloaded in 0.05 s (1.16 MB/s)
88 04:21:16.380092 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:21:16.380978 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:21:16.381252 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:21:16.381550 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:21:16.382014 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 04:21:16.382275 saving as /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/nfsrootfs/full.rootfs.tar
95 04:21:16.382485 total size: 120894716 (115 MB)
96 04:21:16.382698 Using unxz to decompress xz
97 04:21:16.419687 progress 0 % (0 MB)
98 04:21:17.240252 progress 5 % (5 MB)
99 04:21:18.108223 progress 10 % (11 MB)
100 04:21:18.909312 progress 15 % (17 MB)
101 04:21:19.644400 progress 20 % (23 MB)
102 04:21:20.303731 progress 25 % (28 MB)
103 04:21:21.164885 progress 30 % (34 MB)
104 04:21:21.955286 progress 35 % (40 MB)
105 04:21:22.299133 progress 40 % (46 MB)
106 04:21:22.672077 progress 45 % (51 MB)
107 04:21:23.398712 progress 50 % (57 MB)
108 04:21:24.293342 progress 55 % (63 MB)
109 04:21:25.091162 progress 60 % (69 MB)
110 04:21:25.855894 progress 65 % (74 MB)
111 04:21:26.635559 progress 70 % (80 MB)
112 04:21:27.456781 progress 75 % (86 MB)
113 04:21:28.239896 progress 80 % (92 MB)
114 04:21:29.002007 progress 85 % (98 MB)
115 04:21:29.860450 progress 90 % (103 MB)
116 04:21:30.643116 progress 95 % (109 MB)
117 04:21:31.475821 progress 100 % (115 MB)
118 04:21:31.488242 115 MB downloaded in 15.11 s (7.63 MB/s)
119 04:21:31.489168 end: 1.4.1 http-download (duration 00:00:15) [common]
121 04:21:31.490892 end: 1.4 download-retry (duration 00:00:15) [common]
122 04:21:31.491456 start: 1.5 download-retry (timeout 00:09:44) [common]
123 04:21:31.492070 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 04:21:31.493070 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig/gcc-12/modules.tar.xz
125 04:21:31.493586 saving as /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/modules/modules.tar
126 04:21:31.494034 total size: 11608444 (11 MB)
127 04:21:31.494491 Using unxz to decompress xz
128 04:21:31.542180 progress 0 % (0 MB)
129 04:21:31.620227 progress 5 % (0 MB)
130 04:21:31.713932 progress 10 % (1 MB)
131 04:21:31.832889 progress 15 % (1 MB)
132 04:21:31.924466 progress 20 % (2 MB)
133 04:21:32.002781 progress 25 % (2 MB)
134 04:21:32.077654 progress 30 % (3 MB)
135 04:21:32.150405 progress 35 % (3 MB)
136 04:21:32.225984 progress 40 % (4 MB)
137 04:21:32.301371 progress 45 % (5 MB)
138 04:21:32.383934 progress 50 % (5 MB)
139 04:21:32.459890 progress 55 % (6 MB)
140 04:21:32.544216 progress 60 % (6 MB)
141 04:21:32.623956 progress 65 % (7 MB)
142 04:21:32.699281 progress 70 % (7 MB)
143 04:21:32.779590 progress 75 % (8 MB)
144 04:21:32.862067 progress 80 % (8 MB)
145 04:21:32.940618 progress 85 % (9 MB)
146 04:21:33.017982 progress 90 % (9 MB)
147 04:21:33.094503 progress 95 % (10 MB)
148 04:21:33.170246 progress 100 % (11 MB)
149 04:21:33.181226 11 MB downloaded in 1.69 s (6.56 MB/s)
150 04:21:33.182064 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:21:33.183624 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:21:33.184184 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 04:21:33.184704 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 04:21:49.689610 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/938007/extract-nfsrootfs-hlyunuye
156 04:21:49.690219 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 04:21:49.690507 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 04:21:49.691161 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx
159 04:21:49.691708 makedir: /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin
160 04:21:49.692082 makedir: /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/tests
161 04:21:49.692402 makedir: /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/results
162 04:21:49.692736 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-add-keys
163 04:21:49.693263 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-add-sources
164 04:21:49.693763 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-background-process-start
165 04:21:49.694267 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-background-process-stop
166 04:21:49.694797 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-common-functions
167 04:21:49.695286 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-echo-ipv4
168 04:21:49.695768 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-install-packages
169 04:21:49.696304 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-installed-packages
170 04:21:49.696842 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-os-build
171 04:21:49.697336 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-probe-channel
172 04:21:49.697812 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-probe-ip
173 04:21:49.698273 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-target-ip
174 04:21:49.698757 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-target-mac
175 04:21:49.699256 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-target-storage
176 04:21:49.699736 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-test-case
177 04:21:49.700237 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-test-event
178 04:21:49.700712 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-test-feedback
179 04:21:49.701176 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-test-raise
180 04:21:49.701640 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-test-reference
181 04:21:49.702109 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-test-runner
182 04:21:49.702598 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-test-set
183 04:21:49.703113 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-test-shell
184 04:21:49.703600 Updating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-add-keys (debian)
185 04:21:49.704148 Updating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-add-sources (debian)
186 04:21:49.704677 Updating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-install-packages (debian)
187 04:21:49.705174 Updating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-installed-packages (debian)
188 04:21:49.705657 Updating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/bin/lava-os-build (debian)
189 04:21:49.706081 Creating /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/environment
190 04:21:49.706456 LAVA metadata
191 04:21:49.706715 - LAVA_JOB_ID=938007
192 04:21:49.706931 - LAVA_DISPATCHER_IP=192.168.6.2
193 04:21:49.707297 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 04:21:49.708276 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 04:21:49.708593 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 04:21:49.708802 skipped lava-vland-overlay
197 04:21:49.709043 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 04:21:49.709297 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 04:21:49.709515 skipped lava-multinode-overlay
200 04:21:49.709757 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 04:21:49.710006 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 04:21:49.710249 Loading test definitions
203 04:21:49.710522 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 04:21:49.710741 Using /lava-938007 at stage 0
205 04:21:49.711826 uuid=938007_1.6.2.4.1 testdef=None
206 04:21:49.712157 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 04:21:49.712420 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 04:21:49.713984 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 04:21:49.714768 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 04:21:49.716722 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 04:21:49.717544 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 04:21:49.719358 runner path: /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/0/tests/0_timesync-off test_uuid 938007_1.6.2.4.1
215 04:21:49.719897 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 04:21:49.720738 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 04:21:49.720960 Using /lava-938007 at stage 0
219 04:21:49.721312 Fetching tests from https://github.com/kernelci/test-definitions.git
220 04:21:49.721602 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/0/tests/1_kselftest-dt'
221 04:21:53.034262 Running '/usr/bin/git checkout kernelci.org
222 04:21:53.063652 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 04:21:53.065096 uuid=938007_1.6.2.4.5 testdef=None
224 04:21:53.065446 end: 1.6.2.4.5 git-repo-action (duration 00:00:03) [common]
226 04:21:53.066195 start: 1.6.2.4.6 test-overlay (timeout 00:09:23) [common]
227 04:21:53.069070 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 04:21:53.069897 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:23) [common]
230 04:21:53.073705 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 04:21:53.074565 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:23) [common]
233 04:21:53.079567 runner path: /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/0/tests/1_kselftest-dt test_uuid 938007_1.6.2.4.5
234 04:21:53.080102 BOARD='meson-g12b-a311d-libretech-cc'
235 04:21:53.080321 BRANCH='mainline'
236 04:21:53.080519 SKIPFILE='/dev/null'
237 04:21:53.080716 SKIP_INSTALL='True'
238 04:21:53.080913 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 04:21:53.081125 TST_CASENAME=''
240 04:21:53.081322 TST_CMDFILES='dt'
241 04:21:53.081897 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 04:21:53.082698 Creating lava-test-runner.conf files
244 04:21:53.082902 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/938007/lava-overlay-_g_gmjcx/lava-938007/0 for stage 0
245 04:21:53.083260 - 0_timesync-off
246 04:21:53.083503 - 1_kselftest-dt
247 04:21:53.083838 end: 1.6.2.4 test-definition (duration 00:00:03) [common]
248 04:21:53.084148 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 04:22:16.385081 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 04:22:16.385544 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 04:22:16.385829 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 04:22:16.386168 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 04:22:16.386460 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 04:22:17.075283 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 04:22:17.075758 start: 1.6.4 extract-modules (timeout 00:08:59) [common]
256 04:22:17.076044 extracting modules file /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/938007/extract-nfsrootfs-hlyunuye
257 04:22:18.484323 extracting modules file /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/938007/extract-overlay-ramdisk-_wusz_df/ramdisk
258 04:22:20.142635 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 04:22:20.143189 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 04:22:20.143537 [common] Applying overlay to NFS
261 04:22:20.143799 [common] Applying overlay /var/lib/lava/dispatcher/tmp/938007/compress-overlay-mvje_zha/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/938007/extract-nfsrootfs-hlyunuye
262 04:22:23.464087 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 04:22:23.464668 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 04:22:23.465006 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 04:22:23.465291 Converting downloaded kernel to a uImage
266 04:22:23.465673 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/kernel/Image /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/kernel/uImage
267 04:22:23.958107 output: Image Name:
268 04:22:23.958526 output: Created: Tue Nov 5 04:22:23 2024
269 04:22:23.958736 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 04:22:23.958943 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 04:22:23.959146 output: Load Address: 01080000
272 04:22:23.959347 output: Entry Point: 01080000
273 04:22:23.959547 output:
274 04:22:23.959879 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 04:22:23.960192 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 04:22:23.960469 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 04:22:23.960726 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 04:22:23.960989 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 04:22:23.961247 Building ramdisk /var/lib/lava/dispatcher/tmp/938007/extract-overlay-ramdisk-_wusz_df/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/938007/extract-overlay-ramdisk-_wusz_df/ramdisk
280 04:22:26.114299 >> 166825 blocks
281 04:22:33.863516 Adding RAMdisk u-boot header.
282 04:22:33.863971 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/938007/extract-overlay-ramdisk-_wusz_df/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/938007/extract-overlay-ramdisk-_wusz_df/ramdisk.cpio.gz.uboot
283 04:22:34.165204 output: Image Name:
284 04:22:34.165631 output: Created: Tue Nov 5 04:22:33 2024
285 04:22:34.165870 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 04:22:34.166087 output: Data Size: 23432953 Bytes = 22883.74 KiB = 22.35 MiB
287 04:22:34.166298 output: Load Address: 00000000
288 04:22:34.166504 output: Entry Point: 00000000
289 04:22:34.166707 output:
290 04:22:34.167404 rename /var/lib/lava/dispatcher/tmp/938007/extract-overlay-ramdisk-_wusz_df/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/ramdisk/ramdisk.cpio.gz.uboot
291 04:22:34.167843 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 04:22:34.168199 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 04:22:34.168502 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 04:22:34.168762 No LXC device requested
295 04:22:34.169042 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 04:22:34.169322 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 04:22:34.169592 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 04:22:34.169818 Checking files for TFTP limit of 4294967296 bytes.
299 04:22:34.171263 end: 1 tftp-deploy (duration 00:01:19) [common]
300 04:22:34.171591 start: 2 uboot-action (timeout 00:05:00) [common]
301 04:22:34.171886 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 04:22:34.172224 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 04:22:34.172511 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 04:22:34.172810 Using kernel file from prepare-kernel: 938007/tftp-deploy-4c8t298_/kernel/uImage
305 04:22:34.173159 substitutions:
306 04:22:34.173385 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 04:22:34.173600 - {DTB_ADDR}: 0x01070000
308 04:22:34.173810 - {DTB}: 938007/tftp-deploy-4c8t298_/dtb/meson-g12b-a311d-libretech-cc.dtb
309 04:22:34.174024 - {INITRD}: 938007/tftp-deploy-4c8t298_/ramdisk/ramdisk.cpio.gz.uboot
310 04:22:34.174233 - {KERNEL_ADDR}: 0x01080000
311 04:22:34.174439 - {KERNEL}: 938007/tftp-deploy-4c8t298_/kernel/uImage
312 04:22:34.174646 - {LAVA_MAC}: None
313 04:22:34.174878 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/938007/extract-nfsrootfs-hlyunuye
314 04:22:34.175091 - {NFS_SERVER_IP}: 192.168.6.2
315 04:22:34.175297 - {PRESEED_CONFIG}: None
316 04:22:34.175505 - {PRESEED_LOCAL}: None
317 04:22:34.175711 - {RAMDISK_ADDR}: 0x08000000
318 04:22:34.175914 - {RAMDISK}: 938007/tftp-deploy-4c8t298_/ramdisk/ramdisk.cpio.gz.uboot
319 04:22:34.176153 - {ROOT_PART}: None
320 04:22:34.176363 - {ROOT}: None
321 04:22:34.176566 - {SERVER_IP}: 192.168.6.2
322 04:22:34.176768 - {TEE_ADDR}: 0x83000000
323 04:22:34.176972 - {TEE}: None
324 04:22:34.177176 Parsed boot commands:
325 04:22:34.177375 - setenv autoload no
326 04:22:34.177579 - setenv initrd_high 0xffffffff
327 04:22:34.177780 - setenv fdt_high 0xffffffff
328 04:22:34.177980 - dhcp
329 04:22:34.178180 - setenv serverip 192.168.6.2
330 04:22:34.178386 - tftpboot 0x01080000 938007/tftp-deploy-4c8t298_/kernel/uImage
331 04:22:34.178591 - tftpboot 0x08000000 938007/tftp-deploy-4c8t298_/ramdisk/ramdisk.cpio.gz.uboot
332 04:22:34.178795 - tftpboot 0x01070000 938007/tftp-deploy-4c8t298_/dtb/meson-g12b-a311d-libretech-cc.dtb
333 04:22:34.179000 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/938007/extract-nfsrootfs-hlyunuye,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 04:22:34.179210 - bootm 0x01080000 0x08000000 0x01070000
335 04:22:34.179488 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 04:22:34.180332 start: 2.3 connect-device (timeout 00:05:00) [common]
338 04:22:34.180573 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 04:22:34.194205 Setting prompt string to ['lava-test: # ']
340 04:22:34.195765 end: 2.3 connect-device (duration 00:00:00) [common]
341 04:22:34.196425 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 04:22:34.197068 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 04:22:34.197680 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 04:22:34.198841 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 04:22:34.240939 >> OK - accepted request
346 04:22:34.243261 Returned 0 in 0 seconds
347 04:22:34.344341 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 04:22:34.345898 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 04:22:34.346460 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 04:22:34.346967 Setting prompt string to ['Hit any key to stop autoboot']
352 04:22:34.347418 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 04:22:34.348988 Trying 192.168.56.21...
354 04:22:34.349464 Connected to conserv1.
355 04:22:34.349872 Escape character is '^]'.
356 04:22:34.350280
357 04:22:34.350693 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 04:22:34.351107
359 04:22:45.787209 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 04:22:45.787656 bl2_stage_init 0x01
361 04:22:45.787915 bl2_stage_init 0x81
362 04:22:45.792560 hw id: 0x0000 - pwm id 0x01
363 04:22:45.792994 bl2_stage_init 0xc1
364 04:22:45.793265 bl2_stage_init 0x02
365 04:22:45.793509
366 04:22:45.798172 L0:00000000
367 04:22:45.798616 L1:20000703
368 04:22:45.798881 L2:00008067
369 04:22:45.799145 L3:14000000
370 04:22:45.803828 B2:00402000
371 04:22:45.805436 B1:e0f83180
372 04:22:45.805780
373 04:22:45.806060 TE: 58124
374 04:22:45.808697
375 04:22:45.811200 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 04:22:45.811791
377 04:22:45.816902 Board ID = 1
378 04:22:45.818192 Set A53 clk to 24M
379 04:22:45.818561 Set A73 clk to 24M
380 04:22:45.818793 Set clk81 to 24M
381 04:22:45.820702 A53 clk: 1200 MHz
382 04:22:45.821086 A73 clk: 1200 MHz
383 04:22:45.821316 CLK81: 166.6M
384 04:22:45.821530 smccc: 00012a92
385 04:22:45.826235 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 04:22:45.831853 board id: 1
387 04:22:45.837677 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 04:22:45.848395 fw parse done
389 04:22:45.854326 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 04:22:45.897061 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 04:22:45.908029 PIEI prepare done
392 04:22:45.908490 fastboot data load
393 04:22:45.908749 fastboot data verify
394 04:22:45.913519 verify result: 266
395 04:22:45.919056 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 04:22:45.919440 LPDDR4 probe
397 04:22:45.919653 ddr clk to 1584MHz
398 04:22:45.927094 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 04:22:45.964493
400 04:22:45.964930 dmc_version 0001
401 04:22:45.970938 Check phy result
402 04:22:45.976875 INFO : End of CA training
403 04:22:45.977423 INFO : End of initialization
404 04:22:45.982448 INFO : Training has run successfully!
405 04:22:45.982842 Check phy result
406 04:22:45.988704 INFO : End of initialization
407 04:22:45.989091 INFO : End of read enable training
408 04:22:45.993693 INFO : End of fine write leveling
409 04:22:45.999313 INFO : End of Write leveling coarse delay
410 04:22:45.999913 INFO : Training has run successfully!
411 04:22:46.000422 Check phy result
412 04:22:46.005019 INFO : End of initialization
413 04:22:46.005625 INFO : End of read dq deskew training
414 04:22:46.010613 INFO : End of MPR read delay center optimization
415 04:22:46.016393 INFO : End of write delay center optimization
416 04:22:46.021834 INFO : End of read delay center optimization
417 04:22:46.022481 INFO : End of max read latency training
418 04:22:46.027491 INFO : Training has run successfully!
419 04:22:46.028184 1D training succeed
420 04:22:46.036609 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 04:22:46.084558 Check phy result
422 04:22:46.085534 INFO : End of initialization
423 04:22:46.106674 INFO : End of 2D read delay Voltage center optimization
424 04:22:46.128898 INFO : End of 2D read delay Voltage center optimization
425 04:22:46.179543 INFO : End of 2D write delay Voltage center optimization
426 04:22:46.228443 INFO : End of 2D write delay Voltage center optimization
427 04:22:46.233866 INFO : Training has run successfully!
428 04:22:46.234343
429 04:22:46.234753 channel==0
430 04:22:46.239338 RxClkDly_Margin_A0==88 ps 9
431 04:22:46.239847 TxDqDly_Margin_A0==98 ps 10
432 04:22:46.242673 RxClkDly_Margin_A1==88 ps 9
433 04:22:46.243152 TxDqDly_Margin_A1==98 ps 10
434 04:22:46.248325 TrainedVREFDQ_A0==74
435 04:22:46.248947 TrainedVREFDQ_A1==74
436 04:22:46.254183 VrefDac_Margin_A0==24
437 04:22:46.254769 DeviceVref_Margin_A0==40
438 04:22:46.255214 VrefDac_Margin_A1==25
439 04:22:46.259500 DeviceVref_Margin_A1==40
440 04:22:46.259907
441 04:22:46.260209
442 04:22:46.260446 channel==1
443 04:22:46.260658 RxClkDly_Margin_A0==98 ps 10
444 04:22:46.265369 TxDqDly_Margin_A0==98 ps 10
445 04:22:46.266030 RxClkDly_Margin_A1==88 ps 9
446 04:22:46.270808 TxDqDly_Margin_A1==88 ps 9
447 04:22:46.271196 TrainedVREFDQ_A0==77
448 04:22:46.271420 TrainedVREFDQ_A1==77
449 04:22:46.276501 VrefDac_Margin_A0==22
450 04:22:46.276914 DeviceVref_Margin_A0==37
451 04:22:46.282055 VrefDac_Margin_A1==24
452 04:22:46.282455 DeviceVref_Margin_A1==37
453 04:22:46.282689
454 04:22:46.287836 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 04:22:46.288396
456 04:22:46.315649 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000017 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
457 04:22:46.321165 2D training succeed
458 04:22:46.326635 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 04:22:46.327124 auto size-- 65535DDR cs0 size: 2048MB
460 04:22:46.332229 DDR cs1 size: 2048MB
461 04:22:46.332695 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 04:22:46.337854 cs0 DataBus test pass
463 04:22:46.338410 cs1 DataBus test pass
464 04:22:46.338843 cs0 AddrBus test pass
465 04:22:46.343452 cs1 AddrBus test pass
466 04:22:46.343914
467 04:22:46.344376 100bdlr_step_size ps== 420
468 04:22:46.344801 result report
469 04:22:46.349044 boot times 0Enable ddr reg access
470 04:22:46.356929 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 04:22:46.370213 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 04:22:46.943924 0.0;M3 CHK:0;cm4_sp_mode 0
473 04:22:46.944653 MVN_1=0x00000000
474 04:22:46.949517 MVN_2=0x00000000
475 04:22:46.955246 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 04:22:46.955739 OPS=0x10
477 04:22:46.956188 ring efuse init
478 04:22:46.956595 chipver efuse init
479 04:22:46.960810 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 04:22:46.966543 [0.018961 Inits done]
481 04:22:46.967140 secure task start!
482 04:22:46.967550 high task start!
483 04:22:46.972232 low task start!
484 04:22:46.972809 run into bl31
485 04:22:46.977494 NOTICE: BL31: v1.3(release):4fc40b1
486 04:22:46.985254 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 04:22:46.985725 NOTICE: BL31: G12A normal boot!
488 04:22:47.010684 NOTICE: BL31: BL33 decompress pass
489 04:22:47.016297 ERROR: Error initializing runtime service opteed_fast
490 04:22:48.249199
491 04:22:48.249817
492 04:22:48.257529 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 04:22:48.257987
494 04:22:48.258406 Model: Libre Computer AML-A311D-CC Alta
495 04:22:48.466038 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 04:22:48.489308 DRAM: 2 GiB (effective 3.8 GiB)
497 04:22:48.632353 Core: 408 devices, 31 uclasses, devicetree: separate
498 04:22:48.638312 WDT: Not starting watchdog@f0d0
499 04:22:48.670472 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 04:22:48.682930 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 04:22:48.687899 ** Bad device specification mmc 0 **
502 04:22:48.698273 Card did not respond to voltage select! : -110
503 04:22:48.705871 ** Bad device specification mmc 0 **
504 04:22:48.706324 Couldn't find partition mmc 0
505 04:22:48.714182 Card did not respond to voltage select! : -110
506 04:22:48.719719 ** Bad device specification mmc 0 **
507 04:22:48.720199 Couldn't find partition mmc 0
508 04:22:48.724774 Error: could not access storage.
509 04:22:49.987327 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 04:22:49.987740 bl2_stage_init 0x01
511 04:22:49.987969 bl2_stage_init 0x81
512 04:22:49.992830 hw id: 0x0000 - pwm id 0x01
513 04:22:49.993280 bl2_stage_init 0xc1
514 04:22:49.993532 bl2_stage_init 0x02
515 04:22:49.993749
516 04:22:49.998394 L0:00000000
517 04:22:49.998868 L1:20000703
518 04:22:49.999285 L2:00008067
519 04:22:49.999715 L3:14000000
520 04:22:50.004059 B2:00402000
521 04:22:50.004534 B1:e0f83180
522 04:22:50.004960
523 04:22:50.005274 TE: 58124
524 04:22:50.005492
525 04:22:50.009674 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 04:22:50.010183
527 04:22:50.010619 Board ID = 1
528 04:22:50.015216 Set A53 clk to 24M
529 04:22:50.015523 Set A73 clk to 24M
530 04:22:50.015945 Set clk81 to 24M
531 04:22:50.020851 A53 clk: 1200 MHz
532 04:22:50.021314 A73 clk: 1200 MHz
533 04:22:50.021722 CLK81: 166.6M
534 04:22:50.022137 smccc: 00012a92
535 04:22:50.026430 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 04:22:50.032093 board id: 1
537 04:22:50.038031 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 04:22:50.048680 fw parse done
539 04:22:50.054561 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 04:22:50.097223 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 04:22:50.108125 PIEI prepare done
542 04:22:50.108600 fastboot data load
543 04:22:50.109026 fastboot data verify
544 04:22:50.113729 verify result: 266
545 04:22:50.119319 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 04:22:50.119621 LPDDR4 probe
547 04:22:50.120079 ddr clk to 1584MHz
548 04:22:50.127343 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 04:22:50.164645
550 04:22:50.165224 dmc_version 0001
551 04:22:50.171208 Check phy result
552 04:22:50.177067 INFO : End of CA training
553 04:22:50.177518 INFO : End of initialization
554 04:22:50.182721 INFO : Training has run successfully!
555 04:22:50.183177 Check phy result
556 04:22:50.188409 INFO : End of initialization
557 04:22:50.188872 INFO : End of read enable training
558 04:22:50.193958 INFO : End of fine write leveling
559 04:22:50.199553 INFO : End of Write leveling coarse delay
560 04:22:50.199872 INFO : Training has run successfully!
561 04:22:50.200318 Check phy result
562 04:22:50.206157 INFO : End of initialization
563 04:22:50.206623 INFO : End of read dq deskew training
564 04:22:50.211028 INFO : End of MPR read delay center optimization
565 04:22:50.218048 INFO : End of write delay center optimization
566 04:22:50.221999 INFO : End of read delay center optimization
567 04:22:50.222268 INFO : End of max read latency training
568 04:22:50.227604 INFO : Training has run successfully!
569 04:22:50.227907 1D training succeed
570 04:22:50.236680 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 04:22:50.284375 Check phy result
572 04:22:50.284806 INFO : End of initialization
573 04:22:50.305999 INFO : End of 2D read delay Voltage center optimization
574 04:22:50.326090 INFO : End of 2D read delay Voltage center optimization
575 04:22:50.378044 INFO : End of 2D write delay Voltage center optimization
576 04:22:50.427614 INFO : End of 2D write delay Voltage center optimization
577 04:22:50.432760 INFO : Training has run successfully!
578 04:22:50.433239
579 04:22:50.433504 channel==0
580 04:22:50.438371 RxClkDly_Margin_A0==88 ps 9
581 04:22:50.438725 TxDqDly_Margin_A0==98 ps 10
582 04:22:50.441627 RxClkDly_Margin_A1==88 ps 9
583 04:22:50.442122 TxDqDly_Margin_A1==98 ps 10
584 04:22:50.447221 TrainedVREFDQ_A0==74
585 04:22:50.447734 TrainedVREFDQ_A1==74
586 04:22:50.448044 VrefDac_Margin_A0==25
587 04:22:50.452835 DeviceVref_Margin_A0==40
588 04:22:50.453343 VrefDac_Margin_A1==25
589 04:22:50.458467 DeviceVref_Margin_A1==40
590 04:22:50.458937
591 04:22:50.459364
592 04:22:50.459775 channel==1
593 04:22:50.460222 RxClkDly_Margin_A0==98 ps 10
594 04:22:50.464043 TxDqDly_Margin_A0==88 ps 9
595 04:22:50.464495 RxClkDly_Margin_A1==88 ps 9
596 04:22:50.469626 TxDqDly_Margin_A1==88 ps 9
597 04:22:50.470124 TrainedVREFDQ_A0==76
598 04:22:50.470544 TrainedVREFDQ_A1==77
599 04:22:50.475229 VrefDac_Margin_A0==22
600 04:22:50.475575 DeviceVref_Margin_A0==38
601 04:22:50.480838 VrefDac_Margin_A1==24
602 04:22:50.481349 DeviceVref_Margin_A1==37
603 04:22:50.481697
604 04:22:50.486516 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 04:22:50.486918
606 04:22:50.514579 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
607 04:22:50.520226 2D training succeed
608 04:22:50.525760 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 04:22:50.526148 auto size-- 65535DDR cs0 size: 2048MB
610 04:22:50.531284 DDR cs1 size: 2048MB
611 04:22:50.531656 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 04:22:50.536892 cs0 DataBus test pass
613 04:22:50.537260 cs1 DataBus test pass
614 04:22:50.537496 cs0 AddrBus test pass
615 04:22:50.542513 cs1 AddrBus test pass
616 04:22:50.542802
617 04:22:50.543030 100bdlr_step_size ps== 420
618 04:22:50.543252 result report
619 04:22:50.548060 boot times 0Enable ddr reg access
620 04:22:50.555642 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 04:22:50.569110 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 04:22:51.141138 0.0;M3 CHK:0;cm4_sp_mode 0
623 04:22:51.141837 MVN_1=0x00000000
624 04:22:51.146552 MVN_2=0x00000000
625 04:22:51.152338 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 04:22:51.152883 OPS=0x10
627 04:22:51.153351 ring efuse init
628 04:22:51.153834 chipver efuse init
629 04:22:51.157938 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 04:22:51.163541 [0.018960 Inits done]
631 04:22:51.164063 secure task start!
632 04:22:51.164506 high task start!
633 04:22:51.168091 low task start!
634 04:22:51.168558 run into bl31
635 04:22:51.174828 NOTICE: BL31: v1.3(release):4fc40b1
636 04:22:51.182663 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 04:22:51.183173 NOTICE: BL31: G12A normal boot!
638 04:22:51.207963 NOTICE: BL31: BL33 decompress pass
639 04:22:51.213654 ERROR: Error initializing runtime service opteed_fast
640 04:22:52.446807
641 04:22:52.447248
642 04:22:52.455063 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 04:22:52.455496
644 04:22:52.455838 Model: Libre Computer AML-A311D-CC Alta
645 04:22:52.663555 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 04:22:52.686905 DRAM: 2 GiB (effective 3.8 GiB)
647 04:22:52.830041 Core: 408 devices, 31 uclasses, devicetree: separate
648 04:22:52.835734 WDT: Not starting watchdog@f0d0
649 04:22:52.868043 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 04:22:52.881435 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 04:22:52.885587 ** Bad device specification mmc 0 **
652 04:22:52.895922 Card did not respond to voltage select! : -110
653 04:22:52.903520 ** Bad device specification mmc 0 **
654 04:22:52.904185 Couldn't find partition mmc 0
655 04:22:52.911832 Card did not respond to voltage select! : -110
656 04:22:52.917247 ** Bad device specification mmc 0 **
657 04:22:52.917805 Couldn't find partition mmc 0
658 04:22:52.922312 Error: could not access storage.
659 04:22:53.264835 Net: eth0: ethernet@ff3f0000
660 04:22:53.265501 starting USB...
661 04:22:53.516821 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 04:22:53.517513 Starting the controller
663 04:22:53.523649 USB XHCI 1.10
664 04:22:55.209425 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
665 04:22:55.210122 bl2_stage_init 0x81
666 04:22:55.214909 hw id: 0x0000 - pwm id 0x01
667 04:22:55.215416 bl2_stage_init 0xc1
668 04:22:55.215877 bl2_stage_init 0x02
669 04:22:55.216400
670 04:22:55.220548 L0:00000000
671 04:22:55.221040 L1:20000703
672 04:22:55.221493 L2:00008067
673 04:22:55.221943 L3:14000000
674 04:22:55.222386 B2:00402000
675 04:22:55.226193 B1:e0f83180
676 04:22:55.226684
677 04:22:55.227142 TE: 58150
678 04:22:55.227595
679 04:22:55.231695 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
680 04:22:55.232227
681 04:22:55.232686 Board ID = 1
682 04:22:55.237309 Set A53 clk to 24M
683 04:22:55.237798 Set A73 clk to 24M
684 04:22:55.238267 Set clk81 to 24M
685 04:22:55.242851 A53 clk: 1200 MHz
686 04:22:55.243356 A73 clk: 1200 MHz
687 04:22:55.243808 CLK81: 166.6M
688 04:22:55.244293 smccc: 00012aab
689 04:22:55.248540 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
690 04:22:55.254209 board id: 1
691 04:22:55.259026 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
692 04:22:55.270472 fw parse done
693 04:22:55.276413 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 04:22:55.319044 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
695 04:22:55.329985 PIEI prepare done
696 04:22:55.330476 fastboot data load
697 04:22:55.330932 fastboot data verify
698 04:22:55.335598 verify result: 266
699 04:22:55.341198 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
700 04:22:55.341694 LPDDR4 probe
701 04:22:55.342146 ddr clk to 1584MHz
702 04:22:55.349267 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
703 04:22:55.386488
704 04:22:55.386991 dmc_version 0001
705 04:22:55.393145 Check phy result
706 04:22:55.399062 INFO : End of CA training
707 04:22:55.399550 INFO : End of initialization
708 04:22:55.404601 INFO : Training has run successfully!
709 04:22:55.405090 Check phy result
710 04:22:55.410175 INFO : End of initialization
711 04:22:55.410654 INFO : End of read enable training
712 04:22:55.415771 INFO : End of fine write leveling
713 04:22:55.421406 INFO : End of Write leveling coarse delay
714 04:22:55.421891 INFO : Training has run successfully!
715 04:22:55.422341 Check phy result
716 04:22:55.427031 INFO : End of initialization
717 04:22:55.427517 INFO : End of read dq deskew training
718 04:22:55.432592 INFO : End of MPR read delay center optimization
719 04:22:55.438191 INFO : End of write delay center optimization
720 04:22:55.443785 INFO : End of read delay center optimization
721 04:22:55.444322 INFO : End of max read latency training
722 04:22:55.449412 INFO : Training has run successfully!
723 04:22:55.449899 1D training succeed
724 04:22:55.458590 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
725 04:22:55.506207 Check phy result
726 04:22:55.506739 INFO : End of initialization
727 04:22:55.528770 INFO : End of 2D read delay Voltage center optimization
728 04:22:55.549002 INFO : End of 2D read delay Voltage center optimization
729 04:22:55.601020 INFO : End of 2D write delay Voltage center optimization
730 04:22:55.650403 INFO : End of 2D write delay Voltage center optimization
731 04:22:55.655931 INFO : Training has run successfully!
732 04:22:55.656473
733 04:22:55.656929 channel==0
734 04:22:55.661533 RxClkDly_Margin_A0==88 ps 9
735 04:22:55.662025 TxDqDly_Margin_A0==98 ps 10
736 04:22:55.664849 RxClkDly_Margin_A1==88 ps 9
737 04:22:55.665332 TxDqDly_Margin_A1==98 ps 10
738 04:22:55.670454 TrainedVREFDQ_A0==74
739 04:22:55.670982 TrainedVREFDQ_A1==74
740 04:22:55.671441 VrefDac_Margin_A0==24
741 04:22:55.676090 DeviceVref_Margin_A0==40
742 04:22:55.676583 VrefDac_Margin_A1==25
743 04:22:55.681634 DeviceVref_Margin_A1==40
744 04:22:55.682115
745 04:22:55.682568
746 04:22:55.683013 channel==1
747 04:22:55.683454 RxClkDly_Margin_A0==98 ps 10
748 04:22:55.687228 TxDqDly_Margin_A0==98 ps 10
749 04:22:55.687716 RxClkDly_Margin_A1==98 ps 10
750 04:22:55.692821 TxDqDly_Margin_A1==88 ps 9
751 04:22:55.693307 TrainedVREFDQ_A0==77
752 04:22:55.693756 TrainedVREFDQ_A1==77
753 04:22:55.698464 VrefDac_Margin_A0==22
754 04:22:55.698948 DeviceVref_Margin_A0==37
755 04:22:55.704161 VrefDac_Margin_A1==22
756 04:22:55.704676 DeviceVref_Margin_A1==37
757 04:22:55.705123
758 04:22:55.709711 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
759 04:22:55.710207
760 04:22:55.737681 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000018 00000018 00000016 00000018 00000016 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
761 04:22:55.743253 2D training succeed
762 04:22:55.748855 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
763 04:22:55.749349 auto size-- 65535DDR cs0 size: 2048MB
764 04:22:55.754463 DDR cs1 size: 2048MB
765 04:22:55.754950 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
766 04:22:55.760140 cs0 DataBus test pass
767 04:22:55.760628 cs1 DataBus test pass
768 04:22:55.761074 cs0 AddrBus test pass
769 04:22:55.765638 cs1 AddrBus test pass
770 04:22:55.766120
771 04:22:55.766566 100bdlr_step_size ps== 420
772 04:22:55.767015 result report
773 04:22:55.771269 boot times 0Enable ddr reg access
774 04:22:55.778991 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
775 04:22:55.792433 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
776 04:22:56.366206 0.0;M3 CHK:0;cm4_sp_mode 0
777 04:22:56.366804 MVN_1=0x00000000
778 04:22:56.371672 MVN_2=0x00000000
779 04:22:56.377355 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
780 04:22:56.377676 OPS=0x10
781 04:22:56.377899 ring efuse init
782 04:22:56.378106 chipver efuse init
783 04:22:56.383022 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
784 04:22:56.388576 [0.018961 Inits done]
785 04:22:56.388855 secure task start!
786 04:22:56.389069 high task start!
787 04:22:56.393225 low task start!
788 04:22:56.393511 run into bl31
789 04:22:56.399850 NOTICE: BL31: v1.3(release):4fc40b1
790 04:22:56.407641 NOTICE: BL31: Built : 15:58:17, May 22 2019
791 04:22:56.407931 NOTICE: BL31: G12A normal boot!
792 04:22:56.433074 NOTICE: BL31: BL33 decompress pass
793 04:22:56.438745 ERROR: Error initializing runtime service opteed_fast
794 04:22:57.671624
795 04:22:57.672100
796 04:22:57.679944 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
797 04:22:57.680371
798 04:22:57.680705 Model: Libre Computer AML-A311D-CC Alta
799 04:22:57.888405 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
800 04:22:57.911767 DRAM: 2 GiB (effective 3.8 GiB)
801 04:22:58.054761 Core: 408 devices, 31 uclasses, devicetree: separate
802 04:22:58.060656 WDT: Not starting watchdog@f0d0
803 04:22:58.092928 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
804 04:22:58.105395 Loading Environment from FAT... Card did not respond to voltage select! : -110
805 04:22:58.110365 ** Bad device specification mmc 0 **
806 04:22:58.120677 Card did not respond to voltage select! : -110
807 04:22:58.128349 ** Bad device specification mmc 0 **
808 04:22:58.128656 Couldn't find partition mmc 0
809 04:22:58.136678 Card did not respond to voltage select! : -110
810 04:22:58.142202 ** Bad device specification mmc 0 **
811 04:22:58.142617 Couldn't find partition mmc 0
812 04:22:58.147250 Error: could not access storage.
813 04:22:58.491042 Net: eth0: ethernet@ff3f0000
814 04:22:58.491711 starting USB...
815 04:22:58.742723 Bus usb@ff500000: Register 3000140 NbrPorts 3
816 04:22:58.743156 Starting the controller
817 04:22:58.749570 USB XHCI 1.10
818 04:23:00.907932 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
819 04:23:00.908632 bl2_stage_init 0x01
820 04:23:00.909108 bl2_stage_init 0x81
821 04:23:00.913529 hw id: 0x0000 - pwm id 0x01
822 04:23:00.914047 bl2_stage_init 0xc1
823 04:23:00.914506 bl2_stage_init 0x02
824 04:23:00.914952
825 04:23:00.919169 L0:00000000
826 04:23:00.919676 L1:20000703
827 04:23:00.920165 L2:00008067
828 04:23:00.920613 L3:14000000
829 04:23:00.924718 B2:00402000
830 04:23:00.925227 B1:e0f83180
831 04:23:00.925680
832 04:23:00.926128 TE: 58124
833 04:23:00.926570
834 04:23:00.930329 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 04:23:00.930843
836 04:23:00.931298 Board ID = 1
837 04:23:00.935975 Set A53 clk to 24M
838 04:23:00.936508 Set A73 clk to 24M
839 04:23:00.936958 Set clk81 to 24M
840 04:23:00.941520 A53 clk: 1200 MHz
841 04:23:00.942024 A73 clk: 1200 MHz
842 04:23:00.942470 CLK81: 166.6M
843 04:23:00.942910 smccc: 00012a91
844 04:23:00.947231 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 04:23:00.952674 board id: 1
846 04:23:00.957664 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 04:23:00.969239 fw parse done
848 04:23:00.974237 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 04:23:01.016977 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 04:23:01.028771 PIEI prepare done
851 04:23:01.029269 fastboot data load
852 04:23:01.029724 fastboot data verify
853 04:23:01.034350 verify result: 266
854 04:23:01.040014 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 04:23:01.040526 LPDDR4 probe
856 04:23:01.040975 ddr clk to 1584MHz
857 04:23:01.047060 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 04:23:01.084267
859 04:23:01.084781 dmc_version 0001
860 04:23:01.090913 Check phy result
861 04:23:01.097810 INFO : End of CA training
862 04:23:01.098316 INFO : End of initialization
863 04:23:01.103361 INFO : Training has run successfully!
864 04:23:01.103858 Check phy result
865 04:23:01.109002 INFO : End of initialization
866 04:23:01.109508 INFO : End of read enable training
867 04:23:01.114535 INFO : End of fine write leveling
868 04:23:01.120126 INFO : End of Write leveling coarse delay
869 04:23:01.120630 INFO : Training has run successfully!
870 04:23:01.121080 Check phy result
871 04:23:01.125781 INFO : End of initialization
872 04:23:01.126287 INFO : End of read dq deskew training
873 04:23:01.131335 INFO : End of MPR read delay center optimization
874 04:23:01.136988 INFO : End of write delay center optimization
875 04:23:01.142528 INFO : End of read delay center optimization
876 04:23:01.143030 INFO : End of max read latency training
877 04:23:01.148176 INFO : Training has run successfully!
878 04:23:01.148689 1D training succeed
879 04:23:01.156368 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 04:23:01.203953 Check phy result
881 04:23:01.204537 INFO : End of initialization
882 04:23:01.226603 INFO : End of 2D read delay Voltage center optimization
883 04:23:01.246838 INFO : End of 2D read delay Voltage center optimization
884 04:23:01.298846 INFO : End of 2D write delay Voltage center optimization
885 04:23:01.349227 INFO : End of 2D write delay Voltage center optimization
886 04:23:01.354793 INFO : Training has run successfully!
887 04:23:01.355328
888 04:23:01.355788 channel==0
889 04:23:01.360429 RxClkDly_Margin_A0==88 ps 9
890 04:23:01.360958 TxDqDly_Margin_A0==98 ps 10
891 04:23:01.366077 RxClkDly_Margin_A1==88 ps 9
892 04:23:01.366645 TxDqDly_Margin_A1==98 ps 10
893 04:23:01.367118 TrainedVREFDQ_A0==74
894 04:23:01.371631 TrainedVREFDQ_A1==75
895 04:23:01.372267 VrefDac_Margin_A0==24
896 04:23:01.372735 DeviceVref_Margin_A0==40
897 04:23:01.377190 VrefDac_Margin_A1==25
898 04:23:01.377737 DeviceVref_Margin_A1==39
899 04:23:01.378176
900 04:23:01.378608
901 04:23:01.382810 channel==1
902 04:23:01.383324 RxClkDly_Margin_A0==98 ps 10
903 04:23:01.383757 TxDqDly_Margin_A0==98 ps 10
904 04:23:01.388365 RxClkDly_Margin_A1==88 ps 9
905 04:23:01.388876 TxDqDly_Margin_A1==88 ps 9
906 04:23:01.393933 TrainedVREFDQ_A0==77
907 04:23:01.394453 TrainedVREFDQ_A1==77
908 04:23:01.394890 VrefDac_Margin_A0==22
909 04:23:01.399667 DeviceVref_Margin_A0==37
910 04:23:01.400281 VrefDac_Margin_A1==24
911 04:23:01.405278 DeviceVref_Margin_A1==37
912 04:23:01.405867
913 04:23:01.406334 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 04:23:01.406786
915 04:23:01.438841 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
916 04:23:01.439501 2D training succeed
917 04:23:01.444507 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 04:23:01.450022 auto size-- 65535DDR cs0 size: 2048MB
919 04:23:01.450551 DDR cs1 size: 2048MB
920 04:23:01.455495 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 04:23:01.456090 cs0 DataBus test pass
922 04:23:01.461166 cs1 DataBus test pass
923 04:23:01.461666 cs0 AddrBus test pass
924 04:23:01.462097 cs1 AddrBus test pass
925 04:23:01.462522
926 04:23:01.466748 100bdlr_step_size ps== 420
927 04:23:01.467256 result report
928 04:23:01.472333 boot times 0Enable ddr reg access
929 04:23:01.477771 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 04:23:01.491227 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 04:23:02.064932 0.0;M3 CHK:0;cm4_sp_mode 0
932 04:23:02.065607 MVN_1=0x00000000
933 04:23:02.070419 MVN_2=0x00000000
934 04:23:02.076230 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 04:23:02.076754 OPS=0x10
936 04:23:02.077211 ring efuse init
937 04:23:02.077658 chipver efuse init
938 04:23:02.081770 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 04:23:02.087345 [0.018960 Inits done]
940 04:23:02.087856 secure task start!
941 04:23:02.088370 high task start!
942 04:23:02.091948 low task start!
943 04:23:02.092493 run into bl31
944 04:23:02.098581 NOTICE: BL31: v1.3(release):4fc40b1
945 04:23:02.106411 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 04:23:02.106942 NOTICE: BL31: G12A normal boot!
947 04:23:02.131689 NOTICE: BL31: BL33 decompress pass
948 04:23:02.137421 ERROR: Error initializing runtime service opteed_fast
949 04:23:03.370154
950 04:23:03.370790
951 04:23:03.377687 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 04:23:03.378243
953 04:23:03.378722 Model: Libre Computer AML-A311D-CC Alta
954 04:23:03.586014 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 04:23:03.609473 DRAM: 2 GiB (effective 3.8 GiB)
956 04:23:03.753473 Core: 408 devices, 31 uclasses, devicetree: separate
957 04:23:03.758430 WDT: Not starting watchdog@f0d0
958 04:23:03.791462 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 04:23:03.803944 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 04:23:03.807959 ** Bad device specification mmc 0 **
961 04:23:03.819305 Card did not respond to voltage select! : -110
962 04:23:03.825968 ** Bad device specification mmc 0 **
963 04:23:03.826493 Couldn't find partition mmc 0
964 04:23:03.835286 Card did not respond to voltage select! : -110
965 04:23:03.840794 ** Bad device specification mmc 0 **
966 04:23:03.841313 Couldn't find partition mmc 0
967 04:23:03.844922 Error: could not access storage.
968 04:23:04.188452 Net: eth0: ethernet@ff3f0000
969 04:23:04.189124 starting USB...
970 04:23:04.441218 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 04:23:04.441878 Starting the controller
972 04:23:04.448214 USB XHCI 1.10
973 04:23:06.002111 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
974 04:23:06.010560 scanning usb for storage devices... 0 Storage Device(s) found
976 04:23:06.062407 Hit any key to stop autoboot: 1
977 04:23:06.063229 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
978 04:23:06.063683 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
979 04:23:06.064066 Setting prompt string to ['=>']
980 04:23:06.064434 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
981 04:23:06.077961 0
982 04:23:06.078848 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
983 04:23:06.079408 Sending with 10 millisecond of delay
985 04:23:07.214545 => setenv autoload no
986 04:23:07.225432 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
987 04:23:07.230977 setenv autoload no
988 04:23:07.231786 Sending with 10 millisecond of delay
990 04:23:09.029359 => setenv initrd_high 0xffffffff
991 04:23:09.040175 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
992 04:23:09.041107 setenv initrd_high 0xffffffff
993 04:23:09.041867 Sending with 10 millisecond of delay
995 04:23:10.658700 => setenv fdt_high 0xffffffff
996 04:23:10.669391 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
997 04:23:10.670067 setenv fdt_high 0xffffffff
998 04:23:10.670538 Sending with 10 millisecond of delay
1000 04:23:10.961991 => dhcp
1001 04:23:10.972804 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1002 04:23:10.973708 dhcp
1003 04:23:10.974169 Speed: 1000, full duplex
1004 04:23:10.974610 BOOTP broadcast 1
1005 04:23:10.981864 DHCP client bound to address 192.168.6.27 (9 ms)
1006 04:23:10.982648 Sending with 10 millisecond of delay
1008 04:23:12.659422 => setenv serverip 192.168.6.2
1009 04:23:12.670267 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1010 04:23:12.671238 setenv serverip 192.168.6.2
1011 04:23:12.672005 Sending with 10 millisecond of delay
1013 04:23:16.400464 => tftpboot 0x01080000 938007/tftp-deploy-4c8t298_/kernel/uImage
1014 04:23:16.411576 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1015 04:23:16.412876 tftpboot 0x01080000 938007/tftp-deploy-4c8t298_/kernel/uImage
1016 04:23:16.413463 Speed: 1000, full duplex
1017 04:23:16.413995 Using ethernet@ff3f0000 device
1018 04:23:16.414602 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1019 04:23:16.420059 Filename '938007/tftp-deploy-4c8t298_/kernel/uImage'.
1020 04:23:16.423820 Load address: 0x1080000
1021 04:23:19.485494 Loading: *################################################## 43.6 MiB
1022 04:23:19.486104 14.2 MiB/s
1023 04:23:19.486530 done
1024 04:23:19.488968 Bytes transferred = 45713984 (2b98a40 hex)
1025 04:23:19.489774 Sending with 10 millisecond of delay
1027 04:23:24.177914 => tftpboot 0x08000000 938007/tftp-deploy-4c8t298_/ramdisk/ramdisk.cpio.gz.uboot
1028 04:23:24.188722 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1029 04:23:24.189621 tftpboot 0x08000000 938007/tftp-deploy-4c8t298_/ramdisk/ramdisk.cpio.gz.uboot
1030 04:23:24.190105 Speed: 1000, full duplex
1031 04:23:24.190561 Using ethernet@ff3f0000 device
1032 04:23:24.191539 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1033 04:23:24.203236 Filename '938007/tftp-deploy-4c8t298_/ramdisk/ramdisk.cpio.gz.uboot'.
1034 04:23:24.203825 Load address: 0x8000000
1035 04:23:31.311640 Loading: *############T ##################################### UDP wrong checksum 00000005 0000d932
1036 04:23:35.127121 UDP wrong checksum 000000ff 00003606
1037 04:23:35.192536 UDP wrong checksum 000000ff 0000c0f8
1038 04:23:36.313186 T UDP wrong checksum 00000005 0000d932
1039 04:23:46.313990 T T UDP wrong checksum 00000005 0000d932
1040 04:24:06.316110 T T T UDP wrong checksum 00000005 0000d932
1041 04:24:16.917087 T T T UDP wrong checksum 000000ff 00004a49
1042 04:24:16.926233 UDP wrong checksum 000000ff 0000e13b
1043 04:24:21.323308
1044 04:24:21.323969 Retry count exceeded; starting again
1046 04:24:21.325577 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1049 04:24:21.327579 end: 2.4 uboot-commands (duration 00:01:47) [common]
1051 04:24:21.329135 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1053 04:24:21.330275 end: 2 uboot-action (duration 00:01:47) [common]
1055 04:24:21.331955 Cleaning after the job
1056 04:24:21.332618 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/ramdisk
1057 04:24:21.334075 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/kernel
1058 04:24:21.365444 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/dtb
1059 04:24:21.366872 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/nfsrootfs
1060 04:24:21.403174 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/938007/tftp-deploy-4c8t298_/modules
1061 04:24:21.410113 start: 4.1 power-off (timeout 00:00:30) [common]
1062 04:24:21.410726 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1063 04:24:21.449257 >> OK - accepted request
1064 04:24:21.451921 Returned 0 in 0 seconds
1065 04:24:21.552862 end: 4.1 power-off (duration 00:00:00) [common]
1067 04:24:21.554076 start: 4.2 read-feedback (timeout 00:10:00) [common]
1068 04:24:21.554728 Listened to connection for namespace 'common' for up to 1s
1069 04:24:22.555719 Finalising connection for namespace 'common'
1070 04:24:22.556541 Disconnecting from shell: Finalise
1071 04:24:22.557081 =>
1072 04:24:22.658141 end: 4.2 read-feedback (duration 00:00:01) [common]
1073 04:24:22.658849 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/938007
1074 04:24:25.471420 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/938007
1075 04:24:25.472137 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.