Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:17:55.261530 lava-dispatcher, installed at version: 2024.01
2 04:17:55.262349 start: 0 validate
3 04:17:55.262841 Start time: 2024-11-05 04:17:55.262810+00:00 (UTC)
4 04:17:55.263390 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:17:55.263943 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:17:55.306833 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:17:55.307371 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:17:55.335301 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:17:55.335938 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 04:17:55.364806 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:17:55.365340 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:17:55.397623 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:17:55.398153 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:17:55.433253 validate duration: 0.17
16 04:17:55.434150 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:17:55.434493 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:17:55.434849 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:17:55.435455 Not decompressing ramdisk as can be used compressed.
20 04:17:55.435926 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 04:17:55.436259 saving as /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/ramdisk/initrd.cpio.gz
22 04:17:55.436555 total size: 5628140 (5 MB)
23 04:17:55.475503 progress 0 % (0 MB)
24 04:17:55.479888 progress 5 % (0 MB)
25 04:17:55.484413 progress 10 % (0 MB)
26 04:17:55.488571 progress 15 % (0 MB)
27 04:17:55.493434 progress 20 % (1 MB)
28 04:17:55.497248 progress 25 % (1 MB)
29 04:17:55.501532 progress 30 % (1 MB)
30 04:17:55.505877 progress 35 % (1 MB)
31 04:17:55.509857 progress 40 % (2 MB)
32 04:17:55.514257 progress 45 % (2 MB)
33 04:17:55.518258 progress 50 % (2 MB)
34 04:17:55.522600 progress 55 % (2 MB)
35 04:17:55.527087 progress 60 % (3 MB)
36 04:17:55.531232 progress 65 % (3 MB)
37 04:17:55.535500 progress 70 % (3 MB)
38 04:17:55.539530 progress 75 % (4 MB)
39 04:17:55.545812 progress 80 % (4 MB)
40 04:17:55.549506 progress 85 % (4 MB)
41 04:17:55.553711 progress 90 % (4 MB)
42 04:17:55.557748 progress 95 % (5 MB)
43 04:17:55.561095 progress 100 % (5 MB)
44 04:17:55.561770 5 MB downloaded in 0.13 s (42.87 MB/s)
45 04:17:55.562336 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:17:55.563228 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:17:55.563524 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:17:55.563799 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:17:55.564307 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig/gcc-12/kernel/Image
51 04:17:55.564569 saving as /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/kernel/Image
52 04:17:55.564780 total size: 45713920 (43 MB)
53 04:17:55.564992 No compression specified
54 04:17:55.607453 progress 0 % (0 MB)
55 04:17:55.636988 progress 5 % (2 MB)
56 04:17:55.666920 progress 10 % (4 MB)
57 04:17:55.696761 progress 15 % (6 MB)
58 04:17:55.726189 progress 20 % (8 MB)
59 04:17:55.756626 progress 25 % (10 MB)
60 04:17:55.785953 progress 30 % (13 MB)
61 04:17:55.815574 progress 35 % (15 MB)
62 04:17:55.845288 progress 40 % (17 MB)
63 04:17:55.873926 progress 45 % (19 MB)
64 04:17:55.903424 progress 50 % (21 MB)
65 04:17:55.933009 progress 55 % (24 MB)
66 04:17:55.962456 progress 60 % (26 MB)
67 04:17:55.991610 progress 65 % (28 MB)
68 04:17:56.021113 progress 70 % (30 MB)
69 04:17:56.050512 progress 75 % (32 MB)
70 04:17:56.079512 progress 80 % (34 MB)
71 04:17:56.108662 progress 85 % (37 MB)
72 04:17:56.138520 progress 90 % (39 MB)
73 04:17:56.167367 progress 95 % (41 MB)
74 04:17:56.196349 progress 100 % (43 MB)
75 04:17:56.196910 43 MB downloaded in 0.63 s (68.97 MB/s)
76 04:17:56.197396 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:17:56.198220 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:17:56.198500 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:17:56.198769 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:17:56.199224 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 04:17:56.199479 saving as /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/dtb/meson-g12b-a311d-libretech-cc.dtb
83 04:17:56.199686 total size: 54703 (0 MB)
84 04:17:56.199896 No compression specified
85 04:17:56.244485 progress 59 % (0 MB)
86 04:17:56.245401 progress 100 % (0 MB)
87 04:17:56.245998 0 MB downloaded in 0.05 s (1.13 MB/s)
88 04:17:56.246515 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:17:56.247359 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:17:56.247633 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:17:56.247907 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:17:56.248422 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 04:17:56.248691 saving as /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/nfsrootfs/full.rootfs.tar
95 04:17:56.248902 total size: 474398908 (452 MB)
96 04:17:56.249119 Using unxz to decompress xz
97 04:17:56.292290 progress 0 % (0 MB)
98 04:17:57.388795 progress 5 % (22 MB)
99 04:17:58.889997 progress 10 % (45 MB)
100 04:17:59.347026 progress 15 % (67 MB)
101 04:18:00.203186 progress 20 % (90 MB)
102 04:18:00.748038 progress 25 % (113 MB)
103 04:18:01.116554 progress 30 % (135 MB)
104 04:18:01.730537 progress 35 % (158 MB)
105 04:18:02.661591 progress 40 % (181 MB)
106 04:18:03.400726 progress 45 % (203 MB)
107 04:18:04.084460 progress 50 % (226 MB)
108 04:18:04.786155 progress 55 % (248 MB)
109 04:18:05.991386 progress 60 % (271 MB)
110 04:18:07.484964 progress 65 % (294 MB)
111 04:18:09.165097 progress 70 % (316 MB)
112 04:18:12.554832 progress 75 % (339 MB)
113 04:18:14.998915 progress 80 % (361 MB)
114 04:18:17.938238 progress 85 % (384 MB)
115 04:18:21.653685 progress 90 % (407 MB)
116 04:18:25.114199 progress 95 % (429 MB)
117 04:18:28.283734 progress 100 % (452 MB)
118 04:18:28.297521 452 MB downloaded in 32.05 s (14.12 MB/s)
119 04:18:28.298109 end: 1.4.1 http-download (duration 00:00:32) [common]
121 04:18:28.298970 end: 1.4 download-retry (duration 00:00:32) [common]
122 04:18:28.299249 start: 1.5 download-retry (timeout 00:09:27) [common]
123 04:18:28.299522 start: 1.5.1 http-download (timeout 00:09:27) [common]
124 04:18:28.300031 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig/gcc-12/modules.tar.xz
125 04:18:28.300306 saving as /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/modules/modules.tar
126 04:18:28.300520 total size: 11608444 (11 MB)
127 04:18:28.300738 Using unxz to decompress xz
128 04:18:28.338595 progress 0 % (0 MB)
129 04:18:28.406333 progress 5 % (0 MB)
130 04:18:28.482695 progress 10 % (1 MB)
131 04:18:28.582766 progress 15 % (1 MB)
132 04:18:28.675742 progress 20 % (2 MB)
133 04:18:28.755078 progress 25 % (2 MB)
134 04:18:28.831612 progress 30 % (3 MB)
135 04:18:28.906419 progress 35 % (3 MB)
136 04:18:28.983782 progress 40 % (4 MB)
137 04:18:29.060900 progress 45 % (5 MB)
138 04:18:29.145377 progress 50 % (5 MB)
139 04:18:29.222931 progress 55 % (6 MB)
140 04:18:29.309284 progress 60 % (6 MB)
141 04:18:29.390758 progress 65 % (7 MB)
142 04:18:29.467776 progress 70 % (7 MB)
143 04:18:29.549521 progress 75 % (8 MB)
144 04:18:29.632983 progress 80 % (8 MB)
145 04:18:29.712754 progress 85 % (9 MB)
146 04:18:29.791072 progress 90 % (9 MB)
147 04:18:29.868592 progress 95 % (10 MB)
148 04:18:29.945312 progress 100 % (11 MB)
149 04:18:29.957326 11 MB downloaded in 1.66 s (6.68 MB/s)
150 04:18:29.958318 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:18:29.960138 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:18:29.960747 start: 1.6 prepare-tftp-overlay (timeout 00:09:25) [common]
154 04:18:29.961342 start: 1.6.1 extract-nfsrootfs (timeout 00:09:25) [common]
155 04:18:45.540852 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/937968/extract-nfsrootfs-1zygu8x8
156 04:18:45.541464 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 04:18:45.541796 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 04:18:45.542550 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i
159 04:18:45.543096 makedir: /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin
160 04:18:45.543595 makedir: /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/tests
161 04:18:45.544061 makedir: /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/results
162 04:18:45.544447 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-add-keys
163 04:18:45.545006 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-add-sources
164 04:18:45.545520 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-background-process-start
165 04:18:45.546007 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-background-process-stop
166 04:18:45.546526 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-common-functions
167 04:18:45.547008 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-echo-ipv4
168 04:18:45.547477 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-install-packages
169 04:18:45.548014 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-installed-packages
170 04:18:45.548540 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-os-build
171 04:18:45.549022 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-probe-channel
172 04:18:45.549542 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-probe-ip
173 04:18:45.550027 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-target-ip
174 04:18:45.550497 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-target-mac
175 04:18:45.550966 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-target-storage
176 04:18:45.551442 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-test-case
177 04:18:45.551944 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-test-event
178 04:18:45.552478 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-test-feedback
179 04:18:45.552948 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-test-raise
180 04:18:45.553408 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-test-reference
181 04:18:45.553870 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-test-runner
182 04:18:45.554339 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-test-set
183 04:18:45.554805 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-test-shell
184 04:18:45.555281 Updating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-install-packages (oe)
185 04:18:45.555814 Updating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/bin/lava-installed-packages (oe)
186 04:18:45.556333 Creating /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/environment
187 04:18:45.556752 LAVA metadata
188 04:18:45.557023 - LAVA_JOB_ID=937968
189 04:18:45.557238 - LAVA_DISPATCHER_IP=192.168.6.2
190 04:18:45.557610 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 04:18:45.558550 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 04:18:45.558860 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 04:18:45.559069 skipped lava-vland-overlay
194 04:18:45.559313 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 04:18:45.559567 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 04:18:45.559784 skipped lava-multinode-overlay
197 04:18:45.560045 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 04:18:45.560305 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 04:18:45.560552 Loading test definitions
200 04:18:45.560828 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 04:18:45.561048 Using /lava-937968 at stage 0
202 04:18:45.562176 uuid=937968_1.6.2.4.1 testdef=None
203 04:18:45.562477 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 04:18:45.562738 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 04:18:45.564544 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 04:18:45.565332 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 04:18:45.567495 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 04:18:45.568383 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 04:18:45.570433 runner path: /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 937968_1.6.2.4.1
212 04:18:45.570987 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 04:18:45.571738 Creating lava-test-runner.conf files
215 04:18:45.571938 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/937968/lava-overlay-zjt7un0i/lava-937968/0 for stage 0
216 04:18:45.572299 - 0_v4l2-decoder-conformance-h265
217 04:18:45.572640 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 04:18:45.572911 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 04:18:45.594271 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 04:18:45.594657 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 04:18:45.594913 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 04:18:45.595179 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 04:18:45.595440 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 04:18:46.210241 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 04:18:46.210699 start: 1.6.4 extract-modules (timeout 00:09:09) [common]
226 04:18:46.210944 extracting modules file /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/937968/extract-nfsrootfs-1zygu8x8
227 04:18:47.557191 extracting modules file /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/937968/extract-overlay-ramdisk-c7nvbtb4/ramdisk
228 04:18:48.943332 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 04:18:48.943803 start: 1.6.5 apply-overlay-tftp (timeout 00:09:06) [common]
230 04:18:48.944110 [common] Applying overlay to NFS
231 04:18:48.944327 [common] Applying overlay /var/lib/lava/dispatcher/tmp/937968/compress-overlay-8fo3t9k5/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/937968/extract-nfsrootfs-1zygu8x8
232 04:18:48.973366 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 04:18:48.973736 start: 1.6.6 prepare-kernel (timeout 00:09:06) [common]
234 04:18:48.974007 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:06) [common]
235 04:18:48.974233 Converting downloaded kernel to a uImage
236 04:18:48.974549 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/kernel/Image /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/kernel/uImage
237 04:18:50.552479 output: Image Name:
238 04:18:50.552870 output: Created: Tue Nov 5 04:18:48 2024
239 04:18:50.553077 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 04:18:50.553274 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 04:18:50.553471 output: Load Address: 01080000
242 04:18:50.553664 output: Entry Point: 01080000
243 04:18:50.553856 output:
244 04:18:50.554180 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 04:18:50.554443 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 04:18:50.554708 start: 1.6.7 configure-preseed-file (timeout 00:09:05) [common]
247 04:18:50.554956 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 04:18:50.555209 start: 1.6.8 compress-ramdisk (timeout 00:09:05) [common]
249 04:18:50.555467 Building ramdisk /var/lib/lava/dispatcher/tmp/937968/extract-overlay-ramdisk-c7nvbtb4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/937968/extract-overlay-ramdisk-c7nvbtb4/ramdisk
250 04:18:52.711205 >> 166825 blocks
251 04:19:00.482510 Adding RAMdisk u-boot header.
252 04:19:00.482950 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/937968/extract-overlay-ramdisk-c7nvbtb4/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/937968/extract-overlay-ramdisk-c7nvbtb4/ramdisk.cpio.gz.uboot
253 04:19:00.729341 output: Image Name:
254 04:19:00.729760 output: Created: Tue Nov 5 04:19:00 2024
255 04:19:00.729974 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 04:19:00.730180 output: Data Size: 23432771 Bytes = 22883.57 KiB = 22.35 MiB
257 04:19:00.730384 output: Load Address: 00000000
258 04:19:00.730586 output: Entry Point: 00000000
259 04:19:00.730785 output:
260 04:19:00.731524 rename /var/lib/lava/dispatcher/tmp/937968/extract-overlay-ramdisk-c7nvbtb4/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/ramdisk/ramdisk.cpio.gz.uboot
261 04:19:00.731970 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 04:19:00.732613 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 04:19:00.733163 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:55) [common]
264 04:19:00.733622 No LXC device requested
265 04:19:00.734127 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 04:19:00.734636 start: 1.8 deploy-device-env (timeout 00:08:55) [common]
267 04:19:00.735132 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 04:19:00.735541 Checking files for TFTP limit of 4294967296 bytes.
269 04:19:00.738307 end: 1 tftp-deploy (duration 00:01:05) [common]
270 04:19:00.738918 start: 2 uboot-action (timeout 00:05:00) [common]
271 04:19:00.739441 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 04:19:00.739935 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 04:19:00.740479 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 04:19:00.741010 Using kernel file from prepare-kernel: 937968/tftp-deploy-bvwwwu6u/kernel/uImage
275 04:19:00.741641 substitutions:
276 04:19:00.742045 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 04:19:00.742444 - {DTB_ADDR}: 0x01070000
278 04:19:00.742841 - {DTB}: 937968/tftp-deploy-bvwwwu6u/dtb/meson-g12b-a311d-libretech-cc.dtb
279 04:19:00.743234 - {INITRD}: 937968/tftp-deploy-bvwwwu6u/ramdisk/ramdisk.cpio.gz.uboot
280 04:19:00.743628 - {KERNEL_ADDR}: 0x01080000
281 04:19:00.744063 - {KERNEL}: 937968/tftp-deploy-bvwwwu6u/kernel/uImage
282 04:19:00.744465 - {LAVA_MAC}: None
283 04:19:00.744897 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/937968/extract-nfsrootfs-1zygu8x8
284 04:19:00.745293 - {NFS_SERVER_IP}: 192.168.6.2
285 04:19:00.745681 - {PRESEED_CONFIG}: None
286 04:19:00.746073 - {PRESEED_LOCAL}: None
287 04:19:00.746462 - {RAMDISK_ADDR}: 0x08000000
288 04:19:00.746845 - {RAMDISK}: 937968/tftp-deploy-bvwwwu6u/ramdisk/ramdisk.cpio.gz.uboot
289 04:19:00.747230 - {ROOT_PART}: None
290 04:19:00.747615 - {ROOT}: None
291 04:19:00.748038 - {SERVER_IP}: 192.168.6.2
292 04:19:00.748436 - {TEE_ADDR}: 0x83000000
293 04:19:00.748827 - {TEE}: None
294 04:19:00.749215 Parsed boot commands:
295 04:19:00.749592 - setenv autoload no
296 04:19:00.749975 - setenv initrd_high 0xffffffff
297 04:19:00.750357 - setenv fdt_high 0xffffffff
298 04:19:00.750743 - dhcp
299 04:19:00.751129 - setenv serverip 192.168.6.2
300 04:19:00.751512 - tftpboot 0x01080000 937968/tftp-deploy-bvwwwu6u/kernel/uImage
301 04:19:00.751896 - tftpboot 0x08000000 937968/tftp-deploy-bvwwwu6u/ramdisk/ramdisk.cpio.gz.uboot
302 04:19:00.752322 - tftpboot 0x01070000 937968/tftp-deploy-bvwwwu6u/dtb/meson-g12b-a311d-libretech-cc.dtb
303 04:19:00.752715 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/937968/extract-nfsrootfs-1zygu8x8,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 04:19:00.753116 - bootm 0x01080000 0x08000000 0x01070000
305 04:19:00.753630 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 04:19:00.755117 start: 2.3 connect-device (timeout 00:05:00) [common]
308 04:19:00.755539 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 04:19:00.770186 Setting prompt string to ['lava-test: # ']
310 04:19:00.771691 end: 2.3 connect-device (duration 00:00:00) [common]
311 04:19:00.772327 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 04:19:00.772863 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 04:19:00.773384 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 04:19:00.774628 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 04:19:00.817535 >> OK - accepted request
316 04:19:00.819916 Returned 0 in 0 seconds
317 04:19:00.921063 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 04:19:00.922856 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 04:19:00.923430 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 04:19:00.923943 Setting prompt string to ['Hit any key to stop autoboot']
322 04:19:00.924453 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 04:19:00.926195 Trying 192.168.56.21...
324 04:19:00.926694 Connected to conserv1.
325 04:19:00.927107 Escape character is '^]'.
326 04:19:00.927518
327 04:19:00.927927 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 04:19:00.928370
329 04:19:11.706138 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 04:19:11.706732 bl2_stage_init 0x01
331 04:19:11.707131 bl2_stage_init 0x81
332 04:19:11.711653 hw id: 0x0000 - pwm id 0x01
333 04:19:11.712133 bl2_stage_init 0xc1
334 04:19:11.712539 bl2_stage_init 0x02
335 04:19:11.712927
336 04:19:11.717089 L0:00000000
337 04:19:11.717519 L1:20000703
338 04:19:11.717906 L2:00008067
339 04:19:11.718298 L3:14000000
340 04:19:11.722591 B2:00402000
341 04:19:11.723027 B1:e0f83180
342 04:19:11.723413
343 04:19:11.723801 TE: 58159
344 04:19:11.724223
345 04:19:11.728133 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 04:19:11.728547
347 04:19:11.728936 Board ID = 1
348 04:19:11.733850 Set A53 clk to 24M
349 04:19:11.734272 Set A73 clk to 24M
350 04:19:11.734660 Set clk81 to 24M
351 04:19:11.739372 A53 clk: 1200 MHz
352 04:19:11.739787 A73 clk: 1200 MHz
353 04:19:11.740204 CLK81: 166.6M
354 04:19:11.740584 smccc: 00012ab5
355 04:19:11.744924 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 04:19:11.750530 board id: 1
357 04:19:11.756436 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 04:19:11.767033 fw parse done
359 04:19:11.773029 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 04:19:11.815826 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 04:19:11.826525 PIEI prepare done
362 04:19:11.826944 fastboot data load
363 04:19:11.827335 fastboot data verify
364 04:19:11.832235 verify result: 266
365 04:19:11.837924 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 04:19:11.838406 LPDDR4 probe
367 04:19:11.838827 ddr clk to 1584MHz
368 04:19:11.845908 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 04:19:11.882155
370 04:19:11.882633 dmc_version 0001
371 04:19:11.889740 Check phy result
372 04:19:11.895567 INFO : End of CA training
373 04:19:11.896046 INFO : End of initialization
374 04:19:11.901382 INFO : Training has run successfully!
375 04:19:11.901823 Check phy result
376 04:19:11.906894 INFO : End of initialization
377 04:19:11.907365 INFO : End of read enable training
378 04:19:11.910037 INFO : End of fine write leveling
379 04:19:11.915575 INFO : End of Write leveling coarse delay
380 04:19:11.921247 INFO : Training has run successfully!
381 04:19:11.921682 Check phy result
382 04:19:11.922073 INFO : End of initialization
383 04:19:11.926831 INFO : End of read dq deskew training
384 04:19:11.930287 INFO : End of MPR read delay center optimization
385 04:19:11.935877 INFO : End of write delay center optimization
386 04:19:11.941414 INFO : End of read delay center optimization
387 04:19:11.941850 INFO : End of max read latency training
388 04:19:11.947019 INFO : Training has run successfully!
389 04:19:11.947466 1D training succeed
390 04:19:11.954697 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 04:19:12.002802 Check phy result
392 04:19:12.003355 INFO : End of initialization
393 04:19:12.024543 INFO : End of 2D read delay Voltage center optimization
394 04:19:12.045061 INFO : End of 2D read delay Voltage center optimization
395 04:19:12.096058 INFO : End of 2D write delay Voltage center optimization
396 04:19:12.146223 INFO : End of 2D write delay Voltage center optimization
397 04:19:12.152090 INFO : Training has run successfully!
398 04:19:12.152556
399 04:19:12.152961 channel==0
400 04:19:12.157473 RxClkDly_Margin_A0==88 ps 9
401 04:19:12.157925 TxDqDly_Margin_A0==98 ps 10
402 04:19:12.163157 RxClkDly_Margin_A1==88 ps 9
403 04:19:12.163596 TxDqDly_Margin_A1==98 ps 10
404 04:19:12.164022 TrainedVREFDQ_A0==74
405 04:19:12.169091 TrainedVREFDQ_A1==74
406 04:19:12.169598 VrefDac_Margin_A0==25
407 04:19:12.169992 DeviceVref_Margin_A0==40
408 04:19:12.174352 VrefDac_Margin_A1==25
409 04:19:12.174785 DeviceVref_Margin_A1==40
410 04:19:12.175173
411 04:19:12.175561
412 04:19:12.180102 channel==1
413 04:19:12.180540 RxClkDly_Margin_A0==98 ps 10
414 04:19:12.180932 TxDqDly_Margin_A0==88 ps 9
415 04:19:12.185442 RxClkDly_Margin_A1==98 ps 10
416 04:19:12.185877 TxDqDly_Margin_A1==88 ps 9
417 04:19:12.191175 TrainedVREFDQ_A0==76
418 04:19:12.191614 TrainedVREFDQ_A1==77
419 04:19:12.192035 VrefDac_Margin_A0==22
420 04:19:12.196712 DeviceVref_Margin_A0==38
421 04:19:12.197156 VrefDac_Margin_A1==22
422 04:19:12.202286 DeviceVref_Margin_A1==37
423 04:19:12.202731
424 04:19:12.203128 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 04:19:12.203516
426 04:19:12.236140 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 04:19:12.236770 2D training succeed
428 04:19:12.241589 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 04:19:12.247019 auto size-- 65535DDR cs0 size: 2048MB
430 04:19:12.247457 DDR cs1 size: 2048MB
431 04:19:12.252543 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 04:19:12.252972 cs0 DataBus test pass
433 04:19:12.258020 cs1 DataBus test pass
434 04:19:12.258436 cs0 AddrBus test pass
435 04:19:12.258826 cs1 AddrBus test pass
436 04:19:12.259211
437 04:19:12.263745 100bdlr_step_size ps== 420
438 04:19:12.264201 result report
439 04:19:12.269216 boot times 0Enable ddr reg access
440 04:19:12.274546 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 04:19:12.288139 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 04:19:12.861902 0.0;M3 CHK:0;cm4_sp_mode 0
443 04:19:12.862503 MVN_1=0x00000000
444 04:19:12.867358 MVN_2=0x00000000
445 04:19:12.873088 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 04:19:12.873514 OPS=0x10
447 04:19:12.873906 ring efuse init
448 04:19:12.874289 chipver efuse init
449 04:19:12.878652 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 04:19:12.884289 [0.018960 Inits done]
451 04:19:12.884719 secure task start!
452 04:19:12.885108 high task start!
453 04:19:12.888966 low task start!
454 04:19:12.889379 run into bl31
455 04:19:12.895512 NOTICE: BL31: v1.3(release):4fc40b1
456 04:19:12.903355 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 04:19:12.903775 NOTICE: BL31: G12A normal boot!
458 04:19:12.928682 NOTICE: BL31: BL33 decompress pass
459 04:19:12.934359 ERROR: Error initializing runtime service opteed_fast
460 04:19:14.167328
461 04:19:14.167951
462 04:19:14.175627 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 04:19:14.176112
464 04:19:14.176590 Model: Libre Computer AML-A311D-CC Alta
465 04:19:14.657037 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 04:19:14.657656 DRAM: 2 GiB (effective 3.8 GiB)
467 04:19:14.658069 Core: 408 devices, 31 uclasses, devicetree: separate
468 04:19:14.658468 WDT: Not starting watchdog@f0d0
469 04:19:14.659126 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 04:19:14.659556 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 04:19:14.659956 ** Bad device specification mmc 0 **
472 04:19:14.660400 Card did not respond to voltage select! : -110
473 04:19:14.660793 ** Bad device specification mmc 0 **
474 04:19:14.661183 Couldn't find partition mmc 0
475 04:19:14.661571 Card did not respond to voltage select! : -110
476 04:19:14.661954 ** Bad device specification mmc 0 **
477 04:19:14.662342 Couldn't find partition mmc 0
478 04:19:14.663043 Error: could not access storage.
479 04:19:15.906257 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 04:19:15.906905 bl2_stage_init 0x01
481 04:19:15.907311 bl2_stage_init 0x81
482 04:19:15.911811 hw id: 0x0000 - pwm id 0x01
483 04:19:15.912187 bl2_stage_init 0xc1
484 04:19:15.912415 bl2_stage_init 0x02
485 04:19:15.912638
486 04:19:15.917358 L0:00000000
487 04:19:15.917680 L1:20000703
488 04:19:15.917888 L2:00008067
489 04:19:15.918087 L3:14000000
490 04:19:15.920264 B2:00402000
491 04:19:15.920564 B1:e0f83180
492 04:19:15.920801
493 04:19:15.921037 TE: 58159
494 04:19:15.921270
495 04:19:15.931355 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 04:19:15.931721
497 04:19:15.931950 Board ID = 1
498 04:19:15.932266 Set A53 clk to 24M
499 04:19:15.932492 Set A73 clk to 24M
500 04:19:15.937251 Set clk81 to 24M
501 04:19:15.937590 A53 clk: 1200 MHz
502 04:19:15.937797 A73 clk: 1200 MHz
503 04:19:15.942675 CLK81: 166.6M
504 04:19:15.943232 smccc: 00012ab5
505 04:19:15.948297 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 04:19:15.948833 board id: 1
507 04:19:15.956836 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 04:19:15.967736 fw parse done
509 04:19:15.972725 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 04:19:16.015244 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 04:19:16.027472 PIEI prepare done
512 04:19:16.028201 fastboot data load
513 04:19:16.028671 fastboot data verify
514 04:19:16.032892 verify result: 266
515 04:19:16.038543 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 04:19:16.039122 LPDDR4 probe
517 04:19:16.039574 ddr clk to 1584MHz
518 04:19:16.045477 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 04:19:16.082802
520 04:19:16.083440 dmc_version 0001
521 04:19:16.089267 Check phy result
522 04:19:16.096156 INFO : End of CA training
523 04:19:16.096883 INFO : End of initialization
524 04:19:16.101719 INFO : Training has run successfully!
525 04:19:16.102383 Check phy result
526 04:19:16.107496 INFO : End of initialization
527 04:19:16.108009 INFO : End of read enable training
528 04:19:16.113093 INFO : End of fine write leveling
529 04:19:16.118644 INFO : End of Write leveling coarse delay
530 04:19:16.119310 INFO : Training has run successfully!
531 04:19:16.119786 Check phy result
532 04:19:16.124157 INFO : End of initialization
533 04:19:16.124726 INFO : End of read dq deskew training
534 04:19:16.129738 INFO : End of MPR read delay center optimization
535 04:19:16.135473 INFO : End of write delay center optimization
536 04:19:16.140800 INFO : End of read delay center optimization
537 04:19:16.141309 INFO : End of max read latency training
538 04:19:16.146542 INFO : Training has run successfully!
539 04:19:16.147035 1D training succeed
540 04:19:16.155861 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 04:19:16.203367 Check phy result
542 04:19:16.204062 INFO : End of initialization
543 04:19:16.226113 INFO : End of 2D read delay Voltage center optimization
544 04:19:16.245513 INFO : End of 2D read delay Voltage center optimization
545 04:19:16.296894 INFO : End of 2D write delay Voltage center optimization
546 04:19:16.346981 INFO : End of 2D write delay Voltage center optimization
547 04:19:16.352660 INFO : Training has run successfully!
548 04:19:16.353259
549 04:19:16.354072 channel==0
550 04:19:16.358314 RxClkDly_Margin_A0==88 ps 9
551 04:19:16.358956 TxDqDly_Margin_A0==98 ps 10
552 04:19:16.363766 RxClkDly_Margin_A1==88 ps 9
553 04:19:16.364456 TxDqDly_Margin_A1==88 ps 9
554 04:19:16.364918 TrainedVREFDQ_A0==74
555 04:19:16.369408 TrainedVREFDQ_A1==74
556 04:19:16.369984 VrefDac_Margin_A0==24
557 04:19:16.370425 DeviceVref_Margin_A0==40
558 04:19:16.374887 VrefDac_Margin_A1==24
559 04:19:16.375449 DeviceVref_Margin_A1==40
560 04:19:16.375903
561 04:19:16.376399
562 04:19:16.376838 channel==1
563 04:19:16.380466 RxClkDly_Margin_A0==88 ps 9
564 04:19:16.381000 TxDqDly_Margin_A0==88 ps 9
565 04:19:16.386168 RxClkDly_Margin_A1==88 ps 9
566 04:19:16.386723 TxDqDly_Margin_A1==88 ps 9
567 04:19:16.391661 TrainedVREFDQ_A0==77
568 04:19:16.392263 TrainedVREFDQ_A1==77
569 04:19:16.392714 VrefDac_Margin_A0==22
570 04:19:16.397378 DeviceVref_Margin_A0==37
571 04:19:16.397946 VrefDac_Margin_A1==24
572 04:19:16.398388 DeviceVref_Margin_A1==37
573 04:19:16.402973
574 04:19:16.403575 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 04:19:16.404127
576 04:19:16.436532 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 04:19:16.437181 2D training succeed
578 04:19:16.442135 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 04:19:16.447663 auto size-- 65535DDR cs0 size: 2048MB
580 04:19:16.448124 DDR cs1 size: 2048MB
581 04:19:16.453353 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 04:19:16.453775 cs0 DataBus test pass
583 04:19:16.458861 cs1 DataBus test pass
584 04:19:16.459264 cs0 AddrBus test pass
585 04:19:16.459510 cs1 AddrBus test pass
586 04:19:16.459739
587 04:19:16.464711 100bdlr_step_size ps== 420
588 04:19:16.465156 result report
589 04:19:16.470148 boot times 0Enable ddr reg access
590 04:19:16.475216 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 04:19:16.488616 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 04:19:17.060547 0.0;M3 CHK:0;cm4_sp_mode 0
593 04:19:17.060972 MVN_1=0x00000000
594 04:19:17.065939 MVN_2=0x00000000
595 04:19:17.071761 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 04:19:17.072175 OPS=0x10
597 04:19:17.072397 ring efuse init
598 04:19:17.072605 chipver efuse init
599 04:19:17.077322 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 04:19:17.082890 [0.018960 Inits done]
601 04:19:17.083181 secure task start!
602 04:19:17.083395 high task start!
603 04:19:17.087473 low task start!
604 04:19:17.087767 run into bl31
605 04:19:17.094120 NOTICE: BL31: v1.3(release):4fc40b1
606 04:19:17.101910 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 04:19:17.102245 NOTICE: BL31: G12A normal boot!
608 04:19:17.127317 NOTICE: BL31: BL33 decompress pass
609 04:19:17.132902 ERROR: Error initializing runtime service opteed_fast
610 04:19:18.365881
611 04:19:18.366305
612 04:19:18.374508 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 04:19:18.375064
614 04:19:18.375402 Model: Libre Computer AML-A311D-CC Alta
615 04:19:18.582847 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 04:19:18.606221 DRAM: 2 GiB (effective 3.8 GiB)
617 04:19:18.749115 Core: 408 devices, 31 uclasses, devicetree: separate
618 04:19:18.754624 WDT: Not starting watchdog@f0d0
619 04:19:18.787584 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 04:19:18.799706 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 04:19:18.804802 ** Bad device specification mmc 0 **
622 04:19:18.815617 Card did not respond to voltage select! : -110
623 04:19:18.822794 ** Bad device specification mmc 0 **
624 04:19:18.823111 Couldn't find partition mmc 0
625 04:19:18.831019 Card did not respond to voltage select! : -110
626 04:19:18.836634 ** Bad device specification mmc 0 **
627 04:19:18.837041 Couldn't find partition mmc 0
628 04:19:18.841644 Error: could not access storage.
629 04:19:19.185138 Net: eth0: ethernet@ff3f0000
630 04:19:19.185540 starting USB...
631 04:19:19.436810 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 04:19:19.437356 Starting the controller
633 04:19:19.443771 USB XHCI 1.10
634 04:19:21.156817 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
635 04:19:21.157247 bl2_stage_init 0x81
636 04:19:21.162254 hw id: 0x0000 - pwm id 0x01
637 04:19:21.162532 bl2_stage_init 0xc1
638 04:19:21.162743 bl2_stage_init 0x02
639 04:19:21.162946
640 04:19:21.167800 L0:00000000
641 04:19:21.168093 L1:20000703
642 04:19:21.168307 L2:00008067
643 04:19:21.168514 L3:14000000
644 04:19:21.168716 B2:00402000
645 04:19:21.170789 B1:e0f83180
646 04:19:21.171041
647 04:19:21.171250 TE: 58150
648 04:19:21.171457
649 04:19:21.181757 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 04:19:21.182045
651 04:19:21.182256 Board ID = 1
652 04:19:21.182462 Set A53 clk to 24M
653 04:19:21.182667 Set A73 clk to 24M
654 04:19:21.187315 Set clk81 to 24M
655 04:19:21.187585 A53 clk: 1200 MHz
656 04:19:21.187792 A73 clk: 1200 MHz
657 04:19:21.191039 CLK81: 166.6M
658 04:19:21.191298 smccc: 00012aac
659 04:19:21.196650 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 04:19:21.196932 board id: 1
661 04:19:21.207005 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 04:19:21.217858 fw parse done
663 04:19:21.223697 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 04:19:21.265907 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 04:19:21.277603 PIEI prepare done
666 04:19:21.278316 fastboot data load
667 04:19:21.278943 fastboot data verify
668 04:19:21.283004 verify result: 266
669 04:19:21.288588 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 04:19:21.289291 LPDDR4 probe
671 04:19:21.289961 ddr clk to 1584MHz
672 04:19:21.296622 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 04:19:21.333168
674 04:19:21.333952 dmc_version 0001
675 04:19:21.340287 Check phy result
676 04:19:21.346398 INFO : End of CA training
677 04:19:21.346986 INFO : End of initialization
678 04:19:21.352031 INFO : Training has run successfully!
679 04:19:21.352755 Check phy result
680 04:19:21.357531 INFO : End of initialization
681 04:19:21.358179 INFO : End of read enable training
682 04:19:21.360785 INFO : End of fine write leveling
683 04:19:21.366358 INFO : End of Write leveling coarse delay
684 04:19:21.372078 INFO : Training has run successfully!
685 04:19:21.372788 Check phy result
686 04:19:21.373413 INFO : End of initialization
687 04:19:21.377691 INFO : End of read dq deskew training
688 04:19:21.381117 INFO : End of MPR read delay center optimization
689 04:19:21.386659 INFO : End of write delay center optimization
690 04:19:21.392222 INFO : End of read delay center optimization
691 04:19:21.392889 INFO : End of max read latency training
692 04:19:21.397818 INFO : Training has run successfully!
693 04:19:21.398500 1D training succeed
694 04:19:21.405906 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 04:19:21.453662 Check phy result
696 04:19:21.454414 INFO : End of initialization
697 04:19:21.475255 INFO : End of 2D read delay Voltage center optimization
698 04:19:21.494748 INFO : End of 2D read delay Voltage center optimization
699 04:19:21.547318 INFO : End of 2D write delay Voltage center optimization
700 04:19:21.596515 INFO : End of 2D write delay Voltage center optimization
701 04:19:21.602187 INFO : Training has run successfully!
702 04:19:21.602918
703 04:19:21.603708 channel==0
704 04:19:21.607661 RxClkDly_Margin_A0==88 ps 9
705 04:19:21.608419 TxDqDly_Margin_A0==98 ps 10
706 04:19:21.613239 RxClkDly_Margin_A1==88 ps 9
707 04:19:21.613919 TxDqDly_Margin_A1==98 ps 10
708 04:19:21.614542 TrainedVREFDQ_A0==74
709 04:19:21.618827 TrainedVREFDQ_A1==74
710 04:19:21.619544 VrefDac_Margin_A0==25
711 04:19:21.620191 DeviceVref_Margin_A0==40
712 04:19:21.624509 VrefDac_Margin_A1==25
713 04:19:21.625211 DeviceVref_Margin_A1==40
714 04:19:21.625818
715 04:19:21.626456
716 04:19:21.630092 channel==1
717 04:19:21.630743 RxClkDly_Margin_A0==98 ps 10
718 04:19:21.631324 TxDqDly_Margin_A0==98 ps 10
719 04:19:21.635571 RxClkDly_Margin_A1==88 ps 9
720 04:19:21.636293 TxDqDly_Margin_A1==88 ps 9
721 04:19:21.641227 TrainedVREFDQ_A0==77
722 04:19:21.641880 TrainedVREFDQ_A1==77
723 04:19:21.642462 VrefDac_Margin_A0==22
724 04:19:21.646883 DeviceVref_Margin_A0==37
725 04:19:21.647529 VrefDac_Margin_A1==24
726 04:19:21.652417 DeviceVref_Margin_A1==37
727 04:19:21.653202
728 04:19:21.653830 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 04:19:21.654464
730 04:19:21.685996 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
731 04:19:21.686426 2D training succeed
732 04:19:21.691398 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 04:19:21.697055 auto size-- 65535DDR cs0 size: 2048MB
734 04:19:21.697390 DDR cs1 size: 2048MB
735 04:19:21.702694 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 04:19:21.703068 cs0 DataBus test pass
737 04:19:21.708210 cs1 DataBus test pass
738 04:19:21.708583 cs0 AddrBus test pass
739 04:19:21.708936 cs1 AddrBus test pass
740 04:19:21.709257
741 04:19:21.713912 100bdlr_step_size ps== 420
742 04:19:21.714243 result report
743 04:19:21.719442 boot times 0Enable ddr reg access
744 04:19:21.723851 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 04:19:21.737824 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 04:19:22.310323 0.0;M3 CHK:0;cm4_sp_mode 0
747 04:19:22.310977 MVN_1=0x00000000
748 04:19:22.315891 MVN_2=0x00000000
749 04:19:22.321647 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 04:19:22.322217 OPS=0x10
751 04:19:22.322684 ring efuse init
752 04:19:22.323117 chipver efuse init
753 04:19:22.327235 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 04:19:22.332858 [0.018960 Inits done]
755 04:19:22.333426 secure task start!
756 04:19:22.333893 high task start!
757 04:19:22.336450 low task start!
758 04:19:22.336986 run into bl31
759 04:19:22.344092 NOTICE: BL31: v1.3(release):4fc40b1
760 04:19:22.351000 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 04:19:22.351548 NOTICE: BL31: G12A normal boot!
762 04:19:22.377245 NOTICE: BL31: BL33 decompress pass
763 04:19:22.381989 ERROR: Error initializing runtime service opteed_fast
764 04:19:23.616076
765 04:19:23.616707
766 04:19:23.623876 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 04:19:23.624246
768 04:19:23.624502 Model: Libre Computer AML-A311D-CC Alta
769 04:19:23.832300 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 04:19:23.855561 DRAM: 2 GiB (effective 3.8 GiB)
771 04:19:23.999061 Core: 408 devices, 31 uclasses, devicetree: separate
772 04:19:24.004296 WDT: Not starting watchdog@f0d0
773 04:19:24.037207 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 04:19:24.049720 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 04:19:24.054080 ** Bad device specification mmc 0 **
776 04:19:24.065003 Card did not respond to voltage select! : -110
777 04:19:24.071723 ** Bad device specification mmc 0 **
778 04:19:24.072439 Couldn't find partition mmc 0
779 04:19:24.080928 Card did not respond to voltage select! : -110
780 04:19:24.086467 ** Bad device specification mmc 0 **
781 04:19:24.087003 Couldn't find partition mmc 0
782 04:19:24.091643 Error: could not access storage.
783 04:19:24.433236 Net: eth0: ethernet@ff3f0000
784 04:19:24.433872 starting USB...
785 04:19:24.686899 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 04:19:24.687323 Starting the controller
787 04:19:24.694145 USB XHCI 1.10
788 04:19:26.857022 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 04:19:26.857456 bl2_stage_init 0x01
790 04:19:26.857689 bl2_stage_init 0x81
791 04:19:26.862230 hw id: 0x0000 - pwm id 0x01
792 04:19:26.862558 bl2_stage_init 0xc1
793 04:19:26.862786 bl2_stage_init 0x02
794 04:19:26.863000
795 04:19:26.867866 L0:00000000
796 04:19:26.868340 L1:20000703
797 04:19:26.868716 L2:00008067
798 04:19:26.869073 L3:14000000
799 04:19:26.870818 B2:00402000
800 04:19:26.871215 B1:e0f83180
801 04:19:26.871569
802 04:19:26.871821 TE: 58159
803 04:19:26.872073
804 04:19:26.881885 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 04:19:26.882331
806 04:19:26.882706 Board ID = 1
807 04:19:26.883059 Set A53 clk to 24M
808 04:19:26.883417 Set A73 clk to 24M
809 04:19:26.887601 Set clk81 to 24M
810 04:19:26.887910 A53 clk: 1200 MHz
811 04:19:26.888177 A73 clk: 1200 MHz
812 04:19:26.892920 CLK81: 166.6M
813 04:19:26.893216 smccc: 00012ab5
814 04:19:26.898480 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 04:19:26.898770 board id: 1
816 04:19:26.904080 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 04:19:26.917901 fw parse done
818 04:19:26.923825 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 04:19:26.966445 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 04:19:26.977356 PIEI prepare done
821 04:19:26.977675 fastboot data load
822 04:19:26.977909 fastboot data verify
823 04:19:26.982967 verify result: 266
824 04:19:26.988499 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 04:19:26.988788 LPDDR4 probe
826 04:19:26.989015 ddr clk to 1584MHz
827 04:19:26.996831 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 04:19:27.034027
829 04:19:27.034597 dmc_version 0001
830 04:19:27.040581 Check phy result
831 04:19:27.046484 INFO : End of CA training
832 04:19:27.047009 INFO : End of initialization
833 04:19:27.052080 INFO : Training has run successfully!
834 04:19:27.052596 Check phy result
835 04:19:27.057736 INFO : End of initialization
836 04:19:27.058272 INFO : End of read enable training
837 04:19:27.063281 INFO : End of fine write leveling
838 04:19:27.068917 INFO : End of Write leveling coarse delay
839 04:19:27.069218 INFO : Training has run successfully!
840 04:19:27.069457 Check phy result
841 04:19:27.074320 INFO : End of initialization
842 04:19:27.074617 INFO : End of read dq deskew training
843 04:19:27.079939 INFO : End of MPR read delay center optimization
844 04:19:27.085522 INFO : End of write delay center optimization
845 04:19:27.091543 INFO : End of read delay center optimization
846 04:19:27.091852 INFO : End of max read latency training
847 04:19:27.096760 INFO : Training has run successfully!
848 04:19:27.097066 1D training succeed
849 04:19:27.105933 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 04:19:27.153662 Check phy result
851 04:19:27.154271 INFO : End of initialization
852 04:19:27.175325 INFO : End of 2D read delay Voltage center optimization
853 04:19:27.195571 INFO : End of 2D read delay Voltage center optimization
854 04:19:27.247612 INFO : End of 2D write delay Voltage center optimization
855 04:19:27.296989 INFO : End of 2D write delay Voltage center optimization
856 04:19:27.302509 INFO : Training has run successfully!
857 04:19:27.303103
858 04:19:27.303625 channel==0
859 04:19:27.308161 RxClkDly_Margin_A0==88 ps 9
860 04:19:27.308721 TxDqDly_Margin_A0==98 ps 10
861 04:19:27.313786 RxClkDly_Margin_A1==88 ps 9
862 04:19:27.314332 TxDqDly_Margin_A1==88 ps 9
863 04:19:27.314806 TrainedVREFDQ_A0==74
864 04:19:27.319332 TrainedVREFDQ_A1==74
865 04:19:27.319879 VrefDac_Margin_A0==25
866 04:19:27.320400 DeviceVref_Margin_A0==40
867 04:19:27.324964 VrefDac_Margin_A1==25
868 04:19:27.325516 DeviceVref_Margin_A1==40
869 04:19:27.325985
870 04:19:27.326443
871 04:19:27.326908 channel==1
872 04:19:27.330472 RxClkDly_Margin_A0==98 ps 10
873 04:19:27.331123 TxDqDly_Margin_A0==98 ps 10
874 04:19:27.336068 RxClkDly_Margin_A1==98 ps 10
875 04:19:27.336558 TxDqDly_Margin_A1==88 ps 9
876 04:19:27.341580 TrainedVREFDQ_A0==77
877 04:19:27.342088 TrainedVREFDQ_A1==77
878 04:19:27.342528 VrefDac_Margin_A0==22
879 04:19:27.347219 DeviceVref_Margin_A0==37
880 04:19:27.347758 VrefDac_Margin_A1==22
881 04:19:27.352843 DeviceVref_Margin_A1==37
882 04:19:27.353385
883 04:19:27.353823 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 04:19:27.354253
885 04:19:27.386565 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000016 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
886 04:19:27.387185 2D training succeed
887 04:19:27.392124 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 04:19:27.397622 auto size-- 65535DDR cs0 size: 2048MB
889 04:19:27.398201 DDR cs1 size: 2048MB
890 04:19:27.403271 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 04:19:27.403868 cs0 DataBus test pass
892 04:19:27.408807 cs1 DataBus test pass
893 04:19:27.409362 cs0 AddrBus test pass
894 04:19:27.409826 cs1 AddrBus test pass
895 04:19:27.410276
896 04:19:27.414387 100bdlr_step_size ps== 420
897 04:19:27.414933 result report
898 04:19:27.420037 boot times 0Enable ddr reg access
899 04:19:27.425346 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 04:19:27.437943 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 04:19:28.012536 0.0;M3 CHK:0;cm4_sp_mode 0
902 04:19:28.013208 MVN_1=0x00000000
903 04:19:28.017959 MVN_2=0x00000000
904 04:19:28.023823 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 04:19:28.024365 OPS=0x10
906 04:19:28.024833 ring efuse init
907 04:19:28.025284 chipver efuse init
908 04:19:28.029338 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 04:19:28.034958 [0.018961 Inits done]
910 04:19:28.035486 secure task start!
911 04:19:28.035948 high task start!
912 04:19:28.039514 low task start!
913 04:19:28.040012 run into bl31
914 04:19:28.046714 NOTICE: BL31: v1.3(release):4fc40b1
915 04:19:28.054133 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 04:19:28.054695 NOTICE: BL31: G12A normal boot!
917 04:19:28.079450 NOTICE: BL31: BL33 decompress pass
918 04:19:28.085115 ERROR: Error initializing runtime service opteed_fast
919 04:19:29.318273
920 04:19:29.318909
921 04:19:29.326035 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 04:19:29.326543
923 04:19:29.327008 Model: Libre Computer AML-A311D-CC Alta
924 04:19:29.534055 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 04:19:29.558290 DRAM: 2 GiB (effective 3.8 GiB)
926 04:19:29.701486 Core: 408 devices, 31 uclasses, devicetree: separate
927 04:19:29.707153 WDT: Not starting watchdog@f0d0
928 04:19:29.739476 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 04:19:29.751858 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 04:19:29.756744 ** Bad device specification mmc 0 **
931 04:19:29.767091 Card did not respond to voltage select! : -110
932 04:19:29.775061 ** Bad device specification mmc 0 **
933 04:19:29.775562 Couldn't find partition mmc 0
934 04:19:29.783265 Card did not respond to voltage select! : -110
935 04:19:29.788630 ** Bad device specification mmc 0 **
936 04:19:29.789124 Couldn't find partition mmc 0
937 04:19:29.793688 Error: could not access storage.
938 04:19:30.137283 Net: eth0: ethernet@ff3f0000
939 04:19:30.137839 starting USB...
940 04:19:30.388058 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 04:19:30.388602 Starting the controller
942 04:19:30.397149 USB XHCI 1.10
943 04:19:31.948852 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 04:19:31.957234 scanning usb for storage devices... 0 Storage Device(s) found
946 04:19:32.008868 Hit any key to stop autoboot: 1
947 04:19:32.009709 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
948 04:19:32.010356 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
949 04:19:32.010881 Setting prompt string to ['=>']
950 04:19:32.011412 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
951 04:19:32.024667 0
952 04:19:32.025622 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 04:19:32.026172 Sending with 10 millisecond of delay
955 04:19:33.161077 => setenv autoload no
956 04:19:33.171940 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:28)
957 04:19:33.177401 setenv autoload no
958 04:19:33.178179 Sending with 10 millisecond of delay
960 04:19:34.975092 => setenv initrd_high 0xffffffff
961 04:19:34.985920 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
962 04:19:34.986833 setenv initrd_high 0xffffffff
963 04:19:34.987604 Sending with 10 millisecond of delay
965 04:19:36.603907 => setenv fdt_high 0xffffffff
966 04:19:36.614777 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
967 04:19:36.615633 setenv fdt_high 0xffffffff
968 04:19:36.616428 Sending with 10 millisecond of delay
970 04:19:36.908353 => dhcp
971 04:19:36.919168 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
972 04:19:36.920076 dhcp
973 04:19:36.920563 Speed: 1000, full duplex
974 04:19:36.921015 BOOTP broadcast 1
975 04:19:36.927282 DHCP client bound to address 192.168.6.27 (8 ms)
976 04:19:36.928051 Sending with 10 millisecond of delay
978 04:19:38.605174 => setenv serverip 192.168.6.2
979 04:19:38.616086 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
980 04:19:38.617061 setenv serverip 192.168.6.2
981 04:19:38.617844 Sending with 10 millisecond of delay
983 04:19:42.342276 => tftpboot 0x01080000 937968/tftp-deploy-bvwwwu6u/kernel/uImage
984 04:19:42.353118 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
985 04:19:42.354016 tftpboot 0x01080000 937968/tftp-deploy-bvwwwu6u/kernel/uImage
986 04:19:42.354505 Speed: 1000, full duplex
987 04:19:42.354965 Using ethernet@ff3f0000 device
988 04:19:42.356182 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 04:19:42.361516 Filename '937968/tftp-deploy-bvwwwu6u/kernel/uImage'.
990 04:19:42.365370 Load address: 0x1080000
991 04:19:44.323183 Loading: *################################## UDP wrong checksum 000000ff 000023f8
992 04:19:44.333665 UDP wrong checksum 000000ff 0000b8ea
993 04:19:45.339332 ################ 43.6 MiB
994 04:19:45.339931 14.6 MiB/s
995 04:19:45.340451 done
996 04:19:45.342763 Bytes transferred = 45713984 (2b98a40 hex)
997 04:19:45.343488 Sending with 10 millisecond of delay
999 04:19:50.029504 => tftpboot 0x08000000 937968/tftp-deploy-bvwwwu6u/ramdisk/ramdisk.cpio.gz.uboot
1000 04:19:50.040265 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1001 04:19:50.041096 tftpboot 0x08000000 937968/tftp-deploy-bvwwwu6u/ramdisk/ramdisk.cpio.gz.uboot
1002 04:19:50.041519 Speed: 1000, full duplex
1003 04:19:50.041914 Using ethernet@ff3f0000 device
1004 04:19:50.042878 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1005 04:19:50.051477 Filename '937968/tftp-deploy-bvwwwu6u/ramdisk/ramdisk.cpio.gz.uboot'.
1006 04:19:50.051915 Load address: 0x8000000
1007 04:19:56.647110 Loading: *################T ################################# UDP wrong checksum 00000005 00008d68
1008 04:20:01.647839 T UDP wrong checksum 00000005 00008d68
1009 04:20:11.649875 T T UDP wrong checksum 00000005 00008d68
1010 04:20:14.928630 UDP wrong checksum 000000ff 000040e4
1011 04:20:14.950664 UDP wrong checksum 000000ff 0000d7d6
1012 04:20:31.653170 T T T UDP wrong checksum 00000005 00008d68
1013 04:20:46.659174 T T T
1014 04:20:46.659832 Retry count exceeded; starting again
1016 04:20:46.661343 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1019 04:20:46.663294 end: 2.4 uboot-commands (duration 00:01:46) [common]
1021 04:20:46.664802 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1023 04:20:46.666140 end: 2 uboot-action (duration 00:01:46) [common]
1025 04:20:46.667796 Cleaning after the job
1026 04:20:46.668422 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/ramdisk
1027 04:20:46.669750 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/kernel
1028 04:20:46.713960 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/dtb
1029 04:20:46.714816 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/nfsrootfs
1030 04:20:46.946072 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937968/tftp-deploy-bvwwwu6u/modules
1031 04:20:46.967870 start: 4.1 power-off (timeout 00:00:30) [common]
1032 04:20:46.968565 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1033 04:20:47.002986 >> OK - accepted request
1034 04:20:47.005236 Returned 0 in 0 seconds
1035 04:20:47.106068 end: 4.1 power-off (duration 00:00:00) [common]
1037 04:20:47.107156 start: 4.2 read-feedback (timeout 00:10:00) [common]
1038 04:20:47.107849 Listened to connection for namespace 'common' for up to 1s
1039 04:20:48.108191 Finalising connection for namespace 'common'
1040 04:20:48.108775 Disconnecting from shell: Finalise
1041 04:20:48.109122 =>
1042 04:20:48.209899 end: 4.2 read-feedback (duration 00:00:01) [common]
1043 04:20:48.210468 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/937968
1044 04:20:50.943998 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/937968
1045 04:20:50.944636 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.