Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 04:10:55.640477 lava-dispatcher, installed at version: 2024.01
2 04:10:55.641362 start: 0 validate
3 04:10:55.641912 Start time: 2024-11-05 04:10:55.641881+00:00 (UTC)
4 04:10:55.642534 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 04:10:55.643154 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 04:10:55.693580 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 04:10:55.694460 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 04:10:55.725304 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 04:10:55.725959 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 04:10:55.759442 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 04:10:55.760188 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 04:10:55.799336 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 04:10:55.799918 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-77-g2e1b3cc9d7f7%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 04:10:55.854543 validate duration: 0.21
16 04:10:55.855642 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 04:10:55.856081 start: 1.1 download-retry (timeout 00:10:00) [common]
18 04:10:55.856432 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 04:10:55.857113 Not decompressing ramdisk as can be used compressed.
20 04:10:55.857644 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 04:10:55.857960 saving as /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/ramdisk/initrd.cpio.gz
22 04:10:55.858243 total size: 5628140 (5 MB)
23 04:10:55.898479 progress 0 % (0 MB)
24 04:10:55.906450 progress 5 % (0 MB)
25 04:10:55.911215 progress 10 % (0 MB)
26 04:10:55.916109 progress 15 % (0 MB)
27 04:10:55.920711 progress 20 % (1 MB)
28 04:10:55.924674 progress 25 % (1 MB)
29 04:10:55.929104 progress 30 % (1 MB)
30 04:10:55.933649 progress 35 % (1 MB)
31 04:10:55.937680 progress 40 % (2 MB)
32 04:10:55.942165 progress 45 % (2 MB)
33 04:10:55.946231 progress 50 % (2 MB)
34 04:10:55.950644 progress 55 % (2 MB)
35 04:10:55.955034 progress 60 % (3 MB)
36 04:10:55.959033 progress 65 % (3 MB)
37 04:10:55.963561 progress 70 % (3 MB)
38 04:10:55.967589 progress 75 % (4 MB)
39 04:10:55.972030 progress 80 % (4 MB)
40 04:10:55.976083 progress 85 % (4 MB)
41 04:10:55.980502 progress 90 % (4 MB)
42 04:10:55.984795 progress 95 % (5 MB)
43 04:10:55.988210 progress 100 % (5 MB)
44 04:10:55.988920 5 MB downloaded in 0.13 s (41.08 MB/s)
45 04:10:55.989551 end: 1.1.1 http-download (duration 00:00:00) [common]
47 04:10:55.990509 end: 1.1 download-retry (duration 00:00:00) [common]
48 04:10:55.990820 start: 1.2 download-retry (timeout 00:10:00) [common]
49 04:10:55.991093 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 04:10:55.991607 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig/gcc-12/kernel/Image
51 04:10:55.991882 saving as /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/kernel/Image
52 04:10:55.992130 total size: 45713920 (43 MB)
53 04:10:55.992347 No compression specified
54 04:10:56.029569 progress 0 % (0 MB)
55 04:10:56.058144 progress 5 % (2 MB)
56 04:10:56.087188 progress 10 % (4 MB)
57 04:10:56.115712 progress 15 % (6 MB)
58 04:10:56.144326 progress 20 % (8 MB)
59 04:10:56.172723 progress 25 % (10 MB)
60 04:10:56.201258 progress 30 % (13 MB)
61 04:10:56.229661 progress 35 % (15 MB)
62 04:10:56.258140 progress 40 % (17 MB)
63 04:10:56.286444 progress 45 % (19 MB)
64 04:10:56.314464 progress 50 % (21 MB)
65 04:10:56.342570 progress 55 % (24 MB)
66 04:10:56.370880 progress 60 % (26 MB)
67 04:10:56.399107 progress 65 % (28 MB)
68 04:10:56.428394 progress 70 % (30 MB)
69 04:10:56.457323 progress 75 % (32 MB)
70 04:10:56.486466 progress 80 % (34 MB)
71 04:10:56.514108 progress 85 % (37 MB)
72 04:10:56.542050 progress 90 % (39 MB)
73 04:10:56.569842 progress 95 % (41 MB)
74 04:10:56.597278 progress 100 % (43 MB)
75 04:10:56.597849 43 MB downloaded in 0.61 s (71.98 MB/s)
76 04:10:56.598327 end: 1.2.1 http-download (duration 00:00:01) [common]
78 04:10:56.599144 end: 1.2 download-retry (duration 00:00:01) [common]
79 04:10:56.599419 start: 1.3 download-retry (timeout 00:09:59) [common]
80 04:10:56.599683 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 04:10:56.600159 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 04:10:56.600415 saving as /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 04:10:56.600622 total size: 53209 (0 MB)
84 04:10:56.600832 No compression specified
85 04:10:56.635053 progress 61 % (0 MB)
86 04:10:56.635916 progress 100 % (0 MB)
87 04:10:56.636600 0 MB downloaded in 0.04 s (1.41 MB/s)
88 04:10:56.637081 end: 1.3.1 http-download (duration 00:00:00) [common]
90 04:10:56.637902 end: 1.3 download-retry (duration 00:00:00) [common]
91 04:10:56.638170 start: 1.4 download-retry (timeout 00:09:59) [common]
92 04:10:56.638435 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 04:10:56.638898 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 04:10:56.639149 saving as /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/nfsrootfs/full.rootfs.tar
95 04:10:56.639354 total size: 474398908 (452 MB)
96 04:10:56.639566 Using unxz to decompress xz
97 04:10:56.676875 progress 0 % (0 MB)
98 04:10:57.764810 progress 5 % (22 MB)
99 04:10:59.196239 progress 10 % (45 MB)
100 04:10:59.627337 progress 15 % (67 MB)
101 04:11:00.447976 progress 20 % (90 MB)
102 04:11:00.996892 progress 25 % (113 MB)
103 04:11:01.359777 progress 30 % (135 MB)
104 04:11:02.011842 progress 35 % (158 MB)
105 04:11:02.904138 progress 40 % (181 MB)
106 04:11:03.638709 progress 45 % (203 MB)
107 04:11:04.203874 progress 50 % (226 MB)
108 04:11:04.888453 progress 55 % (248 MB)
109 04:11:06.280186 progress 60 % (271 MB)
110 04:11:07.739591 progress 65 % (294 MB)
111 04:11:09.351922 progress 70 % (316 MB)
112 04:11:12.530415 progress 75 % (339 MB)
113 04:11:14.993734 progress 80 % (361 MB)
114 04:11:17.945496 progress 85 % (384 MB)
115 04:11:21.124771 progress 90 % (407 MB)
116 04:11:24.322346 progress 95 % (429 MB)
117 04:11:27.482816 progress 100 % (452 MB)
118 04:11:27.495741 452 MB downloaded in 30.86 s (14.66 MB/s)
119 04:11:27.496705 end: 1.4.1 http-download (duration 00:00:31) [common]
121 04:11:27.498338 end: 1.4 download-retry (duration 00:00:31) [common]
122 04:11:27.498870 start: 1.5 download-retry (timeout 00:09:28) [common]
123 04:11:27.499607 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 04:11:27.500605 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-77-g2e1b3cc9d7f7/arm64/defconfig/gcc-12/modules.tar.xz
125 04:11:27.501092 saving as /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/modules/modules.tar
126 04:11:27.501511 total size: 11608444 (11 MB)
127 04:11:27.501934 Using unxz to decompress xz
128 04:11:27.551002 progress 0 % (0 MB)
129 04:11:27.618131 progress 5 % (0 MB)
130 04:11:27.692619 progress 10 % (1 MB)
131 04:11:27.791099 progress 15 % (1 MB)
132 04:11:27.883924 progress 20 % (2 MB)
133 04:11:27.963510 progress 25 % (2 MB)
134 04:11:28.039604 progress 30 % (3 MB)
135 04:11:28.114278 progress 35 % (3 MB)
136 04:11:28.191489 progress 40 % (4 MB)
137 04:11:28.268473 progress 45 % (5 MB)
138 04:11:28.352909 progress 50 % (5 MB)
139 04:11:28.430741 progress 55 % (6 MB)
140 04:11:28.516442 progress 60 % (6 MB)
141 04:11:28.597664 progress 65 % (7 MB)
142 04:11:28.674382 progress 70 % (7 MB)
143 04:11:28.756391 progress 75 % (8 MB)
144 04:11:28.840713 progress 80 % (8 MB)
145 04:11:28.921286 progress 85 % (9 MB)
146 04:11:29.000160 progress 90 % (9 MB)
147 04:11:29.078705 progress 95 % (10 MB)
148 04:11:29.155815 progress 100 % (11 MB)
149 04:11:29.167357 11 MB downloaded in 1.67 s (6.65 MB/s)
150 04:11:29.168174 end: 1.5.1 http-download (duration 00:00:02) [common]
152 04:11:29.170248 end: 1.5 download-retry (duration 00:00:02) [common]
153 04:11:29.170919 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 04:11:29.171589 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 04:11:45.279681 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/937942/extract-nfsrootfs-r76sstuf
156 04:11:45.280307 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 04:11:45.280597 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 04:11:45.281292 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf
159 04:11:45.281790 makedir: /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin
160 04:11:45.282228 makedir: /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/tests
161 04:11:45.282573 makedir: /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/results
162 04:11:45.282899 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-add-keys
163 04:11:45.283415 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-add-sources
164 04:11:45.283920 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-background-process-start
165 04:11:45.284464 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-background-process-stop
166 04:11:45.284995 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-common-functions
167 04:11:45.285489 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-echo-ipv4
168 04:11:45.285971 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-install-packages
169 04:11:45.286461 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-installed-packages
170 04:11:45.286971 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-os-build
171 04:11:45.287461 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-probe-channel
172 04:11:45.287946 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-probe-ip
173 04:11:45.288464 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-target-ip
174 04:11:45.288954 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-target-mac
175 04:11:45.289437 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-target-storage
176 04:11:45.289925 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-test-case
177 04:11:45.290462 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-test-event
178 04:11:45.290983 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-test-feedback
179 04:11:45.291465 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-test-raise
180 04:11:45.291944 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-test-reference
181 04:11:45.292490 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-test-runner
182 04:11:45.292988 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-test-set
183 04:11:45.293476 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-test-shell
184 04:11:45.293959 Updating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-install-packages (oe)
185 04:11:45.294498 Updating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/bin/lava-installed-packages (oe)
186 04:11:45.294951 Creating /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/environment
187 04:11:45.295328 LAVA metadata
188 04:11:45.295580 - LAVA_JOB_ID=937942
189 04:11:45.295793 - LAVA_DISPATCHER_IP=192.168.6.2
190 04:11:45.296179 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 04:11:45.297147 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 04:11:45.297454 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 04:11:45.297658 skipped lava-vland-overlay
194 04:11:45.297897 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 04:11:45.298148 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 04:11:45.298362 skipped lava-multinode-overlay
197 04:11:45.298600 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 04:11:45.298848 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 04:11:45.299093 Loading test definitions
200 04:11:45.299369 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 04:11:45.299586 Using /lava-937942 at stage 0
202 04:11:45.300871 uuid=937942_1.6.2.4.1 testdef=None
203 04:11:45.301182 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 04:11:45.301445 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 04:11:45.303184 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 04:11:45.303965 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 04:11:45.306211 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 04:11:45.307034 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 04:11:45.309136 runner path: /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 937942_1.6.2.4.1
212 04:11:45.309718 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 04:11:45.310466 Creating lava-test-runner.conf files
215 04:11:45.310662 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/937942/lava-overlay-k3c0qlbf/lava-937942/0 for stage 0
216 04:11:45.310995 - 0_v4l2-decoder-conformance-vp9
217 04:11:45.311329 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 04:11:45.311598 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 04:11:45.333497 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 04:11:45.333885 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 04:11:45.334145 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 04:11:45.334409 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 04:11:45.334669 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 04:11:45.962230 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 04:11:45.962695 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 04:11:45.962963 extracting modules file /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/937942/extract-nfsrootfs-r76sstuf
227 04:11:47.353580 extracting modules file /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/modules/modules.tar to /var/lib/lava/dispatcher/tmp/937942/extract-overlay-ramdisk-qbu4jsw_/ramdisk
228 04:11:48.755740 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 04:11:48.756253 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 04:11:48.756547 [common] Applying overlay to NFS
231 04:11:48.756768 [common] Applying overlay /var/lib/lava/dispatcher/tmp/937942/compress-overlay-457fam16/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/937942/extract-nfsrootfs-r76sstuf
232 04:11:48.786088 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 04:11:48.786506 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 04:11:48.786798 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 04:11:48.787040 Converting downloaded kernel to a uImage
236 04:11:48.787359 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/kernel/Image /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/kernel/uImage
237 04:11:49.234897 output: Image Name:
238 04:11:49.235325 output: Created: Tue Nov 5 04:11:48 2024
239 04:11:49.235551 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 04:11:49.235766 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 04:11:49.235973 output: Load Address: 01080000
242 04:11:49.236213 output: Entry Point: 01080000
243 04:11:49.236419 output:
244 04:11:49.236761 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 04:11:49.237037 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 04:11:49.237314 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 04:11:49.237578 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 04:11:49.237843 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 04:11:49.238105 Building ramdisk /var/lib/lava/dispatcher/tmp/937942/extract-overlay-ramdisk-qbu4jsw_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/937942/extract-overlay-ramdisk-qbu4jsw_/ramdisk
250 04:11:51.599310 >> 166825 blocks
251 04:11:59.282051 Adding RAMdisk u-boot header.
252 04:11:59.282701 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/937942/extract-overlay-ramdisk-qbu4jsw_/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/937942/extract-overlay-ramdisk-qbu4jsw_/ramdisk.cpio.gz.uboot
253 04:11:59.527383 output: Image Name:
254 04:11:59.527835 output: Created: Tue Nov 5 04:11:59 2024
255 04:11:59.528376 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 04:11:59.528855 output: Data Size: 23432107 Bytes = 22882.92 KiB = 22.35 MiB
257 04:11:59.529310 output: Load Address: 00000000
258 04:11:59.529754 output: Entry Point: 00000000
259 04:11:59.530195 output:
260 04:11:59.531340 rename /var/lib/lava/dispatcher/tmp/937942/extract-overlay-ramdisk-qbu4jsw_/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/ramdisk/ramdisk.cpio.gz.uboot
261 04:11:59.532152 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 04:11:59.532770 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 04:11:59.533363 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 04:11:59.533876 No LXC device requested
265 04:11:59.534441 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 04:11:59.535010 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 04:11:59.535568 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 04:11:59.536058 Checking files for TFTP limit of 4294967296 bytes.
269 04:11:59.538997 end: 1 tftp-deploy (duration 00:01:04) [common]
270 04:11:59.539631 start: 2 uboot-action (timeout 00:05:00) [common]
271 04:11:59.540257 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 04:11:59.540822 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 04:11:59.541385 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 04:11:59.541966 Using kernel file from prepare-kernel: 937942/tftp-deploy-gszvcr_h/kernel/uImage
275 04:11:59.542664 substitutions:
276 04:11:59.543118 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 04:11:59.543568 - {DTB_ADDR}: 0x01070000
278 04:11:59.544055 - {DTB}: 937942/tftp-deploy-gszvcr_h/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 04:11:59.544513 - {INITRD}: 937942/tftp-deploy-gszvcr_h/ramdisk/ramdisk.cpio.gz.uboot
280 04:11:59.544958 - {KERNEL_ADDR}: 0x01080000
281 04:11:59.545399 - {KERNEL}: 937942/tftp-deploy-gszvcr_h/kernel/uImage
282 04:11:59.545840 - {LAVA_MAC}: None
283 04:11:59.546323 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/937942/extract-nfsrootfs-r76sstuf
284 04:11:59.546772 - {NFS_SERVER_IP}: 192.168.6.2
285 04:11:59.547208 - {PRESEED_CONFIG}: None
286 04:11:59.547640 - {PRESEED_LOCAL}: None
287 04:11:59.548107 - {RAMDISK_ADDR}: 0x08000000
288 04:11:59.548545 - {RAMDISK}: 937942/tftp-deploy-gszvcr_h/ramdisk/ramdisk.cpio.gz.uboot
289 04:11:59.548982 - {ROOT_PART}: None
290 04:11:59.549415 - {ROOT}: None
291 04:11:59.549844 - {SERVER_IP}: 192.168.6.2
292 04:11:59.550274 - {TEE_ADDR}: 0x83000000
293 04:11:59.550706 - {TEE}: None
294 04:11:59.551139 Parsed boot commands:
295 04:11:59.551563 - setenv autoload no
296 04:11:59.552012 - setenv initrd_high 0xffffffff
297 04:11:59.552454 - setenv fdt_high 0xffffffff
298 04:11:59.552886 - dhcp
299 04:11:59.553315 - setenv serverip 192.168.6.2
300 04:11:59.553743 - tftpboot 0x01080000 937942/tftp-deploy-gszvcr_h/kernel/uImage
301 04:11:59.554172 - tftpboot 0x08000000 937942/tftp-deploy-gszvcr_h/ramdisk/ramdisk.cpio.gz.uboot
302 04:11:59.554602 - tftpboot 0x01070000 937942/tftp-deploy-gszvcr_h/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 04:11:59.555038 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/937942/extract-nfsrootfs-r76sstuf,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 04:11:59.555484 - bootm 0x01080000 0x08000000 0x01070000
305 04:11:59.556071 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 04:11:59.557745 start: 2.3 connect-device (timeout 00:05:00) [common]
308 04:11:59.558220 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 04:11:59.573974 Setting prompt string to ['lava-test: # ']
310 04:11:59.575673 end: 2.3 connect-device (duration 00:00:00) [common]
311 04:11:59.576419 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 04:11:59.577047 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 04:11:59.577636 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 04:11:59.579163 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 04:11:59.613890 >> OK - accepted request
316 04:11:59.616030 Returned 0 in 0 seconds
317 04:11:59.717324 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 04:11:59.719063 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 04:11:59.719703 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 04:11:59.720353 Setting prompt string to ['Hit any key to stop autoboot']
322 04:11:59.720890 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 04:11:59.722606 Trying 192.168.56.21...
324 04:11:59.723131 Connected to conserv1.
325 04:11:59.723612 Escape character is '^]'.
326 04:11:59.724132
327 04:11:59.724615 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 04:11:59.725095
329 04:12:07.372396 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 04:12:07.373032 bl2_stage_init 0x01
331 04:12:07.373494 bl2_stage_init 0x81
332 04:12:07.378084 hw id: 0x0000 - pwm id 0x01
333 04:12:07.378599 bl2_stage_init 0xc1
334 04:12:07.383740 bl2_stage_init 0x02
335 04:12:07.384307
336 04:12:07.384771 L0:00000000
337 04:12:07.385218 L1:00000703
338 04:12:07.385660 L2:00008067
339 04:12:07.386094 L3:15000000
340 04:12:07.389257 S1:00000000
341 04:12:07.389764 B2:20282000
342 04:12:07.390216 B1:a0f83180
343 04:12:07.390660
344 04:12:07.391106 TE: 71598
345 04:12:07.391546
346 04:12:07.394885 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 04:12:07.395390
348 04:12:07.400399 Board ID = 1
349 04:12:07.400896 Set cpu clk to 24M
350 04:12:07.401348 Set clk81 to 24M
351 04:12:07.405975 Use GP1_pll as DSU clk.
352 04:12:07.406472 DSU clk: 1200 Mhz
353 04:12:07.406922 CPU clk: 1200 MHz
354 04:12:07.411683 Set clk81 to 166.6M
355 04:12:07.417109 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 04:12:07.417607 board id: 1
357 04:12:07.423746 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 04:12:07.435020 fw parse done
359 04:12:07.440932 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 04:12:07.482722 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 04:12:07.494673 PIEI prepare done
362 04:12:07.495166 fastboot data load
363 04:12:07.495621 fastboot data verify
364 04:12:07.500115 verify result: 266
365 04:12:07.505757 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 04:12:07.506252 LPDDR4 probe
367 04:12:07.506697 ddr clk to 1584MHz
368 04:12:07.513561 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 04:12:07.550791
370 04:12:07.551294 dmc_version 0001
371 04:12:07.557724 Check phy result
372 04:12:07.563564 INFO : End of CA training
373 04:12:07.564078 INFO : End of initialization
374 04:12:07.569069 INFO : Training has run successfully!
375 04:12:07.569557 Check phy result
376 04:12:07.574748 INFO : End of initialization
377 04:12:07.575233 INFO : End of read enable training
378 04:12:07.580264 INFO : End of fine write leveling
379 04:12:07.585840 INFO : End of Write leveling coarse delay
380 04:12:07.586325 INFO : Training has run successfully!
381 04:12:07.586772 Check phy result
382 04:12:07.591561 INFO : End of initialization
383 04:12:07.592073 INFO : End of read dq deskew training
384 04:12:07.597092 INFO : End of MPR read delay center optimization
385 04:12:07.602689 INFO : End of write delay center optimization
386 04:12:07.608289 INFO : End of read delay center optimization
387 04:12:07.608774 INFO : End of max read latency training
388 04:12:07.613883 INFO : Training has run successfully!
389 04:12:07.614369 1D training succeed
390 04:12:07.623191 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 04:12:07.670766 Check phy result
392 04:12:07.671327 INFO : End of initialization
393 04:12:07.693100 INFO : End of 2D read delay Voltage center optimization
394 04:12:07.712274 INFO : End of 2D read delay Voltage center optimization
395 04:12:07.763239 INFO : End of 2D write delay Voltage center optimization
396 04:12:07.813401 INFO : End of 2D write delay Voltage center optimization
397 04:12:07.818842 INFO : Training has run successfully!
398 04:12:07.819339
399 04:12:07.819798 channel==0
400 04:12:07.824463 RxClkDly_Margin_A0==78 ps 8
401 04:12:07.824956 TxDqDly_Margin_A0==98 ps 10
402 04:12:07.827867 RxClkDly_Margin_A1==88 ps 9
403 04:12:07.828386 TxDqDly_Margin_A1==98 ps 10
404 04:12:07.833401 TrainedVREFDQ_A0==74
405 04:12:07.833888 TrainedVREFDQ_A1==75
406 04:12:07.834339 VrefDac_Margin_A0==22
407 04:12:07.838911 DeviceVref_Margin_A0==40
408 04:12:07.839396 VrefDac_Margin_A1==23
409 04:12:07.844681 DeviceVref_Margin_A1==39
410 04:12:07.845169
411 04:12:07.845614
412 04:12:07.846056 channel==1
413 04:12:07.846493 RxClkDly_Margin_A0==78 ps 8
414 04:12:07.850149 TxDqDly_Margin_A0==98 ps 10
415 04:12:07.850638 RxClkDly_Margin_A1==88 ps 9
416 04:12:07.855893 TxDqDly_Margin_A1==88 ps 9
417 04:12:07.856411 TrainedVREFDQ_A0==78
418 04:12:07.856861 TrainedVREFDQ_A1==77
419 04:12:07.861325 VrefDac_Margin_A0==22
420 04:12:07.861817 DeviceVref_Margin_A0==36
421 04:12:07.866958 VrefDac_Margin_A1==21
422 04:12:07.867442 DeviceVref_Margin_A1==37
423 04:12:07.867888
424 04:12:07.872608 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 04:12:07.873098
426 04:12:07.900581 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000062
427 04:12:07.906085 2D training succeed
428 04:12:07.911721 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 04:12:07.912246 auto size-- 65535DDR cs0 size: 2048MB
430 04:12:07.917323 DDR cs1 size: 2048MB
431 04:12:07.917812 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 04:12:07.922889 cs0 DataBus test pass
433 04:12:07.923378 cs1 DataBus test pass
434 04:12:07.923824 cs0 AddrBus test pass
435 04:12:07.928573 cs1 AddrBus test pass
436 04:12:07.929058
437 04:12:07.929511 100bdlr_step_size ps== 478
438 04:12:07.929963 result report
439 04:12:07.934109 boot times 0Enable ddr reg access
440 04:12:07.941718 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 04:12:07.955560 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 04:12:08.609977 bl2z: ptr: 05129330, size: 00001e40
443 04:12:08.616084 0.0;M3 CHK:0;cm4_sp_mode 0
444 04:12:08.616603 MVN_1=0x00000000
445 04:12:08.617055 MVN_2=0x00000000
446 04:12:08.627621 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 04:12:08.628148 OPS=0x04
448 04:12:08.628603 ring efuse init
449 04:12:08.633150 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 04:12:08.633650 [0.017319 Inits done]
451 04:12:08.634098 secure task start!
452 04:12:08.641265 high task start!
453 04:12:08.641779 low task start!
454 04:12:08.642236 run into bl31
455 04:12:08.649841 NOTICE: BL31: v1.3(release):4fc40b1
456 04:12:08.657274 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 04:12:08.657789 NOTICE: BL31: G12A normal boot!
458 04:12:08.673208 NOTICE: BL31: BL33 decompress pass
459 04:12:08.678891 ERROR: Error initializing runtime service opteed_fast
460 04:12:11.420197 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 04:12:11.420639 bl2_stage_init 0x01
462 04:12:11.420878 bl2_stage_init 0x81
463 04:12:11.425844 hw id: 0x0000 - pwm id 0x01
464 04:12:11.426362 bl2_stage_init 0xc1
465 04:12:11.431404 bl2_stage_init 0x02
466 04:12:11.431861
467 04:12:11.432328 L0:00000000
468 04:12:11.432726 L1:00000703
469 04:12:11.433121 L2:00008067
470 04:12:11.433509 L3:15000000
471 04:12:11.437601 S1:00000000
472 04:12:11.438058 B2:20282000
473 04:12:11.438460 B1:a0f83180
474 04:12:11.438855
475 04:12:11.439248 TE: 69353
476 04:12:11.439639
477 04:12:11.443188 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 04:12:11.443625
479 04:12:11.448796 Board ID = 1
480 04:12:11.449234 Set cpu clk to 24M
481 04:12:11.449627 Set clk81 to 24M
482 04:12:11.454356 Use GP1_pll as DSU clk.
483 04:12:11.454797 DSU clk: 1200 Mhz
484 04:12:11.455189 CPU clk: 1200 MHz
485 04:12:11.455577 Set clk81 to 166.6M
486 04:12:11.465609 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 04:12:11.466104 board id: 1
488 04:12:11.472176 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 04:12:11.482864 fw parse done
490 04:12:11.488818 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 04:12:11.531584 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 04:12:11.542471 PIEI prepare done
493 04:12:11.542950 fastboot data load
494 04:12:11.543347 fastboot data verify
495 04:12:11.548106 verify result: 266
496 04:12:11.553672 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 04:12:11.554143 LPDDR4 probe
498 04:12:11.554535 ddr clk to 1584MHz
499 04:12:11.561696 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 04:12:11.598910
501 04:12:11.599449 dmc_version 0001
502 04:12:11.605578 Check phy result
503 04:12:11.611480 INFO : End of CA training
504 04:12:11.611963 INFO : End of initialization
505 04:12:11.617173 INFO : Training has run successfully!
506 04:12:11.617664 Check phy result
507 04:12:11.622711 INFO : End of initialization
508 04:12:11.623200 INFO : End of read enable training
509 04:12:11.628317 INFO : End of fine write leveling
510 04:12:11.633913 INFO : End of Write leveling coarse delay
511 04:12:11.634404 INFO : Training has run successfully!
512 04:12:11.634820 Check phy result
513 04:12:11.639510 INFO : End of initialization
514 04:12:11.640033 INFO : End of read dq deskew training
515 04:12:11.645150 INFO : End of MPR read delay center optimization
516 04:12:11.650645 INFO : End of write delay center optimization
517 04:12:11.656299 INFO : End of read delay center optimization
518 04:12:11.656791 INFO : End of max read latency training
519 04:12:11.661912 INFO : Training has run successfully!
520 04:12:11.662402 1D training succeed
521 04:12:11.671175 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 04:12:11.718620 Check phy result
523 04:12:11.719164 INFO : End of initialization
524 04:12:11.741037 INFO : End of 2D read delay Voltage center optimization
525 04:12:11.760274 INFO : End of 2D read delay Voltage center optimization
526 04:12:11.812077 INFO : End of 2D write delay Voltage center optimization
527 04:12:11.861234 INFO : End of 2D write delay Voltage center optimization
528 04:12:11.866872 INFO : Training has run successfully!
529 04:12:11.867367
530 04:12:11.867788 channel==0
531 04:12:11.872446 RxClkDly_Margin_A0==88 ps 9
532 04:12:11.872930 TxDqDly_Margin_A0==98 ps 10
533 04:12:11.878056 RxClkDly_Margin_A1==88 ps 9
534 04:12:11.878540 TxDqDly_Margin_A1==88 ps 9
535 04:12:11.878958 TrainedVREFDQ_A0==74
536 04:12:11.883663 TrainedVREFDQ_A1==74
537 04:12:11.884180 VrefDac_Margin_A0==24
538 04:12:11.884606 DeviceVref_Margin_A0==40
539 04:12:11.889222 VrefDac_Margin_A1==23
540 04:12:11.889739 DeviceVref_Margin_A1==40
541 04:12:11.890192
542 04:12:11.890604
543 04:12:11.891006 channel==1
544 04:12:11.894856 RxClkDly_Margin_A0==88 ps 9
545 04:12:11.895344 TxDqDly_Margin_A0==88 ps 9
546 04:12:11.900458 RxClkDly_Margin_A1==88 ps 9
547 04:12:11.900956 TxDqDly_Margin_A1==88 ps 9
548 04:12:11.906191 TrainedVREFDQ_A0==74
549 04:12:11.906692 TrainedVREFDQ_A1==78
550 04:12:11.907115 VrefDac_Margin_A0==22
551 04:12:11.911702 DeviceVref_Margin_A0==40
552 04:12:11.912230 VrefDac_Margin_A1==21
553 04:12:11.912657 DeviceVref_Margin_A1==36
554 04:12:11.917255
555 04:12:11.917749 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 04:12:11.918170
557 04:12:11.950812 soc_vref_reg_value 0x 00000019 00000018 00000017 00000016 00000018 00000014 00000017 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000016 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000062
558 04:12:11.951358 2D training succeed
559 04:12:11.956481 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 04:12:11.962199 auto size-- 65535DDR cs0 size: 2048MB
561 04:12:11.962712 DDR cs1 size: 2048MB
562 04:12:11.967701 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 04:12:11.968220 cs0 DataBus test pass
564 04:12:11.973283 cs1 DataBus test pass
565 04:12:11.973766 cs0 AddrBus test pass
566 04:12:11.974173 cs1 AddrBus test pass
567 04:12:11.974576
568 04:12:11.978860 100bdlr_step_size ps== 464
569 04:12:11.979357 result report
570 04:12:11.984458 boot times 0Enable ddr reg access
571 04:12:11.989531 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 04:12:12.003343 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 04:12:12.658668 bl2z: ptr: 05129330, size: 00001e40
574 04:12:12.666595 0.0;M3 CHK:0;cm4_sp_mode 0
575 04:12:12.667081 MVN_1=0x00000000
576 04:12:12.667495 MVN_2=0x00000000
577 04:12:12.678169 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 04:12:12.678683 OPS=0x04
579 04:12:12.679103 ring efuse init
580 04:12:12.683719 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 04:12:12.684267 [0.017310 Inits done]
582 04:12:12.684690 secure task start!
583 04:12:12.691456 high task start!
584 04:12:12.691926 low task start!
585 04:12:12.692379 run into bl31
586 04:12:12.700179 NOTICE: BL31: v1.3(release):4fc40b1
587 04:12:12.707896 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 04:12:12.708407 NOTICE: BL31: G12A normal boot!
589 04:12:12.723379 NOTICE: BL31: BL33 decompress pass
590 04:12:12.729080 ERROR: Error initializing runtime service opteed_fast
591 04:12:14.120399 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 04:12:14.120973 bl2_stage_init 0x01
593 04:12:14.121398 bl2_stage_init 0x81
594 04:12:14.125863 hw id: 0x0000 - pwm id 0x01
595 04:12:14.126343 bl2_stage_init 0xc1
596 04:12:14.131486 bl2_stage_init 0x02
597 04:12:14.131941
598 04:12:14.132419 L0:00000000
599 04:12:14.132833 L1:00000703
600 04:12:14.133240 L2:00008067
601 04:12:14.133639 L3:15000000
602 04:12:14.137076 S1:00000000
603 04:12:14.137536 B2:20282000
604 04:12:14.137944 B1:a0f83180
605 04:12:14.138347
606 04:12:14.138749 TE: 70412
607 04:12:14.139147
608 04:12:14.142628 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 04:12:14.143108
610 04:12:14.148379 Board ID = 1
611 04:12:14.148834 Set cpu clk to 24M
612 04:12:14.149241 Set clk81 to 24M
613 04:12:14.153874 Use GP1_pll as DSU clk.
614 04:12:14.154347 DSU clk: 1200 Mhz
615 04:12:14.154759 CPU clk: 1200 MHz
616 04:12:14.159477 Set clk81 to 166.6M
617 04:12:14.165060 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 04:12:14.165558 board id: 1
619 04:12:14.172258 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 04:12:14.183145 fw parse done
621 04:12:14.189108 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 04:12:14.232265 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 04:12:14.243542 PIEI prepare done
624 04:12:14.244070 fastboot data load
625 04:12:14.244500 fastboot data verify
626 04:12:14.249054 verify result: 266
627 04:12:14.254675 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 04:12:14.255155 LPDDR4 probe
629 04:12:14.255564 ddr clk to 1584MHz
630 04:12:14.262705 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 04:12:14.300391
632 04:12:14.300931 dmc_version 0001
633 04:12:14.307398 Check phy result
634 04:12:14.313494 INFO : End of CA training
635 04:12:14.313979 INFO : End of initialization
636 04:12:14.319007 INFO : Training has run successfully!
637 04:12:14.319499 Check phy result
638 04:12:14.324587 INFO : End of initialization
639 04:12:14.325073 INFO : End of read enable training
640 04:12:14.330215 INFO : End of fine write leveling
641 04:12:14.335860 INFO : End of Write leveling coarse delay
642 04:12:14.336373 INFO : Training has run successfully!
643 04:12:14.336786 Check phy result
644 04:12:14.341530 INFO : End of initialization
645 04:12:14.342012 INFO : End of read dq deskew training
646 04:12:14.347025 INFO : End of MPR read delay center optimization
647 04:12:14.352602 INFO : End of write delay center optimization
648 04:12:14.358191 INFO : End of read delay center optimization
649 04:12:14.358671 INFO : End of max read latency training
650 04:12:14.363814 INFO : Training has run successfully!
651 04:12:14.364349 1D training succeed
652 04:12:14.372933 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 04:12:14.421296 Check phy result
654 04:12:14.421794 INFO : End of initialization
655 04:12:14.448684 INFO : End of 2D read delay Voltage center optimization
656 04:12:14.472869 INFO : End of 2D read delay Voltage center optimization
657 04:12:14.529671 INFO : End of 2D write delay Voltage center optimization
658 04:12:14.583655 INFO : End of 2D write delay Voltage center optimization
659 04:12:14.589114 INFO : Training has run successfully!
660 04:12:14.589599
661 04:12:14.590018 channel==0
662 04:12:14.594706 RxClkDly_Margin_A0==88 ps 9
663 04:12:14.595182 TxDqDly_Margin_A0==98 ps 10
664 04:12:14.597974 RxClkDly_Margin_A1==88 ps 9
665 04:12:14.598455 TxDqDly_Margin_A1==98 ps 10
666 04:12:14.603565 TrainedVREFDQ_A0==74
667 04:12:14.604077 TrainedVREFDQ_A1==75
668 04:12:14.609131 VrefDac_Margin_A0==24
669 04:12:14.609615 DeviceVref_Margin_A0==40
670 04:12:14.610028 VrefDac_Margin_A1==23
671 04:12:14.614723 DeviceVref_Margin_A1==39
672 04:12:14.615200
673 04:12:14.615614
674 04:12:14.616053 channel==1
675 04:12:14.616460 RxClkDly_Margin_A0==78 ps 8
676 04:12:14.620346 TxDqDly_Margin_A0==98 ps 10
677 04:12:14.620825 RxClkDly_Margin_A1==78 ps 8
678 04:12:14.625949 TxDqDly_Margin_A1==88 ps 9
679 04:12:14.626433 TrainedVREFDQ_A0==78
680 04:12:14.626849 TrainedVREFDQ_A1==78
681 04:12:14.631575 VrefDac_Margin_A0==22
682 04:12:14.632076 DeviceVref_Margin_A0==36
683 04:12:14.637157 VrefDac_Margin_A1==22
684 04:12:14.637632 DeviceVref_Margin_A1==36
685 04:12:14.638042
686 04:12:14.642726 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 04:12:14.643201
688 04:12:14.670701 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001b 00000017 00000015 00000017 dram_vref_reg_value 0x 00000062
689 04:12:14.676405 2D training succeed
690 04:12:14.681970 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 04:12:14.682459 auto size-- 65535DDR cs0 size: 2048MB
692 04:12:14.687585 DDR cs1 size: 2048MB
693 04:12:14.688109 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 04:12:14.693142 cs0 DataBus test pass
695 04:12:14.693623 cs1 DataBus test pass
696 04:12:14.694039 cs0 AddrBus test pass
697 04:12:14.698749 cs1 AddrBus test pass
698 04:12:14.699226
699 04:12:14.699655 100bdlr_step_size ps== 471
700 04:12:14.700109 result report
701 04:12:14.704384 boot times 0Enable ddr reg access
702 04:12:14.711018 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 04:12:14.725003 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 04:12:15.384479 bl2z: ptr: 05129330, size: 00001e40
705 04:12:15.393584 0.0;M3 CHK:0;cm4_sp_mode 0
706 04:12:15.394090 MVN_1=0x00000000
707 04:12:15.394514 MVN_2=0x00000000
708 04:12:15.404948 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 04:12:15.405459 OPS=0x04
710 04:12:15.405879 ring efuse init
711 04:12:15.410568 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 04:12:15.411050 [0.017354 Inits done]
713 04:12:15.411470 secure task start!
714 04:12:15.418324 high task start!
715 04:12:15.418787 low task start!
716 04:12:15.419195 run into bl31
717 04:12:15.426964 NOTICE: BL31: v1.3(release):4fc40b1
718 04:12:15.434791 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 04:12:15.435253 NOTICE: BL31: G12A normal boot!
720 04:12:15.450278 NOTICE: BL31: BL33 decompress pass
721 04:12:15.455965 ERROR: Error initializing runtime service opteed_fast
722 04:12:16.251327
723 04:12:16.251954
724 04:12:16.256848 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 04:12:16.257367
726 04:12:16.260260 Model: Libre Computer AML-S905D3-CC Solitude
727 04:12:16.407394 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 04:12:16.422790 DRAM: 2 GiB (effective 3.8 GiB)
729 04:12:16.523823 Core: 406 devices, 33 uclasses, devicetree: separate
730 04:12:16.529532 WDT: Not starting watchdog@f0d0
731 04:12:16.554549 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 04:12:16.566807 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 04:12:16.571815 ** Bad device specification mmc 0 **
734 04:12:16.581865 Card did not respond to voltage select! : -110
735 04:12:16.589482 ** Bad device specification mmc 0 **
736 04:12:16.589931 Couldn't find partition mmc 0
737 04:12:16.597820 Card did not respond to voltage select! : -110
738 04:12:16.603360 ** Bad device specification mmc 0 **
739 04:12:16.603800 Couldn't find partition mmc 0
740 04:12:16.608437 Error: could not access storage.
741 04:12:16.904891 Net: eth0: ethernet@ff3f0000
742 04:12:16.905486 starting USB...
743 04:12:17.149496 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 04:12:17.149910 Starting the controller
745 04:12:17.156416 USB XHCI 1.10
746 04:12:18.712782 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 04:12:18.721169 scanning usb for storage devices... 0 Storage Device(s) found
749 04:12:18.772607 Hit any key to stop autoboot: 1
750 04:12:18.774121 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 04:12:18.774737 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 04:12:18.775224 Setting prompt string to ['=>']
753 04:12:18.775737 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 04:12:18.787327 0
755 04:12:18.788235 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 04:12:18.889437 => setenv autoload no
758 04:12:18.890323 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 04:12:18.895136 setenv autoload no
761 04:12:18.996631 => setenv initrd_high 0xffffffff
762 04:12:18.997333 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 04:12:19.001981 setenv initrd_high 0xffffffff
765 04:12:19.103425 => setenv fdt_high 0xffffffff
766 04:12:19.104168 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 04:12:19.108730 setenv fdt_high 0xffffffff
769 04:12:19.210198 => dhcp
770 04:12:19.210847 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 04:12:19.214294 dhcp
772 04:12:20.221217 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 04:12:20.222066 Speed: 1000, full duplex
774 04:12:20.222760 BOOTP broadcast 1
775 04:12:20.231077 DHCP client bound to address 192.168.6.21 (9 ms)
777 04:12:20.333079 => setenv serverip 192.168.6.2
778 04:12:20.334031 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
779 04:12:20.338492 setenv serverip 192.168.6.2
781 04:12:20.440098 => tftpboot 0x01080000 937942/tftp-deploy-gszvcr_h/kernel/uImage
782 04:12:20.441063 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
783 04:12:20.447741 tftpboot 0x01080000 937942/tftp-deploy-gszvcr_h/kernel/uImage
784 04:12:20.448410 Speed: 1000, full duplex
785 04:12:20.448889 Using ethernet@ff3f0000 device
786 04:12:20.453233 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 04:12:20.458757 Filename '937942/tftp-deploy-gszvcr_h/kernel/uImage'.
788 04:12:20.462745 Load address: 0x1080000
789 04:12:23.387187 Loading: *################################################## 43.6 MiB
790 04:12:23.387839 14.9 MiB/s
791 04:12:23.388412 done
792 04:12:23.391585 Bytes transferred = 45713984 (2b98a40 hex)
794 04:12:23.493549 => tftpboot 0x08000000 937942/tftp-deploy-gszvcr_h/ramdisk/ramdisk.cpio.gz.uboot
795 04:12:23.494328 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
796 04:12:23.501381 tftpboot 0x08000000 937942/tftp-deploy-gszvcr_h/ramdisk/ramdisk.cpio.gz.uboot
797 04:12:23.501963 Speed: 1000, full duplex
798 04:12:23.502429 Using ethernet@ff3f0000 device
799 04:12:23.506763 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
800 04:12:23.516472 Filename '937942/tftp-deploy-gszvcr_h/ramdisk/ramdisk.cpio.gz.uboot'.
801 04:12:23.517001 Load address: 0x8000000
802 04:12:25.319502 Loading: *################################################# UDP wrong checksum 00000005 0000483e
803 04:12:30.321394 T UDP wrong checksum 00000005 0000483e
804 04:12:40.323310 T T UDP wrong checksum 00000005 0000483e
805 04:13:00.327092 T T T T UDP wrong checksum 00000005 0000483e
806 04:13:05.048423 UDP wrong checksum 000000ff 00006652
807 04:13:05.051575 UDP wrong checksum 000000ff 0000ee44
808 04:13:12.082642 T T UDP wrong checksum 000000ff 000085f7
809 04:13:12.150887 UDP wrong checksum 000000ff 00001eea
810 04:13:15.953874 T UDP wrong checksum 000000ff 00007982
811 04:13:16.051646 UDP wrong checksum 000000ff 00000a75
812 04:13:18.652449 UDP wrong checksum 000000ff 0000cebd
813 04:13:18.665306 UDP wrong checksum 000000ff 000064b0
814 04:13:20.331412
815 04:13:20.332114 Retry count exceeded; starting again
817 04:13:20.333679 end: 2.4.3 bootloader-commands (duration 00:01:02) [common]
820 04:13:20.335663 end: 2.4 uboot-commands (duration 00:01:21) [common]
822 04:13:20.337225 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
824 04:13:20.338357 end: 2 uboot-action (duration 00:01:21) [common]
826 04:13:20.340207 Cleaning after the job
827 04:13:20.340842 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/ramdisk
828 04:13:20.342435 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/kernel
829 04:13:20.382439 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/dtb
830 04:13:20.383814 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/nfsrootfs
831 04:13:20.652088 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/937942/tftp-deploy-gszvcr_h/modules
832 04:13:20.672919 start: 4.1 power-off (timeout 00:00:30) [common]
833 04:13:20.673547 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
834 04:13:20.706458 >> OK - accepted request
835 04:13:20.708444 Returned 0 in 0 seconds
836 04:13:20.809211 end: 4.1 power-off (duration 00:00:00) [common]
838 04:13:20.810158 start: 4.2 read-feedback (timeout 00:10:00) [common]
839 04:13:20.810816 Listened to connection for namespace 'common' for up to 1s
840 04:13:21.811136 Finalising connection for namespace 'common'
841 04:13:21.811683 Disconnecting from shell: Finalise
842 04:13:21.812192 =>
843 04:13:21.912989 end: 4.2 read-feedback (duration 00:00:01) [common]
844 04:13:21.913746 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/937942
845 04:13:24.736830 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/937942
846 04:13:24.737476 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.