Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 20:36:52.399794 lava-dispatcher, installed at version: 2024.01
2 20:36:52.400672 start: 0 validate
3 20:36:52.401168 Start time: 2024-11-06 20:36:52.401139+00:00 (UTC)
4 20:36:52.401722 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 20:36:52.402256 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 20:36:52.437767 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 20:36:52.438416 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-99-g7758b206117da%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 20:36:52.471722 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 20:36:52.472517 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-99-g7758b206117da%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 20:36:52.506230 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 20:36:52.506835 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 20:36:52.535723 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 20:36:52.536393 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-99-g7758b206117da%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 20:36:52.574690 validate duration: 0.17
16 20:36:52.575769 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 20:36:52.576191 start: 1.1 download-retry (timeout 00:10:00) [common]
18 20:36:52.576571 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 20:36:52.577251 Not decompressing ramdisk as can be used compressed.
20 20:36:52.577773 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 20:36:52.578103 saving as /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/ramdisk/initrd.cpio.gz
22 20:36:52.578416 total size: 5628182 (5 MB)
23 20:36:52.618798 progress 0 % (0 MB)
24 20:36:52.622999 progress 5 % (0 MB)
25 20:36:52.627344 progress 10 % (0 MB)
26 20:36:52.631016 progress 15 % (0 MB)
27 20:36:52.635115 progress 20 % (1 MB)
28 20:36:52.638759 progress 25 % (1 MB)
29 20:36:52.642782 progress 30 % (1 MB)
30 20:36:52.646807 progress 35 % (1 MB)
31 20:36:52.650483 progress 40 % (2 MB)
32 20:36:52.654504 progress 45 % (2 MB)
33 20:36:52.658180 progress 50 % (2 MB)
34 20:36:52.662428 progress 55 % (2 MB)
35 20:36:52.666718 progress 60 % (3 MB)
36 20:36:52.670688 progress 65 % (3 MB)
37 20:36:52.674924 progress 70 % (3 MB)
38 20:36:52.678799 progress 75 % (4 MB)
39 20:36:52.683203 progress 80 % (4 MB)
40 20:36:52.687008 progress 85 % (4 MB)
41 20:36:52.691473 progress 90 % (4 MB)
42 20:36:52.695297 progress 95 % (5 MB)
43 20:36:52.698579 progress 100 % (5 MB)
44 20:36:52.699227 5 MB downloaded in 0.12 s (44.43 MB/s)
45 20:36:52.699778 end: 1.1.1 http-download (duration 00:00:00) [common]
47 20:36:52.700696 end: 1.1 download-retry (duration 00:00:00) [common]
48 20:36:52.700988 start: 1.2 download-retry (timeout 00:10:00) [common]
49 20:36:52.701258 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 20:36:52.701726 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-99-g7758b206117da/arm64/defconfig+debug/gcc-12/kernel/Image
51 20:36:52.701971 saving as /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/kernel/Image
52 20:36:52.702179 total size: 169943552 (162 MB)
53 20:36:52.702388 No compression specified
54 20:36:52.733136 progress 0 % (0 MB)
55 20:36:52.835480 progress 5 % (8 MB)
56 20:36:52.949065 progress 10 % (16 MB)
57 20:36:53.051566 progress 15 % (24 MB)
58 20:36:53.153868 progress 20 % (32 MB)
59 20:36:53.256006 progress 25 % (40 MB)
60 20:36:53.361164 progress 30 % (48 MB)
61 20:36:53.464156 progress 35 % (56 MB)
62 20:36:53.566013 progress 40 % (64 MB)
63 20:36:53.670665 progress 45 % (72 MB)
64 20:36:53.772587 progress 50 % (81 MB)
65 20:36:53.874039 progress 55 % (89 MB)
66 20:36:53.975639 progress 60 % (97 MB)
67 20:36:54.077719 progress 65 % (105 MB)
68 20:36:54.179150 progress 70 % (113 MB)
69 20:36:54.281820 progress 75 % (121 MB)
70 20:36:54.388431 progress 80 % (129 MB)
71 20:36:54.491806 progress 85 % (137 MB)
72 20:36:54.599622 progress 90 % (145 MB)
73 20:36:54.704128 progress 95 % (153 MB)
74 20:36:54.810108 progress 100 % (162 MB)
75 20:36:54.810759 162 MB downloaded in 2.11 s (76.86 MB/s)
76 20:36:54.811242 end: 1.2.1 http-download (duration 00:00:02) [common]
78 20:36:54.812754 end: 1.2 download-retry (duration 00:00:02) [common]
79 20:36:54.813050 start: 1.3 download-retry (timeout 00:09:58) [common]
80 20:36:54.813315 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 20:36:54.813820 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-99-g7758b206117da/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 20:36:54.814127 saving as /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/dtb/meson-g12b-a311d-libretech-cc.dtb
83 20:36:54.814337 total size: 54703 (0 MB)
84 20:36:54.814548 No compression specified
85 20:36:54.853372 progress 59 % (0 MB)
86 20:36:54.854272 progress 100 % (0 MB)
87 20:36:54.854854 0 MB downloaded in 0.04 s (1.29 MB/s)
88 20:36:54.855331 end: 1.3.1 http-download (duration 00:00:00) [common]
90 20:36:54.856214 end: 1.3 download-retry (duration 00:00:00) [common]
91 20:36:54.856484 start: 1.4 download-retry (timeout 00:09:58) [common]
92 20:36:54.856750 start: 1.4.1 http-download (timeout 00:09:58) [common]
93 20:36:54.857231 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 20:36:54.857487 saving as /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/nfsrootfs/full.rootfs.tar
95 20:36:54.857690 total size: 107552908 (102 MB)
96 20:36:54.857902 Using unxz to decompress xz
97 20:36:54.895838 progress 0 % (0 MB)
98 20:36:55.551009 progress 5 % (5 MB)
99 20:36:56.279341 progress 10 % (10 MB)
100 20:36:57.013135 progress 15 % (15 MB)
101 20:36:57.771324 progress 20 % (20 MB)
102 20:36:58.342018 progress 25 % (25 MB)
103 20:36:58.965331 progress 30 % (30 MB)
104 20:36:59.703476 progress 35 % (35 MB)
105 20:37:00.068735 progress 40 % (41 MB)
106 20:37:00.490654 progress 45 % (46 MB)
107 20:37:01.179806 progress 50 % (51 MB)
108 20:37:01.853495 progress 55 % (56 MB)
109 20:37:02.599709 progress 60 % (61 MB)
110 20:37:03.343946 progress 65 % (66 MB)
111 20:37:04.066461 progress 70 % (71 MB)
112 20:37:04.822126 progress 75 % (76 MB)
113 20:37:05.493088 progress 80 % (82 MB)
114 20:37:06.193528 progress 85 % (87 MB)
115 20:37:06.917080 progress 90 % (92 MB)
116 20:37:07.621737 progress 95 % (97 MB)
117 20:37:08.351916 progress 100 % (102 MB)
118 20:37:08.363629 102 MB downloaded in 13.51 s (7.59 MB/s)
119 20:37:08.364600 end: 1.4.1 http-download (duration 00:00:14) [common]
121 20:37:08.366344 end: 1.4 download-retry (duration 00:00:14) [common]
122 20:37:08.366895 start: 1.5 download-retry (timeout 00:09:44) [common]
123 20:37:08.367443 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 20:37:08.368896 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-99-g7758b206117da/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 20:37:08.369434 saving as /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/modules/modules.tar
126 20:37:08.369870 total size: 27662012 (26 MB)
127 20:37:08.370319 Using unxz to decompress xz
128 20:37:08.419133 progress 0 % (0 MB)
129 20:37:08.606569 progress 5 % (1 MB)
130 20:37:08.803174 progress 10 % (2 MB)
131 20:37:09.031689 progress 15 % (3 MB)
132 20:37:09.266551 progress 20 % (5 MB)
133 20:37:09.468846 progress 25 % (6 MB)
134 20:37:09.672664 progress 30 % (7 MB)
135 20:37:09.870418 progress 35 % (9 MB)
136 20:37:10.062806 progress 40 % (10 MB)
137 20:37:10.251028 progress 45 % (11 MB)
138 20:37:10.462043 progress 50 % (13 MB)
139 20:37:10.659963 progress 55 % (14 MB)
140 20:37:10.871371 progress 60 % (15 MB)
141 20:37:11.072461 progress 65 % (17 MB)
142 20:37:11.270342 progress 70 % (18 MB)
143 20:37:11.480412 progress 75 % (19 MB)
144 20:37:11.678295 progress 80 % (21 MB)
145 20:37:11.880450 progress 85 % (22 MB)
146 20:37:12.082078 progress 90 % (23 MB)
147 20:37:12.276567 progress 95 % (25 MB)
148 20:37:12.477843 progress 100 % (26 MB)
149 20:37:12.488253 26 MB downloaded in 4.12 s (6.41 MB/s)
150 20:37:12.489267 end: 1.5.1 http-download (duration 00:00:04) [common]
152 20:37:12.490865 end: 1.5 download-retry (duration 00:00:04) [common]
153 20:37:12.491379 start: 1.6 prepare-tftp-overlay (timeout 00:09:40) [common]
154 20:37:12.491895 start: 1.6.1 extract-nfsrootfs (timeout 00:09:40) [common]
155 20:37:22.091227 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/948454/extract-nfsrootfs-czbs4mbw
156 20:37:22.091837 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 20:37:22.092181 start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
158 20:37:22.092821 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a
159 20:37:22.093279 makedir: /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin
160 20:37:22.093643 makedir: /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/tests
161 20:37:22.093993 makedir: /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/results
162 20:37:22.094363 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-add-keys
163 20:37:22.094946 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-add-sources
164 20:37:22.095491 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-background-process-start
165 20:37:22.096052 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-background-process-stop
166 20:37:22.096633 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-common-functions
167 20:37:22.097177 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-echo-ipv4
168 20:37:22.097705 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-install-packages
169 20:37:22.098238 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-installed-packages
170 20:37:22.098760 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-os-build
171 20:37:22.099283 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-probe-channel
172 20:37:22.099800 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-probe-ip
173 20:37:22.100374 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-target-ip
174 20:37:22.100911 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-target-mac
175 20:37:22.101436 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-target-storage
176 20:37:22.101964 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-test-case
177 20:37:22.102489 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-test-event
178 20:37:22.103007 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-test-feedback
179 20:37:22.103530 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-test-raise
180 20:37:22.104062 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-test-reference
181 20:37:22.104634 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-test-runner
182 20:37:22.105174 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-test-set
183 20:37:22.105698 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-test-shell
184 20:37:22.106222 Updating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-install-packages (oe)
185 20:37:22.106796 Updating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/bin/lava-installed-packages (oe)
186 20:37:22.107277 Creating /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/environment
187 20:37:22.107677 LAVA metadata
188 20:37:22.107950 - LAVA_JOB_ID=948454
189 20:37:22.108203 - LAVA_DISPATCHER_IP=192.168.6.2
190 20:37:22.108584 start: 1.6.2.1 ssh-authorize (timeout 00:09:30) [common]
191 20:37:22.109569 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 20:37:22.109889 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:30) [common]
193 20:37:22.110110 skipped lava-vland-overlay
194 20:37:22.110363 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 20:37:22.110629 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:30) [common]
196 20:37:22.110859 skipped lava-multinode-overlay
197 20:37:22.111113 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 20:37:22.111377 start: 1.6.2.4 test-definition (timeout 00:09:30) [common]
199 20:37:22.111641 Loading test definitions
200 20:37:22.111931 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:30) [common]
201 20:37:22.112196 Using /lava-948454 at stage 0
202 20:37:22.113409 uuid=948454_1.6.2.4.1 testdef=None
203 20:37:22.113719 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 20:37:22.113998 start: 1.6.2.4.2 test-overlay (timeout 00:09:30) [common]
205 20:37:22.115805 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 20:37:22.116643 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:30) [common]
208 20:37:22.118930 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 20:37:22.119768 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:30) [common]
211 20:37:22.121990 runner path: /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/0/tests/0_dmesg test_uuid 948454_1.6.2.4.1
212 20:37:22.122568 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 20:37:22.123338 Creating lava-test-runner.conf files
215 20:37:22.123550 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/948454/lava-overlay-zdrmyo5a/lava-948454/0 for stage 0
216 20:37:22.123912 - 0_dmesg
217 20:37:22.124332 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 20:37:22.124628 start: 1.6.2.5 compress-overlay (timeout 00:09:30) [common]
219 20:37:22.146343 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 20:37:22.146726 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:30) [common]
221 20:37:22.147010 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 20:37:22.147296 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 20:37:22.147580 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
224 20:37:22.761145 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 20:37:22.761627 start: 1.6.4 extract-modules (timeout 00:09:30) [common]
226 20:37:22.761874 extracting modules file /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/modules/modules.tar to /var/lib/lava/dispatcher/tmp/948454/extract-nfsrootfs-czbs4mbw
227 20:37:24.423086 extracting modules file /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/modules/modules.tar to /var/lib/lava/dispatcher/tmp/948454/extract-overlay-ramdisk-qcs1en81/ramdisk
228 20:37:26.123787 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 20:37:26.124298 start: 1.6.5 apply-overlay-tftp (timeout 00:09:26) [common]
230 20:37:26.124573 [common] Applying overlay to NFS
231 20:37:26.124787 [common] Applying overlay /var/lib/lava/dispatcher/tmp/948454/compress-overlay-x6yh7hxe/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/948454/extract-nfsrootfs-czbs4mbw
232 20:37:26.154049 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 20:37:26.154446 start: 1.6.6 prepare-kernel (timeout 00:09:26) [common]
234 20:37:26.154717 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:26) [common]
235 20:37:26.154950 Converting downloaded kernel to a uImage
236 20:37:26.155266 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/kernel/Image /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/kernel/uImage
237 20:37:28.133212 output: Image Name:
238 20:37:28.133634 output: Created: Wed Nov 6 20:37:26 2024
239 20:37:28.133844 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 20:37:28.134046 output: Data Size: 169943552 Bytes = 165960.50 KiB = 162.07 MiB
241 20:37:28.134246 output: Load Address: 01080000
242 20:37:28.134443 output: Entry Point: 01080000
243 20:37:28.134638 output:
244 20:37:28.134964 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 20:37:28.135223 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 20:37:28.135486 start: 1.6.7 configure-preseed-file (timeout 00:09:24) [common]
247 20:37:28.135734 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 20:37:28.136019 start: 1.6.8 compress-ramdisk (timeout 00:09:24) [common]
249 20:37:28.136277 Building ramdisk /var/lib/lava/dispatcher/tmp/948454/extract-overlay-ramdisk-qcs1en81/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/948454/extract-overlay-ramdisk-qcs1en81/ramdisk
250 20:37:33.498794 >> 426762 blocks
251 20:37:51.204252 Adding RAMdisk u-boot header.
252 20:37:51.204985 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/948454/extract-overlay-ramdisk-qcs1en81/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/948454/extract-overlay-ramdisk-qcs1en81/ramdisk.cpio.gz.uboot
253 20:37:51.734573 output: Image Name:
254 20:37:51.735255 output: Created: Wed Nov 6 20:37:51 2024
255 20:37:51.735734 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 20:37:51.736257 output: Data Size: 50960041 Bytes = 49765.67 KiB = 48.60 MiB
257 20:37:51.736717 output: Load Address: 00000000
258 20:37:51.737161 output: Entry Point: 00000000
259 20:37:51.737603 output:
260 20:37:51.738935 rename /var/lib/lava/dispatcher/tmp/948454/extract-overlay-ramdisk-qcs1en81/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/ramdisk/ramdisk.cpio.gz.uboot
261 20:37:51.739747 end: 1.6.8 compress-ramdisk (duration 00:00:24) [common]
262 20:37:51.740436 end: 1.6 prepare-tftp-overlay (duration 00:00:39) [common]
263 20:37:51.741040 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:01) [common]
264 20:37:51.741555 No LXC device requested
265 20:37:51.742138 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 20:37:51.742740 start: 1.8 deploy-device-env (timeout 00:09:01) [common]
267 20:37:51.743307 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 20:37:51.743770 Checking files for TFTP limit of 4294967296 bytes.
269 20:37:51.746723 end: 1 tftp-deploy (duration 00:00:59) [common]
270 20:37:51.747356 start: 2 uboot-action (timeout 00:05:00) [common]
271 20:37:51.747952 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 20:37:51.748553 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 20:37:51.749129 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 20:37:51.749716 Using kernel file from prepare-kernel: 948454/tftp-deploy-yez81sda/kernel/uImage
275 20:37:51.750414 substitutions:
276 20:37:51.750868 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 20:37:51.751325 - {DTB_ADDR}: 0x01070000
278 20:37:51.751768 - {DTB}: 948454/tftp-deploy-yez81sda/dtb/meson-g12b-a311d-libretech-cc.dtb
279 20:37:51.752256 - {INITRD}: 948454/tftp-deploy-yez81sda/ramdisk/ramdisk.cpio.gz.uboot
280 20:37:51.752711 - {KERNEL_ADDR}: 0x01080000
281 20:37:51.753155 - {KERNEL}: 948454/tftp-deploy-yez81sda/kernel/uImage
282 20:37:51.753596 - {LAVA_MAC}: None
283 20:37:51.754082 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/948454/extract-nfsrootfs-czbs4mbw
284 20:37:51.754527 - {NFS_SERVER_IP}: 192.168.6.2
285 20:37:51.754962 - {PRESEED_CONFIG}: None
286 20:37:51.755397 - {PRESEED_LOCAL}: None
287 20:37:51.755830 - {RAMDISK_ADDR}: 0x08000000
288 20:37:51.756290 - {RAMDISK}: 948454/tftp-deploy-yez81sda/ramdisk/ramdisk.cpio.gz.uboot
289 20:37:51.756730 - {ROOT_PART}: None
290 20:37:51.757170 - {ROOT}: None
291 20:37:51.757607 - {SERVER_IP}: 192.168.6.2
292 20:37:51.758039 - {TEE_ADDR}: 0x83000000
293 20:37:51.758470 - {TEE}: None
294 20:37:51.758897 Parsed boot commands:
295 20:37:51.759317 - setenv autoload no
296 20:37:51.759747 - setenv initrd_high 0xffffffff
297 20:37:51.760205 - setenv fdt_high 0xffffffff
298 20:37:51.760640 - dhcp
299 20:37:51.761070 - setenv serverip 192.168.6.2
300 20:37:51.761497 - tftpboot 0x01080000 948454/tftp-deploy-yez81sda/kernel/uImage
301 20:37:51.761924 - tftpboot 0x08000000 948454/tftp-deploy-yez81sda/ramdisk/ramdisk.cpio.gz.uboot
302 20:37:51.762358 - tftpboot 0x01070000 948454/tftp-deploy-yez81sda/dtb/meson-g12b-a311d-libretech-cc.dtb
303 20:37:51.762789 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/948454/extract-nfsrootfs-czbs4mbw,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 20:37:51.763230 - bootm 0x01080000 0x08000000 0x01070000
305 20:37:51.763780 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 20:37:51.765456 start: 2.3 connect-device (timeout 00:05:00) [common]
308 20:37:51.765921 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 20:37:51.780378 Setting prompt string to ['lava-test: # ']
310 20:37:51.781966 end: 2.3 connect-device (duration 00:00:00) [common]
311 20:37:51.782636 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 20:37:51.783253 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 20:37:51.783831 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 20:37:51.785332 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 20:37:51.822571 >> OK - accepted request
316 20:37:51.825379 Returned 0 in 0 seconds
317 20:37:51.926579 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 20:37:51.928398 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 20:37:51.929055 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 20:37:51.929629 Setting prompt string to ['Hit any key to stop autoboot']
322 20:37:51.930149 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 20:37:51.931828 Trying 192.168.56.21...
324 20:37:51.932386 Connected to conserv1.
325 20:37:51.932867 Escape character is '^]'.
326 20:37:51.933347
327 20:37:51.933825 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 20:37:51.934298
329 20:38:02.683743 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 20:38:02.684406 bl2_stage_init 0x01
331 20:38:02.684883 bl2_stage_init 0x81
332 20:38:02.689332 hw id: 0x0000 - pwm id 0x01
333 20:38:02.689887 bl2_stage_init 0xc1
334 20:38:02.690329 bl2_stage_init 0x02
335 20:38:02.690758
336 20:38:02.694849 L0:00000000
337 20:38:02.695330 L1:20000703
338 20:38:02.695763 L2:00008067
339 20:38:02.696235 L3:14000000
340 20:38:02.697786 B2:00402000
341 20:38:02.698253 B1:e0f83180
342 20:38:02.698687
343 20:38:02.699119 TE: 58159
344 20:38:02.699550
345 20:38:02.708867 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 20:38:02.709351
347 20:38:02.709787 Board ID = 1
348 20:38:02.710213 Set A53 clk to 24M
349 20:38:02.710637 Set A73 clk to 24M
350 20:38:02.714455 Set clk81 to 24M
351 20:38:02.714922 A53 clk: 1200 MHz
352 20:38:02.715349 A73 clk: 1200 MHz
353 20:38:02.718024 CLK81: 166.6M
354 20:38:02.718504 smccc: 00012ab5
355 20:38:02.723612 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 20:38:02.729195 board id: 1
357 20:38:02.734306 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 20:38:02.744921 fw parse done
359 20:38:02.751010 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 20:38:02.793382 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 20:38:02.804367 PIEI prepare done
362 20:38:02.804831 fastboot data load
363 20:38:02.805265 fastboot data verify
364 20:38:02.809941 verify result: 266
365 20:38:02.815656 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 20:38:02.816184 LPDDR4 probe
367 20:38:02.816623 ddr clk to 1584MHz
368 20:38:02.823588 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 20:38:02.859947
370 20:38:02.860474 dmc_version 0001
371 20:38:02.866574 Check phy result
372 20:38:02.873352 INFO : End of CA training
373 20:38:02.873848 INFO : End of initialization
374 20:38:02.878971 INFO : Training has run successfully!
375 20:38:02.879460 Check phy result
376 20:38:02.884566 INFO : End of initialization
377 20:38:02.885057 INFO : End of read enable training
378 20:38:02.890148 INFO : End of fine write leveling
379 20:38:02.895807 INFO : End of Write leveling coarse delay
380 20:38:02.896336 INFO : Training has run successfully!
381 20:38:02.896783 Check phy result
382 20:38:02.901341 INFO : End of initialization
383 20:38:02.901835 INFO : End of read dq deskew training
384 20:38:02.906969 INFO : End of MPR read delay center optimization
385 20:38:02.912540 INFO : End of write delay center optimization
386 20:38:02.918124 INFO : End of read delay center optimization
387 20:38:02.918618 INFO : End of max read latency training
388 20:38:02.923798 INFO : Training has run successfully!
389 20:38:02.924323 1D training succeed
390 20:38:02.932930 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 20:38:02.979507 Check phy result
392 20:38:02.980042 INFO : End of initialization
393 20:38:03.002076 INFO : End of 2D read delay Voltage center optimization
394 20:38:03.023091 INFO : End of 2D read delay Voltage center optimization
395 20:38:03.074024 INFO : End of 2D write delay Voltage center optimization
396 20:38:03.124236 INFO : End of 2D write delay Voltage center optimization
397 20:38:03.129850 INFO : Training has run successfully!
398 20:38:03.130327
399 20:38:03.130776 channel==0
400 20:38:03.135425 RxClkDly_Margin_A0==88 ps 9
401 20:38:03.135919 TxDqDly_Margin_A0==98 ps 10
402 20:38:03.138738 RxClkDly_Margin_A1==88 ps 9
403 20:38:03.139214 TxDqDly_Margin_A1==88 ps 9
404 20:38:03.144272 TrainedVREFDQ_A0==74
405 20:38:03.144982 TrainedVREFDQ_A1==74
406 20:38:03.145460 VrefDac_Margin_A0==24
407 20:38:03.149877 DeviceVref_Margin_A0==40
408 20:38:03.150380 VrefDac_Margin_A1==25
409 20:38:03.155477 DeviceVref_Margin_A1==40
410 20:38:03.156003
411 20:38:03.156451
412 20:38:03.156889 channel==1
413 20:38:03.157318 RxClkDly_Margin_A0==88 ps 9
414 20:38:03.158857 TxDqDly_Margin_A0==98 ps 10
415 20:38:03.164356 RxClkDly_Margin_A1==98 ps 10
416 20:38:03.164837 TxDqDly_Margin_A1==98 ps 10
417 20:38:03.165277 TrainedVREFDQ_A0==77
418 20:38:03.169964 TrainedVREFDQ_A1==78
419 20:38:03.170429 VrefDac_Margin_A0==22
420 20:38:03.175590 DeviceVref_Margin_A0==37
421 20:38:03.176091 VrefDac_Margin_A1==24
422 20:38:03.176526 DeviceVref_Margin_A1==36
423 20:38:03.176951
424 20:38:03.181203 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 20:38:03.181673
426 20:38:03.214831 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 20:38:03.215408 2D training succeed
428 20:38:03.220404 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 20:38:03.225997 auto size-- 65535DDR cs0 size: 2048MB
430 20:38:03.226476 DDR cs1 size: 2048MB
431 20:38:03.231577 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 20:38:03.232085 cs0 DataBus test pass
433 20:38:03.232530 cs1 DataBus test pass
434 20:38:03.237199 cs0 AddrBus test pass
435 20:38:03.237672 cs1 AddrBus test pass
436 20:38:03.238105
437 20:38:03.242876 100bdlr_step_size ps== 420
438 20:38:03.243361 result report
439 20:38:03.243796 boot times 0Enable ddr reg access
440 20:38:03.252824 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 20:38:03.265364 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 20:38:03.838167 0.0;M3 CHK:0;cm4_sp_mode 0
443 20:38:03.838715 MVN_1=0x00000000
444 20:38:03.843792 MVN_2=0x00000000
445 20:38:03.849472 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 20:38:03.849967 OPS=0x10
447 20:38:03.850426 ring efuse init
448 20:38:03.850869 chipver efuse init
449 20:38:03.855079 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 20:38:03.860691 [0.018961 Inits done]
451 20:38:03.861187 secure task start!
452 20:38:03.861635 high task start!
453 20:38:03.865237 low task start!
454 20:38:03.865725 run into bl31
455 20:38:03.871965 NOTICE: BL31: v1.3(release):4fc40b1
456 20:38:03.879751 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 20:38:03.880287 NOTICE: BL31: G12A normal boot!
458 20:38:03.905042 NOTICE: BL31: BL33 decompress pass
459 20:38:03.910731 ERROR: Error initializing runtime service opteed_fast
460 20:38:05.143505
461 20:38:05.144108
462 20:38:05.152090 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 20:38:05.152592
464 20:38:05.153049 Model: Libre Computer AML-A311D-CC Alta
465 20:38:05.360394 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 20:38:05.383745 DRAM: 2 GiB (effective 3.8 GiB)
467 20:38:05.526695 Core: 408 devices, 31 uclasses, devicetree: separate
468 20:38:05.532730 WDT: Not starting watchdog@f0d0
469 20:38:05.564892 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 20:38:05.577360 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 20:38:05.582388 ** Bad device specification mmc 0 **
472 20:38:05.592696 Card did not respond to voltage select! : -110
473 20:38:05.600351 ** Bad device specification mmc 0 **
474 20:38:05.600852 Couldn't find partition mmc 0
475 20:38:05.608690 Card did not respond to voltage select! : -110
476 20:38:05.614235 ** Bad device specification mmc 0 **
477 20:38:05.614729 Couldn't find partition mmc 0
478 20:38:05.619299 Error: could not access storage.
479 20:38:06.923862 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
480 20:38:06.924457 bl2_stage_init 0x81
481 20:38:06.929514 hw id: 0x0000 - pwm id 0x01
482 20:38:06.930017 bl2_stage_init 0xc1
483 20:38:06.930469 bl2_stage_init 0x02
484 20:38:06.930910
485 20:38:06.935077 L0:00000000
486 20:38:06.935589 L1:20000703
487 20:38:06.936066 L2:00008067
488 20:38:06.936511 L3:14000000
489 20:38:06.937153 B2:00402000
490 20:38:06.940754 B1:e0f83180
491 20:38:06.941253
492 20:38:06.941705 TE: 58150
493 20:38:06.942146
494 20:38:06.946394 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 20:38:06.946918
496 20:38:06.947386 Board ID = 1
497 20:38:06.951919 Set A53 clk to 24M
498 20:38:06.952466 Set A73 clk to 24M
499 20:38:06.952926 Set clk81 to 24M
500 20:38:06.957613 A53 clk: 1200 MHz
501 20:38:06.958119 A73 clk: 1200 MHz
502 20:38:06.958570 CLK81: 166.6M
503 20:38:06.959007 smccc: 00012aac
504 20:38:06.963099 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 20:38:06.968699 board id: 1
506 20:38:06.973495 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 20:38:06.985100 fw parse done
508 20:38:06.991117 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 20:38:07.032793 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 20:38:07.044600 PIEI prepare done
511 20:38:07.045103 fastboot data load
512 20:38:07.045554 fastboot data verify
513 20:38:07.050269 verify result: 266
514 20:38:07.055931 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 20:38:07.056471 LPDDR4 probe
516 20:38:07.056923 ddr clk to 1584MHz
517 20:38:07.063905 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 20:38:07.100233
519 20:38:07.100876 dmc_version 0001
520 20:38:07.106825 Check phy result
521 20:38:07.113688 INFO : End of CA training
522 20:38:07.114183 INFO : End of initialization
523 20:38:07.119340 INFO : Training has run successfully!
524 20:38:07.119839 Check phy result
525 20:38:07.124843 INFO : End of initialization
526 20:38:07.125345 INFO : End of read enable training
527 20:38:07.128249 INFO : End of fine write leveling
528 20:38:07.133739 INFO : End of Write leveling coarse delay
529 20:38:07.139378 INFO : Training has run successfully!
530 20:38:07.140029 Check phy result
531 20:38:07.140500 INFO : End of initialization
532 20:38:07.144956 INFO : End of read dq deskew training
533 20:38:07.148372 INFO : End of MPR read delay center optimization
534 20:38:07.153834 INFO : End of write delay center optimization
535 20:38:07.159443 INFO : End of read delay center optimization
536 20:38:07.159943 INFO : End of max read latency training
537 20:38:07.165045 INFO : Training has run successfully!
538 20:38:07.165536 1D training succeed
539 20:38:07.173289 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 20:38:07.220804 Check phy result
541 20:38:07.221295 INFO : End of initialization
542 20:38:07.242380 INFO : End of 2D read delay Voltage center optimization
543 20:38:07.263402 INFO : End of 2D read delay Voltage center optimization
544 20:38:07.315255 INFO : End of 2D write delay Voltage center optimization
545 20:38:07.364519 INFO : End of 2D write delay Voltage center optimization
546 20:38:07.370225 INFO : Training has run successfully!
547 20:38:07.370730
548 20:38:07.371190 channel==0
549 20:38:07.375677 RxClkDly_Margin_A0==88 ps 9
550 20:38:07.376293 TxDqDly_Margin_A0==98 ps 10
551 20:38:07.381446 RxClkDly_Margin_A1==88 ps 9
552 20:38:07.381946 TxDqDly_Margin_A1==98 ps 10
553 20:38:07.382389 TrainedVREFDQ_A0==74
554 20:38:07.386891 TrainedVREFDQ_A1==74
555 20:38:07.387398 VrefDac_Margin_A0==24
556 20:38:07.387841 DeviceVref_Margin_A0==40
557 20:38:07.392551 VrefDac_Margin_A1==25
558 20:38:07.393049 DeviceVref_Margin_A1==40
559 20:38:07.393480
560 20:38:07.393911
561 20:38:07.398095 channel==1
562 20:38:07.398586 RxClkDly_Margin_A0==88 ps 9
563 20:38:07.399020 TxDqDly_Margin_A0==88 ps 9
564 20:38:07.403717 RxClkDly_Margin_A1==88 ps 9
565 20:38:07.404247 TxDqDly_Margin_A1==88 ps 9
566 20:38:07.409439 TrainedVREFDQ_A0==76
567 20:38:07.409944 TrainedVREFDQ_A1==77
568 20:38:07.410381 VrefDac_Margin_A0==22
569 20:38:07.414957 DeviceVref_Margin_A0==38
570 20:38:07.415447 VrefDac_Margin_A1==24
571 20:38:07.420513 DeviceVref_Margin_A1==37
572 20:38:07.421005
573 20:38:07.421443 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 20:38:07.422022
575 20:38:07.454106 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
576 20:38:07.454631 2D training succeed
577 20:38:07.459698 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 20:38:07.465441 auto size-- 65535DDR cs0 size: 2048MB
579 20:38:07.465940 DDR cs1 size: 2048MB
580 20:38:07.471033 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 20:38:07.471530 cs0 DataBus test pass
582 20:38:07.476535 cs1 DataBus test pass
583 20:38:07.477026 cs0 AddrBus test pass
584 20:38:07.477551 cs1 AddrBus test pass
585 20:38:07.478037
586 20:38:07.482118 100bdlr_step_size ps== 420
587 20:38:07.482621 result report
588 20:38:07.487816 boot times 0Enable ddr reg access
589 20:38:07.491920 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 20:38:07.506312 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 20:38:08.078429 0.0;M3 CHK:0;cm4_sp_mode 0
592 20:38:08.078970 MVN_1=0x00000000
593 20:38:08.083970 MVN_2=0x00000000
594 20:38:08.089730 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 20:38:08.090225 OPS=0x10
596 20:38:08.090672 ring efuse init
597 20:38:08.091101 chipver efuse init
598 20:38:08.095359 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 20:38:08.100919 [0.018961 Inits done]
600 20:38:08.101404 secure task start!
601 20:38:08.101834 high task start!
602 20:38:08.105471 low task start!
603 20:38:08.105951 run into bl31
604 20:38:08.112131 NOTICE: BL31: v1.3(release):4fc40b1
605 20:38:08.119950 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 20:38:08.120478 NOTICE: BL31: G12A normal boot!
607 20:38:08.145289 NOTICE: BL31: BL33 decompress pass
608 20:38:08.150407 ERROR: Error initializing runtime service opteed_fast
609 20:38:09.383660
610 20:38:09.384319
611 20:38:09.392100 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 20:38:09.392614
613 20:38:09.393057 Model: Libre Computer AML-A311D-CC Alta
614 20:38:09.600405 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 20:38:09.623016 DRAM: 2 GiB (effective 3.8 GiB)
616 20:38:09.766790 Core: 408 devices, 31 uclasses, devicetree: separate
617 20:38:09.772808 WDT: Not starting watchdog@f0d0
618 20:38:09.805077 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 20:38:09.817463 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 20:38:09.821500 ** Bad device specification mmc 0 **
621 20:38:09.832863 Card did not respond to voltage select! : -110
622 20:38:09.839459 ** Bad device specification mmc 0 **
623 20:38:09.839960 Couldn't find partition mmc 0
624 20:38:09.848778 Card did not respond to voltage select! : -110
625 20:38:09.854308 ** Bad device specification mmc 0 **
626 20:38:09.854812 Couldn't find partition mmc 0
627 20:38:09.858406 Error: could not access storage.
628 20:38:10.202566 Net: eth0: ethernet@ff3f0000
629 20:38:10.203109 starting USB...
630 20:38:10.454598 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 20:38:10.455103 Starting the controller
632 20:38:10.461591 USB XHCI 1.10
633 20:38:12.173819 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
634 20:38:12.174403 bl2_stage_init 0x01
635 20:38:12.174850 bl2_stage_init 0x81
636 20:38:12.179441 hw id: 0x0000 - pwm id 0x01
637 20:38:12.179940 bl2_stage_init 0xc1
638 20:38:12.180454 bl2_stage_init 0x02
639 20:38:12.180890
640 20:38:12.185076 L0:00000000
641 20:38:12.185575 L1:20000703
642 20:38:12.186009 L2:00008067
643 20:38:12.186436 L3:14000000
644 20:38:12.187952 B2:00402000
645 20:38:12.188474 B1:e0f83180
646 20:38:12.188905
647 20:38:12.189335 TE: 58124
648 20:38:12.189766
649 20:38:12.199105 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 20:38:12.199600
651 20:38:12.200073 Board ID = 1
652 20:38:12.200505 Set A53 clk to 24M
653 20:38:12.200932 Set A73 clk to 24M
654 20:38:12.204717 Set clk81 to 24M
655 20:38:12.205203 A53 clk: 1200 MHz
656 20:38:12.205638 A73 clk: 1200 MHz
657 20:38:12.210332 CLK81: 166.6M
658 20:38:12.210820 smccc: 00012a91
659 20:38:12.215929 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 20:38:12.216449 board id: 1
661 20:38:12.224523 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 20:38:12.235174 fw parse done
663 20:38:12.241143 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 20:38:12.283775 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 20:38:12.294674 PIEI prepare done
666 20:38:12.295161 fastboot data load
667 20:38:12.295598 fastboot data verify
668 20:38:12.300376 verify result: 266
669 20:38:12.305954 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 20:38:12.306448 LPDDR4 probe
671 20:38:12.306879 ddr clk to 1584MHz
672 20:38:12.313963 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 20:38:12.350374
674 20:38:12.350866 dmc_version 0001
675 20:38:12.357851 Check phy result
676 20:38:12.363796 INFO : End of CA training
677 20:38:12.364321 INFO : End of initialization
678 20:38:12.369351 INFO : Training has run successfully!
679 20:38:12.369841 Check phy result
680 20:38:12.374944 INFO : End of initialization
681 20:38:12.375433 INFO : End of read enable training
682 20:38:12.380567 INFO : End of fine write leveling
683 20:38:12.386198 INFO : End of Write leveling coarse delay
684 20:38:12.386685 INFO : Training has run successfully!
685 20:38:12.387119 Check phy result
686 20:38:12.391807 INFO : End of initialization
687 20:38:12.392337 INFO : End of read dq deskew training
688 20:38:12.397288 INFO : End of MPR read delay center optimization
689 20:38:12.402922 INFO : End of write delay center optimization
690 20:38:12.408559 INFO : End of read delay center optimization
691 20:38:12.409054 INFO : End of max read latency training
692 20:38:12.414210 INFO : Training has run successfully!
693 20:38:12.414700 1D training succeed
694 20:38:12.423297 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 20:38:12.470893 Check phy result
696 20:38:12.471382 INFO : End of initialization
697 20:38:12.493511 INFO : End of 2D read delay Voltage center optimization
698 20:38:12.513737 INFO : End of 2D read delay Voltage center optimization
699 20:38:12.565781 INFO : End of 2D write delay Voltage center optimization
700 20:38:12.615236 INFO : End of 2D write delay Voltage center optimization
701 20:38:12.620725 INFO : Training has run successfully!
702 20:38:12.621213
703 20:38:12.621651 channel==0
704 20:38:12.626295 RxClkDly_Margin_A0==88 ps 9
705 20:38:12.626783 TxDqDly_Margin_A0==98 ps 10
706 20:38:12.631907 RxClkDly_Margin_A1==78 ps 8
707 20:38:12.632422 TxDqDly_Margin_A1==98 ps 10
708 20:38:12.632863 TrainedVREFDQ_A0==74
709 20:38:12.637516 TrainedVREFDQ_A1==74
710 20:38:12.638022 VrefDac_Margin_A0==24
711 20:38:12.638455 DeviceVref_Margin_A0==40
712 20:38:12.643239 VrefDac_Margin_A1==25
713 20:38:12.643734 DeviceVref_Margin_A1==40
714 20:38:12.644214
715 20:38:12.644646
716 20:38:12.648700 channel==1
717 20:38:12.649190 RxClkDly_Margin_A0==98 ps 10
718 20:38:12.649621 TxDqDly_Margin_A0==98 ps 10
719 20:38:12.654318 RxClkDly_Margin_A1==98 ps 10
720 20:38:12.654807 TxDqDly_Margin_A1==88 ps 9
721 20:38:12.659899 TrainedVREFDQ_A0==77
722 20:38:12.660426 TrainedVREFDQ_A1==77
723 20:38:12.660863 VrefDac_Margin_A0==22
724 20:38:12.665510 DeviceVref_Margin_A0==37
725 20:38:12.665998 VrefDac_Margin_A1==22
726 20:38:12.671213 DeviceVref_Margin_A1==37
727 20:38:12.671701
728 20:38:12.672179 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 20:38:12.676696
730 20:38:12.704665 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000018 dram_vref_reg_value 0x 00000060
731 20:38:12.705203 2D training succeed
732 20:38:12.710346 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 20:38:12.715933 auto size-- 65535DDR cs0 size: 2048MB
734 20:38:12.716470 DDR cs1 size: 2048MB
735 20:38:12.721535 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 20:38:12.722043 cs0 DataBus test pass
737 20:38:12.727250 cs1 DataBus test pass
738 20:38:12.727742 cs0 AddrBus test pass
739 20:38:12.728219 cs1 AddrBus test pass
740 20:38:12.728650
741 20:38:12.732757 100bdlr_step_size ps== 420
742 20:38:12.733275 result report
743 20:38:12.738329 boot times 0Enable ddr reg access
744 20:38:12.743745 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 20:38:12.757279 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 20:38:13.331003 0.0;M3 CHK:0;cm4_sp_mode 0
747 20:38:13.331546 MVN_1=0x00000000
748 20:38:13.336494 MVN_2=0x00000000
749 20:38:13.342367 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 20:38:13.342892 OPS=0x10
751 20:38:13.343352 ring efuse init
752 20:38:13.343784 chipver efuse init
753 20:38:13.350402 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 20:38:13.350912 [0.018961 Inits done]
755 20:38:13.358125 secure task start!
756 20:38:13.358611 high task start!
757 20:38:13.359038 low task start!
758 20:38:13.359460 run into bl31
759 20:38:13.364655 NOTICE: BL31: v1.3(release):4fc40b1
760 20:38:13.372451 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 20:38:13.372939 NOTICE: BL31: G12A normal boot!
762 20:38:13.397808 NOTICE: BL31: BL33 decompress pass
763 20:38:13.403542 ERROR: Error initializing runtime service opteed_fast
764 20:38:14.636396
765 20:38:14.637029
766 20:38:14.645122 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 20:38:14.645638
768 20:38:14.646099 Model: Libre Computer AML-A311D-CC Alta
769 20:38:14.853355 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 20:38:14.876692 DRAM: 2 GiB (effective 3.8 GiB)
771 20:38:15.020123 Core: 408 devices, 31 uclasses, devicetree: separate
772 20:38:15.025598 WDT: Not starting watchdog@f0d0
773 20:38:15.057870 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 20:38:15.070314 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 20:38:15.075253 ** Bad device specification mmc 0 **
776 20:38:15.085882 Card did not respond to voltage select! : -110
777 20:38:15.093309 ** Bad device specification mmc 0 **
778 20:38:15.093816 Couldn't find partition mmc 0
779 20:38:15.101922 Card did not respond to voltage select! : -110
780 20:38:15.107086 ** Bad device specification mmc 0 **
781 20:38:15.107585 Couldn't find partition mmc 0
782 20:38:15.112109 Error: could not access storage.
783 20:38:15.455677 Net: eth0: ethernet@ff3f0000
784 20:38:15.456246 starting USB...
785 20:38:15.707393 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 20:38:15.707935 Starting the controller
787 20:38:15.714494 USB XHCI 1.10
788 20:38:17.875778 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 20:38:17.876525 bl2_stage_init 0x01
790 20:38:17.877047 bl2_stage_init 0x81
791 20:38:17.881311 hw id: 0x0000 - pwm id 0x01
792 20:38:17.881925 bl2_stage_init 0xc1
793 20:38:17.882421 bl2_stage_init 0x02
794 20:38:17.882905
795 20:38:17.886922 L0:00000000
796 20:38:17.887489 L1:20000703
797 20:38:17.888346 L2:00008067
798 20:38:17.888863 L3:14000000
799 20:38:17.889945 B2:00402000
800 20:38:17.890470 B1:e0f83180
801 20:38:17.890936
802 20:38:17.891390 TE: 58167
803 20:38:17.891837
804 20:38:17.901035 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 20:38:17.901552
806 20:38:17.902010 Board ID = 1
807 20:38:17.902453 Set A53 clk to 24M
808 20:38:17.902895 Set A73 clk to 24M
809 20:38:17.906579 Set clk81 to 24M
810 20:38:17.907082 A53 clk: 1200 MHz
811 20:38:17.907534 A73 clk: 1200 MHz
812 20:38:17.910101 CLK81: 166.6M
813 20:38:17.910599 smccc: 00012abd
814 20:38:17.915589 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 20:38:17.921268 board id: 1
816 20:38:17.926403 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 20:38:17.937091 fw parse done
818 20:38:17.942778 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 20:38:17.985882 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 20:38:17.996536 PIEI prepare done
821 20:38:17.997053 fastboot data load
822 20:38:17.997525 fastboot data verify
823 20:38:18.002130 verify result: 266
824 20:38:18.007711 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 20:38:18.008259 LPDDR4 probe
826 20:38:18.008714 ddr clk to 1584MHz
827 20:38:18.015719 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 20:38:18.052052
829 20:38:18.052573 dmc_version 0001
830 20:38:18.059653 Check phy result
831 20:38:18.065524 INFO : End of CA training
832 20:38:18.066020 INFO : End of initialization
833 20:38:18.071080 INFO : Training has run successfully!
834 20:38:18.071576 Check phy result
835 20:38:18.076662 INFO : End of initialization
836 20:38:18.077158 INFO : End of read enable training
837 20:38:18.080095 INFO : End of fine write leveling
838 20:38:18.085637 INFO : End of Write leveling coarse delay
839 20:38:18.091226 INFO : Training has run successfully!
840 20:38:18.091730 Check phy result
841 20:38:18.092217 INFO : End of initialization
842 20:38:18.096899 INFO : End of read dq deskew training
843 20:38:18.102460 INFO : End of MPR read delay center optimization
844 20:38:18.102956 INFO : End of write delay center optimization
845 20:38:18.108013 INFO : End of read delay center optimization
846 20:38:18.113665 INFO : End of max read latency training
847 20:38:18.114162 INFO : Training has run successfully!
848 20:38:18.119226 1D training succeed
849 20:38:18.125159 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 20:38:18.172654 Check phy result
851 20:38:18.173166 INFO : End of initialization
852 20:38:18.194462 INFO : End of 2D read delay Voltage center optimization
853 20:38:18.214465 INFO : End of 2D read delay Voltage center optimization
854 20:38:18.266709 INFO : End of 2D write delay Voltage center optimization
855 20:38:18.316216 INFO : End of 2D write delay Voltage center optimization
856 20:38:18.321750 INFO : Training has run successfully!
857 20:38:18.322250
858 20:38:18.322706 channel==0
859 20:38:18.327256 RxClkDly_Margin_A0==88 ps 9
860 20:38:18.327773 TxDqDly_Margin_A0==98 ps 10
861 20:38:18.330637 RxClkDly_Margin_A1==88 ps 9
862 20:38:18.331133 TxDqDly_Margin_A1==98 ps 10
863 20:38:18.336196 TrainedVREFDQ_A0==74
864 20:38:18.336696 TrainedVREFDQ_A1==74
865 20:38:18.341816 VrefDac_Margin_A0==25
866 20:38:18.342332 DeviceVref_Margin_A0==40
867 20:38:18.342784 VrefDac_Margin_A1==25
868 20:38:18.347334 DeviceVref_Margin_A1==40
869 20:38:18.347833
870 20:38:18.348300
871 20:38:18.348725 channel==1
872 20:38:18.349146 RxClkDly_Margin_A0==98 ps 10
873 20:38:18.352930 TxDqDly_Margin_A0==98 ps 10
874 20:38:18.353425 RxClkDly_Margin_A1==98 ps 10
875 20:38:18.358556 TxDqDly_Margin_A1==88 ps 9
876 20:38:18.359057 TrainedVREFDQ_A0==77
877 20:38:18.359488 TrainedVREFDQ_A1==77
878 20:38:18.364124 VrefDac_Margin_A0==22
879 20:38:18.364609 DeviceVref_Margin_A0==37
880 20:38:18.369653 VrefDac_Margin_A1==23
881 20:38:18.370135 DeviceVref_Margin_A1==37
882 20:38:18.370563
883 20:38:18.375264 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 20:38:18.375749
885 20:38:18.403296 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
886 20:38:18.408929 2D training succeed
887 20:38:18.414420 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 20:38:18.414908 auto size-- 65535DDR cs0 size: 2048MB
889 20:38:18.420054 DDR cs1 size: 2048MB
890 20:38:18.420538 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 20:38:18.425618 cs0 DataBus test pass
892 20:38:18.426104 cs1 DataBus test pass
893 20:38:18.426531 cs0 AddrBus test pass
894 20:38:18.431196 cs1 AddrBus test pass
895 20:38:18.431681
896 20:38:18.432166 100bdlr_step_size ps== 420
897 20:38:18.432606 result report
898 20:38:18.436850 boot times 0Enable ddr reg access
899 20:38:18.444629 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 20:38:18.458110 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 20:38:19.031734 0.0;M3 CHK:0;cm4_sp_mode 0
902 20:38:19.032437 MVN_1=0x00000000
903 20:38:19.037335 MVN_2=0x00000000
904 20:38:19.043108 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 20:38:19.043606 OPS=0x10
906 20:38:19.044090 ring efuse init
907 20:38:19.044534 chipver efuse init
908 20:38:19.048612 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 20:38:19.054280 [0.018961 Inits done]
910 20:38:19.054777 secure task start!
911 20:38:19.055221 high task start!
912 20:38:19.058855 low task start!
913 20:38:19.059351 run into bl31
914 20:38:19.065524 NOTICE: BL31: v1.3(release):4fc40b1
915 20:38:19.073311 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 20:38:19.073815 NOTICE: BL31: G12A normal boot!
917 20:38:19.098609 NOTICE: BL31: BL33 decompress pass
918 20:38:19.104097 ERROR: Error initializing runtime service opteed_fast
919 20:38:20.337185
920 20:38:20.337798
921 20:38:20.345668 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 20:38:20.346176
923 20:38:20.346630 Model: Libre Computer AML-A311D-CC Alta
924 20:38:20.553921 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 20:38:20.576344 DRAM: 2 GiB (effective 3.8 GiB)
926 20:38:20.720280 Core: 408 devices, 31 uclasses, devicetree: separate
927 20:38:20.726221 WDT: Not starting watchdog@f0d0
928 20:38:20.758430 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 20:38:20.770945 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 20:38:20.775936 ** Bad device specification mmc 0 **
931 20:38:20.786265 Card did not respond to voltage select! : -110
932 20:38:20.793942 ** Bad device specification mmc 0 **
933 20:38:20.794461 Couldn't find partition mmc 0
934 20:38:20.802239 Card did not respond to voltage select! : -110
935 20:38:20.807763 ** Bad device specification mmc 0 **
936 20:38:20.808138 Couldn't find partition mmc 0
937 20:38:20.812865 Error: could not access storage.
938 20:38:21.154439 Net: eth0: ethernet@ff3f0000
939 20:38:21.155057 starting USB...
940 20:38:21.407021 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 20:38:21.407548 Starting the controller
942 20:38:21.413103 USB XHCI 1.10
943 20:38:22.968105 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 20:38:22.976476 scanning usb for storage devices... 0 Storage Device(s) found
946 20:38:23.028090 Hit any key to stop autoboot: 1
947 20:38:23.029017 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
948 20:38:23.029693 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
949 20:38:23.030228 Setting prompt string to ['=>']
950 20:38:23.030764 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
951 20:38:23.043975 0
952 20:38:23.044953 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 20:38:23.045499 Sending with 10 millisecond of delay
955 20:38:24.180241 => setenv autoload no
956 20:38:24.190999 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:28)
957 20:38:24.196315 setenv autoload no
958 20:38:24.197070 Sending with 10 millisecond of delay
960 20:38:25.993916 => setenv initrd_high 0xffffffff
961 20:38:26.004654 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
962 20:38:26.005531 setenv initrd_high 0xffffffff
963 20:38:26.006284 Sending with 10 millisecond of delay
965 20:38:27.622592 => setenv fdt_high 0xffffffff
966 20:38:27.633414 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
967 20:38:27.634292 setenv fdt_high 0xffffffff
968 20:38:27.635053 Sending with 10 millisecond of delay
970 20:38:27.926905 => dhcp
971 20:38:27.937588 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
972 20:38:27.938420 dhcp
973 20:38:27.938895 Speed: 1000, full duplex
974 20:38:27.939346 BOOTP broadcast 1
975 20:38:27.941284 DHCP client bound to address 192.168.6.27 (3 ms)
976 20:38:27.942049 Sending with 10 millisecond of delay
978 20:38:29.618538 => setenv serverip 192.168.6.2
979 20:38:29.629306 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
980 20:38:29.630208 setenv serverip 192.168.6.2
981 20:38:29.630932 Sending with 10 millisecond of delay
983 20:38:33.354270 => tftpboot 0x01080000 948454/tftp-deploy-yez81sda/kernel/uImage
984 20:38:33.365071 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
985 20:38:33.365940 tftpboot 0x01080000 948454/tftp-deploy-yez81sda/kernel/uImage
986 20:38:33.366425 Speed: 1000, full duplex
987 20:38:33.366880 Using ethernet@ff3f0000 device
988 20:38:33.367864 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 20:38:33.373318 Filename '948454/tftp-deploy-yez81sda/kernel/uImage'.
990 20:38:33.377321 Load address: 0x1080000
991 20:38:33.446858 Loading: * UDP wrong checksum 000000ff 00001269
992 20:38:33.488372 UDP wrong checksum 000000ff 0000a35b
993 20:38:38.379823 ###################
994 20:38:38.380521 TFTP error: trying to overwrite reserved memory...
996 20:38:38.382033 end: 2.4.3 bootloader-commands (duration 00:00:15) [common]
999 20:38:38.384075 end: 2.4 uboot-commands (duration 00:00:47) [common]
1001 20:38:38.385784 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
1003 20:38:38.386996 end: 2 uboot-action (duration 00:00:47) [common]
1005 20:38:38.388699 Cleaning after the job
1006 20:38:38.389288 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/ramdisk
1007 20:38:38.419838 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/kernel
1008 20:38:38.438225 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/dtb
1009 20:38:38.438966 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/nfsrootfs
1010 20:38:38.568607 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/948454/tftp-deploy-yez81sda/modules
1011 20:38:38.620141 start: 4.1 power-off (timeout 00:00:30) [common]
1012 20:38:38.620782 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1013 20:38:38.651017 >> OK - accepted request
1014 20:38:38.653059 Returned 0 in 0 seconds
1015 20:38:38.753767 end: 4.1 power-off (duration 00:00:00) [common]
1017 20:38:38.754651 start: 4.2 read-feedback (timeout 00:10:00) [common]
1018 20:38:38.755296 Listened to connection for namespace 'common' for up to 1s
1019 20:38:39.755243 Finalising connection for namespace 'common'
1020 20:38:39.755930 Disconnecting from shell: Finalise
1021 20:38:39.756532 =>
1022 20:38:39.857519 end: 4.2 read-feedback (duration 00:00:01) [common]
1023 20:38:39.858140 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/948454
1024 20:38:41.627618 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/948454
1025 20:38:41.628269 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.