Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:14:15.281565 lava-dispatcher, installed at version: 2024.01
2 03:14:15.282341 start: 0 validate
3 03:14:15.282830 Start time: 2024-11-04 03:14:15.282798+00:00 (UTC)
4 03:14:15.283377 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:14:15.283920 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:14:15.326441 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:14:15.326990 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 03:14:15.356234 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:14:15.356871 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 03:14:15.388500 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:14:15.389003 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:14:15.422334 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:14:15.422827 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 03:14:15.468039 validate duration: 0.19
16 03:14:15.469527 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:14:15.470133 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:14:15.470738 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:14:15.471732 Not decompressing ramdisk as can be used compressed.
20 03:14:15.472543 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 03:14:15.473054 saving as /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/ramdisk/initrd.cpio.gz
22 03:14:15.473572 total size: 5628182 (5 MB)
23 03:14:15.518093 progress 0 % (0 MB)
24 03:14:15.526069 progress 5 % (0 MB)
25 03:14:15.534621 progress 10 % (0 MB)
26 03:14:15.542268 progress 15 % (0 MB)
27 03:14:15.550755 progress 20 % (1 MB)
28 03:14:15.556996 progress 25 % (1 MB)
29 03:14:15.560949 progress 30 % (1 MB)
30 03:14:15.564921 progress 35 % (1 MB)
31 03:14:15.568533 progress 40 % (2 MB)
32 03:14:15.572439 progress 45 % (2 MB)
33 03:14:15.575932 progress 50 % (2 MB)
34 03:14:15.579919 progress 55 % (2 MB)
35 03:14:15.583827 progress 60 % (3 MB)
36 03:14:15.587389 progress 65 % (3 MB)
37 03:14:15.591303 progress 70 % (3 MB)
38 03:14:15.594904 progress 75 % (4 MB)
39 03:14:15.598784 progress 80 % (4 MB)
40 03:14:15.602280 progress 85 % (4 MB)
41 03:14:15.606202 progress 90 % (4 MB)
42 03:14:15.609971 progress 95 % (5 MB)
43 03:14:15.613199 progress 100 % (5 MB)
44 03:14:15.613850 5 MB downloaded in 0.14 s (38.26 MB/s)
45 03:14:15.614406 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:14:15.615320 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:14:15.615630 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:14:15.615916 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:14:15.616431 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6/arm64/defconfig+debug/gcc-12/kernel/Image
51 03:14:15.616687 saving as /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/kernel/Image
52 03:14:15.616911 total size: 169941504 (162 MB)
53 03:14:15.617134 No compression specified
54 03:14:15.652753 progress 0 % (0 MB)
55 03:14:15.787538 progress 5 % (8 MB)
56 03:14:15.906896 progress 10 % (16 MB)
57 03:14:16.021717 progress 15 % (24 MB)
58 03:14:16.129010 progress 20 % (32 MB)
59 03:14:16.244615 progress 25 % (40 MB)
60 03:14:16.358860 progress 30 % (48 MB)
61 03:14:16.472638 progress 35 % (56 MB)
62 03:14:16.586719 progress 40 % (64 MB)
63 03:14:16.703116 progress 45 % (72 MB)
64 03:14:16.815223 progress 50 % (81 MB)
65 03:14:16.928239 progress 55 % (89 MB)
66 03:14:17.040872 progress 60 % (97 MB)
67 03:14:17.154344 progress 65 % (105 MB)
68 03:14:17.267553 progress 70 % (113 MB)
69 03:14:17.381313 progress 75 % (121 MB)
70 03:14:17.494744 progress 80 % (129 MB)
71 03:14:17.606188 progress 85 % (137 MB)
72 03:14:17.715115 progress 90 % (145 MB)
73 03:14:17.826373 progress 95 % (153 MB)
74 03:14:17.937129 progress 100 % (162 MB)
75 03:14:17.937723 162 MB downloaded in 2.32 s (69.83 MB/s)
76 03:14:17.938199 end: 1.2.1 http-download (duration 00:00:02) [common]
78 03:14:17.939021 end: 1.2 download-retry (duration 00:00:02) [common]
79 03:14:17.939295 start: 1.3 download-retry (timeout 00:09:58) [common]
80 03:14:17.939564 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 03:14:17.940168 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 03:14:17.940561 saving as /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/dtb/meson-g12b-a311d-libretech-cc.dtb
83 03:14:17.940905 total size: 54703 (0 MB)
84 03:14:17.941189 No compression specified
85 03:14:17.982819 progress 59 % (0 MB)
86 03:14:17.983737 progress 100 % (0 MB)
87 03:14:17.984401 0 MB downloaded in 0.04 s (1.20 MB/s)
88 03:14:17.984993 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:14:17.985906 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:14:17.986232 start: 1.4 download-retry (timeout 00:09:57) [common]
92 03:14:17.986518 start: 1.4.1 http-download (timeout 00:09:57) [common]
93 03:14:17.986999 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 03:14:17.987261 saving as /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/nfsrootfs/full.rootfs.tar
95 03:14:17.987475 total size: 107552908 (102 MB)
96 03:14:17.987692 Using unxz to decompress xz
97 03:14:18.022039 progress 0 % (0 MB)
98 03:14:18.684465 progress 5 % (5 MB)
99 03:14:19.414090 progress 10 % (10 MB)
100 03:14:20.124977 progress 15 % (15 MB)
101 03:14:20.872514 progress 20 % (20 MB)
102 03:14:21.444289 progress 25 % (25 MB)
103 03:14:22.064357 progress 30 % (30 MB)
104 03:14:22.798964 progress 35 % (35 MB)
105 03:14:23.160370 progress 40 % (41 MB)
106 03:14:23.587036 progress 45 % (46 MB)
107 03:14:24.273082 progress 50 % (51 MB)
108 03:14:24.951184 progress 55 % (56 MB)
109 03:14:25.696146 progress 60 % (61 MB)
110 03:14:26.441039 progress 65 % (66 MB)
111 03:14:27.176563 progress 70 % (71 MB)
112 03:14:27.932380 progress 75 % (76 MB)
113 03:14:28.601619 progress 80 % (82 MB)
114 03:14:29.305798 progress 85 % (87 MB)
115 03:14:30.045635 progress 90 % (92 MB)
116 03:14:30.758455 progress 95 % (97 MB)
117 03:14:31.494555 progress 100 % (102 MB)
118 03:14:31.506319 102 MB downloaded in 13.52 s (7.59 MB/s)
119 03:14:31.507205 end: 1.4.1 http-download (duration 00:00:14) [common]
121 03:14:31.508931 end: 1.4 download-retry (duration 00:00:14) [common]
122 03:14:31.509455 start: 1.5 download-retry (timeout 00:09:44) [common]
123 03:14:31.509970 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 03:14:31.510859 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 03:14:31.511328 saving as /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/modules/modules.tar
126 03:14:31.511735 total size: 27633176 (26 MB)
127 03:14:31.512197 Using unxz to decompress xz
128 03:14:31.560304 progress 0 % (0 MB)
129 03:14:31.777348 progress 5 % (1 MB)
130 03:14:31.975094 progress 10 % (2 MB)
131 03:14:32.205847 progress 15 % (3 MB)
132 03:14:32.442559 progress 20 % (5 MB)
133 03:14:32.639306 progress 25 % (6 MB)
134 03:14:32.839642 progress 30 % (7 MB)
135 03:14:33.045131 progress 35 % (9 MB)
136 03:14:33.239693 progress 40 % (10 MB)
137 03:14:33.432519 progress 45 % (11 MB)
138 03:14:33.645112 progress 50 % (13 MB)
139 03:14:33.844485 progress 55 % (14 MB)
140 03:14:34.059796 progress 60 % (15 MB)
141 03:14:34.268305 progress 65 % (17 MB)
142 03:14:34.469574 progress 70 % (18 MB)
143 03:14:34.677931 progress 75 % (19 MB)
144 03:14:34.877484 progress 80 % (21 MB)
145 03:14:35.085050 progress 85 % (22 MB)
146 03:14:35.294746 progress 90 % (23 MB)
147 03:14:35.497721 progress 95 % (25 MB)
148 03:14:35.692923 progress 100 % (26 MB)
149 03:14:35.704202 26 MB downloaded in 4.19 s (6.29 MB/s)
150 03:14:35.705208 end: 1.5.1 http-download (duration 00:00:04) [common]
152 03:14:35.706958 end: 1.5 download-retry (duration 00:00:04) [common]
153 03:14:35.707527 start: 1.6 prepare-tftp-overlay (timeout 00:09:40) [common]
154 03:14:35.708127 start: 1.6.1 extract-nfsrootfs (timeout 00:09:40) [common]
155 03:14:45.294529 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/932528/extract-nfsrootfs-cgezs3i5
156 03:14:45.295125 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 03:14:45.295416 start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
158 03:14:45.296057 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g
159 03:14:45.296520 makedir: /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin
160 03:14:45.296866 makedir: /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/tests
161 03:14:45.297186 makedir: /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/results
162 03:14:45.297527 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-add-keys
163 03:14:45.298061 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-add-sources
164 03:14:45.298564 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-background-process-start
165 03:14:45.299062 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-background-process-stop
166 03:14:45.299586 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-common-functions
167 03:14:45.300120 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-echo-ipv4
168 03:14:45.300623 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-install-packages
169 03:14:45.301113 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-installed-packages
170 03:14:45.301675 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-os-build
171 03:14:45.302170 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-probe-channel
172 03:14:45.302650 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-probe-ip
173 03:14:45.303151 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-target-ip
174 03:14:45.303659 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-target-mac
175 03:14:45.304183 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-target-storage
176 03:14:45.304692 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-test-case
177 03:14:45.305176 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-test-event
178 03:14:45.305654 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-test-feedback
179 03:14:45.306129 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-test-raise
180 03:14:45.306600 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-test-reference
181 03:14:45.307092 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-test-runner
182 03:14:45.307596 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-test-set
183 03:14:45.308097 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-test-shell
184 03:14:45.308593 Updating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-install-packages (oe)
185 03:14:45.309131 Updating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/bin/lava-installed-packages (oe)
186 03:14:45.309577 Creating /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/environment
187 03:14:45.309946 LAVA metadata
188 03:14:45.310208 - LAVA_JOB_ID=932528
189 03:14:45.310424 - LAVA_DISPATCHER_IP=192.168.6.2
190 03:14:45.310771 start: 1.6.2.1 ssh-authorize (timeout 00:09:30) [common]
191 03:14:45.311706 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 03:14:45.312058 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:30) [common]
193 03:14:45.312279 skipped lava-vland-overlay
194 03:14:45.312524 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 03:14:45.312781 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:30) [common]
196 03:14:45.313001 skipped lava-multinode-overlay
197 03:14:45.313246 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 03:14:45.313501 start: 1.6.2.4 test-definition (timeout 00:09:30) [common]
199 03:14:45.313750 Loading test definitions
200 03:14:45.314029 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:30) [common]
201 03:14:45.314248 Using /lava-932528 at stage 0
202 03:14:45.315433 uuid=932528_1.6.2.4.1 testdef=None
203 03:14:45.315751 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 03:14:45.316047 start: 1.6.2.4.2 test-overlay (timeout 00:09:30) [common]
205 03:14:45.317852 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 03:14:45.318645 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:30) [common]
208 03:14:45.320877 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 03:14:45.321708 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:30) [common]
211 03:14:45.323829 runner path: /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/0/tests/0_dmesg test_uuid 932528_1.6.2.4.1
212 03:14:45.324396 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 03:14:45.325161 Creating lava-test-runner.conf files
215 03:14:45.325366 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/932528/lava-overlay-pgc1_28g/lava-932528/0 for stage 0
216 03:14:45.325693 - 0_dmesg
217 03:14:45.326037 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 03:14:45.326317 start: 1.6.2.5 compress-overlay (timeout 00:09:30) [common]
219 03:14:45.347465 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 03:14:45.347818 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:30) [common]
221 03:14:45.348110 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 03:14:45.348375 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 03:14:45.348639 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
224 03:14:45.954127 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 03:14:45.954595 start: 1.6.4 extract-modules (timeout 00:09:30) [common]
226 03:14:45.954841 extracting modules file /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/932528/extract-nfsrootfs-cgezs3i5
227 03:14:47.861064 extracting modules file /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/932528/extract-overlay-ramdisk-5f0ttu3g/ramdisk
228 03:14:49.598678 end: 1.6.4 extract-modules (duration 00:00:04) [common]
229 03:14:49.599125 start: 1.6.5 apply-overlay-tftp (timeout 00:09:26) [common]
230 03:14:49.599402 [common] Applying overlay to NFS
231 03:14:49.599617 [common] Applying overlay /var/lib/lava/dispatcher/tmp/932528/compress-overlay-0lbjjin3/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/932528/extract-nfsrootfs-cgezs3i5
232 03:14:49.628841 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 03:14:49.629211 start: 1.6.6 prepare-kernel (timeout 00:09:26) [common]
234 03:14:49.629484 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:26) [common]
235 03:14:49.629713 Converting downloaded kernel to a uImage
236 03:14:49.630013 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/kernel/Image /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/kernel/uImage
237 03:14:51.356270 output: Image Name:
238 03:14:51.356694 output: Created: Mon Nov 4 03:14:49 2024
239 03:14:51.356912 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 03:14:51.357117 output: Data Size: 169941504 Bytes = 165958.50 KiB = 162.07 MiB
241 03:14:51.357316 output: Load Address: 01080000
242 03:14:51.357511 output: Entry Point: 01080000
243 03:14:51.357705 output:
244 03:14:51.358027 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 03:14:51.358287 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 03:14:51.358546 start: 1.6.7 configure-preseed-file (timeout 00:09:24) [common]
247 03:14:51.358794 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 03:14:51.359044 start: 1.6.8 compress-ramdisk (timeout 00:09:24) [common]
249 03:14:51.359298 Building ramdisk /var/lib/lava/dispatcher/tmp/932528/extract-overlay-ramdisk-5f0ttu3g/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/932528/extract-overlay-ramdisk-5f0ttu3g/ramdisk
250 03:14:57.306551 >> 426760 blocks
251 03:15:14.796484 Adding RAMdisk u-boot header.
252 03:15:14.797142 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/932528/extract-overlay-ramdisk-5f0ttu3g/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/932528/extract-overlay-ramdisk-5f0ttu3g/ramdisk.cpio.gz.uboot
253 03:15:15.354785 output: Image Name:
254 03:15:15.355443 output: Created: Mon Nov 4 03:15:14 2024
255 03:15:15.355880 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 03:15:15.356348 output: Data Size: 50959237 Bytes = 49764.88 KiB = 48.60 MiB
257 03:15:15.356754 output: Load Address: 00000000
258 03:15:15.357145 output: Entry Point: 00000000
259 03:15:15.357537 output:
260 03:15:15.358600 rename /var/lib/lava/dispatcher/tmp/932528/extract-overlay-ramdisk-5f0ttu3g/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/ramdisk/ramdisk.cpio.gz.uboot
261 03:15:15.359367 end: 1.6.8 compress-ramdisk (duration 00:00:24) [common]
262 03:15:15.359939 end: 1.6 prepare-tftp-overlay (duration 00:00:40) [common]
263 03:15:15.360507 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:00) [common]
264 03:15:15.360964 No LXC device requested
265 03:15:15.361471 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 03:15:15.361976 start: 1.8 deploy-device-env (timeout 00:09:00) [common]
267 03:15:15.362465 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 03:15:15.362873 Checking files for TFTP limit of 4294967296 bytes.
269 03:15:15.365668 end: 1 tftp-deploy (duration 00:01:00) [common]
270 03:15:15.366316 start: 2 uboot-action (timeout 00:05:00) [common]
271 03:15:15.366845 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 03:15:15.367344 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 03:15:15.367840 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 03:15:15.368410 Using kernel file from prepare-kernel: 932528/tftp-deploy-7nwradr6/kernel/uImage
275 03:15:15.369102 substitutions:
276 03:15:15.369522 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 03:15:15.369929 - {DTB_ADDR}: 0x01070000
278 03:15:15.370324 - {DTB}: 932528/tftp-deploy-7nwradr6/dtb/meson-g12b-a311d-libretech-cc.dtb
279 03:15:15.370724 - {INITRD}: 932528/tftp-deploy-7nwradr6/ramdisk/ramdisk.cpio.gz.uboot
280 03:15:15.371120 - {KERNEL_ADDR}: 0x01080000
281 03:15:15.371513 - {KERNEL}: 932528/tftp-deploy-7nwradr6/kernel/uImage
282 03:15:15.371907 - {LAVA_MAC}: None
283 03:15:15.372380 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/932528/extract-nfsrootfs-cgezs3i5
284 03:15:15.372783 - {NFS_SERVER_IP}: 192.168.6.2
285 03:15:15.373206 - {PRESEED_CONFIG}: None
286 03:15:15.373614 - {PRESEED_LOCAL}: None
287 03:15:15.374013 - {RAMDISK_ADDR}: 0x08000000
288 03:15:15.374405 - {RAMDISK}: 932528/tftp-deploy-7nwradr6/ramdisk/ramdisk.cpio.gz.uboot
289 03:15:15.374796 - {ROOT_PART}: None
290 03:15:15.375184 - {ROOT}: None
291 03:15:15.375576 - {SERVER_IP}: 192.168.6.2
292 03:15:15.375962 - {TEE_ADDR}: 0x83000000
293 03:15:15.376381 - {TEE}: None
294 03:15:15.376773 Parsed boot commands:
295 03:15:15.377149 - setenv autoload no
296 03:15:15.377534 - setenv initrd_high 0xffffffff
297 03:15:15.377944 - setenv fdt_high 0xffffffff
298 03:15:15.378346 - dhcp
299 03:15:15.379330 - setenv serverip 192.168.6.2
300 03:15:15.379756 - tftpboot 0x01080000 932528/tftp-deploy-7nwradr6/kernel/uImage
301 03:15:15.380204 - tftpboot 0x08000000 932528/tftp-deploy-7nwradr6/ramdisk/ramdisk.cpio.gz.uboot
302 03:15:15.380616 - tftpboot 0x01070000 932528/tftp-deploy-7nwradr6/dtb/meson-g12b-a311d-libretech-cc.dtb
303 03:15:15.381025 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/932528/extract-nfsrootfs-cgezs3i5,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 03:15:15.381440 - bootm 0x01080000 0x08000000 0x01070000
305 03:15:15.381989 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 03:15:15.383597 start: 2.3 connect-device (timeout 00:05:00) [common]
308 03:15:15.384063 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 03:15:15.399013 Setting prompt string to ['lava-test: # ']
310 03:15:15.400568 end: 2.3 connect-device (duration 00:00:00) [common]
311 03:15:15.401249 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 03:15:15.401857 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 03:15:15.402523 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 03:15:15.403762 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 03:15:15.439274 >> OK - accepted request
316 03:15:15.440495 Returned 0 in 0 seconds
317 03:15:15.541396 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 03:15:15.543112 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 03:15:15.543714 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 03:15:15.544305 Setting prompt string to ['Hit any key to stop autoboot']
322 03:15:15.544795 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 03:15:15.546389 Trying 192.168.56.21...
324 03:15:15.546884 Connected to conserv1.
325 03:15:15.547319 Escape character is '^]'.
326 03:15:15.547742
327 03:15:15.548222 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 03:15:15.548668
329 03:15:27.100382 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 03:15:27.101008 bl2_stage_init 0x01
331 03:15:27.101428 bl2_stage_init 0x81
332 03:15:27.105923 hw id: 0x0000 - pwm id 0x01
333 03:15:27.106491 bl2_stage_init 0xc1
334 03:15:27.106891 bl2_stage_init 0x02
335 03:15:27.107345
336 03:15:27.111612 L0:00000000
337 03:15:27.112171 L1:20000703
338 03:15:27.112598 L2:00008067
339 03:15:27.112989 L3:14000000
340 03:15:27.114404 B2:00402000
341 03:15:27.114836 B1:e0f83180
342 03:15:27.115228
343 03:15:27.115624 TE: 58159
344 03:15:27.116044
345 03:15:27.125571 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 03:15:27.126116
347 03:15:27.126515 Board ID = 1
348 03:15:27.126902 Set A53 clk to 24M
349 03:15:27.127290 Set A73 clk to 24M
350 03:15:27.131191 Set clk81 to 24M
351 03:15:27.131686 A53 clk: 1200 MHz
352 03:15:27.132109 A73 clk: 1200 MHz
353 03:15:27.136748 CLK81: 166.6M
354 03:15:27.137253 smccc: 00012ab5
355 03:15:27.142474 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 03:15:27.143027 board id: 1
357 03:15:27.151176 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 03:15:27.161546 fw parse done
359 03:15:27.167461 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 03:15:27.210080 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 03:15:27.220963 PIEI prepare done
362 03:15:27.221486 fastboot data load
363 03:15:27.221882 fastboot data verify
364 03:15:27.228266 verify result: 266
365 03:15:27.232274 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 03:15:27.232761 LPDDR4 probe
367 03:15:27.233160 ddr clk to 1584MHz
368 03:15:27.240294 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 03:15:27.277650
370 03:15:27.278232 dmc_version 0001
371 03:15:27.284214 Check phy result
372 03:15:27.290047 INFO : End of CA training
373 03:15:27.290555 INFO : End of initialization
374 03:15:27.295658 INFO : Training has run successfully!
375 03:15:27.296215 Check phy result
376 03:15:27.301259 INFO : End of initialization
377 03:15:27.301755 INFO : End of read enable training
378 03:15:27.306842 INFO : End of fine write leveling
379 03:15:27.312513 INFO : End of Write leveling coarse delay
380 03:15:27.312952 INFO : Training has run successfully!
381 03:15:27.313345 Check phy result
382 03:15:27.318280 INFO : End of initialization
383 03:15:27.318716 INFO : End of read dq deskew training
384 03:15:27.323652 INFO : End of MPR read delay center optimization
385 03:15:27.329614 INFO : End of write delay center optimization
386 03:15:27.334865 INFO : End of read delay center optimization
387 03:15:27.335309 INFO : End of max read latency training
388 03:15:27.340601 INFO : Training has run successfully!
389 03:15:27.341212 1D training succeed
390 03:15:27.349696 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 03:15:27.397403 Check phy result
392 03:15:27.398073 INFO : End of initialization
393 03:15:27.419943 INFO : End of 2D read delay Voltage center optimization
394 03:15:27.440261 INFO : End of 2D read delay Voltage center optimization
395 03:15:27.492210 INFO : End of 2D write delay Voltage center optimization
396 03:15:27.541729 INFO : End of 2D write delay Voltage center optimization
397 03:15:27.547142 INFO : Training has run successfully!
398 03:15:27.547762
399 03:15:27.548298 channel==0
400 03:15:27.552731 RxClkDly_Margin_A0==88 ps 9
401 03:15:27.553360 TxDqDly_Margin_A0==98 ps 10
402 03:15:27.558289 RxClkDly_Margin_A1==88 ps 9
403 03:15:27.558850 TxDqDly_Margin_A1==88 ps 9
404 03:15:27.559307 TrainedVREFDQ_A0==74
405 03:15:27.563912 TrainedVREFDQ_A1==74
406 03:15:27.564565 VrefDac_Margin_A0==24
407 03:15:27.565033 DeviceVref_Margin_A0==40
408 03:15:27.569675 VrefDac_Margin_A1==24
409 03:15:27.570296 DeviceVref_Margin_A1==40
410 03:15:27.570743
411 03:15:27.571190
412 03:15:27.571636 channel==1
413 03:15:27.575291 RxClkDly_Margin_A0==98 ps 10
414 03:15:27.575903 TxDqDly_Margin_A0==98 ps 10
415 03:15:27.580752 RxClkDly_Margin_A1==88 ps 9
416 03:15:27.581224 TxDqDly_Margin_A1==88 ps 9
417 03:15:27.586251 TrainedVREFDQ_A0==77
418 03:15:27.586859 TrainedVREFDQ_A1==77
419 03:15:27.587332 VrefDac_Margin_A0==22
420 03:15:27.591999 DeviceVref_Margin_A0==37
421 03:15:27.592411 VrefDac_Margin_A1==24
422 03:15:27.597588 DeviceVref_Margin_A1==37
423 03:15:27.597996
424 03:15:27.598274 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 03:15:27.598554
426 03:15:27.630936 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000016 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 03:15:27.631395 2D training succeed
428 03:15:27.636593 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 03:15:27.642900 auto size-- 65535DDR cs0 size: 2048MB
430 03:15:27.643423 DDR cs1 size: 2048MB
431 03:15:27.647802 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 03:15:27.648364 cs0 DataBus test pass
433 03:15:27.653439 cs1 DataBus test pass
434 03:15:27.653946 cs0 AddrBus test pass
435 03:15:27.654391 cs1 AddrBus test pass
436 03:15:27.654825
437 03:15:27.658995 100bdlr_step_size ps== 420
438 03:15:27.659508 result report
439 03:15:27.664962 boot times 0Enable ddr reg access
440 03:15:27.669863 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 03:15:27.683321 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 03:15:28.257122 0.0;M3 CHK:0;cm4_sp_mode 0
443 03:15:28.257807 MVN_1=0x00000000
444 03:15:28.262555 MVN_2=0x00000000
445 03:15:28.268280 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 03:15:28.268767 OPS=0x10
447 03:15:28.269214 ring efuse init
448 03:15:28.269665 chipver efuse init
449 03:15:28.273882 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 03:15:28.279568 [0.018960 Inits done]
451 03:15:28.280096 secure task start!
452 03:15:28.280544 high task start!
453 03:15:28.284069 low task start!
454 03:15:28.284570 run into bl31
455 03:15:28.290705 NOTICE: BL31: v1.3(release):4fc40b1
456 03:15:28.298612 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 03:15:28.299102 NOTICE: BL31: G12A normal boot!
458 03:15:28.323878 NOTICE: BL31: BL33 decompress pass
459 03:15:28.329613 ERROR: Error initializing runtime service opteed_fast
460 03:15:29.562497
461 03:15:29.563172
462 03:15:29.571003 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 03:15:29.571499
464 03:15:29.571729 Model: Libre Computer AML-A311D-CC Alta
465 03:15:29.779432 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 03:15:29.802734 DRAM: 2 GiB (effective 3.8 GiB)
467 03:15:29.945671 Core: 408 devices, 31 uclasses, devicetree: separate
468 03:15:29.951434 WDT: Not starting watchdog@f0d0
469 03:15:29.983853 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 03:15:29.996150 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 03:15:30.000163 ** Bad device specification mmc 0 **
472 03:15:30.011522 Card did not respond to voltage select! : -110
473 03:15:30.019122 ** Bad device specification mmc 0 **
474 03:15:30.019451 Couldn't find partition mmc 0
475 03:15:30.027921 Card did not respond to voltage select! : -110
476 03:15:30.033042 ** Bad device specification mmc 0 **
477 03:15:30.033654 Couldn't find partition mmc 0
478 03:15:30.038108 Error: could not access storage.
479 03:15:31.300847 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 03:15:31.301532 bl2_stage_init 0x01
481 03:15:31.302005 bl2_stage_init 0x81
482 03:15:31.306414 hw id: 0x0000 - pwm id 0x01
483 03:15:31.306977 bl2_stage_init 0xc1
484 03:15:31.307448 bl2_stage_init 0x02
485 03:15:31.307901
486 03:15:31.312018 L0:00000000
487 03:15:31.312589 L1:20000703
488 03:15:31.313054 L2:00008067
489 03:15:31.313540 L3:14000000
490 03:15:31.314862 B2:00402000
491 03:15:31.315364 B1:e0f83180
492 03:15:31.315822
493 03:15:31.316311 TE: 58124
494 03:15:31.316766
495 03:15:31.326053 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 03:15:31.326559
497 03:15:31.327058 Board ID = 1
498 03:15:31.327555 Set A53 clk to 24M
499 03:15:31.328086 Set A73 clk to 24M
500 03:15:31.331676 Set clk81 to 24M
501 03:15:31.332236 A53 clk: 1200 MHz
502 03:15:31.332758 A73 clk: 1200 MHz
503 03:15:31.337254 CLK81: 166.6M
504 03:15:31.337835 smccc: 00012a92
505 03:15:31.342854 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 03:15:31.343402 board id: 1
507 03:15:31.351484 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 03:15:31.362157 fw parse done
509 03:15:31.368150 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 03:15:31.410688 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 03:15:31.421609 PIEI prepare done
512 03:15:31.422181 fastboot data load
513 03:15:31.422666 fastboot data verify
514 03:15:31.427353 verify result: 266
515 03:15:31.432972 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 03:15:31.433529 LPDDR4 probe
517 03:15:31.433993 ddr clk to 1584MHz
518 03:15:31.440929 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 03:15:31.478250
520 03:15:31.478875 dmc_version 0001
521 03:15:31.484840 Check phy result
522 03:15:31.490755 INFO : End of CA training
523 03:15:31.491301 INFO : End of initialization
524 03:15:31.496322 INFO : Training has run successfully!
525 03:15:31.496861 Check phy result
526 03:15:31.501942 INFO : End of initialization
527 03:15:31.502478 INFO : End of read enable training
528 03:15:31.507567 INFO : End of fine write leveling
529 03:15:31.513153 INFO : End of Write leveling coarse delay
530 03:15:31.513699 INFO : Training has run successfully!
531 03:15:31.514157 Check phy result
532 03:15:31.518736 INFO : End of initialization
533 03:15:31.519256 INFO : End of read dq deskew training
534 03:15:31.524344 INFO : End of MPR read delay center optimization
535 03:15:31.529928 INFO : End of write delay center optimization
536 03:15:31.535525 INFO : End of read delay center optimization
537 03:15:31.536114 INFO : End of max read latency training
538 03:15:31.541252 INFO : Training has run successfully!
539 03:15:31.541852 1D training succeed
540 03:15:31.550241 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 03:15:31.597941 Check phy result
542 03:15:31.598579 INFO : End of initialization
543 03:15:31.620524 INFO : End of 2D read delay Voltage center optimization
544 03:15:31.640725 INFO : End of 2D read delay Voltage center optimization
545 03:15:31.692749 INFO : End of 2D write delay Voltage center optimization
546 03:15:31.742202 INFO : End of 2D write delay Voltage center optimization
547 03:15:31.747696 INFO : Training has run successfully!
548 03:15:31.748276
549 03:15:31.748736 channel==0
550 03:15:31.753292 RxClkDly_Margin_A0==88 ps 9
551 03:15:31.753866 TxDqDly_Margin_A0==98 ps 10
552 03:15:31.758917 RxClkDly_Margin_A1==88 ps 9
553 03:15:31.759438 TxDqDly_Margin_A1==98 ps 10
554 03:15:31.759898 TrainedVREFDQ_A0==74
555 03:15:31.764509 TrainedVREFDQ_A1==74
556 03:15:31.765045 VrefDac_Margin_A0==24
557 03:15:31.765494 DeviceVref_Margin_A0==40
558 03:15:31.770177 VrefDac_Margin_A1==25
559 03:15:31.770688 DeviceVref_Margin_A1==40
560 03:15:31.771136
561 03:15:31.771581
562 03:15:31.775677 channel==1
563 03:15:31.776218 RxClkDly_Margin_A0==98 ps 10
564 03:15:31.776667 TxDqDly_Margin_A0==98 ps 10
565 03:15:31.781292 RxClkDly_Margin_A1==98 ps 10
566 03:15:31.781811 TxDqDly_Margin_A1==98 ps 10
567 03:15:31.786889 TrainedVREFDQ_A0==77
568 03:15:31.787410 TrainedVREFDQ_A1==77
569 03:15:31.787862 VrefDac_Margin_A0==22
570 03:15:31.792489 DeviceVref_Margin_A0==37
571 03:15:31.793004 VrefDac_Margin_A1==22
572 03:15:31.798163 DeviceVref_Margin_A1==37
573 03:15:31.798674
574 03:15:31.799126 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 03:15:31.803680
576 03:15:31.831654 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
577 03:15:31.832284 2D training succeed
578 03:15:31.837317 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 03:15:31.842916 auto size-- 65535DDR cs0 size: 2048MB
580 03:15:31.843444 DDR cs1 size: 2048MB
581 03:15:31.848524 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 03:15:31.849091 cs0 DataBus test pass
583 03:15:31.854287 cs1 DataBus test pass
584 03:15:31.854908 cs0 AddrBus test pass
585 03:15:31.855393 cs1 AddrBus test pass
586 03:15:31.856108
587 03:15:31.859775 100bdlr_step_size ps== 420
588 03:15:31.860379 result report
589 03:15:31.865340 boot times 0Enable ddr reg access
590 03:15:31.870871 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 03:15:31.884330 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 03:15:32.458635 0.0;M3 CHK:0;cm4_sp_mode 0
593 03:15:32.459339 MVN_1=0x00000000
594 03:15:32.462903 MVN_2=0x00000000
595 03:15:32.468567 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 03:15:32.469178 OPS=0x10
597 03:15:32.469643 ring efuse init
598 03:15:32.470088 chipver efuse init
599 03:15:32.476999 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 03:15:32.477603 [0.018961 Inits done]
601 03:15:32.478054 secure task start!
602 03:15:32.484546 high task start!
603 03:15:32.485144 low task start!
604 03:15:32.485580 run into bl31
605 03:15:32.491046 NOTICE: BL31: v1.3(release):4fc40b1
606 03:15:32.498908 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 03:15:32.499426 NOTICE: BL31: G12A normal boot!
608 03:15:32.524308 NOTICE: BL31: BL33 decompress pass
609 03:15:32.530093 ERROR: Error initializing runtime service opteed_fast
610 03:15:33.762796
611 03:15:33.763462
612 03:15:33.771181 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 03:15:33.771703
614 03:15:33.772217 Model: Libre Computer AML-A311D-CC Alta
615 03:15:33.978704 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 03:15:34.002901 DRAM: 2 GiB (effective 3.8 GiB)
617 03:15:34.145832 Core: 408 devices, 31 uclasses, devicetree: separate
618 03:15:34.151768 WDT: Not starting watchdog@f0d0
619 03:15:34.184162 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 03:15:34.196458 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 03:15:34.201517 ** Bad device specification mmc 0 **
622 03:15:34.211833 Card did not respond to voltage select! : -110
623 03:15:34.219461 ** Bad device specification mmc 0 **
624 03:15:34.219958 Couldn't find partition mmc 0
625 03:15:34.227682 Card did not respond to voltage select! : -110
626 03:15:34.233242 ** Bad device specification mmc 0 **
627 03:15:34.233732 Couldn't find partition mmc 0
628 03:15:34.238290 Error: could not access storage.
629 03:15:34.581965 Net: eth0: ethernet@ff3f0000
630 03:15:34.582381 starting USB...
631 03:15:34.833809 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 03:15:34.834375 Starting the controller
633 03:15:34.840741 USB XHCI 1.10
634 03:15:36.549899 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 03:15:36.550362 bl2_stage_init 0x01
636 03:15:36.550600 bl2_stage_init 0x81
637 03:15:36.555319 hw id: 0x0000 - pwm id 0x01
638 03:15:36.555753 bl2_stage_init 0xc1
639 03:15:36.555974 bl2_stage_init 0x02
640 03:15:36.556227
641 03:15:36.560977 L0:00000000
642 03:15:36.561309 L1:20000703
643 03:15:36.561520 L2:00008067
644 03:15:36.561723 L3:14000000
645 03:15:36.566527 B2:00402000
646 03:15:36.567050 B1:e0f83180
647 03:15:36.567401
648 03:15:36.567720 TE: 58124
649 03:15:36.568079
650 03:15:36.572191 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 03:15:36.572694
652 03:15:36.572942 Board ID = 1
653 03:15:36.577956 Set A53 clk to 24M
654 03:15:36.578332 Set A73 clk to 24M
655 03:15:36.578550 Set clk81 to 24M
656 03:15:36.583349 A53 clk: 1200 MHz
657 03:15:36.583890 A73 clk: 1200 MHz
658 03:15:36.584292 CLK81: 166.6M
659 03:15:36.584631 smccc: 00012a92
660 03:15:36.589004 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 03:15:36.594677 board id: 1
662 03:15:36.600535 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 03:15:36.611298 fw parse done
664 03:15:36.617256 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 03:15:36.661988 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 03:15:36.670534 PIEI prepare done
667 03:15:36.671199 fastboot data load
668 03:15:36.671584 fastboot data verify
669 03:15:36.680170 verify result: 266
670 03:15:36.681877 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 03:15:36.682491 LPDDR4 probe
672 03:15:36.682834 ddr clk to 1584MHz
673 03:15:36.690342 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 03:15:36.727115
675 03:15:36.727758 dmc_version 0001
676 03:15:36.733740 Check phy result
677 03:15:36.739651 INFO : End of CA training
678 03:15:36.740289 INFO : End of initialization
679 03:15:36.745272 INFO : Training has run successfully!
680 03:15:36.745900 Check phy result
681 03:15:36.763160 INFO : End of initialization
682 03:15:36.763801 INFO : End of read enable training
683 03:15:36.764161 INFO : End of fine write leveling
684 03:15:36.764543 INFO : End of Write leveling coarse delay
685 03:15:36.765043 INFO : Training has run successfully!
686 03:15:36.765529 Check phy result
687 03:15:36.767653 INFO : End of initialization
688 03:15:36.768240 INFO : End of read dq deskew training
689 03:15:36.774464 INFO : End of MPR read delay center optimization
690 03:15:36.780157 INFO : End of write delay center optimization
691 03:15:36.785866 INFO : End of read delay center optimization
692 03:15:36.786459 INFO : End of max read latency training
693 03:15:36.790045 INFO : Training has run successfully!
694 03:15:36.790644 1D training succeed
695 03:15:36.799183 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 03:15:36.846893 Check phy result
697 03:15:36.847304 INFO : End of initialization
698 03:15:36.878013 INFO : End of 2D read delay Voltage center optimization
699 03:15:36.888499 INFO : End of 2D read delay Voltage center optimization
700 03:15:36.940501 INFO : End of 2D write delay Voltage center optimization
701 03:15:36.989532 INFO : End of 2D write delay Voltage center optimization
702 03:15:36.995092 INFO : Training has run successfully!
703 03:15:36.995625
704 03:15:36.995905 channel==0
705 03:15:37.000743 RxClkDly_Margin_A0==88 ps 9
706 03:15:37.001134 TxDqDly_Margin_A0==98 ps 10
707 03:15:37.006244 RxClkDly_Margin_A1==88 ps 9
708 03:15:37.006708 TxDqDly_Margin_A1==98 ps 10
709 03:15:37.007065 TrainedVREFDQ_A0==74
710 03:15:37.011833 TrainedVREFDQ_A1==74
711 03:15:37.012217 VrefDac_Margin_A0==25
712 03:15:37.012442 DeviceVref_Margin_A0==40
713 03:15:37.018394 VrefDac_Margin_A1==26
714 03:15:37.018907 DeviceVref_Margin_A1==40
715 03:15:37.019286
716 03:15:37.019651
717 03:15:37.023159 channel==1
718 03:15:37.023512 RxClkDly_Margin_A0==98 ps 10
719 03:15:37.023737 TxDqDly_Margin_A0==98 ps 10
720 03:15:37.028766 RxClkDly_Margin_A1==98 ps 10
721 03:15:37.029266 TxDqDly_Margin_A1==88 ps 9
722 03:15:37.034252 TrainedVREFDQ_A0==77
723 03:15:37.034721 TrainedVREFDQ_A1==77
724 03:15:37.034973 VrefDac_Margin_A0==22
725 03:15:37.039845 DeviceVref_Margin_A0==37
726 03:15:37.040339 VrefDac_Margin_A1==22
727 03:15:37.045452 DeviceVref_Margin_A1==37
728 03:15:37.045803
729 03:15:37.046027 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 03:15:37.051033
731 03:15:37.079037 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
732 03:15:37.079572 2D training succeed
733 03:15:37.084767 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 03:15:37.090247 auto size-- 65535DDR cs0 size: 2048MB
735 03:15:37.090597 DDR cs1 size: 2048MB
736 03:15:37.095828 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 03:15:37.096287 cs0 DataBus test pass
738 03:15:37.101418 cs1 DataBus test pass
739 03:15:37.101706 cs0 AddrBus test pass
740 03:15:37.101919 cs1 AddrBus test pass
741 03:15:37.102127
742 03:15:37.107023 100bdlr_step_size ps== 420
743 03:15:37.107459 result report
744 03:15:37.112618 boot times 0Enable ddr reg access
745 03:15:37.118063 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 03:15:37.131697 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 03:15:37.703587 0.0;M3 CHK:0;cm4_sp_mode 0
748 03:15:37.704008 MVN_1=0x00000000
749 03:15:37.709012 MVN_2=0x00000000
750 03:15:37.714824 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 03:15:37.715103 OPS=0x10
752 03:15:37.715319 ring efuse init
753 03:15:37.715527 chipver efuse init
754 03:15:37.720410 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 03:15:37.726032 [0.018961 Inits done]
756 03:15:37.726305 secure task start!
757 03:15:37.726518 high task start!
758 03:15:37.730605 low task start!
759 03:15:37.730868 run into bl31
760 03:15:37.737213 NOTICE: BL31: v1.3(release):4fc40b1
761 03:15:37.745100 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 03:15:37.745371 NOTICE: BL31: G12A normal boot!
763 03:15:37.770413 NOTICE: BL31: BL33 decompress pass
764 03:15:37.776072 ERROR: Error initializing runtime service opteed_fast
765 03:15:39.008954
766 03:15:39.009383
767 03:15:39.017283 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 03:15:39.017736
769 03:15:39.018128 Model: Libre Computer AML-A311D-CC Alta
770 03:15:39.225757 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 03:15:39.249127 DRAM: 2 GiB (effective 3.8 GiB)
772 03:15:39.392133 Core: 408 devices, 31 uclasses, devicetree: separate
773 03:15:39.398023 WDT: Not starting watchdog@f0d0
774 03:15:39.430283 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 03:15:39.442752 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 03:15:39.448095 ** Bad device specification mmc 0 **
777 03:15:39.458156 Card did not respond to voltage select! : -110
778 03:15:39.465735 ** Bad device specification mmc 0 **
779 03:15:39.466266 Couldn't find partition mmc 0
780 03:15:39.474150 Card did not respond to voltage select! : -110
781 03:15:39.479594 ** Bad device specification mmc 0 **
782 03:15:39.480170 Couldn't find partition mmc 0
783 03:15:39.484656 Error: could not access storage.
784 03:15:39.826216 Net: eth0: ethernet@ff3f0000
785 03:15:39.826818 starting USB...
786 03:15:40.079057 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 03:15:40.079674 Starting the controller
788 03:15:40.085962 USB XHCI 1.10
789 03:15:42.249957 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 03:15:42.250410 bl2_stage_init 0x01
791 03:15:42.250638 bl2_stage_init 0x81
792 03:15:42.255569 hw id: 0x0000 - pwm id 0x01
793 03:15:42.256085 bl2_stage_init 0xc1
794 03:15:42.256427 bl2_stage_init 0x02
795 03:15:42.256749
796 03:15:42.261079 L0:00000000
797 03:15:42.261409 L1:20000703
798 03:15:42.261621 L2:00008067
799 03:15:42.261826 L3:14000000
800 03:15:42.266724 B2:00402000
801 03:15:42.267097 B1:e0f83180
802 03:15:42.267314
803 03:15:42.267525 TE: 58159
804 03:15:42.267727
805 03:15:42.272274 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 03:15:42.272643
807 03:15:42.272863 Board ID = 1
808 03:15:42.277892 Set A53 clk to 24M
809 03:15:42.278251 Set A73 clk to 24M
810 03:15:42.278471 Set clk81 to 24M
811 03:15:42.283576 A53 clk: 1200 MHz
812 03:15:42.283944 A73 clk: 1200 MHz
813 03:15:42.284214 CLK81: 166.6M
814 03:15:42.284425 smccc: 00012ab5
815 03:15:42.289037 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 03:15:42.294576 board id: 1
817 03:15:42.300549 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 03:15:42.311103 fw parse done
819 03:15:42.317098 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 03:15:42.359670 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 03:15:42.370580 PIEI prepare done
822 03:15:42.370888 fastboot data load
823 03:15:42.371106 fastboot data verify
824 03:15:42.376233 verify result: 266
825 03:15:42.381819 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 03:15:42.382127 LPDDR4 probe
827 03:15:42.382336 ddr clk to 1584MHz
828 03:15:42.389746 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 03:15:42.426564
830 03:15:42.426913 dmc_version 0001
831 03:15:42.433052 Check phy result
832 03:15:42.439616 INFO : End of CA training
833 03:15:42.439913 INFO : End of initialization
834 03:15:42.445203 INFO : Training has run successfully!
835 03:15:42.445489 Check phy result
836 03:15:42.450844 INFO : End of initialization
837 03:15:42.451149 INFO : End of read enable training
838 03:15:42.454767 INFO : End of fine write leveling
839 03:15:42.459544 INFO : End of Write leveling coarse delay
840 03:15:42.465076 INFO : Training has run successfully!
841 03:15:42.465370 Check phy result
842 03:15:42.465592 INFO : End of initialization
843 03:15:42.470716 INFO : End of read dq deskew training
844 03:15:42.476279 INFO : End of MPR read delay center optimization
845 03:15:42.476575 INFO : End of write delay center optimization
846 03:15:42.481874 INFO : End of read delay center optimization
847 03:15:42.487535 INFO : End of max read latency training
848 03:15:42.487827 INFO : Training has run successfully!
849 03:15:42.493103 1D training succeed
850 03:15:42.498681 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 03:15:42.546577 Check phy result
852 03:15:42.546974 INFO : End of initialization
853 03:15:42.568568 INFO : End of 2D read delay Voltage center optimization
854 03:15:42.588463 INFO : End of 2D read delay Voltage center optimization
855 03:15:42.640402 INFO : End of 2D write delay Voltage center optimization
856 03:15:42.690678 INFO : End of 2D write delay Voltage center optimization
857 03:15:42.696103 INFO : Training has run successfully!
858 03:15:42.696653
859 03:15:42.697150 channel==0
860 03:15:42.701680 RxClkDly_Margin_A0==88 ps 9
861 03:15:42.702222 TxDqDly_Margin_A0==98 ps 10
862 03:15:42.704956 RxClkDly_Margin_A1==88 ps 9
863 03:15:42.705489 TxDqDly_Margin_A1==98 ps 10
864 03:15:42.710724 TrainedVREFDQ_A0==74
865 03:15:42.711282 TrainedVREFDQ_A1==74
866 03:15:42.711722 VrefDac_Margin_A0==24
867 03:15:42.716218 DeviceVref_Margin_A0==40
868 03:15:42.716775 VrefDac_Margin_A1==26
869 03:15:42.721798 DeviceVref_Margin_A1==40
870 03:15:42.722311
871 03:15:42.722764
872 03:15:42.723203 channel==1
873 03:15:42.723632 RxClkDly_Margin_A0==98 ps 10
874 03:15:42.727298 TxDqDly_Margin_A0==98 ps 10
875 03:15:42.727802 RxClkDly_Margin_A1==98 ps 10
876 03:15:42.732943 TxDqDly_Margin_A1==88 ps 9
877 03:15:42.733460 TrainedVREFDQ_A0==77
878 03:15:42.733909 TrainedVREFDQ_A1==77
879 03:15:42.738681 VrefDac_Margin_A0==22
880 03:15:42.739191 DeviceVref_Margin_A0==37
881 03:15:42.744141 VrefDac_Margin_A1==22
882 03:15:42.744661 DeviceVref_Margin_A1==37
883 03:15:42.745103
884 03:15:42.749753 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 03:15:42.750263
886 03:15:42.777715 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
887 03:15:42.783334 2D training succeed
888 03:15:42.788932 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 03:15:42.789260 auto size-- 65535DDR cs0 size: 2048MB
890 03:15:42.794545 DDR cs1 size: 2048MB
891 03:15:42.794863 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 03:15:42.800153 cs0 DataBus test pass
893 03:15:42.800477 cs1 DataBus test pass
894 03:15:42.800693 cs0 AddrBus test pass
895 03:15:42.805722 cs1 AddrBus test pass
896 03:15:42.806041
897 03:15:42.806264 100bdlr_step_size ps== 420
898 03:15:42.806478 result report
899 03:15:42.811331 boot times 0Enable ddr reg access
900 03:15:42.818886 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 03:15:42.831889 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 03:15:43.404555 0.0;M3 CHK:0;cm4_sp_mode 0
903 03:15:43.404979 MVN_1=0x00000000
904 03:15:43.409981 MVN_2=0x00000000
905 03:15:43.415732 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 03:15:43.416113 OPS=0x10
907 03:15:43.416343 ring efuse init
908 03:15:43.416560 chipver efuse init
909 03:15:43.424054 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 03:15:43.424394 [0.018961 Inits done]
911 03:15:43.424606 secure task start!
912 03:15:43.431324 high task start!
913 03:15:43.431670 low task start!
914 03:15:43.431897 run into bl31
915 03:15:43.438229 NOTICE: BL31: v1.3(release):4fc40b1
916 03:15:43.445090 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 03:15:43.445445 NOTICE: BL31: G12A normal boot!
918 03:15:43.471339 NOTICE: BL31: BL33 decompress pass
919 03:15:43.476790 ERROR: Error initializing runtime service opteed_fast
920 03:15:44.710065
921 03:15:44.710496
922 03:15:44.718304 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 03:15:44.718667
924 03:15:44.718899 Model: Libre Computer AML-A311D-CC Alta
925 03:15:44.926065 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 03:15:44.949343 DRAM: 2 GiB (effective 3.8 GiB)
927 03:15:45.093152 Core: 408 devices, 31 uclasses, devicetree: separate
928 03:15:45.098759 WDT: Not starting watchdog@f0d0
929 03:15:45.131277 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 03:15:45.143811 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 03:15:45.148349 ** Bad device specification mmc 0 **
932 03:15:45.159082 Card did not respond to voltage select! : -110
933 03:15:45.166603 ** Bad device specification mmc 0 **
934 03:15:45.167174 Couldn't find partition mmc 0
935 03:15:45.175065 Card did not respond to voltage select! : -110
936 03:15:45.180516 ** Bad device specification mmc 0 **
937 03:15:45.180916 Couldn't find partition mmc 0
938 03:15:45.184923 Error: could not access storage.
939 03:15:45.527355 Net: eth0: ethernet@ff3f0000
940 03:15:45.528052 starting USB...
941 03:15:45.780061 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 03:15:45.780698 Starting the controller
943 03:15:45.786881 USB XHCI 1.10
944 03:15:47.340975 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 03:15:47.349328 scanning usb for storage devices... 0 Storage Device(s) found
947 03:15:47.400983 Hit any key to stop autoboot: 1
948 03:15:47.401993 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 03:15:47.402715 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 03:15:47.403248 Setting prompt string to ['=>']
951 03:15:47.403789 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 03:15:47.416781 0
953 03:15:47.417835 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 03:15:47.418393 Sending with 10 millisecond of delay
956 03:15:48.557871 => setenv autoload no
957 03:15:48.570174 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 03:15:48.572877 setenv autoload no
959 03:15:48.573390 Sending with 10 millisecond of delay
961 03:15:50.372617 => setenv initrd_high 0xffffffff
962 03:15:50.383411 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 03:15:50.384326 setenv initrd_high 0xffffffff
964 03:15:50.385045 Sending with 10 millisecond of delay
966 03:15:52.003929 => setenv fdt_high 0xffffffff
967 03:15:52.014776 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 03:15:52.015453 setenv fdt_high 0xffffffff
969 03:15:52.015959 Sending with 10 millisecond of delay
971 03:15:52.307440 => dhcp
972 03:15:52.318210 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 03:15:52.318767 dhcp
974 03:15:52.319012 Speed: 1000, full duplex
975 03:15:52.319229 BOOTP broadcast 1
976 03:15:52.329664 DHCP client bound to address 192.168.6.27 (12 ms)
977 03:15:52.330193 Sending with 10 millisecond of delay
979 03:15:54.006200 => setenv serverip 192.168.6.2
980 03:15:54.017382 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 03:15:54.018358 setenv serverip 192.168.6.2
982 03:15:54.019099 Sending with 10 millisecond of delay
984 03:15:57.752717 => tftpboot 0x01080000 932528/tftp-deploy-7nwradr6/kernel/uImage
985 03:15:57.763558 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 03:15:57.764488 tftpboot 0x01080000 932528/tftp-deploy-7nwradr6/kernel/uImage
987 03:15:57.764978 Speed: 1000, full duplex
988 03:15:57.765433 Using ethernet@ff3f0000 device
989 03:15:57.766366 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 03:15:57.772004 Filename '932528/tftp-deploy-7nwradr6/kernel/uImage'.
991 03:15:57.775814 Load address: 0x1080000
992 03:16:01.920588 Loading: *###################
993 03:16:01.921213 TFTP error: trying to overwrite reserved memory...
995 03:16:01.922717 end: 2.4.3 bootloader-commands (duration 00:00:15) [common]
998 03:16:01.924812 end: 2.4 uboot-commands (duration 00:00:47) [common]
1000 03:16:01.926397 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
1002 03:16:01.927581 end: 2 uboot-action (duration 00:00:47) [common]
1004 03:16:01.929293 Cleaning after the job
1005 03:16:01.929881 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/ramdisk
1006 03:16:01.961252 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/kernel
1007 03:16:02.014549 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/dtb
1008 03:16:02.015366 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/nfsrootfs
1009 03:16:02.175766 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/932528/tftp-deploy-7nwradr6/modules
1010 03:16:02.236672 start: 4.1 power-off (timeout 00:00:30) [common]
1011 03:16:02.237384 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1012 03:16:02.270182 >> OK - accepted request
1013 03:16:02.272077 Returned 0 in 0 seconds
1014 03:16:02.373181 end: 4.1 power-off (duration 00:00:00) [common]
1016 03:16:02.374145 start: 4.2 read-feedback (timeout 00:10:00) [common]
1017 03:16:02.374788 Listened to connection for namespace 'common' for up to 1s
1018 03:16:03.375697 Finalising connection for namespace 'common'
1019 03:16:03.376190 Disconnecting from shell: Finalise
1020 03:16:03.376493 =>
1021 03:16:03.477150 end: 4.2 read-feedback (duration 00:00:01) [common]
1022 03:16:03.477573 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/932528
1023 03:16:05.502012 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/932528
1024 03:16:05.502623 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.