Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:04:44.786073 lava-dispatcher, installed at version: 2024.01
2 01:04:44.786860 start: 0 validate
3 01:04:44.787322 Start time: 2024-11-11 01:04:44.787292+00:00 (UTC)
4 01:04:44.787879 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:04:44.788434 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:04:44.831859 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:04:44.832626 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 01:04:44.863303 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:04:44.863932 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 01:04:44.895616 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:04:44.896127 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:04:44.929011 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:04:44.929497 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc7%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 01:04:44.967478 validate duration: 0.18
16 01:04:44.968370 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:04:44.968726 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:04:44.969065 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:04:44.969685 Not decompressing ramdisk as can be used compressed.
20 01:04:44.970186 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 01:04:44.970490 saving as /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/ramdisk/initrd.cpio.gz
22 01:04:44.970770 total size: 5628169 (5 MB)
23 01:04:45.011569 progress 0 % (0 MB)
24 01:04:45.015837 progress 5 % (0 MB)
25 01:04:45.020353 progress 10 % (0 MB)
26 01:04:45.024275 progress 15 % (0 MB)
27 01:04:45.028518 progress 20 % (1 MB)
28 01:04:45.032283 progress 25 % (1 MB)
29 01:04:45.036386 progress 30 % (1 MB)
30 01:04:45.040495 progress 35 % (1 MB)
31 01:04:45.044262 progress 40 % (2 MB)
32 01:04:45.048329 progress 45 % (2 MB)
33 01:04:45.051932 progress 50 % (2 MB)
34 01:04:45.055925 progress 55 % (2 MB)
35 01:04:45.060054 progress 60 % (3 MB)
36 01:04:45.063691 progress 65 % (3 MB)
37 01:04:45.067730 progress 70 % (3 MB)
38 01:04:45.071475 progress 75 % (4 MB)
39 01:04:45.075498 progress 80 % (4 MB)
40 01:04:45.079123 progress 85 % (4 MB)
41 01:04:45.083178 progress 90 % (4 MB)
42 01:04:45.087092 progress 95 % (5 MB)
43 01:04:45.090401 progress 100 % (5 MB)
44 01:04:45.091053 5 MB downloaded in 0.12 s (44.63 MB/s)
45 01:04:45.091606 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:04:45.092567 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:04:45.092884 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:04:45.093171 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:04:45.093792 downloading http://storage.kernelci.org/mainline/master/v6.12-rc7/arm64/defconfig/gcc-12/kernel/Image
51 01:04:45.094069 saving as /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/kernel/Image
52 01:04:45.094291 total size: 45713920 (43 MB)
53 01:04:45.094512 No compression specified
54 01:04:45.130272 progress 0 % (0 MB)
55 01:04:45.161502 progress 5 % (2 MB)
56 01:04:45.190018 progress 10 % (4 MB)
57 01:04:45.218745 progress 15 % (6 MB)
58 01:04:45.247842 progress 20 % (8 MB)
59 01:04:45.276928 progress 25 % (10 MB)
60 01:04:45.306572 progress 30 % (13 MB)
61 01:04:45.334888 progress 35 % (15 MB)
62 01:04:45.363795 progress 40 % (17 MB)
63 01:04:45.394654 progress 45 % (19 MB)
64 01:04:45.423547 progress 50 % (21 MB)
65 01:04:45.453318 progress 55 % (24 MB)
66 01:04:45.481891 progress 60 % (26 MB)
67 01:04:45.511302 progress 65 % (28 MB)
68 01:04:45.541741 progress 70 % (30 MB)
69 01:04:45.571412 progress 75 % (32 MB)
70 01:04:45.601173 progress 80 % (34 MB)
71 01:04:45.630603 progress 85 % (37 MB)
72 01:04:45.662771 progress 90 % (39 MB)
73 01:04:45.693144 progress 95 % (41 MB)
74 01:04:45.722691 progress 100 % (43 MB)
75 01:04:45.723255 43 MB downloaded in 0.63 s (69.32 MB/s)
76 01:04:45.723762 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:04:45.724654 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:04:45.724954 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:04:45.725241 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:04:45.725731 downloading http://storage.kernelci.org/mainline/master/v6.12-rc7/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 01:04:45.725995 saving as /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 01:04:45.726217 total size: 53209 (0 MB)
84 01:04:45.726437 No compression specified
85 01:04:45.763643 progress 61 % (0 MB)
86 01:04:45.764541 progress 100 % (0 MB)
87 01:04:45.765082 0 MB downloaded in 0.04 s (1.31 MB/s)
88 01:04:45.765542 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:04:45.766350 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:04:45.766611 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:04:45.766873 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:04:45.767333 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 01:04:45.767570 saving as /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/nfsrootfs/full.rootfs.tar
95 01:04:45.767777 total size: 120894716 (115 MB)
96 01:04:45.768008 Using unxz to decompress xz
97 01:04:45.801428 progress 0 % (0 MB)
98 01:04:46.617631 progress 5 % (5 MB)
99 01:04:47.461651 progress 10 % (11 MB)
100 01:04:48.363771 progress 15 % (17 MB)
101 01:04:49.104074 progress 20 % (23 MB)
102 01:04:49.696472 progress 25 % (28 MB)
103 01:04:50.528750 progress 30 % (34 MB)
104 01:04:51.327637 progress 35 % (40 MB)
105 01:04:51.675177 progress 40 % (46 MB)
106 01:04:52.058021 progress 45 % (51 MB)
107 01:04:52.805616 progress 50 % (57 MB)
108 01:04:53.695235 progress 55 % (63 MB)
109 01:04:54.476589 progress 60 % (69 MB)
110 01:04:55.250515 progress 65 % (74 MB)
111 01:04:56.031771 progress 70 % (80 MB)
112 01:04:56.862183 progress 75 % (86 MB)
113 01:04:57.676774 progress 80 % (92 MB)
114 01:04:58.470623 progress 85 % (98 MB)
115 01:04:59.330058 progress 90 % (103 MB)
116 01:05:00.124791 progress 95 % (109 MB)
117 01:05:00.963034 progress 100 % (115 MB)
118 01:05:00.976741 115 MB downloaded in 15.21 s (7.58 MB/s)
119 01:05:00.979629 end: 1.4.1 http-download (duration 00:00:15) [common]
121 01:05:00.981316 end: 1.4 download-retry (duration 00:00:15) [common]
122 01:05:00.981851 start: 1.5 download-retry (timeout 00:09:44) [common]
123 01:05:00.982376 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 01:05:00.983300 downloading http://storage.kernelci.org/mainline/master/v6.12-rc7/arm64/defconfig/gcc-12/modules.tar.xz
125 01:05:00.986869 saving as /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/modules/modules.tar
126 01:05:00.987308 total size: 11614384 (11 MB)
127 01:05:00.987740 Using unxz to decompress xz
128 01:05:01.042363 progress 0 % (0 MB)
129 01:05:01.110525 progress 5 % (0 MB)
130 01:05:01.186922 progress 10 % (1 MB)
131 01:05:01.285262 progress 15 % (1 MB)
132 01:05:01.378170 progress 20 % (2 MB)
133 01:05:01.458066 progress 25 % (2 MB)
134 01:05:01.535078 progress 30 % (3 MB)
135 01:05:01.625157 progress 35 % (3 MB)
136 01:05:01.699007 progress 40 % (4 MB)
137 01:05:01.775274 progress 45 % (5 MB)
138 01:05:01.860768 progress 50 % (5 MB)
139 01:05:01.938595 progress 55 % (6 MB)
140 01:05:02.024743 progress 60 % (6 MB)
141 01:05:02.106670 progress 65 % (7 MB)
142 01:05:02.195491 progress 70 % (7 MB)
143 01:05:02.280908 progress 75 % (8 MB)
144 01:05:02.364776 progress 80 % (8 MB)
145 01:05:02.445672 progress 85 % (9 MB)
146 01:05:02.524284 progress 90 % (9 MB)
147 01:05:02.602095 progress 95 % (10 MB)
148 01:05:02.678319 progress 100 % (11 MB)
149 01:05:02.691108 11 MB downloaded in 1.70 s (6.50 MB/s)
150 01:05:02.691856 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:05:02.693062 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:05:02.693493 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 01:05:02.693891 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 01:05:19.344601 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/972882/extract-nfsrootfs-rzdn8zpz
156 01:05:19.345222 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 01:05:19.345510 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 01:05:19.346480 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn
159 01:05:19.346979 makedir: /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin
160 01:05:19.347408 makedir: /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/tests
161 01:05:19.348161 makedir: /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/results
162 01:05:19.348567 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-add-keys
163 01:05:19.349258 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-add-sources
164 01:05:19.349836 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-background-process-start
165 01:05:19.350399 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-background-process-stop
166 01:05:19.350964 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-common-functions
167 01:05:19.351463 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-echo-ipv4
168 01:05:19.351945 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-install-packages
169 01:05:19.352549 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-installed-packages
170 01:05:19.353073 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-os-build
171 01:05:19.353618 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-probe-channel
172 01:05:19.354177 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-probe-ip
173 01:05:19.354769 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-target-ip
174 01:05:19.355289 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-target-mac
175 01:05:19.355803 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-target-storage
176 01:05:19.356365 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-test-case
177 01:05:19.356887 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-test-event
178 01:05:19.357429 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-test-feedback
179 01:05:19.357963 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-test-raise
180 01:05:19.358518 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-test-reference
181 01:05:19.359078 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-test-runner
182 01:05:19.359601 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-test-set
183 01:05:19.360165 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-test-shell
184 01:05:19.360703 Updating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-add-keys (debian)
185 01:05:19.361285 Updating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-add-sources (debian)
186 01:05:19.361848 Updating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-install-packages (debian)
187 01:05:19.362399 Updating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-installed-packages (debian)
188 01:05:19.362954 Updating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/bin/lava-os-build (debian)
189 01:05:19.363413 Creating /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/environment
190 01:05:19.363805 LAVA metadata
191 01:05:19.364136 - LAVA_JOB_ID=972882
192 01:05:19.364367 - LAVA_DISPATCHER_IP=192.168.6.2
193 01:05:19.364748 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 01:05:19.365810 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 01:05:19.366140 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 01:05:19.366348 skipped lava-vland-overlay
197 01:05:19.366589 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 01:05:19.366841 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 01:05:19.367065 skipped lava-multinode-overlay
200 01:05:19.367307 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 01:05:19.367558 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 01:05:19.367807 Loading test definitions
203 01:05:19.368114 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 01:05:19.368342 Using /lava-972882 at stage 0
205 01:05:19.369522 uuid=972882_1.6.2.4.1 testdef=None
206 01:05:19.369844 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 01:05:19.370125 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 01:05:19.372039 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 01:05:19.372911 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 01:05:19.375253 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 01:05:19.376247 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 01:05:19.378601 runner path: /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/0/tests/0_timesync-off test_uuid 972882_1.6.2.4.1
215 01:05:19.379268 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 01:05:19.380163 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 01:05:19.380400 Using /lava-972882 at stage 0
219 01:05:19.380776 Fetching tests from https://github.com/kernelci/test-definitions.git
220 01:05:19.381078 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/0/tests/1_kselftest-rtc'
221 01:05:22.857015 Running '/usr/bin/git checkout kernelci.org
222 01:05:23.302150 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 01:05:23.303890 uuid=972882_1.6.2.4.5 testdef=None
224 01:05:23.304663 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 01:05:23.306561 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 01:05:23.313536 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 01:05:23.315557 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 01:05:23.323085 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 01:05:23.324771 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 01:05:23.331679 runner path: /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/0/tests/1_kselftest-rtc test_uuid 972882_1.6.2.4.5
234 01:05:23.332228 BOARD='meson-sm1-s905d3-libretech-cc'
235 01:05:23.332631 BRANCH='mainline'
236 01:05:23.333020 SKIPFILE='/dev/null'
237 01:05:23.333410 SKIP_INSTALL='True'
238 01:05:23.333797 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc7/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 01:05:23.334193 TST_CASENAME=''
240 01:05:23.334582 TST_CMDFILES='rtc'
241 01:05:23.335531 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 01:05:23.337092 Creating lava-test-runner.conf files
244 01:05:23.337492 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/972882/lava-overlay-ywx7vmkn/lava-972882/0 for stage 0
245 01:05:23.338116 - 0_timesync-off
246 01:05:23.338570 - 1_kselftest-rtc
247 01:05:23.339184 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 01:05:23.339714 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 01:05:46.471499 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 01:05:46.471947 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 01:05:46.472240 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 01:05:46.472512 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 01:05:46.472779 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 01:05:47.086528 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 01:05:47.087010 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 01:05:47.087264 extracting modules file /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/972882/extract-nfsrootfs-rzdn8zpz
257 01:05:48.444584 extracting modules file /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/972882/extract-overlay-ramdisk-x2excgi1/ramdisk
258 01:05:49.840307 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 01:05:49.840811 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 01:05:49.841103 [common] Applying overlay to NFS
261 01:05:49.841330 [common] Applying overlay /var/lib/lava/dispatcher/tmp/972882/compress-overlay-ncrvzkzj/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/972882/extract-nfsrootfs-rzdn8zpz
262 01:05:52.584962 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 01:05:52.585445 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 01:05:52.585722 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 01:05:52.585955 Converting downloaded kernel to a uImage
266 01:05:52.586270 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/kernel/Image /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/kernel/uImage
267 01:05:53.046904 output: Image Name:
268 01:05:53.047286 output: Created: Mon Nov 11 01:05:52 2024
269 01:05:53.047499 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 01:05:53.047704 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 01:05:53.047905 output: Load Address: 01080000
272 01:05:53.048145 output: Entry Point: 01080000
273 01:05:53.048344 output:
274 01:05:53.048677 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 01:05:53.048950 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 01:05:53.049221 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 01:05:53.049476 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 01:05:53.049734 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 01:05:53.049992 Building ramdisk /var/lib/lava/dispatcher/tmp/972882/extract-overlay-ramdisk-x2excgi1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/972882/extract-overlay-ramdisk-x2excgi1/ramdisk
280 01:05:55.204463 >> 166829 blocks
281 01:06:02.946101 Adding RAMdisk u-boot header.
282 01:06:02.946554 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/972882/extract-overlay-ramdisk-x2excgi1/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/972882/extract-overlay-ramdisk-x2excgi1/ramdisk.cpio.gz.uboot
283 01:06:03.190044 output: Image Name:
284 01:06:03.190457 output: Created: Mon Nov 11 01:06:02 2024
285 01:06:03.190929 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 01:06:03.191398 output: Data Size: 23436001 Bytes = 22886.72 KiB = 22.35 MiB
287 01:06:03.191853 output: Load Address: 00000000
288 01:06:03.192368 output: Entry Point: 00000000
289 01:06:03.192823 output:
290 01:06:03.193996 rename /var/lib/lava/dispatcher/tmp/972882/extract-overlay-ramdisk-x2excgi1/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/ramdisk/ramdisk.cpio.gz.uboot
291 01:06:03.194781 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 01:06:03.195395 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 01:06:03.196023 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 01:06:03.196554 No LXC device requested
295 01:06:03.197122 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 01:06:03.197699 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 01:06:03.198257 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 01:06:03.198719 Checking files for TFTP limit of 4294967296 bytes.
299 01:06:03.201662 end: 1 tftp-deploy (duration 00:01:18) [common]
300 01:06:03.202299 start: 2 uboot-action (timeout 00:05:00) [common]
301 01:06:03.202893 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 01:06:03.203456 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 01:06:03.204051 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 01:06:03.204652 Using kernel file from prepare-kernel: 972882/tftp-deploy-v8xqexdw/kernel/uImage
305 01:06:03.205353 substitutions:
306 01:06:03.205807 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 01:06:03.206262 - {DTB_ADDR}: 0x01070000
308 01:06:03.206712 - {DTB}: 972882/tftp-deploy-v8xqexdw/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 01:06:03.207161 - {INITRD}: 972882/tftp-deploy-v8xqexdw/ramdisk/ramdisk.cpio.gz.uboot
310 01:06:03.207608 - {KERNEL_ADDR}: 0x01080000
311 01:06:03.208135 - {KERNEL}: 972882/tftp-deploy-v8xqexdw/kernel/uImage
312 01:06:03.208597 - {LAVA_MAC}: None
313 01:06:03.209085 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/972882/extract-nfsrootfs-rzdn8zpz
314 01:06:03.209534 - {NFS_SERVER_IP}: 192.168.6.2
315 01:06:03.209970 - {PRESEED_CONFIG}: None
316 01:06:03.210408 - {PRESEED_LOCAL}: None
317 01:06:03.210848 - {RAMDISK_ADDR}: 0x08000000
318 01:06:03.211283 - {RAMDISK}: 972882/tftp-deploy-v8xqexdw/ramdisk/ramdisk.cpio.gz.uboot
319 01:06:03.211722 - {ROOT_PART}: None
320 01:06:03.212201 - {ROOT}: None
321 01:06:03.212647 - {SERVER_IP}: 192.168.6.2
322 01:06:03.213085 - {TEE_ADDR}: 0x83000000
323 01:06:03.213519 - {TEE}: None
324 01:06:03.213957 Parsed boot commands:
325 01:06:03.214384 - setenv autoload no
326 01:06:03.214820 - setenv initrd_high 0xffffffff
327 01:06:03.215252 - setenv fdt_high 0xffffffff
328 01:06:03.215683 - dhcp
329 01:06:03.216145 - setenv serverip 192.168.6.2
330 01:06:03.216588 - tftpboot 0x01080000 972882/tftp-deploy-v8xqexdw/kernel/uImage
331 01:06:03.217028 - tftpboot 0x08000000 972882/tftp-deploy-v8xqexdw/ramdisk/ramdisk.cpio.gz.uboot
332 01:06:03.217462 - tftpboot 0x01070000 972882/tftp-deploy-v8xqexdw/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 01:06:03.217895 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/972882/extract-nfsrootfs-rzdn8zpz,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 01:06:03.218342 - bootm 0x01080000 0x08000000 0x01070000
335 01:06:03.218895 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 01:06:03.220604 start: 2.3 connect-device (timeout 00:05:00) [common]
338 01:06:03.221080 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 01:06:03.236539 Setting prompt string to ['lava-test: # ']
340 01:06:03.238173 end: 2.3 connect-device (duration 00:00:00) [common]
341 01:06:03.238869 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 01:06:03.239497 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 01:06:03.240266 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 01:06:03.241572 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 01:06:03.279785 >> OK - accepted request
346 01:06:03.282016 Returned 0 in 0 seconds
347 01:06:03.383264 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 01:06:03.385301 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 01:06:03.385914 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 01:06:03.386482 Setting prompt string to ['Hit any key to stop autoboot']
352 01:06:03.386986 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 01:06:03.388705 Trying 192.168.56.21...
354 01:06:03.389241 Connected to conserv1.
355 01:06:03.389699 Escape character is '^]'.
356 01:06:03.390150
357 01:06:03.390600 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 01:06:03.391071
359 01:06:10.902681 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 01:06:10.903363 bl2_stage_init 0x01
361 01:06:10.903840 bl2_stage_init 0x81
362 01:06:10.908238 hw id: 0x0000 - pwm id 0x01
363 01:06:10.908754 bl2_stage_init 0xc1
364 01:06:10.912634 bl2_stage_init 0x02
365 01:06:10.913123
366 01:06:10.913599 L0:00000000
367 01:06:10.914050 L1:00000703
368 01:06:10.914491 L2:00008067
369 01:06:10.918224 L3:15000000
370 01:06:10.918697 S1:00000000
371 01:06:10.919148 B2:20282000
372 01:06:10.919579 B1:a0f83180
373 01:06:10.920040
374 01:06:10.920477 TE: 70948
375 01:06:10.920910
376 01:06:10.929330 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 01:06:10.929802
378 01:06:10.930240 Board ID = 1
379 01:06:10.930671 Set cpu clk to 24M
380 01:06:10.931100 Set clk81 to 24M
381 01:06:10.934996 Use GP1_pll as DSU clk.
382 01:06:10.935461 DSU clk: 1200 Mhz
383 01:06:10.935898 CPU clk: 1200 MHz
384 01:06:10.940532 Set clk81 to 166.6M
385 01:06:10.946256 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 01:06:10.946720 board id: 1
387 01:06:10.954528 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 01:06:10.965226 fw parse done
389 01:06:10.971132 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 01:06:11.013722 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 01:06:11.024908 PIEI prepare done
392 01:06:11.025381 fastboot data load
393 01:06:11.025822 fastboot data verify
394 01:06:11.030378 verify result: 266
395 01:06:11.035819 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 01:06:11.036335 LPDDR4 probe
397 01:06:11.036774 ddr clk to 1584MHz
398 01:06:11.043809 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 01:06:11.081082
400 01:06:11.081555 dmc_version 0001
401 01:06:11.087796 Check phy result
402 01:06:11.093716 INFO : End of CA training
403 01:06:11.094182 INFO : End of initialization
404 01:06:11.099220 INFO : Training has run successfully!
405 01:06:11.099677 Check phy result
406 01:06:11.104828 INFO : End of initialization
407 01:06:11.105284 INFO : End of read enable training
408 01:06:11.110464 INFO : End of fine write leveling
409 01:06:11.116023 INFO : End of Write leveling coarse delay
410 01:06:11.116498 INFO : Training has run successfully!
411 01:06:11.116934 Check phy result
412 01:06:11.121711 INFO : End of initialization
413 01:06:11.122167 INFO : End of read dq deskew training
414 01:06:11.127209 INFO : End of MPR read delay center optimization
415 01:06:11.132816 INFO : End of write delay center optimization
416 01:06:11.138471 INFO : End of read delay center optimization
417 01:06:11.138944 INFO : End of max read latency training
418 01:06:11.144079 INFO : Training has run successfully!
419 01:06:11.144545 1D training succeed
420 01:06:11.153210 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 01:06:11.200805 Check phy result
422 01:06:11.201272 INFO : End of initialization
423 01:06:11.223143 INFO : End of 2D read delay Voltage center optimization
424 01:06:11.242274 INFO : End of 2D read delay Voltage center optimization
425 01:06:11.294141 INFO : End of 2D write delay Voltage center optimization
426 01:06:11.343316 INFO : End of 2D write delay Voltage center optimization
427 01:06:11.348890 INFO : Training has run successfully!
428 01:06:11.349360
429 01:06:11.349797 channel==0
430 01:06:11.354494 RxClkDly_Margin_A0==88 ps 9
431 01:06:11.354948 TxDqDly_Margin_A0==98 ps 10
432 01:06:11.357805 RxClkDly_Margin_A1==69 ps 7
433 01:06:11.358260 TxDqDly_Margin_A1==98 ps 10
434 01:06:11.363338 TrainedVREFDQ_A0==74
435 01:06:11.363799 TrainedVREFDQ_A1==75
436 01:06:11.368930 VrefDac_Margin_A0==24
437 01:06:11.369391 DeviceVref_Margin_A0==40
438 01:06:11.369826 VrefDac_Margin_A1==23
439 01:06:11.374606 DeviceVref_Margin_A1==39
440 01:06:11.375136
441 01:06:11.375594
442 01:06:11.376090 channel==1
443 01:06:11.376543 RxClkDly_Margin_A0==78 ps 8
444 01:06:11.380222 TxDqDly_Margin_A0==98 ps 10
445 01:06:11.380747 RxClkDly_Margin_A1==88 ps 9
446 01:06:11.385805 TxDqDly_Margin_A1==88 ps 9
447 01:06:11.386334 TrainedVREFDQ_A0==78
448 01:06:11.386774 TrainedVREFDQ_A1==75
449 01:06:11.391291 VrefDac_Margin_A0==22
450 01:06:11.391756 DeviceVref_Margin_A0==36
451 01:06:11.396963 VrefDac_Margin_A1==22
452 01:06:11.397425 DeviceVref_Margin_A1==39
453 01:06:11.397858
454 01:06:11.402563 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 01:06:11.403024
456 01:06:11.430581 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 01:06:11.436188 2D training succeed
458 01:06:11.441783 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 01:06:11.442267 auto size-- 65535DDR cs0 size: 2048MB
460 01:06:11.447290 DDR cs1 size: 2048MB
461 01:06:11.447773 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 01:06:11.452890 cs0 DataBus test pass
463 01:06:11.453358 cs1 DataBus test pass
464 01:06:11.453797 cs0 AddrBus test pass
465 01:06:11.458552 cs1 AddrBus test pass
466 01:06:11.459027
467 01:06:11.459469 100bdlr_step_size ps== 464
468 01:06:11.459916 result report
469 01:06:11.464137 boot times 0Enable ddr reg access
470 01:06:11.471819 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 01:06:11.485564 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 01:06:12.139667 bl2z: ptr: 05129330, size: 00001e40
473 01:06:12.146591 0.0;M3 CHK:0;cm4_sp_mode 0
474 01:06:12.147087 MVN_1=0x00000000
475 01:06:12.147530 MVN_2=0x00000000
476 01:06:12.158037 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 01:06:12.158512 OPS=0x04
478 01:06:12.158955 ring efuse init
479 01:06:12.163649 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 01:06:12.164153 [0.017319 Inits done]
481 01:06:12.164591 secure task start!
482 01:06:12.171658 high task start!
483 01:06:12.172152 low task start!
484 01:06:12.172591 run into bl31
485 01:06:12.180263 NOTICE: BL31: v1.3(release):4fc40b1
486 01:06:12.188071 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 01:06:12.188538 NOTICE: BL31: G12A normal boot!
488 01:06:12.203568 NOTICE: BL31: BL33 decompress pass
489 01:06:12.209251 ERROR: Error initializing runtime service opteed_fast
490 01:06:14.948505 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 01:06:14.949186 bl2_stage_init 0x01
492 01:06:14.949661 bl2_stage_init 0x81
493 01:06:14.954028 hw id: 0x0000 - pwm id 0x01
494 01:06:14.954539 bl2_stage_init 0xc1
495 01:06:14.959698 bl2_stage_init 0x02
496 01:06:14.960281
497 01:06:14.960732 L0:00000000
498 01:06:14.961171 L1:00000703
499 01:06:14.961605 L2:00008067
500 01:06:14.962035 L3:15000000
501 01:06:14.965265 S1:00000000
502 01:06:14.965727 B2:20282000
503 01:06:14.966156 B1:a0f83180
504 01:06:14.966581
505 01:06:14.967010 TE: 68517
506 01:06:14.967435
507 01:06:14.970853 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 01:06:14.971315
509 01:06:14.976485 Board ID = 1
510 01:06:14.976956 Set cpu clk to 24M
511 01:06:14.977390 Set clk81 to 24M
512 01:06:14.982021 Use GP1_pll as DSU clk.
513 01:06:14.982480 DSU clk: 1200 Mhz
514 01:06:14.982912 CPU clk: 1200 MHz
515 01:06:14.987619 Set clk81 to 166.6M
516 01:06:14.993265 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 01:06:14.993720 board id: 1
518 01:06:15.000407 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 01:06:15.011231 fw parse done
520 01:06:15.017080 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 01:06:15.059693 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 01:06:15.070680 PIEI prepare done
523 01:06:15.071142 fastboot data load
524 01:06:15.071575 fastboot data verify
525 01:06:15.076275 verify result: 266
526 01:06:15.081792 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 01:06:15.082250 LPDDR4 probe
528 01:06:15.082678 ddr clk to 1584MHz
529 01:06:15.089848 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 01:06:15.127132
531 01:06:15.127613 dmc_version 0001
532 01:06:15.133753 Check phy result
533 01:06:15.139695 INFO : End of CA training
534 01:06:15.140249 INFO : End of initialization
535 01:06:15.145312 INFO : Training has run successfully!
536 01:06:15.145786 Check phy result
537 01:06:15.150855 INFO : End of initialization
538 01:06:15.151324 INFO : End of read enable training
539 01:06:15.156449 INFO : End of fine write leveling
540 01:06:15.162022 INFO : End of Write leveling coarse delay
541 01:06:15.162505 INFO : Training has run successfully!
542 01:06:15.162956 Check phy result
543 01:06:15.167646 INFO : End of initialization
544 01:06:15.168146 INFO : End of read dq deskew training
545 01:06:15.173288 INFO : End of MPR read delay center optimization
546 01:06:15.178847 INFO : End of write delay center optimization
547 01:06:15.184458 INFO : End of read delay center optimization
548 01:06:15.184925 INFO : End of max read latency training
549 01:06:15.190042 INFO : Training has run successfully!
550 01:06:15.190506 1D training succeed
551 01:06:15.199347 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 01:06:15.246824 Check phy result
553 01:06:15.247291 INFO : End of initialization
554 01:06:15.269180 INFO : End of 2D read delay Voltage center optimization
555 01:06:15.288420 INFO : End of 2D read delay Voltage center optimization
556 01:06:15.340228 INFO : End of 2D write delay Voltage center optimization
557 01:06:15.389485 INFO : End of 2D write delay Voltage center optimization
558 01:06:15.394955 INFO : Training has run successfully!
559 01:06:15.395435
560 01:06:15.395895 channel==0
561 01:06:15.401526 RxClkDly_Margin_A0==78 ps 8
562 01:06:15.402018 TxDqDly_Margin_A0==98 ps 10
563 01:06:15.406186 RxClkDly_Margin_A1==69 ps 7
564 01:06:15.406661 TxDqDly_Margin_A1==88 ps 9
565 01:06:15.407115 TrainedVREFDQ_A0==74
566 01:06:15.411782 TrainedVREFDQ_A1==74
567 01:06:15.412291 VrefDac_Margin_A0==24
568 01:06:15.412746 DeviceVref_Margin_A0==40
569 01:06:15.417413 VrefDac_Margin_A1==23
570 01:06:15.417975 DeviceVref_Margin_A1==40
571 01:06:15.418434
572 01:06:15.418883
573 01:06:15.419328 channel==1
574 01:06:15.422956 RxClkDly_Margin_A0==78 ps 8
575 01:06:15.423427 TxDqDly_Margin_A0==98 ps 10
576 01:06:15.428529 RxClkDly_Margin_A1==78 ps 8
577 01:06:15.428998 TxDqDly_Margin_A1==88 ps 9
578 01:06:15.434157 TrainedVREFDQ_A0==78
579 01:06:15.434628 TrainedVREFDQ_A1==75
580 01:06:15.435075 VrefDac_Margin_A0==22
581 01:06:15.439771 DeviceVref_Margin_A0==36
582 01:06:15.440274 VrefDac_Margin_A1==22
583 01:06:15.445368 DeviceVref_Margin_A1==39
584 01:06:15.445837
585 01:06:15.446288 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 01:06:15.446731
587 01:06:15.478952 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
588 01:06:15.479452 2D training succeed
589 01:06:15.484599 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 01:06:15.490147 auto size-- 65535DDR cs0 size: 2048MB
591 01:06:15.490620 DDR cs1 size: 2048MB
592 01:06:15.495782 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 01:06:15.496296 cs0 DataBus test pass
594 01:06:15.501363 cs1 DataBus test pass
595 01:06:15.501667 cs0 AddrBus test pass
596 01:06:15.501887 cs1 AddrBus test pass
597 01:06:15.502096
598 01:06:15.506940 100bdlr_step_size ps== 478
599 01:06:15.507355 result report
600 01:06:15.512541 boot times 0Enable ddr reg access
601 01:06:15.517702 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 01:06:15.531557 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 01:06:16.186934 bl2z: ptr: 05129330, size: 00001e40
604 01:06:16.192688 0.0;M3 CHK:0;cm4_sp_mode 0
605 01:06:16.193164 MVN_1=0x00000000
606 01:06:16.193585 MVN_2=0x00000000
607 01:06:16.204190 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 01:06:16.204636 OPS=0x04
609 01:06:16.205065 ring efuse init
610 01:06:16.207248 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 01:06:16.213019 [0.017319 Inits done]
612 01:06:16.213462 secure task start!
613 01:06:16.213878 high task start!
614 01:06:16.214284 low task start!
615 01:06:16.216864 run into bl31
616 01:06:16.225695 NOTICE: BL31: v1.3(release):4fc40b1
617 01:06:16.233367 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 01:06:16.233803 NOTICE: BL31: G12A normal boot!
619 01:06:16.248850 NOTICE: BL31: BL33 decompress pass
620 01:06:16.254453 ERROR: Error initializing runtime service opteed_fast
621 01:06:17.648617 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 01:06:17.649192 bl2_stage_init 0x01
623 01:06:17.649624 bl2_stage_init 0x81
624 01:06:17.654120 hw id: 0x0000 - pwm id 0x01
625 01:06:17.654572 bl2_stage_init 0xc1
626 01:06:17.659851 bl2_stage_init 0x02
627 01:06:17.660337
628 01:06:17.660754 L0:00000000
629 01:06:17.661157 L1:00000703
630 01:06:17.661559 L2:00008067
631 01:06:17.661959 L3:15000000
632 01:06:17.665557 S1:00000000
633 01:06:17.665999 B2:20282000
634 01:06:17.666409 B1:a0f83180
635 01:06:17.666806
636 01:06:17.667202 TE: 68106
637 01:06:17.667597
638 01:06:17.671038 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 01:06:17.671480
640 01:06:17.676747 Board ID = 1
641 01:06:17.677184 Set cpu clk to 24M
642 01:06:17.677589 Set clk81 to 24M
643 01:06:17.682351 Use GP1_pll as DSU clk.
644 01:06:17.682782 DSU clk: 1200 Mhz
645 01:06:17.683186 CPU clk: 1200 MHz
646 01:06:17.687738 Set clk81 to 166.6M
647 01:06:17.693372 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 01:06:17.693808 board id: 1
649 01:06:17.700352 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 01:06:17.711269 fw parse done
651 01:06:17.717197 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 01:06:17.760415 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 01:06:17.771440 PIEI prepare done
654 01:06:17.771874 fastboot data load
655 01:06:17.772340 fastboot data verify
656 01:06:17.777083 verify result: 266
657 01:06:17.782682 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 01:06:17.783114 LPDDR4 probe
659 01:06:17.783516 ddr clk to 1584MHz
660 01:06:17.790721 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 01:06:17.828410
662 01:06:17.828848 dmc_version 0001
663 01:06:17.835388 Check phy result
664 01:06:17.841446 INFO : End of CA training
665 01:06:17.841895 INFO : End of initialization
666 01:06:17.846992 INFO : Training has run successfully!
667 01:06:17.847420 Check phy result
668 01:06:17.852735 INFO : End of initialization
669 01:06:17.853161 INFO : End of read enable training
670 01:06:17.858204 INFO : End of fine write leveling
671 01:06:17.863857 INFO : End of Write leveling coarse delay
672 01:06:17.864321 INFO : Training has run successfully!
673 01:06:17.864728 Check phy result
674 01:06:17.869448 INFO : End of initialization
675 01:06:17.869879 INFO : End of read dq deskew training
676 01:06:17.875037 INFO : End of MPR read delay center optimization
677 01:06:17.880704 INFO : End of write delay center optimization
678 01:06:17.886216 INFO : End of read delay center optimization
679 01:06:17.886641 INFO : End of max read latency training
680 01:06:17.891791 INFO : Training has run successfully!
681 01:06:17.892259 1D training succeed
682 01:06:17.901021 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 01:06:17.949220 Check phy result
684 01:06:17.949652 INFO : End of initialization
685 01:06:17.976594 INFO : End of 2D read delay Voltage center optimization
686 01:06:18.000856 INFO : End of 2D read delay Voltage center optimization
687 01:06:18.057552 INFO : End of 2D write delay Voltage center optimization
688 01:06:18.111574 INFO : End of 2D write delay Voltage center optimization
689 01:06:18.117071 INFO : Training has run successfully!
690 01:06:18.117514
691 01:06:18.117924 channel==0
692 01:06:18.122574 RxClkDly_Margin_A0==78 ps 8
693 01:06:18.123016 TxDqDly_Margin_A0==98 ps 10
694 01:06:18.128236 RxClkDly_Margin_A1==88 ps 9
695 01:06:18.128664 TxDqDly_Margin_A1==88 ps 9
696 01:06:18.129075 TrainedVREFDQ_A0==74
697 01:06:18.133876 TrainedVREFDQ_A1==74
698 01:06:18.134309 VrefDac_Margin_A0==24
699 01:06:18.134712 DeviceVref_Margin_A0==40
700 01:06:18.139380 VrefDac_Margin_A1==23
701 01:06:18.139808 DeviceVref_Margin_A1==40
702 01:06:18.140242
703 01:06:18.140645
704 01:06:18.141046 channel==1
705 01:06:18.145149 RxClkDly_Margin_A0==78 ps 8
706 01:06:18.145573 TxDqDly_Margin_A0==98 ps 10
707 01:06:18.150572 RxClkDly_Margin_A1==78 ps 8
708 01:06:18.151001 TxDqDly_Margin_A1==78 ps 8
709 01:06:18.156220 TrainedVREFDQ_A0==78
710 01:06:18.156657 TrainedVREFDQ_A1==75
711 01:06:18.157065 VrefDac_Margin_A0==22
712 01:06:18.161898 DeviceVref_Margin_A0==36
713 01:06:18.162324 VrefDac_Margin_A1==22
714 01:06:18.167449 DeviceVref_Margin_A1==39
715 01:06:18.167871
716 01:06:18.168305 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 01:06:18.168707
718 01:06:18.201127 soc_vref_reg_value 0x 00000019 00000018 00000019 00000017 00000018 00000015 00000018 00000015 00000018 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
719 01:06:18.201584 2D training succeed
720 01:06:18.206573 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 01:06:18.212077 auto size-- 65535DDR cs0 size: 2048MB
722 01:06:18.212503 DDR cs1 size: 2048MB
723 01:06:18.217746 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 01:06:18.218175 cs0 DataBus test pass
725 01:06:18.223355 cs1 DataBus test pass
726 01:06:18.223797 cs0 AddrBus test pass
727 01:06:18.224249 cs1 AddrBus test pass
728 01:06:18.224652
729 01:06:18.228895 100bdlr_step_size ps== 471
730 01:06:18.229332 result report
731 01:06:18.234504 boot times 0Enable ddr reg access
732 01:06:18.239736 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 01:06:18.253555 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 01:06:18.912107 bl2z: ptr: 05129330, size: 00001e40
735 01:06:18.919497 0.0;M3 CHK:0;cm4_sp_mode 0
736 01:06:18.919961 MVN_1=0x00000000
737 01:06:18.920418 MVN_2=0x00000000
738 01:06:18.930976 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 01:06:18.931417 OPS=0x04
740 01:06:18.931828 ring efuse init
741 01:06:18.936758 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 01:06:18.937202 [0.017354 Inits done]
743 01:06:18.937608 secure task start!
744 01:06:18.944071 high task start!
745 01:06:18.944509 low task start!
746 01:06:18.944916 run into bl31
747 01:06:18.952761 NOTICE: BL31: v1.3(release):4fc40b1
748 01:06:18.960497 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 01:06:18.960937 NOTICE: BL31: G12A normal boot!
750 01:06:18.976146 NOTICE: BL31: BL33 decompress pass
751 01:06:18.981849 ERROR: Error initializing runtime service opteed_fast
752 01:06:19.776168
753 01:06:19.776800
754 01:06:19.781364 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 01:06:19.781811
756 01:06:19.784929 Model: Libre Computer AML-S905D3-CC Solitude
757 01:06:19.931784 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 01:06:19.947084 DRAM: 2 GiB (effective 3.8 GiB)
759 01:06:20.048156 Core: 406 devices, 33 uclasses, devicetree: separate
760 01:06:20.054140 WDT: Not starting watchdog@f0d0
761 01:06:20.079215 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 01:06:20.091337 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 01:06:20.096306 ** Bad device specification mmc 0 **
764 01:06:20.106313 Card did not respond to voltage select! : -110
765 01:06:20.114012 ** Bad device specification mmc 0 **
766 01:06:20.114440 Couldn't find partition mmc 0
767 01:06:20.122270 Card did not respond to voltage select! : -110
768 01:06:20.127814 ** Bad device specification mmc 0 **
769 01:06:20.128271 Couldn't find partition mmc 0
770 01:06:20.132856 Error: could not access storage.
771 01:06:20.430476 Net: eth0: ethernet@ff3f0000
772 01:06:20.431082 starting USB...
773 01:06:20.675212 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 01:06:20.675782 Starting the controller
775 01:06:20.681981 USB XHCI 1.10
776 01:06:22.235851 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 01:06:22.243908 scanning usb for storage devices... 0 Storage Device(s) found
779 01:06:22.295368 Hit any key to stop autoboot: 1
780 01:06:22.296137 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
781 01:06:22.296735 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
782 01:06:22.297223 Setting prompt string to ['=>']
783 01:06:22.297702 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
784 01:06:22.309988 0
785 01:06:22.310842 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 01:06:22.412117 => setenv autoload no
788 01:06:22.413109 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 01:06:22.418107 setenv autoload no
791 01:06:22.519612 => setenv initrd_high 0xffffffff
792 01:06:22.520337 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 01:06:22.524656 setenv initrd_high 0xffffffff
795 01:06:22.626049 => setenv fdt_high 0xffffffff
796 01:06:22.626656 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 01:06:22.631131 setenv fdt_high 0xffffffff
799 01:06:22.732583 => dhcp
800 01:06:22.733171 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
801 01:06:22.737213 dhcp
802 01:06:23.643364 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
803 01:06:23.643957 Speed: 1000, full duplex
804 01:06:23.644435 BOOTP broadcast 1
805 01:06:23.891393 BOOTP broadcast 2
806 01:06:23.908356 DHCP client bound to address 192.168.6.21 (264 ms)
808 01:06:24.009834 => setenv serverip 192.168.6.2
809 01:06:24.010531 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
810 01:06:24.015228 setenv serverip 192.168.6.2
812 01:06:24.116674 => tftpboot 0x01080000 972882/tftp-deploy-v8xqexdw/kernel/uImage
813 01:06:24.117306 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
814 01:06:24.124129 tftpboot 0x01080000 972882/tftp-deploy-v8xqexdw/kernel/uImage
815 01:06:24.124602 Speed: 1000, full duplex
816 01:06:24.125020 Using ethernet@ff3f0000 device
817 01:06:24.129652 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
818 01:06:24.135086 Filename '972882/tftp-deploy-v8xqexdw/kernel/uImage'.
819 01:06:24.138986 Load address: 0x1080000
820 01:06:26.969266 Loading: *################################################## 43.6 MiB
821 01:06:26.969890 15.4 MiB/s
822 01:06:26.970300 done
823 01:06:26.973903 Bytes transferred = 45713984 (2b98a40 hex)
825 01:06:27.075351 => tftpboot 0x08000000 972882/tftp-deploy-v8xqexdw/ramdisk/ramdisk.cpio.gz.uboot
826 01:06:27.076045 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
827 01:06:27.082972 tftpboot 0x08000000 972882/tftp-deploy-v8xqexdw/ramdisk/ramdisk.cpio.gz.uboot
828 01:06:27.083601 Speed: 1000, full duplex
829 01:06:27.084168 Using ethernet@ff3f0000 device
830 01:06:27.088497 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
831 01:06:27.098132 Filename '972882/tftp-deploy-v8xqexdw/ramdisk/ramdisk.cpio.gz.uboot'.
832 01:06:27.098493 Load address: 0x8000000
833 01:06:28.597314 Loading: *################################################# UDP wrong checksum 00000005 00004675
834 01:06:31.064190 UDP wrong checksum 000000ff 0000d8c8
835 01:06:31.104577 UDP wrong checksum 000000ff 000074bb
836 01:06:33.598543 T UDP wrong checksum 00000005 00004675
837 01:06:43.600668 T T UDP wrong checksum 00000005 00004675
838 01:07:03.604667 T T T T UDP wrong checksum 00000005 00004675
839 01:07:23.609324 T T T
840 01:07:23.610144 Retry count exceeded; starting again
842 01:07:23.611950 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
845 01:07:23.614482 end: 2.4 uboot-commands (duration 00:01:20) [common]
847 01:07:23.616253 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
849 01:07:23.617562 end: 2 uboot-action (duration 00:01:20) [common]
851 01:07:23.619483 Cleaning after the job
852 01:07:23.620192 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/ramdisk
853 01:07:23.621876 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/kernel
854 01:07:23.668116 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/dtb
855 01:07:23.669052 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/nfsrootfs
856 01:07:23.873004 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/972882/tftp-deploy-v8xqexdw/modules
857 01:07:23.896890 start: 4.1 power-off (timeout 00:00:30) [common]
858 01:07:23.897673 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
859 01:07:23.931763 >> OK - accepted request
860 01:07:23.933808 Returned 0 in 0 seconds
861 01:07:24.034693 end: 4.1 power-off (duration 00:00:00) [common]
863 01:07:24.035837 start: 4.2 read-feedback (timeout 00:10:00) [common]
864 01:07:24.036677 Listened to connection for namespace 'common' for up to 1s
865 01:07:25.036642 Finalising connection for namespace 'common'
866 01:07:25.037143 Disconnecting from shell: Finalise
867 01:07:25.037455 =>
868 01:07:25.138324 end: 4.2 read-feedback (duration 00:00:01) [common]
869 01:07:25.139011 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/972882
870 01:07:28.078809 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/972882
871 01:07:28.079485 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.