Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 11:34:42.262712 lava-dispatcher, installed at version: 2024.01
2 11:34:42.263471 start: 0 validate
3 11:34:42.263946 Start time: 2024-10-22 11:34:42.263915+00:00 (UTC)
4 11:34:42.264506 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 11:34:42.265063 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 11:34:42.307615 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 11:34:42.308172 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmediatek%2Ffor-next%2Fv6.12-rc1-54-gbca140199160%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 11:34:42.340904 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 11:34:42.341499 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmediatek%2Ffor-next%2Fv6.12-rc1-54-gbca140199160%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 11:34:42.378297 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 11:34:42.379050 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 11:34:42.412222 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 11:34:42.412709 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmediatek%2Ffor-next%2Fv6.12-rc1-54-gbca140199160%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 11:34:42.456587 validate duration: 0.19
16 11:34:42.458110 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 11:34:42.458732 start: 1.1 download-retry (timeout 00:10:00) [common]
18 11:34:42.459354 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 11:34:42.460335 Not decompressing ramdisk as can be used compressed.
20 11:34:42.461076 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 11:34:42.461572 saving as /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/ramdisk/initrd.cpio.gz
22 11:34:42.462074 total size: 5628140 (5 MB)
23 11:34:42.504381 progress 0 % (0 MB)
24 11:34:42.512360 progress 5 % (0 MB)
25 11:34:42.520939 progress 10 % (0 MB)
26 11:34:42.528649 progress 15 % (0 MB)
27 11:34:42.536571 progress 20 % (1 MB)
28 11:34:42.541783 progress 25 % (1 MB)
29 11:34:42.545691 progress 30 % (1 MB)
30 11:34:42.549574 progress 35 % (1 MB)
31 11:34:42.553243 progress 40 % (2 MB)
32 11:34:42.557283 progress 45 % (2 MB)
33 11:34:42.560726 progress 50 % (2 MB)
34 11:34:42.564586 progress 55 % (2 MB)
35 11:34:42.568582 progress 60 % (3 MB)
36 11:34:42.572080 progress 65 % (3 MB)
37 11:34:42.575915 progress 70 % (3 MB)
38 11:34:42.579586 progress 75 % (4 MB)
39 11:34:42.583544 progress 80 % (4 MB)
40 11:34:42.586915 progress 85 % (4 MB)
41 11:34:42.590483 progress 90 % (4 MB)
42 11:34:42.594071 progress 95 % (5 MB)
43 11:34:42.597283 progress 100 % (5 MB)
44 11:34:42.597901 5 MB downloaded in 0.14 s (39.52 MB/s)
45 11:34:42.598446 end: 1.1.1 http-download (duration 00:00:00) [common]
47 11:34:42.599378 end: 1.1 download-retry (duration 00:00:00) [common]
48 11:34:42.599685 start: 1.2 download-retry (timeout 00:10:00) [common]
49 11:34:42.599959 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 11:34:42.600449 downloading http://storage.kernelci.org/mediatek/for-next/v6.12-rc1-54-gbca140199160/arm64/defconfig/gcc-12/kernel/Image
51 11:34:42.600685 saving as /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/kernel/Image
52 11:34:42.600894 total size: 45713920 (43 MB)
53 11:34:42.601104 No compression specified
54 11:34:42.639955 progress 0 % (0 MB)
55 11:34:42.669191 progress 5 % (2 MB)
56 11:34:42.698548 progress 10 % (4 MB)
57 11:34:42.727631 progress 15 % (6 MB)
58 11:34:42.756926 progress 20 % (8 MB)
59 11:34:42.785741 progress 25 % (10 MB)
60 11:34:42.814615 progress 30 % (13 MB)
61 11:34:42.843447 progress 35 % (15 MB)
62 11:34:42.876447 progress 40 % (17 MB)
63 11:34:42.910437 progress 45 % (19 MB)
64 11:34:42.945332 progress 50 % (21 MB)
65 11:34:42.980003 progress 55 % (24 MB)
66 11:34:43.014857 progress 60 % (26 MB)
67 11:34:43.049397 progress 65 % (28 MB)
68 11:34:43.083867 progress 70 % (30 MB)
69 11:34:43.118376 progress 75 % (32 MB)
70 11:34:43.152998 progress 80 % (34 MB)
71 11:34:43.187174 progress 85 % (37 MB)
72 11:34:43.221534 progress 90 % (39 MB)
73 11:34:43.255810 progress 95 % (41 MB)
74 11:34:43.289062 progress 100 % (43 MB)
75 11:34:43.289708 43 MB downloaded in 0.69 s (63.29 MB/s)
76 11:34:43.290311 end: 1.2.1 http-download (duration 00:00:01) [common]
78 11:34:43.291325 end: 1.2 download-retry (duration 00:00:01) [common]
79 11:34:43.291662 start: 1.3 download-retry (timeout 00:09:59) [common]
80 11:34:43.292021 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 11:34:43.292618 downloading http://storage.kernelci.org/mediatek/for-next/v6.12-rc1-54-gbca140199160/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 11:34:43.292955 saving as /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/dtb/meson-g12b-a311d-libretech-cc.dtb
83 11:34:43.293218 total size: 54703 (0 MB)
84 11:34:43.293473 No compression specified
85 11:34:43.333583 progress 59 % (0 MB)
86 11:34:43.334486 progress 100 % (0 MB)
87 11:34:43.335112 0 MB downloaded in 0.04 s (1.25 MB/s)
88 11:34:43.335667 end: 1.3.1 http-download (duration 00:00:00) [common]
90 11:34:43.336679 end: 1.3 download-retry (duration 00:00:00) [common]
91 11:34:43.337037 start: 1.4 download-retry (timeout 00:09:59) [common]
92 11:34:43.337344 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 11:34:43.337813 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 11:34:43.338068 saving as /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/nfsrootfs/full.rootfs.tar
95 11:34:43.338285 total size: 474398908 (452 MB)
96 11:34:43.338500 Using unxz to decompress xz
97 11:34:43.374422 progress 0 % (0 MB)
98 11:34:44.490549 progress 5 % (22 MB)
99 11:34:46.009976 progress 10 % (45 MB)
100 11:34:46.480182 progress 15 % (67 MB)
101 11:34:47.347644 progress 20 % (90 MB)
102 11:34:47.889195 progress 25 % (113 MB)
103 11:34:48.251325 progress 30 % (135 MB)
104 11:34:48.848159 progress 35 % (158 MB)
105 11:34:49.673331 progress 40 % (181 MB)
106 11:34:50.399584 progress 45 % (203 MB)
107 11:34:50.970434 progress 50 % (226 MB)
108 11:34:51.608547 progress 55 % (248 MB)
109 11:34:52.827849 progress 60 % (271 MB)
110 11:34:54.236874 progress 65 % (294 MB)
111 11:34:55.817564 progress 70 % (316 MB)
112 11:34:58.898009 progress 75 % (339 MB)
113 11:35:01.337077 progress 80 % (361 MB)
114 11:35:04.249381 progress 85 % (384 MB)
115 11:35:07.422348 progress 90 % (407 MB)
116 11:35:10.613365 progress 95 % (429 MB)
117 11:35:13.799583 progress 100 % (452 MB)
118 11:35:13.812728 452 MB downloaded in 30.47 s (14.85 MB/s)
119 11:35:13.813905 end: 1.4.1 http-download (duration 00:00:30) [common]
121 11:35:13.816073 end: 1.4 download-retry (duration 00:00:30) [common]
122 11:35:13.816780 start: 1.5 download-retry (timeout 00:09:29) [common]
123 11:35:13.817465 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 11:35:13.818525 downloading http://storage.kernelci.org/mediatek/for-next/v6.12-rc1-54-gbca140199160/arm64/defconfig/gcc-12/modules.tar.xz
125 11:35:13.819137 saving as /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/modules/modules.tar
126 11:35:13.819697 total size: 11620900 (11 MB)
127 11:35:13.820345 Using unxz to decompress xz
128 11:35:13.868316 progress 0 % (0 MB)
129 11:35:13.930870 progress 5 % (0 MB)
130 11:35:14.010045 progress 10 % (1 MB)
131 11:35:14.097888 progress 15 % (1 MB)
132 11:35:14.190180 progress 20 % (2 MB)
133 11:35:14.274094 progress 25 % (2 MB)
134 11:35:14.352620 progress 30 % (3 MB)
135 11:35:14.435800 progress 35 % (3 MB)
136 11:35:14.513473 progress 40 % (4 MB)
137 11:35:14.591888 progress 45 % (5 MB)
138 11:35:14.674253 progress 50 % (5 MB)
139 11:35:14.757017 progress 55 % (6 MB)
140 11:35:14.836571 progress 60 % (6 MB)
141 11:35:14.911466 progress 65 % (7 MB)
142 11:35:14.991774 progress 70 % (7 MB)
143 11:35:15.065220 progress 75 % (8 MB)
144 11:35:15.142006 progress 80 % (8 MB)
145 11:35:15.225826 progress 85 % (9 MB)
146 11:35:15.309876 progress 90 % (10 MB)
147 11:35:15.385774 progress 95 % (10 MB)
148 11:35:15.464974 progress 100 % (11 MB)
149 11:35:15.478119 11 MB downloaded in 1.66 s (6.68 MB/s)
150 11:35:15.479222 end: 1.5.1 http-download (duration 00:00:02) [common]
152 11:35:15.481514 end: 1.5 download-retry (duration 00:00:02) [common]
153 11:35:15.482196 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 11:35:15.482876 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 11:35:32.148552 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/880833/extract-nfsrootfs-hijyzbfp
156 11:35:32.149162 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 11:35:32.149504 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 11:35:32.150263 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7
159 11:35:32.150808 makedir: /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin
160 11:35:32.151293 makedir: /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/tests
161 11:35:32.151709 makedir: /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/results
162 11:35:32.152122 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-add-keys
163 11:35:32.152765 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-add-sources
164 11:35:32.153329 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-background-process-start
165 11:35:32.153865 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-background-process-stop
166 11:35:32.154463 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-common-functions
167 11:35:32.155014 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-echo-ipv4
168 11:35:32.155537 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-install-packages
169 11:35:32.156109 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-installed-packages
170 11:35:32.156650 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-os-build
171 11:35:32.157191 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-probe-channel
172 11:35:32.157724 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-probe-ip
173 11:35:32.158248 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-target-ip
174 11:35:32.158877 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-target-mac
175 11:35:32.159396 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-target-storage
176 11:35:32.159897 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-test-case
177 11:35:32.160448 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-test-event
178 11:35:32.160947 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-test-feedback
179 11:35:32.161426 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-test-raise
180 11:35:32.161922 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-test-reference
181 11:35:32.162423 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-test-runner
182 11:35:32.162928 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-test-set
183 11:35:32.163422 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-test-shell
184 11:35:32.163925 Updating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-install-packages (oe)
185 11:35:32.164545 Updating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/bin/lava-installed-packages (oe)
186 11:35:32.164995 Creating /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/environment
187 11:35:32.165369 LAVA metadata
188 11:35:32.165626 - LAVA_JOB_ID=880833
189 11:35:32.165840 - LAVA_DISPATCHER_IP=192.168.6.2
190 11:35:32.166204 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 11:35:32.167197 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 11:35:32.167514 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 11:35:32.167722 skipped lava-vland-overlay
194 11:35:32.167964 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 11:35:32.168247 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 11:35:32.168469 skipped lava-multinode-overlay
197 11:35:32.168715 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 11:35:32.168970 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 11:35:32.169219 Loading test definitions
200 11:35:32.169494 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 11:35:32.169714 Using /lava-880833 at stage 0
202 11:35:32.170972 uuid=880833_1.6.2.4.1 testdef=None
203 11:35:32.171285 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 11:35:32.171550 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 11:35:32.173391 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 11:35:32.174204 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 11:35:32.176547 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 11:35:32.177413 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 11:35:32.179567 runner path: /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 880833_1.6.2.4.1
212 11:35:32.180186 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 11:35:32.180950 Creating lava-test-runner.conf files
215 11:35:32.181151 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/880833/lava-overlay-2bdyg4e7/lava-880833/0 for stage 0
216 11:35:32.181496 - 0_v4l2-decoder-conformance-h265
217 11:35:32.181839 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 11:35:32.182111 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 11:35:32.204115 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 11:35:32.204545 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 11:35:32.204808 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 11:35:32.205079 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 11:35:32.205346 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 11:35:32.886173 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 11:35:32.886718 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 11:35:32.887007 extracting modules file /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/modules/modules.tar to /var/lib/lava/dispatcher/tmp/880833/extract-nfsrootfs-hijyzbfp
227 11:35:34.424887 extracting modules file /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/modules/modules.tar to /var/lib/lava/dispatcher/tmp/880833/extract-overlay-ramdisk-m4iw7hcl/ramdisk
228 11:35:36.050866 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 11:35:36.051351 start: 1.6.5 apply-overlay-tftp (timeout 00:09:06) [common]
230 11:35:36.051649 [common] Applying overlay to NFS
231 11:35:36.051877 [common] Applying overlay /var/lib/lava/dispatcher/tmp/880833/compress-overlay-jkncmoj0/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/880833/extract-nfsrootfs-hijyzbfp
232 11:35:36.082216 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 11:35:36.082671 start: 1.6.6 prepare-kernel (timeout 00:09:06) [common]
234 11:35:36.082977 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:06) [common]
235 11:35:36.083229 Converting downloaded kernel to a uImage
236 11:35:36.083563 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/kernel/Image /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/kernel/uImage
237 11:35:36.640325 output: Image Name:
238 11:35:36.640847 output: Created: Tue Oct 22 11:35:36 2024
239 11:35:36.641398 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 11:35:36.641864 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 11:35:36.642203 output: Load Address: 01080000
242 11:35:36.642436 output: Entry Point: 01080000
243 11:35:36.642652 output:
244 11:35:36.643001 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 11:35:36.643293 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 11:35:36.643583 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 11:35:36.643857 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 11:35:36.644601 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 11:35:36.644999 Building ramdisk /var/lib/lava/dispatcher/tmp/880833/extract-overlay-ramdisk-m4iw7hcl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/880833/extract-overlay-ramdisk-m4iw7hcl/ramdisk
250 11:35:38.904416 >> 166772 blocks
251 11:35:46.643238 Adding RAMdisk u-boot header.
252 11:35:46.643677 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/880833/extract-overlay-ramdisk-m4iw7hcl/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/880833/extract-overlay-ramdisk-m4iw7hcl/ramdisk.cpio.gz.uboot
253 11:35:46.878992 output: Image Name:
254 11:35:46.879422 output: Created: Tue Oct 22 11:35:46 2024
255 11:35:46.879664 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 11:35:46.879889 output: Data Size: 23425177 Bytes = 22876.15 KiB = 22.34 MiB
257 11:35:46.880273 output: Load Address: 00000000
258 11:35:46.880685 output: Entry Point: 00000000
259 11:35:46.881096 output:
260 11:35:46.882130 rename /var/lib/lava/dispatcher/tmp/880833/extract-overlay-ramdisk-m4iw7hcl/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/ramdisk/ramdisk.cpio.gz.uboot
261 11:35:46.882845 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 11:35:46.883397 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 11:35:46.883961 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 11:35:46.884480 No LXC device requested
265 11:35:46.885026 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 11:35:46.885575 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 11:35:46.886102 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 11:35:46.886519 Checking files for TFTP limit of 4294967296 bytes.
269 11:35:46.889307 end: 1 tftp-deploy (duration 00:01:04) [common]
270 11:35:46.889892 start: 2 uboot-action (timeout 00:05:00) [common]
271 11:35:46.890413 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 11:35:46.890904 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 11:35:46.891397 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 11:35:46.891917 Using kernel file from prepare-kernel: 880833/tftp-deploy-r_nssdot/kernel/uImage
275 11:35:46.892570 substitutions:
276 11:35:46.892972 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 11:35:46.893371 - {DTB_ADDR}: 0x01070000
278 11:35:46.893766 - {DTB}: 880833/tftp-deploy-r_nssdot/dtb/meson-g12b-a311d-libretech-cc.dtb
279 11:35:46.894158 - {INITRD}: 880833/tftp-deploy-r_nssdot/ramdisk/ramdisk.cpio.gz.uboot
280 11:35:46.894548 - {KERNEL_ADDR}: 0x01080000
281 11:35:46.894936 - {KERNEL}: 880833/tftp-deploy-r_nssdot/kernel/uImage
282 11:35:46.895323 - {LAVA_MAC}: None
283 11:35:46.895746 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/880833/extract-nfsrootfs-hijyzbfp
284 11:35:46.896176 - {NFS_SERVER_IP}: 192.168.6.2
285 11:35:46.896566 - {PRESEED_CONFIG}: None
286 11:35:46.896953 - {PRESEED_LOCAL}: None
287 11:35:46.897335 - {RAMDISK_ADDR}: 0x08000000
288 11:35:46.897715 - {RAMDISK}: 880833/tftp-deploy-r_nssdot/ramdisk/ramdisk.cpio.gz.uboot
289 11:35:46.898098 - {ROOT_PART}: None
290 11:35:46.898482 - {ROOT}: None
291 11:35:46.898864 - {SERVER_IP}: 192.168.6.2
292 11:35:46.899245 - {TEE_ADDR}: 0x83000000
293 11:35:46.899625 - {TEE}: None
294 11:35:46.900038 Parsed boot commands:
295 11:35:46.900419 - setenv autoload no
296 11:35:46.900801 - setenv initrd_high 0xffffffff
297 11:35:46.901181 - setenv fdt_high 0xffffffff
298 11:35:46.901566 - dhcp
299 11:35:46.901947 - setenv serverip 192.168.6.2
300 11:35:46.902325 - tftpboot 0x01080000 880833/tftp-deploy-r_nssdot/kernel/uImage
301 11:35:46.902706 - tftpboot 0x08000000 880833/tftp-deploy-r_nssdot/ramdisk/ramdisk.cpio.gz.uboot
302 11:35:46.903086 - tftpboot 0x01070000 880833/tftp-deploy-r_nssdot/dtb/meson-g12b-a311d-libretech-cc.dtb
303 11:35:46.903469 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/880833/extract-nfsrootfs-hijyzbfp,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 11:35:46.903865 - bootm 0x01080000 0x08000000 0x01070000
305 11:35:46.904398 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 11:35:46.905869 start: 2.3 connect-device (timeout 00:05:00) [common]
308 11:35:46.906281 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 11:35:46.921055 Setting prompt string to ['lava-test: # ']
310 11:35:46.922745 end: 2.3 connect-device (duration 00:00:00) [common]
311 11:35:46.923376 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 11:35:46.924018 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 11:35:46.924611 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 11:35:46.925724 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 11:35:46.961386 >> OK - accepted request
316 11:35:46.963505 Returned 0 in 0 seconds
317 11:35:47.064621 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 11:35:47.066204 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 11:35:47.066777 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 11:35:47.067289 Setting prompt string to ['Hit any key to stop autoboot']
322 11:35:47.067743 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 11:35:47.069355 Trying 192.168.56.21...
324 11:35:47.069829 Connected to conserv1.
325 11:35:47.070247 Escape character is '^]'.
326 11:35:47.070657
327 11:35:47.071070 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 11:35:47.071477
329 11:35:57.912851 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 11:35:57.913500 bl2_stage_init 0x01
331 11:35:57.913930 bl2_stage_init 0x81
332 11:35:57.918414 hw id: 0x0000 - pwm id 0x01
333 11:35:57.919002 bl2_stage_init 0xc1
334 11:35:57.919460 bl2_stage_init 0x02
335 11:35:57.919858
336 11:35:57.924014 L0:00000000
337 11:35:57.924516 L1:20000703
338 11:35:57.924906 L2:00008067
339 11:35:57.925307 L3:14000000
340 11:35:57.929524 B2:00402000
341 11:35:57.930030 B1:e0f83180
342 11:35:57.930421
343 11:35:57.930815 TE: 58124
344 11:35:57.931227
345 11:35:57.935167 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 11:35:57.935656
347 11:35:57.936086 Board ID = 1
348 11:35:57.940647 Set A53 clk to 24M
349 11:35:57.941142 Set A73 clk to 24M
350 11:35:57.941532 Set clk81 to 24M
351 11:35:57.946289 A53 clk: 1200 MHz
352 11:35:57.946785 A73 clk: 1200 MHz
353 11:35:57.947211 CLK81: 166.6M
354 11:35:57.947610 smccc: 00012a91
355 11:35:57.951900 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 11:35:57.957423 board id: 1
357 11:35:57.963385 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 11:35:57.974102 fw parse done
359 11:35:57.980059 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 11:35:58.022628 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 11:35:58.033438 PIEI prepare done
362 11:35:58.033976 fastboot data load
363 11:35:58.034383 fastboot data verify
364 11:35:58.038986 verify result: 266
365 11:35:58.044700 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 11:35:58.045162 LPDDR4 probe
367 11:35:58.045570 ddr clk to 1584MHz
368 11:35:58.052679 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 11:35:58.089968
370 11:35:58.090487 dmc_version 0001
371 11:35:58.096582 Check phy result
372 11:35:58.102463 INFO : End of CA training
373 11:35:58.103021 INFO : End of initialization
374 11:35:58.108078 INFO : Training has run successfully!
375 11:35:58.108599 Check phy result
376 11:35:58.113684 INFO : End of initialization
377 11:35:58.114202 INFO : End of read enable training
378 11:35:58.116970 INFO : End of fine write leveling
379 11:35:58.122497 INFO : End of Write leveling coarse delay
380 11:35:58.128148 INFO : Training has run successfully!
381 11:35:58.128676 Check phy result
382 11:35:58.129124 INFO : End of initialization
383 11:35:58.133803 INFO : End of read dq deskew training
384 11:35:58.139553 INFO : End of MPR read delay center optimization
385 11:35:58.140183 INFO : End of write delay center optimization
386 11:35:58.144959 INFO : End of read delay center optimization
387 11:35:58.150581 INFO : End of max read latency training
388 11:35:58.151085 INFO : Training has run successfully!
389 11:35:58.156258 1D training succeed
390 11:35:58.162140 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 11:35:58.209751 Check phy result
392 11:35:58.210361 INFO : End of initialization
393 11:35:58.231688 INFO : End of 2D read delay Voltage center optimization
394 11:35:58.251779 INFO : End of 2D read delay Voltage center optimization
395 11:35:58.303880 INFO : End of 2D write delay Voltage center optimization
396 11:35:58.353255 INFO : End of 2D write delay Voltage center optimization
397 11:35:58.358700 INFO : Training has run successfully!
398 11:35:58.359171
399 11:35:58.359610 channel==0
400 11:35:58.364340 RxClkDly_Margin_A0==88 ps 9
401 11:35:58.364807 TxDqDly_Margin_A0==98 ps 10
402 11:35:58.367708 RxClkDly_Margin_A1==88 ps 9
403 11:35:58.368162 TxDqDly_Margin_A1==88 ps 9
404 11:35:58.373388 TrainedVREFDQ_A0==74
405 11:35:58.373913 TrainedVREFDQ_A1==74
406 11:35:58.374430 VrefDac_Margin_A0==25
407 11:35:58.378876 DeviceVref_Margin_A0==40
408 11:35:58.379385 VrefDac_Margin_A1==25
409 11:35:58.384589 DeviceVref_Margin_A1==40
410 11:35:58.385052
411 11:35:58.385460
412 11:35:58.385860 channel==1
413 11:35:58.386254 RxClkDly_Margin_A0==98 ps 10
414 11:35:58.390090 TxDqDly_Margin_A0==98 ps 10
415 11:35:58.390550 RxClkDly_Margin_A1==88 ps 9
416 11:35:58.395680 TxDqDly_Margin_A1==88 ps 9
417 11:35:58.396203 TrainedVREFDQ_A0==77
418 11:35:58.396651 TrainedVREFDQ_A1==77
419 11:35:58.401329 VrefDac_Margin_A0==22
420 11:35:58.401794 DeviceVref_Margin_A0==37
421 11:35:58.407010 VrefDac_Margin_A1==24
422 11:35:58.407492 DeviceVref_Margin_A1==37
423 11:35:58.407934
424 11:35:58.412571 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 11:35:58.413043
426 11:35:58.440554 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 11:35:58.446076 2D training succeed
428 11:35:58.451566 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 11:35:58.452070 auto size-- 65535DDR cs0 size: 2048MB
430 11:35:58.457239 DDR cs1 size: 2048MB
431 11:35:58.457685 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 11:35:58.462758 cs0 DataBus test pass
433 11:35:58.463241 cs1 DataBus test pass
434 11:35:58.463653 cs0 AddrBus test pass
435 11:35:58.468445 cs1 AddrBus test pass
436 11:35:58.468870
437 11:35:58.469271 100bdlr_step_size ps== 420
438 11:35:58.469675 result report
439 11:35:58.473942 boot times 0Enable ddr reg access
440 11:35:58.481567 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 11:35:58.494978 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 11:35:59.068157 0.0;M3 CHK:0;cm4_sp_mode 0
443 11:35:59.068784 MVN_1=0x00000000
444 11:35:59.073562 MVN_2=0x00000000
445 11:35:59.079303 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 11:35:59.079748 OPS=0x10
447 11:35:59.080207 ring efuse init
448 11:35:59.080612 chipver efuse init
449 11:35:59.087611 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 11:35:59.088088 [0.018961 Inits done]
451 11:35:59.088497 secure task start!
452 11:35:59.095082 high task start!
453 11:35:59.095514 low task start!
454 11:35:59.095916 run into bl31
455 11:35:59.101744 NOTICE: BL31: v1.3(release):4fc40b1
456 11:35:59.109610 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 11:35:59.110063 NOTICE: BL31: G12A normal boot!
458 11:35:59.134948 NOTICE: BL31: BL33 decompress pass
459 11:35:59.140628 ERROR: Error initializing runtime service opteed_fast
460 11:36:00.373660
461 11:36:00.374663
462 11:36:00.381990 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 11:36:00.382762
464 11:36:00.383413 Model: Libre Computer AML-A311D-CC Alta
465 11:36:00.590451 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 11:36:00.613893 DRAM: 2 GiB (effective 3.8 GiB)
467 11:36:00.756843 Core: 408 devices, 31 uclasses, devicetree: separate
468 11:36:00.762575 WDT: Not starting watchdog@f0d0
469 11:36:00.794869 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 11:36:00.807256 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 11:36:00.812251 ** Bad device specification mmc 0 **
472 11:36:00.822621 Card did not respond to voltage select! : -110
473 11:36:00.830225 ** Bad device specification mmc 0 **
474 11:36:00.830509 Couldn't find partition mmc 0
475 11:36:00.838602 Card did not respond to voltage select! : -110
476 11:36:00.844276 ** Bad device specification mmc 0 **
477 11:36:00.844815 Couldn't find partition mmc 0
478 11:36:00.849299 Error: could not access storage.
479 11:36:02.113292 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
480 11:36:02.113957 bl2_stage_init 0x81
481 11:36:02.118899 hw id: 0x0000 - pwm id 0x01
482 11:36:02.119445 bl2_stage_init 0xc1
483 11:36:02.119910 bl2_stage_init 0x02
484 11:36:02.120431
485 11:36:02.124481 L0:00000000
486 11:36:02.125005 L1:20000703
487 11:36:02.125456 L2:00008067
488 11:36:02.125900 L3:14000000
489 11:36:02.126335 B2:00402000
490 11:36:02.130076 B1:e0f83180
491 11:36:02.130586
492 11:36:02.131039 TE: 58150
493 11:36:02.131481
494 11:36:02.135712 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 11:36:02.136264
496 11:36:02.136723 Board ID = 1
497 11:36:02.141268 Set A53 clk to 24M
498 11:36:02.141775 Set A73 clk to 24M
499 11:36:02.142219 Set clk81 to 24M
500 11:36:02.146886 A53 clk: 1200 MHz
501 11:36:02.147400 A73 clk: 1200 MHz
502 11:36:02.147849 CLK81: 166.6M
503 11:36:02.148336 smccc: 00012aab
504 11:36:02.152507 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 11:36:02.158091 board id: 1
506 11:36:02.163924 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 11:36:02.174514 fw parse done
508 11:36:02.180457 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 11:36:02.223106 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 11:36:02.234096 PIEI prepare done
511 11:36:02.234644 fastboot data load
512 11:36:02.235100 fastboot data verify
513 11:36:02.239611 verify result: 266
514 11:36:02.245258 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 11:36:02.245819 LPDDR4 probe
516 11:36:02.246274 ddr clk to 1584MHz
517 11:36:02.253260 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 11:36:02.290475
519 11:36:02.291028 dmc_version 0001
520 11:36:02.297216 Check phy result
521 11:36:02.303128 INFO : End of CA training
522 11:36:02.303648 INFO : End of initialization
523 11:36:02.308644 INFO : Training has run successfully!
524 11:36:02.309163 Check phy result
525 11:36:02.314253 INFO : End of initialization
526 11:36:02.314784 INFO : End of read enable training
527 11:36:02.319899 INFO : End of fine write leveling
528 11:36:02.325468 INFO : End of Write leveling coarse delay
529 11:36:02.326017 INFO : Training has run successfully!
530 11:36:02.326474 Check phy result
531 11:36:02.331155 INFO : End of initialization
532 11:36:02.331699 INFO : End of read dq deskew training
533 11:36:02.336683 INFO : End of MPR read delay center optimization
534 11:36:02.342296 INFO : End of write delay center optimization
535 11:36:02.347935 INFO : End of read delay center optimization
536 11:36:02.348535 INFO : End of max read latency training
537 11:36:02.353487 INFO : Training has run successfully!
538 11:36:02.354047 1D training succeed
539 11:36:02.362621 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 11:36:02.410265 Check phy result
541 11:36:02.410833 INFO : End of initialization
542 11:36:02.432042 INFO : End of 2D read delay Voltage center optimization
543 11:36:02.452279 INFO : End of 2D read delay Voltage center optimization
544 11:36:02.504282 INFO : End of 2D write delay Voltage center optimization
545 11:36:02.553606 INFO : End of 2D write delay Voltage center optimization
546 11:36:02.559198 INFO : Training has run successfully!
547 11:36:02.559699
548 11:36:02.560207 channel==0
549 11:36:02.564780 RxClkDly_Margin_A0==88 ps 9
550 11:36:02.565295 TxDqDly_Margin_A0==98 ps 10
551 11:36:02.568206 RxClkDly_Margin_A1==88 ps 9
552 11:36:02.568704 TxDqDly_Margin_A1==98 ps 10
553 11:36:02.573713 TrainedVREFDQ_A0==74
554 11:36:02.574212 TrainedVREFDQ_A1==74
555 11:36:02.574667 VrefDac_Margin_A0==25
556 11:36:02.579301 DeviceVref_Margin_A0==40
557 11:36:02.579796 VrefDac_Margin_A1==25
558 11:36:02.584905 DeviceVref_Margin_A1==40
559 11:36:02.585400
560 11:36:02.585848
561 11:36:02.586288 channel==1
562 11:36:02.586723 RxClkDly_Margin_A0==98 ps 10
563 11:36:02.590513 TxDqDly_Margin_A0==98 ps 10
564 11:36:02.591012 RxClkDly_Margin_A1==98 ps 10
565 11:36:02.596176 TxDqDly_Margin_A1==88 ps 9
566 11:36:02.596682 TrainedVREFDQ_A0==77
567 11:36:02.597136 TrainedVREFDQ_A1==77
568 11:36:02.601708 VrefDac_Margin_A0==22
569 11:36:02.602204 DeviceVref_Margin_A0==37
570 11:36:02.607287 VrefDac_Margin_A1==22
571 11:36:02.607781 DeviceVref_Margin_A1==37
572 11:36:02.608266
573 11:36:02.612893 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 11:36:02.613392
575 11:36:02.640889 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
576 11:36:02.646529 2D training succeed
577 11:36:02.652165 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 11:36:02.652672 auto size-- 65535DDR cs0 size: 2048MB
579 11:36:02.657700 DDR cs1 size: 2048MB
580 11:36:02.658219 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 11:36:02.663317 cs0 DataBus test pass
582 11:36:02.663817 cs1 DataBus test pass
583 11:36:02.664319 cs0 AddrBus test pass
584 11:36:02.668941 cs1 AddrBus test pass
585 11:36:02.669499
586 11:36:02.669975 100bdlr_step_size ps== 420
587 11:36:02.670436 result report
588 11:36:02.674538 boot times 0Enable ddr reg access
589 11:36:02.682242 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 11:36:02.695666 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 11:36:03.269128 0.0;M3 CHK:0;cm4_sp_mode 0
592 11:36:03.269502 MVN_1=0x00000000
593 11:36:03.274790 MVN_2=0x00000000
594 11:36:03.280431 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 11:36:03.280733 OPS=0x10
596 11:36:03.280937 ring efuse init
597 11:36:03.281136 chipver efuse init
598 11:36:03.288641 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 11:36:03.288951 [0.018961 Inits done]
600 11:36:03.295307 secure task start!
601 11:36:03.295599 high task start!
602 11:36:03.295798 low task start!
603 11:36:03.296020 run into bl31
604 11:36:03.302948 NOTICE: BL31: v1.3(release):4fc40b1
605 11:36:03.310862 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 11:36:03.311455 NOTICE: BL31: G12A normal boot!
607 11:36:03.336265 NOTICE: BL31: BL33 decompress pass
608 11:36:03.341829 ERROR: Error initializing runtime service opteed_fast
609 11:36:04.574689
610 11:36:04.575361
611 11:36:04.583136 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 11:36:04.583716
613 11:36:04.584249 Model: Libre Computer AML-A311D-CC Alta
614 11:36:04.791777 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 11:36:04.815052 DRAM: 2 GiB (effective 3.8 GiB)
616 11:36:04.957796 Core: 408 devices, 31 uclasses, devicetree: separate
617 11:36:04.963638 WDT: Not starting watchdog@f0d0
618 11:36:04.996099 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 11:36:05.008485 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 11:36:05.013549 ** Bad device specification mmc 0 **
621 11:36:05.023769 Card did not respond to voltage select! : -110
622 11:36:05.031454 ** Bad device specification mmc 0 **
623 11:36:05.032055 Couldn't find partition mmc 0
624 11:36:05.039765 Card did not respond to voltage select! : -110
625 11:36:05.045222 ** Bad device specification mmc 0 **
626 11:36:05.045776 Couldn't find partition mmc 0
627 11:36:05.050281 Error: could not access storage.
628 11:36:05.392962 Net: eth0: ethernet@ff3f0000
629 11:36:05.393613 starting USB...
630 11:36:05.644757 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 11:36:05.645392 Starting the controller
632 11:36:05.651744 USB XHCI 1.10
633 11:36:07.361928 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
634 11:36:07.362589 bl2_stage_init 0x01
635 11:36:07.363054 bl2_stage_init 0x81
636 11:36:07.367684 hw id: 0x0000 - pwm id 0x01
637 11:36:07.368243 bl2_stage_init 0xc1
638 11:36:07.368712 bl2_stage_init 0x02
639 11:36:07.369176
640 11:36:07.373190 L0:00000000
641 11:36:07.373722 L1:20000703
642 11:36:07.374190 L2:00008067
643 11:36:07.374648 L3:14000000
644 11:36:07.378743 B2:00402000
645 11:36:07.379255 B1:e0f83180
646 11:36:07.379711
647 11:36:07.380200 TE: 58159
648 11:36:07.380656
649 11:36:07.384406 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 11:36:07.384914
651 11:36:07.385370 Board ID = 1
652 11:36:07.389889 Set A53 clk to 24M
653 11:36:07.390391 Set A73 clk to 24M
654 11:36:07.390843 Set clk81 to 24M
655 11:36:07.395596 A53 clk: 1200 MHz
656 11:36:07.396129 A73 clk: 1200 MHz
657 11:36:07.396582 CLK81: 166.6M
658 11:36:07.397023 smccc: 00012ab4
659 11:36:07.401181 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 11:36:07.406784 board id: 1
661 11:36:07.412844 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 11:36:07.423145 fw parse done
663 11:36:07.429108 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 11:36:07.471721 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 11:36:07.482647 PIEI prepare done
666 11:36:07.483196 fastboot data load
667 11:36:07.483655 fastboot data verify
668 11:36:07.488381 verify result: 266
669 11:36:07.493895 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 11:36:07.494417 LPDDR4 probe
671 11:36:07.494865 ddr clk to 1584MHz
672 11:36:07.501893 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 11:36:07.539168
674 11:36:07.539736 dmc_version 0001
675 11:36:07.545828 Check phy result
676 11:36:07.551686 INFO : End of CA training
677 11:36:07.552260 INFO : End of initialization
678 11:36:07.557333 INFO : Training has run successfully!
679 11:36:07.557879 Check phy result
680 11:36:07.562885 INFO : End of initialization
681 11:36:07.563406 INFO : End of read enable training
682 11:36:07.568561 INFO : End of fine write leveling
683 11:36:07.574091 INFO : End of Write leveling coarse delay
684 11:36:07.574638 INFO : Training has run successfully!
685 11:36:07.575118 Check phy result
686 11:36:07.579673 INFO : End of initialization
687 11:36:07.580237 INFO : End of read dq deskew training
688 11:36:07.585326 INFO : End of MPR read delay center optimization
689 11:36:07.590862 INFO : End of write delay center optimization
690 11:36:07.596540 INFO : End of read delay center optimization
691 11:36:07.597073 INFO : End of max read latency training
692 11:36:07.602092 INFO : Training has run successfully!
693 11:36:07.602625 1D training succeed
694 11:36:07.611261 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 11:36:07.658889 Check phy result
696 11:36:07.659458 INFO : End of initialization
697 11:36:07.680470 INFO : End of 2D read delay Voltage center optimization
698 11:36:07.700580 INFO : End of 2D read delay Voltage center optimization
699 11:36:07.752481 INFO : End of 2D write delay Voltage center optimization
700 11:36:07.801763 INFO : End of 2D write delay Voltage center optimization
701 11:36:07.807312 INFO : Training has run successfully!
702 11:36:07.807843
703 11:36:07.808360 channel==0
704 11:36:07.812886 RxClkDly_Margin_A0==88 ps 9
705 11:36:07.813399 TxDqDly_Margin_A0==98 ps 10
706 11:36:07.818480 RxClkDly_Margin_A1==88 ps 9
707 11:36:07.818992 TxDqDly_Margin_A1==98 ps 10
708 11:36:07.819445 TrainedVREFDQ_A0==74
709 11:36:07.824106 TrainedVREFDQ_A1==74
710 11:36:07.824620 VrefDac_Margin_A0==25
711 11:36:07.825065 DeviceVref_Margin_A0==40
712 11:36:07.829720 VrefDac_Margin_A1==25
713 11:36:07.830229 DeviceVref_Margin_A1==40
714 11:36:07.830673
715 11:36:07.831114
716 11:36:07.835262 channel==1
717 11:36:07.835762 RxClkDly_Margin_A0==98 ps 10
718 11:36:07.836244 TxDqDly_Margin_A0==98 ps 10
719 11:36:07.840883 RxClkDly_Margin_A1==88 ps 9
720 11:36:07.841395 TxDqDly_Margin_A1==88 ps 9
721 11:36:07.846497 TrainedVREFDQ_A0==77
722 11:36:07.847010 TrainedVREFDQ_A1==77
723 11:36:07.847460 VrefDac_Margin_A0==22
724 11:36:07.852099 DeviceVref_Margin_A0==37
725 11:36:07.852601 VrefDac_Margin_A1==24
726 11:36:07.857748 DeviceVref_Margin_A1==37
727 11:36:07.858248
728 11:36:07.858693 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 11:36:07.859132
730 11:36:07.891244 soc_vref_reg_value 0x 00000019 00000019 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
731 11:36:07.891811 2D training succeed
732 11:36:07.896920 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 11:36:07.902515 auto size-- 65535DDR cs0 size: 2048MB
734 11:36:07.903029 DDR cs1 size: 2048MB
735 11:36:07.908135 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 11:36:07.908671 cs0 DataBus test pass
737 11:36:07.913789 cs1 DataBus test pass
738 11:36:07.914315 cs0 AddrBus test pass
739 11:36:07.914765 cs1 AddrBus test pass
740 11:36:07.915206
741 11:36:07.919332 100bdlr_step_size ps== 420
742 11:36:07.919872 result report
743 11:36:07.924922 boot times 0Enable ddr reg access
744 11:36:07.930288 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 11:36:07.943801 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 11:36:08.515780 0.0;M3 CHK:0;cm4_sp_mode 0
747 11:36:08.516434 MVN_1=0x00000000
748 11:36:08.521266 MVN_2=0x00000000
749 11:36:08.526968 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 11:36:08.527513 OPS=0x10
751 11:36:08.527948 ring efuse init
752 11:36:08.528417 chipver efuse init
753 11:36:08.532579 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 11:36:08.538176 [0.018961 Inits done]
755 11:36:08.538676 secure task start!
756 11:36:08.539109 high task start!
757 11:36:08.542893 low task start!
758 11:36:08.543412 run into bl31
759 11:36:08.549461 NOTICE: BL31: v1.3(release):4fc40b1
760 11:36:08.557252 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 11:36:08.557756 NOTICE: BL31: G12A normal boot!
762 11:36:08.582570 NOTICE: BL31: BL33 decompress pass
763 11:36:08.588294 ERROR: Error initializing runtime service opteed_fast
764 11:36:09.821111
765 11:36:09.821756
766 11:36:09.829541 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 11:36:09.830072
768 11:36:09.830527 Model: Libre Computer AML-A311D-CC Alta
769 11:36:10.037939 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 11:36:10.061318 DRAM: 2 GiB (effective 3.8 GiB)
771 11:36:10.204320 Core: 408 devices, 31 uclasses, devicetree: separate
772 11:36:10.210070 WDT: Not starting watchdog@f0d0
773 11:36:10.242291 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 11:36:10.254805 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 11:36:10.259733 ** Bad device specification mmc 0 **
776 11:36:10.270062 Card did not respond to voltage select! : -110
777 11:36:10.277711 ** Bad device specification mmc 0 **
778 11:36:10.278205 Couldn't find partition mmc 0
779 11:36:10.286042 Card did not respond to voltage select! : -110
780 11:36:10.291597 ** Bad device specification mmc 0 **
781 11:36:10.292123 Couldn't find partition mmc 0
782 11:36:10.296641 Error: could not access storage.
783 11:36:10.639134 Net: eth0: ethernet@ff3f0000
784 11:36:10.639771 starting USB...
785 11:36:10.890976 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 11:36:10.891626 Starting the controller
787 11:36:10.897887 USB XHCI 1.10
788 11:36:13.061962 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 11:36:13.062650 bl2_stage_init 0x01
790 11:36:13.063146 bl2_stage_init 0x81
791 11:36:13.067597 hw id: 0x0000 - pwm id 0x01
792 11:36:13.068169 bl2_stage_init 0xc1
793 11:36:13.068630 bl2_stage_init 0x02
794 11:36:13.069074
795 11:36:13.073065 L0:00000000
796 11:36:13.073594 L1:20000703
797 11:36:13.074045 L2:00008067
798 11:36:13.074488 L3:14000000
799 11:36:13.078684 B2:00402000
800 11:36:13.079205 B1:e0f83180
801 11:36:13.079654
802 11:36:13.080138 TE: 58124
803 11:36:13.080586
804 11:36:13.084313 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 11:36:13.084846
806 11:36:13.085341 Board ID = 1
807 11:36:13.089958 Set A53 clk to 24M
808 11:36:13.090476 Set A73 clk to 24M
809 11:36:13.090920 Set clk81 to 24M
810 11:36:13.095601 A53 clk: 1200 MHz
811 11:36:13.096172 A73 clk: 1200 MHz
812 11:36:13.096623 CLK81: 166.6M
813 11:36:13.097073 smccc: 00012a92
814 11:36:13.101063 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 11:36:13.106638 board id: 1
816 11:36:13.112490 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 11:36:13.123076 fw parse done
818 11:36:13.129023 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 11:36:13.171706 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 11:36:13.182633 PIEI prepare done
821 11:36:13.183202 fastboot data load
822 11:36:13.183673 fastboot data verify
823 11:36:13.188309 verify result: 266
824 11:36:13.193891 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 11:36:13.194435 LPDDR4 probe
826 11:36:13.194889 ddr clk to 1584MHz
827 11:36:13.201858 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 11:36:13.239190
829 11:36:13.239755 dmc_version 0001
830 11:36:13.245879 Check phy result
831 11:36:13.251713 INFO : End of CA training
832 11:36:13.252273 INFO : End of initialization
833 11:36:13.257329 INFO : Training has run successfully!
834 11:36:13.257840 Check phy result
835 11:36:13.262935 INFO : End of initialization
836 11:36:13.263449 INFO : End of read enable training
837 11:36:13.266191 INFO : End of fine write leveling
838 11:36:13.271698 INFO : End of Write leveling coarse delay
839 11:36:13.277321 INFO : Training has run successfully!
840 11:36:13.277845 Check phy result
841 11:36:13.278318 INFO : End of initialization
842 11:36:13.282971 INFO : End of read dq deskew training
843 11:36:13.286394 INFO : End of MPR read delay center optimization
844 11:36:13.291938 INFO : End of write delay center optimization
845 11:36:13.297575 INFO : End of read delay center optimization
846 11:36:13.298092 INFO : End of max read latency training
847 11:36:13.303139 INFO : Training has run successfully!
848 11:36:13.303650 1D training succeed
849 11:36:13.311315 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 11:36:13.358776 Check phy result
851 11:36:13.359345 INFO : End of initialization
852 11:36:13.381352 INFO : End of 2D read delay Voltage center optimization
853 11:36:13.401586 INFO : End of 2D read delay Voltage center optimization
854 11:36:13.454750 INFO : End of 2D write delay Voltage center optimization
855 11:36:13.502985 INFO : End of 2D write delay Voltage center optimization
856 11:36:13.508571 INFO : Training has run successfully!
857 11:36:13.509104
858 11:36:13.509559 channel==0
859 11:36:13.514119 RxClkDly_Margin_A0==88 ps 9
860 11:36:13.514656 TxDqDly_Margin_A0==98 ps 10
861 11:36:13.517521 RxClkDly_Margin_A1==88 ps 9
862 11:36:13.518029 TxDqDly_Margin_A1==88 ps 9
863 11:36:13.523085 TrainedVREFDQ_A0==74
864 11:36:13.523628 TrainedVREFDQ_A1==74
865 11:36:13.524143 VrefDac_Margin_A0==24
866 11:36:13.528623 DeviceVref_Margin_A0==40
867 11:36:13.529137 VrefDac_Margin_A1==24
868 11:36:13.534209 DeviceVref_Margin_A1==40
869 11:36:13.534693
870 11:36:13.535121
871 11:36:13.535561 channel==1
872 11:36:13.536040 RxClkDly_Margin_A0==98 ps 10
873 11:36:13.539820 TxDqDly_Margin_A0==88 ps 9
874 11:36:13.540357 RxClkDly_Margin_A1==98 ps 10
875 11:36:13.545467 TxDqDly_Margin_A1==88 ps 9
876 11:36:13.545974 TrainedVREFDQ_A0==75
877 11:36:13.546406 TrainedVREFDQ_A1==77
878 11:36:13.551002 VrefDac_Margin_A0==22
879 11:36:13.551500 DeviceVref_Margin_A0==39
880 11:36:13.556618 VrefDac_Margin_A1==24
881 11:36:13.557130 DeviceVref_Margin_A1==37
882 11:36:13.557575
883 11:36:13.562233 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 11:36:13.562742
885 11:36:13.590226 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
886 11:36:13.595823 2D training succeed
887 11:36:13.601500 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 11:36:13.602005 auto size-- 65535DDR cs0 size: 2048MB
889 11:36:13.607003 DDR cs1 size: 2048MB
890 11:36:13.607509 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 11:36:13.612626 cs0 DataBus test pass
892 11:36:13.613131 cs1 DataBus test pass
893 11:36:13.613579 cs0 AddrBus test pass
894 11:36:13.618236 cs1 AddrBus test pass
895 11:36:13.618749
896 11:36:13.619190 100bdlr_step_size ps== 420
897 11:36:13.619641 result report
898 11:36:13.623807 boot times 0Enable ddr reg access
899 11:36:13.631353 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 11:36:13.644833 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 11:36:14.218507 0.0;M3 CHK:0;cm4_sp_mode 0
902 11:36:14.219143 MVN_1=0x00000000
903 11:36:14.224039 MVN_2=0x00000000
904 11:36:14.229810 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 11:36:14.230336 OPS=0x10
906 11:36:14.230797 ring efuse init
907 11:36:14.231241 chipver efuse init
908 11:36:14.238119 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 11:36:14.238653 [0.018961 Inits done]
910 11:36:14.239108 secure task start!
911 11:36:14.245629 high task start!
912 11:36:14.246153 low task start!
913 11:36:14.246608 run into bl31
914 11:36:14.252257 NOTICE: BL31: v1.3(release):4fc40b1
915 11:36:14.260055 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 11:36:14.260578 NOTICE: BL31: G12A normal boot!
917 11:36:14.285453 NOTICE: BL31: BL33 decompress pass
918 11:36:14.291055 ERROR: Error initializing runtime service opteed_fast
919 11:36:15.524035
920 11:36:15.524678
921 11:36:15.532364 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 11:36:15.532916
923 11:36:15.533376 Model: Libre Computer AML-A311D-CC Alta
924 11:36:15.740997 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 11:36:15.764419 DRAM: 2 GiB (effective 3.8 GiB)
926 11:36:15.907316 Core: 408 devices, 31 uclasses, devicetree: separate
927 11:36:15.913153 WDT: Not starting watchdog@f0d0
928 11:36:15.945387 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 11:36:15.957840 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 11:36:15.962923 ** Bad device specification mmc 0 **
931 11:36:15.973198 Card did not respond to voltage select! : -110
932 11:36:15.980927 ** Bad device specification mmc 0 **
933 11:36:15.981442 Couldn't find partition mmc 0
934 11:36:15.989124 Card did not respond to voltage select! : -110
935 11:36:15.994687 ** Bad device specification mmc 0 **
936 11:36:15.995189 Couldn't find partition mmc 0
937 11:36:15.999774 Error: could not access storage.
938 11:36:16.342213 Net: eth0: ethernet@ff3f0000
939 11:36:16.342870 starting USB...
940 11:36:16.594089 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 11:36:16.594860 Starting the controller
942 11:36:16.601044 USB XHCI 1.10
943 11:36:18.154975 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 11:36:18.163253 scanning usb for storage devices... 0 Storage Device(s) found
946 11:36:18.214944 Hit any key to stop autoboot: 1
947 11:36:18.215795 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
948 11:36:18.216603 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
949 11:36:18.217129 Setting prompt string to ['=>']
950 11:36:18.217652 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
951 11:36:18.230624 0
952 11:36:18.231608 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 11:36:18.232226 Sending with 10 millisecond of delay
955 11:36:19.367016 => setenv autoload no
956 11:36:19.377854 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:28)
957 11:36:19.383156 setenv autoload no
958 11:36:19.383924 Sending with 10 millisecond of delay
960 11:36:21.181244 => setenv initrd_high 0xffffffff
961 11:36:21.192107 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
962 11:36:21.193112 setenv initrd_high 0xffffffff
963 11:36:21.193882 Sending with 10 millisecond of delay
965 11:36:22.810770 => setenv fdt_high 0xffffffff
966 11:36:22.821609 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
967 11:36:22.822219 setenv fdt_high 0xffffffff
968 11:36:22.822733 Sending with 10 millisecond of delay
970 11:36:23.114568 => dhcp
971 11:36:23.125130 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
972 11:36:23.125663 dhcp
973 11:36:23.125898 Speed: 1000, full duplex
974 11:36:23.126105 BOOTP broadcast 1
975 11:36:23.133314 DHCP client bound to address 192.168.6.27 (8 ms)
976 11:36:23.133946 Sending with 10 millisecond of delay
978 11:36:24.811354 => setenv serverip 192.168.6.2
979 11:36:24.822987 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
980 11:36:24.824012 setenv serverip 192.168.6.2
981 11:36:24.824762 Sending with 10 millisecond of delay
983 11:36:28.549907 => tftpboot 0x01080000 880833/tftp-deploy-r_nssdot/kernel/uImage
984 11:36:28.560697 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
985 11:36:28.561216 tftpboot 0x01080000 880833/tftp-deploy-r_nssdot/kernel/uImage
986 11:36:28.561452 Speed: 1000, full duplex
987 11:36:28.561660 Using ethernet@ff3f0000 device
988 11:36:28.563191 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 11:36:28.568790 Filename '880833/tftp-deploy-r_nssdot/kernel/uImage'.
990 11:36:28.572784 Load address: 0x1080000
991 11:36:31.375841 Loading: *################################################## 43.6 MiB
992 11:36:31.376306 15.5 MiB/s
993 11:36:31.376781 done
994 11:36:31.380352 Bytes transferred = 45713984 (2b98a40 hex)
995 11:36:31.381311 Sending with 10 millisecond of delay
997 11:36:36.069706 => tftpboot 0x08000000 880833/tftp-deploy-r_nssdot/ramdisk/ramdisk.cpio.gz.uboot
998 11:36:36.080502 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
999 11:36:36.081361 tftpboot 0x08000000 880833/tftp-deploy-r_nssdot/ramdisk/ramdisk.cpio.gz.uboot
1000 11:36:36.081844 Speed: 1000, full duplex
1001 11:36:36.082297 Using ethernet@ff3f0000 device
1002 11:36:36.083068 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1003 11:36:36.094736 Filename '880833/tftp-deploy-r_nssdot/ramdisk/ramdisk.cpio.gz.uboot'.
1004 11:36:36.095294 Load address: 0x8000000
1005 11:36:42.601497 Loading: *#######################T ########################## UDP wrong checksum 00000005 00002d65
1006 11:36:47.602918 T UDP wrong checksum 00000005 00002d65
1007 11:36:53.862147 T UDP wrong checksum 000000ff 0000652b
1008 11:36:53.906187 UDP wrong checksum 000000ff 0000f61d
1009 11:36:57.605980 T UDP wrong checksum 00000005 00002d65
1010 11:37:05.652866 T UDP wrong checksum 000000ff 00000499
1011 11:37:05.733790 UDP wrong checksum 000000ff 00009d8b
1012 11:37:13.437031 T T UDP wrong checksum 000000ff 0000ae89
1013 11:37:13.444352 UDP wrong checksum 000000ff 00003c7c
1014 11:37:17.609154 UDP wrong checksum 00000005 00002d65
1015 11:37:32.614920 T T T
1016 11:37:32.615579 Retry count exceeded; starting again
1018 11:37:32.617269 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1021 11:37:32.619375 end: 2.4 uboot-commands (duration 00:01:46) [common]
1023 11:37:32.620989 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1025 11:37:32.622106 end: 2 uboot-action (duration 00:01:46) [common]
1027 11:37:32.623838 Cleaning after the job
1028 11:37:32.624545 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/ramdisk
1029 11:37:32.626026 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/kernel
1030 11:37:32.673167 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/dtb
1031 11:37:32.673973 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/nfsrootfs
1032 11:37:32.720925 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/880833/tftp-deploy-r_nssdot/modules
1033 11:37:32.727475 start: 4.1 power-off (timeout 00:00:30) [common]
1034 11:37:32.728077 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1035 11:37:32.762988 >> OK - accepted request
1036 11:37:32.765090 Returned 0 in 0 seconds
1037 11:37:32.866042 end: 4.1 power-off (duration 00:00:00) [common]
1039 11:37:32.867186 start: 4.2 read-feedback (timeout 00:10:00) [common]
1040 11:37:32.868106 Listened to connection for namespace 'common' for up to 1s
1041 11:37:33.868875 Finalising connection for namespace 'common'
1042 11:37:33.869306 Disconnecting from shell: Finalise
1043 11:37:33.869583 =>
1044 11:37:33.970307 end: 4.2 read-feedback (duration 00:00:01) [common]
1045 11:37:33.970931 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/880833
1046 11:37:36.424694 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/880833
1047 11:37:36.425332 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.