Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:49:44.790863 lava-dispatcher, installed at version: 2024.01
2 08:49:44.791645 start: 0 validate
3 08:49:44.792160 Start time: 2024-08-29 08:49:44.792129+00:00 (UTC)
4 08:49:44.792739 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:49:44.793298 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 08:49:44.828554 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:49:44.829084 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240829%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 08:49:44.856737 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:49:44.857412 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240829%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 08:49:44.891341 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:49:44.891843 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 08:49:44.926576 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 08:49:44.927362 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240829%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 08:49:44.968379 validate duration: 0.18
16 08:49:44.969250 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 08:49:44.969581 start: 1.1 download-retry (timeout 00:10:00) [common]
18 08:49:44.969902 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 08:49:44.970491 Not decompressing ramdisk as can be used compressed.
20 08:49:44.970950 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 08:49:44.971233 saving as /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/ramdisk/initrd.cpio.gz
22 08:49:44.971511 total size: 5628182 (5 MB)
23 08:49:45.018305 progress 0 % (0 MB)
24 08:49:45.023351 progress 5 % (0 MB)
25 08:49:45.028103 progress 10 % (0 MB)
26 08:49:45.032123 progress 15 % (0 MB)
27 08:49:45.036520 progress 20 % (1 MB)
28 08:49:45.040486 progress 25 % (1 MB)
29 08:49:45.045032 progress 30 % (1 MB)
30 08:49:45.049258 progress 35 % (1 MB)
31 08:49:45.053038 progress 40 % (2 MB)
32 08:49:45.057563 progress 45 % (2 MB)
33 08:49:45.061570 progress 50 % (2 MB)
34 08:49:45.065861 progress 55 % (2 MB)
35 08:49:45.069931 progress 60 % (3 MB)
36 08:49:45.073726 progress 65 % (3 MB)
37 08:49:45.077880 progress 70 % (3 MB)
38 08:49:45.081601 progress 75 % (4 MB)
39 08:49:45.085630 progress 80 % (4 MB)
40 08:49:45.089230 progress 85 % (4 MB)
41 08:49:45.093240 progress 90 % (4 MB)
42 08:49:45.096987 progress 95 % (5 MB)
43 08:49:45.100359 progress 100 % (5 MB)
44 08:49:45.101005 5 MB downloaded in 0.13 s (41.45 MB/s)
45 08:49:45.101550 end: 1.1.1 http-download (duration 00:00:00) [common]
47 08:49:45.102435 end: 1.1 download-retry (duration 00:00:00) [common]
48 08:49:45.102723 start: 1.2 download-retry (timeout 00:10:00) [common]
49 08:49:45.102994 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 08:49:45.103463 downloading http://storage.kernelci.org/next/master/next-20240829/arm64/defconfig+debug/gcc-12/kernel/Image
51 08:49:45.103707 saving as /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/kernel/Image
52 08:49:45.103918 total size: 169146880 (161 MB)
53 08:49:45.104157 No compression specified
54 08:49:45.140957 progress 0 % (0 MB)
55 08:49:45.246990 progress 5 % (8 MB)
56 08:49:45.351233 progress 10 % (16 MB)
57 08:49:45.455800 progress 15 % (24 MB)
58 08:49:45.562499 progress 20 % (32 MB)
59 08:49:45.669323 progress 25 % (40 MB)
60 08:49:45.772849 progress 30 % (48 MB)
61 08:49:45.878115 progress 35 % (56 MB)
62 08:49:45.982258 progress 40 % (64 MB)
63 08:49:46.086608 progress 45 % (72 MB)
64 08:49:46.190699 progress 50 % (80 MB)
65 08:49:46.295960 progress 55 % (88 MB)
66 08:49:46.399513 progress 60 % (96 MB)
67 08:49:46.501031 progress 65 % (104 MB)
68 08:49:46.603373 progress 70 % (112 MB)
69 08:49:46.706795 progress 75 % (121 MB)
70 08:49:46.810090 progress 80 % (129 MB)
71 08:49:46.914093 progress 85 % (137 MB)
72 08:49:47.017422 progress 90 % (145 MB)
73 08:49:47.119745 progress 95 % (153 MB)
74 08:49:47.220623 progress 100 % (161 MB)
75 08:49:47.221432 161 MB downloaded in 2.12 s (76.18 MB/s)
76 08:49:47.221929 end: 1.2.1 http-download (duration 00:00:02) [common]
78 08:49:47.222777 end: 1.2 download-retry (duration 00:00:02) [common]
79 08:49:47.223072 start: 1.3 download-retry (timeout 00:09:58) [common]
80 08:49:47.223353 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 08:49:47.223835 downloading http://storage.kernelci.org/next/master/next-20240829/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 08:49:47.224131 saving as /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/dtb/meson-g12b-a311d-libretech-cc.dtb
83 08:49:47.224351 total size: 54667 (0 MB)
84 08:49:47.224570 No compression specified
85 08:49:47.276800 progress 59 % (0 MB)
86 08:49:47.277905 progress 100 % (0 MB)
87 08:49:47.278484 0 MB downloaded in 0.05 s (0.96 MB/s)
88 08:49:47.278998 end: 1.3.1 http-download (duration 00:00:00) [common]
90 08:49:47.279842 end: 1.3 download-retry (duration 00:00:00) [common]
91 08:49:47.280146 start: 1.4 download-retry (timeout 00:09:58) [common]
92 08:49:47.280428 start: 1.4.1 http-download (timeout 00:09:58) [common]
93 08:49:47.280913 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 08:49:47.281164 saving as /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/nfsrootfs/full.rootfs.tar
95 08:49:47.281375 total size: 107552908 (102 MB)
96 08:49:47.281593 Using unxz to decompress xz
97 08:49:47.318209 progress 0 % (0 MB)
98 08:49:48.068734 progress 5 % (5 MB)
99 08:49:48.791327 progress 10 % (10 MB)
100 08:49:49.517094 progress 15 % (15 MB)
101 08:49:50.297640 progress 20 % (20 MB)
102 08:49:50.874572 progress 25 % (25 MB)
103 08:49:51.494512 progress 30 % (30 MB)
104 08:49:52.232356 progress 35 % (35 MB)
105 08:49:52.579641 progress 40 % (41 MB)
106 08:49:53.009572 progress 45 % (46 MB)
107 08:49:53.696925 progress 50 % (51 MB)
108 08:49:54.380049 progress 55 % (56 MB)
109 08:49:55.130369 progress 60 % (61 MB)
110 08:49:55.893693 progress 65 % (66 MB)
111 08:49:56.623822 progress 70 % (71 MB)
112 08:49:57.404687 progress 75 % (76 MB)
113 08:49:58.204003 progress 80 % (82 MB)
114 08:49:58.907681 progress 85 % (87 MB)
115 08:49:59.634707 progress 90 % (92 MB)
116 08:50:00.446202 progress 95 % (97 MB)
117 08:50:01.337688 progress 100 % (102 MB)
118 08:50:01.352996 102 MB downloaded in 14.07 s (7.29 MB/s)
119 08:50:01.353609 end: 1.4.1 http-download (duration 00:00:14) [common]
121 08:50:01.354437 end: 1.4 download-retry (duration 00:00:14) [common]
122 08:50:01.354700 start: 1.5 download-retry (timeout 00:09:44) [common]
123 08:50:01.354961 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 08:50:01.355431 downloading http://storage.kernelci.org/next/master/next-20240829/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 08:50:01.355669 saving as /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/modules/modules.tar
126 08:50:01.355871 total size: 27518516 (26 MB)
127 08:50:01.356294 Using unxz to decompress xz
128 08:50:01.400330 progress 0 % (0 MB)
129 08:50:01.581756 progress 5 % (1 MB)
130 08:50:01.788991 progress 10 % (2 MB)
131 08:50:01.988183 progress 15 % (3 MB)
132 08:50:02.197891 progress 20 % (5 MB)
133 08:50:02.397558 progress 25 % (6 MB)
134 08:50:02.597387 progress 30 % (7 MB)
135 08:50:02.793014 progress 35 % (9 MB)
136 08:50:02.991333 progress 40 % (10 MB)
137 08:50:03.190379 progress 45 % (11 MB)
138 08:50:03.387788 progress 50 % (13 MB)
139 08:50:03.575618 progress 55 % (14 MB)
140 08:50:03.781946 progress 60 % (15 MB)
141 08:50:03.997383 progress 65 % (17 MB)
142 08:50:04.202767 progress 70 % (18 MB)
143 08:50:04.434898 progress 75 % (19 MB)
144 08:50:04.653387 progress 80 % (21 MB)
145 08:50:04.873871 progress 85 % (22 MB)
146 08:50:05.082350 progress 90 % (23 MB)
147 08:50:05.290356 progress 95 % (24 MB)
148 08:50:05.493362 progress 100 % (26 MB)
149 08:50:05.506544 26 MB downloaded in 4.15 s (6.32 MB/s)
150 08:50:05.507254 end: 1.5.1 http-download (duration 00:00:04) [common]
152 08:50:05.508919 end: 1.5 download-retry (duration 00:00:04) [common]
153 08:50:05.509455 start: 1.6 prepare-tftp-overlay (timeout 00:09:39) [common]
154 08:50:05.509985 start: 1.6.1 extract-nfsrootfs (timeout 00:09:39) [common]
155 08:50:15.230191 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/668311/extract-nfsrootfs-pv98b25x
156 08:50:15.230792 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 08:50:15.231082 start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
158 08:50:15.231691 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx
159 08:50:15.232166 makedir: /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin
160 08:50:15.232540 makedir: /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/tests
161 08:50:15.232874 makedir: /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/results
162 08:50:15.233213 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-add-keys
163 08:50:15.233858 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-add-sources
164 08:50:15.234398 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-background-process-start
165 08:50:15.234911 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-background-process-stop
166 08:50:15.235448 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-common-functions
167 08:50:15.235964 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-echo-ipv4
168 08:50:15.236510 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-install-packages
169 08:50:15.237025 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-installed-packages
170 08:50:15.237527 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-os-build
171 08:50:15.238025 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-probe-channel
172 08:50:15.238528 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-probe-ip
173 08:50:15.239049 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-target-ip
174 08:50:15.239611 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-target-mac
175 08:50:15.240156 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-target-storage
176 08:50:15.240688 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-test-case
177 08:50:15.241202 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-test-event
178 08:50:15.241715 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-test-feedback
179 08:50:15.242223 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-test-raise
180 08:50:15.242756 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-test-reference
181 08:50:15.243264 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-test-runner
182 08:50:15.243763 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-test-set
183 08:50:15.244285 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-test-shell
184 08:50:15.244814 Updating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-install-packages (oe)
185 08:50:15.245403 Updating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/bin/lava-installed-packages (oe)
186 08:50:15.245898 Creating /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/environment
187 08:50:15.246300 LAVA metadata
188 08:50:15.246571 - LAVA_JOB_ID=668311
189 08:50:15.246789 - LAVA_DISPATCHER_IP=192.168.6.2
190 08:50:15.247177 start: 1.6.2.1 ssh-authorize (timeout 00:09:30) [common]
191 08:50:15.248231 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 08:50:15.248583 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:30) [common]
193 08:50:15.248799 skipped lava-vland-overlay
194 08:50:15.249045 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 08:50:15.249306 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:30) [common]
196 08:50:15.249528 skipped lava-multinode-overlay
197 08:50:15.249772 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 08:50:15.250028 start: 1.6.2.4 test-definition (timeout 00:09:30) [common]
199 08:50:15.250287 Loading test definitions
200 08:50:15.250573 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:30) [common]
201 08:50:15.250798 Using /lava-668311 at stage 0
202 08:50:15.252098 uuid=668311_1.6.2.4.1 testdef=None
203 08:50:15.252459 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 08:50:15.252734 start: 1.6.2.4.2 test-overlay (timeout 00:09:30) [common]
205 08:50:15.254630 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 08:50:15.255450 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:30) [common]
208 08:50:15.257966 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 08:50:15.258841 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:30) [common]
211 08:50:15.261250 runner path: /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/0/tests/0_dmesg test_uuid 668311_1.6.2.4.1
212 08:50:15.261869 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 08:50:15.262653 Creating lava-test-runner.conf files
215 08:50:15.262857 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/668311/lava-overlay-v5lpcpkx/lava-668311/0 for stage 0
216 08:50:15.263213 - 0_dmesg
217 08:50:15.263572 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 08:50:15.263855 start: 1.6.2.5 compress-overlay (timeout 00:09:30) [common]
219 08:50:15.285989 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 08:50:15.286402 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:30) [common]
221 08:50:15.286663 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 08:50:15.286931 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 08:50:15.287195 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
224 08:50:15.912160 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 08:50:15.912634 start: 1.6.4 extract-modules (timeout 00:09:29) [common]
226 08:50:15.912882 extracting modules file /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/668311/extract-nfsrootfs-pv98b25x
227 08:50:17.647765 extracting modules file /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/668311/extract-overlay-ramdisk-b63z9r5n/ramdisk
228 08:50:19.420640 end: 1.6.4 extract-modules (duration 00:00:04) [common]
229 08:50:19.421121 start: 1.6.5 apply-overlay-tftp (timeout 00:09:26) [common]
230 08:50:19.421398 [common] Applying overlay to NFS
231 08:50:19.421609 [common] Applying overlay /var/lib/lava/dispatcher/tmp/668311/compress-overlay-fbx4h6nz/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/668311/extract-nfsrootfs-pv98b25x
232 08:50:19.451207 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 08:50:19.451612 start: 1.6.6 prepare-kernel (timeout 00:09:26) [common]
234 08:50:19.451884 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:26) [common]
235 08:50:19.452138 Converting downloaded kernel to a uImage
236 08:50:19.452446 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/kernel/Image /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/kernel/uImage
237 08:50:21.516840 output: Image Name:
238 08:50:21.517263 output: Created: Thu Aug 29 08:50:19 2024
239 08:50:21.517470 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 08:50:21.517673 output: Data Size: 169146880 Bytes = 165182.50 KiB = 161.31 MiB
241 08:50:21.517872 output: Load Address: 01080000
242 08:50:21.518067 output: Entry Point: 01080000
243 08:50:21.518261 output:
244 08:50:21.518589 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 08:50:21.518850 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 08:50:21.519115 start: 1.6.7 configure-preseed-file (timeout 00:09:23) [common]
247 08:50:21.519365 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 08:50:21.519620 start: 1.6.8 compress-ramdisk (timeout 00:09:23) [common]
249 08:50:21.519874 Building ramdisk /var/lib/lava/dispatcher/tmp/668311/extract-overlay-ramdisk-b63z9r5n/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/668311/extract-overlay-ramdisk-b63z9r5n/ramdisk
250 08:50:26.916644 >> 424364 blocks
251 08:50:45.507703 Adding RAMdisk u-boot header.
252 08:50:45.508249 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/668311/extract-overlay-ramdisk-b63z9r5n/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/668311/extract-overlay-ramdisk-b63z9r5n/ramdisk.cpio.gz.uboot
253 08:50:46.036956 output: Image Name:
254 08:50:46.037369 output: Created: Thu Aug 29 08:50:45 2024
255 08:50:46.037582 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 08:50:46.037792 output: Data Size: 50762338 Bytes = 49572.60 KiB = 48.41 MiB
257 08:50:46.038019 output: Load Address: 00000000
258 08:50:46.038220 output: Entry Point: 00000000
259 08:50:46.038431 output:
260 08:50:46.039027 rename /var/lib/lava/dispatcher/tmp/668311/extract-overlay-ramdisk-b63z9r5n/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/ramdisk/ramdisk.cpio.gz.uboot
261 08:50:46.039469 end: 1.6.8 compress-ramdisk (duration 00:00:25) [common]
262 08:50:46.039785 end: 1.6 prepare-tftp-overlay (duration 00:00:41) [common]
263 08:50:46.040219 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:59) [common]
264 08:50:46.040712 No LXC device requested
265 08:50:46.041217 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 08:50:46.041743 start: 1.8 deploy-device-env (timeout 00:08:59) [common]
267 08:50:46.042257 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 08:50:46.042667 Checking files for TFTP limit of 4294967296 bytes.
269 08:50:46.045420 end: 1 tftp-deploy (duration 00:01:01) [common]
270 08:50:46.046019 start: 2 uboot-action (timeout 00:05:00) [common]
271 08:50:46.046541 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 08:50:46.047035 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 08:50:46.047531 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 08:50:46.048076 Using kernel file from prepare-kernel: 668311/tftp-deploy-vuz2149r/kernel/uImage
275 08:50:46.048715 substitutions:
276 08:50:46.049123 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 08:50:46.049524 - {DTB_ADDR}: 0x01070000
278 08:50:46.049919 - {DTB}: 668311/tftp-deploy-vuz2149r/dtb/meson-g12b-a311d-libretech-cc.dtb
279 08:50:46.050312 - {INITRD}: 668311/tftp-deploy-vuz2149r/ramdisk/ramdisk.cpio.gz.uboot
280 08:50:46.050723 - {KERNEL_ADDR}: 0x01080000
281 08:50:46.051124 - {KERNEL}: 668311/tftp-deploy-vuz2149r/kernel/uImage
282 08:50:46.051514 - {LAVA_MAC}: None
283 08:50:46.051959 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/668311/extract-nfsrootfs-pv98b25x
284 08:50:46.052409 - {NFS_SERVER_IP}: 192.168.6.2
285 08:50:46.052824 - {PRESEED_CONFIG}: None
286 08:50:46.053219 - {PRESEED_LOCAL}: None
287 08:50:46.053605 - {RAMDISK_ADDR}: 0x08000000
288 08:50:46.054000 - {RAMDISK}: 668311/tftp-deploy-vuz2149r/ramdisk/ramdisk.cpio.gz.uboot
289 08:50:46.054392 - {ROOT_PART}: None
290 08:50:46.054780 - {ROOT}: None
291 08:50:46.055165 - {SERVER_IP}: 192.168.6.2
292 08:50:46.055564 - {TEE_ADDR}: 0x83000000
293 08:50:46.055957 - {TEE}: None
294 08:50:46.056376 Parsed boot commands:
295 08:50:46.056772 - setenv autoload no
296 08:50:46.057164 - setenv initrd_high 0xffffffff
297 08:50:46.057549 - setenv fdt_high 0xffffffff
298 08:50:46.057933 - dhcp
299 08:50:46.058322 - setenv serverip 192.168.6.2
300 08:50:46.058704 - tftpboot 0x01080000 668311/tftp-deploy-vuz2149r/kernel/uImage
301 08:50:46.059087 - tftpboot 0x08000000 668311/tftp-deploy-vuz2149r/ramdisk/ramdisk.cpio.gz.uboot
302 08:50:46.059477 - tftpboot 0x01070000 668311/tftp-deploy-vuz2149r/dtb/meson-g12b-a311d-libretech-cc.dtb
303 08:50:46.059862 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/668311/extract-nfsrootfs-pv98b25x,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 08:50:46.060316 - bootm 0x01080000 0x08000000 0x01070000
305 08:50:46.060833 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 08:50:46.062300 start: 2.3 connect-device (timeout 00:05:00) [common]
308 08:50:46.062713 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 08:50:46.077221 Setting prompt string to ['lava-test: # ']
310 08:50:46.078718 end: 2.3 connect-device (duration 00:00:00) [common]
311 08:50:46.079340 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 08:50:46.079906 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 08:50:46.080485 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 08:50:46.081628 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 08:50:46.118516 >> OK - accepted request
316 08:50:46.120663 Returned 0 in 0 seconds
317 08:50:46.221585 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 08:50:46.223248 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 08:50:46.223830 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 08:50:46.224409 Setting prompt string to ['Hit any key to stop autoboot']
322 08:50:46.224882 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 08:50:46.226478 Trying 192.168.56.21...
324 08:50:46.226960 Connected to conserv1.
325 08:50:46.227378 Escape character is '^]'.
326 08:50:46.227800
327 08:50:46.228317 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 08:50:46.228737
329 08:50:58.226589 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 08:50:58.227018 bl2_stage_init 0x01
331 08:50:58.227257 bl2_stage_init 0x81
332 08:50:58.232118 hw id: 0x0000 - pwm id 0x01
333 08:50:58.232424 bl2_stage_init 0xc1
334 08:50:58.232643 bl2_stage_init 0x02
335 08:50:58.232867
336 08:50:58.237672 L0:00000000
337 08:50:58.237975 L1:20000703
338 08:50:58.238205 L2:00008067
339 08:50:58.238427 L3:14000000
340 08:50:58.243373 B2:00402000
341 08:50:58.243653 B1:e0f83180
342 08:50:58.243867
343 08:50:58.244120 TE: 58167
344 08:50:58.244337
345 08:50:58.248903 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 08:50:58.249186
347 08:50:58.249404 Board ID = 1
348 08:50:58.254455 Set A53 clk to 24M
349 08:50:58.254737 Set A73 clk to 24M
350 08:50:58.254962 Set clk81 to 24M
351 08:50:58.260055 A53 clk: 1200 MHz
352 08:50:58.260349 A73 clk: 1200 MHz
353 08:50:58.260566 CLK81: 166.6M
354 08:50:58.260772 smccc: 00012abd
355 08:50:58.265638 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 08:50:58.271364 board id: 1
357 08:50:58.277119 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 08:50:58.287784 fw parse done
359 08:50:58.293745 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 08:50:58.336455 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 08:50:58.347402 PIEI prepare done
362 08:50:58.347722 fastboot data load
363 08:50:58.347941 fastboot data verify
364 08:50:58.352887 verify result: 266
365 08:50:58.358459 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 08:50:58.358732 LPDDR4 probe
367 08:50:58.358944 ddr clk to 1584MHz
368 08:50:58.366486 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 08:50:58.403793
370 08:50:58.404202 dmc_version 0001
371 08:50:58.410546 Check phy result
372 08:50:58.416284 INFO : End of CA training
373 08:50:58.416572 INFO : End of initialization
374 08:50:58.421966 INFO : Training has run successfully!
375 08:50:58.422271 Check phy result
376 08:50:58.427473 INFO : End of initialization
377 08:50:58.427754 INFO : End of read enable training
378 08:50:58.433101 INFO : End of fine write leveling
379 08:50:58.438689 INFO : End of Write leveling coarse delay
380 08:50:58.438986 INFO : Training has run successfully!
381 08:50:58.439207 Check phy result
382 08:50:58.444441 INFO : End of initialization
383 08:50:58.444733 INFO : End of read dq deskew training
384 08:50:58.449859 INFO : End of MPR read delay center optimization
385 08:50:58.455451 INFO : End of write delay center optimization
386 08:50:58.461101 INFO : End of read delay center optimization
387 08:50:58.461404 INFO : End of max read latency training
388 08:50:58.466686 INFO : Training has run successfully!
389 08:50:58.466983 1D training succeed
390 08:50:58.474948 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 08:50:58.522685 Check phy result
392 08:50:58.523072 INFO : End of initialization
393 08:50:58.544243 INFO : End of 2D read delay Voltage center optimization
394 08:50:58.564374 INFO : End of 2D read delay Voltage center optimization
395 08:50:58.616207 INFO : End of 2D write delay Voltage center optimization
396 08:50:58.666419 INFO : End of 2D write delay Voltage center optimization
397 08:50:58.671954 INFO : Training has run successfully!
398 08:50:58.672283
399 08:50:58.672502 channel==0
400 08:50:58.677586 RxClkDly_Margin_A0==88 ps 9
401 08:50:58.677894 TxDqDly_Margin_A0==98 ps 10
402 08:50:58.683134 RxClkDly_Margin_A1==88 ps 9
403 08:50:58.683471 TxDqDly_Margin_A1==88 ps 9
404 08:50:58.683714 TrainedVREFDQ_A0==74
405 08:50:58.688744 TrainedVREFDQ_A1==74
406 08:50:58.689049 VrefDac_Margin_A0==25
407 08:50:58.689264 DeviceVref_Margin_A0==40
408 08:50:58.694372 VrefDac_Margin_A1==25
409 08:50:58.694686 DeviceVref_Margin_A1==40
410 08:50:58.694903
411 08:50:58.695113
412 08:50:58.695319 channel==1
413 08:50:58.699921 RxClkDly_Margin_A0==98 ps 10
414 08:50:58.700231 TxDqDly_Margin_A0==98 ps 10
415 08:50:58.705580 RxClkDly_Margin_A1==98 ps 10
416 08:50:58.705884 TxDqDly_Margin_A1==88 ps 9
417 08:50:58.711137 TrainedVREFDQ_A0==77
418 08:50:58.711432 TrainedVREFDQ_A1==77
419 08:50:58.711646 VrefDac_Margin_A0==22
420 08:50:58.716752 DeviceVref_Margin_A0==37
421 08:50:58.717042 VrefDac_Margin_A1==24
422 08:50:58.722340 DeviceVref_Margin_A1==37
423 08:50:58.722644
424 08:50:58.722849 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 08:50:58.723051
426 08:50:58.755958 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 08:50:58.756416 2D training succeed
428 08:50:58.761531 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 08:50:58.767142 auto size-- 65535DDR cs0 size: 2048MB
430 08:50:58.767438 DDR cs1 size: 2048MB
431 08:50:58.772728 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 08:50:58.773021 cs0 DataBus test pass
433 08:50:58.778331 cs1 DataBus test pass
434 08:50:58.778625 cs0 AddrBus test pass
435 08:50:58.778836 cs1 AddrBus test pass
436 08:50:58.779040
437 08:50:58.784076 100bdlr_step_size ps== 420
438 08:50:58.784627 result report
439 08:50:58.789572 boot times 0Enable ddr reg access
440 08:50:58.794885 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 08:50:58.808378 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 08:50:59.380396 0.0;M3 CHK:0;cm4_sp_mode 0
443 08:50:59.380816 MVN_1=0x00000000
444 08:50:59.385914 MVN_2=0x00000000
445 08:50:59.391651 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 08:50:59.391974 OPS=0x10
447 08:50:59.392246 ring efuse init
448 08:50:59.392456 chipver efuse init
449 08:50:59.397290 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 08:50:59.402851 [0.018960 Inits done]
451 08:50:59.403166 secure task start!
452 08:50:59.403388 high task start!
453 08:50:59.407441 low task start!
454 08:50:59.407760 run into bl31
455 08:50:59.414092 NOTICE: BL31: v1.3(release):4fc40b1
456 08:50:59.421871 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 08:50:59.422215 NOTICE: BL31: G12A normal boot!
458 08:50:59.447176 NOTICE: BL31: BL33 decompress pass
459 08:50:59.452834 ERROR: Error initializing runtime service opteed_fast
460 08:51:00.685640
461 08:51:00.686048
462 08:51:00.694130 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 08:51:00.694453
464 08:51:00.694676 Model: Libre Computer AML-A311D-CC Alta
465 08:51:00.902543 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 08:51:00.925913 DRAM: 2 GiB (effective 3.8 GiB)
467 08:51:01.068963 Core: 408 devices, 31 uclasses, devicetree: separate
468 08:51:01.074838 WDT: Not starting watchdog@f0d0
469 08:51:01.107029 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 08:51:01.119440 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 08:51:01.124434 ** Bad device specification mmc 0 **
472 08:51:01.134831 Card did not respond to voltage select! : -110
473 08:51:01.142433 ** Bad device specification mmc 0 **
474 08:51:01.142730 Couldn't find partition mmc 0
475 08:51:01.150873 Card did not respond to voltage select! : -110
476 08:51:01.156295 ** Bad device specification mmc 0 **
477 08:51:01.156585 Couldn't find partition mmc 0
478 08:51:01.161365 Error: could not access storage.
479 08:51:02.427329 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 08:51:02.427722 bl2_stage_init 0x01
481 08:51:02.427931 bl2_stage_init 0x81
482 08:51:02.432980 hw id: 0x0000 - pwm id 0x01
483 08:51:02.433263 bl2_stage_init 0xc1
484 08:51:02.433470 bl2_stage_init 0x02
485 08:51:02.433668
486 08:51:02.438316 L0:00000000
487 08:51:02.438694 L1:20000703
488 08:51:02.439013 L2:00008067
489 08:51:02.439314 L3:14000000
490 08:51:02.443829 B2:00402000
491 08:51:02.444217 B1:e0f83180
492 08:51:02.444527
493 08:51:02.444831 TE: 58124
494 08:51:02.445058
495 08:51:02.449550 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 08:51:02.449844
497 08:51:02.450057 Board ID = 1
498 08:51:02.455158 Set A53 clk to 24M
499 08:51:02.455440 Set A73 clk to 24M
500 08:51:02.455651 Set clk81 to 24M
501 08:51:02.460802 A53 clk: 1200 MHz
502 08:51:02.461195 A73 clk: 1200 MHz
503 08:51:02.461522 CLK81: 166.6M
504 08:51:02.461844 smccc: 00012a92
505 08:51:02.466414 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 08:51:02.471933 board id: 1
507 08:51:02.477825 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 08:51:02.488621 fw parse done
509 08:51:02.494392 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 08:51:02.536951 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 08:51:02.547831 PIEI prepare done
512 08:51:02.548159 fastboot data load
513 08:51:02.548377 fastboot data verify
514 08:51:02.553424 verify result: 266
515 08:51:02.559027 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 08:51:02.559429 LPDDR4 probe
517 08:51:02.559742 ddr clk to 1584MHz
518 08:51:02.567116 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 08:51:02.604285
520 08:51:02.604606 dmc_version 0001
521 08:51:02.610925 Check phy result
522 08:51:02.616796 INFO : End of CA training
523 08:51:02.617193 INFO : End of initialization
524 08:51:02.622449 INFO : Training has run successfully!
525 08:51:02.622733 Check phy result
526 08:51:02.628111 INFO : End of initialization
527 08:51:02.628562 INFO : End of read enable training
528 08:51:02.633603 INFO : End of fine write leveling
529 08:51:02.639116 INFO : End of Write leveling coarse delay
530 08:51:02.639411 INFO : Training has run successfully!
531 08:51:02.639639 Check phy result
532 08:51:02.644719 INFO : End of initialization
533 08:51:02.645147 INFO : End of read dq deskew training
534 08:51:02.650346 INFO : End of MPR read delay center optimization
535 08:51:02.655958 INFO : End of write delay center optimization
536 08:51:02.661595 INFO : End of read delay center optimization
537 08:51:02.661898 INFO : End of max read latency training
538 08:51:02.667131 INFO : Training has run successfully!
539 08:51:02.667430 1D training succeed
540 08:51:02.675410 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 08:51:02.722969 Check phy result
542 08:51:02.723321 INFO : End of initialization
543 08:51:02.744807 INFO : End of 2D read delay Voltage center optimization
544 08:51:02.764929 INFO : End of 2D read delay Voltage center optimization
545 08:51:02.817047 INFO : End of 2D write delay Voltage center optimization
546 08:51:02.867292 INFO : End of 2D write delay Voltage center optimization
547 08:51:02.872838 INFO : Training has run successfully!
548 08:51:02.873163
549 08:51:02.873397 channel==0
550 08:51:02.878440 RxClkDly_Margin_A0==88 ps 9
551 08:51:02.878886 TxDqDly_Margin_A0==98 ps 10
552 08:51:02.884046 RxClkDly_Margin_A1==88 ps 9
553 08:51:02.884490 TxDqDly_Margin_A1==98 ps 10
554 08:51:02.884868 TrainedVREFDQ_A0==74
555 08:51:02.889641 TrainedVREFDQ_A1==74
556 08:51:02.889953 VrefDac_Margin_A0==25
557 08:51:02.890179 DeviceVref_Margin_A0==40
558 08:51:02.895245 VrefDac_Margin_A1==25
559 08:51:02.895676 DeviceVref_Margin_A1==40
560 08:51:02.896079
561 08:51:02.896459
562 08:51:02.900848 channel==1
563 08:51:02.901154 RxClkDly_Margin_A0==98 ps 10
564 08:51:02.901382 TxDqDly_Margin_A0==98 ps 10
565 08:51:02.906415 RxClkDly_Margin_A1==88 ps 9
566 08:51:02.906845 TxDqDly_Margin_A1==88 ps 9
567 08:51:02.912081 TrainedVREFDQ_A0==77
568 08:51:02.912511 TrainedVREFDQ_A1==77
569 08:51:02.912890 VrefDac_Margin_A0==22
570 08:51:02.917674 DeviceVref_Margin_A0==37
571 08:51:02.917980 VrefDac_Margin_A1==24
572 08:51:02.923263 DeviceVref_Margin_A1==37
573 08:51:02.923683
574 08:51:02.924079 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 08:51:02.924457
576 08:51:02.956846 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
577 08:51:02.957197 2D training succeed
578 08:51:02.962429 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 08:51:02.968042 auto size-- 65535DDR cs0 size: 2048MB
580 08:51:02.968476 DDR cs1 size: 2048MB
581 08:51:02.973667 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 08:51:02.973970 cs0 DataBus test pass
583 08:51:02.979238 cs1 DataBus test pass
584 08:51:02.979687 cs0 AddrBus test pass
585 08:51:02.980096 cs1 AddrBus test pass
586 08:51:02.980368
587 08:51:02.984838 100bdlr_step_size ps== 420
588 08:51:02.985149 result report
589 08:51:02.990461 boot times 0Enable ddr reg access
590 08:51:02.995771 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 08:51:03.009265 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 08:51:03.583066 0.0;M3 CHK:0;cm4_sp_mode 0
593 08:51:03.583481 MVN_1=0x00000000
594 08:51:03.588487 MVN_2=0x00000000
595 08:51:03.594247 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 08:51:03.594541 OPS=0x10
597 08:51:03.594776 ring efuse init
598 08:51:03.594990 chipver efuse init
599 08:51:03.599849 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 08:51:03.605424 [0.018961 Inits done]
601 08:51:03.605705 secure task start!
602 08:51:03.605926 high task start!
603 08:51:03.610018 low task start!
604 08:51:03.610285 run into bl31
605 08:51:03.616631 NOTICE: BL31: v1.3(release):4fc40b1
606 08:51:03.623669 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 08:51:03.624018 NOTICE: BL31: G12A normal boot!
608 08:51:03.649806 NOTICE: BL31: BL33 decompress pass
609 08:51:03.655482 ERROR: Error initializing runtime service opteed_fast
610 08:51:04.888477
611 08:51:04.888896
612 08:51:04.896781 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 08:51:04.897076
614 08:51:04.897300 Model: Libre Computer AML-A311D-CC Alta
615 08:51:05.105250 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 08:51:05.128579 DRAM: 2 GiB (effective 3.8 GiB)
617 08:51:05.271625 Core: 408 devices, 31 uclasses, devicetree: separate
618 08:51:05.277511 WDT: Not starting watchdog@f0d0
619 08:51:05.309722 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 08:51:05.322142 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 08:51:05.327104 ** Bad device specification mmc 0 **
622 08:51:05.337477 Card did not respond to voltage select! : -110
623 08:51:05.345170 ** Bad device specification mmc 0 **
624 08:51:05.345474 Couldn't find partition mmc 0
625 08:51:05.353505 Card did not respond to voltage select! : -110
626 08:51:05.359072 ** Bad device specification mmc 0 **
627 08:51:05.359394 Couldn't find partition mmc 0
628 08:51:05.364130 Error: could not access storage.
629 08:51:05.705721 Net: eth0: ethernet@ff3f0000
630 08:51:05.706334 starting USB...
631 08:51:05.958344 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 08:51:05.958934 Starting the controller
633 08:51:05.964390 USB XHCI 1.10
634 08:51:07.676024 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 08:51:07.676684 bl2_stage_init 0x01
636 08:51:07.677155 bl2_stage_init 0x81
637 08:51:07.681268 hw id: 0x0000 - pwm id 0x01
638 08:51:07.681779 bl2_stage_init 0xc1
639 08:51:07.682232 bl2_stage_init 0x02
640 08:51:07.682681
641 08:51:07.686937 L0:00000000
642 08:51:07.687437 L1:20000703
643 08:51:07.687918 L2:00008067
644 08:51:07.688454 L3:14000000
645 08:51:07.689953 B2:00402000
646 08:51:07.690479 B1:e0f83180
647 08:51:07.690975
648 08:51:07.691463 TE: 58124
649 08:51:07.691956
650 08:51:07.701142 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 08:51:07.701683
652 08:51:07.702143 Board ID = 1
653 08:51:07.702586 Set A53 clk to 24M
654 08:51:07.703024 Set A73 clk to 24M
655 08:51:07.706639 Set clk81 to 24M
656 08:51:07.707188 A53 clk: 1200 MHz
657 08:51:07.707659 A73 clk: 1200 MHz
658 08:51:07.712299 CLK81: 166.6M
659 08:51:07.712794 smccc: 00012a91
660 08:51:07.717858 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 08:51:07.718351 board id: 1
662 08:51:07.726531 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 08:51:07.737109 fw parse done
664 08:51:07.743241 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 08:51:07.785617 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 08:51:07.796453 PIEI prepare done
667 08:51:07.796961 fastboot data load
668 08:51:07.797415 fastboot data verify
669 08:51:07.802979 verify result: 266
670 08:51:07.807905 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 08:51:07.808770 LPDDR4 probe
672 08:51:07.808986 ddr clk to 1584MHz
673 08:51:07.815750 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 08:51:07.852888
675 08:51:07.853186 dmc_version 0001
676 08:51:07.859669 Check phy result
677 08:51:07.865461 INFO : End of CA training
678 08:51:07.865969 INFO : End of initialization
679 08:51:07.871093 INFO : Training has run successfully!
680 08:51:07.871602 Check phy result
681 08:51:07.876632 INFO : End of initialization
682 08:51:07.877131 INFO : End of read enable training
683 08:51:07.882216 INFO : End of fine write leveling
684 08:51:07.887802 INFO : End of Write leveling coarse delay
685 08:51:07.888324 INFO : Training has run successfully!
686 08:51:07.888749 Check phy result
687 08:51:07.893375 INFO : End of initialization
688 08:51:07.893822 INFO : End of read dq deskew training
689 08:51:07.898948 INFO : End of MPR read delay center optimization
690 08:51:07.904757 INFO : End of write delay center optimization
691 08:51:07.910166 INFO : End of read delay center optimization
692 08:51:07.910606 INFO : End of max read latency training
693 08:51:07.915786 INFO : Training has run successfully!
694 08:51:07.916318 1D training succeed
695 08:51:07.924964 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 08:51:07.971730 Check phy result
697 08:51:07.972255 INFO : End of initialization
698 08:51:07.994424 INFO : End of 2D read delay Voltage center optimization
699 08:51:08.014656 INFO : End of 2D read delay Voltage center optimization
700 08:51:08.066710 INFO : End of 2D write delay Voltage center optimization
701 08:51:08.115970 INFO : End of 2D write delay Voltage center optimization
702 08:51:08.121505 INFO : Training has run successfully!
703 08:51:08.121843
704 08:51:08.122121 channel==0
705 08:51:08.127116 RxClkDly_Margin_A0==88 ps 9
706 08:51:08.127459 TxDqDly_Margin_A0==98 ps 10
707 08:51:08.130423 RxClkDly_Margin_A1==88 ps 9
708 08:51:08.130752 TxDqDly_Margin_A1==98 ps 10
709 08:51:08.135934 TrainedVREFDQ_A0==74
710 08:51:08.136290 TrainedVREFDQ_A1==74
711 08:51:08.141531 VrefDac_Margin_A0==25
712 08:51:08.141855 DeviceVref_Margin_A0==40
713 08:51:08.142127 VrefDac_Margin_A1==25
714 08:51:08.147127 DeviceVref_Margin_A1==40
715 08:51:08.147445
716 08:51:08.147723
717 08:51:08.148039 channel==1
718 08:51:08.148314 RxClkDly_Margin_A0==98 ps 10
719 08:51:08.152773 TxDqDly_Margin_A0==88 ps 9
720 08:51:08.153101 RxClkDly_Margin_A1==98 ps 10
721 08:51:08.158374 TxDqDly_Margin_A1==88 ps 9
722 08:51:08.158704 TrainedVREFDQ_A0==76
723 08:51:08.159168 TrainedVREFDQ_A1==77
724 08:51:08.164074 VrefDac_Margin_A0==22
725 08:51:08.164636 DeviceVref_Margin_A0==38
726 08:51:08.169690 VrefDac_Margin_A1==22
727 08:51:08.170274 DeviceVref_Margin_A1==37
728 08:51:08.170799
729 08:51:08.175311 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 08:51:08.175877
731 08:51:08.203219 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
732 08:51:08.208888 2D training succeed
733 08:51:08.214600 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 08:51:08.215184 auto size-- 65535DDR cs0 size: 2048MB
735 08:51:08.220085 DDR cs1 size: 2048MB
736 08:51:08.220642 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 08:51:08.225671 cs0 DataBus test pass
738 08:51:08.226221 cs1 DataBus test pass
739 08:51:08.226688 cs0 AddrBus test pass
740 08:51:08.231294 cs1 AddrBus test pass
741 08:51:08.231844
742 08:51:08.232357 100bdlr_step_size ps== 420
743 08:51:08.232825 result report
744 08:51:08.236937 boot times 0Enable ddr reg access
745 08:51:08.244621 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 08:51:08.258103 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 08:51:08.831668 0.0;M3 CHK:0;cm4_sp_mode 0
748 08:51:08.832368 MVN_1=0x00000000
749 08:51:08.837184 MVN_2=0x00000000
750 08:51:08.843004 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 08:51:08.843580 OPS=0x10
752 08:51:08.844062 ring efuse init
753 08:51:08.844505 chipver efuse init
754 08:51:08.848551 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 08:51:08.854121 [0.018961 Inits done]
756 08:51:08.854623 secure task start!
757 08:51:08.855059 high task start!
758 08:51:08.858835 low task start!
759 08:51:08.859319 run into bl31
760 08:51:08.865392 NOTICE: BL31: v1.3(release):4fc40b1
761 08:51:08.873170 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 08:51:08.873674 NOTICE: BL31: G12A normal boot!
763 08:51:08.898559 NOTICE: BL31: BL33 decompress pass
764 08:51:08.904243 ERROR: Error initializing runtime service opteed_fast
765 08:51:10.137093
766 08:51:10.137509
767 08:51:10.145438 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 08:51:10.145762
769 08:51:10.146017 Model: Libre Computer AML-A311D-CC Alta
770 08:51:10.353893 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 08:51:10.377314 DRAM: 2 GiB (effective 3.8 GiB)
772 08:51:10.520371 Core: 408 devices, 31 uclasses, devicetree: separate
773 08:51:10.526177 WDT: Not starting watchdog@f0d0
774 08:51:10.558483 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 08:51:10.570901 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 08:51:10.575867 ** Bad device specification mmc 0 **
777 08:51:10.586160 Card did not respond to voltage select! : -110
778 08:51:10.593841 ** Bad device specification mmc 0 **
779 08:51:10.594166 Couldn't find partition mmc 0
780 08:51:10.602180 Card did not respond to voltage select! : -110
781 08:51:10.607714 ** Bad device specification mmc 0 **
782 08:51:10.608053 Couldn't find partition mmc 0
783 08:51:10.612820 Error: could not access storage.
784 08:51:10.955492 Net: eth0: ethernet@ff3f0000
785 08:51:10.956225 starting USB...
786 08:51:11.207184 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 08:51:11.207872 Starting the controller
788 08:51:11.214055 USB XHCI 1.10
789 08:51:13.376366 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 08:51:13.377153 bl2_stage_init 0x01
791 08:51:13.377860 bl2_stage_init 0x81
792 08:51:13.381608 hw id: 0x0000 - pwm id 0x01
793 08:51:13.382123 bl2_stage_init 0xc1
794 08:51:13.382557 bl2_stage_init 0x02
795 08:51:13.382979
796 08:51:13.387223 L0:00000000
797 08:51:13.387703 L1:20000703
798 08:51:13.388174 L2:00008067
799 08:51:13.388607 L3:14000000
800 08:51:13.392775 B2:00402000
801 08:51:13.393249 B1:e0f83180
802 08:51:13.393673
803 08:51:13.394098 TE: 58159
804 08:51:13.394518
805 08:51:13.398489 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 08:51:13.398971
807 08:51:13.399395 Board ID = 1
808 08:51:13.404011 Set A53 clk to 24M
809 08:51:13.404504 Set A73 clk to 24M
810 08:51:13.404925 Set clk81 to 24M
811 08:51:13.409565 A53 clk: 1200 MHz
812 08:51:13.410043 A73 clk: 1200 MHz
813 08:51:13.410463 CLK81: 166.6M
814 08:51:13.410875 smccc: 00012ab5
815 08:51:13.415458 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 08:51:13.421184 board id: 1
817 08:51:13.426080 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 08:51:13.437217 fw parse done
819 08:51:13.443343 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 08:51:13.485982 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 08:51:13.496709 PIEI prepare done
822 08:51:13.497201 fastboot data load
823 08:51:13.497632 fastboot data verify
824 08:51:13.502593 verify result: 266
825 08:51:13.508179 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 08:51:13.508927 LPDDR4 probe
827 08:51:13.509549 ddr clk to 1584MHz
828 08:51:13.516205 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 08:51:13.553393
830 08:51:13.554210 dmc_version 0001
831 08:51:13.559961 Check phy result
832 08:51:13.565845 INFO : End of CA training
833 08:51:13.566618 INFO : End of initialization
834 08:51:13.571429 INFO : Training has run successfully!
835 08:51:13.572136 Check phy result
836 08:51:13.577009 INFO : End of initialization
837 08:51:13.577635 INFO : End of read enable training
838 08:51:13.582693 INFO : End of fine write leveling
839 08:51:13.588248 INFO : End of Write leveling coarse delay
840 08:51:13.588839 INFO : Training has run successfully!
841 08:51:13.589512 Check phy result
842 08:51:13.593822 INFO : End of initialization
843 08:51:13.594543 INFO : End of read dq deskew training
844 08:51:13.599373 INFO : End of MPR read delay center optimization
845 08:51:13.604968 INFO : End of write delay center optimization
846 08:51:13.610563 INFO : End of read delay center optimization
847 08:51:13.611226 INFO : End of max read latency training
848 08:51:13.616180 INFO : Training has run successfully!
849 08:51:13.616877 1D training succeed
850 08:51:13.625388 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 08:51:13.673034 Check phy result
852 08:51:13.673604 INFO : End of initialization
853 08:51:13.695712 INFO : End of 2D read delay Voltage center optimization
854 08:51:13.715809 INFO : End of 2D read delay Voltage center optimization
855 08:51:13.768123 INFO : End of 2D write delay Voltage center optimization
856 08:51:13.817332 INFO : End of 2D write delay Voltage center optimization
857 08:51:13.822744 INFO : Training has run successfully!
858 08:51:13.823218
859 08:51:13.823626 channel==0
860 08:51:13.828337 RxClkDly_Margin_A0==88 ps 9
861 08:51:13.828851 TxDqDly_Margin_A0==98 ps 10
862 08:51:13.833995 RxClkDly_Margin_A1==88 ps 9
863 08:51:13.834496 TxDqDly_Margin_A1==98 ps 10
864 08:51:13.834963 TrainedVREFDQ_A0==74
865 08:51:13.839570 TrainedVREFDQ_A1==75
866 08:51:13.840049 VrefDac_Margin_A0==24
867 08:51:13.840447 DeviceVref_Margin_A0==40
868 08:51:13.845169 VrefDac_Margin_A1==24
869 08:51:13.845616 DeviceVref_Margin_A1==39
870 08:51:13.846004
871 08:51:13.846459
872 08:51:13.850781 channel==1
873 08:51:13.851319 RxClkDly_Margin_A0==98 ps 10
874 08:51:13.851811 TxDqDly_Margin_A0==98 ps 10
875 08:51:13.856389 RxClkDly_Margin_A1==88 ps 9
876 08:51:13.856886 TxDqDly_Margin_A1==88 ps 9
877 08:51:13.862030 TrainedVREFDQ_A0==77
878 08:51:13.862535 TrainedVREFDQ_A1==77
879 08:51:13.863024 VrefDac_Margin_A0==22
880 08:51:13.867529 DeviceVref_Margin_A0==37
881 08:51:13.868053 VrefDac_Margin_A1==24
882 08:51:13.873149 DeviceVref_Margin_A1==37
883 08:51:13.873649
884 08:51:13.874052 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 08:51:13.874605
886 08:51:13.906846 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000017 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
887 08:51:13.907462 2D training succeed
888 08:51:13.912341 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 08:51:13.917984 auto size-- 65535DDR cs0 size: 2048MB
890 08:51:13.918447 DDR cs1 size: 2048MB
891 08:51:13.923595 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 08:51:13.924133 cs0 DataBus test pass
893 08:51:13.929141 cs1 DataBus test pass
894 08:51:13.929688 cs0 AddrBus test pass
895 08:51:13.930086 cs1 AddrBus test pass
896 08:51:13.930530
897 08:51:13.934748 100bdlr_step_size ps== 420
898 08:51:13.935192 result report
899 08:51:13.940350 boot times 0Enable ddr reg access
900 08:51:13.945793 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 08:51:13.958223 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 08:51:14.532828 0.0;M3 CHK:0;cm4_sp_mode 0
903 08:51:14.533517 MVN_1=0x00000000
904 08:51:14.538334 MVN_2=0x00000000
905 08:51:14.544072 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 08:51:14.544582 OPS=0x10
907 08:51:14.544995 ring efuse init
908 08:51:14.545390 chipver efuse init
909 08:51:14.549749 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 08:51:14.555358 [0.018961 Inits done]
911 08:51:14.555860 secure task start!
912 08:51:14.556349 high task start!
913 08:51:14.559904 low task start!
914 08:51:14.560411 run into bl31
915 08:51:14.566595 NOTICE: BL31: v1.3(release):4fc40b1
916 08:51:14.573349 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 08:51:14.573899 NOTICE: BL31: G12A normal boot!
918 08:51:14.599793 NOTICE: BL31: BL33 decompress pass
919 08:51:14.605457 ERROR: Error initializing runtime service opteed_fast
920 08:51:15.838213
921 08:51:15.838813
922 08:51:15.846535 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 08:51:15.847004
924 08:51:15.847414 Model: Libre Computer AML-A311D-CC Alta
925 08:51:16.055292 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 08:51:16.078646 DRAM: 2 GiB (effective 3.8 GiB)
927 08:51:16.221597 Core: 408 devices, 31 uclasses, devicetree: separate
928 08:51:16.227417 WDT: Not starting watchdog@f0d0
929 08:51:16.259746 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 08:51:16.272114 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 08:51:16.277141 ** Bad device specification mmc 0 **
932 08:51:16.287448 Card did not respond to voltage select! : -110
933 08:51:16.295033 ** Bad device specification mmc 0 **
934 08:51:16.295555 Couldn't find partition mmc 0
935 08:51:16.303418 Card did not respond to voltage select! : -110
936 08:51:16.308901 ** Bad device specification mmc 0 **
937 08:51:16.309354 Couldn't find partition mmc 0
938 08:51:16.313994 Error: could not access storage.
939 08:51:16.656562 Net: eth0: ethernet@ff3f0000
940 08:51:16.657166 starting USB...
941 08:51:16.908373 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 08:51:16.908928 Starting the controller
943 08:51:16.915202 USB XHCI 1.10
944 08:51:18.469393 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 08:51:18.477614 scanning usb for storage devices... 0 Storage Device(s) found
947 08:51:18.529108 Hit any key to stop autoboot: 1
948 08:51:18.529968 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 08:51:18.530540 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 08:51:18.530999 Setting prompt string to ['=>']
951 08:51:18.531472 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 08:51:18.545049 0
953 08:51:18.545899 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 08:51:18.546386 Sending with 10 millisecond of delay
956 08:51:19.684072 => setenv autoload no
957 08:51:19.694743 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
958 08:51:19.697395 setenv autoload no
959 08:51:19.697872 Sending with 10 millisecond of delay
961 08:51:21.494419 => setenv initrd_high 0xffffffff
962 08:51:21.505208 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 08:51:21.506004 setenv initrd_high 0xffffffff
964 08:51:21.506699 Sending with 10 millisecond of delay
966 08:51:23.125301 => setenv fdt_high 0xffffffff
967 08:51:23.136156 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 08:51:23.137103 setenv fdt_high 0xffffffff
969 08:51:23.137808 Sending with 10 millisecond of delay
971 08:51:23.430219 => dhcp
972 08:51:23.440804 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 08:51:23.441826 dhcp
974 08:51:23.442329 Speed: 1000, full duplex
975 08:51:23.442579 BOOTP broadcast 1
976 08:51:23.688903 BOOTP broadcast 2
977 08:51:24.189920 BOOTP broadcast 3
978 08:51:24.202657 DHCP client bound to address 192.168.6.33 (761 ms)
979 08:51:24.203613 Sending with 10 millisecond of delay
981 08:51:25.881271 => setenv serverip 192.168.6.2
982 08:51:25.892287 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
983 08:51:25.893421 setenv serverip 192.168.6.2
984 08:51:25.894333 Sending with 10 millisecond of delay
986 08:51:29.620535 => tftpboot 0x01080000 668311/tftp-deploy-vuz2149r/kernel/uImage
987 08:51:29.631307 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
988 08:51:29.632149 tftpboot 0x01080000 668311/tftp-deploy-vuz2149r/kernel/uImage
989 08:51:29.632594 Speed: 1000, full duplex
990 08:51:29.632996 Using ethernet@ff3f0000 device
991 08:51:29.633709 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
992 08:51:29.639414 Filename '668311/tftp-deploy-vuz2149r/kernel/uImage'.
993 08:51:29.643262 Load address: 0x1080000
994 08:51:33.805016 Loading: *###################
995 08:51:33.805694 TFTP error: trying to overwrite reserved memory...
997 08:51:33.807225 end: 2.4.3 bootloader-commands (duration 00:00:15) [common]
1000 08:51:33.809444 end: 2.4 uboot-commands (duration 00:00:48) [common]
1002 08:51:33.811063 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
1004 08:51:33.812270 end: 2 uboot-action (duration 00:00:48) [common]
1006 08:51:33.813926 Cleaning after the job
1007 08:51:33.814520 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/ramdisk
1008 08:51:33.846198 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/kernel
1009 08:51:33.898657 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/dtb
1010 08:51:33.899619 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/nfsrootfs
1011 08:51:34.052101 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/668311/tftp-deploy-vuz2149r/modules
1012 08:51:34.108868 start: 4.1 power-off (timeout 00:00:30) [common]
1013 08:51:34.109566 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1014 08:51:34.146629 >> OK - accepted request
1015 08:51:34.148857 Returned 0 in 0 seconds
1016 08:51:34.249628 end: 4.1 power-off (duration 00:00:00) [common]
1018 08:51:34.250597 start: 4.2 read-feedback (timeout 00:10:00) [common]
1019 08:51:34.251239 Listened to connection for namespace 'common' for up to 1s
1020 08:51:35.252166 Finalising connection for namespace 'common'
1021 08:51:35.252680 Disconnecting from shell: Finalise
1022 08:51:35.252997 =>
1023 08:51:35.353691 end: 4.2 read-feedback (duration 00:00:01) [common]
1024 08:51:35.354162 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/668311
1025 08:51:37.339798 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/668311
1026 08:51:37.340418 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.