Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:14:14.841719 lava-dispatcher, installed at version: 2024.01
2 08:14:14.842497 start: 0 validate
3 08:14:14.842957 Start time: 2024-08-30 08:14:14.842926+00:00 (UTC)
4 08:14:14.843485 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:14:14.844037 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 08:14:14.878349 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:14:14.878949 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240830%2Farm64%2Fdefconfig%2BCONFIG_RANDOMIZE_BASE%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 08:14:14.909937 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:14:14.910579 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240830%2Farm64%2Fdefconfig%2BCONFIG_RANDOMIZE_BASE%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 08:14:14.942119 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:14:14.942595 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 08:14:14.978789 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 08:14:14.979301 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240830%2Farm64%2Fdefconfig%2BCONFIG_RANDOMIZE_BASE%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
14 08:14:15.014361 validate duration: 0.17
16 08:14:15.015206 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 08:14:15.015529 start: 1.1 download-retry (timeout 00:10:00) [common]
18 08:14:15.015824 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 08:14:15.016447 Not decompressing ramdisk as can be used compressed.
20 08:14:15.016913 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 08:14:15.017189 saving as /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/ramdisk/initrd.cpio.gz
22 08:14:15.017467 total size: 5628182 (5 MB)
23 08:14:15.055764 progress 0 % (0 MB)
24 08:14:15.060052 progress 5 % (0 MB)
25 08:14:15.064302 progress 10 % (0 MB)
26 08:14:15.068131 progress 15 % (0 MB)
27 08:14:15.072224 progress 20 % (1 MB)
28 08:14:15.075943 progress 25 % (1 MB)
29 08:14:15.080028 progress 30 % (1 MB)
30 08:14:15.084128 progress 35 % (1 MB)
31 08:14:15.087748 progress 40 % (2 MB)
32 08:14:15.091785 progress 45 % (2 MB)
33 08:14:15.095453 progress 50 % (2 MB)
34 08:14:15.099482 progress 55 % (2 MB)
35 08:14:15.103459 progress 60 % (3 MB)
36 08:14:15.107073 progress 65 % (3 MB)
37 08:14:15.111095 progress 70 % (3 MB)
38 08:14:15.114676 progress 75 % (4 MB)
39 08:14:15.118624 progress 80 % (4 MB)
40 08:14:15.122201 progress 85 % (4 MB)
41 08:14:15.126185 progress 90 % (4 MB)
42 08:14:15.129983 progress 95 % (5 MB)
43 08:14:15.133318 progress 100 % (5 MB)
44 08:14:15.133963 5 MB downloaded in 0.12 s (46.08 MB/s)
45 08:14:15.134515 end: 1.1.1 http-download (duration 00:00:00) [common]
47 08:14:15.135408 end: 1.1 download-retry (duration 00:00:00) [common]
48 08:14:15.135704 start: 1.2 download-retry (timeout 00:10:00) [common]
49 08:14:15.135977 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 08:14:15.136480 downloading http://storage.kernelci.org/next/master/next-20240830/arm64/defconfig+CONFIG_RANDOMIZE_BASE=y/gcc-12/kernel/Image
51 08:14:15.136729 saving as /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/kernel/Image
52 08:14:15.136940 total size: 45603328 (43 MB)
53 08:14:15.137150 No compression specified
54 08:14:15.172216 progress 0 % (0 MB)
55 08:14:15.200598 progress 5 % (2 MB)
56 08:14:15.227957 progress 10 % (4 MB)
57 08:14:15.255024 progress 15 % (6 MB)
58 08:14:15.282751 progress 20 % (8 MB)
59 08:14:15.310013 progress 25 % (10 MB)
60 08:14:15.337889 progress 30 % (13 MB)
61 08:14:15.365408 progress 35 % (15 MB)
62 08:14:15.392596 progress 40 % (17 MB)
63 08:14:15.420353 progress 45 % (19 MB)
64 08:14:15.448439 progress 50 % (21 MB)
65 08:14:15.476159 progress 55 % (23 MB)
66 08:14:15.503415 progress 60 % (26 MB)
67 08:14:15.530645 progress 65 % (28 MB)
68 08:14:15.558321 progress 70 % (30 MB)
69 08:14:15.586169 progress 75 % (32 MB)
70 08:14:15.613580 progress 80 % (34 MB)
71 08:14:15.640524 progress 85 % (36 MB)
72 08:14:15.667698 progress 90 % (39 MB)
73 08:14:15.694743 progress 95 % (41 MB)
74 08:14:15.723693 progress 100 % (43 MB)
75 08:14:15.724423 43 MB downloaded in 0.59 s (74.03 MB/s)
76 08:14:15.724908 end: 1.2.1 http-download (duration 00:00:01) [common]
78 08:14:15.725724 end: 1.2 download-retry (duration 00:00:01) [common]
79 08:14:15.726000 start: 1.3 download-retry (timeout 00:09:59) [common]
80 08:14:15.726267 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 08:14:15.726725 downloading http://storage.kernelci.org/next/master/next-20240830/arm64/defconfig+CONFIG_RANDOMIZE_BASE=y/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 08:14:15.726997 saving as /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 08:14:15.727206 total size: 53173 (0 MB)
84 08:14:15.727416 No compression specified
85 08:14:15.764131 progress 61 % (0 MB)
86 08:14:15.764974 progress 100 % (0 MB)
87 08:14:15.765517 0 MB downloaded in 0.04 s (1.32 MB/s)
88 08:14:15.765976 end: 1.3.1 http-download (duration 00:00:00) [common]
90 08:14:15.766772 end: 1.3 download-retry (duration 00:00:00) [common]
91 08:14:15.767033 start: 1.4 download-retry (timeout 00:09:59) [common]
92 08:14:15.767310 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 08:14:15.768272 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 08:14:15.768543 saving as /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/nfsrootfs/full.rootfs.tar
95 08:14:15.768748 total size: 107552908 (102 MB)
96 08:14:15.768958 Using unxz to decompress xz
97 08:14:15.801642 progress 0 % (0 MB)
98 08:14:16.446382 progress 5 % (5 MB)
99 08:14:17.174116 progress 10 % (10 MB)
100 08:14:17.895902 progress 15 % (15 MB)
101 08:14:18.645634 progress 20 % (20 MB)
102 08:14:19.221087 progress 25 % (25 MB)
103 08:14:19.848020 progress 30 % (30 MB)
104 08:14:20.703719 progress 35 % (35 MB)
105 08:14:21.109348 progress 40 % (41 MB)
106 08:14:21.596802 progress 45 % (46 MB)
107 08:14:22.427818 progress 50 % (51 MB)
108 08:14:23.253572 progress 55 % (56 MB)
109 08:14:24.071686 progress 60 % (61 MB)
110 08:14:24.951088 progress 65 % (66 MB)
111 08:14:25.824409 progress 70 % (71 MB)
112 08:14:26.755364 progress 75 % (76 MB)
113 08:14:27.521631 progress 80 % (82 MB)
114 08:14:28.283168 progress 85 % (87 MB)
115 08:14:29.028071 progress 90 % (92 MB)
116 08:14:29.744386 progress 95 % (97 MB)
117 08:14:30.487512 progress 100 % (102 MB)
118 08:14:30.499694 102 MB downloaded in 14.73 s (6.96 MB/s)
119 08:14:30.500601 end: 1.4.1 http-download (duration 00:00:15) [common]
121 08:14:30.502505 end: 1.4 download-retry (duration 00:00:15) [common]
122 08:14:30.503088 start: 1.5 download-retry (timeout 00:09:45) [common]
123 08:14:30.503593 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 08:14:30.504660 downloading http://storage.kernelci.org/next/master/next-20240830/arm64/defconfig+CONFIG_RANDOMIZE_BASE=y/gcc-12/modules.tar.xz
125 08:14:30.505173 saving as /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/modules/modules.tar
126 08:14:30.506298 total size: 11555056 (11 MB)
127 08:14:30.506624 Using unxz to decompress xz
128 08:14:30.546905 progress 0 % (0 MB)
129 08:14:30.616440 progress 5 % (0 MB)
130 08:14:30.693905 progress 10 % (1 MB)
131 08:14:30.777108 progress 15 % (1 MB)
132 08:14:30.859002 progress 20 % (2 MB)
133 08:14:30.942635 progress 25 % (2 MB)
134 08:14:31.018345 progress 30 % (3 MB)
135 08:14:31.097733 progress 35 % (3 MB)
136 08:14:31.176572 progress 40 % (4 MB)
137 08:14:31.249049 progress 45 % (4 MB)
138 08:14:31.327728 progress 50 % (5 MB)
139 08:14:31.400015 progress 55 % (6 MB)
140 08:14:31.484915 progress 60 % (6 MB)
141 08:14:31.571594 progress 65 % (7 MB)
142 08:14:31.649723 progress 70 % (7 MB)
143 08:14:31.746325 progress 75 % (8 MB)
144 08:14:31.842206 progress 80 % (8 MB)
145 08:14:31.918693 progress 85 % (9 MB)
146 08:14:31.994430 progress 90 % (9 MB)
147 08:14:32.071194 progress 95 % (10 MB)
148 08:14:32.143671 progress 100 % (11 MB)
149 08:14:32.156241 11 MB downloaded in 1.65 s (6.68 MB/s)
150 08:14:32.156810 end: 1.5.1 http-download (duration 00:00:02) [common]
152 08:14:32.157626 end: 1.5 download-retry (duration 00:00:02) [common]
153 08:14:32.157894 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 08:14:32.158156 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 08:14:42.071718 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/676385/extract-nfsrootfs-vkudqu37
156 08:14:42.072361 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 08:14:42.072672 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 08:14:42.073295 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro
159 08:14:42.073770 makedir: /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin
160 08:14:42.074140 makedir: /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/tests
161 08:14:42.074490 makedir: /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/results
162 08:14:42.074848 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-add-keys
163 08:14:42.075443 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-add-sources
164 08:14:42.076046 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-background-process-start
165 08:14:42.076618 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-background-process-stop
166 08:14:42.077222 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-common-functions
167 08:14:42.077765 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-echo-ipv4
168 08:14:42.078289 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-install-packages
169 08:14:42.078845 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-installed-packages
170 08:14:42.079379 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-os-build
171 08:14:42.079942 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-probe-channel
172 08:14:42.080527 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-probe-ip
173 08:14:42.081067 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-target-ip
174 08:14:42.081623 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-target-mac
175 08:14:42.082186 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-target-storage
176 08:14:42.082813 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-test-case
177 08:14:42.083383 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-test-event
178 08:14:42.083954 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-test-feedback
179 08:14:42.084552 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-test-raise
180 08:14:42.085099 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-test-reference
181 08:14:42.085650 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-test-runner
182 08:14:42.086197 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-test-set
183 08:14:42.086735 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-test-shell
184 08:14:42.087285 Updating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-install-packages (oe)
185 08:14:42.087894 Updating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/bin/lava-installed-packages (oe)
186 08:14:42.088427 Creating /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/environment
187 08:14:42.088858 LAVA metadata
188 08:14:42.089146 - LAVA_JOB_ID=676385
189 08:14:42.089375 - LAVA_DISPATCHER_IP=192.168.6.2
190 08:14:42.089775 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 08:14:42.090827 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 08:14:42.091174 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 08:14:42.091398 skipped lava-vland-overlay
194 08:14:42.091654 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 08:14:42.091921 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 08:14:42.092178 skipped lava-multinode-overlay
197 08:14:42.092441 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 08:14:42.092710 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 08:14:42.092981 Loading test definitions
200 08:14:42.093278 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 08:14:42.093515 Using /lava-676385 at stage 0
202 08:14:42.094757 uuid=676385_1.6.2.4.1 testdef=None
203 08:14:42.095084 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 08:14:42.095367 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 08:14:42.097271 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 08:14:42.098086 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 08:14:42.100574 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 08:14:42.101450 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 08:14:42.103770 runner path: /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/0/tests/0_dmesg test_uuid 676385_1.6.2.4.1
212 08:14:42.104422 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 08:14:42.105210 Creating lava-test-runner.conf files
215 08:14:42.105426 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/676385/lava-overlay-0uzol9ro/lava-676385/0 for stage 0
216 08:14:42.105810 - 0_dmesg
217 08:14:42.106196 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 08:14:42.106494 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 08:14:42.128771 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 08:14:42.129185 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 08:14:42.129473 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 08:14:42.129758 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 08:14:42.130039 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 08:14:42.756158 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 08:14:42.756625 start: 1.6.4 extract-modules (timeout 00:09:32) [common]
226 08:14:42.756876 extracting modules file /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/modules/modules.tar to /var/lib/lava/dispatcher/tmp/676385/extract-nfsrootfs-vkudqu37
227 08:14:44.148420 extracting modules file /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/modules/modules.tar to /var/lib/lava/dispatcher/tmp/676385/extract-overlay-ramdisk-0c5ghh_n/ramdisk
228 08:14:45.695076 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 08:14:45.695640 start: 1.6.5 apply-overlay-tftp (timeout 00:09:29) [common]
230 08:14:45.696002 [common] Applying overlay to NFS
231 08:14:45.696279 [common] Applying overlay /var/lib/lava/dispatcher/tmp/676385/compress-overlay-ygjuyh4o/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/676385/extract-nfsrootfs-vkudqu37
232 08:14:45.732661 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 08:14:45.733178 start: 1.6.6 prepare-kernel (timeout 00:09:29) [common]
234 08:14:45.733516 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:29) [common]
235 08:14:45.733800 Converting downloaded kernel to a uImage
236 08:14:45.734182 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/kernel/Image /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/kernel/uImage
237 08:14:46.185096 output: Image Name:
238 08:14:46.185527 output: Created: Fri Aug 30 08:14:45 2024
239 08:14:46.185739 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 08:14:46.185946 output: Data Size: 45603328 Bytes = 44534.50 KiB = 43.49 MiB
241 08:14:46.186146 output: Load Address: 01080000
242 08:14:46.186343 output: Entry Point: 01080000
243 08:14:46.186539 output:
244 08:14:46.186878 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 08:14:46.187149 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 08:14:46.187422 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 08:14:46.187685 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 08:14:46.187949 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 08:14:46.188264 Building ramdisk /var/lib/lava/dispatcher/tmp/676385/extract-overlay-ramdisk-0c5ghh_n/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/676385/extract-overlay-ramdisk-0c5ghh_n/ramdisk
250 08:14:48.472238 >> 166014 blocks
251 08:14:56.164285 Adding RAMdisk u-boot header.
252 08:14:56.164707 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/676385/extract-overlay-ramdisk-0c5ghh_n/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/676385/extract-overlay-ramdisk-0c5ghh_n/ramdisk.cpio.gz.uboot
253 08:14:56.410297 output: Image Name:
254 08:14:56.410721 output: Created: Fri Aug 30 08:14:56 2024
255 08:14:56.411190 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 08:14:56.411656 output: Data Size: 23338063 Bytes = 22791.08 KiB = 22.26 MiB
257 08:14:56.412163 output: Load Address: 00000000
258 08:14:56.412618 output: Entry Point: 00000000
259 08:14:56.413058 output:
260 08:14:56.414183 rename /var/lib/lava/dispatcher/tmp/676385/extract-overlay-ramdisk-0c5ghh_n/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/ramdisk/ramdisk.cpio.gz.uboot
261 08:14:56.414975 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 08:14:56.415590 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 08:14:56.416427 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 08:14:56.416953 No LXC device requested
265 08:14:56.417501 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 08:14:56.418055 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 08:14:56.418592 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 08:14:56.419039 Checking files for TFTP limit of 4294967296 bytes.
269 08:14:56.422030 end: 1 tftp-deploy (duration 00:00:41) [common]
270 08:14:56.422678 start: 2 uboot-action (timeout 00:05:00) [common]
271 08:14:56.423275 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 08:14:56.423837 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 08:14:56.424440 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 08:14:56.425034 Using kernel file from prepare-kernel: 676385/tftp-deploy-wpool8wa/kernel/uImage
275 08:14:56.425735 substitutions:
276 08:14:56.426193 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 08:14:56.426648 - {DTB_ADDR}: 0x01070000
278 08:14:56.427097 - {DTB}: 676385/tftp-deploy-wpool8wa/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 08:14:56.427541 - {INITRD}: 676385/tftp-deploy-wpool8wa/ramdisk/ramdisk.cpio.gz.uboot
280 08:14:56.428010 - {KERNEL_ADDR}: 0x01080000
281 08:14:56.428427 - {KERNEL}: 676385/tftp-deploy-wpool8wa/kernel/uImage
282 08:14:56.428828 - {LAVA_MAC}: None
283 08:14:56.429266 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/676385/extract-nfsrootfs-vkudqu37
284 08:14:56.429667 - {NFS_SERVER_IP}: 192.168.6.2
285 08:14:56.430104 - {PRESEED_CONFIG}: None
286 08:14:56.430540 - {PRESEED_LOCAL}: None
287 08:14:56.430973 - {RAMDISK_ADDR}: 0x08000000
288 08:14:56.431403 - {RAMDISK}: 676385/tftp-deploy-wpool8wa/ramdisk/ramdisk.cpio.gz.uboot
289 08:14:56.431835 - {ROOT_PART}: None
290 08:14:56.432299 - {ROOT}: None
291 08:14:56.432734 - {SERVER_IP}: 192.168.6.2
292 08:14:56.433166 - {TEE_ADDR}: 0x83000000
293 08:14:56.433597 - {TEE}: None
294 08:14:56.434031 Parsed boot commands:
295 08:14:56.434456 - setenv autoload no
296 08:14:56.434887 - setenv initrd_high 0xffffffff
297 08:14:56.435319 - setenv fdt_high 0xffffffff
298 08:14:56.435747 - dhcp
299 08:14:56.436207 - setenv serverip 192.168.6.2
300 08:14:56.436639 - tftpboot 0x01080000 676385/tftp-deploy-wpool8wa/kernel/uImage
301 08:14:56.437073 - tftpboot 0x08000000 676385/tftp-deploy-wpool8wa/ramdisk/ramdisk.cpio.gz.uboot
302 08:14:56.437504 - tftpboot 0x01070000 676385/tftp-deploy-wpool8wa/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 08:14:56.437935 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/676385/extract-nfsrootfs-vkudqu37,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 08:14:56.438382 - bootm 0x01080000 0x08000000 0x01070000
305 08:14:56.438939 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 08:14:56.440617 start: 2.3 connect-device (timeout 00:05:00) [common]
308 08:14:56.441085 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 08:14:56.456469 Setting prompt string to ['lava-test: # ']
310 08:14:56.458071 end: 2.3 connect-device (duration 00:00:00) [common]
311 08:14:56.458741 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 08:14:56.459358 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 08:14:56.459936 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 08:14:56.461222 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 08:14:56.498163 >> OK - accepted request
316 08:14:56.500358 Returned 0 in 0 seconds
317 08:14:56.601403 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 08:14:56.602328 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 08:14:56.602651 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 08:14:56.602927 Setting prompt string to ['Hit any key to stop autoboot']
322 08:14:56.603168 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 08:14:56.604081 Trying 192.168.56.21...
324 08:14:56.604354 Connected to conserv1.
325 08:14:56.604572 Escape character is '^]'.
326 08:14:56.604786
327 08:14:56.605003 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 08:14:56.605255
329 08:15:04.328814 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 08:15:04.329483 bl2_stage_init 0x01
331 08:15:04.329969 bl2_stage_init 0x81
332 08:15:04.334438 hw id: 0x0000 - pwm id 0x01
333 08:15:04.334944 bl2_stage_init 0xc1
334 08:15:04.338608 bl2_stage_init 0x02
335 08:15:04.339104
336 08:15:04.339562 L0:00000000
337 08:15:04.340064 L1:00000703
338 08:15:04.340526 L2:00008067
339 08:15:04.344074 L3:15000000
340 08:15:04.344566 S1:00000000
341 08:15:04.345033 B2:20282000
342 08:15:04.345477 B1:a0f83180
343 08:15:04.345916
344 08:15:04.346359 TE: 70536
345 08:15:04.349658
346 08:15:04.355309 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 08:15:04.355889
348 08:15:04.356401 Board ID = 1
349 08:15:04.356880 Set cpu clk to 24M
350 08:15:04.357354 Set clk81 to 24M
351 08:15:04.360919 Use GP1_pll as DSU clk.
352 08:15:04.361439 DSU clk: 1200 Mhz
353 08:15:04.361912 CPU clk: 1200 MHz
354 08:15:04.366528 Set clk81 to 166.6M
355 08:15:04.372164 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 08:15:04.372701 board id: 1
357 08:15:04.380576 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 08:15:04.391281 fw parse done
359 08:15:04.397262 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 08:15:04.439922 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 08:15:04.450763 PIEI prepare done
362 08:15:04.451291 fastboot data load
363 08:15:04.451750 fastboot data verify
364 08:15:04.456534 verify result: 266
365 08:15:04.462061 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 08:15:04.462578 LPDDR4 probe
367 08:15:04.463026 ddr clk to 1584MHz
368 08:15:04.470090 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 08:15:04.507404
370 08:15:04.508088 dmc_version 0001
371 08:15:04.514011 Check phy result
372 08:15:04.519900 INFO : End of CA training
373 08:15:04.520460 INFO : End of initialization
374 08:15:04.525559 INFO : Training has run successfully!
375 08:15:04.526104 Check phy result
376 08:15:04.531066 INFO : End of initialization
377 08:15:04.531579 INFO : End of read enable training
378 08:15:04.534422 INFO : End of fine write leveling
379 08:15:04.540070 INFO : End of Write leveling coarse delay
380 08:15:04.545604 INFO : Training has run successfully!
381 08:15:04.546120 Check phy result
382 08:15:04.546571 INFO : End of initialization
383 08:15:04.551182 INFO : End of read dq deskew training
384 08:15:04.556830 INFO : End of MPR read delay center optimization
385 08:15:04.557364 INFO : End of write delay center optimization
386 08:15:04.562394 INFO : End of read delay center optimization
387 08:15:04.568021 INFO : End of max read latency training
388 08:15:04.568535 INFO : Training has run successfully!
389 08:15:04.573609 1D training succeed
390 08:15:04.579472 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 08:15:04.627074 Check phy result
392 08:15:04.627656 INFO : End of initialization
393 08:15:04.649503 INFO : End of 2D read delay Voltage center optimization
394 08:15:04.668662 INFO : End of 2D read delay Voltage center optimization
395 08:15:04.720492 INFO : End of 2D write delay Voltage center optimization
396 08:15:04.769752 INFO : End of 2D write delay Voltage center optimization
397 08:15:04.775263 INFO : Training has run successfully!
398 08:15:04.775768
399 08:15:04.776275 channel==0
400 08:15:04.780872 RxClkDly_Margin_A0==78 ps 8
401 08:15:04.781380 TxDqDly_Margin_A0==88 ps 9
402 08:15:04.784185 RxClkDly_Margin_A1==69 ps 7
403 08:15:04.784659 TxDqDly_Margin_A1==98 ps 10
404 08:15:04.789587 TrainedVREFDQ_A0==74
405 08:15:04.790086 TrainedVREFDQ_A1==75
406 08:15:04.790540 VrefDac_Margin_A0==22
407 08:15:04.795196 DeviceVref_Margin_A0==40
408 08:15:04.795673 VrefDac_Margin_A1==22
409 08:15:04.800790 DeviceVref_Margin_A1==39
410 08:15:04.801259
411 08:15:04.801708
412 08:15:04.802153 channel==1
413 08:15:04.802587 RxClkDly_Margin_A0==78 ps 8
414 08:15:04.806478 TxDqDly_Margin_A0==98 ps 10
415 08:15:04.806951 RxClkDly_Margin_A1==88 ps 9
416 08:15:04.812084 TxDqDly_Margin_A1==88 ps 9
417 08:15:04.812566 TrainedVREFDQ_A0==78
418 08:15:04.813010 TrainedVREFDQ_A1==75
419 08:15:04.817652 VrefDac_Margin_A0==22
420 08:15:04.818126 DeviceVref_Margin_A0==36
421 08:15:04.823127 VrefDac_Margin_A1==23
422 08:15:04.823594 DeviceVref_Margin_A1==39
423 08:15:04.824071
424 08:15:04.828786 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 08:15:04.829297
426 08:15:04.856784 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000019 00000017 00000018 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 08:15:04.862542 2D training succeed
428 08:15:04.867925 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 08:15:04.868434 auto size-- 65535DDR cs0 size: 2048MB
430 08:15:04.873517 DDR cs1 size: 2048MB
431 08:15:04.873984 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 08:15:04.879062 cs0 DataBus test pass
433 08:15:04.879529 cs1 DataBus test pass
434 08:15:04.879976 cs0 AddrBus test pass
435 08:15:04.884711 cs1 AddrBus test pass
436 08:15:04.885191
437 08:15:04.885642 100bdlr_step_size ps== 478
438 08:15:04.886092 result report
439 08:15:04.890421 boot times 0Enable ddr reg access
440 08:15:04.897860 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 08:15:04.911638 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 08:15:05.567618 bl2z: ptr: 05129330, size: 00001e40
443 08:15:05.573901 0.0;M3 CHK:0;cm4_sp_mode 0
444 08:15:05.574483 MVN_1=0x00000000
445 08:15:05.574957 MVN_2=0x00000000
446 08:15:05.585441 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 08:15:05.585963 OPS=0x04
448 08:15:05.586424 ring efuse init
449 08:15:05.590978 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 08:15:05.591506 [0.017310 Inits done]
451 08:15:05.591958 secure task start!
452 08:15:05.598386 high task start!
453 08:15:05.598899 low task start!
454 08:15:05.599353 run into bl31
455 08:15:05.607447 NOTICE: BL31: v1.3(release):4fc40b1
456 08:15:05.615239 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 08:15:05.615763 NOTICE: BL31: G12A normal boot!
458 08:15:05.630889 NOTICE: BL31: BL33 decompress pass
459 08:15:05.636585 ERROR: Error initializing runtime service opteed_fast
460 08:15:06.876859 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 08:15:06.877545 bl2_stage_init 0x01
462 08:15:06.878036 bl2_stage_init 0x81
463 08:15:06.882309 hw id: 0x0000 - pwm id 0x01
464 08:15:06.882824 bl2_stage_init 0xc1
465 08:15:06.887249 bl2_stage_init 0x02
466 08:15:06.887795
467 08:15:06.888296 L0:00000000
468 08:15:06.888733 L1:00000703
469 08:15:06.889169 L2:00008067
470 08:15:06.892778 L3:15000000
471 08:15:06.893244 S1:00000000
472 08:15:06.893678 B2:20282000
473 08:15:06.894106 B1:a0f83180
474 08:15:06.894529
475 08:15:06.894953 TE: 69776
476 08:15:06.895385
477 08:15:06.903971 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 08:15:06.904312
479 08:15:06.904517 Board ID = 1
480 08:15:06.904715 Set cpu clk to 24M
481 08:15:06.904912 Set clk81 to 24M
482 08:15:06.909667 Use GP1_pll as DSU clk.
483 08:15:06.909941 DSU clk: 1200 Mhz
484 08:15:06.910145 CPU clk: 1200 MHz
485 08:15:06.915209 Set clk81 to 166.6M
486 08:15:06.920823 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 08:15:06.921093 board id: 1
488 08:15:06.928735 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 08:15:06.939622 fw parse done
490 08:15:06.945660 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 08:15:06.987762 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 08:15:06.999859 PIEI prepare done
493 08:15:07.000237 fastboot data load
494 08:15:07.000463 fastboot data verify
495 08:15:07.005468 verify result: 266
496 08:15:07.011066 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 08:15:07.011383 LPDDR4 probe
498 08:15:07.011597 ddr clk to 1584MHz
499 08:15:08.377409 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 08:15:08.378086 bl2_stage_init 0x01
501 08:15:08.378580 bl2_stage_init 0x81
502 08:15:08.383064 hw id: 0x0000 - pwm id 0x01
503 08:15:08.383609 bl2_stage_init 0xc1
504 08:15:08.387725 bl2_stage_init 0x02
505 08:15:08.388275
506 08:15:08.388750 L0:00000000
507 08:15:08.389214 L1:00000703
508 08:15:08.389666 L2:00008067
509 08:15:08.393277 L3:15000000
510 08:15:08.393762 S1:00000000
511 08:15:08.394216 B2:20282000
512 08:15:08.394677 B1:a0f83180
513 08:15:08.395158
514 08:15:08.395618 TE: 70802
515 08:15:08.396098
516 08:15:08.404524 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 08:15:08.405022
518 08:15:08.405478 Board ID = 1
519 08:15:08.405948 Set cpu clk to 24M
520 08:15:08.406419 Set clk81 to 24M
521 08:15:08.407918 Use GP1_pll as DSU clk.
522 08:15:08.413426 DSU clk: 1200 Mhz
523 08:15:08.413904 CPU clk: 1200 MHz
524 08:15:08.414354 Set clk81 to 166.6M
525 08:15:08.419021 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 08:15:08.419499 board id: 1
527 08:15:08.428401 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 08:15:08.440124 fw parse done
529 08:15:08.446052 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 08:15:08.488715 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 08:15:08.499530 PIEI prepare done
532 08:15:08.500119 fastboot data load
533 08:15:08.500591 fastboot data verify
534 08:15:08.505091 verify result: 266
535 08:15:08.510744 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 08:15:08.511238 LPDDR4 probe
537 08:15:08.511687 ddr clk to 1584MHz
538 08:15:08.518673 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 08:15:08.555233
540 08:15:08.555768 dmc_version 0001
541 08:15:08.562083 Check phy result
542 08:15:08.568527 INFO : End of CA training
543 08:15:08.569009 INFO : End of initialization
544 08:15:08.574093 INFO : Training has run successfully!
545 08:15:08.574568 Check phy result
546 08:15:08.579706 INFO : End of initialization
547 08:15:08.580209 INFO : End of read enable training
548 08:15:08.585283 INFO : End of fine write leveling
549 08:15:08.590934 INFO : End of Write leveling coarse delay
550 08:15:08.591448 INFO : Training has run successfully!
551 08:15:08.591907 Check phy result
552 08:15:08.596515 INFO : End of initialization
553 08:15:08.597017 INFO : End of read dq deskew training
554 08:15:08.602121 INFO : End of MPR read delay center optimization
555 08:15:08.607728 INFO : End of write delay center optimization
556 08:15:08.613305 INFO : End of read delay center optimization
557 08:15:08.613795 INFO : End of max read latency training
558 08:15:08.618912 INFO : Training has run successfully!
559 08:15:08.619386 1D training succeed
560 08:15:08.628185 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 08:15:08.675710 Check phy result
562 08:15:08.676301 INFO : End of initialization
563 08:15:08.698139 INFO : End of 2D read delay Voltage center optimization
564 08:15:08.717230 INFO : End of 2D read delay Voltage center optimization
565 08:15:08.769137 INFO : End of 2D write delay Voltage center optimization
566 08:15:08.818339 INFO : End of 2D write delay Voltage center optimization
567 08:15:08.823914 INFO : Training has run successfully!
568 08:15:08.824455
569 08:15:08.824920 channel==0
570 08:15:08.829426 RxClkDly_Margin_A0==78 ps 8
571 08:15:08.829928 TxDqDly_Margin_A0==88 ps 9
572 08:15:08.832779 RxClkDly_Margin_A1==78 ps 8
573 08:15:08.833312 TxDqDly_Margin_A1==98 ps 10
574 08:15:08.838335 TrainedVREFDQ_A0==74
575 08:15:08.838841 TrainedVREFDQ_A1==74
576 08:15:08.839300 VrefDac_Margin_A0==23
577 08:15:08.843939 DeviceVref_Margin_A0==40
578 08:15:08.844453 VrefDac_Margin_A1==23
579 08:15:08.849564 DeviceVref_Margin_A1==40
580 08:15:08.850068
581 08:15:08.850525
582 08:15:08.850969 channel==1
583 08:15:08.851411 RxClkDly_Margin_A0==78 ps 8
584 08:15:08.855158 TxDqDly_Margin_A0==98 ps 10
585 08:15:08.855695 RxClkDly_Margin_A1==78 ps 8
586 08:15:08.860774 TxDqDly_Margin_A1==88 ps 9
587 08:15:08.861278 TrainedVREFDQ_A0==78
588 08:15:08.861734 TrainedVREFDQ_A1==78
589 08:15:08.866378 VrefDac_Margin_A0==23
590 08:15:08.866896 DeviceVref_Margin_A0==36
591 08:15:08.871931 VrefDac_Margin_A1==22
592 08:15:08.872431 DeviceVref_Margin_A1==36
593 08:15:08.872878
594 08:15:08.877526 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 08:15:08.878017
596 08:15:08.905555 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
597 08:15:08.911182 2D training succeed
598 08:15:08.916837 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 08:15:08.917339 auto size-- 65535DDR cs0 size: 2048MB
600 08:15:08.922426 DDR cs1 size: 2048MB
601 08:15:08.922909 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 08:15:08.928053 cs0 DataBus test pass
603 08:15:08.928595 cs1 DataBus test pass
604 08:15:08.929076 cs0 AddrBus test pass
605 08:15:08.933547 cs1 AddrBus test pass
606 08:15:08.934033
607 08:15:08.934483 100bdlr_step_size ps== 464
608 08:15:08.934930 result report
609 08:15:08.939179 boot times 0Enable ddr reg access
610 08:15:08.946612 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 08:15:08.960430 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 08:15:09.615457 bl2z: ptr: 05129330, size: 00001e40
613 08:15:09.621805 0.0;M3 CHK:0;cm4_sp_mode 0
614 08:15:09.622097 MVN_1=0x00000000
615 08:15:09.622311 MVN_2=0x00000000
616 08:15:09.633255 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 08:15:09.633515 OPS=0x04
618 08:15:09.633736 ring efuse init
619 08:15:09.638981 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 08:15:09.639242 [0.017319 Inits done]
621 08:15:09.639450 secure task start!
622 08:15:09.646579 high task start!
623 08:15:09.646822 low task start!
624 08:15:09.647027 run into bl31
625 08:15:09.655250 NOTICE: BL31: v1.3(release):4fc40b1
626 08:15:09.662706 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 08:15:09.662993 NOTICE: BL31: G12A normal boot!
628 08:15:09.678547 NOTICE: BL31: BL33 decompress pass
629 08:15:09.684244 ERROR: Error initializing runtime service opteed_fast
630 08:15:10.927202 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 08:15:10.927607 bl2_stage_init 0x01
632 08:15:10.927826 bl2_stage_init 0x81
633 08:15:10.932796 hw id: 0x0000 - pwm id 0x01
634 08:15:10.933049 bl2_stage_init 0xc1
635 08:15:10.937723 bl2_stage_init 0x02
636 08:15:10.938090
637 08:15:10.938405 L0:00000000
638 08:15:10.938704 L1:00000703
639 08:15:10.938925 L2:00008067
640 08:15:10.943355 L3:15000000
641 08:15:10.943605 S1:00000000
642 08:15:10.943809 B2:20282000
643 08:15:10.944031 B1:a0f83180
644 08:15:10.944247
645 08:15:10.944451 TE: 68820
646 08:15:10.944660
647 08:15:10.954482 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 08:15:10.954772
649 08:15:10.954986 Board ID = 1
650 08:15:10.955189 Set cpu clk to 24M
651 08:15:10.955400 Set clk81 to 24M
652 08:15:10.960015 Use GP1_pll as DSU clk.
653 08:15:10.960437 DSU clk: 1200 Mhz
654 08:15:10.960767 CPU clk: 1200 MHz
655 08:15:10.965631 Set clk81 to 166.6M
656 08:15:10.971363 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 08:15:10.971648 board id: 1
658 08:15:10.979147 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 08:15:10.990051 fw parse done
660 08:15:10.996039 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 08:15:11.038921 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 08:15:11.050022 PIEI prepare done
663 08:15:11.050308 fastboot data load
664 08:15:11.050526 fastboot data verify
665 08:15:11.055615 verify result: 266
666 08:15:11.061209 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 08:15:11.061611 LPDDR4 probe
668 08:15:11.061851 ddr clk to 1584MHz
669 08:15:11.069236 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 08:15:11.106974
671 08:15:11.107346 dmc_version 0001
672 08:15:11.113944 Check phy result
673 08:15:11.119913 INFO : End of CA training
674 08:15:11.120198 INFO : End of initialization
675 08:15:11.126144 INFO : Training has run successfully!
676 08:15:11.126549 Check phy result
677 08:15:11.131213 INFO : End of initialization
678 08:15:11.131607 INFO : End of read enable training
679 08:15:11.137067 INFO : End of fine write leveling
680 08:15:11.142382 INFO : End of Write leveling coarse delay
681 08:15:11.142652 INFO : Training has run successfully!
682 08:15:11.142864 Check phy result
683 08:15:11.148089 INFO : End of initialization
684 08:15:11.148360 INFO : End of read dq deskew training
685 08:15:11.153635 INFO : End of MPR read delay center optimization
686 08:15:11.159466 INFO : End of write delay center optimization
687 08:15:11.164837 INFO : End of read delay center optimization
688 08:15:11.165106 INFO : End of max read latency training
689 08:15:11.170502 INFO : Training has run successfully!
690 08:15:11.170916 1D training succeed
691 08:15:11.179620 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 08:15:11.227940 Check phy result
693 08:15:11.228282 INFO : End of initialization
694 08:15:11.255377 INFO : End of 2D read delay Voltage center optimization
695 08:15:11.279463 INFO : End of 2D read delay Voltage center optimization
696 08:15:11.336294 INFO : End of 2D write delay Voltage center optimization
697 08:15:11.390266 INFO : End of 2D write delay Voltage center optimization
698 08:15:11.395727 INFO : Training has run successfully!
699 08:15:11.396030
700 08:15:11.396258 channel==0
701 08:15:11.401338 RxClkDly_Margin_A0==78 ps 8
702 08:15:11.401606 TxDqDly_Margin_A0==98 ps 10
703 08:15:11.406902 RxClkDly_Margin_A1==88 ps 9
704 08:15:11.407270 TxDqDly_Margin_A1==98 ps 10
705 08:15:11.407597 TrainedVREFDQ_A0==75
706 08:15:11.412668 TrainedVREFDQ_A1==74
707 08:15:11.413255 VrefDac_Margin_A0==23
708 08:15:11.413729 DeviceVref_Margin_A0==39
709 08:15:11.418174 VrefDac_Margin_A1==23
710 08:15:11.418686 DeviceVref_Margin_A1==40
711 08:15:11.419171
712 08:15:11.419636
713 08:15:11.423738 channel==1
714 08:15:11.424279 RxClkDly_Margin_A0==78 ps 8
715 08:15:11.424747 TxDqDly_Margin_A0==98 ps 10
716 08:15:11.429327 RxClkDly_Margin_A1==78 ps 8
717 08:15:11.429842 TxDqDly_Margin_A1==88 ps 9
718 08:15:11.434921 TrainedVREFDQ_A0==78
719 08:15:11.435453 TrainedVREFDQ_A1==75
720 08:15:11.435912 VrefDac_Margin_A0==22
721 08:15:11.440605 DeviceVref_Margin_A0==36
722 08:15:11.441112 VrefDac_Margin_A1==20
723 08:15:11.446225 DeviceVref_Margin_A1==39
724 08:15:11.446737
725 08:15:11.447190 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 08:15:11.447766
727 08:15:11.479749 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000019 00000015 00000018 00000015 00000015 00000017 00000018 0000001a 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
728 08:15:11.480367 2D training succeed
729 08:15:11.485357 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 08:15:11.490929 auto size-- 65535DDR cs0 size: 2048MB
731 08:15:11.491417 DDR cs1 size: 2048MB
732 08:15:11.496540 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 08:15:11.497031 cs0 DataBus test pass
734 08:15:11.502233 cs1 DataBus test pass
735 08:15:11.502747 cs0 AddrBus test pass
736 08:15:11.503233 cs1 AddrBus test pass
737 08:15:11.503666
738 08:15:11.507754 100bdlr_step_size ps== 478
739 08:15:11.508349 result report
740 08:15:11.513389 boot times 0Enable ddr reg access
741 08:15:11.518589 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 08:15:11.532547 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 08:15:12.192613 bl2z: ptr: 05129330, size: 00001e40
744 08:15:12.200064 0.0;M3 CHK:0;cm4_sp_mode 0
745 08:15:12.200679 MVN_1=0x00000000
746 08:15:12.201128 MVN_2=0x00000000
747 08:15:12.211471 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 08:15:12.212061 OPS=0x04
749 08:15:12.212508 ring efuse init
750 08:15:12.214379 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 08:15:12.219840 [0.017354 Inits done]
752 08:15:12.220330 secure task start!
753 08:15:12.220766 high task start!
754 08:15:12.221215 low task start!
755 08:15:12.225078 run into bl31
756 08:15:12.233670 NOTICE: BL31: v1.3(release):4fc40b1
757 08:15:12.241446 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 08:15:12.241956 NOTICE: BL31: G12A normal boot!
759 08:15:12.257117 NOTICE: BL31: BL33 decompress pass
760 08:15:12.262779 ERROR: Error initializing runtime service opteed_fast
761 08:15:13.058557
762 08:15:13.059299
763 08:15:13.063733 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 08:15:13.064361
765 08:15:13.067198 Model: Libre Computer AML-S905D3-CC Solitude
766 08:15:13.213302 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 08:15:13.229652 DRAM: 2 GiB (effective 3.8 GiB)
768 08:15:13.330639 Core: 406 devices, 33 uclasses, devicetree: separate
769 08:15:13.336501 WDT: Not starting watchdog@f0d0
770 08:15:13.361639 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 08:15:13.373757 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 08:15:13.378717 ** Bad device specification mmc 0 **
773 08:15:13.388766 Card did not respond to voltage select! : -110
774 08:15:13.396412 ** Bad device specification mmc 0 **
775 08:15:13.397058 Couldn't find partition mmc 0
776 08:15:13.404741 Card did not respond to voltage select! : -110
777 08:15:13.410297 ** Bad device specification mmc 0 **
778 08:15:13.410906 Couldn't find partition mmc 0
779 08:15:13.415323 Error: could not access storage.
780 08:15:13.712627 Net: eth0: ethernet@ff3f0000
781 08:15:13.713378 starting USB...
782 08:15:13.957513 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 08:15:13.958184 Starting the controller
784 08:15:13.964540 USB XHCI 1.10
785 08:15:15.520643 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 08:15:15.528991 scanning usb for storage devices... 0 Storage Device(s) found
788 08:15:15.580907 Hit any key to stop autoboot: 1
789 08:15:15.582389 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 08:15:15.583142 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 08:15:15.583825 Setting prompt string to ['=>']
792 08:15:15.584517 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 08:15:15.595039 0
794 08:15:15.596213 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 08:15:15.697945 => setenv autoload no
797 08:15:15.698918 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 08:15:15.705012 setenv autoload no
800 08:15:15.806963 => setenv initrd_high 0xffffffff
801 08:15:15.808041 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 08:15:15.812209 setenv initrd_high 0xffffffff
804 08:15:15.914081 => setenv fdt_high 0xffffffff
805 08:15:15.915079 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 08:15:15.919214 setenv fdt_high 0xffffffff
808 08:15:16.020956 => dhcp
809 08:15:16.022039 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
810 08:15:16.025984 dhcp
811 08:15:16.981971 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 08:15:16.982693 Speed: 1000, full duplex
813 08:15:16.983327 BOOTP broadcast 1
814 08:15:17.230318 BOOTP broadcast 2
815 08:15:17.731267 BOOTP broadcast 3
816 08:15:18.732358 BOOTP broadcast 4
817 08:15:20.735318 BOOTP broadcast 5
818 08:15:20.745803 DHCP client bound to address 192.168.6.12 (3763 ms)
820 08:15:20.846831 => setenv serverip 192.168.6.2
821 08:15:20.847463 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
822 08:15:20.851856 setenv serverip 192.168.6.2
824 08:15:20.952826 => tftpboot 0x01080000 676385/tftp-deploy-wpool8wa/kernel/uImage
825 08:15:20.953290 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
826 08:15:20.960011 tftpboot 0x01080000 676385/tftp-deploy-wpool8wa/kernel/uImage
827 08:15:20.960283 Speed: 1000, full duplex
828 08:15:20.960490 Using ethernet@ff3f0000 device
829 08:15:20.965440 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
830 08:15:20.970990 Filename '676385/tftp-deploy-wpool8wa/kernel/uImage'.
831 08:15:20.974375 Load address: 0x1080000
832 08:15:20.979256 Loading: * UDP wrong checksum 00000005 0000a72c
833 08:15:24.218032 ################################################## 43.5 MiB
834 08:15:24.218617 13.4 MiB/s
835 08:15:24.219038 done
836 08:15:24.221482 Bytes transferred = 45603392 (2b7da40 hex)
838 08:15:24.322958 => tftpboot 0x08000000 676385/tftp-deploy-wpool8wa/ramdisk/ramdisk.cpio.gz.uboot
839 08:15:24.323640 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:32)
840 08:15:24.330441 tftpboot 0x08000000 676385/tftp-deploy-wpool8wa/ramdisk/ramdisk.cpio.gz.uboot
841 08:15:24.330926 Speed: 1000, full duplex
842 08:15:24.331451 Using ethernet@ff3f0000 device
843 08:15:24.336008 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
844 08:15:24.345743 Filename '676385/tftp-deploy-wpool8wa/ramdisk/ramdisk.cpio.gz.uboot'.
845 08:15:24.346246 Load address: 0x8000000
846 08:15:25.781651 Loading: *################################################# UDP wrong checksum 00000005 0000fe03
847 08:15:30.781985 T UDP wrong checksum 00000005 0000fe03
848 08:15:40.784028 T T UDP wrong checksum 00000005 0000fe03
849 08:15:49.319666 T UDP wrong checksum 000000ff 00003de6
850 08:15:49.338160 UDP wrong checksum 000000ff 0000cdd8
851 08:16:00.787608 T T T UDP wrong checksum 00000005 0000fe03
852 08:16:08.433263 T UDP wrong checksum 000000ff 0000013c
853 08:16:10.715399 UDP wrong checksum 000000ff 0000aad2
854 08:16:10.751287 UDP wrong checksum 000000ff 000039c5
855 08:16:20.791967 T T
856 08:16:20.792619 Retry count exceeded; starting again
858 08:16:20.794036 end: 2.4.3 bootloader-commands (duration 00:01:05) [common]
861 08:16:20.795890 end: 2.4 uboot-commands (duration 00:01:24) [common]
863 08:16:20.797292 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
865 08:16:20.798268 end: 2 uboot-action (duration 00:01:24) [common]
867 08:16:20.799751 Cleaning after the job
868 08:16:20.800325 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/ramdisk
869 08:16:20.801536 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/kernel
870 08:16:20.830413 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/dtb
871 08:16:20.831622 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/nfsrootfs
872 08:16:20.870532 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/676385/tftp-deploy-wpool8wa/modules
873 08:16:20.879230 start: 4.1 power-off (timeout 00:00:30) [common]
874 08:16:20.879849 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
875 08:16:20.910176 >> OK - accepted request
876 08:16:20.911898 Returned 0 in 0 seconds
877 08:16:21.012816 end: 4.1 power-off (duration 00:00:00) [common]
879 08:16:21.014060 start: 4.2 read-feedback (timeout 00:10:00) [common]
880 08:16:21.014717 Listened to connection for namespace 'common' for up to 1s
881 08:16:22.015081 Finalising connection for namespace 'common'
882 08:16:22.015769 Disconnecting from shell: Finalise
883 08:16:22.016318 =>
884 08:16:22.117273 end: 4.2 read-feedback (duration 00:00:01) [common]
885 08:16:22.117902 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/676385
886 08:16:23.822559 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/676385
887 08:16:23.823168 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.