Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:44:35.732270 lava-dispatcher, installed at version: 2024.01
2 08:44:35.733043 start: 0 validate
3 08:44:35.733503 Start time: 2024-08-30 08:44:35.733473+00:00 (UTC)
4 08:44:35.734042 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:44:35.734580 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 08:44:35.774975 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:44:35.775517 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240830%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 08:44:35.807223 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:44:35.807824 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240830%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 08:44:35.842493 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:44:35.842945 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 08:44:35.875459 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 08:44:35.875932 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240830%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 08:44:35.918747 validate duration: 0.19
16 08:44:35.919704 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 08:44:35.920140 start: 1.1 download-retry (timeout 00:10:00) [common]
18 08:44:35.920520 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 08:44:35.921195 Not decompressing ramdisk as can be used compressed.
20 08:44:35.921718 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 08:44:35.922060 saving as /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/ramdisk/initrd.cpio.gz
22 08:44:35.922403 total size: 5628140 (5 MB)
23 08:44:35.962720 progress 0 % (0 MB)
24 08:44:35.970468 progress 5 % (0 MB)
25 08:44:35.978181 progress 10 % (0 MB)
26 08:44:35.984959 progress 15 % (0 MB)
27 08:44:35.992308 progress 20 % (1 MB)
28 08:44:35.995841 progress 25 % (1 MB)
29 08:44:35.999753 progress 30 % (1 MB)
30 08:44:36.003670 progress 35 % (1 MB)
31 08:44:36.007210 progress 40 % (2 MB)
32 08:44:36.011177 progress 45 % (2 MB)
33 08:44:36.014792 progress 50 % (2 MB)
34 08:44:36.018695 progress 55 % (2 MB)
35 08:44:36.022644 progress 60 % (3 MB)
36 08:44:36.026180 progress 65 % (3 MB)
37 08:44:36.030076 progress 70 % (3 MB)
38 08:44:36.033611 progress 75 % (4 MB)
39 08:44:36.037556 progress 80 % (4 MB)
40 08:44:36.041159 progress 85 % (4 MB)
41 08:44:36.044852 progress 90 % (4 MB)
42 08:44:36.048487 progress 95 % (5 MB)
43 08:44:36.051677 progress 100 % (5 MB)
44 08:44:36.052348 5 MB downloaded in 0.13 s (41.31 MB/s)
45 08:44:36.052913 end: 1.1.1 http-download (duration 00:00:00) [common]
47 08:44:36.053793 end: 1.1 download-retry (duration 00:00:00) [common]
48 08:44:36.054083 start: 1.2 download-retry (timeout 00:10:00) [common]
49 08:44:36.054352 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 08:44:36.054822 downloading http://storage.kernelci.org/next/master/next-20240830/arm64/defconfig/gcc-12/kernel/Image
51 08:44:36.055071 saving as /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/kernel/Image
52 08:44:36.055279 total size: 45603328 (43 MB)
53 08:44:36.055487 No compression specified
54 08:44:36.093992 progress 0 % (0 MB)
55 08:44:36.123146 progress 5 % (2 MB)
56 08:44:36.152447 progress 10 % (4 MB)
57 08:44:36.181198 progress 15 % (6 MB)
58 08:44:36.210360 progress 20 % (8 MB)
59 08:44:36.239455 progress 25 % (10 MB)
60 08:44:36.268549 progress 30 % (13 MB)
61 08:44:36.297794 progress 35 % (15 MB)
62 08:44:36.326118 progress 40 % (17 MB)
63 08:44:36.356313 progress 45 % (19 MB)
64 08:44:36.385638 progress 50 % (21 MB)
65 08:44:36.414065 progress 55 % (23 MB)
66 08:44:36.442812 progress 60 % (26 MB)
67 08:44:36.470556 progress 65 % (28 MB)
68 08:44:36.499350 progress 70 % (30 MB)
69 08:44:36.527354 progress 75 % (32 MB)
70 08:44:36.556078 progress 80 % (34 MB)
71 08:44:36.584067 progress 85 % (36 MB)
72 08:44:36.612569 progress 90 % (39 MB)
73 08:44:36.641324 progress 95 % (41 MB)
74 08:44:36.668141 progress 100 % (43 MB)
75 08:44:36.668827 43 MB downloaded in 0.61 s (70.89 MB/s)
76 08:44:36.669331 end: 1.2.1 http-download (duration 00:00:01) [common]
78 08:44:36.670175 end: 1.2 download-retry (duration 00:00:01) [common]
79 08:44:36.670472 start: 1.3 download-retry (timeout 00:09:59) [common]
80 08:44:36.670753 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 08:44:36.671242 downloading http://storage.kernelci.org/next/master/next-20240830/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 08:44:36.671504 saving as /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 08:44:36.671720 total size: 53173 (0 MB)
84 08:44:36.671938 No compression specified
85 08:44:36.713248 progress 61 % (0 MB)
86 08:44:36.714108 progress 100 % (0 MB)
87 08:44:36.714718 0 MB downloaded in 0.04 s (1.18 MB/s)
88 08:44:36.715248 end: 1.3.1 http-download (duration 00:00:00) [common]
90 08:44:36.716189 end: 1.3 download-retry (duration 00:00:00) [common]
91 08:44:36.716506 start: 1.4 download-retry (timeout 00:09:59) [common]
92 08:44:36.716816 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 08:44:36.717324 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 08:44:36.717607 saving as /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/nfsrootfs/full.rootfs.tar
95 08:44:36.717842 total size: 474398908 (452 MB)
96 08:44:36.718078 Using unxz to decompress xz
97 08:44:36.756843 progress 0 % (0 MB)
98 08:44:37.897464 progress 5 % (22 MB)
99 08:44:39.370984 progress 10 % (45 MB)
100 08:44:39.812731 progress 15 % (67 MB)
101 08:44:40.589865 progress 20 % (90 MB)
102 08:44:41.132463 progress 25 % (113 MB)
103 08:44:41.495479 progress 30 % (135 MB)
104 08:44:42.116688 progress 35 % (158 MB)
105 08:44:43.032771 progress 40 % (181 MB)
106 08:44:43.881800 progress 45 % (203 MB)
107 08:44:44.437713 progress 50 % (226 MB)
108 08:44:45.089488 progress 55 % (248 MB)
109 08:44:46.308282 progress 60 % (271 MB)
110 08:44:47.818406 progress 65 % (294 MB)
111 08:44:49.542078 progress 70 % (316 MB)
112 08:44:52.622384 progress 75 % (339 MB)
113 08:44:55.088855 progress 80 % (361 MB)
114 08:44:58.024240 progress 85 % (384 MB)
115 08:45:01.686140 progress 90 % (407 MB)
116 08:45:04.855563 progress 95 % (429 MB)
117 08:45:08.022624 progress 100 % (452 MB)
118 08:45:08.035466 452 MB downloaded in 31.32 s (14.45 MB/s)
119 08:45:08.036076 end: 1.4.1 http-download (duration 00:00:31) [common]
121 08:45:08.037669 end: 1.4 download-retry (duration 00:00:31) [common]
122 08:45:08.038180 start: 1.5 download-retry (timeout 00:09:28) [common]
123 08:45:08.038803 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 08:45:08.039731 downloading http://storage.kernelci.org/next/master/next-20240830/arm64/defconfig/gcc-12/modules.tar.xz
125 08:45:08.040224 saving as /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/modules/modules.tar
126 08:45:08.040626 total size: 11553240 (11 MB)
127 08:45:08.041037 Using unxz to decompress xz
128 08:45:08.089080 progress 0 % (0 MB)
129 08:45:08.157633 progress 5 % (0 MB)
130 08:45:08.234281 progress 10 % (1 MB)
131 08:45:08.315862 progress 15 % (1 MB)
132 08:45:08.395963 progress 20 % (2 MB)
133 08:45:08.477598 progress 25 % (2 MB)
134 08:45:08.552229 progress 30 % (3 MB)
135 08:45:08.631079 progress 35 % (3 MB)
136 08:45:08.708385 progress 40 % (4 MB)
137 08:45:08.778861 progress 45 % (4 MB)
138 08:45:08.855820 progress 50 % (5 MB)
139 08:45:08.926999 progress 55 % (6 MB)
140 08:45:09.009604 progress 60 % (6 MB)
141 08:45:09.094921 progress 65 % (7 MB)
142 08:45:09.171574 progress 70 % (7 MB)
143 08:45:09.266982 progress 75 % (8 MB)
144 08:45:09.360948 progress 80 % (8 MB)
145 08:45:09.436395 progress 85 % (9 MB)
146 08:45:09.510536 progress 90 % (9 MB)
147 08:45:09.582218 progress 95 % (10 MB)
148 08:45:09.657493 progress 100 % (11 MB)
149 08:45:09.669445 11 MB downloaded in 1.63 s (6.76 MB/s)
150 08:45:09.670113 end: 1.5.1 http-download (duration 00:00:02) [common]
152 08:45:09.671110 end: 1.5 download-retry (duration 00:00:02) [common]
153 08:45:09.671436 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 08:45:09.671762 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 08:45:26.547696 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/676327/extract-nfsrootfs-i55ydk26
156 08:45:26.548446 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 08:45:26.548801 start: 1.6.2 lava-overlay (timeout 00:09:09) [common]
158 08:45:26.549623 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096
159 08:45:26.550179 makedir: /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin
160 08:45:26.550579 makedir: /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/tests
161 08:45:26.550971 makedir: /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/results
162 08:45:26.551370 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-add-keys
163 08:45:26.552053 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-add-sources
164 08:45:26.552730 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-background-process-start
165 08:45:26.553389 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-background-process-stop
166 08:45:26.554059 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-common-functions
167 08:45:26.554669 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-echo-ipv4
168 08:45:26.555273 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-install-packages
169 08:45:26.555899 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-installed-packages
170 08:45:26.556535 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-os-build
171 08:45:26.557127 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-probe-channel
172 08:45:26.557730 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-probe-ip
173 08:45:26.558310 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-target-ip
174 08:45:26.558884 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-target-mac
175 08:45:26.559524 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-target-storage
176 08:45:26.560187 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-test-case
177 08:45:26.560802 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-test-event
178 08:45:26.561376 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-test-feedback
179 08:45:26.561958 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-test-raise
180 08:45:26.562534 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-test-reference
181 08:45:26.563113 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-test-runner
182 08:45:26.563729 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-test-set
183 08:45:26.564387 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-test-shell
184 08:45:26.564987 Updating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-install-packages (oe)
185 08:45:26.565634 Updating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/bin/lava-installed-packages (oe)
186 08:45:26.566162 Creating /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/environment
187 08:45:26.566609 LAVA metadata
188 08:45:26.566915 - LAVA_JOB_ID=676327
189 08:45:26.567179 - LAVA_DISPATCHER_IP=192.168.6.2
190 08:45:26.567604 start: 1.6.2.1 ssh-authorize (timeout 00:09:09) [common]
191 08:45:26.568804 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 08:45:26.569181 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:09) [common]
193 08:45:26.569434 skipped lava-vland-overlay
194 08:45:26.569726 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 08:45:26.570033 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:09) [common]
196 08:45:26.570301 skipped lava-multinode-overlay
197 08:45:26.570595 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 08:45:26.570895 start: 1.6.2.4 test-definition (timeout 00:09:09) [common]
199 08:45:26.571193 Loading test definitions
200 08:45:26.571529 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:09) [common]
201 08:45:26.571798 Using /lava-676327 at stage 0
202 08:45:26.573328 uuid=676327_1.6.2.4.1 testdef=None
203 08:45:26.573754 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 08:45:26.574074 start: 1.6.2.4.2 test-overlay (timeout 00:09:09) [common]
205 08:45:26.576222 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 08:45:26.577196 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:09) [common]
208 08:45:26.579845 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 08:45:26.580895 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:09) [common]
211 08:45:26.583395 runner path: /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 676327_1.6.2.4.1
212 08:45:26.584129 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 08:45:26.585050 Creating lava-test-runner.conf files
215 08:45:26.585293 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/676327/lava-overlay-k48c8096/lava-676327/0 for stage 0
216 08:45:26.585710 - 0_v4l2-decoder-conformance-vp9
217 08:45:26.586122 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 08:45:26.586445 start: 1.6.2.5 compress-overlay (timeout 00:09:09) [common]
219 08:45:26.612557 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 08:45:26.612991 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:09) [common]
221 08:45:26.613307 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 08:45:26.613620 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 08:45:26.613936 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:09) [common]
224 08:45:27.231565 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 08:45:27.232076 start: 1.6.4 extract-modules (timeout 00:09:09) [common]
226 08:45:27.232332 extracting modules file /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/676327/extract-nfsrootfs-i55ydk26
227 08:45:28.582743 extracting modules file /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/676327/extract-overlay-ramdisk-nw_q64ua/ramdisk
228 08:45:29.960036 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 08:45:29.960506 start: 1.6.5 apply-overlay-tftp (timeout 00:09:06) [common]
230 08:45:29.960781 [common] Applying overlay to NFS
231 08:45:29.960993 [common] Applying overlay /var/lib/lava/dispatcher/tmp/676327/compress-overlay-4lbwwtgj/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/676327/extract-nfsrootfs-i55ydk26
232 08:45:29.989921 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 08:45:29.990282 start: 1.6.6 prepare-kernel (timeout 00:09:06) [common]
234 08:45:29.990549 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:06) [common]
235 08:45:29.990776 Converting downloaded kernel to a uImage
236 08:45:29.991088 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/kernel/Image /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/kernel/uImage
237 08:45:30.450242 output: Image Name:
238 08:45:30.450672 output: Created: Fri Aug 30 08:45:29 2024
239 08:45:30.450880 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 08:45:30.451085 output: Data Size: 45603328 Bytes = 44534.50 KiB = 43.49 MiB
241 08:45:30.451289 output: Load Address: 01080000
242 08:45:30.451491 output: Entry Point: 01080000
243 08:45:30.451693 output:
244 08:45:30.452058 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 08:45:30.452338 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 08:45:30.452616 start: 1.6.7 configure-preseed-file (timeout 00:09:05) [common]
247 08:45:30.452874 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 08:45:30.453131 start: 1.6.8 compress-ramdisk (timeout 00:09:05) [common]
249 08:45:30.453383 Building ramdisk /var/lib/lava/dispatcher/tmp/676327/extract-overlay-ramdisk-nw_q64ua/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/676327/extract-overlay-ramdisk-nw_q64ua/ramdisk
250 08:45:32.620424 >> 166014 blocks
251 08:45:40.712743 Adding RAMdisk u-boot header.
252 08:45:40.713413 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/676327/extract-overlay-ramdisk-nw_q64ua/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/676327/extract-overlay-ramdisk-nw_q64ua/ramdisk.cpio.gz.uboot
253 08:45:40.971096 output: Image Name:
254 08:45:40.971708 output: Created: Fri Aug 30 08:45:40 2024
255 08:45:40.972175 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 08:45:40.972582 output: Data Size: 23339645 Bytes = 22792.62 KiB = 22.26 MiB
257 08:45:40.972981 output: Load Address: 00000000
258 08:45:40.973379 output: Entry Point: 00000000
259 08:45:40.973797 output:
260 08:45:40.974832 rename /var/lib/lava/dispatcher/tmp/676327/extract-overlay-ramdisk-nw_q64ua/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/ramdisk/ramdisk.cpio.gz.uboot
261 08:45:40.975558 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 08:45:40.976135 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 08:45:40.976674 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:55) [common]
264 08:45:40.977130 No LXC device requested
265 08:45:40.977632 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 08:45:40.978138 start: 1.8 deploy-device-env (timeout 00:08:55) [common]
267 08:45:40.978628 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 08:45:40.979048 Checking files for TFTP limit of 4294967296 bytes.
269 08:45:40.981829 end: 1 tftp-deploy (duration 00:01:05) [common]
270 08:45:40.982438 start: 2 uboot-action (timeout 00:05:00) [common]
271 08:45:40.982965 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 08:45:40.983459 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 08:45:40.983961 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 08:45:40.984513 Using kernel file from prepare-kernel: 676327/tftp-deploy-d85m1ti9/kernel/uImage
275 08:45:40.985163 substitutions:
276 08:45:40.985582 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 08:45:40.985983 - {DTB_ADDR}: 0x01070000
278 08:45:40.986375 - {DTB}: 676327/tftp-deploy-d85m1ti9/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 08:45:40.986769 - {INITRD}: 676327/tftp-deploy-d85m1ti9/ramdisk/ramdisk.cpio.gz.uboot
280 08:45:40.987160 - {KERNEL_ADDR}: 0x01080000
281 08:45:40.987548 - {KERNEL}: 676327/tftp-deploy-d85m1ti9/kernel/uImage
282 08:45:40.987938 - {LAVA_MAC}: None
283 08:45:40.988399 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/676327/extract-nfsrootfs-i55ydk26
284 08:45:40.988845 - {NFS_SERVER_IP}: 192.168.6.2
285 08:45:40.989248 - {PRESEED_CONFIG}: None
286 08:45:40.989641 - {PRESEED_LOCAL}: None
287 08:45:40.990027 - {RAMDISK_ADDR}: 0x08000000
288 08:45:40.990411 - {RAMDISK}: 676327/tftp-deploy-d85m1ti9/ramdisk/ramdisk.cpio.gz.uboot
289 08:45:40.990797 - {ROOT_PART}: None
290 08:45:40.991183 - {ROOT}: None
291 08:45:40.991565 - {SERVER_IP}: 192.168.6.2
292 08:45:40.991950 - {TEE_ADDR}: 0x83000000
293 08:45:40.992387 - {TEE}: None
294 08:45:40.992784 Parsed boot commands:
295 08:45:40.993165 - setenv autoload no
296 08:45:40.993549 - setenv initrd_high 0xffffffff
297 08:45:40.993935 - setenv fdt_high 0xffffffff
298 08:45:40.994316 - dhcp
299 08:45:40.994697 - setenv serverip 192.168.6.2
300 08:45:40.995078 - tftpboot 0x01080000 676327/tftp-deploy-d85m1ti9/kernel/uImage
301 08:45:40.995462 - tftpboot 0x08000000 676327/tftp-deploy-d85m1ti9/ramdisk/ramdisk.cpio.gz.uboot
302 08:45:40.995865 - tftpboot 0x01070000 676327/tftp-deploy-d85m1ti9/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 08:45:40.996323 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/676327/extract-nfsrootfs-i55ydk26,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 08:45:40.996737 - bootm 0x01080000 0x08000000 0x01070000
305 08:45:40.997257 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 08:45:40.998741 start: 2.3 connect-device (timeout 00:05:00) [common]
308 08:45:40.999159 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 08:45:41.015150 Setting prompt string to ['lava-test: # ']
310 08:45:41.016675 end: 2.3 connect-device (duration 00:00:00) [common]
311 08:45:41.017271 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 08:45:41.017796 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 08:45:41.018313 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 08:45:41.019429 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 08:45:41.056459 >> OK - accepted request
316 08:45:41.059676 Returned 0 in 0 seconds
317 08:45:41.160881 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 08:45:41.162609 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 08:45:41.163229 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 08:45:41.163754 Setting prompt string to ['Hit any key to stop autoboot']
322 08:45:41.164274 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 08:45:41.165847 Trying 192.168.56.21...
324 08:45:41.166333 Connected to conserv1.
325 08:45:41.166752 Escape character is '^]'.
326 08:45:41.167162
327 08:45:41.167618 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 08:45:41.168099
329 08:45:48.878776 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 08:45:48.879383 bl2_stage_init 0x01
331 08:45:48.879801 bl2_stage_init 0x81
332 08:45:48.884426 hw id: 0x0000 - pwm id 0x01
333 08:45:48.884916 bl2_stage_init 0xc1
334 08:45:48.889961 bl2_stage_init 0x02
335 08:45:48.890449
336 08:45:48.890882 L0:00000000
337 08:45:48.891284 L1:00000703
338 08:45:48.891678 L2:00008067
339 08:45:48.892108 L3:15000000
340 08:45:48.895572 S1:00000000
341 08:45:48.896077 B2:20282000
342 08:45:48.896503 B1:a0f83180
343 08:45:48.896899
344 08:45:48.897293 TE: 70689
345 08:45:48.897687
346 08:45:48.901201 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 08:45:48.901683
348 08:45:48.906769 Board ID = 1
349 08:45:48.907241 Set cpu clk to 24M
350 08:45:48.907636 Set clk81 to 24M
351 08:45:48.912321 Use GP1_pll as DSU clk.
352 08:45:48.912794 DSU clk: 1200 Mhz
353 08:45:48.913192 CPU clk: 1200 MHz
354 08:45:48.917912 Set clk81 to 166.6M
355 08:45:48.923506 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 08:45:48.924010 board id: 1
357 08:45:48.929814 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 08:45:48.941356 fw parse done
359 08:45:48.946371 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 08:45:48.989089 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 08:45:49.000916 PIEI prepare done
362 08:45:49.001449 fastboot data load
363 08:45:49.001870 fastboot data verify
364 08:45:49.006500 verify result: 266
365 08:45:49.012203 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 08:45:49.012704 LPDDR4 probe
367 08:45:49.013128 ddr clk to 1584MHz
368 08:45:49.020058 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 08:45:49.056486
370 08:45:49.057017 dmc_version 0001
371 08:45:49.063035 Check phy result
372 08:45:49.069901 INFO : End of CA training
373 08:45:49.070414 INFO : End of initialization
374 08:45:49.075642 INFO : Training has run successfully!
375 08:45:49.076173 Check phy result
376 08:45:49.081178 INFO : End of initialization
377 08:45:49.081651 INFO : End of read enable training
378 08:45:49.086706 INFO : End of fine write leveling
379 08:45:49.092313 INFO : End of Write leveling coarse delay
380 08:45:49.092799 INFO : Training has run successfully!
381 08:45:49.093207 Check phy result
382 08:45:49.097953 INFO : End of initialization
383 08:45:49.098430 INFO : End of read dq deskew training
384 08:45:49.103527 INFO : End of MPR read delay center optimization
385 08:45:49.109157 INFO : End of write delay center optimization
386 08:45:49.114700 INFO : End of read delay center optimization
387 08:45:49.115180 INFO : End of max read latency training
388 08:45:49.120282 INFO : Training has run successfully!
389 08:45:49.120755 1D training succeed
390 08:45:49.128499 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 08:45:49.176101 Check phy result
392 08:45:49.176505 INFO : End of initialization
393 08:45:49.198392 INFO : End of 2D read delay Voltage center optimization
394 08:45:49.218587 INFO : End of 2D read delay Voltage center optimization
395 08:45:49.270485 INFO : End of 2D write delay Voltage center optimization
396 08:45:49.319613 INFO : End of 2D write delay Voltage center optimization
397 08:45:49.325207 INFO : Training has run successfully!
398 08:45:49.325509
399 08:45:49.325734 channel==0
400 08:45:49.330758 RxClkDly_Margin_A0==78 ps 8
401 08:45:49.331048 TxDqDly_Margin_A0==98 ps 10
402 08:45:49.334176 RxClkDly_Margin_A1==88 ps 9
403 08:45:49.334470 TxDqDly_Margin_A1==88 ps 9
404 08:45:49.339745 TrainedVREFDQ_A0==74
405 08:45:49.340056 TrainedVREFDQ_A1==74
406 08:45:49.340272 VrefDac_Margin_A0==23
407 08:45:49.345285 DeviceVref_Margin_A0==40
408 08:45:49.345576 VrefDac_Margin_A1==22
409 08:45:49.350870 DeviceVref_Margin_A1==40
410 08:45:49.351204
411 08:45:49.351417
412 08:45:49.351620 channel==1
413 08:45:49.351824 RxClkDly_Margin_A0==78 ps 8
414 08:45:49.356477 TxDqDly_Margin_A0==98 ps 10
415 08:45:49.356766 RxClkDly_Margin_A1==78 ps 8
416 08:45:49.362274 TxDqDly_Margin_A1==88 ps 9
417 08:45:49.362610 TrainedVREFDQ_A0==78
418 08:45:49.362831 TrainedVREFDQ_A1==75
419 08:45:49.367654 VrefDac_Margin_A0==23
420 08:45:49.367963 DeviceVref_Margin_A0==36
421 08:45:49.373676 VrefDac_Margin_A1==20
422 08:45:49.373966 DeviceVref_Margin_A1==39
423 08:45:49.374177
424 08:45:49.378975 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 08:45:49.379297
426 08:45:49.406898 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000019 00000017 00000019 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 08:45:49.412546 2D training succeed
428 08:45:49.418162 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 08:45:49.418477 auto size-- 65535DDR cs0 size: 2048MB
430 08:45:49.423683 DDR cs1 size: 2048MB
431 08:45:49.424023 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 08:45:49.429309 cs0 DataBus test pass
433 08:45:49.429612 cs1 DataBus test pass
434 08:45:49.429840 cs0 AddrBus test pass
435 08:45:49.434882 cs1 AddrBus test pass
436 08:45:49.435188
437 08:45:49.435406 100bdlr_step_size ps== 464
438 08:45:49.435622 result report
439 08:45:49.440553 boot times 0Enable ddr reg access
440 08:45:49.447107 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 08:45:49.461878 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 08:45:50.116903 bl2z: ptr: 05129330, size: 00001e40
443 08:45:50.123760 0.0;M3 CHK:0;cm4_sp_mode 0
444 08:45:50.124263 MVN_1=0x00000000
445 08:45:50.124672 MVN_2=0x00000000
446 08:45:50.135266 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 08:45:50.135710 OPS=0x04
448 08:45:50.136139 ring efuse init
449 08:45:50.140933 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 08:45:50.141371 [0.017319 Inits done]
451 08:45:50.141764 secure task start!
452 08:45:50.148007 high task start!
453 08:45:50.148436 low task start!
454 08:45:50.148832 run into bl31
455 08:45:50.157547 NOTICE: BL31: v1.3(release):4fc40b1
456 08:45:50.164433 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 08:45:50.164889 NOTICE: BL31: G12A normal boot!
458 08:45:50.180754 NOTICE: BL31: BL33 decompress pass
459 08:45:50.186452 ERROR: Error initializing runtime service opteed_fast
460 08:45:51.428525 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 08:45:51.429200 bl2_stage_init 0x01
462 08:45:51.429672 bl2_stage_init 0x81
463 08:45:51.434240 hw id: 0x0000 - pwm id 0x01
464 08:45:51.434850 bl2_stage_init 0xc1
465 08:45:51.435278 bl2_stage_init 0x02
466 08:45:51.435696
467 08:45:51.439835 L0:00000000
468 08:45:51.440613 L1:00000703
469 08:45:51.441026 L2:00008067
470 08:45:51.441424 L3:15000000
471 08:45:51.441814 S1:00000000
472 08:45:51.445468 B2:20282000
473 08:45:51.445878 B1:a0f83180
474 08:45:51.446099
475 08:45:51.446314 TE: 69555
476 08:45:51.446545
477 08:45:51.451081 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 08:45:51.451504
479 08:45:51.456546 Board ID = 1
480 08:45:51.456960 Set cpu clk to 24M
481 08:45:51.457168 Set clk81 to 24M
482 08:45:51.462175 Use GP1_pll as DSU clk.
483 08:45:51.462672 DSU clk: 1200 Mhz
484 08:45:51.463113 CPU clk: 1200 MHz
485 08:45:51.463547 Set clk81 to 166.6M
486 08:45:51.473518 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 08:45:51.473952 board id: 1
488 08:45:51.479134 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 08:45:51.490626 fw parse done
490 08:45:51.495791 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 08:45:51.539216 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 08:45:51.550909 PIEI prepare done
493 08:45:51.551341 fastboot data load
494 08:45:51.551572 fastboot data verify
495 08:45:51.556468 verify result: 266
496 08:45:51.562008 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 08:45:51.562376 LPDDR4 probe
498 08:45:51.562583 ddr clk to 1584MHz
499 08:45:51.570405 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 08:45:52.925560 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
501 08:45:52.926230 bl2_stage_init 0x01
502 08:45:52.926700 bl2_stage_init 0x81
503 08:45:52.931018 hw id: 0x0000 - pwm id 0x01
504 08:45:52.931591 bl2_stage_init 0xc1
505 08:45:52.936520 bl2_stage_init 0x02
506 08:45:52.937000
507 08:45:52.937468 L0:00000000
508 08:45:52.937913 L1:00000703
509 08:45:52.938355 L2:00008067
510 08:45:52.938797 L3:15000000
511 08:45:52.942199 S1:00000000
512 08:45:52.942670 B2:20282000
513 08:45:52.943114 B1:a0f83180
514 08:45:52.943553
515 08:45:52.944023 TE: 67645
516 08:45:52.944469
517 08:45:52.947715 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
518 08:45:52.948257
519 08:45:52.953550 Board ID = 1
520 08:45:52.954049 Set cpu clk to 24M
521 08:45:52.954494 Set clk81 to 24M
522 08:45:52.958996 Use GP1_pll as DSU clk.
523 08:45:52.959521 DSU clk: 1200 Mhz
524 08:45:52.959969 CPU clk: 1200 MHz
525 08:45:52.964542 Set clk81 to 166.6M
526 08:45:52.970150 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
527 08:45:52.970471 board id: 1
528 08:45:52.977407 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
529 08:45:52.988307 fw parse done
530 08:45:52.994231 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
531 08:45:53.037330 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
532 08:45:53.048422 PIEI prepare done
533 08:45:53.048897 fastboot data load
534 08:45:53.049325 fastboot data verify
535 08:45:53.054206 verify result: 266
536 08:45:53.059760 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
537 08:45:53.060300 LPDDR4 probe
538 08:45:53.060729 ddr clk to 1584MHz
539 08:45:53.067783 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 08:45:53.104702
541 08:45:53.105446 dmc_version 0001
542 08:45:53.112671 Check phy result
543 08:45:53.118642 INFO : End of CA training
544 08:45:53.119313 INFO : End of initialization
545 08:45:53.124286 INFO : Training has run successfully!
546 08:45:53.124955 Check phy result
547 08:45:53.129830 INFO : End of initialization
548 08:45:53.130498 INFO : End of read enable training
549 08:45:53.135415 INFO : End of fine write leveling
550 08:45:53.141088 INFO : End of Write leveling coarse delay
551 08:45:53.141486 INFO : Training has run successfully!
552 08:45:53.141771 Check phy result
553 08:45:53.146604 INFO : End of initialization
554 08:45:53.147145 INFO : End of read dq deskew training
555 08:45:53.152262 INFO : End of MPR read delay center optimization
556 08:45:53.157858 INFO : End of write delay center optimization
557 08:45:53.163419 INFO : End of read delay center optimization
558 08:45:53.164148 INFO : End of max read latency training
559 08:45:53.169028 INFO : Training has run successfully!
560 08:45:53.169677 1D training succeed
561 08:45:53.178184 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
562 08:45:53.225590 Check phy result
563 08:45:53.226260 INFO : End of initialization
564 08:45:53.253909 INFO : End of 2D read delay Voltage center optimization
565 08:45:53.278057 INFO : End of 2D read delay Voltage center optimization
566 08:45:53.334733 INFO : End of 2D write delay Voltage center optimization
567 08:45:53.388964 INFO : End of 2D write delay Voltage center optimization
568 08:45:53.394414 INFO : Training has run successfully!
569 08:45:53.395074
570 08:45:53.395632 channel==0
571 08:45:53.399949 RxClkDly_Margin_A0==69 ps 7
572 08:45:53.400644 TxDqDly_Margin_A0==88 ps 9
573 08:45:53.405500 RxClkDly_Margin_A1==78 ps 8
574 08:45:53.406143 TxDqDly_Margin_A1==98 ps 10
575 08:45:53.406696 TrainedVREFDQ_A0==75
576 08:45:53.411137 TrainedVREFDQ_A1==75
577 08:45:53.411810 VrefDac_Margin_A0==23
578 08:45:53.412406 DeviceVref_Margin_A0==39
579 08:45:53.416872 VrefDac_Margin_A1==23
580 08:45:53.417532 DeviceVref_Margin_A1==39
581 08:45:53.418082
582 08:45:53.418621
583 08:45:53.419141 channel==1
584 08:45:53.422332 RxClkDly_Margin_A0==78 ps 8
585 08:45:53.422973 TxDqDly_Margin_A0==98 ps 10
586 08:45:53.427967 RxClkDly_Margin_A1==78 ps 8
587 08:45:53.428649 TxDqDly_Margin_A1==88 ps 9
588 08:45:53.433517 TrainedVREFDQ_A0==78
589 08:45:53.434158 TrainedVREFDQ_A1==75
590 08:45:53.434703 VrefDac_Margin_A0==22
591 08:45:53.439139 DeviceVref_Margin_A0==36
592 08:45:53.439783 VrefDac_Margin_A1==22
593 08:45:53.444910 DeviceVref_Margin_A1==39
594 08:45:53.445555
595 08:45:53.446108 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
596 08:45:53.446647
597 08:45:53.478252 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
598 08:45:53.478982 2D training succeed
599 08:45:53.483962 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
600 08:45:53.489499 auto size-- 65535DDR cs0 size: 2048MB
601 08:45:53.490156 DDR cs1 size: 2048MB
602 08:45:53.495135 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
603 08:45:53.495779 cs0 DataBus test pass
604 08:45:53.500718 cs1 DataBus test pass
605 08:45:53.501386 cs0 AddrBus test pass
606 08:45:53.501934 cs1 AddrBus test pass
607 08:45:53.502455
608 08:45:53.506372 100bdlr_step_size ps== 471
609 08:45:53.507035 result report
610 08:45:53.511908 boot times 0Enable ddr reg access
611 08:45:53.517093 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
612 08:45:53.530792 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
613 08:45:54.189360 bl2z: ptr: 05129330, size: 00001e40
614 08:45:54.199124 0.0;M3 CHK:0;cm4_sp_mode 0
615 08:45:54.199743 MVN_1=0x00000000
616 08:45:54.200324 MVN_2=0x00000000
617 08:45:54.210702 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
618 08:45:54.211244 OPS=0x04
619 08:45:54.211709 ring efuse init
620 08:45:54.213658 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
621 08:45:54.219867 [0.017354 Inits done]
622 08:45:54.220416 secure task start!
623 08:45:54.220879 high task start!
624 08:45:54.221326 low task start!
625 08:45:54.224137 run into bl31
626 08:45:54.232738 NOTICE: BL31: v1.3(release):4fc40b1
627 08:45:54.240546 NOTICE: BL31: Built : 15:57:33, May 22 2019
628 08:45:54.241090 NOTICE: BL31: G12A normal boot!
629 08:45:54.256279 NOTICE: BL31: BL33 decompress pass
630 08:45:54.261978 ERROR: Error initializing runtime service opteed_fast
631 08:45:55.478860 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
632 08:45:55.479511 bl2_stage_init 0x01
633 08:45:55.480013 bl2_stage_init 0x81
634 08:45:55.484329 hw id: 0x0000 - pwm id 0x01
635 08:45:55.484838 bl2_stage_init 0xc1
636 08:45:55.489946 bl2_stage_init 0x02
637 08:45:55.490441
638 08:45:55.490903 L0:00000000
639 08:45:55.491348 L1:00000703
640 08:45:55.491796 L2:00008067
641 08:45:55.492274 L3:15000000
642 08:45:55.495493 S1:00000000
643 08:45:55.495973 B2:20282000
644 08:45:55.496454 B1:a0f83180
645 08:45:55.496902
646 08:45:55.497348 TE: 70463
647 08:45:55.497792
648 08:45:55.501116 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
649 08:45:55.501656
650 08:45:55.506681 Board ID = 1
651 08:45:55.507194 Set cpu clk to 24M
652 08:45:55.507659 Set clk81 to 24M
653 08:45:55.512351 Use GP1_pll as DSU clk.
654 08:45:55.512853 DSU clk: 1200 Mhz
655 08:45:55.513310 CPU clk: 1200 MHz
656 08:45:55.517859 Set clk81 to 166.6M
657 08:45:55.523460 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
658 08:45:55.523953 board id: 1
659 08:45:55.530673 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
660 08:45:55.541369 fw parse done
661 08:45:55.547318 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
662 08:45:55.589984 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
663 08:45:55.600993 PIEI prepare done
664 08:45:55.601488 fastboot data load
665 08:45:55.601950 fastboot data verify
666 08:45:55.606455 verify result: 266
667 08:45:55.612073 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
668 08:45:55.612571 LPDDR4 probe
669 08:45:55.613027 ddr clk to 1584MHz
670 08:45:55.620039 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
671 08:45:55.657297
672 08:45:55.657813 dmc_version 0001
673 08:45:55.664045 Check phy result
674 08:45:55.669928 INFO : End of CA training
675 08:45:55.670418 INFO : End of initialization
676 08:45:55.675475 INFO : Training has run successfully!
677 08:45:55.675969 Check phy result
678 08:45:55.681062 INFO : End of initialization
679 08:45:55.681554 INFO : End of read enable training
680 08:45:55.684366 INFO : End of fine write leveling
681 08:45:55.689929 INFO : End of Write leveling coarse delay
682 08:45:55.695510 INFO : Training has run successfully!
683 08:45:55.696020 Check phy result
684 08:45:55.696477 INFO : End of initialization
685 08:45:55.701145 INFO : End of read dq deskew training
686 08:45:55.706684 INFO : End of MPR read delay center optimization
687 08:45:55.707179 INFO : End of write delay center optimization
688 08:45:55.712278 INFO : End of read delay center optimization
689 08:45:55.717924 INFO : End of max read latency training
690 08:45:55.718416 INFO : Training has run successfully!
691 08:45:55.723475 1D training succeed
692 08:45:55.729443 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
693 08:45:55.777047 Check phy result
694 08:45:55.777563 INFO : End of initialization
695 08:45:55.799402 INFO : End of 2D read delay Voltage center optimization
696 08:45:55.817803 INFO : End of 2D read delay Voltage center optimization
697 08:45:55.870480 INFO : End of 2D write delay Voltage center optimization
698 08:45:55.919668 INFO : End of 2D write delay Voltage center optimization
699 08:45:55.925202 INFO : Training has run successfully!
700 08:45:55.925703
701 08:45:55.926167 channel==0
702 08:45:55.930911 RxClkDly_Margin_A0==88 ps 9
703 08:45:55.931416 TxDqDly_Margin_A0==88 ps 9
704 08:45:55.934338 RxClkDly_Margin_A1==88 ps 9
705 08:45:55.934826 TxDqDly_Margin_A1==88 ps 9
706 08:45:55.939668 TrainedVREFDQ_A0==77
707 08:45:55.940191 TrainedVREFDQ_A1==74
708 08:45:55.940651 VrefDac_Margin_A0==24
709 08:45:55.945293 DeviceVref_Margin_A0==37
710 08:45:55.945777 VrefDac_Margin_A1==22
711 08:45:55.950874 DeviceVref_Margin_A1==40
712 08:45:55.951359
713 08:45:55.951811
714 08:45:55.952297 channel==1
715 08:45:55.952748 RxClkDly_Margin_A0==78 ps 8
716 08:45:55.954553 TxDqDly_Margin_A0==98 ps 10
717 08:45:55.960064 RxClkDly_Margin_A1==88 ps 9
718 08:45:55.960547 TxDqDly_Margin_A1==88 ps 9
719 08:45:55.960998 TrainedVREFDQ_A0==78
720 08:45:55.965672 TrainedVREFDQ_A1==75
721 08:45:55.966162 VrefDac_Margin_A0==23
722 08:45:55.971292 DeviceVref_Margin_A0==36
723 08:45:55.971773 VrefDac_Margin_A1==23
724 08:45:55.972251 DeviceVref_Margin_A1==39
725 08:45:55.972691
726 08:45:55.976964 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
727 08:45:55.977449
728 08:45:56.010490 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000018 00000019 00000015 00000018 00000014 00000015 00000017 00000018 0000001a 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
729 08:45:56.011036 2D training succeed
730 08:45:56.016068 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
731 08:45:56.021557 auto size-- 65535DDR cs0 size: 2048MB
732 08:45:56.022046 DDR cs1 size: 2048MB
733 08:45:56.027154 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
734 08:45:56.027644 cs0 DataBus test pass
735 08:45:56.028144 cs1 DataBus test pass
736 08:45:56.032777 cs0 AddrBus test pass
737 08:45:56.033264 cs1 AddrBus test pass
738 08:45:56.033711
739 08:45:56.038331 100bdlr_step_size ps== 478
740 08:45:56.038825 result report
741 08:45:56.039272 boot times 0Enable ddr reg access
742 08:45:56.047858 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
743 08:45:56.061659 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
744 08:45:56.716133 bl2z: ptr: 05129330, size: 00001e40
745 08:45:56.723127 0.0;M3 CHK:0;cm4_sp_mode 0
746 08:45:56.723711 MVN_1=0x00000000
747 08:45:56.724196 MVN_2=0x00000000
748 08:45:56.734726 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
749 08:45:56.735072 OPS=0x04
750 08:45:56.735276 ring efuse init
751 08:45:56.740167 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
752 08:45:56.740459 [0.017319 Inits done]
753 08:45:56.740662 secure task start!
754 08:45:56.747535 high task start!
755 08:45:56.748105 low task start!
756 08:45:56.748581 run into bl31
757 08:45:56.756083 NOTICE: BL31: v1.3(release):4fc40b1
758 08:45:56.763761 NOTICE: BL31: Built : 15:57:33, May 22 2019
759 08:45:56.764302 NOTICE: BL31: G12A normal boot!
760 08:45:56.779281 NOTICE: BL31: BL33 decompress pass
761 08:45:56.785050 ERROR: Error initializing runtime service opteed_fast
762 08:45:57.580433
763 08:45:57.581101
764 08:45:57.585811 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
765 08:45:57.586317
766 08:45:57.589294 Model: Libre Computer AML-S905D3-CC Solitude
767 08:45:57.736328 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
768 08:45:57.751704 DRAM: 2 GiB (effective 3.8 GiB)
769 08:45:57.852659 Core: 406 devices, 33 uclasses, devicetree: separate
770 08:45:57.858521 WDT: Not starting watchdog@f0d0
771 08:45:57.883587 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
772 08:45:57.895865 Loading Environment from FAT... Card did not respond to voltage select! : -110
773 08:45:57.900817 ** Bad device specification mmc 0 **
774 08:45:57.911017 Card did not respond to voltage select! : -110
775 08:45:57.918518 ** Bad device specification mmc 0 **
776 08:45:57.919024 Couldn't find partition mmc 0
777 08:45:57.926858 Card did not respond to voltage select! : -110
778 08:45:57.932362 ** Bad device specification mmc 0 **
779 08:45:57.932852 Couldn't find partition mmc 0
780 08:45:57.937434 Error: could not access storage.
781 08:45:58.234833 Net: eth0: ethernet@ff3f0000
782 08:45:58.235500 starting USB...
783 08:45:58.479541 Bus usb@ff500000: Register 3000140 NbrPorts 3
784 08:45:58.480167 Starting the controller
785 08:45:58.486477 USB XHCI 1.10
786 08:46:00.040781 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
787 08:46:00.049124 scanning usb for storage devices... 0 Storage Device(s) found
789 08:46:00.100161 Hit any key to stop autoboot: 1
790 08:46:00.100880 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
791 08:46:00.101243 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
792 08:46:00.101501 Setting prompt string to ['=>']
793 08:46:00.101758 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
794 08:46:00.115110 0
795 08:46:00.115739 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
797 08:46:00.216551 => setenv autoload no
798 08:46:00.217057 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
799 08:46:00.221211 setenv autoload no
801 08:46:00.322215 => setenv initrd_high 0xffffffff
802 08:46:00.322732 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
803 08:46:00.326929 setenv initrd_high 0xffffffff
805 08:46:00.427906 => setenv fdt_high 0xffffffff
806 08:46:00.428509 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
807 08:46:00.431709 setenv fdt_high 0xffffffff
809 08:46:00.532743 => dhcp
810 08:46:00.533238 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
811 08:46:00.537252 dhcp
812 08:46:01.493284 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
813 08:46:01.493699 Speed: 1000, full duplex
814 08:46:01.493924 BOOTP broadcast 1
815 08:46:01.741531 BOOTP broadcast 2
816 08:46:02.242591 BOOTP broadcast 3
817 08:46:03.243686 BOOTP broadcast 4
818 08:46:05.244641 BOOTP broadcast 5
819 08:46:05.256981 DHCP client bound to address 192.168.6.12 (3763 ms)
821 08:46:05.358139 => setenv serverip 192.168.6.2
822 08:46:05.358775 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
823 08:46:05.363200 setenv serverip 192.168.6.2
825 08:46:05.464202 => tftpboot 0x01080000 676327/tftp-deploy-d85m1ti9/kernel/uImage
826 08:46:05.464843 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
827 08:46:05.471413 tftpboot 0x01080000 676327/tftp-deploy-d85m1ti9/kernel/uImage
828 08:46:05.471743 Speed: 1000, full duplex
829 08:46:05.471964 Using ethernet@ff3f0000 device
830 08:46:05.476901 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
831 08:46:05.482432 Filename '676327/tftp-deploy-d85m1ti9/kernel/uImage'.
832 08:46:05.486481 Load address: 0x1080000
833 08:46:08.335113 Loading: *################################################## 43.5 MiB
834 08:46:08.335816 15.3 MiB/s
835 08:46:08.336526 done
836 08:46:08.339510 Bytes transferred = 45603392 (2b7da40 hex)
838 08:46:08.441255 => tftpboot 0x08000000 676327/tftp-deploy-d85m1ti9/ramdisk/ramdisk.cpio.gz.uboot
839 08:46:08.442113 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:33)
840 08:46:08.448786 tftpboot 0x08000000 676327/tftp-deploy-d85m1ti9/ramdisk/ramdisk.cpio.gz.uboot
841 08:46:08.449281 Speed: 1000, full duplex
842 08:46:08.449681 Using ethernet@ff3f0000 device
843 08:46:08.454481 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
844 08:46:08.464166 Filename '676327/tftp-deploy-d85m1ti9/ramdisk/ramdisk.cpio.gz.uboot'.
845 08:46:08.464725 Load address: 0x8000000
846 08:46:09.946647 Loading: *################################################# UDP wrong checksum 00000005 00007dde
847 08:46:14.946715 T UDP wrong checksum 00000005 00007dde
848 08:46:24.948432 T T UDP wrong checksum 00000005 00007dde
849 08:46:44.952691 T T T T UDP wrong checksum 00000005 00007dde
850 08:47:04.957372 T T T
851 08:47:04.957806 Retry count exceeded; starting again
853 08:47:04.958726 end: 2.4.3 bootloader-commands (duration 00:01:05) [common]
856 08:47:04.959765 end: 2.4 uboot-commands (duration 00:01:24) [common]
858 08:47:04.960610 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
860 08:47:04.961233 end: 2 uboot-action (duration 00:01:24) [common]
862 08:47:04.962126 Cleaning after the job
863 08:47:04.962448 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/ramdisk
864 08:47:04.963280 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/kernel
865 08:47:04.977513 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/dtb
866 08:47:04.978369 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/nfsrootfs
867 08:47:05.084083 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/676327/tftp-deploy-d85m1ti9/modules
868 08:47:05.090656 start: 4.1 power-off (timeout 00:00:30) [common]
869 08:47:05.091249 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
870 08:47:05.128368 >> OK - accepted request
871 08:47:05.130245 Returned 0 in 0 seconds
872 08:47:05.231033 end: 4.1 power-off (duration 00:00:00) [common]
874 08:47:05.232064 start: 4.2 read-feedback (timeout 00:10:00) [common]
875 08:47:05.232727 Listened to connection for namespace 'common' for up to 1s
876 08:47:06.233638 Finalising connection for namespace 'common'
877 08:47:06.234118 Disconnecting from shell: Finalise
878 08:47:06.234445 =>
879 08:47:06.335149 end: 4.2 read-feedback (duration 00:00:01) [common]
880 08:47:06.335639 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/676327
881 08:47:08.871951 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/676327
882 08:47:08.872586 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.