Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:57:27.656184 lava-dispatcher, installed at version: 2024.01
2 09:57:27.657019 start: 0 validate
3 09:57:27.657507 Start time: 2024-09-02 09:57:27.657478+00:00 (UTC)
4 09:57:27.658064 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:57:27.658611 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:57:27.694916 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:57:27.695470 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240902%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fkernel%2FImage exists
8 09:57:27.723962 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:57:27.724657 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240902%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 09:57:27.756807 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:57:27.757343 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:57:27.790394 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 09:57:27.790925 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240902%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fmodules.tar.xz exists
14 09:57:27.828721 validate duration: 0.17
16 09:57:27.829696 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:57:27.830112 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:57:27.830481 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:57:27.831062 Not decompressing ramdisk as can be used compressed.
20 09:57:27.831506 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 09:57:27.831804 saving as /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/ramdisk/initrd.cpio.gz
22 09:57:27.832132 total size: 5628182 (5 MB)
23 09:57:27.873684 progress 0 % (0 MB)
24 09:57:27.878682 progress 5 % (0 MB)
25 09:57:27.883512 progress 10 % (0 MB)
26 09:57:27.887513 progress 15 % (0 MB)
27 09:57:27.892024 progress 20 % (1 MB)
28 09:57:27.896398 progress 25 % (1 MB)
29 09:57:27.901119 progress 30 % (1 MB)
30 09:57:27.905637 progress 35 % (1 MB)
31 09:57:27.909568 progress 40 % (2 MB)
32 09:57:27.914699 progress 45 % (2 MB)
33 09:57:27.918780 progress 50 % (2 MB)
34 09:57:27.923380 progress 55 % (2 MB)
35 09:57:27.928103 progress 60 % (3 MB)
36 09:57:27.931927 progress 65 % (3 MB)
37 09:57:27.936795 progress 70 % (3 MB)
38 09:57:27.940715 progress 75 % (4 MB)
39 09:57:27.945701 progress 80 % (4 MB)
40 09:57:27.949705 progress 85 % (4 MB)
41 09:57:27.954325 progress 90 % (4 MB)
42 09:57:27.958235 progress 95 % (5 MB)
43 09:57:27.961874 progress 100 % (5 MB)
44 09:57:27.962688 5 MB downloaded in 0.13 s (41.12 MB/s)
45 09:57:27.963324 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:57:27.964402 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:57:27.964773 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:57:27.965090 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:57:27.965645 downloading http://storage.kernelci.org/next/master/next-20240902/arm64/defconfig+kselftest/gcc-12/kernel/Image
51 09:57:27.965895 saving as /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/kernel/Image
52 09:57:27.966190 total size: 65890816 (62 MB)
53 09:57:27.966435 No compression specified
54 09:57:28.001915 progress 0 % (0 MB)
55 09:57:28.049250 progress 5 % (3 MB)
56 09:57:28.098276 progress 10 % (6 MB)
57 09:57:28.139183 progress 15 % (9 MB)
58 09:57:28.180292 progress 20 % (12 MB)
59 09:57:28.220882 progress 25 % (15 MB)
60 09:57:28.261882 progress 30 % (18 MB)
61 09:57:28.302677 progress 35 % (22 MB)
62 09:57:28.344198 progress 40 % (25 MB)
63 09:57:28.385196 progress 45 % (28 MB)
64 09:57:28.426112 progress 50 % (31 MB)
65 09:57:28.466252 progress 55 % (34 MB)
66 09:57:28.507303 progress 60 % (37 MB)
67 09:57:28.548771 progress 65 % (40 MB)
68 09:57:28.589529 progress 70 % (44 MB)
69 09:57:28.630685 progress 75 % (47 MB)
70 09:57:28.670583 progress 80 % (50 MB)
71 09:57:28.711461 progress 85 % (53 MB)
72 09:57:28.752301 progress 90 % (56 MB)
73 09:57:28.793088 progress 95 % (59 MB)
74 09:57:28.833175 progress 100 % (62 MB)
75 09:57:28.833937 62 MB downloaded in 0.87 s (72.42 MB/s)
76 09:57:28.834422 end: 1.2.1 http-download (duration 00:00:01) [common]
78 09:57:28.835225 end: 1.2 download-retry (duration 00:00:01) [common]
79 09:57:28.835500 start: 1.3 download-retry (timeout 00:09:59) [common]
80 09:57:28.835762 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 09:57:28.836246 downloading http://storage.kernelci.org/next/master/next-20240902/arm64/defconfig+kselftest/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 09:57:28.836523 saving as /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/dtb/meson-g12b-a311d-libretech-cc.dtb
83 09:57:28.836731 total size: 54667 (0 MB)
84 09:57:28.836940 No compression specified
85 09:57:28.875289 progress 59 % (0 MB)
86 09:57:28.876477 progress 100 % (0 MB)
87 09:57:28.877037 0 MB downloaded in 0.04 s (1.29 MB/s)
88 09:57:28.877532 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:57:28.878351 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:57:28.878611 start: 1.4 download-retry (timeout 00:09:59) [common]
92 09:57:28.878871 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 09:57:28.879335 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 09:57:28.879577 saving as /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/nfsrootfs/full.rootfs.tar
95 09:57:28.879780 total size: 107552908 (102 MB)
96 09:57:28.880008 Using unxz to decompress xz
97 09:57:28.918516 progress 0 % (0 MB)
98 09:57:29.590651 progress 5 % (5 MB)
99 09:57:30.349979 progress 10 % (10 MB)
100 09:57:31.129142 progress 15 % (15 MB)
101 09:57:31.939663 progress 20 % (20 MB)
102 09:57:32.527960 progress 25 % (25 MB)
103 09:57:33.153691 progress 30 % (30 MB)
104 09:57:33.881048 progress 35 % (35 MB)
105 09:57:34.248409 progress 40 % (41 MB)
106 09:57:34.685070 progress 45 % (46 MB)
107 09:57:35.376790 progress 50 % (51 MB)
108 09:57:36.059659 progress 55 % (56 MB)
109 09:57:36.811786 progress 60 % (61 MB)
110 09:57:37.562738 progress 65 % (66 MB)
111 09:57:38.291421 progress 70 % (71 MB)
112 09:57:39.054507 progress 75 % (76 MB)
113 09:57:39.735065 progress 80 % (82 MB)
114 09:57:40.593401 progress 85 % (87 MB)
115 09:57:41.551430 progress 90 % (92 MB)
116 09:57:42.467511 progress 95 % (97 MB)
117 09:57:43.398039 progress 100 % (102 MB)
118 09:57:43.412197 102 MB downloaded in 14.53 s (7.06 MB/s)
119 09:57:43.412870 end: 1.4.1 http-download (duration 00:00:15) [common]
121 09:57:43.413704 end: 1.4 download-retry (duration 00:00:15) [common]
122 09:57:43.414004 start: 1.5 download-retry (timeout 00:09:44) [common]
123 09:57:43.414272 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 09:57:43.414936 downloading http://storage.kernelci.org/next/master/next-20240902/arm64/defconfig+kselftest/gcc-12/modules.tar.xz
125 09:57:43.415240 saving as /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/modules/modules.tar
126 09:57:43.415444 total size: 16208112 (15 MB)
127 09:57:43.415657 Using unxz to decompress xz
128 09:57:43.460151 progress 0 % (0 MB)
129 09:57:43.588881 progress 5 % (0 MB)
130 09:57:43.732751 progress 10 % (1 MB)
131 09:57:43.875347 progress 15 % (2 MB)
132 09:57:44.012901 progress 20 % (3 MB)
133 09:57:44.158982 progress 25 % (3 MB)
134 09:57:44.290750 progress 30 % (4 MB)
135 09:57:44.401870 progress 35 % (5 MB)
136 09:57:44.506203 progress 40 % (6 MB)
137 09:57:44.618532 progress 45 % (6 MB)
138 09:57:44.727316 progress 50 % (7 MB)
139 09:57:44.839058 progress 55 % (8 MB)
140 09:57:44.949594 progress 60 % (9 MB)
141 09:57:45.063553 progress 65 % (10 MB)
142 09:57:45.177790 progress 70 % (10 MB)
143 09:57:45.310806 progress 75 % (11 MB)
144 09:57:45.444525 progress 80 % (12 MB)
145 09:57:45.554124 progress 85 % (13 MB)
146 09:57:45.669931 progress 90 % (13 MB)
147 09:57:45.768990 progress 95 % (14 MB)
148 09:57:45.886246 progress 100 % (15 MB)
149 09:57:45.898424 15 MB downloaded in 2.48 s (6.23 MB/s)
150 09:57:45.899345 end: 1.5.1 http-download (duration 00:00:02) [common]
152 09:57:45.901127 end: 1.5 download-retry (duration 00:00:02) [common]
153 09:57:45.901692 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 09:57:45.902254 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 09:57:55.856273 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/690466/extract-nfsrootfs-93xe647q
156 09:57:55.856879 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 09:57:55.857166 start: 1.6.2 lava-overlay (timeout 00:09:32) [common]
158 09:57:55.857912 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob
159 09:57:55.858370 makedir: /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin
160 09:57:55.858693 makedir: /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/tests
161 09:57:55.859027 makedir: /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/results
162 09:57:55.859366 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-add-keys
163 09:57:55.859888 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-add-sources
164 09:57:55.860425 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-background-process-start
165 09:57:55.860943 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-background-process-stop
166 09:57:55.861489 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-common-functions
167 09:57:55.861980 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-echo-ipv4
168 09:57:55.862455 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-install-packages
169 09:57:55.862936 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-installed-packages
170 09:57:55.863406 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-os-build
171 09:57:55.863874 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-probe-channel
172 09:57:55.864390 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-probe-ip
173 09:57:55.864886 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-target-ip
174 09:57:55.865384 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-target-mac
175 09:57:55.865866 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-target-storage
176 09:57:55.866346 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-test-case
177 09:57:55.866816 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-test-event
178 09:57:55.867289 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-test-feedback
179 09:57:55.867759 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-test-raise
180 09:57:55.868270 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-test-reference
181 09:57:55.868773 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-test-runner
182 09:57:55.869269 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-test-set
183 09:57:55.869749 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-test-shell
184 09:57:55.870235 Updating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-install-packages (oe)
185 09:57:55.870856 Updating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/bin/lava-installed-packages (oe)
186 09:57:55.871338 Creating /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/environment
187 09:57:55.871709 LAVA metadata
188 09:57:55.871967 - LAVA_JOB_ID=690466
189 09:57:55.872209 - LAVA_DISPATCHER_IP=192.168.6.2
190 09:57:55.872570 start: 1.6.2.1 ssh-authorize (timeout 00:09:32) [common]
191 09:57:55.873525 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 09:57:55.873841 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:32) [common]
193 09:57:55.874048 skipped lava-vland-overlay
194 09:57:55.874290 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 09:57:55.874546 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:32) [common]
196 09:57:55.874766 skipped lava-multinode-overlay
197 09:57:55.875008 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 09:57:55.875259 start: 1.6.2.4 test-definition (timeout 00:09:32) [common]
199 09:57:55.875508 Loading test definitions
200 09:57:55.875785 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:32) [common]
201 09:57:55.876026 Using /lava-690466 at stage 0
202 09:57:55.877214 uuid=690466_1.6.2.4.1 testdef=None
203 09:57:55.877521 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 09:57:55.877784 start: 1.6.2.4.2 test-overlay (timeout 00:09:32) [common]
205 09:57:55.879541 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 09:57:55.880352 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:32) [common]
208 09:57:55.882570 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 09:57:55.883390 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:32) [common]
211 09:57:55.885544 runner path: /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/0/tests/0_dmesg test_uuid 690466_1.6.2.4.1
212 09:57:55.886088 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 09:57:55.886845 Creating lava-test-runner.conf files
215 09:57:55.887048 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/690466/lava-overlay-58bf94ob/lava-690466/0 for stage 0
216 09:57:55.887379 - 0_dmesg
217 09:57:55.887715 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 09:57:55.888006 start: 1.6.2.5 compress-overlay (timeout 00:09:32) [common]
219 09:57:55.909400 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 09:57:55.909766 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:32) [common]
221 09:57:55.910024 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 09:57:55.910287 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 09:57:55.910544 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:32) [common]
224 09:57:56.524907 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 09:57:56.525373 start: 1.6.4 extract-modules (timeout 00:09:31) [common]
226 09:57:56.525618 extracting modules file /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/690466/extract-nfsrootfs-93xe647q
227 09:57:58.078755 extracting modules file /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/690466/extract-overlay-ramdisk-d6dpxohj/ramdisk
228 09:57:59.671220 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 09:57:59.671699 start: 1.6.5 apply-overlay-tftp (timeout 00:09:28) [common]
230 09:57:59.671972 [common] Applying overlay to NFS
231 09:57:59.672217 [common] Applying overlay /var/lib/lava/dispatcher/tmp/690466/compress-overlay-li4oeux9/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/690466/extract-nfsrootfs-93xe647q
232 09:57:59.701476 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 09:57:59.701874 start: 1.6.6 prepare-kernel (timeout 00:09:28) [common]
234 09:57:59.702143 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:28) [common]
235 09:57:59.702371 Converting downloaded kernel to a uImage
236 09:57:59.702678 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/kernel/Image /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/kernel/uImage
237 09:58:00.372255 output: Image Name:
238 09:58:00.372677 output: Created: Mon Sep 2 09:57:59 2024
239 09:58:00.372890 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 09:58:00.373094 output: Data Size: 65890816 Bytes = 64346.50 KiB = 62.84 MiB
241 09:58:00.373294 output: Load Address: 01080000
242 09:58:00.373494 output: Entry Point: 01080000
243 09:58:00.373693 output:
244 09:58:00.374031 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 09:58:00.374292 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 09:58:00.374559 start: 1.6.7 configure-preseed-file (timeout 00:09:27) [common]
247 09:58:00.374807 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 09:58:00.375061 start: 1.6.8 compress-ramdisk (timeout 00:09:27) [common]
249 09:58:00.375315 Building ramdisk /var/lib/lava/dispatcher/tmp/690466/extract-overlay-ramdisk-d6dpxohj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/690466/extract-overlay-ramdisk-d6dpxohj/ramdisk
250 09:58:03.424384 >> 240255 blocks
251 09:58:13.704712 Adding RAMdisk u-boot header.
252 09:58:13.705414 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/690466/extract-overlay-ramdisk-d6dpxohj/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/690466/extract-overlay-ramdisk-d6dpxohj/ramdisk.cpio.gz.uboot
253 09:58:14.089791 output: Image Name:
254 09:58:14.090212 output: Created: Mon Sep 2 09:58:13 2024
255 09:58:14.090423 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 09:58:14.090629 output: Data Size: 31076671 Bytes = 30348.31 KiB = 29.64 MiB
257 09:58:14.090831 output: Load Address: 00000000
258 09:58:14.091030 output: Entry Point: 00000000
259 09:58:14.091227 output:
260 09:58:14.091864 rename /var/lib/lava/dispatcher/tmp/690466/extract-overlay-ramdisk-d6dpxohj/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/ramdisk/ramdisk.cpio.gz.uboot
261 09:58:14.092513 end: 1.6.8 compress-ramdisk (duration 00:00:14) [common]
262 09:58:14.093056 end: 1.6 prepare-tftp-overlay (duration 00:00:28) [common]
263 09:58:14.093609 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:14) [common]
264 09:58:14.094063 No LXC device requested
265 09:58:14.094556 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 09:58:14.095058 start: 1.8 deploy-device-env (timeout 00:09:14) [common]
267 09:58:14.095541 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 09:58:14.095943 Checking files for TFTP limit of 4294967296 bytes.
269 09:58:14.098624 end: 1 tftp-deploy (duration 00:00:46) [common]
270 09:58:14.099204 start: 2 uboot-action (timeout 00:05:00) [common]
271 09:58:14.099727 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 09:58:14.100255 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 09:58:14.100755 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 09:58:14.101276 Using kernel file from prepare-kernel: 690466/tftp-deploy-1y0u1hg5/kernel/uImage
275 09:58:14.101905 substitutions:
276 09:58:14.102302 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 09:58:14.102699 - {DTB_ADDR}: 0x01070000
278 09:58:14.103093 - {DTB}: 690466/tftp-deploy-1y0u1hg5/dtb/meson-g12b-a311d-libretech-cc.dtb
279 09:58:14.103484 - {INITRD}: 690466/tftp-deploy-1y0u1hg5/ramdisk/ramdisk.cpio.gz.uboot
280 09:58:14.103874 - {KERNEL_ADDR}: 0x01080000
281 09:58:14.104295 - {KERNEL}: 690466/tftp-deploy-1y0u1hg5/kernel/uImage
282 09:58:14.104687 - {LAVA_MAC}: None
283 09:58:14.105111 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/690466/extract-nfsrootfs-93xe647q
284 09:58:14.105502 - {NFS_SERVER_IP}: 192.168.6.2
285 09:58:14.105891 - {PRESEED_CONFIG}: None
286 09:58:14.106275 - {PRESEED_LOCAL}: None
287 09:58:14.106659 - {RAMDISK_ADDR}: 0x08000000
288 09:58:14.107039 - {RAMDISK}: 690466/tftp-deploy-1y0u1hg5/ramdisk/ramdisk.cpio.gz.uboot
289 09:58:14.107427 - {ROOT_PART}: None
290 09:58:14.107810 - {ROOT}: None
291 09:58:14.108224 - {SERVER_IP}: 192.168.6.2
292 09:58:14.108612 - {TEE_ADDR}: 0x83000000
293 09:58:14.108994 - {TEE}: None
294 09:58:14.109380 Parsed boot commands:
295 09:58:14.109755 - setenv autoload no
296 09:58:14.110138 - setenv initrd_high 0xffffffff
297 09:58:14.110522 - setenv fdt_high 0xffffffff
298 09:58:14.110903 - dhcp
299 09:58:14.111287 - setenv serverip 192.168.6.2
300 09:58:14.111668 - tftpboot 0x01080000 690466/tftp-deploy-1y0u1hg5/kernel/uImage
301 09:58:14.112071 - tftpboot 0x08000000 690466/tftp-deploy-1y0u1hg5/ramdisk/ramdisk.cpio.gz.uboot
302 09:58:14.112462 - tftpboot 0x01070000 690466/tftp-deploy-1y0u1hg5/dtb/meson-g12b-a311d-libretech-cc.dtb
303 09:58:14.112847 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/690466/extract-nfsrootfs-93xe647q,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 09:58:14.113244 - bootm 0x01080000 0x08000000 0x01070000
305 09:58:14.113745 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 09:58:14.115208 start: 2.3 connect-device (timeout 00:05:00) [common]
308 09:58:14.115619 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 09:58:14.130605 Setting prompt string to ['lava-test: # ']
310 09:58:14.132135 end: 2.3 connect-device (duration 00:00:00) [common]
311 09:58:14.132740 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 09:58:14.133280 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 09:58:14.133805 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 09:58:14.134927 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 09:58:14.186552 >> OK - accepted request
316 09:58:14.188712 Returned 0 in 0 seconds
317 09:58:14.289770 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 09:58:14.292323 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 09:58:14.292904 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 09:58:14.293198 Setting prompt string to ['Hit any key to stop autoboot']
322 09:58:14.293446 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 09:58:14.294353 Trying 192.168.56.21...
324 09:58:14.294627 Connected to conserv1.
325 09:58:14.294840 Escape character is '^]'.
326 09:58:14.295057
327 09:58:14.295274 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 09:58:14.295490
329 09:58:25.608131 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 09:58:25.608740 bl2_stage_init 0x01
331 09:58:25.609146 bl2_stage_init 0x81
332 09:58:25.613652 hw id: 0x0000 - pwm id 0x01
333 09:58:25.614119 bl2_stage_init 0xc1
334 09:58:25.614517 bl2_stage_init 0x02
335 09:58:25.614904
336 09:58:25.619155 L0:00000000
337 09:58:25.619581 L1:20000703
338 09:58:25.619971 L2:00008067
339 09:58:25.620389 L3:14000000
340 09:58:25.624932 B2:00402000
341 09:58:25.625586 B1:e0f83180
342 09:58:25.626116
343 09:58:25.626634 TE: 58159
344 09:58:25.627145
345 09:58:25.630446 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 09:58:25.631037
347 09:58:25.631590 Board ID = 1
348 09:58:25.637887 Set A53 clk to 24M
349 09:58:25.638499 Set A73 clk to 24M
350 09:58:25.639007 Set clk81 to 24M
351 09:58:25.641558 A53 clk: 1200 MHz
352 09:58:25.642107 A73 clk: 1200 MHz
353 09:58:25.642615 CLK81: 166.6M
354 09:58:25.643117 smccc: 00012ab5
355 09:58:25.647366 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 09:58:25.653237 board id: 1
357 09:58:25.658721 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 09:58:25.669667 fw parse done
359 09:58:25.675145 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 09:58:25.718151 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 09:58:25.728928 PIEI prepare done
362 09:58:25.729512 fastboot data load
363 09:58:25.730025 fastboot data verify
364 09:58:25.734471 verify result: 266
365 09:58:25.740145 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 09:58:25.740731 LPDDR4 probe
367 09:58:25.741237 ddr clk to 1584MHz
368 09:58:25.748215 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 09:58:25.784587
370 09:58:25.785277 dmc_version 0001
371 09:58:25.791506 Check phy result
372 09:58:25.798670 INFO : End of CA training
373 09:58:25.799309 INFO : End of initialization
374 09:58:25.805213 INFO : Training has run successfully!
375 09:58:25.805786 Check phy result
376 09:58:25.810811 INFO : End of initialization
377 09:58:25.811446 INFO : End of read enable training
378 09:58:25.816345 INFO : End of fine write leveling
379 09:58:25.822067 INFO : End of Write leveling coarse delay
380 09:58:25.822746 INFO : Training has run successfully!
381 09:58:25.823274 Check phy result
382 09:58:25.826002 INFO : End of initialization
383 09:58:25.826568 INFO : End of read dq deskew training
384 09:58:25.831489 INFO : End of MPR read delay center optimization
385 09:58:25.837152 INFO : End of write delay center optimization
386 09:58:25.842669 INFO : End of read delay center optimization
387 09:58:25.843309 INFO : End of max read latency training
388 09:58:25.848288 INFO : Training has run successfully!
389 09:58:25.848875 1D training succeed
390 09:58:25.857479 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 09:58:25.905311 Check phy result
392 09:58:25.906100 INFO : End of initialization
393 09:58:25.927970 INFO : End of 2D read delay Voltage center optimization
394 09:58:25.947176 INFO : End of 2D read delay Voltage center optimization
395 09:58:25.999220 INFO : End of 2D write delay Voltage center optimization
396 09:58:26.048547 INFO : End of 2D write delay Voltage center optimization
397 09:58:26.053999 INFO : Training has run successfully!
398 09:58:26.054286
399 09:58:26.054508 channel==0
400 09:58:26.059604 RxClkDly_Margin_A0==88 ps 9
401 09:58:26.059905 TxDqDly_Margin_A0==98 ps 10
402 09:58:26.063045 RxClkDly_Margin_A1==88 ps 9
403 09:58:26.063327 TxDqDly_Margin_A1==98 ps 10
404 09:58:26.068582 TrainedVREFDQ_A0==74
405 09:58:26.068868 TrainedVREFDQ_A1==74
406 09:58:26.069080 VrefDac_Margin_A0==25
407 09:58:26.074205 DeviceVref_Margin_A0==40
408 09:58:26.074506 VrefDac_Margin_A1==25
409 09:58:26.079787 DeviceVref_Margin_A1==40
410 09:58:26.080095
411 09:58:26.080314
412 09:58:26.080521 channel==1
413 09:58:26.080727 RxClkDly_Margin_A0==98 ps 10
414 09:58:26.085391 TxDqDly_Margin_A0==98 ps 10
415 09:58:26.085686 RxClkDly_Margin_A1==98 ps 10
416 09:58:26.091017 TxDqDly_Margin_A1==88 ps 9
417 09:58:26.091319 TrainedVREFDQ_A0==77
418 09:58:26.091533 TrainedVREFDQ_A1==77
419 09:58:26.096584 VrefDac_Margin_A0==22
420 09:58:26.096874 DeviceVref_Margin_A0==37
421 09:58:26.102209 VrefDac_Margin_A1==24
422 09:58:26.102498 DeviceVref_Margin_A1==37
423 09:58:26.102709
424 09:58:26.107786 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 09:58:26.108139
426 09:58:26.135808 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
427 09:58:26.141473 2D training succeed
428 09:58:26.147047 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 09:58:26.147518 auto size-- 65535DDR cs0 size: 2048MB
430 09:58:26.152685 DDR cs1 size: 2048MB
431 09:58:26.153157 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 09:58:26.158241 cs0 DataBus test pass
433 09:58:26.158721 cs1 DataBus test pass
434 09:58:26.159116 cs0 AddrBus test pass
435 09:58:26.163864 cs1 AddrBus test pass
436 09:58:26.164371
437 09:58:26.164767 100bdlr_step_size ps== 420
438 09:58:26.165167 result report
439 09:58:26.169470 boot times 0Enable ddr reg access
440 09:58:26.177165 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 09:58:26.190527 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 09:58:26.763484 0.0;M3 CHK:0;cm4_sp_mode 0
443 09:58:26.763886 MVN_1=0x00000000
444 09:58:26.769006 MVN_2=0x00000000
445 09:58:26.774760 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 09:58:26.775034 OPS=0x10
447 09:58:26.775265 ring efuse init
448 09:58:26.775470 chipver efuse init
449 09:58:26.780804 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 09:58:26.786026 [0.018961 Inits done]
451 09:58:26.786337 secure task start!
452 09:58:26.786556 high task start!
453 09:58:26.790609 low task start!
454 09:58:26.790921 run into bl31
455 09:58:26.797244 NOTICE: BL31: v1.3(release):4fc40b1
456 09:58:26.805119 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 09:58:26.805451 NOTICE: BL31: G12A normal boot!
458 09:58:26.830793 NOTICE: BL31: BL33 decompress pass
459 09:58:26.836145 ERROR: Error initializing runtime service opteed_fast
460 09:58:28.068906
461 09:58:28.069340
462 09:58:28.077303 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 09:58:28.077713
464 09:58:28.078037 Model: Libre Computer AML-A311D-CC Alta
465 09:58:28.284872 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 09:58:28.308215 DRAM: 2 GiB (effective 3.8 GiB)
467 09:58:28.452193 Core: 408 devices, 31 uclasses, devicetree: separate
468 09:58:28.458050 WDT: Not starting watchdog@f0d0
469 09:58:28.490365 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 09:58:28.502786 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 09:58:28.507791 ** Bad device specification mmc 0 **
472 09:58:28.518098 Card did not respond to voltage select! : -110
473 09:58:28.525716 ** Bad device specification mmc 0 **
474 09:58:28.526194 Couldn't find partition mmc 0
475 09:58:28.534108 Card did not respond to voltage select! : -110
476 09:58:28.539578 ** Bad device specification mmc 0 **
477 09:58:28.540085 Couldn't find partition mmc 0
478 09:58:28.544653 Error: could not access storage.
479 09:58:29.808572 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
480 09:58:29.809178 bl2_stage_init 0x81
481 09:58:29.814200 hw id: 0x0000 - pwm id 0x01
482 09:58:29.814733 bl2_stage_init 0xc1
483 09:58:29.815158 bl2_stage_init 0x02
484 09:58:29.815566
485 09:58:29.819789 L0:00000000
486 09:58:29.820301 L1:20000703
487 09:58:29.820716 L2:00008067
488 09:58:29.821123 L3:14000000
489 09:58:29.821525 B2:00402000
490 09:58:29.825478 B1:e0f83180
491 09:58:29.825959
492 09:58:29.826378 TE: 58150
493 09:58:29.826783
494 09:58:29.831120 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 09:58:29.831710
496 09:58:29.832263 Board ID = 1
497 09:58:29.836536 Set A53 clk to 24M
498 09:58:29.837031 Set A73 clk to 24M
499 09:58:29.837447 Set clk81 to 24M
500 09:58:29.842110 A53 clk: 1200 MHz
501 09:58:29.842581 A73 clk: 1200 MHz
502 09:58:29.842995 CLK81: 166.6M
503 09:58:29.843447 smccc: 00012aac
504 09:58:29.847696 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 09:58:29.853296 board id: 1
506 09:58:29.859077 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 09:58:29.869737 fw parse done
508 09:58:29.875674 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 09:58:29.917772 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 09:58:29.929282 PIEI prepare done
511 09:58:29.929771 fastboot data load
512 09:58:29.930194 fastboot data verify
513 09:58:29.934945 verify result: 266
514 09:58:29.940530 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 09:58:29.940999 LPDDR4 probe
516 09:58:29.941415 ddr clk to 1584MHz
517 09:58:29.948643 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 09:58:29.984783
519 09:58:29.985267 dmc_version 0001
520 09:58:29.992154 Check phy result
521 09:58:29.998295 INFO : End of CA training
522 09:58:29.998767 INFO : End of initialization
523 09:58:30.003888 INFO : Training has run successfully!
524 09:58:30.004397 Check phy result
525 09:58:30.009561 INFO : End of initialization
526 09:58:30.010026 INFO : End of read enable training
527 09:58:30.015091 INFO : End of fine write leveling
528 09:58:30.020680 INFO : End of Write leveling coarse delay
529 09:58:30.021145 INFO : Training has run successfully!
530 09:58:30.021555 Check phy result
531 09:58:30.026345 INFO : End of initialization
532 09:58:30.026807 INFO : End of read dq deskew training
533 09:58:30.031876 INFO : End of MPR read delay center optimization
534 09:58:30.037542 INFO : End of write delay center optimization
535 09:58:30.043145 INFO : End of read delay center optimization
536 09:58:30.043608 INFO : End of max read latency training
537 09:58:30.048773 INFO : Training has run successfully!
538 09:58:30.049243 1D training succeed
539 09:58:30.056922 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 09:58:30.105476 Check phy result
541 09:58:30.105966 INFO : End of initialization
542 09:58:30.127188 INFO : End of 2D read delay Voltage center optimization
543 09:58:30.146409 INFO : End of 2D read delay Voltage center optimization
544 09:58:30.198449 INFO : End of 2D write delay Voltage center optimization
545 09:58:30.248810 INFO : End of 2D write delay Voltage center optimization
546 09:58:30.254343 INFO : Training has run successfully!
547 09:58:30.254819
548 09:58:30.255230 channel==0
549 09:58:30.259957 RxClkDly_Margin_A0==88 ps 9
550 09:58:30.260485 TxDqDly_Margin_A0==98 ps 10
551 09:58:30.265601 RxClkDly_Margin_A1==88 ps 9
552 09:58:30.266078 TxDqDly_Margin_A1==88 ps 9
553 09:58:30.266497 TrainedVREFDQ_A0==74
554 09:58:30.271134 TrainedVREFDQ_A1==74
555 09:58:30.271609 VrefDac_Margin_A0==25
556 09:58:30.272047 DeviceVref_Margin_A0==40
557 09:58:30.276737 VrefDac_Margin_A1==25
558 09:58:30.277202 DeviceVref_Margin_A1==40
559 09:58:30.277605
560 09:58:30.278002
561 09:58:30.278394 channel==1
562 09:58:30.282359 RxClkDly_Margin_A0==98 ps 10
563 09:58:30.282820 TxDqDly_Margin_A0==98 ps 10
564 09:58:30.287951 RxClkDly_Margin_A1==98 ps 10
565 09:58:30.288450 TxDqDly_Margin_A1==88 ps 9
566 09:58:30.293588 TrainedVREFDQ_A0==77
567 09:58:30.294055 TrainedVREFDQ_A1==77
568 09:58:30.294461 VrefDac_Margin_A0==22
569 09:58:30.299137 DeviceVref_Margin_A0==37
570 09:58:30.299596 VrefDac_Margin_A1==24
571 09:58:30.304771 DeviceVref_Margin_A1==37
572 09:58:30.305247
573 09:58:30.305665 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 09:58:30.306068
575 09:58:30.338363 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
576 09:58:30.338908 2D training succeed
577 09:58:30.343974 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 09:58:30.349636 auto size-- 65535DDR cs0 size: 2048MB
579 09:58:30.350116 DDR cs1 size: 2048MB
580 09:58:30.355131 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 09:58:30.355657 cs0 DataBus test pass
582 09:58:30.360762 cs1 DataBus test pass
583 09:58:30.361275 cs0 AddrBus test pass
584 09:58:30.361726 cs1 AddrBus test pass
585 09:58:30.362136
586 09:58:30.366387 100bdlr_step_size ps== 420
587 09:58:30.367138 result report
588 09:58:30.371970 boot times 0Enable ddr reg access
589 09:58:30.377364 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 09:58:30.390372 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 09:58:30.964483 0.0;M3 CHK:0;cm4_sp_mode 0
592 09:58:30.965155 MVN_1=0x00000000
593 09:58:30.970067 MVN_2=0x00000000
594 09:58:30.975798 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 09:58:30.976354 OPS=0x10
596 09:58:30.976881 ring efuse init
597 09:58:30.977345 chipver efuse init
598 09:58:30.981333 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 09:58:30.986926 [0.018961 Inits done]
600 09:58:30.987404 secure task start!
601 09:58:30.987802 high task start!
602 09:58:30.990568 low task start!
603 09:58:30.991028 run into bl31
604 09:58:30.998249 NOTICE: BL31: v1.3(release):4fc40b1
605 09:58:31.005053 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 09:58:31.005540 NOTICE: BL31: G12A normal boot!
607 09:58:31.031412 NOTICE: BL31: BL33 decompress pass
608 09:58:31.036227 ERROR: Error initializing runtime service opteed_fast
609 09:58:32.511083
610 09:58:32.511501
611 09:58:32.511725 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 09:58:32.512131
613 09:58:32.512566 Model: Libre Computer AML-A311D-CC Alta
614 09:58:32.513013 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 09:58:32.513643 DRAM: 2 GiB (effective 3.8 GiB)
616 09:58:32.653246 Core: 408 devices, 31 uclasses, devicetree: separate
617 09:58:32.659070 WDT: Not starting watchdog@f0d0
618 09:58:32.691355 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 09:58:32.703827 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 09:58:32.708850 ** Bad device specification mmc 0 **
621 09:58:32.719096 Card did not respond to voltage select! : -110
622 09:58:32.726940 ** Bad device specification mmc 0 **
623 09:58:32.727328 Couldn't find partition mmc 0
624 09:58:32.735082 Card did not respond to voltage select! : -110
625 09:58:32.740677 ** Bad device specification mmc 0 **
626 09:58:32.740997 Couldn't find partition mmc 0
627 09:58:32.745673 Error: could not access storage.
628 09:58:33.089194 Net: eth0: ethernet@ff3f0000
629 09:58:33.089625 starting USB...
630 09:58:33.341129 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 09:58:33.341746 Starting the controller
632 09:58:33.348190 USB XHCI 1.10
633 09:58:35.059088 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
634 09:58:35.059698 bl2_stage_init 0x01
635 09:58:35.060166 bl2_stage_init 0x81
636 09:58:35.064504 hw id: 0x0000 - pwm id 0x01
637 09:58:35.064991 bl2_stage_init 0xc1
638 09:58:35.065416 bl2_stage_init 0x02
639 09:58:35.065829
640 09:58:35.070152 L0:00000000
641 09:58:35.070617 L1:20000703
642 09:58:35.071030 L2:00008067
643 09:58:35.071434 L3:14000000
644 09:58:35.073115 B2:00402000
645 09:58:35.073579 B1:e0f83180
646 09:58:35.073991
647 09:58:35.074392 TE: 58124
648 09:58:35.074791
649 09:58:35.084279 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 09:58:35.084745
651 09:58:35.085160 Board ID = 1
652 09:58:35.085562 Set A53 clk to 24M
653 09:58:35.085958 Set A73 clk to 24M
654 09:58:35.089815 Set clk81 to 24M
655 09:58:35.090277 A53 clk: 1200 MHz
656 09:58:35.090682 A73 clk: 1200 MHz
657 09:58:35.093401 CLK81: 166.6M
658 09:58:35.093873 smccc: 00012a92
659 09:58:35.098808 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 09:58:35.104344 board id: 1
661 09:58:35.109786 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 09:58:35.120232 fw parse done
663 09:58:35.125993 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 09:58:35.168714 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 09:58:35.179632 PIEI prepare done
666 09:58:35.180141 fastboot data load
667 09:58:35.180557 fastboot data verify
668 09:58:35.185264 verify result: 266
669 09:58:35.190902 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 09:58:35.191367 LPDDR4 probe
671 09:58:35.191774 ddr clk to 1584MHz
672 09:58:35.198821 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 09:58:35.236085
674 09:58:35.236542 dmc_version 0001
675 09:58:35.242830 Check phy result
676 09:58:35.248688 INFO : End of CA training
677 09:58:35.249148 INFO : End of initialization
678 09:58:35.254329 INFO : Training has run successfully!
679 09:58:35.254788 Check phy result
680 09:58:35.259921 INFO : End of initialization
681 09:58:35.260417 INFO : End of read enable training
682 09:58:35.263152 INFO : End of fine write leveling
683 09:58:35.268726 INFO : End of Write leveling coarse delay
684 09:58:35.274421 INFO : Training has run successfully!
685 09:58:35.274881 Check phy result
686 09:58:35.275291 INFO : End of initialization
687 09:58:35.279924 INFO : End of read dq deskew training
688 09:58:35.283445 INFO : End of MPR read delay center optimization
689 09:58:35.288887 INFO : End of write delay center optimization
690 09:58:35.294296 INFO : End of read delay center optimization
691 09:58:35.294752 INFO : End of max read latency training
692 09:58:35.300019 INFO : Training has run successfully!
693 09:58:35.300478 1D training succeed
694 09:58:35.308258 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 09:58:35.355743 Check phy result
696 09:58:35.356227 INFO : End of initialization
697 09:58:35.378330 INFO : End of 2D read delay Voltage center optimization
698 09:58:35.397583 INFO : End of 2D read delay Voltage center optimization
699 09:58:35.450558 INFO : End of 2D write delay Voltage center optimization
700 09:58:35.499954 INFO : End of 2D write delay Voltage center optimization
701 09:58:35.505510 INFO : Training has run successfully!
702 09:58:35.505967
703 09:58:35.506375 channel==0
704 09:58:35.511104 RxClkDly_Margin_A0==88 ps 9
705 09:58:35.511562 TxDqDly_Margin_A0==98 ps 10
706 09:58:35.516713 RxClkDly_Margin_A1==88 ps 9
707 09:58:35.517182 TxDqDly_Margin_A1==98 ps 10
708 09:58:35.517595 TrainedVREFDQ_A0==74
709 09:58:35.522371 TrainedVREFDQ_A1==74
710 09:58:35.522827 VrefDac_Margin_A0==24
711 09:58:35.523232 DeviceVref_Margin_A0==40
712 09:58:35.527900 VrefDac_Margin_A1==24
713 09:58:35.528378 DeviceVref_Margin_A1==40
714 09:58:35.528786
715 09:58:35.529186
716 09:58:35.533578 channel==1
717 09:58:35.534034 RxClkDly_Margin_A0==98 ps 10
718 09:58:35.534440 TxDqDly_Margin_A0==98 ps 10
719 09:58:35.539093 RxClkDly_Margin_A1==88 ps 9
720 09:58:35.539549 TxDqDly_Margin_A1==88 ps 9
721 09:58:35.544715 TrainedVREFDQ_A0==77
722 09:58:35.545172 TrainedVREFDQ_A1==77
723 09:58:35.545576 VrefDac_Margin_A0==22
724 09:58:35.550356 DeviceVref_Margin_A0==37
725 09:58:35.550809 VrefDac_Margin_A1==24
726 09:58:35.555898 DeviceVref_Margin_A1==37
727 09:58:35.556374
728 09:58:35.556784 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 09:58:35.557184
730 09:58:35.589468 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
731 09:58:35.589952 2D training succeed
732 09:58:35.595099 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 09:58:35.600707 auto size-- 65535DDR cs0 size: 2048MB
734 09:58:35.601165 DDR cs1 size: 2048MB
735 09:58:35.606327 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 09:58:35.606781 cs0 DataBus test pass
737 09:58:35.611911 cs1 DataBus test pass
738 09:58:35.612395 cs0 AddrBus test pass
739 09:58:35.612805 cs1 AddrBus test pass
740 09:58:35.613200
741 09:58:35.617526 100bdlr_step_size ps== 420
742 09:58:35.617996 result report
743 09:58:35.623069 boot times 0Enable ddr reg access
744 09:58:35.628435 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 09:58:35.641036 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 09:58:36.215680 0.0;M3 CHK:0;cm4_sp_mode 0
747 09:58:36.216310 MVN_1=0x00000000
748 09:58:36.221206 MVN_2=0x00000000
749 09:58:36.227025 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 09:58:36.227527 OPS=0x10
751 09:58:36.227920 ring efuse init
752 09:58:36.228345 chipver efuse init
753 09:58:36.232510 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 09:58:36.238130 [0.018961 Inits done]
755 09:58:36.238581 secure task start!
756 09:58:36.238973 high task start!
757 09:58:36.242697 low task start!
758 09:58:36.243145 run into bl31
759 09:58:36.249357 NOTICE: BL31: v1.3(release):4fc40b1
760 09:58:36.257147 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 09:58:36.257616 NOTICE: BL31: G12A normal boot!
762 09:58:36.282499 NOTICE: BL31: BL33 decompress pass
763 09:58:36.288216 ERROR: Error initializing runtime service opteed_fast
764 09:58:37.521116
765 09:58:37.521706
766 09:58:37.529701 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 09:58:37.530196
768 09:58:37.530610 Model: Libre Computer AML-A311D-CC Alta
769 09:58:37.737898 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 09:58:37.761361 DRAM: 2 GiB (effective 3.8 GiB)
771 09:58:37.904277 Core: 408 devices, 31 uclasses, devicetree: separate
772 09:58:37.910154 WDT: Not starting watchdog@f0d0
773 09:58:37.942370 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 09:58:37.954915 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 09:58:37.959048 ** Bad device specification mmc 0 **
776 09:58:37.970148 Card did not respond to voltage select! : -110
777 09:58:37.976905 ** Bad device specification mmc 0 **
778 09:58:37.977167 Couldn't find partition mmc 0
779 09:58:37.986088 Card did not respond to voltage select! : -110
780 09:58:37.991783 ** Bad device specification mmc 0 **
781 09:58:37.992840 Couldn't find partition mmc 0
782 09:58:37.996686 Error: could not access storage.
783 09:58:38.339353 Net: eth0: ethernet@ff3f0000
784 09:58:38.339953 starting USB...
785 09:58:38.590975 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 09:58:38.591508 Starting the controller
787 09:58:38.598067 USB XHCI 1.10
788 09:58:40.759038 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 09:58:40.759682 bl2_stage_init 0x01
790 09:58:40.760168 bl2_stage_init 0x81
791 09:58:40.764514 hw id: 0x0000 - pwm id 0x01
792 09:58:40.765053 bl2_stage_init 0xc1
793 09:58:40.765479 bl2_stage_init 0x02
794 09:58:40.765889
795 09:58:40.770243 L0:00000000
796 09:58:40.770771 L1:20000703
797 09:58:40.771190 L2:00008067
798 09:58:40.771596 L3:14000000
799 09:58:40.775893 B2:00402000
800 09:58:40.776443 B1:e0f83180
801 09:58:40.776862
802 09:58:40.777271 TE: 58159
803 09:58:40.777676
804 09:58:40.781413 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 09:58:40.781943
806 09:58:40.782358 Board ID = 1
807 09:58:40.786985 Set A53 clk to 24M
808 09:58:40.787510 Set A73 clk to 24M
809 09:58:40.787921 Set clk81 to 24M
810 09:58:40.792609 A53 clk: 1200 MHz
811 09:58:40.793157 A73 clk: 1200 MHz
812 09:58:40.793601 CLK81: 166.6M
813 09:58:40.794019 smccc: 00012ab5
814 09:58:40.798292 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 09:58:40.803871 board id: 1
816 09:58:40.809751 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 09:58:40.820316 fw parse done
818 09:58:40.826315 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 09:58:40.868653 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 09:58:40.879609 PIEI prepare done
821 09:58:40.880183 fastboot data load
822 09:58:40.880612 fastboot data verify
823 09:58:40.885304 verify result: 266
824 09:58:40.890841 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 09:58:40.891362 LPDDR4 probe
826 09:58:40.891783 ddr clk to 1584MHz
827 09:58:40.898853 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 09:58:40.936199
829 09:58:40.936731 dmc_version 0001
830 09:58:40.942819 Check phy result
831 09:58:40.948761 INFO : End of CA training
832 09:58:40.949272 INFO : End of initialization
833 09:58:40.954245 INFO : Training has run successfully!
834 09:58:40.954749 Check phy result
835 09:58:40.959878 INFO : End of initialization
836 09:58:40.960415 INFO : End of read enable training
837 09:58:40.963153 INFO : End of fine write leveling
838 09:58:40.968816 INFO : End of Write leveling coarse delay
839 09:58:40.974331 INFO : Training has run successfully!
840 09:58:40.974842 Check phy result
841 09:58:40.975253 INFO : End of initialization
842 09:58:40.979875 INFO : End of read dq deskew training
843 09:58:40.983327 INFO : End of MPR read delay center optimization
844 09:58:40.988900 INFO : End of write delay center optimization
845 09:58:40.994521 INFO : End of read delay center optimization
846 09:58:40.995022 INFO : End of max read latency training
847 09:58:41.000090 INFO : Training has run successfully!
848 09:58:41.000594 1D training succeed
849 09:58:41.008313 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 09:58:41.055919 Check phy result
851 09:58:41.056496 INFO : End of initialization
852 09:58:41.077562 INFO : End of 2D read delay Voltage center optimization
853 09:58:41.097685 INFO : End of 2D read delay Voltage center optimization
854 09:58:41.149665 INFO : End of 2D write delay Voltage center optimization
855 09:58:41.198819 INFO : End of 2D write delay Voltage center optimization
856 09:58:41.204462 INFO : Training has run successfully!
857 09:58:41.204992
858 09:58:41.205416 channel==0
859 09:58:41.210088 RxClkDly_Margin_A0==88 ps 9
860 09:58:41.210615 TxDqDly_Margin_A0==98 ps 10
861 09:58:41.213289 RxClkDly_Margin_A1==88 ps 9
862 09:58:41.213811 TxDqDly_Margin_A1==98 ps 10
863 09:58:41.218882 TrainedVREFDQ_A0==74
864 09:58:41.219423 TrainedVREFDQ_A1==74
865 09:58:41.224446 VrefDac_Margin_A0==25
866 09:58:41.225037 DeviceVref_Margin_A0==40
867 09:58:41.225458 VrefDac_Margin_A1==25
868 09:58:41.229973 DeviceVref_Margin_A1==40
869 09:58:41.230528
870 09:58:41.230920
871 09:58:41.231307 channel==1
872 09:58:41.231688 RxClkDly_Margin_A0==98 ps 10
873 09:58:41.233502 TxDqDly_Margin_A0==88 ps 9
874 09:58:41.239052 RxClkDly_Margin_A1==98 ps 10
875 09:58:41.239604 TxDqDly_Margin_A1==88 ps 9
876 09:58:41.240035 TrainedVREFDQ_A0==76
877 09:58:41.244646 TrainedVREFDQ_A1==77
878 09:58:41.245156 VrefDac_Margin_A0==22
879 09:58:41.250277 DeviceVref_Margin_A0==38
880 09:58:41.250787 VrefDac_Margin_A1==24
881 09:58:41.251176 DeviceVref_Margin_A1==37
882 09:58:41.251559
883 09:58:41.255848 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 09:58:41.256390
885 09:58:41.289437 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
886 09:58:41.290231 2D training succeed
887 09:58:41.295024 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 09:58:41.300611 auto size-- 65535DDR cs0 size: 2048MB
889 09:58:41.301131 DDR cs1 size: 2048MB
890 09:58:41.306216 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 09:58:41.306722 cs0 DataBus test pass
892 09:58:41.307114 cs1 DataBus test pass
893 09:58:41.311855 cs0 AddrBus test pass
894 09:58:41.312394 cs1 AddrBus test pass
895 09:58:41.312787
896 09:58:41.317459 100bdlr_step_size ps== 420
897 09:58:41.317972 result report
898 09:58:41.318361 boot times 0Enable ddr reg access
899 09:58:41.327278 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 09:58:41.340730 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 09:58:41.912844 0.0;M3 CHK:0;cm4_sp_mode 0
902 09:58:41.913476 MVN_1=0x00000000
903 09:58:41.918392 MVN_2=0x00000000
904 09:58:41.924175 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 09:58:41.924671 OPS=0x10
906 09:58:41.925084 ring efuse init
907 09:58:41.925485 chipver efuse init
908 09:58:41.932277 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 09:58:41.932786 [0.018960 Inits done]
910 09:58:41.933199 secure task start!
911 09:58:41.939877 high task start!
912 09:58:41.940416 low task start!
913 09:58:41.940836 run into bl31
914 09:58:41.946376 NOTICE: BL31: v1.3(release):4fc40b1
915 09:58:41.954450 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 09:58:41.954955 NOTICE: BL31: G12A normal boot!
917 09:58:41.979727 NOTICE: BL31: BL33 decompress pass
918 09:58:41.985373 ERROR: Error initializing runtime service opteed_fast
919 09:58:43.218745
920 09:58:43.219356
921 09:58:43.226702 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 09:58:43.227198
923 09:58:43.227617 Model: Libre Computer AML-A311D-CC Alta
924 09:58:43.434960 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 09:58:43.458503 DRAM: 2 GiB (effective 3.8 GiB)
926 09:58:43.601688 Core: 408 devices, 31 uclasses, devicetree: separate
927 09:58:43.607315 WDT: Not starting watchdog@f0d0
928 09:58:43.639698 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 09:58:43.652167 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 09:58:43.656576 ** Bad device specification mmc 0 **
931 09:58:43.667578 Card did not respond to voltage select! : -110
932 09:58:43.675002 ** Bad device specification mmc 0 **
933 09:58:43.675463 Couldn't find partition mmc 0
934 09:58:43.683308 Card did not respond to voltage select! : -110
935 09:58:43.688780 ** Bad device specification mmc 0 **
936 09:58:43.689235 Couldn't find partition mmc 0
937 09:58:43.693863 Error: could not access storage.
938 09:58:44.036483 Net: eth0: ethernet@ff3f0000
939 09:58:44.037034 starting USB...
940 09:58:44.288327 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 09:58:44.288828 Starting the controller
942 09:58:44.294314 USB XHCI 1.10
943 09:58:45.849403 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 09:58:45.857573 scanning usb for storage devices... 0 Storage Device(s) found
946 09:58:45.909415 Hit any key to stop autoboot: 1
947 09:58:45.910793 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 09:58:45.912062 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 09:58:45.913062 Setting prompt string to ['=>']
950 09:58:45.913960 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 09:58:45.925063 0
952 09:58:45.926486 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 09:58:45.926784 Sending with 10 millisecond of delay
955 09:58:47.061446 => setenv autoload no
956 09:58:47.072080 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 09:58:47.077012 setenv autoload no
958 09:58:47.077751 Sending with 10 millisecond of delay
960 09:58:48.874484 => setenv initrd_high 0xffffffff
961 09:58:48.885255 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 09:58:48.886098 setenv initrd_high 0xffffffff
963 09:58:48.886807 Sending with 10 millisecond of delay
965 09:58:50.503043 => setenv fdt_high 0xffffffff
966 09:58:50.513806 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
967 09:58:50.514610 setenv fdt_high 0xffffffff
968 09:58:50.515308 Sending with 10 millisecond of delay
970 09:58:50.807089 => dhcp
971 09:58:50.817769 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 09:58:50.818549 dhcp
973 09:58:50.818985 Speed: 1000, full duplex
974 09:58:50.819417 BOOTP broadcast 1
975 09:58:51.065769 BOOTP broadcast 2
976 09:58:51.127330 DHCP client bound to address 192.168.6.33 (309 ms)
977 09:58:51.128832 Sending with 10 millisecond of delay
979 09:58:52.805884 => setenv serverip 192.168.6.2
980 09:58:52.816672 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 09:58:52.817514 setenv serverip 192.168.6.2
982 09:58:52.818200 Sending with 10 millisecond of delay
984 09:58:56.540125 => tftpboot 0x01080000 690466/tftp-deploy-1y0u1hg5/kernel/uImage
985 09:58:56.550701 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 09:58:56.551183 tftpboot 0x01080000 690466/tftp-deploy-1y0u1hg5/kernel/uImage
987 09:58:56.551425 Speed: 1000, full duplex
988 09:58:56.551639 Using ethernet@ff3f0000 device
989 09:58:56.553140 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
990 09:58:56.558845 Filename '690466/tftp-deploy-1y0u1hg5/kernel/uImage'.
991 09:58:56.562702 Load address: 0x1080000
992 09:59:00.735192 Loading: *################################################## 62.8 MiB
993 09:59:00.735823 15.1 MiB/s
994 09:59:00.736281 done
995 09:59:00.739527 Bytes transferred = 65890880 (3ed6a40 hex)
996 09:59:00.740240 Sending with 10 millisecond of delay
998 09:59:05.430274 => tftpboot 0x08000000 690466/tftp-deploy-1y0u1hg5/ramdisk/ramdisk.cpio.gz.uboot
999 09:59:05.441502 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:09)
1000 09:59:05.442128 tftpboot 0x08000000 690466/tftp-deploy-1y0u1hg5/ramdisk/ramdisk.cpio.gz.uboot
1001 09:59:05.442369 Speed: 1000, full duplex
1002 09:59:05.442581 Using ethernet@ff3f0000 device
1003 09:59:05.444160 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1004 09:59:05.456197 Filename '690466/tftp-deploy-1y0u1hg5/ramdisk/ramdisk.cpio.gz.uboot'.
1005 09:59:05.456562 Load address: 0x8000000
1006 09:59:07.433912 Loading: *################################################# UDP wrong checksum 00000007 0000293a
1007 09:59:12.436076 T UDP wrong checksum 00000007 0000293a
1008 09:59:22.438182 T T UDP wrong checksum 00000007 0000293a
1009 09:59:42.442126 T T T T UDP wrong checksum 00000007 0000293a
1010 09:59:49.544154 T UDP wrong checksum 000000ff 0000d121
1011 09:59:49.557025 UDP wrong checksum 000000ff 00006d14
1012 10:00:02.447211 T T
1013 10:00:02.447880 Retry count exceeded; starting again
1015 10:00:02.449377 end: 2.4.3 bootloader-commands (duration 00:01:17) [common]
1018 10:00:02.451259 end: 2.4 uboot-commands (duration 00:01:48) [common]
1020 10:00:02.452753 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1022 10:00:02.453828 end: 2 uboot-action (duration 00:01:48) [common]
1024 10:00:02.455331 Cleaning after the job
1025 10:00:02.455902 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/ramdisk
1026 10:00:02.457241 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/kernel
1027 10:00:02.513611 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/dtb
1028 10:00:02.514470 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/nfsrootfs
1029 10:00:02.674677 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/690466/tftp-deploy-1y0u1hg5/modules
1030 10:00:02.706237 start: 4.1 power-off (timeout 00:00:30) [common]
1031 10:00:02.706943 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1032 10:00:02.738119 >> OK - accepted request
1033 10:00:02.740164 Returned 0 in 0 seconds
1034 10:00:02.840926 end: 4.1 power-off (duration 00:00:00) [common]
1036 10:00:02.841868 start: 4.2 read-feedback (timeout 00:10:00) [common]
1037 10:00:02.842513 Listened to connection for namespace 'common' for up to 1s
1038 10:00:03.842424 Finalising connection for namespace 'common'
1039 10:00:03.842896 Disconnecting from shell: Finalise
1040 10:00:03.843156 =>
1041 10:00:03.943838 end: 4.2 read-feedback (duration 00:00:01) [common]
1042 10:00:03.944478 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/690466
1043 10:00:05.760012 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/690466
1044 10:00:05.760654 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.