Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 16:34:18.191026 lava-dispatcher, installed at version: 2024.01
2 16:34:18.191814 start: 0 validate
3 16:34:18.192351 Start time: 2024-09-05 16:34:18.192321+00:00 (UTC)
4 16:34:18.192904 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 16:34:18.193436 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 16:34:18.232975 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 16:34:18.233560 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240905%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 16:34:18.264637 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 16:34:18.265284 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240905%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 16:34:19.318074 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 16:34:19.318591 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240905%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
12 16:34:19.356553 validate duration: 1.16
14 16:34:19.357402 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 16:34:19.357745 start: 1.1 download-retry (timeout 00:10:00) [common]
16 16:34:19.358056 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 16:34:19.358651 Not decompressing ramdisk as can be used compressed.
18 16:34:19.359095 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 16:34:19.359344 saving as /var/lib/lava/dispatcher/tmp/710745/tftp-deploy-xbg28b6o/ramdisk/rootfs.cpio.gz
20 16:34:19.359604 total size: 8181887 (7 MB)
21 16:34:19.398749 progress 0 % (0 MB)
22 16:34:19.409477 progress 5 % (0 MB)
23 16:34:19.420179 progress 10 % (0 MB)
24 16:34:19.429965 progress 15 % (1 MB)
25 16:34:19.435548 progress 20 % (1 MB)
26 16:34:19.441543 progress 25 % (1 MB)
27 16:34:19.446901 progress 30 % (2 MB)
28 16:34:19.452796 progress 35 % (2 MB)
29 16:34:19.458186 progress 40 % (3 MB)
30 16:34:19.463945 progress 45 % (3 MB)
31 16:34:19.469365 progress 50 % (3 MB)
32 16:34:19.475210 progress 55 % (4 MB)
33 16:34:19.480671 progress 60 % (4 MB)
34 16:34:19.486316 progress 65 % (5 MB)
35 16:34:19.491654 progress 70 % (5 MB)
36 16:34:19.497362 progress 75 % (5 MB)
37 16:34:19.502660 progress 80 % (6 MB)
38 16:34:19.508545 progress 85 % (6 MB)
39 16:34:19.513804 progress 90 % (7 MB)
40 16:34:19.519313 progress 95 % (7 MB)
41 16:34:19.524267 progress 100 % (7 MB)
42 16:34:19.524938 7 MB downloaded in 0.17 s (47.20 MB/s)
43 16:34:19.525506 end: 1.1.1 http-download (duration 00:00:00) [common]
45 16:34:19.526434 end: 1.1 download-retry (duration 00:00:00) [common]
46 16:34:19.526750 start: 1.2 download-retry (timeout 00:10:00) [common]
47 16:34:19.527046 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 16:34:19.527566 downloading http://storage.kernelci.org/next/master/next-20240905/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/kernel/Image
49 16:34:19.527828 saving as /var/lib/lava/dispatcher/tmp/710745/tftp-deploy-xbg28b6o/kernel/Image
50 16:34:19.528070 total size: 45961728 (43 MB)
51 16:34:19.528295 No compression specified
52 16:34:19.567837 progress 0 % (0 MB)
53 16:34:19.597228 progress 5 % (2 MB)
54 16:34:19.627010 progress 10 % (4 MB)
55 16:34:19.656162 progress 15 % (6 MB)
56 16:34:19.684815 progress 20 % (8 MB)
57 16:34:19.713666 progress 25 % (10 MB)
58 16:34:19.743001 progress 30 % (13 MB)
59 16:34:19.771627 progress 35 % (15 MB)
60 16:34:19.801111 progress 40 % (17 MB)
61 16:34:19.830085 progress 45 % (19 MB)
62 16:34:19.858956 progress 50 % (21 MB)
63 16:34:19.887432 progress 55 % (24 MB)
64 16:34:19.915804 progress 60 % (26 MB)
65 16:34:19.945423 progress 65 % (28 MB)
66 16:34:19.973965 progress 70 % (30 MB)
67 16:34:20.002478 progress 75 % (32 MB)
68 16:34:20.032390 progress 80 % (35 MB)
69 16:34:20.061181 progress 85 % (37 MB)
70 16:34:20.089689 progress 90 % (39 MB)
71 16:34:20.118234 progress 95 % (41 MB)
72 16:34:20.146406 progress 100 % (43 MB)
73 16:34:20.147136 43 MB downloaded in 0.62 s (70.81 MB/s)
74 16:34:20.147650 end: 1.2.1 http-download (duration 00:00:01) [common]
76 16:34:20.148584 end: 1.2 download-retry (duration 00:00:01) [common]
77 16:34:20.148891 start: 1.3 download-retry (timeout 00:09:59) [common]
78 16:34:20.149175 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 16:34:20.149675 downloading http://storage.kernelci.org/next/master/next-20240905/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
80 16:34:20.149971 saving as /var/lib/lava/dispatcher/tmp/710745/tftp-deploy-xbg28b6o/dtb/meson-g12b-a311d-libretech-cc.dtb
81 16:34:20.150190 total size: 54703 (0 MB)
82 16:34:20.150413 No compression specified
83 16:34:20.194496 progress 59 % (0 MB)
84 16:34:20.195349 progress 100 % (0 MB)
85 16:34:20.195896 0 MB downloaded in 0.05 s (1.14 MB/s)
86 16:34:20.196417 end: 1.3.1 http-download (duration 00:00:00) [common]
88 16:34:20.197232 end: 1.3 download-retry (duration 00:00:00) [common]
89 16:34:20.197491 start: 1.4 download-retry (timeout 00:09:59) [common]
90 16:34:20.197751 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 16:34:20.198218 downloading http://storage.kernelci.org/next/master/next-20240905/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/modules.tar.xz
92 16:34:20.198462 saving as /var/lib/lava/dispatcher/tmp/710745/tftp-deploy-xbg28b6o/modules/modules.tar
93 16:34:20.198667 total size: 11516616 (10 MB)
94 16:34:20.198877 Using unxz to decompress xz
95 16:34:20.241244 progress 0 % (0 MB)
96 16:34:20.307251 progress 5 % (0 MB)
97 16:34:20.390523 progress 10 % (1 MB)
98 16:34:20.470951 progress 15 % (1 MB)
99 16:34:20.557123 progress 20 % (2 MB)
100 16:34:20.630646 progress 25 % (2 MB)
101 16:34:20.709601 progress 30 % (3 MB)
102 16:34:20.786779 progress 35 % (3 MB)
103 16:34:20.862181 progress 40 % (4 MB)
104 16:34:20.944252 progress 45 % (4 MB)
105 16:34:21.019206 progress 50 % (5 MB)
106 16:34:21.103323 progress 55 % (6 MB)
107 16:34:21.177352 progress 60 % (6 MB)
108 16:34:21.261244 progress 65 % (7 MB)
109 16:34:21.342222 progress 70 % (7 MB)
110 16:34:21.420334 progress 75 % (8 MB)
111 16:34:21.516144 progress 80 % (8 MB)
112 16:34:21.610408 progress 85 % (9 MB)
113 16:34:21.686266 progress 90 % (9 MB)
114 16:34:21.762014 progress 95 % (10 MB)
115 16:34:21.837607 progress 100 % (10 MB)
116 16:34:21.850065 10 MB downloaded in 1.65 s (6.65 MB/s)
117 16:34:21.850664 end: 1.4.1 http-download (duration 00:00:02) [common]
119 16:34:21.851502 end: 1.4 download-retry (duration 00:00:02) [common]
120 16:34:21.851776 start: 1.5 prepare-tftp-overlay (timeout 00:09:58) [common]
121 16:34:21.852141 start: 1.5.1 extract-nfsrootfs (timeout 00:09:58) [common]
122 16:34:21.852660 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 16:34:21.853164 start: 1.5.2 lava-overlay (timeout 00:09:58) [common]
124 16:34:21.854138 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51
125 16:34:21.854964 makedir: /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin
126 16:34:21.855586 makedir: /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/tests
127 16:34:21.856240 makedir: /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/results
128 16:34:21.856852 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-add-keys
129 16:34:21.857783 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-add-sources
130 16:34:21.858722 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-background-process-start
131 16:34:21.859686 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-background-process-stop
132 16:34:21.860717 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-common-functions
133 16:34:21.861630 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-echo-ipv4
134 16:34:21.862560 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-install-packages
135 16:34:21.863471 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-installed-packages
136 16:34:21.864401 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-os-build
137 16:34:21.865299 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-probe-channel
138 16:34:21.866190 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-probe-ip
139 16:34:21.867086 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-target-ip
140 16:34:21.868023 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-target-mac
141 16:34:21.868948 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-target-storage
142 16:34:21.869846 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-test-case
143 16:34:21.870740 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-test-event
144 16:34:21.871616 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-test-feedback
145 16:34:21.872542 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-test-raise
146 16:34:21.873434 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-test-reference
147 16:34:21.874872 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-test-runner
148 16:34:21.875804 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-test-set
149 16:34:21.876762 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-test-shell
150 16:34:21.877682 Updating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-install-packages (oe)
151 16:34:21.878751 Updating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/bin/lava-installed-packages (oe)
152 16:34:21.879606 Creating /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/environment
153 16:34:21.880358 LAVA metadata
154 16:34:21.880845 - LAVA_JOB_ID=710745
155 16:34:21.881273 - LAVA_DISPATCHER_IP=192.168.6.2
156 16:34:21.881951 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 16:34:21.883738 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 16:34:21.884379 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 16:34:21.884793 skipped lava-vland-overlay
160 16:34:21.885276 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 16:34:21.885778 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 16:34:21.886198 skipped lava-multinode-overlay
163 16:34:21.886675 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 16:34:21.887174 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 16:34:21.887654 Loading test definitions
166 16:34:21.888233 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 16:34:21.888676 Using /lava-710745 at stage 0
168 16:34:21.890882 uuid=710745_1.5.2.4.1 testdef=None
169 16:34:21.891468 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 16:34:21.892011 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 16:34:21.895490 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 16:34:21.897120 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 16:34:21.900886 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 16:34:21.901762 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 16:34:21.904102 runner path: /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/0/tests/0_dmesg test_uuid 710745_1.5.2.4.1
178 16:34:21.904743 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 16:34:21.905529 Creating lava-test-runner.conf files
181 16:34:21.905732 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/710745/lava-overlay-21k8ip51/lava-710745/0 for stage 0
182 16:34:21.906084 - 0_dmesg
183 16:34:21.906445 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 16:34:21.906738 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 16:34:21.931437 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 16:34:21.931899 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 16:34:21.932204 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 16:34:21.932478 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 16:34:21.932743 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 16:34:22.920787 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 16:34:22.921494 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
192 16:34:22.921979 extracting modules file /var/lib/lava/dispatcher/tmp/710745/tftp-deploy-xbg28b6o/modules/modules.tar to /var/lib/lava/dispatcher/tmp/710745/extract-overlay-ramdisk-ulbz3pxr/ramdisk
193 16:34:24.309719 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 16:34:24.310175 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 16:34:24.310451 [common] Applying overlay /var/lib/lava/dispatcher/tmp/710745/compress-overlay-_i2umva9/overlay-1.5.2.5.tar.gz to ramdisk
196 16:34:24.310664 [common] Applying overlay /var/lib/lava/dispatcher/tmp/710745/compress-overlay-_i2umva9/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/710745/extract-overlay-ramdisk-ulbz3pxr/ramdisk
197 16:34:24.341032 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 16:34:24.341470 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 16:34:24.341739 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 16:34:24.341966 Converting downloaded kernel to a uImage
201 16:34:24.342271 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/710745/tftp-deploy-xbg28b6o/kernel/Image /var/lib/lava/dispatcher/tmp/710745/tftp-deploy-xbg28b6o/kernel/uImage
202 16:34:24.819840 output: Image Name:
203 16:34:24.820280 output: Created: Thu Sep 5 16:34:24 2024
204 16:34:24.820493 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 16:34:24.820699 output: Data Size: 45961728 Bytes = 44884.50 KiB = 43.83 MiB
206 16:34:24.820899 output: Load Address: 01080000
207 16:34:24.821096 output: Entry Point: 01080000
208 16:34:24.821293 output:
209 16:34:24.821618 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 16:34:24.821887 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 16:34:24.822161 start: 1.5.7 configure-preseed-file (timeout 00:09:55) [common]
212 16:34:24.822416 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 16:34:24.822675 start: 1.5.8 compress-ramdisk (timeout 00:09:55) [common]
214 16:34:24.822927 Building ramdisk /var/lib/lava/dispatcher/tmp/710745/extract-overlay-ramdisk-ulbz3pxr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/710745/extract-overlay-ramdisk-ulbz3pxr/ramdisk
215 16:34:27.204529 >> 180651 blocks
216 16:34:35.649507 Adding RAMdisk u-boot header.
217 16:34:35.650164 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/710745/extract-overlay-ramdisk-ulbz3pxr/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/710745/extract-overlay-ramdisk-ulbz3pxr/ramdisk.cpio.gz.uboot
218 16:34:35.920722 output: Image Name:
219 16:34:35.921134 output: Created: Thu Sep 5 16:34:35 2024
220 16:34:35.921663 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 16:34:35.922122 output: Data Size: 25936037 Bytes = 25328.16 KiB = 24.73 MiB
222 16:34:35.922596 output: Load Address: 00000000
223 16:34:35.923066 output: Entry Point: 00000000
224 16:34:35.923506 output:
225 16:34:35.924752 rename /var/lib/lava/dispatcher/tmp/710745/extract-overlay-ramdisk-ulbz3pxr/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/710745/tftp-deploy-xbg28b6o/ramdisk/ramdisk.cpio.gz.uboot
226 16:34:35.925584 end: 1.5.8 compress-ramdisk (duration 00:00:11) [common]
227 16:34:35.926205 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
228 16:34:35.926802 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
229 16:34:35.927319 No LXC device requested
230 16:34:35.927887 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 16:34:35.928519 start: 1.7 deploy-device-env (timeout 00:09:43) [common]
232 16:34:35.929087 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 16:34:35.929554 Checking files for TFTP limit of 4294967296 bytes.
234 16:34:35.932583 end: 1 tftp-deploy (duration 00:00:17) [common]
235 16:34:35.933263 start: 2 uboot-action (timeout 00:05:00) [common]
236 16:34:35.933861 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 16:34:35.934425 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 16:34:35.935019 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 16:34:35.935617 Using kernel file from prepare-kernel: 710745/tftp-deploy-xbg28b6o/kernel/uImage
240 16:34:35.936337 substitutions:
241 16:34:35.936807 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 16:34:35.937261 - {DTB_ADDR}: 0x01070000
243 16:34:35.937705 - {DTB}: 710745/tftp-deploy-xbg28b6o/dtb/meson-g12b-a311d-libretech-cc.dtb
244 16:34:35.938153 - {INITRD}: 710745/tftp-deploy-xbg28b6o/ramdisk/ramdisk.cpio.gz.uboot
245 16:34:35.938597 - {KERNEL_ADDR}: 0x01080000
246 16:34:35.939040 - {KERNEL}: 710745/tftp-deploy-xbg28b6o/kernel/uImage
247 16:34:35.939479 - {LAVA_MAC}: None
248 16:34:35.939968 - {PRESEED_CONFIG}: None
249 16:34:35.940457 - {PRESEED_LOCAL}: None
250 16:34:35.940897 - {RAMDISK_ADDR}: 0x08000000
251 16:34:35.941331 - {RAMDISK}: 710745/tftp-deploy-xbg28b6o/ramdisk/ramdisk.cpio.gz.uboot
252 16:34:35.941775 - {ROOT_PART}: None
253 16:34:35.942209 - {ROOT}: None
254 16:34:35.942643 - {SERVER_IP}: 192.168.6.2
255 16:34:35.943080 - {TEE_ADDR}: 0x83000000
256 16:34:35.943513 - {TEE}: None
257 16:34:35.943954 Parsed boot commands:
258 16:34:35.944433 - setenv autoload no
259 16:34:35.944874 - setenv initrd_high 0xffffffff
260 16:34:35.945309 - setenv fdt_high 0xffffffff
261 16:34:35.945742 - dhcp
262 16:34:35.946173 - setenv serverip 192.168.6.2
263 16:34:35.946608 - tftpboot 0x01080000 710745/tftp-deploy-xbg28b6o/kernel/uImage
264 16:34:35.947043 - tftpboot 0x08000000 710745/tftp-deploy-xbg28b6o/ramdisk/ramdisk.cpio.gz.uboot
265 16:34:35.947477 - tftpboot 0x01070000 710745/tftp-deploy-xbg28b6o/dtb/meson-g12b-a311d-libretech-cc.dtb
266 16:34:35.947909 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 16:34:35.948382 - bootm 0x01080000 0x08000000 0x01070000
268 16:34:35.948956 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 16:34:35.950639 start: 2.3 connect-device (timeout 00:05:00) [common]
271 16:34:35.951153 [common] connect-device Connecting to device using 'telnet conserv1 3007'
272 16:34:35.966820 Setting prompt string to ['lava-test: # ']
273 16:34:35.968483 end: 2.3 connect-device (duration 00:00:00) [common]
274 16:34:35.970038 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 16:34:35.970806 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 16:34:35.971412 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 16:34:35.972707 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
278 16:34:36.006850 >> OK - accepted request
279 16:34:36.009060 Returned 0 in 0 seconds
280 16:34:36.110119 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 16:34:36.111907 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 16:34:36.112616 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 16:34:36.113196 Setting prompt string to ['Hit any key to stop autoboot']
285 16:34:36.113698 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 16:34:36.115431 Trying 192.168.56.21...
287 16:34:36.115968 Connected to conserv1.
288 16:34:36.116467 Escape character is '^]'.
289 16:34:36.116934
290 16:34:36.117403 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 16:34:36.117879
292 16:34:48.258838 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
293 16:34:48.259493 bl2_stage_init 0x01
294 16:34:48.259962 bl2_stage_init 0x81
295 16:34:48.264446 hw id: 0x0000 - pwm id 0x01
296 16:34:48.265024 bl2_stage_init 0xc1
297 16:34:48.265482 bl2_stage_init 0x02
298 16:34:48.265936
299 16:34:48.269837 L0:00000000
300 16:34:48.270325 L1:20000703
301 16:34:48.270766 L2:00008067
302 16:34:48.271194 L3:14000000
303 16:34:48.275254 B2:00402000
304 16:34:48.275725 B1:e0f83180
305 16:34:48.276194
306 16:34:48.276632 TE: 58124
307 16:34:48.277061
308 16:34:48.280988 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
309 16:34:48.281453
310 16:34:48.281883 Board ID = 1
311 16:34:48.286708 Set A53 clk to 24M
312 16:34:48.287169 Set A73 clk to 24M
313 16:34:48.287593 Set clk81 to 24M
314 16:34:48.292204 A53 clk: 1200 MHz
315 16:34:48.292664 A73 clk: 1200 MHz
316 16:34:48.293093 CLK81: 166.6M
317 16:34:48.293519 smccc: 00012a92
318 16:34:48.297325 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
319 16:34:48.303032 board id: 1
320 16:34:48.307931 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 16:34:48.319644 fw parse done
322 16:34:48.324610 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 16:34:48.367315 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 16:34:48.379082 PIEI prepare done
325 16:34:48.379561 fastboot data load
326 16:34:48.380037 fastboot data verify
327 16:34:48.384745 verify result: 266
328 16:34:48.390347 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
329 16:34:48.390832 LPDDR4 probe
330 16:34:48.391269 ddr clk to 1584MHz
331 16:34:48.397264 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 16:34:48.434577
333 16:34:48.435090 dmc_version 0001
334 16:34:48.441269 Check phy result
335 16:34:48.448119 INFO : End of CA training
336 16:34:48.448597 INFO : End of initialization
337 16:34:48.453816 INFO : Training has run successfully!
338 16:34:48.454277 Check phy result
339 16:34:48.459380 INFO : End of initialization
340 16:34:48.459838 INFO : End of read enable training
341 16:34:48.462587 INFO : End of fine write leveling
342 16:34:48.468166 INFO : End of Write leveling coarse delay
343 16:34:48.473778 INFO : Training has run successfully!
344 16:34:48.474316 Check phy result
345 16:34:48.474781 INFO : End of initialization
346 16:34:48.479404 INFO : End of read dq deskew training
347 16:34:48.484917 INFO : End of MPR read delay center optimization
348 16:34:48.485433 INFO : End of write delay center optimization
349 16:34:48.490613 INFO : End of read delay center optimization
350 16:34:48.496121 INFO : End of max read latency training
351 16:34:48.496607 INFO : Training has run successfully!
352 16:34:48.501717 1D training succeed
353 16:34:48.506670 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 16:34:48.554348 Check phy result
355 16:34:48.554970 INFO : End of initialization
356 16:34:48.576126 INFO : End of 2D read delay Voltage center optimization
357 16:34:48.595577 INFO : End of 2D read delay Voltage center optimization
358 16:34:48.647594 INFO : End of 2D write delay Voltage center optimization
359 16:34:48.697866 INFO : End of 2D write delay Voltage center optimization
360 16:34:48.703458 INFO : Training has run successfully!
361 16:34:48.704016
362 16:34:48.704478 channel==0
363 16:34:48.709008 RxClkDly_Margin_A0==88 ps 9
364 16:34:48.709502 TxDqDly_Margin_A0==98 ps 10
365 16:34:48.712320 RxClkDly_Margin_A1==88 ps 9
366 16:34:48.712782 TxDqDly_Margin_A1==98 ps 10
367 16:34:48.717826 TrainedVREFDQ_A0==74
368 16:34:48.718313 TrainedVREFDQ_A1==74
369 16:34:48.723429 VrefDac_Margin_A0==25
370 16:34:48.723897 DeviceVref_Margin_A0==40
371 16:34:48.724364 VrefDac_Margin_A1==25
372 16:34:48.728996 DeviceVref_Margin_A1==40
373 16:34:48.729462
374 16:34:48.729900
375 16:34:48.730332 channel==1
376 16:34:48.730758 RxClkDly_Margin_A0==98 ps 10
377 16:34:48.732439 TxDqDly_Margin_A0==98 ps 10
378 16:34:48.738012 RxClkDly_Margin_A1==88 ps 9
379 16:34:48.738474 TxDqDly_Margin_A1==98 ps 10
380 16:34:48.738911 TrainedVREFDQ_A0==77
381 16:34:48.743569 TrainedVREFDQ_A1==77
382 16:34:48.744067 VrefDac_Margin_A0==23
383 16:34:48.749163 DeviceVref_Margin_A0==37
384 16:34:48.749627 VrefDac_Margin_A1==24
385 16:34:48.750057 DeviceVref_Margin_A1==37
386 16:34:48.750482
387 16:34:48.758156 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 16:34:48.758627
389 16:34:48.790245 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000019 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
390 16:34:48.790810 2D training succeed
391 16:34:48.796435 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 16:34:48.796907 auto size-- 65535DDR cs0 size: 2048MB
393 16:34:48.802264 DDR cs1 size: 2048MB
394 16:34:48.802735 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 16:34:48.807833 cs0 DataBus test pass
396 16:34:48.808333 cs1 DataBus test pass
397 16:34:48.808767 cs0 AddrBus test pass
398 16:34:48.813300 cs1 AddrBus test pass
399 16:34:48.813764
400 16:34:48.814195 100bdlr_step_size ps== 420
401 16:34:48.814636 result report
402 16:34:48.818879 boot times 0Enable ddr reg access
403 16:34:48.825902 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 16:34:48.838983 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
405 16:34:49.413589 0.0;M3 CHK:0;cm4_sp_mode 0
406 16:34:49.414262 MVN_1=0x00000000
407 16:34:49.418964 MVN_2=0x00000000
408 16:34:49.424713 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
409 16:34:49.425208 OPS=0x10
410 16:34:49.425662 ring efuse init
411 16:34:49.426107 chipver efuse init
412 16:34:49.430430 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
413 16:34:49.435913 [0.018961 Inits done]
414 16:34:49.436450 secure task start!
415 16:34:49.436905 high task start!
416 16:34:49.440480 low task start!
417 16:34:49.440963 run into bl31
418 16:34:49.447150 NOTICE: BL31: v1.3(release):4fc40b1
419 16:34:49.454965 NOTICE: BL31: Built : 15:58:17, May 22 2019
420 16:34:49.455481 NOTICE: BL31: G12A normal boot!
421 16:34:49.480542 NOTICE: BL31: BL33 decompress pass
422 16:34:49.486176 ERROR: Error initializing runtime service opteed_fast
423 16:34:50.718892
424 16:34:50.719566
425 16:34:50.727221 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
426 16:34:50.727786
427 16:34:50.728323 Model: Libre Computer AML-A311D-CC Alta
428 16:34:50.935620 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
429 16:34:50.959005 DRAM: 2 GiB (effective 3.8 GiB)
430 16:34:51.102130 Core: 408 devices, 31 uclasses, devicetree: separate
431 16:34:51.107897 WDT: Not starting watchdog@f0d0
432 16:34:51.140186 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
433 16:34:51.152600 Loading Environment from FAT... Card did not respond to voltage select! : -110
434 16:34:51.157689 ** Bad device specification mmc 0 **
435 16:34:51.167916 Card did not respond to voltage select! : -110
436 16:34:51.175548 ** Bad device specification mmc 0 **
437 16:34:51.176089 Couldn't find partition mmc 0
438 16:34:51.183910 Card did not respond to voltage select! : -110
439 16:34:51.189390 ** Bad device specification mmc 0 **
440 16:34:51.189889 Couldn't find partition mmc 0
441 16:34:51.194460 Error: could not access storage.
442 16:34:52.458721 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
443 16:34:52.459393 bl2_stage_init 0x01
444 16:34:52.459879 bl2_stage_init 0x81
445 16:34:52.464300 hw id: 0x0000 - pwm id 0x01
446 16:34:52.464796 bl2_stage_init 0xc1
447 16:34:52.465244 bl2_stage_init 0x02
448 16:34:52.465712
449 16:34:52.469883 L0:00000000
450 16:34:52.470392 L1:20000703
451 16:34:52.470877 L2:00008067
452 16:34:52.471330 L3:14000000
453 16:34:52.472846 B2:00402000
454 16:34:52.473375 B1:e0f83180
455 16:34:52.473853
456 16:34:52.474331 TE: 58167
457 16:34:52.474804
458 16:34:52.484043 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
459 16:34:52.484598
460 16:34:52.485067 Board ID = 1
461 16:34:52.485515 Set A53 clk to 24M
462 16:34:52.485994 Set A73 clk to 24M
463 16:34:52.489839 Set clk81 to 24M
464 16:34:52.490362 A53 clk: 1200 MHz
465 16:34:52.490820 A73 clk: 1200 MHz
466 16:34:52.495242 CLK81: 166.6M
467 16:34:52.495768 smccc: 00012abd
468 16:34:52.500846 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
469 16:34:52.501362 board id: 1
470 16:34:52.509358 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
471 16:34:52.520126 fw parse done
472 16:34:52.526488 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
473 16:34:52.568696 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
474 16:34:52.579518 PIEI prepare done
475 16:34:52.579885 fastboot data load
476 16:34:52.580148 fastboot data verify
477 16:34:52.585282 verify result: 266
478 16:34:52.590829 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
479 16:34:52.591357 LPDDR4 probe
480 16:34:52.591787 ddr clk to 1584MHz
481 16:34:52.598828 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
482 16:34:52.635152
483 16:34:52.635669 dmc_version 0001
484 16:34:52.642855 Check phy result
485 16:34:52.648629 INFO : End of CA training
486 16:34:52.649145 INFO : End of initialization
487 16:34:52.654268 INFO : Training has run successfully!
488 16:34:52.654787 Check phy result
489 16:34:52.659811 INFO : End of initialization
490 16:34:52.660349 INFO : End of read enable training
491 16:34:52.665389 INFO : End of fine write leveling
492 16:34:52.670990 INFO : End of Write leveling coarse delay
493 16:34:52.671500 INFO : Training has run successfully!
494 16:34:52.671920 Check phy result
495 16:34:52.676670 INFO : End of initialization
496 16:34:52.677171 INFO : End of read dq deskew training
497 16:34:52.682248 INFO : End of MPR read delay center optimization
498 16:34:52.687821 INFO : End of write delay center optimization
499 16:34:52.693410 INFO : End of read delay center optimization
500 16:34:52.693904 INFO : End of max read latency training
501 16:34:52.698986 INFO : Training has run successfully!
502 16:34:52.699483 1D training succeed
503 16:34:52.708225 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
504 16:34:52.755783 Check phy result
505 16:34:52.756317 INFO : End of initialization
506 16:34:52.777512 INFO : End of 2D read delay Voltage center optimization
507 16:34:52.796922 INFO : End of 2D read delay Voltage center optimization
508 16:34:52.848044 INFO : End of 2D write delay Voltage center optimization
509 16:34:52.898347 INFO : End of 2D write delay Voltage center optimization
510 16:34:52.903863 INFO : Training has run successfully!
511 16:34:52.904375
512 16:34:52.904797 channel==0
513 16:34:52.909500 RxClkDly_Margin_A0==88 ps 9
514 16:34:52.909988 TxDqDly_Margin_A0==98 ps 10
515 16:34:52.912805 RxClkDly_Margin_A1==88 ps 9
516 16:34:52.913289 TxDqDly_Margin_A1==98 ps 10
517 16:34:52.918315 TrainedVREFDQ_A0==74
518 16:34:52.918803 TrainedVREFDQ_A1==74
519 16:34:52.924045 VrefDac_Margin_A0==25
520 16:34:52.924528 DeviceVref_Margin_A0==40
521 16:34:52.924945 VrefDac_Margin_A1==25
522 16:34:52.929517 DeviceVref_Margin_A1==40
523 16:34:52.930004
524 16:34:52.930413
525 16:34:52.930813 channel==1
526 16:34:52.931206 RxClkDly_Margin_A0==88 ps 9
527 16:34:52.932896 TxDqDly_Margin_A0==98 ps 10
528 16:34:52.938427 RxClkDly_Margin_A1==88 ps 9
529 16:34:52.938913 TxDqDly_Margin_A1==88 ps 9
530 16:34:52.939331 TrainedVREFDQ_A0==77
531 16:34:52.944011 TrainedVREFDQ_A1==77
532 16:34:52.944495 VrefDac_Margin_A0==23
533 16:34:52.949663 DeviceVref_Margin_A0==37
534 16:34:52.950159 VrefDac_Margin_A1==24
535 16:34:52.950573 DeviceVref_Margin_A1==37
536 16:34:52.950975
537 16:34:52.958489 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
538 16:34:52.958984
539 16:34:52.986529 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
540 16:34:52.987060 2D training succeed
541 16:34:52.997733 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
542 16:34:52.998236 auto size-- 65535DDR cs0 size: 2048MB
543 16:34:52.998658 DDR cs1 size: 2048MB
544 16:34:53.003381 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
545 16:34:53.003876 cs0 DataBus test pass
546 16:34:53.009050 cs1 DataBus test pass
547 16:34:53.009541 cs0 AddrBus test pass
548 16:34:53.014582 cs1 AddrBus test pass
549 16:34:53.015075
550 16:34:53.015492 100bdlr_step_size ps== 420
551 16:34:53.015904 result report
552 16:34:53.020252 boot times 0Enable ddr reg access
553 16:34:53.026797 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
554 16:34:53.040209 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
555 16:34:53.613583 0.0;M3 CHK:0;cm4_sp_mode 0
556 16:34:53.614207 MVN_1=0x00000000
557 16:34:53.618926 MVN_2=0x00000000
558 16:34:53.624671 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
559 16:34:53.625199 OPS=0x10
560 16:34:53.625645 ring efuse init
561 16:34:53.626353 chipver efuse init
562 16:34:53.632873 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
563 16:34:53.633405 [0.018961 Inits done]
564 16:34:53.640405 secure task start!
565 16:34:53.640895 high task start!
566 16:34:53.641287 low task start!
567 16:34:53.641693 run into bl31
568 16:34:53.647100 NOTICE: BL31: v1.3(release):4fc40b1
569 16:34:53.654964 NOTICE: BL31: Built : 15:58:17, May 22 2019
570 16:34:53.655475 NOTICE: BL31: G12A normal boot!
571 16:34:53.680281 NOTICE: BL31: BL33 decompress pass
572 16:34:53.686033 ERROR: Error initializing runtime service opteed_fast
573 16:34:54.918891
574 16:34:54.919314
575 16:34:54.927297 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
576 16:34:54.927616
577 16:34:54.927836 Model: Libre Computer AML-A311D-CC Alta
578 16:34:55.134986 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
579 16:34:55.158645 DRAM: 2 GiB (effective 3.8 GiB)
580 16:34:55.302181 Core: 408 devices, 31 uclasses, devicetree: separate
581 16:34:55.307975 WDT: Not starting watchdog@f0d0
582 16:34:55.340230 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
583 16:34:55.352637 Loading Environment from FAT... Card did not respond to voltage select! : -110
584 16:34:55.357664 ** Bad device specification mmc 0 **
585 16:34:55.367938 Card did not respond to voltage select! : -110
586 16:34:55.375627 ** Bad device specification mmc 0 **
587 16:34:55.376150 Couldn't find partition mmc 0
588 16:34:55.384026 Card did not respond to voltage select! : -110
589 16:34:55.389473 ** Bad device specification mmc 0 **
590 16:34:55.389980 Couldn't find partition mmc 0
591 16:34:55.393740 Error: could not access storage.
592 16:34:55.737169 Net: eth0: ethernet@ff3f0000
593 16:34:55.737786 starting USB...
594 16:34:55.989233 Bus usb@ff500000: Register 3000140 NbrPorts 3
595 16:34:55.989890 Starting the controller
596 16:34:55.995747 USB XHCI 1.10
597 16:34:57.649174 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
598 16:34:57.649606 bl2_stage_init 0x01
599 16:34:57.649834 bl2_stage_init 0x81
600 16:34:57.654592 hw id: 0x0000 - pwm id 0x01
601 16:34:57.654934 bl2_stage_init 0xc1
602 16:34:57.655173 bl2_stage_init 0x02
603 16:34:57.655393
604 16:34:57.660261 L0:00000000
605 16:34:57.661043 L1:20000703
606 16:34:57.661515 L2:00008067
607 16:34:57.661932 L3:14000000
608 16:34:57.665789 B2:00402000
609 16:34:57.666259 B1:e0f83180
610 16:34:57.666667
611 16:34:57.667073 TE: 58124
612 16:34:57.667480
613 16:34:57.671372 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
614 16:34:57.671843
615 16:34:57.672307 Board ID = 1
616 16:34:57.677033 Set A53 clk to 24M
617 16:34:57.677592 Set A73 clk to 24M
618 16:34:57.678034 Set clk81 to 24M
619 16:34:57.682565 A53 clk: 1200 MHz
620 16:34:57.683031 A73 clk: 1200 MHz
621 16:34:57.683442 CLK81: 166.6M
622 16:34:57.683841 smccc: 00012a92
623 16:34:57.688205 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
624 16:34:57.693742 board id: 1
625 16:34:57.699609 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
626 16:34:57.710212 fw parse done
627 16:34:57.716229 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
628 16:34:57.757922 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
629 16:34:57.769824 PIEI prepare done
630 16:34:57.770504 fastboot data load
631 16:34:57.771046 fastboot data verify
632 16:34:57.775263 verify result: 266
633 16:34:57.780989 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
634 16:34:57.781626 LPDDR4 probe
635 16:34:57.782103 ddr clk to 1584MHz
636 16:34:57.788827 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
637 16:34:57.826229
638 16:34:57.826865 dmc_version 0001
639 16:34:57.832038 Check phy result
640 16:34:57.838807 INFO : End of CA training
641 16:34:57.839365 INFO : End of initialization
642 16:34:57.844250 INFO : Training has run successfully!
643 16:34:57.844593 Check phy result
644 16:34:57.850061 INFO : End of initialization
645 16:34:57.850662 INFO : End of read enable training
646 16:34:57.855552 INFO : End of fine write leveling
647 16:34:57.861180 INFO : End of Write leveling coarse delay
648 16:34:57.861754 INFO : Training has run successfully!
649 16:34:57.862223 Check phy result
650 16:34:57.866787 INFO : End of initialization
651 16:34:57.867340 INFO : End of read dq deskew training
652 16:34:57.872378 INFO : End of MPR read delay center optimization
653 16:34:57.877945 INFO : End of write delay center optimization
654 16:34:57.883513 INFO : End of read delay center optimization
655 16:34:57.884149 INFO : End of max read latency training
656 16:34:57.889129 INFO : Training has run successfully!
657 16:34:57.889684 1D training succeed
658 16:34:57.898286 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
659 16:34:57.945996 Check phy result
660 16:34:57.946644 INFO : End of initialization
661 16:34:57.967677 INFO : End of 2D read delay Voltage center optimization
662 16:34:57.987947 INFO : End of 2D read delay Voltage center optimization
663 16:34:58.040025 INFO : End of 2D write delay Voltage center optimization
664 16:34:58.089252 INFO : End of 2D write delay Voltage center optimization
665 16:34:58.095098 INFO : Training has run successfully!
666 16:34:58.095478
667 16:34:58.095741 channel==0
668 16:34:58.100370 RxClkDly_Margin_A0==88 ps 9
669 16:34:58.100701 TxDqDly_Margin_A0==98 ps 10
670 16:34:58.106033 RxClkDly_Margin_A1==88 ps 9
671 16:34:58.106370 TxDqDly_Margin_A1==98 ps 10
672 16:34:58.106607 TrainedVREFDQ_A0==74
673 16:34:58.111683 TrainedVREFDQ_A1==74
674 16:34:58.112077 VrefDac_Margin_A0==24
675 16:34:58.112313 DeviceVref_Margin_A0==40
676 16:34:58.117157 VrefDac_Margin_A1==25
677 16:34:58.117468 DeviceVref_Margin_A1==40
678 16:34:58.117691
679 16:34:58.117907
680 16:34:58.122872 channel==1
681 16:34:58.123440 RxClkDly_Margin_A0==98 ps 10
682 16:34:58.123874 TxDqDly_Margin_A0==98 ps 10
683 16:34:58.128378 RxClkDly_Margin_A1==88 ps 9
684 16:34:58.128873 TxDqDly_Margin_A1==88 ps 9
685 16:34:58.134019 TrainedVREFDQ_A0==77
686 16:34:58.134602 TrainedVREFDQ_A1==77
687 16:34:58.135040 VrefDac_Margin_A0==22
688 16:34:58.139711 DeviceVref_Margin_A0==37
689 16:34:58.140500 VrefDac_Margin_A1==24
690 16:34:58.145287 DeviceVref_Margin_A1==37
691 16:34:58.145870
692 16:34:58.146289 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
693 16:34:58.146715
694 16:34:58.178858 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
695 16:34:58.179464 2D training succeed
696 16:34:58.184455 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
697 16:34:58.190021 auto size-- 65535DDR cs0 size: 2048MB
698 16:34:58.190555 DDR cs1 size: 2048MB
699 16:34:58.195682 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
700 16:34:58.196080 cs0 DataBus test pass
701 16:34:58.201307 cs1 DataBus test pass
702 16:34:58.201873 cs0 AddrBus test pass
703 16:34:58.202300 cs1 AddrBus test pass
704 16:34:58.202708
705 16:34:58.206835 100bdlr_step_size ps== 420
706 16:34:58.207431 result report
707 16:34:58.212485 boot times 0Enable ddr reg access
708 16:34:58.217762 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
709 16:34:58.231370 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
710 16:34:58.804868 0.0;M3 CHK:0;cm4_sp_mode 0
711 16:34:58.805284 MVN_1=0x00000000
712 16:34:58.810336 MVN_2=0x00000000
713 16:34:58.816114 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
714 16:34:58.816433 OPS=0x10
715 16:34:58.816659 ring efuse init
716 16:34:58.816867 chipver efuse init
717 16:34:58.821693 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
718 16:34:58.827317 [0.018961 Inits done]
719 16:34:58.827643 secure task start!
720 16:34:58.827884 high task start!
721 16:34:58.831871 low task start!
722 16:34:58.832284 run into bl31
723 16:34:58.839753 NOTICE: BL31: v1.3(release):4fc40b1
724 16:34:58.845477 NOTICE: BL31: Built : 15:58:17, May 22 2019
725 16:34:58.846000 NOTICE: BL31: G12A normal boot!
726 16:34:58.871840 NOTICE: BL31: BL33 decompress pass
727 16:34:58.877328 ERROR: Error initializing runtime service opteed_fast
728 16:35:00.110286
729 16:35:00.110938
730 16:35:00.118756 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
731 16:35:00.119346
732 16:35:00.119851 Model: Libre Computer AML-A311D-CC Alta
733 16:35:00.327091 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
734 16:35:00.350489 DRAM: 2 GiB (effective 3.8 GiB)
735 16:35:00.493533 Core: 408 devices, 31 uclasses, devicetree: separate
736 16:35:00.498924 WDT: Not starting watchdog@f0d0
737 16:35:00.531645 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
738 16:35:00.544101 Loading Environment from FAT... Card did not respond to voltage select! : -110
739 16:35:00.549062 ** Bad device specification mmc 0 **
740 16:35:00.559360 Card did not respond to voltage select! : -110
741 16:35:00.567022 ** Bad device specification mmc 0 **
742 16:35:00.567558 Couldn't find partition mmc 0
743 16:35:00.575349 Card did not respond to voltage select! : -110
744 16:35:00.580991 ** Bad device specification mmc 0 **
745 16:35:00.581552 Couldn't find partition mmc 0
746 16:35:00.586072 Error: could not access storage.
747 16:35:00.928399 Net: eth0: ethernet@ff3f0000
748 16:35:00.929043 starting USB...
749 16:35:01.180569 Bus usb@ff500000: Register 3000140 NbrPorts 3
750 16:35:01.181160 Starting the controller
751 16:35:01.187232 USB XHCI 1.10
752 16:35:03.349127 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
753 16:35:03.349918 bl2_stage_init 0x01
754 16:35:03.350487 bl2_stage_init 0x81
755 16:35:03.354640 hw id: 0x0000 - pwm id 0x01
756 16:35:03.355292 bl2_stage_init 0xc1
757 16:35:03.355842 bl2_stage_init 0x02
758 16:35:03.356440
759 16:35:03.360245 L0:00000000
760 16:35:03.360840 L1:20000703
761 16:35:03.361372 L2:00008067
762 16:35:03.361888 L3:14000000
763 16:35:03.363123 B2:00402000
764 16:35:03.363680 B1:e0f83180
765 16:35:03.364245
766 16:35:03.364777 TE: 58124
767 16:35:03.365294
768 16:35:03.374242 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
769 16:35:03.374863
770 16:35:03.375403 Board ID = 1
771 16:35:03.375920 Set A53 clk to 24M
772 16:35:03.376488 Set A73 clk to 24M
773 16:35:03.379796 Set clk81 to 24M
774 16:35:03.380404 A53 clk: 1200 MHz
775 16:35:03.380942 A73 clk: 1200 MHz
776 16:35:03.385375 CLK81: 166.6M
777 16:35:03.385963 smccc: 00012a92
778 16:35:03.391058 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
779 16:35:03.391611 board id: 1
780 16:35:03.396580 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
781 16:35:03.410441 fw parse done
782 16:35:03.416395 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
783 16:35:03.458947 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
784 16:35:03.469876 PIEI prepare done
785 16:35:03.470352 fastboot data load
786 16:35:03.470769 fastboot data verify
787 16:35:03.475502 verify result: 266
788 16:35:03.481126 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
789 16:35:03.481605 LPDDR4 probe
790 16:35:03.482012 ddr clk to 1584MHz
791 16:35:03.489084 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
792 16:35:03.526365
793 16:35:03.526943 dmc_version 0001
794 16:35:03.533030 Check phy result
795 16:35:03.539004 INFO : End of CA training
796 16:35:03.539472 INFO : End of initialization
797 16:35:03.544472 INFO : Training has run successfully!
798 16:35:03.544934 Check phy result
799 16:35:03.550055 INFO : End of initialization
800 16:35:03.550506 INFO : End of read enable training
801 16:35:03.555690 INFO : End of fine write leveling
802 16:35:03.561310 INFO : End of Write leveling coarse delay
803 16:35:03.561773 INFO : Training has run successfully!
804 16:35:03.562182 Check phy result
805 16:35:03.566921 INFO : End of initialization
806 16:35:03.567383 INFO : End of read dq deskew training
807 16:35:03.572505 INFO : End of MPR read delay center optimization
808 16:35:03.578132 INFO : End of write delay center optimization
809 16:35:03.583726 INFO : End of read delay center optimization
810 16:35:03.584230 INFO : End of max read latency training
811 16:35:03.589229 INFO : Training has run successfully!
812 16:35:03.589681 1D training succeed
813 16:35:03.598538 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
814 16:35:03.646127 Check phy result
815 16:35:03.646679 INFO : End of initialization
816 16:35:03.667827 INFO : End of 2D read delay Voltage center optimization
817 16:35:03.688089 INFO : End of 2D read delay Voltage center optimization
818 16:35:03.740175 INFO : End of 2D write delay Voltage center optimization
819 16:35:03.789383 INFO : End of 2D write delay Voltage center optimization
820 16:35:03.795038 INFO : Training has run successfully!
821 16:35:03.795543
822 16:35:03.795957 channel==0
823 16:35:03.800559 RxClkDly_Margin_A0==88 ps 9
824 16:35:03.801024 TxDqDly_Margin_A0==98 ps 10
825 16:35:03.806386 RxClkDly_Margin_A1==88 ps 9
826 16:35:03.806840 TxDqDly_Margin_A1==88 ps 9
827 16:35:03.807265 TrainedVREFDQ_A0==74
828 16:35:03.812076 TrainedVREFDQ_A1==74
829 16:35:03.812572 VrefDac_Margin_A0==25
830 16:35:03.812965 DeviceVref_Margin_A0==40
831 16:35:03.817346 VrefDac_Margin_A1==25
832 16:35:03.817807 DeviceVref_Margin_A1==40
833 16:35:03.818202
834 16:35:03.818599
835 16:35:03.819006 channel==1
836 16:35:03.823007 RxClkDly_Margin_A0==98 ps 10
837 16:35:03.823694 TxDqDly_Margin_A0==88 ps 9
838 16:35:03.828494 RxClkDly_Margin_A1==98 ps 10
839 16:35:03.829082 TxDqDly_Margin_A1==88 ps 9
840 16:35:03.834184 TrainedVREFDQ_A0==77
841 16:35:03.834948 TrainedVREFDQ_A1==77
842 16:35:03.835486 VrefDac_Margin_A0==22
843 16:35:03.839790 DeviceVref_Margin_A0==37
844 16:35:03.840392 VrefDac_Margin_A1==24
845 16:35:03.845320 DeviceVref_Margin_A1==37
846 16:35:03.845890
847 16:35:03.846401 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
848 16:35:03.846907
849 16:35:03.878997 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
850 16:35:03.879720 2D training succeed
851 16:35:03.884617 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
852 16:35:03.889725 auto size-- 65535DDR cs0 size: 2048MB
853 16:35:03.890296 DDR cs1 size: 2048MB
854 16:35:03.895408 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
855 16:35:03.896356 cs0 DataBus test pass
856 16:35:03.900925 cs1 DataBus test pass
857 16:35:03.901513 cs0 AddrBus test pass
858 16:35:03.902024 cs1 AddrBus test pass
859 16:35:03.902528
860 16:35:03.906510 100bdlr_step_size ps== 420
861 16:35:03.907079 result report
862 16:35:03.912111 boot times 0Enable ddr reg access
863 16:35:03.917719 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
864 16:35:03.931272 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
865 16:35:04.505008 0.0;M3 CHK:0;cm4_sp_mode 0
866 16:35:04.505823 MVN_1=0x00000000
867 16:35:04.510487 MVN_2=0x00000000
868 16:35:04.516179 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
869 16:35:04.516760 OPS=0x10
870 16:35:04.517291 ring efuse init
871 16:35:04.517820 chipver efuse init
872 16:35:04.521758 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
873 16:35:04.527341 [0.018961 Inits done]
874 16:35:04.527911 secure task start!
875 16:35:04.528483 high task start!
876 16:35:04.531929 low task start!
877 16:35:04.532578 run into bl31
878 16:35:04.538626 NOTICE: BL31: v1.3(release):4fc40b1
879 16:35:04.545429 NOTICE: BL31: Built : 15:58:17, May 22 2019
880 16:35:04.546018 NOTICE: BL31: G12A normal boot!
881 16:35:04.571814 NOTICE: BL31: BL33 decompress pass
882 16:35:04.577578 ERROR: Error initializing runtime service opteed_fast
883 16:35:05.810550
884 16:35:05.811359
885 16:35:05.818664 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
886 16:35:05.819289
887 16:35:05.819823 Model: Libre Computer AML-A311D-CC Alta
888 16:35:06.027362 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
889 16:35:06.050664 DRAM: 2 GiB (effective 3.8 GiB)
890 16:35:06.193717 Core: 408 devices, 31 uclasses, devicetree: separate
891 16:35:06.199486 WDT: Not starting watchdog@f0d0
892 16:35:06.231909 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
893 16:35:06.244153 Loading Environment from FAT... Card did not respond to voltage select! : -110
894 16:35:06.249156 ** Bad device specification mmc 0 **
895 16:35:06.259514 Card did not respond to voltage select! : -110
896 16:35:06.267136 ** Bad device specification mmc 0 **
897 16:35:06.267749 Couldn't find partition mmc 0
898 16:35:06.275505 Card did not respond to voltage select! : -110
899 16:35:06.280991 ** Bad device specification mmc 0 **
900 16:35:06.281583 Couldn't find partition mmc 0
901 16:35:06.286089 Error: could not access storage.
902 16:35:06.628588 Net: eth0: ethernet@ff3f0000
903 16:35:06.629008 starting USB...
904 16:35:06.880301 Bus usb@ff500000: Register 3000140 NbrPorts 3
905 16:35:06.880727 Starting the controller
906 16:35:06.887228 USB XHCI 1.10
907 16:35:08.441639 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
908 16:35:08.449879 scanning usb for storage devices... 0 Storage Device(s) found
910 16:35:08.501725 Hit any key to stop autoboot: 1
911 16:35:08.503083 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
912 16:35:08.503810 start: 2.4.3 bootloader-commands (timeout 00:04:27) [common]
913 16:35:08.504444 Setting prompt string to ['=>']
914 16:35:08.505001 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:27)
915 16:35:08.517271 0
916 16:35:08.518292 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
917 16:35:08.518857 Sending with 10 millisecond of delay
919 16:35:09.654436 => setenv autoload no
920 16:35:09.665542 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
921 16:35:09.671833 setenv autoload no
922 16:35:09.672830 Sending with 10 millisecond of delay
924 16:35:11.477909 => setenv initrd_high 0xffffffff
925 16:35:11.489500 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
926 16:35:11.490169 setenv initrd_high 0xffffffff
927 16:35:11.490635 Sending with 10 millisecond of delay
929 16:35:13.107725 => setenv fdt_high 0xffffffff
930 16:35:13.118380 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
931 16:35:13.118989 setenv fdt_high 0xffffffff
932 16:35:13.119467 Sending with 10 millisecond of delay
934 16:35:13.411146 => dhcp
935 16:35:13.421750 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
936 16:35:13.422306 dhcp
937 16:35:13.422550 Speed: 1000, full duplex
938 16:35:13.422768 BOOTP broadcast 1
939 16:35:13.670073 BOOTP broadcast 2
940 16:35:13.683420 DHCP client bound to address 192.168.6.33 (262 ms)
941 16:35:13.684031 Sending with 10 millisecond of delay
943 16:35:15.361195 => setenv serverip 192.168.6.2
944 16:35:15.372281 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
945 16:35:15.373311 setenv serverip 192.168.6.2
946 16:35:15.374099 Sending with 10 millisecond of delay
948 16:35:19.102765 => tftpboot 0x01080000 710745/tftp-deploy-xbg28b6o/kernel/uImage
949 16:35:19.113342 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
950 16:35:19.113911 tftpboot 0x01080000 710745/tftp-deploy-xbg28b6o/kernel/uImage
951 16:35:19.114146 Speed: 1000, full duplex
952 16:35:19.114356 Using ethernet@ff3f0000 device
953 16:35:19.115938 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
954 16:35:19.121626 Filename '710745/tftp-deploy-xbg28b6o/kernel/uImage'.
955 16:35:19.125412 Load address: 0x1080000
956 16:35:22.167269 Loading: *################################################## 43.8 MiB
957 16:35:22.167933 14.4 MiB/s
958 16:35:22.168458 done
959 16:35:22.171459 Bytes transferred = 45961792 (2bd5240 hex)
960 16:35:22.172361 Sending with 10 millisecond of delay
962 16:35:26.859049 => tftpboot 0x08000000 710745/tftp-deploy-xbg28b6o/ramdisk/ramdisk.cpio.gz.uboot
963 16:35:26.869895 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:09)
964 16:35:26.870817 tftpboot 0x08000000 710745/tftp-deploy-xbg28b6o/ramdisk/ramdisk.cpio.gz.uboot
965 16:35:26.871302 Speed: 1000, full duplex
966 16:35:26.871755 Using ethernet@ff3f0000 device
967 16:35:26.872755 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
968 16:35:26.881239 Filename '710745/tftp-deploy-xbg28b6o/ramdisk/ramdisk.cpio.gz.uboot'.
969 16:35:26.881549 Load address: 0x8000000
970 16:35:34.287488 Loading: *############T ##################################### UDP wrong checksum 00000005 00001ee4
971 16:35:39.289643 T UDP wrong checksum 00000005 00001ee4
972 16:35:49.291428 T T UDP wrong checksum 00000005 00001ee4
973 16:36:09.295606 T T T T UDP wrong checksum 00000005 00001ee4
974 16:36:24.291141 T T UDP wrong checksum 000000ff 00000302
975 16:36:24.299500
976 16:36:24.300089 Retry count exceeded; starting again
978 16:36:24.301524 end: 2.4.3 bootloader-commands (duration 00:01:16) [common]
981 16:36:24.303420 end: 2.4 uboot-commands (duration 00:01:48) [common]
983 16:36:24.304901 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
985 16:36:24.305969 end: 2 uboot-action (duration 00:01:48) [common]
987 16:36:24.307581 Cleaning after the job
988 16:36:24.308191 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/710745/tftp-deploy-xbg28b6o/ramdisk
989 16:36:24.309673 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/710745/tftp-deploy-xbg28b6o/kernel
990 16:36:24.340115 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/710745/tftp-deploy-xbg28b6o/dtb
991 16:36:24.341409 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/710745/tftp-deploy-xbg28b6o/modules
992 16:36:24.347961 start: 4.1 power-off (timeout 00:00:30) [common]
993 16:36:24.349046 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
994 16:36:24.383847 >> OK - accepted request
995 16:36:24.385789 Returned 0 in 0 seconds
996 16:36:24.487048 end: 4.1 power-off (duration 00:00:00) [common]
998 16:36:24.488955 start: 4.2 read-feedback (timeout 00:10:00) [common]
999 16:36:24.490176 Listened to connection for namespace 'common' for up to 1s
1000 16:36:25.489958 Finalising connection for namespace 'common'
1001 16:36:25.490744 Disconnecting from shell: Finalise
1002 16:36:25.491291 =>
1003 16:36:25.592431 end: 4.2 read-feedback (duration 00:00:01) [common]
1004 16:36:25.593136 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/710745
1005 16:36:25.886142 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/710745
1006 16:36:25.886741 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.