Boot log: beaglebone-black
- Warnings: 2
- Kernel Warnings: 15
- Errors: 0
- Boot result: PASS
- Kernel Errors: 10
1 11:00:09.262243 lava-dispatcher, installed at version: 2023.08
2 11:00:09.262621 start: 0 validate
3 11:00:09.262848 Start time: 2024-09-06 11:00:09.262833+00:00 (UTC)
4 11:00:09.263109 Validating that http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/initrd.cpio.gz exists
5 11:00:09.587313 Validating that http://storage.kernelci.org/next/master/next-20240906/arm/multi_v7_defconfig/gcc-12/kernel/zImage exists
6 11:00:09.747735 Validating that http://storage.kernelci.org/next/master/next-20240906/arm/multi_v7_defconfig/gcc-12/dtbs/ti/omap/am335x-boneblack.dtb exists
7 11:00:09.907585 Validating that http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/full.rootfs.tar.xz exists
8 11:00:10.068942 Validating that http://storage.kernelci.org/next/master/next-20240906/arm/multi_v7_defconfig/gcc-12/modules.tar.xz exists
9 11:00:10.237821 validate duration: 0.98
11 11:00:10.238880 start: 1 tftp-deploy (timeout 00:10:00) [common]
12 11:00:10.239343 start: 1.1 download-retry (timeout 00:10:00) [common]
13 11:00:10.239722 start: 1.1.1 http-download (timeout 00:10:00) [common]
14 11:00:10.240252 Not decompressing ramdisk as can be used compressed.
15 11:00:10.240703 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/initrd.cpio.gz
16 11:00:10.241034 saving as /var/lib/lava/dispatcher/tmp/1190077/tftp-deploy-ekbpqj10/ramdisk/initrd.cpio.gz
17 11:00:10.241367 total size: 4775763 (4 MB)
18 11:00:10.565223 progress 0 % (0 MB)
19 11:00:11.042073 progress 5 % (0 MB)
20 11:00:11.200637 progress 10 % (0 MB)
21 11:00:11.391698 progress 15 % (0 MB)
22 11:00:11.562030 progress 20 % (0 MB)
23 11:00:11.568075 progress 25 % (1 MB)
24 11:00:11.573995 progress 30 % (1 MB)
25 11:00:11.580763 progress 35 % (1 MB)
26 11:00:11.681279 progress 40 % (1 MB)
27 11:00:11.719162 progress 45 % (2 MB)
28 11:00:11.859527 progress 50 % (2 MB)
29 11:00:12.008222 progress 55 % (2 MB)
30 11:00:12.151147 progress 60 % (2 MB)
31 11:00:12.181642 progress 65 % (2 MB)
32 11:00:12.328555 progress 70 % (3 MB)
33 11:00:12.473131 progress 75 % (3 MB)
34 11:00:12.501630 progress 80 % (3 MB)
35 11:00:12.643747 progress 85 % (3 MB)
36 11:00:12.790745 progress 90 % (4 MB)
37 11:00:12.818964 progress 95 % (4 MB)
38 11:00:12.959078 progress 100 % (4 MB)
39 11:00:12.959518 4 MB downloaded in 2.72 s (1.68 MB/s)
40 11:00:12.959871 end: 1.1.1 http-download (duration 00:00:03) [common]
42 11:00:12.960315 end: 1.1 download-retry (duration 00:00:03) [common]
43 11:00:12.960467 start: 1.2 download-retry (timeout 00:09:57) [common]
44 11:00:12.960611 start: 1.2.1 http-download (timeout 00:09:57) [common]
45 11:00:12.960839 downloading http://storage.kernelci.org/next/master/next-20240906/arm/multi_v7_defconfig/gcc-12/kernel/zImage
46 11:00:12.960951 saving as /var/lib/lava/dispatcher/tmp/1190077/tftp-deploy-ekbpqj10/kernel/zImage
47 11:00:12.961060 total size: 11428352 (10 MB)
48 11:00:12.961169 No compression specified
49 11:00:13.123457 progress 0 % (0 MB)
50 11:00:13.311678 progress 5 % (0 MB)
51 11:00:13.622301 progress 10 % (1 MB)
52 11:00:13.944621 progress 15 % (1 MB)
53 11:00:14.261891 progress 20 % (2 MB)
54 11:00:14.580329 progress 25 % (2 MB)
55 11:00:15.066799 progress 30 % (3 MB)
56 11:00:15.385455 progress 35 % (3 MB)
57 11:00:15.837427 progress 40 % (4 MB)
58 11:00:16.178626 progress 45 % (4 MB)
59 11:00:16.664158 progress 50 % (5 MB)
60 11:00:17.250211 progress 55 % (6 MB)
61 11:00:17.744999 progress 60 % (6 MB)
62 11:00:18.237272 progress 65 % (7 MB)
63 11:00:18.882921 progress 70 % (7 MB)
64 11:00:19.498932 progress 75 % (8 MB)
65 11:00:20.099296 progress 80 % (8 MB)
66 11:00:20.619992 progress 85 % (9 MB)
67 11:00:21.173280 progress 90 % (9 MB)
68 11:00:21.873018 progress 95 % (10 MB)
69 11:00:22.346475 progress 100 % (10 MB)
70 11:00:22.347711 10 MB downloaded in 9.39 s (1.16 MB/s)
71 11:00:22.348666 end: 1.2.1 http-download (duration 00:00:09) [common]
73 11:00:22.349881 end: 1.2 download-retry (duration 00:00:09) [common]
74 11:00:22.350302 start: 1.3 download-retry (timeout 00:09:48) [common]
75 11:00:22.350718 start: 1.3.1 http-download (timeout 00:09:48) [common]
76 11:00:22.351437 downloading http://storage.kernelci.org/next/master/next-20240906/arm/multi_v7_defconfig/gcc-12/dtbs/ti/omap/am335x-boneblack.dtb
77 11:00:22.351722 saving as /var/lib/lava/dispatcher/tmp/1190077/tftp-deploy-ekbpqj10/dtb/am335x-boneblack.dtb
78 11:00:22.351921 total size: 70568 (0 MB)
79 11:00:22.352217 No compression specified
80 11:00:22.517906 progress 46 % (0 MB)
81 11:00:22.520579 progress 92 % (0 MB)
82 11:00:22.521822 progress 100 % (0 MB)
83 11:00:22.522543 0 MB downloaded in 0.17 s (0.39 MB/s)
84 11:00:22.523106 end: 1.3.1 http-download (duration 00:00:00) [common]
86 11:00:22.523994 end: 1.3 download-retry (duration 00:00:00) [common]
87 11:00:22.524382 start: 1.4 download-retry (timeout 00:09:48) [common]
88 11:00:22.524792 start: 1.4.1 http-download (timeout 00:09:48) [common]
89 11:00:22.525332 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/full.rootfs.tar.xz
90 11:00:22.525638 saving as /var/lib/lava/dispatcher/tmp/1190077/tftp-deploy-ekbpqj10/nfsrootfs/full.rootfs.tar
91 11:00:22.525934 total size: 117747780 (112 MB)
92 11:00:22.526245 Using unxz to decompress xz
93 11:00:22.694184 progress 0 % (0 MB)
94 11:00:27.625739 progress 5 % (5 MB)
95 11:00:30.318024 progress 10 % (11 MB)
96 11:00:31.928704 progress 15 % (16 MB)
97 11:00:33.163281 progress 20 % (22 MB)
98 11:00:34.487957 progress 25 % (28 MB)
99 11:00:35.724756 progress 30 % (33 MB)
100 11:00:36.873082 progress 35 % (39 MB)
101 11:00:38.373853 progress 40 % (44 MB)
102 11:00:39.740085 progress 45 % (50 MB)
103 11:00:41.032760 progress 50 % (56 MB)
104 11:00:42.360904 progress 55 % (61 MB)
105 11:00:43.685564 progress 60 % (67 MB)
106 11:00:44.974912 progress 65 % (73 MB)
107 11:00:46.251753 progress 70 % (78 MB)
108 11:00:47.498928 progress 75 % (84 MB)
109 11:00:48.650932 progress 80 % (89 MB)
110 11:00:49.739425 progress 85 % (95 MB)
111 11:00:50.719424 progress 90 % (101 MB)
112 11:00:51.616065 progress 95 % (106 MB)
113 11:00:52.659254 progress 100 % (112 MB)
114 11:00:52.662057 112 MB downloaded in 30.14 s (3.73 MB/s)
115 11:00:52.663151 end: 1.4.1 http-download (duration 00:00:30) [common]
117 11:00:52.664253 end: 1.4 download-retry (duration 00:00:30) [common]
118 11:00:52.664669 start: 1.5 download-retry (timeout 00:09:18) [common]
119 11:00:52.665082 start: 1.5.1 http-download (timeout 00:09:18) [common]
120 11:00:52.665804 downloading http://storage.kernelci.org/next/master/next-20240906/arm/multi_v7_defconfig/gcc-12/modules.tar.xz
121 11:00:52.666117 saving as /var/lib/lava/dispatcher/tmp/1190077/tftp-deploy-ekbpqj10/modules/modules.tar
122 11:00:52.666421 total size: 6610976 (6 MB)
123 11:00:52.666731 Using unxz to decompress xz
124 11:00:52.831091 progress 0 % (0 MB)
125 11:00:53.016292 progress 5 % (0 MB)
126 11:00:53.056162 progress 10 % (0 MB)
127 11:00:53.088806 progress 15 % (0 MB)
128 11:00:53.119352 progress 20 % (1 MB)
129 11:00:53.167978 progress 25 % (1 MB)
130 11:00:53.208514 progress 30 % (1 MB)
131 11:00:53.330663 progress 35 % (2 MB)
132 11:00:53.371977 progress 40 % (2 MB)
133 11:00:53.492419 progress 45 % (2 MB)
134 11:00:53.532516 progress 50 % (3 MB)
135 11:00:53.811403 progress 55 % (3 MB)
136 11:00:53.857389 progress 60 % (3 MB)
137 11:00:53.892866 progress 65 % (4 MB)
138 11:00:53.964259 progress 70 % (4 MB)
139 11:00:54.101483 progress 75 % (4 MB)
140 11:00:54.153902 progress 80 % (5 MB)
141 11:00:54.287132 progress 85 % (5 MB)
142 11:00:54.427801 progress 90 % (5 MB)
143 11:00:54.480559 progress 95 % (6 MB)
144 11:00:54.609519 progress 100 % (6 MB)
145 11:00:54.616656 6 MB downloaded in 1.95 s (3.23 MB/s)
146 11:00:54.617330 end: 1.5.1 http-download (duration 00:00:02) [common]
148 11:00:54.618437 end: 1.5 download-retry (duration 00:00:02) [common]
149 11:00:54.619115 start: 1.6 prepare-tftp-overlay (timeout 00:09:16) [common]
150 11:00:54.619695 start: 1.6.1 extract-nfsrootfs (timeout 00:09:16) [common]
151 11:01:01.783427 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/1190077/extract-nfsrootfs-0yd98ml6
152 11:01:01.783777 end: 1.6.1 extract-nfsrootfs (duration 00:00:07) [common]
153 11:01:01.783925 start: 1.6.2 lava-overlay (timeout 00:09:08) [common]
154 11:01:01.784210 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t
155 11:01:01.784453 makedir: /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin
156 11:01:01.784619 makedir: /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/tests
157 11:01:01.784782 makedir: /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/results
158 11:01:01.784942 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-add-keys
159 11:01:01.785181 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-add-sources
160 11:01:01.785397 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-background-process-start
161 11:01:01.785615 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-background-process-stop
162 11:01:01.785850 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-common-functions
163 11:01:01.786067 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-echo-ipv4
164 11:01:01.786280 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-install-packages
165 11:01:01.786493 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-installed-packages
166 11:01:01.786718 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-os-build
167 11:01:01.786931 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-probe-channel
168 11:01:01.787145 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-probe-ip
169 11:01:01.787355 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-target-ip
170 11:01:01.787564 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-target-mac
171 11:01:01.787787 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-target-storage
172 11:01:01.788005 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-test-case
173 11:01:01.788230 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-test-event
174 11:01:01.788456 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-test-feedback
175 11:01:01.788668 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-test-raise
176 11:01:01.788880 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-test-reference
177 11:01:01.789090 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-test-runner
178 11:01:01.789298 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-test-set
179 11:01:01.789508 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-test-shell
180 11:01:01.789724 Updating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-add-keys (debian)
181 11:01:01.821042 Updating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-add-sources (debian)
182 11:01:01.821331 Updating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-install-packages (debian)
183 11:01:01.821584 Updating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-installed-packages (debian)
184 11:01:01.821834 Updating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/bin/lava-os-build (debian)
185 11:01:01.822056 Creating /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/environment
186 11:01:01.822216 LAVA metadata
187 11:01:01.822330 - LAVA_JOB_ID=1190077
188 11:01:01.822437 - LAVA_DISPATCHER_IP=172.16.3.3
189 11:01:01.822604 start: 1.6.2.1 ssh-authorize (timeout 00:09:08) [common]
190 11:01:01.823037 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
191 11:01:01.823187 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:08) [common]
192 11:01:01.823291 skipped lava-vland-overlay
193 11:01:01.823415 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
194 11:01:01.823547 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:08) [common]
195 11:01:01.823669 skipped lava-multinode-overlay
196 11:01:01.823793 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
197 11:01:01.823921 start: 1.6.2.4 test-definition (timeout 00:09:08) [common]
198 11:01:01.824034 Loading test definitions
199 11:01:01.824176 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:08) [common]
200 11:01:01.824286 Using /lava-1190077 at stage 0
201 11:01:01.824804 uuid=1190077_1.6.2.4.1 testdef=None
202 11:01:01.824953 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
203 11:01:01.825084 start: 1.6.2.4.2 test-overlay (timeout 00:09:08) [common]
204 11:01:01.825824 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
206 11:01:01.826192 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:08) [common]
207 11:01:01.827099 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
209 11:01:01.827475 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:08) [common]
210 11:01:01.844342 runner path: /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/0/tests/0_timesync-off test_uuid 1190077_1.6.2.4.1
211 11:01:01.844613 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
213 11:01:01.844982 start: 1.6.2.4.5 git-repo-action (timeout 00:09:08) [common]
214 11:01:01.845096 Using /lava-1190077 at stage 0
215 11:01:01.845255 Fetching tests from https://github.com/kernelci/test-definitions.git
216 11:01:01.845372 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/0/tests/1_kselftest-dt'
217 11:01:07.268322 Running '/usr/bin/git checkout kernelci.org
218 11:01:08.531246 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
219 11:01:08.532802 uuid=1190077_1.6.2.4.5 testdef=None
220 11:01:08.533271 end: 1.6.2.4.5 git-repo-action (duration 00:00:07) [common]
222 11:01:08.534293 start: 1.6.2.4.6 test-overlay (timeout 00:09:02) [common]
223 11:01:08.537545 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
225 11:01:08.538610 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:02) [common]
226 11:01:08.543085 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
228 11:01:08.543888 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:02) [common]
229 11:01:08.846908 runner path: /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/0/tests/1_kselftest-dt test_uuid 1190077_1.6.2.4.5
230 11:01:08.847301 BOARD='beaglebone-black'
231 11:01:08.847626 BRANCH='next'
232 11:01:08.847928 SKIPFILE='/dev/null'
233 11:01:08.848221 SKIP_INSTALL='True'
234 11:01:08.848507 TESTPROG_URL='http://storage.kernelci.org/next/master/next-20240906/arm/multi_v7_defconfig/gcc-12/kselftest.tar.xz'
235 11:01:08.848796 TST_CASENAME=''
236 11:01:08.849075 TST_CMDFILES='dt'
237 11:01:08.849772 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
239 11:01:08.850750 Creating lava-test-runner.conf files
240 11:01:08.851039 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/1190077/lava-overlay-xbtl715t/lava-1190077/0 for stage 0
241 11:01:08.851474 - 0_timesync-off
242 11:01:08.851806 - 1_kselftest-dt
243 11:01:08.852268 end: 1.6.2.4 test-definition (duration 00:00:07) [common]
244 11:01:08.852655 start: 1.6.2.5 compress-overlay (timeout 00:09:01) [common]
245 11:01:18.382483 end: 1.6.2.5 compress-overlay (duration 00:00:10) [common]
246 11:01:18.382722 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:52) [common]
247 11:01:18.382863 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
248 11:01:18.383003 end: 1.6.2 lava-overlay (duration 00:00:17) [common]
249 11:01:18.383144 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:52) [common]
250 11:01:18.522287 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
251 11:01:18.522537 start: 1.6.4 extract-modules (timeout 00:08:52) [common]
252 11:01:18.522662 extracting modules file /var/lib/lava/dispatcher/tmp/1190077/tftp-deploy-ekbpqj10/modules/modules.tar to /var/lib/lava/dispatcher/tmp/1190077/extract-nfsrootfs-0yd98ml6
253 11:01:18.909377 extracting modules file /var/lib/lava/dispatcher/tmp/1190077/tftp-deploy-ekbpqj10/modules/modules.tar to /var/lib/lava/dispatcher/tmp/1190077/extract-overlay-ramdisk-t_nwnm49/ramdisk
254 11:01:19.290589 end: 1.6.4 extract-modules (duration 00:00:01) [common]
255 11:01:19.290845 start: 1.6.5 apply-overlay-tftp (timeout 00:08:51) [common]
256 11:01:19.290972 [common] Applying overlay to NFS
257 11:01:19.291078 [common] Applying overlay /var/lib/lava/dispatcher/tmp/1190077/compress-overlay-blrtlke6/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/1190077/extract-nfsrootfs-0yd98ml6
258 11:01:20.593433 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
259 11:01:20.593680 start: 1.6.6 prepare-kernel (timeout 00:08:50) [common]
260 11:01:20.593821 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:50) [common]
261 11:01:20.593964 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
262 11:01:20.594094 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
263 11:01:20.594228 start: 1.6.7 configure-preseed-file (timeout 00:08:50) [common]
264 11:01:20.594354 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
265 11:01:20.594483 start: 1.6.8 compress-ramdisk (timeout 00:08:50) [common]
266 11:01:20.594594 Building ramdisk /var/lib/lava/dispatcher/tmp/1190077/extract-overlay-ramdisk-t_nwnm49/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/1190077/extract-overlay-ramdisk-t_nwnm49/ramdisk
267 11:01:20.897975 >> 74931 blocks
268 11:01:22.964772 Adding RAMdisk u-boot header.
269 11:01:22.965221 mkimage -A arm -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/1190077/extract-overlay-ramdisk-t_nwnm49/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/1190077/extract-overlay-ramdisk-t_nwnm49/ramdisk.cpio.gz.uboot
270 11:01:23.275498 output: Image Name:
271 11:01:23.275854 output: Created: Fri Sep 6 11:01:22 2024
272 11:01:23.276148 output: Image Type: ARM Linux RAMDisk Image (uncompressed)
273 11:01:23.276444 output: Data Size: 14795622 Bytes = 14448.85 KiB = 14.11 MiB
274 11:01:23.276731 output: Load Address: 00000000
275 11:01:23.277011 output: Entry Point: 00000000
276 11:01:23.277291 output:
277 11:01:23.277756 rename /var/lib/lava/dispatcher/tmp/1190077/extract-overlay-ramdisk-t_nwnm49/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/1190077/tftp-deploy-ekbpqj10/ramdisk/ramdisk.cpio.gz.uboot
278 11:01:23.278248 end: 1.6.8 compress-ramdisk (duration 00:00:03) [common]
279 11:01:23.278647 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
280 11:01:23.279038 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:47) [common]
281 11:01:23.279342 No LXC device requested
282 11:01:23.279690 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
283 11:01:23.279868 start: 1.8 deploy-device-env (timeout 00:08:47) [common]
284 11:01:23.280228 end: 1.8 deploy-device-env (duration 00:00:00) [common]
285 11:01:23.280522 Checking files for TFTP limit of 4294967296 bytes.
286 11:01:23.282415 end: 1 tftp-deploy (duration 00:01:13) [common]
287 11:01:23.282816 start: 2 uboot-action (timeout 00:05:00) [common]
288 11:01:23.283206 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
289 11:01:23.283576 end: 2.1 uboot-from-media (duration 00:00:00) [common]
290 11:01:23.283805 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
291 11:01:23.284264 substitutions:
292 11:01:23.284565 - {BOOTX}: bootz 0x82000000 0x83000000 0x88000000
293 11:01:23.284859 - {DTB_ADDR}: 0x88000000
294 11:01:23.285140 - {DTB}: 1190077/tftp-deploy-ekbpqj10/dtb/am335x-boneblack.dtb
295 11:01:23.285421 - {INITRD}: 1190077/tftp-deploy-ekbpqj10/ramdisk/ramdisk.cpio.gz.uboot
296 11:01:23.285698 - {KERNEL_ADDR}: 0x82000000
297 11:01:23.285976 - {KERNEL}: 1190077/tftp-deploy-ekbpqj10/kernel/zImage
298 11:01:23.286252 - {LAVA_MAC}: None
299 11:01:23.286544 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/1190077/extract-nfsrootfs-0yd98ml6
300 11:01:23.286821 - {NFS_SERVER_IP}: 172.16.3.3
301 11:01:23.287089 - {PRESEED_CONFIG}: None
302 11:01:23.287357 - {PRESEED_LOCAL}: None
303 11:01:23.287654 - {RAMDISK_ADDR}: 0x83000000
304 11:01:23.287781 - {RAMDISK}: 1190077/tftp-deploy-ekbpqj10/ramdisk/ramdisk.cpio.gz.uboot
305 11:01:23.287939 - {ROOT_PART}: None
306 11:01:23.288205 - {ROOT}: None
307 11:01:23.288471 - {SERVER_IP}: 172.16.3.3
308 11:01:23.288736 - {TEE_ADDR}: 0x83000000
309 11:01:23.289002 - {TEE}: None
310 11:01:23.289269 Parsed boot commands:
311 11:01:23.289529 - setenv autoload no
312 11:01:23.289795 - setenv initrd_high 0xffffffff
313 11:01:23.290061 - setenv fdt_high 0xffffffff
314 11:01:23.290324 - dhcp
315 11:01:23.290587 - setenv serverip 172.16.3.3
316 11:01:23.290850 - tftp 0x82000000 1190077/tftp-deploy-ekbpqj10/kernel/zImage
317 11:01:23.291118 - tftp 0x83000000 1190077/tftp-deploy-ekbpqj10/ramdisk/ramdisk.cpio.gz.uboot
318 11:01:23.291387 - setenv initrd_size ${filesize}
319 11:01:23.291666 - tftp 0x88000000 1190077/tftp-deploy-ekbpqj10/dtb/am335x-boneblack.dtb
320 11:01:23.291791 - setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1190077/extract-nfsrootfs-0yd98ml6,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
321 11:01:23.291942 - bootz 0x82000000 0x83000000 0x88000000
322 11:01:23.292295 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
324 11:01:23.293270 start: 2.3 connect-device (timeout 00:05:00) [common]
325 11:01:23.293556 [common] connect-device Connecting to device using 'telnet ts5 2000'
326 11:01:23.300879 Setting prompt string to ['lava-test: # ']
327 11:01:23.301384 end: 2.3 connect-device (duration 00:00:00) [common]
328 11:01:23.301593 start: 2.4 uboot-commands (timeout 00:05:00) [common]
329 11:01:23.301795 start: 2.4.1 reset-device (timeout 00:05:00) [common]
330 11:01:23.301987 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
331 11:01:23.302290 Calling: 'drpm' 'lf-bbb' 'powercycle'
332 11:01:23.521869 >> OFF
333 11:01:38.861272 >> ON
334 11:01:38.862322 Returned 0 in 15 seconds
335 11:01:38.963253 end: 2.4.1.1 pdu-reboot (duration 00:00:16) [common]
337 11:01:38.964393 end: 2.4.1 reset-device (duration 00:00:16) [common]
338 11:01:38.964821 start: 2.4.2 bootloader-interrupt (timeout 00:04:44) [common]
339 11:01:38.965210 Setting prompt string to ['Hit any key to stop autoboot']
340 11:01:38.965541 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
341 11:01:38.966500 Trying 192.168.1.205...
342 11:01:38.966817 Connected to ts5.
343 11:01:38.967096 Escape character is '^]'.
344 11:01:38.967378
345 11:01:38.967677 ser2net port telnet,2000 device serialdev,/dev/ttyUSB-lf-bbb-01,115200n81,local [] (Debian GNU/Linux)
346 11:01:38.967965
347 11:01:39.803243
348 11:01:39.811224 U-Boot SPL 2021.10-nethacked-for-LAVA_hws@denx.de-dirty (Oct 19 2021 - 19:02:35 +0200)
349 11:01:39.811628 Trying to boot from MMC2
350 11:01:40.322997
351 11:01:40.323398
352 11:01:40.329134 U-Boot 2021.10-nethacked-for-LAVA_hws@denx.de-dirty (Oct 19 2021 - 19:02:35 +0200)
353 11:01:40.329535
354 11:01:40.329865 CPU : AM335X-GP rev 2.1
355 11:01:40.334674 Model: TI AM335x BeagleBone Black
356 11:01:40.335067 DRAM: 512 MiB
357 11:01:40.415536 WDT: Started with servicing (60s timeout)
358 11:01:40.820434 NAND: 0 MiB
359 11:01:40.832237 MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1
360 11:01:40.864556 Loading Environment from FAT... <ethaddr> not set. Validating first E-fuse MAC
361 11:01:40.894769 Net: eth2: ethernet@4a100000, eth3: usb_ether
362 11:01:40.953520 end: 2.4.2 bootloader-interrupt (duration 00:00:02) [common]
363 11:01:40.954006 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
364 11:01:40.954369 Setting prompt string to ['=> ']
365 11:01:40.954718 bootloader-commands: Wait for prompt ['=> '] (timeout 00:04:42)
366 11:01:40.963333 Hit any key to stop autoboot: 2 0
367 11:01:40.964126 Setting prompt string to ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
368 11:01:40.964505 Sending with 10 millisecond of delay
370 11:01:42.100269 => setenv autoload no
371 11:01:42.110830 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:41)
372 11:01:42.113889 setenv autoload no
373 11:01:42.114478 Sending with 10 millisecond of delay
375 11:01:43.913835 => setenv initrd_high 0xffffffff
376 11:01:43.924457 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:39)
377 11:01:43.925093 setenv initrd_high 0xffffffff
378 11:01:43.925655 Sending with 10 millisecond of delay
380 11:01:45.544040 => setenv fdt_high 0xffffffff
381 11:01:45.554710 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:38)
382 11:01:45.555356 setenv fdt_high 0xffffffff
383 11:01:45.555962 Sending with 10 millisecond of delay
385 11:01:45.848093 => dhcp
386 11:01:45.858638 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:37)
387 11:01:45.859944 dhcp
388 11:01:45.860329 link up on port 0, speed 100, full duplex
389 11:01:45.860633 BOOTP broadcast 1
390 11:01:45.906057 DHCP client bound to address 172.16.3.210 (40 ms)
391 11:01:45.906677 Sending with 10 millisecond of delay
393 11:01:47.525180 => setenv serverip 172.16.3.3
394 11:01:47.535720 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:36)
395 11:01:47.536361 setenv serverip 172.16.3.3
396 11:01:47.536924 Sending with 10 millisecond of delay
398 11:01:51.084963 => tftp 0x82000000 1190077/tftp-deploy-ekbpqj10/kernel/zImage
399 11:01:51.095649 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:32)
400 11:01:51.096837 tftp 0x82000000 1190077/tftp-deploy-ekbpqj10/kernel/zImage
401 11:01:51.097172 link up on port 0, speed 100, full duplex
402 11:01:51.101803 Using ethernet@4a100000 device
403 11:01:51.107773 TFTP from server 172.16.3.3; our IP address is 172.16.3.210
404 11:01:51.114600 Filename '1190077/tftp-deploy-ekbpqj10/kernel/zImage'.
405 11:01:51.114988 Load address: 0x82000000
406 11:01:53.285956 Loading: *################################################## 10.9 MiB
407 11:01:53.286367 5 MiB/s
408 11:01:53.286672 done
409 11:01:53.290411 Bytes transferred = 11428352 (ae6200 hex)
410 11:01:53.291043 Sending with 10 millisecond of delay
412 11:01:57.804015 => tftp 0x83000000 1190077/tftp-deploy-ekbpqj10/ramdisk/ramdisk.cpio.gz.uboot
413 11:01:57.814724 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:25)
414 11:01:57.815356 tftp 0x83000000 1190077/tftp-deploy-ekbpqj10/ramdisk/ramdisk.cpio.gz.uboot
415 11:01:57.815713 link up on port 0, speed 100, full duplex
416 11:01:57.820315 Using ethernet@4a100000 device
417 11:01:57.826504 TFTP from server 172.16.3.3; our IP address is 172.16.3.210
418 11:01:57.835639 Filename '1190077/tftp-deploy-ekbpqj10/ramdisk/ramdisk.cpio.gz.uboot'.
419 11:01:57.836016 Load address: 0x83000000
420 11:02:01.485232 Loading: *################################################## 14.1 MiB
421 11:02:01.485711 3.9 MiB/s
422 11:02:01.486016 done
423 11:02:01.489443 Bytes transferred = 14795686 (e1c3a6 hex)
424 11:02:01.490089 Sending with 10 millisecond of delay
426 11:02:03.350241 => setenv initrd_size ${filesize}
427 11:02:03.360826 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:20)
428 11:02:03.361441 setenv initrd_size ${filesize}
429 11:02:03.361996 Sending with 10 millisecond of delay
431 11:02:07.573730 => tftp 0x88000000 1190077/tftp-deploy-ekbpqj10/dtb/am335x-boneblack.dtb
432 11:02:07.584409 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:16)
433 11:02:07.585741 tftp 0x88000000 1190077/tftp-deploy-ekbpqj10/dtb/am335x-boneblack.dtb
434 11:02:07.586119 link up on port 0, speed 100, full duplex
435 11:02:07.590765 Using ethernet@4a100000 device
436 11:02:07.596726 TFTP from server 172.16.3.3; our IP address is 172.16.3.210
437 11:02:07.607776 Filename '1190077/tftp-deploy-ekbpqj10/dtb/am335x-boneblack.dtb'.
438 11:02:07.608165 Load address: 0x88000000
439 11:02:07.627514 Loading: *################################################## 68.9 KiB
440 11:02:07.627927 3.2 MiB/s
441 11:02:07.628234 done
442 11:02:07.633049 Bytes transferred = 70568 (113a8 hex)
443 11:02:07.633690 Sending with 10 millisecond of delay
445 11:02:21.010520 => setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1190077/extract-nfsrootfs-0yd98ml6,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
446 11:02:21.021285 bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:02)
447 11:02:21.021928 setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1190077/extract-nfsrootfs-0yd98ml6,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
448 11:02:21.022513 Sending with 10 millisecond of delay
450 11:02:23.365183 => bootz 0x82000000 0x83000000 0x88000000
451 11:02:23.375776 Setting prompt string to ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
452 11:02:23.376219 bootloader-commands: Wait for prompt ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:00)
453 11:02:23.376946 bootz 0x82000000 0x83000000 0x88000000
454 11:02:23.377271 Kernel image @ 0x82000000 [ 0x000000 - 0xae6200 ]
455 11:02:23.379888 ## Loading init Ramdisk from Legacy Image at 83000000 ...
456 11:02:23.385994 Image Name:
457 11:02:23.386373 Created: 2024-09-06 11:01:22 UTC
458 11:02:23.393227 Image Type: ARM Linux RAMDisk Image (uncompressed)
459 11:02:23.393612 Data Size: 14795622 Bytes = 14.1 MiB
460 11:02:23.399377 Load Address: 00000000
461 11:02:23.399796 Entry Point: 00000000
462 11:02:23.570631 Verifying Checksum ... OK
463 11:02:23.571017 ## Flattened Device Tree blob at 88000000
464 11:02:23.577993 Booting using the fdt blob at 0x88000000
465 11:02:23.582189 Using Device Tree in place at 88000000, end 880143a7
466 11:02:23.595388
467 11:02:23.595767 Starting kernel ...
468 11:02:23.596079
469 11:02:23.596776 end: 2.4.3 bootloader-commands (duration 00:00:43) [common]
470 11:02:23.597203 start: 2.4.4 auto-login-action (timeout 00:04:00) [common]
471 11:02:23.597547 Setting prompt string to ['Linux version [0-9]']
472 11:02:23.597891 Setting prompt string to ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
473 11:02:23.598227 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:05:00)
474 11:02:24.434552 [ 0.000000] Booting Linux on physical CPU 0x0
475 11:02:24.439954 start: 2.4.4.1 login-action (timeout 00:03:59) [common]
476 11:02:24.440380 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
477 11:02:24.440725 Setting prompt string to []
478 11:02:24.441069 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
479 11:02:24.441406 Using line separator: #'\n'#
480 11:02:24.441701 No login prompt set.
481 11:02:24.442002 Parsing kernel messages
482 11:02:24.442280 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
483 11:02:24.442786 [login-action] Waiting for messages, (timeout 00:03:59)
484 11:02:24.457810 [ 0.000000] Linux version 6.11.0-rc6-next-20240906 (KernelCI@build-j310113-arm-gcc-12-multi-v7-defconfig-8nhh8) (arm-linux-gnueabihf-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP Fri Sep 6 10:02:45 UTC 2024
485 11:02:24.466366 [ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
486 11:02:24.472506 [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
487 11:02:24.478631 [ 0.000000] OF: fdt: Machine model: TI AM335x BeagleBone Black
488 11:02:24.482166 [ 0.000000] earlycon: omap8250 at MMIO 0x44e09000 (options '')
489 11:02:24.487177 [ 0.000000] printk: legacy bootconsole [omap8250] enabled
490 11:02:24.493289 [ 0.000000] Memory policy: Data cache writeback
491 11:02:24.500613 [ 0.000000] efi: UEFI not found.
492 11:02:24.503038 [ 0.000000] cma: Reserved 64 MiB at 0x9b800000 on node -1
493 11:02:24.510301 [ 0.000000] Zone ranges:
494 11:02:24.516455 [ 0.000000] DMA [mem 0x0000000080000000-0x000000009fdfffff]
495 11:02:24.521431 [ 0.000000] Normal empty
496 11:02:24.521806 [ 0.000000] HighMem empty
497 11:02:24.530123 [ 0.000000] Movable zone start for each node
498 11:02:24.530501 [ 0.000000] Early memory node ranges
499 11:02:24.536104 [ 0.000000] node 0: [mem 0x0000000080000000-0x000000009fdfffff]
500 11:02:24.544331 [ 0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x000000009fdfffff]
501 11:02:24.569717 [ 0.000000] CPU: All CPU(s) started in SVC mode.
502 11:02:24.578338 [ 0.000000] AM335X ES2.1 (sgx neon)
503 11:02:24.583234 [ 0.000000] percpu: Embedded 17 pages/cpu s40524 r8192 d20916 u69632
504 11:02:24.609125 [ 0.000000] Kernel command line: console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1190077/extract-nfsrootfs-0yd98ml6,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp
505 11:02:24.615089 <6>[ 0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
506 11:02:24.620088 <6>[ 0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes, linear)
507 11:02:24.629875 <6>[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 130560
508 11:02:24.638011 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
509 11:02:24.667445 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
510 11:02:24.673629 <6>[ 0.000000] trace event string verifier disabled
511 11:02:24.674019 <6>[ 0.000000] rcu: Hierarchical RCU implementation.
512 11:02:24.680974 <6>[ 0.000000] rcu: RCU event tracing is enabled.
513 11:02:24.687004 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=1.
514 11:02:24.696720 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
515 11:02:24.703559 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
516 11:02:24.718338 <6>[ 0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
517 11:02:24.735003 <6>[ 0.000000] IRQ: Found an INTC at 0x(ptrval) (revision 5.0) with 128 interrupts
518 11:02:24.743022 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
519 11:02:24.834751 <6>[ 0.000000] TI gptimer clocksource: always-on /ocp/interconnect@44c00000/segment@200000/target-module@31000
520 11:02:24.843221 <6>[ 0.000002] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
521 11:02:24.855644 <6>[ 0.008335] clocksource: dmtimer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
522 11:02:24.864056 <6>[ 0.019145] TI gptimer clockevent: 24000000 Hz at /ocp/interconnect@48000000/segment@0/target-module@40000
523 11:02:24.872259 <6>[ 0.033948] Console: colour dummy device 80x30
524 11:02:24.878645 Matched prompt #6: WARNING:
525 11:02:24.878856 Setting prompt string to ['end trace[^\\r]*\\r', '/ #', 'Login timed out', 'Login incorrect']
526 11:02:24.884507 <3>[ 0.038847] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
527 11:02:24.886814 <3>[ 0.045916] This ensures that you still see kernel messages. Please
528 11:02:24.893671 <3>[ 0.052642] update your kernel commandline.
529 11:02:24.933613 <6>[ 0.057252] Calibrating delay loop... 996.14 BogoMIPS (lpj=4980736)
530 11:02:24.939734 <6>[ 0.096145] CPU: Testing write buffer coherency: ok
531 11:02:24.942100 <6>[ 0.101506] CPU0: Spectre v2: using BPIALL workaround
532 11:02:24.947110 <6>[ 0.106972] pid_max: default: 32768 minimum: 301
533 11:02:24.953219 <6>[ 0.112164] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
534 11:02:24.962832 <6>[ 0.119987] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
535 11:02:24.970961 <6>[ 0.129343] CPU0: thread -1, cpu 0, socket -1, mpidr 0
536 11:02:25.036192 <6>[ 0.189526] Setting up static identity map for 0x80300000 - 0x803000ac
537 11:02:25.042215 <6>[ 0.199133] rcu: Hierarchical SRCU implementation.
538 11:02:25.045570 <6>[ 0.204426] rcu: Max phase no-delay instances is 1000.
539 11:02:25.055075 <6>[ 0.215357] EFI services will not be available.
540 11:02:25.060090 <6>[ 0.220697] smp: Bringing up secondary CPUs ...
541 11:02:25.066098 <6>[ 0.225670] smp: Brought up 1 node, 1 CPU
542 11:02:25.073479 <6>[ 0.230151] SMP: Total of 1 processors activated (996.14 BogoMIPS).
543 11:02:25.079558 <6>[ 0.236871] CPU: All CPU(s) started in SVC mode.
544 11:02:25.097421 <6>[ 0.242078] Memory: 406004K/522240K available (16384K kernel code, 2535K rwdata, 6776K rodata, 2048K init, 430K bss, 49048K reserved, 65536K cma-reserved, 0K highmem)
545 11:02:25.097824 <6>[ 0.258366] devtmpfs: initialized
546 11:02:25.120474 <6>[ 0.275468] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
547 11:02:25.128967 <6>[ 0.284072] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
548 11:02:25.137110 <6>[ 0.294510] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
549 11:02:25.148690 <6>[ 0.306783] pinctrl core: initialized pinctrl subsystem
550 11:02:25.157222 <6>[ 0.317436] DMI not present or invalid.
551 11:02:25.166835 <6>[ 0.323295] NET: Registered PF_NETLINK/PF_ROUTE protocol family
552 11:02:25.175001 <6>[ 0.332244] DMA: preallocated 256 KiB pool for atomic coherent allocations
553 11:02:25.190557 <6>[ 0.343677] thermal_sys: Registered thermal governor 'step_wise'
554 11:02:25.190941 <6>[ 0.343844] cpuidle: using governor menu
555 11:02:25.219159 <6>[ 0.379922] No ATAGs?
556 11:02:25.224709 <6>[ 0.382564] hw-breakpoint: debug architecture 0x4 unsupported.
557 11:02:25.235035 <6>[ 0.394486] Serial: AMBA PL011 UART driver
558 11:02:25.270962 <6>[ 0.432068] iommu: Default domain type: Translated
559 11:02:25.280311 <6>[ 0.437299] iommu: DMA domain TLB invalidation policy: strict mode
560 11:02:25.301046 <5>[ 0.460773] SCSI subsystem initialized
561 11:02:25.314502 <6>[ 0.470172] usbcore: registered new interface driver usbfs
562 11:02:25.321940 <6>[ 0.476129] usbcore: registered new interface driver hub
563 11:02:25.322321 <6>[ 0.481959] usbcore: registered new device driver usb
564 11:02:25.327960 <6>[ 0.488454] pps_core: LinuxPPS API ver. 1 registered
565 11:02:25.338997 <6>[ 0.493890] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
566 11:02:25.348211 <6>[ 0.503603] PTP clock support registered
567 11:02:25.348590 <6>[ 0.508046] EDAC MC: Ver: 3.0.0
568 11:02:25.393320 <6>[ 0.552686] scmi_core: SCMI protocol bus registered
569 11:02:25.418994 <6>[ 0.579105] vgaarb: loaded
570 11:02:25.424549 <6>[ 0.582922] clocksource: Switched to clocksource dmtimer
571 11:02:25.449103 <6>[ 0.610207] NET: Registered PF_INET protocol family
572 11:02:25.461248 <6>[ 0.615909] IP idents hash table entries: 8192 (order: 4, 65536 bytes, linear)
573 11:02:25.468780 <6>[ 0.624769] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
574 11:02:25.480962 <6>[ 0.633696] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
575 11:02:25.484511 <6>[ 0.641939] TCP established hash table entries: 4096 (order: 2, 16384 bytes, linear)
576 11:02:25.495683 <6>[ 0.650225] TCP bind hash table entries: 4096 (order: 4, 65536 bytes, linear)
577 11:02:25.501767 <6>[ 0.657946] TCP: Hash tables configured (established 4096 bind 4096)
578 11:02:25.505315 <6>[ 0.664877] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
579 11:02:25.516401 <6>[ 0.671889] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
580 11:02:25.521999 <6>[ 0.679506] NET: Registered PF_UNIX/PF_LOCAL protocol family
581 11:02:25.607214 <6>[ 0.763047] RPC: Registered named UNIX socket transport module.
582 11:02:25.607597 <6>[ 0.769435] RPC: Registered udp transport module.
583 11:02:25.613330 <6>[ 0.774577] RPC: Registered tcp transport module.
584 11:02:25.620666 <6>[ 0.779680] RPC: Registered tcp-with-tls transport module.
585 11:02:25.626788 <6>[ 0.785605] RPC: Registered tcp NFSv4.1 backchannel transport module.
586 11:02:25.634092 <6>[ 0.792511] PCI: CLS 0 bytes, default 64
587 11:02:25.636466 <5>[ 0.798288] Initialise system trusted keyrings
588 11:02:25.660673 <6>[ 0.818351] Trying to unpack rootfs image as initramfs...
589 11:02:25.738977 <6>[ 0.893292] workingset: timestamp_bits=30 max_order=17 bucket_order=0
590 11:02:25.743197 <6>[ 0.900804] squashfs: version 4.0 (2009/01/31) Phillip Lougher
591 11:02:25.782217 <5>[ 0.943556] NFS: Registering the id_resolver key type
592 11:02:25.788331 <5>[ 0.949144] Key type id_resolver registered
593 11:02:25.793197 <5>[ 0.953833] Key type id_legacy registered
594 11:02:25.801801 <6>[ 0.958275] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
595 11:02:25.809771 <6>[ 0.965469] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
596 11:02:25.882598 <5>[ 1.044010] Key type asymmetric registered
597 11:02:25.888752 <5>[ 1.048532] Asymmetric key parser 'x509' registered
598 11:02:25.897197 <6>[ 1.054012] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 246)
599 11:02:25.902242 <6>[ 1.061897] io scheduler mq-deadline registered
600 11:02:25.911436 <6>[ 1.066881] io scheduler kyber registered
601 11:02:25.911863 <6>[ 1.071334] io scheduler bfq registered
602 11:02:26.307243 <6>[ 1.464613] Serial: 8250/16550 driver, 5 ports, IRQ sharing enabled
603 11:02:26.336831 <6>[ 1.498045] msm_serial: driver initialized
604 11:02:26.342875 <6>[ 1.502836] SuperH (H)SCI(F) driver initialized
605 11:02:26.348975 <6>[ 1.508176] STMicroelectronics ASC driver initialized
606 11:02:26.354706 <6>[ 1.513860] STM32 USART driver initialized
607 11:02:26.471262 <6>[ 1.632446] brd: module loaded
608 11:02:26.515131 <6>[ 1.676034] loop: module loaded
609 11:02:26.550170 <6>[ 1.710415] CAN device driver interface
610 11:02:26.556287 <6>[ 1.715631] bgmac_bcma: Broadcom 47xx GBit MAC driver loaded
611 11:02:26.562439 <6>[ 1.722591] e1000e: Intel(R) PRO/1000 Network Driver
612 11:02:26.568594 <6>[ 1.728071] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
613 11:02:26.574733 <6>[ 1.734523] igb: Intel(R) Gigabit Ethernet Network Driver
614 11:02:26.583140 <6>[ 1.740348] igb: Copyright (c) 2007-2014 Intel Corporation.
615 11:02:26.589198 <6>[ 1.749746] pegasus: Pegasus/Pegasus II USB Ethernet driver
616 11:02:26.595338 <6>[ 1.755897] usbcore: registered new interface driver pegasus
617 11:02:26.601440 <6>[ 1.762025] usbcore: registered new interface driver asix
618 11:02:26.612582 <6>[ 1.767920] usbcore: registered new interface driver ax88179_178a
619 11:02:26.618622 <6>[ 1.774507] usbcore: registered new interface driver cdc_ether
620 11:02:26.624844 <6>[ 1.780804] usbcore: registered new interface driver smsc75xx
621 11:02:26.629618 <6>[ 1.787039] usbcore: registered new interface driver smsc95xx
622 11:02:26.635782 <6>[ 1.793270] usbcore: registered new interface driver net1080
623 11:02:26.641851 <6>[ 1.799388] usbcore: registered new interface driver cdc_subset
624 11:02:26.646884 <6>[ 1.805797] usbcore: registered new interface driver zaurus
625 11:02:26.651727 <6>[ 1.811851] usbcore: registered new interface driver cdc_ncm
626 11:02:26.663210 <6>[ 1.821493] usbcore: registered new interface driver usb-storage
627 11:02:26.945742 <6>[ 2.105473] i2c_dev: i2c /dev entries driver
628 11:02:27.016359 <5>[ 2.169481] cpuidle: enable-method property 'ti,am3352' found operations
629 11:02:27.022587 <6>[ 2.179086] sdhci: Secure Digital Host Controller Interface driver
630 11:02:27.029984 <6>[ 2.185872] sdhci: Copyright(c) Pierre Ossman
631 11:02:27.036110 <6>[ 2.192293] Synopsys Designware Multimedia Card Interface Driver
632 11:02:27.042846 <6>[ 2.200313] sdhci-pltfm: SDHCI platform and OF driver helper
633 11:02:27.145335 <6>[ 2.303316] ledtrig-cpu: registered to indicate activity on CPUs
634 11:02:27.180897 <6>[ 2.334285] usbcore: registered new interface driver usbhid
635 11:02:27.181286 <6>[ 2.340322] usbhid: USB HID core driver
636 11:02:27.219918 <6>[ 2.379303] NET: Registered PF_INET6 protocol family
637 11:02:27.266420 <6>[ 2.428246] Segment Routing with IPv6
638 11:02:27.272570 <6>[ 2.432390] In-situ OAM (IOAM) with IPv6
639 11:02:27.278808 <6>[ 2.436905] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
640 11:02:27.286181 <6>[ 2.444199] NET: Registered PF_PACKET protocol family
641 11:02:27.292301 <6>[ 2.449687] can: controller area network core
642 11:02:27.292688 <6>[ 2.454578] NET: Registered PF_CAN protocol family
643 11:02:27.298412 <6>[ 2.459780] can: raw protocol
644 11:02:27.301935 <6>[ 2.463140] can: broadcast manager protocol
645 11:02:27.307064 <6>[ 2.467720] can: netlink gateway - max_hops=1
646 11:02:27.313181 <5>[ 2.473276] Key type dns_resolver registered
647 11:02:27.319318 <6>[ 2.478267] ThumbEE CPU extension supported.
648 11:02:27.322846 <5>[ 2.483052] Registering SWP/SWPB emulation handler
649 11:02:27.332104 <3>[ 2.488701] omap_voltage_late_init: Voltage driver support not added
650 11:02:27.514741 <5>[ 2.673197] Loading compiled-in X.509 certificates
651 11:02:27.663453 <6>[ 2.811825] platform 44e10800.pinmux: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/clkout2-pins
652 11:02:27.670175 <6>[ 2.828526] pinctrl-single 44e10800.pinmux: 142 pins, size 568
653 11:02:27.697022 <3>[ 2.852317] ti-sysc 44e31000.target-module: probe with driver ti-sysc failed with error -16
654 11:02:27.910698 <3>[ 3.065983] ti-sysc 48040000.target-module: probe with driver ti-sysc failed with error -16
655 11:02:28.104699 <6>[ 3.264286] OMAP GPIO hardware version 0.1
656 11:02:28.126060 <6>[ 3.283137] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400
657 11:02:28.228498 <4>[ 3.385521] at24 2-0054: supply vcc not found, using dummy regulator
658 11:02:28.270080 <4>[ 3.426516] at24 2-0055: supply vcc not found, using dummy regulator
659 11:02:28.321873 <4>[ 3.478702] at24 2-0056: supply vcc not found, using dummy regulator
660 11:02:28.362065 <4>[ 3.519280] at24 2-0057: supply vcc not found, using dummy regulator
661 11:02:28.400309 <6>[ 3.557663] omap_i2c 4819c000.i2c: bus 2 rev0.11 at 100 kHz
662 11:02:28.474670 <3>[ 3.628964] 48000000.interconnect:segment@200000:target-module@0:mpu@0:fck: device ID is greater than 24
663 11:02:28.500191 <6>[ 3.649854] platform 4830e000.lcdc: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
664 11:02:28.521050 <4>[ 3.676252] sdhci-omap 481d8000.mmc: supply pbias not found, using dummy regulator
665 11:02:28.529074 <4>[ 3.685388] sdhci-omap 481d8000.mmc: supply vqmmc not found, using dummy regulator
666 11:02:28.645196 <6>[ 3.803303] omap_rng 48310000.rng: Random Number Generator ver. 20
667 11:02:28.670004 <5>[ 3.829724] random: crng init done
668 11:02:28.697385 <6>[ 3.857093] Freeing initrd memory: 14452K
669 11:02:28.716600 <6>[ 3.872982] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6, bus freq 1000000
670 11:02:28.770417 <6>[ 3.925358] davinci_mdio 4a101000.mdio: phy[0]: device 4a101000.mdio:00, driver SMSC LAN8710/LAN8720
671 11:02:28.775269 <6>[ 3.935538] cpsw-switch 4a100000.switch: initialized cpsw ale version 1.4
672 11:02:28.785188 <6>[ 3.942804] cpsw-switch 4a100000.switch: ALE Table size 1024
673 11:02:28.790065 <6>[ 3.949224] cpsw-switch 4a100000.switch: cpts: overflow check period 500 (jiffies)
674 11:02:28.804903 <6>[ 3.957354] cpsw-switch 4a100000.switch: CPTS: ref_clk_freq:250000000 calc_mult:2147483648 calc_shift:29 error:0 nsec/sec
675 11:02:28.812116 <6>[ 3.968997] cpsw-switch 4a100000.switch: Detected MACID = 34:03:de:5e:2c:05
676 11:02:28.825053 <5>[ 3.978005] cpsw-switch 4a100000.switch: initialized (regs 0x4a100000, pool size 256) hw_ver:0019010C 1.12 (0)
677 11:02:28.852269 <3>[ 4.007786] debugfs: Directory '49000000.dma' with parent 'dmaengine' already present!
678 11:02:28.857752 <6>[ 4.016360] edma 49000000.dma: TI EDMA DMA engine driver
679 11:02:28.930061 <3>[ 4.084304] target-module@4b000000:target-module@140000:pmu@0:fck: device ID is greater than 24
680 11:02:28.944214 <6>[ 4.098643] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 (8000000f) counters available
681 11:02:28.963156 <3>[ 4.121500] l3-aon-clkctrl:0000:0: failed to disable
682 11:02:29.002040 <6>[ 4.157896] 44e09000.serial: ttyS0 at MMIO 0x44e09000 (irq = 36, base_baud = 3000000) is a 8250
683 11:02:29.007057 <6>[ 4.167407] printk: legacy console [ttyS0] enabled
684 11:02:29.015707 <6>[ 4.167407] printk: legacy console [ttyS0] enabled
685 11:02:29.021653 <6>[ 4.177734] printk: legacy bootconsole [omap8250] disabled
686 11:02:29.026013 <6>[ 4.177734] printk: legacy bootconsole [omap8250] disabled
687 11:02:29.069386 <4>[ 4.223726] tps65217-pmic: Failed to locate of_node [id: -1]
688 11:02:29.072677 <4>[ 4.231113] tps65217-bl: Failed to locate of_node [id: -1]
689 11:02:29.089419 <6>[ 4.250818] tps65217 0-0024: TPS65217 ID 0xe version 1.2
690 11:02:29.109027 <6>[ 4.257764] platform 4830e000.lcdc: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
691 11:02:29.120057 <6>[ 4.271452] i2c 0-0070: Fixed dependency cycle(s) with /ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0
692 11:02:29.124371 <6>[ 4.283324] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
693 11:02:29.147375 <6>[ 4.303123] omap_gpio 44e07000.gpio: Could not set line 6 debounce to 200000 microseconds (-22)
694 11:02:29.152304 <6>[ 4.312178] sdhci-omap 48060000.mmc: Got CD GPIO
695 11:02:29.160276 <4>[ 4.317325] sdhci-omap 48060000.mmc: supply pbias not found, using dummy regulator
696 11:02:29.176062 <4>[ 4.330854] sdhci-omap 48060000.mmc: supply vqmmc not found, using dummy regulator
697 11:02:29.180962 <4>[ 4.339457] sdhci-omap 481d8000.mmc: supply pbias not found, using dummy regulator
698 11:02:29.191553 <4>[ 4.348180] sdhci-omap 481d8000.mmc: supply vqmmc not found, using dummy regulator
699 11:02:29.290791 <6>[ 4.447628] at24 0-0050: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
700 11:02:29.338055 <6>[ 4.493213] mmc1: SDHCI controller on 481d8000.mmc [481d8000.mmc] using External DMA
701 11:02:29.344162 <6>[ 4.502193] mmc0: SDHCI controller on 48060000.mmc [48060000.mmc] using External DMA
702 11:02:29.353385 <6>[ 4.511167] cpsw-switch 4a100000.switch: starting ndev. mode: dual_mac
703 11:02:29.444704 <6>[ 4.594582] mmc1: new high speed MMC card at address 0001
704 11:02:29.445086 <6>[ 4.603163] mmcblk1: mmc1:0001 M62704 3.56 GiB
705 11:02:29.454998 <6>[ 4.614535] mmcblk1: p1
706 11:02:29.461280 <6>[ 4.619300] mmcblk1boot0: mmc1:0001 M62704 2.00 MiB
707 11:02:29.472982 <6>[ 4.625536] SMSC LAN8710/LAN8720 4a101000.mdio:00: attached PHY driver (mii_bus:phy_addr=4a101000.mdio:00, irq=POLL)
708 11:02:29.487016 <6>[ 4.645524] mmcblk1boot1: mmc1:0001 M62704 2.00 MiB
709 11:02:29.495284 <6>[ 4.653660] mmcblk1rpmb: mmc1:0001 M62704 512 KiB, chardev (236:0)
710 11:02:31.598780 <6>[ 6.753967] cpsw-switch 4a100000.switch eth0: Link is Up - 100Mbps/Full - flow control off
711 11:02:31.681338 <5>[ 6.782955] Sending DHCP requests ., OK
712 11:02:31.692355 <6>[ 6.847373] IP-Config: Got DHCP answer from 172.16.3.3, my address is 172.16.3.210
713 11:02:31.692740 <6>[ 6.855454] IP-Config: Complete:
714 11:02:31.705891 <6>[ 6.858992] device=eth0, hwaddr=34:03:de:5e:2c:05, ipaddr=172.16.3.210, mask=255.255.255.0, gw=172.16.3.3
715 11:02:31.711984 <6>[ 6.869423] host=172.16.3.210, domain=denx.de, nis-domain=(none)
716 11:02:31.721762 <6>[ 6.876263] bootserver=172.16.3.33, rootserver=172.16.3.3, rootpath=
717 11:02:31.722140 <6>[ 6.876299] nameserver0=172.16.3.3
718 11:02:31.727897 <6>[ 6.887609] ntpserver0=172.16.3.3
719 11:02:31.734020 <6>[ 6.893038] clk: Disabling unused clocks
720 11:02:31.737339 <6>[ 6.897639] PM: genpd: Disabling unused power domains
721 11:02:31.757520 <6>[ 6.915725] Freeing unused kernel image (initmem) memory: 2048K
722 11:02:31.765716 <6>[ 6.925652] Run /init as init process
723 11:02:31.791560 Loading, please wait...
724 11:02:31.867380 Starting systemd-udevd version 252.22-1~deb12u1
725 11:02:34.911704 <4>[ 10.066077] am335x-phy-driver 47401300.usb-phy: dummy supplies not allowed for exclusive requests (id=vbus)
726 11:02:35.039042 <4>[ 10.193782] am335x-phy-driver 47401b00.usb-phy: dummy supplies not allowed for exclusive requests (id=vbus)
727 11:02:35.193052 <6>[ 10.355288] musb-hdrc musb-hdrc.1: MUSB HDRC host driver
728 11:02:35.204700 <6>[ 10.360958] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 1
729 11:02:35.464038 <6>[ 10.624074] hub 1-0:1.0: USB hub found
730 11:02:35.492237 <6>[ 10.652666] hub 1-0:1.0: 1 port detected
731 11:02:35.616619 <6>[ 10.776403] tda998x 0-0070: found TDA19988
732 11:02:38.386070 Begin: Loading essential drivers ... done.
733 11:02:38.390909 Begin: Running /scripts/init-premount ... done.
734 11:02:38.397004 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
735 11:02:38.406811 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
736 11:02:38.411157 Device /sys/class/net/eth0 found
737 11:02:38.411539 done.
738 11:02:38.494034 Begin: Waiting up to 180 secs for any network device to become available ... done.
739 11:02:38.584984 IP-Config: eth0 hardware address 34:03:de:5e:2c:05 mtu 1500 DHCP
740 11:02:38.652408 IP-Config: eth0 complete (dhcp from 172.16.3.3):
741 11:02:38.664767 address: 172.16.3.210 broadcast: 172.16.3.255 netmask: 255.255.255.0
742 11:02:38.667064 gateway: 172.16.3.3 dns0 : 172.16.3.3 dns1 : 0.0.0.0
743 11:02:38.678231 domain : denx.de
744 11:02:38.678610 rootserver: 172.16.3.33 rootpath:
745 11:02:38.682629 filename : this-host-is-not-configured.kpxe
746 11:02:38.728230 done.
747 11:02:38.738864 Begin: Running /scripts/nfs-bottom ... done.
748 11:02:38.807982 Begin: Running /scripts/init-bottom ... done.
749 11:02:40.109443 <30>[ 15.267598] systemd[1]: System time before build time, advancing clock.
750 11:02:40.316951 <30>[ 15.448911] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
751 11:02:40.326362 <30>[ 15.485627] systemd[1]: Detected architecture arm.
752 11:02:40.339013
753 11:02:40.339400 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
754 11:02:40.339728
755 11:02:40.431065 <30>[ 15.589186] systemd[1]: Hostname set to <debian-bookworm-armhf>.
756 11:02:42.757082 <30>[ 17.915148] systemd[1]: Queued start job for default target graphical.target.
757 11:02:42.773113 <30>[ 17.931028] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
758 11:02:42.784984 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
759 11:02:42.811370 <30>[ 17.965343] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
760 11:02:42.817397 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
761 11:02:42.842873 <30>[ 17.999136] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
762 11:02:42.856981 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
763 11:02:42.878926 <30>[ 18.034848] systemd[1]: Created slice user.slice - User and Session Slice.
764 11:02:42.885680 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
765 11:02:42.913843 <30>[ 18.064302] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
766 11:02:42.920621 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
767 11:02:42.938219 <30>[ 18.094045] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
768 11:02:42.950020 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
769 11:02:42.982314 <30>[ 18.124029] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
770 11:02:42.988634 <30>[ 18.144506] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
771 11:02:42.994143 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
772 11:02:43.017168 <30>[ 18.173440] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
773 11:02:43.025149 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
774 11:02:43.052936 <30>[ 18.204777] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
775 11:02:43.062078 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
776 11:02:43.087357 <30>[ 18.243775] systemd[1]: Reached target paths.target - Path Units.
777 11:02:43.092957 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
778 11:02:43.117165 <30>[ 18.273534] systemd[1]: Reached target remote-fs.target - Remote File Systems.
779 11:02:43.123932 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
780 11:02:43.146935 <30>[ 18.303556] systemd[1]: Reached target slices.target - Slice Units.
781 11:02:43.153749 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
782 11:02:43.177921 <30>[ 18.333683] systemd[1]: Reached target swap.target - Swaps.
783 11:02:43.181142 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
784 11:02:43.208668 <30>[ 18.363663] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
785 11:02:43.215808 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
786 11:02:43.238652 <30>[ 18.394537] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
787 11:02:43.247040 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
788 11:02:43.333725 <30>[ 18.484554] systemd[1]: systemd-journald-audit.socket - Journal Audit Socket was skipped because of an unmet condition check (ConditionSecurity=audit).
789 11:02:43.346153 <30>[ 18.502238] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
790 11:02:43.354654 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
791 11:02:43.379785 <30>[ 18.534717] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
792 11:02:43.386695 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
793 11:02:43.410912 <30>[ 18.566715] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
794 11:02:43.419145 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
795 11:02:43.449551 <30>[ 18.604030] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
796 11:02:43.454426 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
797 11:02:43.481059 <30>[ 18.634610] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
798 11:02:43.487817 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
799 11:02:43.514922 <30>[ 18.664790] systemd[1]: dev-hugepages.mount - Huge Pages File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/mm/hugepages).
800 11:02:43.531685 <30>[ 18.681447] systemd[1]: dev-mqueue.mount - POSIX Message Queue File System was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/mqueue).
801 11:02:43.582309 <30>[ 18.739053] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
802 11:02:43.608953 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
803 11:02:43.650479 <30>[ 18.806456] systemd[1]: Mounting sys-kernel-tracing.mount - Kernel Trace File System...
804 11:02:43.679488 Mounting [0;1;39msys-kernel-tracin…[0m - Kernel Trace File System...
805 11:02:43.741022 <30>[ 18.896503] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
806 11:02:43.753956 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
807 11:02:43.808972 <30>[ 18.965688] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
808 11:02:43.837646 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
809 11:02:43.890811 <30>[ 19.046523] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
810 11:02:43.910037 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
811 11:02:43.970394 <30>[ 19.127537] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
812 11:02:43.989481 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
813 11:02:44.048971 <30>[ 19.204752] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
814 11:02:44.064028 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
815 11:02:44.130911 <30>[ 19.287600] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
816 11:02:44.148035 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
817 11:02:44.170446 <30>[ 19.326940] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
818 11:02:44.198018 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
819 11:02:44.223195 <28>[ 19.375373] systemd[1]: systemd-journald.service: unit configures an IP firewall, but the local system does not support BPF/cgroup firewalling.
820 11:02:44.236089 <28>[ 19.392763] systemd[1]: (This warning is only shown for the first unit using IP firewalling.)
821 11:02:44.287943 <30>[ 19.445600] systemd[1]: Starting systemd-journald.service - Journal Service...
822 11:02:44.306976 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
823 11:02:44.376891 <30>[ 19.534425] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
824 11:02:44.398224 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
825 11:02:44.424549 <30>[ 19.580809] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
826 11:02:44.480870 Starting [0;1;39msystemd-network-g… units from Kernel command line...
827 11:02:44.541101 <30>[ 19.696187] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
828 11:02:44.586758 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
829 11:02:44.652571 <30>[ 19.808671] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
830 11:02:44.719176 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
831 11:02:44.791074 <30>[ 19.948665] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
832 11:02:44.850155 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
833 11:02:44.856249 <30>[ 20.015257] systemd[1]: Mounted sys-kernel-tracing.mount - Kernel Trace File System.
834 11:02:44.898618 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-tracing…nt[0m - Kernel Trace File System.
835 11:02:44.922200 <30>[ 20.078580] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
836 11:02:44.948873 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
837 11:02:45.109415 <30>[ 20.267308] systemd[1]: modprobe@configfs.service: Deactivated successfully.
838 11:02:45.147891 <30>[ 20.304817] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
839 11:02:45.177723 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
840 11:02:45.199076 <30>[ 20.355678] systemd[1]: modprobe@dm_mod.service: Deactivated successfully.
841 11:02:45.237906 <30>[ 20.393693] systemd[1]: Finished modprobe@dm_mod.service - Load Kernel Module dm_mod.
842 11:02:45.246020 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
843 11:02:45.267927 <30>[ 20.424694] systemd[1]: Started systemd-journald.service - Journal Service.
844 11:02:45.275833 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
845 11:02:45.308839 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
846 11:02:45.337495 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
847 11:02:45.363022 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
848 11:02:45.398134 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
849 11:02:45.427115 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
850 11:02:45.449992 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
851 11:02:45.470509 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
852 11:02:45.507920 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
853 11:02:45.567655 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
854 11:02:45.613081 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
855 11:02:45.672242 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
856 11:02:45.730634 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
857 11:02:45.806847 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
858 11:02:45.962487 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
859 11:02:46.071507 <46>[ 21.228175] systemd-journald[162]: Received client request to flush runtime journal.
860 11:02:46.179512 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
861 11:02:46.246287 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
862 11:02:46.300412 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
863 11:02:46.361060 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
864 11:02:47.292150 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
865 11:02:47.317861 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
866 11:02:47.337199 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
867 11:02:47.607956 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
868 11:02:48.127382 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
869 11:02:48.200490 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
870 11:02:48.658854 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
871 11:02:48.738374 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
872 11:02:50.724017 [[0m[0;31m* [0m] (1 of 4) Job systemd-networkd.service/st<5>[ 25.876498] cfg80211: Loading compiled-in X.509 certificates for regulatory database
873 11:02:50.724419 art running (7s / 1min 35s)
874 11:02:51.095987 M[K[[0;1;31m*[0m[0;31m* [0m] (1 of 4) Job systemd-networkd.service/start running (8s / 1min 35s)
875 11:02:51.561917 M[K[[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
876 11:02:51.602217 [K[[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
877 11:02:52.224026 <5>[ 27.382840] Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
878 11:02:52.254900 <5>[ 27.408624] Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
879 11:02:52.259784 <4>[ 27.418437] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
880 11:02:52.267774 <6>[ 27.427514] cfg80211: failed to load regulatory.db
881 11:02:52.335367 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
882 11:02:53.463908 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
883 11:03:01.499156 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
884 11:03:01.529246 [[0;32m OK [0m] Reached target [0;1;39musb-gadget.…m - Hardware activated USB gadget.
885 11:03:01.548698 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
886 11:03:01.622755 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
887 11:03:01.659730 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
888 11:03:01.718944 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
889 11:03:01.768755 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
890 11:03:02.007749 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
891 11:03:02.037599 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
892 11:03:02.084511 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
893 11:03:02.127209 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
894 11:03:02.167768 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
895 11:03:02.197864 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
896 11:03:02.370414 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
897 11:03:02.849773 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
898 11:03:02.879777 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
899 11:03:02.909737 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
900 11:03:02.936334 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
901 11:03:03.079301 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
902 11:03:03.163171 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
903 11:03:03.189033 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
904 11:03:03.280237 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
905 11:03:03.408508 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
906 11:03:03.427834 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
907 11:03:03.462820 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
908 11:03:03.487236 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
909 11:03:03.509534 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
910 11:03:03.582680 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
911 11:03:03.636463 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
912 11:03:03.859597 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
913 11:03:04.009687 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
914 11:03:04.049005 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
915 11:03:04.078774 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
916 11:03:04.197200 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
917 11:03:04.231075 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
918 11:03:04.297768 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
919 11:03:04.365437 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
920 11:03:04.428180 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
921 11:03:04.455884 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
922 11:03:04.644850 Starting [0;1;39msystemd-hostnamed.service[0m - Hostname Service...
923 11:03:04.672410 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
924 11:03:05.232998 [[0;32m OK [0m] Started [0;1;39msystemd-hostnamed.service[0m - Hostname Service.
925 11:03:05.354715 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
926 11:03:05.403827 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
927 11:03:05.432682 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
928 11:03:05.509981 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
929 11:03:05.729997 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
930 11:03:06.030714
931 11:03:06.034938 Debian GNU/Linux 12 debian-worm-armhf login: root (automatic login)
932 11:03:06.035316
933 11:03:06.377862 Linux debian-bookworm-armhf 6.11.0-rc6-next-20240906 #1 SMP Fri Sep 6 10:02:45 UTC 2024 armv7l
934 11:03:06.378252
935 11:03:06.382961 The programs included with the Debian GNU/Linux system are free software;
936 11:03:06.391579 the exact distribution terms for each program are described in the
937 11:03:06.397636 individual files in /usr/share/doc/*/copyright.
938 11:03:06.398022
939 11:03:06.404354 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
940 11:03:06.404736 permitted by applicable law.
941 11:03:11.186475 Unable to match end of the kernel message
943 11:03:11.187553 Setting prompt string to ['/ #']
944 11:03:11.187813 end: 2.4.4.1 login-action (duration 00:00:47) [common]
946 11:03:11.188643 end: 2.4.4 auto-login-action (duration 00:00:48) [common]
947 11:03:11.189045 start: 2.4.5 expect-shell-connection (timeout 00:03:12) [common]
948 11:03:11.189383 Setting prompt string to ['/ #']
949 11:03:11.189667 Forcing a shell prompt, looking for ['/ #']
951 11:03:11.240402 / #
952 11:03:11.240902 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
953 11:03:11.241256 Waiting using forced prompt support (timeout 00:02:30)
954 11:03:11.248290
955 11:03:11.257352 end: 2.4.5 expect-shell-connection (duration 00:00:00) [common]
956 11:03:11.257818 start: 2.4.6 export-device-env (timeout 00:03:12) [common]
957 11:03:11.258187 Sending with 10 millisecond of delay
959 11:03:16.311274 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/1190077/extract-nfsrootfs-0yd98ml6'
960 11:03:16.322145 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/1190077/extract-nfsrootfs-0yd98ml6'
961 11:03:16.324966 Sending with 10 millisecond of delay
963 11:03:18.364994 / # export NFS_SERVER_IP='172.16.3.3'
964 11:03:18.375696 export NFS_SERVER_IP='172.16.3.3'
965 11:03:18.379158 end: 2.4.6 export-device-env (duration 00:00:07) [common]
966 11:03:18.379642 end: 2.4 uboot-commands (duration 00:01:55) [common]
967 11:03:18.379948 end: 2 uboot-action (duration 00:01:55) [common]
968 11:03:18.380368 start: 3 lava-test-retry (timeout 00:06:52) [common]
969 11:03:18.380813 start: 3.1 lava-test-shell (timeout 00:06:52) [common]
970 11:03:18.381153 Using namespace: common
972 11:03:18.481958 / # #
973 11:03:18.482471 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
974 11:03:18.489996 #
975 11:03:18.493766 Using /lava-1190077
977 11:03:18.594787 / # export SHELL=/bin/bash
978 11:03:18.601924 export SHELL=/bin/bash
980 11:03:18.707410 / # . /lava-1190077/environment
981 11:03:18.714930 . /lava-1190077/environment
983 11:03:18.827877 / # /lava-1190077/bin/lava-test-runner /lava-1190077/0
984 11:03:18.828384 Test shell timeout: 10s (minimum of the action and connection timeout)
985 11:03:18.835482 /lava-1190077/bin/lava-test-runner /lava-1190077/0
986 11:03:19.394995 + export TESTRUN_ID=0_timesync-off
987 11:03:19.403122 + TESTRUN_ID=0_timesync-off
988 11:03:19.403500 + cd /lava-1190077/0/tests/0_timesync-off
989 11:03:19.403835 ++ cat uuid
990 11:03:19.420980 + UUID=1190077_1.6.2.4.1
991 11:03:19.421364 + set +x
992 11:03:19.426254 <LAVA_SIGNAL_STARTRUN 0_timesync-off 1190077_1.6.2.4.1>
993 11:03:19.426886 Received signal: <STARTRUN> 0_timesync-off 1190077_1.6.2.4.1
994 11:03:19.427216 Starting test lava.0_timesync-off (1190077_1.6.2.4.1)
995 11:03:19.427583 Skipping test definition patterns.
996 11:03:19.429458 + systemctl stop systemd-timesyncd
997 11:03:19.729125 + set +x
998 11:03:19.729753 Received signal: <ENDRUN> 0_timesync-off 1190077_1.6.2.4.1
999 11:03:19.730121 Ending use of test pattern.
1000 11:03:19.730417 Ending test lava.0_timesync-off (1190077_1.6.2.4.1), duration 0.30
1002 11:03:19.732195 <LAVA_SIGNAL_ENDRUN 0_timesync-off 1190077_1.6.2.4.1>
1003 11:03:20.097473 + export TESTRUN_ID=1_kselftest-dt
1004 11:03:20.105340 + TESTRUN_ID=1_kselftest-dt
1005 11:03:20.105721 + cd /lava-1190077/0/tests/1_kselftest-dt
1006 11:03:20.106029 ++ cat uuid
1007 11:03:20.124626 + UUID=1190077_1.6.2.4.5
1008 11:03:20.125003 + set +x
1009 11:03:20.130517 <LAVA_SIGNAL_STARTRUN 1_kselftest-dt 1190077_1.6.2.4.5>
1010 11:03:20.130895 + cd ./automated/linux/kselftest/
1011 11:03:20.131438 Received signal: <STARTRUN> 1_kselftest-dt 1190077_1.6.2.4.5
1012 11:03:20.131776 Starting test lava.1_kselftest-dt (1190077_1.6.2.4.5)
1013 11:03:20.132121 Skipping test definition patterns.
1014 11:03:20.157066 + ./kselftest.sh -c dt -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/next/master/next-20240906/arm/multi_v7_defconfig/gcc-12/kselftest.tar.xz -L '' -S /dev/null -b beaglebone-black -g next -e '' -p /opt/kselftests/mainline/ -n 1 -i 1 -E ''
1015 11:03:20.331738 INFO: install_deps skipped
1016 11:03:20.993437 --2024-01-26 21:49:16-- http://storage.kernelci.org/next/master/next-20240906/arm/multi_v7_defconfig/gcc-12/kselftest.tar.xz
1017 11:03:21.041613 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
1018 11:03:21.205596 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
1019 11:03:21.375526 HTTP request sent, awaiting response... 200 OK
1020 11:03:21.375931 Length: 4021928 (3.8M) [application/octet-stream]
1021 11:03:21.381641 Saving to: 'kselftest_armhf.tar.gz'
1022 11:03:21.382023
1023 11:03:23.792744 kselftest_armhf.tar 0%[ ] 0 --.-KB/s kselftest_armhf.tar 1%[ ] 44.73K 141KB/s kselftest_armhf.tar 5%[> ] 218.67K 344KB/s kselftest_armhf.tar 16%[==> ] 640.54K 659KB/s kselftest_armhf.tar 33%[=====> ] 1.28M 1.09MB/s kselftest_armhf.tar 42%[=======> ] 1.62M 1.14MB/s kselftest_armhf.tar 56%[==========> ] 2.16M 1.31MB/s kselftest_armhf.tar 67%[============> ] 2.61M 1.37MB/s kselftest_armhf.tar 82%[===============> ] 3.18M 1.50MB/s kselftest_armhf.tar 95%[==================> ] 3.66M 1.54MB/s kselftest_armhf.tar 100%[===================>] 3.83M 1.59MB/s in 2.4s
1024 11:03:23.793201
1025 11:03:24.389463 2024-01-26 21:49:19 (1.59 MB/s) - 'kselftest_armhf.tar.gz' saved [4021928/4021928]
1026 11:03:24.389862
1027 11:03:24.633697 tar: ./ftrace/ftracetest: time stamp 2024-08-20 17:52:51 is 17870610.476911204 s in the future
1028 11:03:24.758704 tar: ./ftrace/config: time stamp 2024-08-20 17:52:51 is 17870610.350316537 s in the future
1029 11:03:24.878309 tar: ./ftrace/settings: time stamp 2024-08-20 17:52:51 is 17870610.231016162 s in the future
1030 11:03:24.999313 tar: ./ftrace/ftracetest-ktap: time stamp 2024-08-20 17:52:51 is 17870610.110875995 s in the future
1031 11:03:25.169807 tar: ./ftrace/test.d/ftrace/func_stack_tracer.tc: time stamp 2024-08-20 17:52:51 is 17870609.94142012 s in the future
1032 11:03:25.289807 tar: ./ftrace/test.d/ftrace/func-filter-notrace-pid.tc: time stamp 2024-08-20 17:52:51 is 17870609.82187387 s in the future
1033 11:03:25.409817 tar: ./ftrace/test.d/ftrace/func_mod_trace.tc: time stamp 2024-08-20 17:52:51 is 17870609.701866328 s in the future
1034 11:03:25.537163 tar: ./ftrace/test.d/ftrace/fgraph-filter.tc: time stamp 2024-08-20 17:52:51 is 17870609.57422912 s in the future
1035 11:03:25.665678 tar: ./ftrace/test.d/ftrace/fgraph-retval.tc: time stamp 2024-08-20 17:52:51 is 17870609.446505245 s in the future
1036 11:03:25.779347 tar: ./ftrace/test.d/ftrace/func-filter-pid.tc: time stamp 2024-08-20 17:52:51 is 17870609.332329453 s in the future
1037 11:03:25.890799 tar: ./ftrace/test.d/ftrace/func_traceonoff_triggers.tc: time stamp 2024-08-20 17:52:51 is 17870609.221236412 s in the future
1038 11:03:26.011969 tar: ./ftrace/test.d/ftrace/func-filter-stacktrace.tc: time stamp 2024-08-20 17:52:51 is 17870609.100244703 s in the future
1039 11:03:26.128809 tar: ./ftrace/test.d/ftrace/func_cpumask.tc: time stamp 2024-08-20 17:52:51 is 17870608.982003828 s in the future
1040 11:03:26.251688 tar: ./ftrace/test.d/ftrace/func_profiler.tc: time stamp 2024-08-20 17:52:51 is 17870608.859283037 s in the future
1041 11:03:26.369388 tar: ./ftrace/test.d/ftrace/func_profile_stat.tc: time stamp 2024-08-20 17:52:51 is 17870608.741515037 s in the future
1042 11:03:26.494595 tar: ./ftrace/test.d/ftrace/fgraph-filter-stack.tc: time stamp 2024-08-20 17:52:51 is 17870608.616360078 s in the future
1043 11:03:26.621879 tar: ./ftrace/test.d/ftrace/func_event_triggers.tc: time stamp 2024-08-20 17:52:51 is 17870608.489753328 s in the future
1044 11:03:26.736452 tar: ./ftrace/test.d/ftrace/fgraph-multi.tc: time stamp 2024-08-20 17:52:51 is 17870608.375152703 s in the future
1045 11:03:26.872084 tar: ./ftrace/test.d/ftrace/func-filter-glob.tc: time stamp 2024-08-20 17:52:51 is 17870608.239471287 s in the future
1046 11:03:26.999542 tar: ./ftrace/test.d/ftrace/func_hotplug.tc: time stamp 2024-08-20 17:52:51 is 17870608.111976245 s in the future
1047 11:03:27.127975 tar: ./ftrace/test.d/ftrace/func_set_ftrace_file.tc: time stamp 2024-08-29 07:28:01 is 18610717.98336712 s in the future
1048 11:03:27.250180 tar: ./ftrace/test.d/ftrace/tracing-error-log.tc: time stamp 2024-08-20 17:52:51 is 17870607.861846662 s in the future
1049 11:03:27.310671 tar: ./ftrace/test.d/ftrace: time stamp 2024-08-29 07:28:01 is 18610717.798830662 s in the future
1050 11:03:27.452662 tar: ./ftrace/test.d/event/subsystem-enable.tc: time stamp 2024-08-20 17:52:51 is 17870607.659314495 s in the future
1051 11:03:27.564124 tar: ./ftrace/test.d/event/event-enable.tc: time stamp 2024-08-20 17:52:51 is 17870607.547091703 s in the future
1052 11:03:27.677563 tar: ./ftrace/test.d/event/event-pid.tc: time stamp 2024-08-20 17:52:51 is 17870607.432902203 s in the future
1053 11:03:27.808053 tar: ./ftrace/test.d/event/event-no-pid.tc: time stamp 2024-08-20 17:52:51 is 17870607.30287387 s in the future
1054 11:03:27.931064 tar: ./ftrace/test.d/event/trace_printk.tc: time stamp 2024-08-20 17:52:51 is 17870607.180159786 s in the future
1055 11:03:28.044441 tar: ./ftrace/test.d/event/toplevel-enable.tc: time stamp 2024-08-20 17:52:51 is 17870607.065863453 s in the future
1056 11:03:28.094536 tar: ./ftrace/test.d/event: time stamp 2024-08-20 17:52:51 is 17870607.015588745 s in the future
1057 11:03:28.250339 tar: ./ftrace/test.d/selftest/bashisms.tc: time stamp 2024-08-20 17:52:51 is 17870606.860828453 s in the future
1058 11:03:28.305662 tar: ./ftrace/test.d/selftest: time stamp 2024-08-20 17:52:51 is 17870606.804383578 s in the future
1059 11:03:28.440346 tar: ./ftrace/test.d/00basic/basic3.tc: time stamp 2024-08-20 17:52:51 is 17870606.671118703 s in the future
1060 11:03:28.562154 tar: ./ftrace/test.d/00basic/basic4.tc: time stamp 2024-08-20 17:52:51 is 17870606.548497203 s in the future
1061 11:03:28.712667 tar: ./ftrace/test.d/00basic/basic2.tc: time stamp 2024-08-20 17:52:51 is 17870606.397398036 s in the future
1062 11:03:28.839874 tar: ./ftrace/test.d/00basic/snapshot1.tc: time stamp 2024-08-20 17:52:51 is 17870606.270685495 s in the future
1063 11:03:28.948447 tar: ./ftrace/test.d/00basic/test_ownership.tc: time stamp 2024-09-06 09:35:28 is 19309563.163755953 s in the future
1064 11:03:29.092612 tar: ./ftrace/test.d/00basic/ringbuffer_size.tc: time stamp 2024-08-20 17:52:51 is 17870606.018452078 s in the future
1065 11:03:29.224144 tar: ./ftrace/test.d/00basic/trace_marker.tc: time stamp 2024-08-20 17:52:51 is 17870605.887068828 s in the future
1066 11:03:29.356601 tar: ./ftrace/test.d/00basic/basic1.tc: time stamp 2024-08-20 17:52:51 is 17870605.753171995 s in the future
1067 11:03:29.479425 tar: ./ftrace/test.d/00basic/trace_pipe.tc: time stamp 2024-08-20 17:52:51 is 17870605.630910995 s in the future
1068 11:03:29.611143 tar: ./ftrace/test.d/00basic/ringbuffer_subbuf_size.tc: time stamp 2024-08-20 17:52:51 is 17870605.501336578 s in the future
1069 11:03:29.735427 tar: ./ftrace/test.d/00basic/snapshot.tc: time stamp 2024-08-20 17:52:51 is 17870605.376235245 s in the future
1070 11:03:29.789517 tar: ./ftrace/test.d/00basic: time stamp 2024-09-06 09:35:28 is 19309562.319656703 s in the future
1071 11:03:29.923316 tar: ./ftrace/test.d/kprobe/kprobe_non_uniq_symbol.tc: time stamp 2024-08-20 17:52:51 is 17870605.188651953 s in the future
1072 11:03:30.051715 tar: ./ftrace/test.d/kprobe/kprobe_args_symbol.tc: time stamp 2024-08-20 17:52:51 is 17870605.059328661 s in the future
1073 11:03:30.176024 tar: ./ftrace/test.d/kprobe/kretprobe_entry_arg.tc: time stamp 2024-08-20 17:52:51 is 17870604.935999953 s in the future
1074 11:03:30.284384 tar: ./ftrace/test.d/kprobe/kprobe_eventname.tc: time stamp 2024-08-20 17:52:51 is 17870604.827410495 s in the future
1075 11:03:30.407597 tar: ./ftrace/test.d/kprobe/multiple_kprobes.tc: time stamp 2024-08-20 17:52:51 is 17870604.703638661 s in the future
1076 11:03:30.540343 tar: ./ftrace/test.d/kprobe/kretprobe_maxactive.tc: time stamp 2024-08-20 17:52:51 is 17870604.570202828 s in the future
1077 11:03:30.676232 tar: ./ftrace/test.d/kprobe/kprobe_multiprobe.tc: time stamp 2024-08-20 17:52:51 is 17870604.435315744 s in the future
1078 11:03:30.810952 tar: ./ftrace/test.d/kprobe/kprobe_syntax_errors.tc: time stamp 2024-08-20 17:52:51 is 17870604.300385661 s in the future
1079 11:03:30.944488 tar: ./ftrace/test.d/kprobe/add_and_remove.tc: time stamp 2024-08-20 17:52:51 is 17870604.167076828 s in the future
1080 11:03:31.061261 tar: ./ftrace/test.d/kprobe/kprobe_args_type.tc: time stamp 2024-08-20 17:52:51 is 17870604.050033453 s in the future
1081 11:03:31.199293 tar: ./ftrace/test.d/kprobe/kprobe_ftrace.tc: time stamp 2024-08-20 17:52:51 is 17870603.912351703 s in the future
1082 11:03:31.358339 tar: ./ftrace/test.d/kprobe/busy_check.tc: time stamp 2024-08-20 17:52:51 is 17870603.752617411 s in the future
1083 11:03:31.493511 tar: ./ftrace/test.d/kprobe/kretprobe_return_suffix.tc: time stamp 2024-08-20 17:52:51 is 17870603.619052536 s in the future
1084 11:03:31.615522 tar: ./ftrace/test.d/kprobe/kprobe_args_vfs.tc: time stamp 2024-08-20 17:52:51 is 17870603.494954078 s in the future
1085 11:03:31.737536 tar: ./ftrace/test.d/kprobe/kprobe_insn_boundary.tc: time stamp 2024-08-20 17:52:51 is 17870603.374427536 s in the future
1086 11:03:31.871217 tar: ./ftrace/test.d/kprobe/kretprobe_args.tc: time stamp 2024-08-20 17:52:51 is 17870603.240430369 s in the future
1087 11:03:31.995524 tar: ./ftrace/test.d/kprobe/kprobe_args.tc: time stamp 2024-08-20 17:52:51 is 17870603.115222869 s in the future
1088 11:03:32.116368 tar: ./ftrace/test.d/kprobe/kprobe_args_comm.tc: time stamp 2024-08-20 17:52:51 is 17870602.994341161 s in the future
1089 11:03:32.241800 tar: ./ftrace/test.d/kprobe/kprobe_opt_types.tc: time stamp 2024-08-20 17:52:51 is 17870602.869258619 s in the future
1090 11:03:32.376509 tar: ./ftrace/test.d/kprobe/kprobe_args_syntax.tc: time stamp 2024-08-20 17:52:51 is 17870602.734867786 s in the future
1091 11:03:32.499453 tar: ./ftrace/test.d/kprobe/probepoint.tc: time stamp 2024-08-20 17:52:51 is 17870602.610800911 s in the future
1092 11:03:32.620480 tar: ./ftrace/test.d/kprobe/profile.tc: time stamp 2024-08-20 17:52:51 is 17870602.490427036 s in the future
1093 11:03:32.755476 tar: ./ftrace/test.d/kprobe/kprobe_args_char.tc: time stamp 2024-08-20 17:52:51 is 17870602.356033244 s in the future
1094 11:03:32.875269 tar: ./ftrace/test.d/kprobe/kprobe_args_user.tc: time stamp 2024-08-20 17:52:51 is 17870602.236585744 s in the future
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1254 11:03:53.728268 tar: ./damon/damon_nr_regions.py: time stamp 2024-08-29 07:28:01 is 18610691.380340242 s in the future
1255 11:03:53.857505 tar: ./damon/config: time stamp 2024-08-20 17:52:51 is 17870581.250237825 s in the future
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1257 11:03:54.131152 tar: ./damon/damos_tried_regions.py: time stamp 2024-08-29 07:28:01 is 18610690.977250408 s in the future
1258 11:03:54.269229 tar: ./damon/debugfs_target_ids_read_before_terminate_race.sh: time stamp 2024-08-29 07:28:01 is 18610690.841513867 s in the future
1259 11:03:54.400357 tar: ./damon/access_memory: time stamp 2024-09-06 10:12:46 is 19311775.70810145 s in the future
1260 11:03:54.528764 tar: ./damon/sysfs_update_schemes_tried_regions_hang.py: time stamp 2024-08-29 07:28:01 is 18610690.581771283 s in the future
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1264 11:03:55.060729 tar: ./damon/_chk_dependency.sh: time stamp 2024-08-20 17:52:51 is 17870580.048013992 s in the future
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1275 11:03:56.462810 tar: ./rseq/param_test_mm_cid_benchmark: time stamp 2024-09-06 10:15:19 is 19311926.646312616 s in the future
1276 11:03:56.608049 tar: ./rseq/param_test_compare_twice: time stamp 2024-09-06 10:15:17 is 19311924.501039783 s in the future
1277 11:03:56.730837 tar: ./rseq/settings: time stamp 2024-08-20 17:52:51 is 17870578.377083866 s in the future
1278 11:03:56.902485 tar: ./rseq/param_test_mm_cid_compare_twice: time stamp 2024-09-06 10:15:20 is 19311927.207322783 s in the future
1279 11:03:57.068696 tar: ./rseq/param_test_benchmark: time stamp 2024-09-06 10:15:15 is 19311922.040453658 s in the future
1280 11:03:57.182896 tar: ./rseq/librseq.so: time stamp 2024-09-06 10:15:12 is 19311918.923882325 s in the future
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1286 11:03:57.940989 tar: ./seccomp/seccomp_benchmark: time stamp 2024-09-06 10:15:23 is 19311929.167295616 s in the future
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1288 11:03:58.243718 tar: ./seccomp/settings: time stamp 2024-08-20 17:52:51 is 17870576.86477995 s in the future
1289 11:03:58.443421 tar: ./seccomp/seccomp_bpf: time stamp 2024-09-06 10:15:23 is 19311928.664770283 s in the future
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1291 11:03:58.667813 tar: ./acct/acct_syscall: time stamp 2024-09-06 10:12:38 is 19311763.440428574 s in the future
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1293 11:03:58.904684 tar: ./nsfs/config: time stamp 2024-08-20 17:52:51 is 17870576.203275283 s in the future
1294 11:03:59.026433 tar: ./nsfs/owner: time stamp 2024-09-06 10:14:59 is 19311904.080892449 s in the future
1295 11:03:59.151001 tar: ./nsfs/pidns: time stamp 2024-09-06 10:14:59 is 19311903.955512908 s in the future
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1297 11:03:59.386902 tar: ./tpm2/tpm2.py: time stamp 2024-08-20 17:52:51 is 17870575.719443533 s in the future
1298 11:03:59.526496 tar: ./tpm2/tpm2_tests.py: time stamp 2024-08-20 17:52:51 is 17870575.581147699 s in the future
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1323 11:04:02.664830 tar: ./intel_pstate/run.sh: time stamp 2024-08-20 17:52:51 is 17870572.443211782 s in the future
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1327 11:04:03.129224 tar: ./devices/probe/boards/Dell Inc.,XPS 13 9300.yaml: time stamp 2024-08-20 17:52:51 is 17870571.980635199 s in the future
1328 11:04:03.258652 tar: ./devices/probe/boards/google,spherion.yaml: time stamp 2024-08-20 17:52:51 is 17870571.850916741 s in the future
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1345 11:04:05.314524 tar: ./futex/run.sh: time stamp 2024-09-06 10:15:59 is 19311957.79225624 s in the future
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1353 11:04:06.426404 tar: ./futex/functional/futex_requeue_pi_signal_restart: time stamp 2024-09-06 10:14:07 is 19311844.683495074 s in the future
1354 11:04:07.329691 tar: ./futex/functional/futex_wait_private_mapped_file: time stamp 2024-09-06 10:14:07 is 19311843.78105524 s in the future
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1363 11:04:08.680445 tar: ./dt/compatible_list: time stamp 2024-09-06 10:14:02 is 19311837.427043407 s in the future
1364 11:04:08.794953 tar: ./dt/compatible_ignore_list: time stamp 2024-08-20 17:52:51 is 17870566.31270749 s in the future
1365 11:04:08.841478 tar: ./dt: time stamp 2024-09-06 10:15:58 is 19311953.264295657 s in the future
1366 11:04:08.984739 tar: ./tmpfs/bug-link-o-tmpfile: time stamp 2024-09-06 10:15:32 is 19311927.123339157 s in the future
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1368 11:04:09.206897 tar: ./proc/proc-self-map-files-002: time stamp 2024-09-06 10:15:03 is 19311897.900962615 s in the future
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1377 11:04:10.353729 tar: ./proc/proc-empty-vm: time stamp 2024-09-06 10:15:02 is 19311895.754617698 s in the future
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1383 11:04:11.149158 tar: ./proc/setns-dcache: time stamp 2024-09-06 10:15:04 is 19311896.957446073 s in the future
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1385 11:04:11.403343 tar: ./proc/read: time stamp 2024-09-06 10:15:04 is 19311896.703494365 s in the future
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1388 11:04:11.770906 tar: ./proc/proc-self-map-files-001: time stamp 2024-09-06 10:15:03 is 19311895.33769924 s in the future
1389 11:04:11.905336 tar: ./proc/thread-self: time stamp 2024-09-06 10:15:04 is 19311896.201373948 s in the future
1390 11:04:12.031336 tar: ./proc/proc-self-wchan: time stamp 2024-09-06 10:15:03 is 19311895.076208865 s in the future
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1393 11:04:12.343951 tar: ./syscall_user_dispatch/config: time stamp 2024-08-20 17:52:51 is 17870562.763957115 s in the future
1394 11:04:12.457400 tar: ./syscall_user_dispatch/sud_benchmark: time stamp 2024-09-06 10:15:25 is 19311916.650999989 s in the future
1395 11:04:12.587700 tar: ./syscall_user_dispatch/sud_test: time stamp 2024-09-06 10:15:25 is 19311916.520526989 s in the future
1396 11:04:12.644077 tar: ./syscall_user_dispatch: time stamp 2024-09-06 10:16:09 is 19311960.463071739 s in the future
1397 11:04:13.188913 tar: ./net/lib.sh: time stamp 2024-08-29 07:28:01 is 18610671.917059489 s in the future
1398 11:04:13.307584 tar: ./net/net_helper.sh: time stamp 2024-08-20 17:52:51 is 17870561.800320031 s in the future
1399 11:04:13.473829 tar: ./net/netfilter/nf_nat_edemux.sh: time stamp 2024-08-20 17:52:51 is 17870561.635087448 s in the future
1400 11:04:13.607375 tar: ./net/netfilter/conntrack_tcp_unreplied.sh: time stamp 2024-08-20 17:52:51 is 17870561.501388281 s in the future
1401 11:04:13.758815 tar: ./net/netfilter/connect_close: time stamp 2024-09-06 10:14:59 is 19311889.349795114 s in the future
1402 11:04:13.898567 tar: ./net/netfilter/lib.sh: time stamp 2024-08-20 17:52:51 is 17870561.209410823 s in the future
1403 11:04:14.008024 tar: ./net/netfilter/nft_conntrack_helper.sh: time stamp 2024-08-20 17:52:51 is 17870561.101022114 s in the future
1404 11:04:14.125819 tar: ./net/netfilter/nft_meta.sh: time stamp 2024-08-20 17:52:51 is 17870560.982887239 s in the future
1405 11:04:14.250848 tar: ./net/netfilter/rpath.sh: time stamp 2024-08-20 17:52:51 is 17870560.857603448 s in the future
1406 11:04:14.372741 tar: ./net/netfilter/br_netfilter_queue.sh: time stamp 2024-08-20 17:52:51 is 17870560.735792864 s in the future
1407 11:04:14.500904 tar: ./net/netfilter/nft_queue.sh: time stamp 2024-09-06 09:35:28 is 19309517.607421364 s in the future
1408 11:04:14.617506 tar: ./net/netfilter/nft_synproxy.sh: time stamp 2024-08-20 17:52:51 is 17870560.490592073 s in the future
1409 11:04:14.784853 tar: ./net/netfilter/nft_concat_range.sh: time stamp 2024-08-20 17:52:51 is 17870560.323863156 s in the future
1410 11:04:14.908931 tar: ./net/netfilter/sctp_collision: time stamp 2024-09-06 10:14:59 is 19311888.199961114 s in the future
1411 11:04:15.015907 tar: ./net/netfilter/config: time stamp 2024-08-29 07:28:01 is 18610670.091459448 s in the future
1412 11:04:15.147162 tar: ./net/netfilter/nft_nat.sh: time stamp 2024-08-20 17:52:51 is 17870559.960571989 s in the future
1413 11:04:15.266820 tar: ./net/netfilter/conntrack_icmp_related.sh: time stamp 2024-08-20 17:52:51 is 17870559.841296531 s in the future
1414 11:04:15.408840 tar: ./net/netfilter/audit_logread: time stamp 2024-09-06 10:14:59 is 19311887.699714614 s in the future
1415 11:04:15.527678 tar: ./net/netfilter/conntrack_sctp_collision.sh: time stamp 2024-08-20 17:52:51 is 17870559.581402781 s in the future
1416 11:04:15.672176 tar: ./net/netfilter/nft_audit.sh: time stamp 2024-08-20 17:52:51 is 17870559.434977364 s in the future
1417 11:04:15.794839 tar: ./net/netfilter/conntrack_dump_flush: time stamp 2024-09-06 10:14:59 is 19311887.314311447 s in the future
1418 11:04:15.921848 tar: ./net/netfilter/settings: time stamp 2024-08-20 17:52:51 is 17870559.185660739 s in the future
1419 11:04:16.077417 tar: ./net/netfilter/nft_zones_many.sh: time stamp 2024-08-20 17:52:51 is 17870559.030847489 s in the future
1420 11:04:16.215256 tar: ./net/netfilter/br_netfilter.sh: time stamp 2024-08-20 17:52:51 is 17870558.892598697 s in the future
1421 11:04:16.335076 tar: ./net/netfilter/nft_concat_range_perf.sh: time stamp 2024-08-20 17:52:51 is 17870558.773689364 s in the future
1422 11:04:16.451491 tar: ./net/netfilter/conntrack_vrf.sh: time stamp 2024-08-20 17:52:51 is 17870558.656576489 s in the future
1423 11:04:16.589883 tar: ./net/netfilter/nf_queue: time stamp 2024-09-06 10:14:59 is 19311886.517095781 s in the future
1424 11:04:17.084082 tar: ./net/netfilter/nft_fib.sh: time stamp 2024-08-20 17:52:51 is 17870558.023041031 s in the future
1425 11:04:17.201968 tar: ./net/netfilter/nft_nat_zones.sh: time stamp 2024-08-20 17:52:51 is 17870557.906104947 s in the future
1426 11:04:17.336641 tar: ./net/netfilter/conntrack_ipip_mtu.sh: time stamp 2024-08-20 17:52:51 is 17870557.771315822 s in the future
1427 11:04:17.451204 tar: ./net/netfilter/nf_conntrack_packetdrill.sh: time stamp 2024-08-20 17:52:51 is 17870557.658141197 s in the future
1428 11:04:17.570018 tar: ./net/netfilter/bridge_brouter.sh: time stamp 2024-08-20 17:52:51 is 17870557.537578406 s in the future
1429 11:04:17.730145 tar: ./net/netfilter/packetdrill/conntrack_synack_reuse.pkt: time stamp 2024-08-20 17:52:51 is 17870557.379248447 s in the future
1430 11:04:17.870856 tar: ./net/netfilter/packetdrill/common.sh: time stamp 2024-08-20 17:52:51 is 17870557.238637614 s in the future
1431 11:04:17.996627 tar: ./net/netfilter/packetdrill/conntrack_inexact_rst.pkt: time stamp 2024-08-20 17:52:51 is 17870557.113801239 s in the future
1432 11:04:18.113567 tar: ./net/netfilter/packetdrill/conntrack_rst_invalid.pkt: time stamp 2024-08-20 17:52:51 is 17870556.996715739 s in the future
1433 11:04:18.231333 tar: ./net/netfilter/packetdrill/conntrack_synack_old.pkt: time stamp 2024-08-20 17:52:51 is 17870556.878570905 s in the future
1434 11:04:18.361862 tar: ./net/netfilter/packetdrill/conntrack_syn_challenge_ack.pkt: time stamp 2024-08-20 17:52:51 is 17870556.74878878 s in the future
1435 11:04:18.472285 tar: ./net/netfilter/packetdrill/conntrack_ack_loss_stall.pkt: time stamp 2024-08-20 17:52:51 is 17870556.638021905 s in the future
1436 11:04:18.527654 tar: ./net/netfilter/packetdrill: time stamp 2024-08-20 17:52:51 is 17870556.57993153 s in the future
1437 11:04:18.645238 tar: ./net/netfilter/nft_flowtable.sh: time stamp 2024-08-20 17:52:51 is 17870556.462842655 s in the future
1438 11:04:18.804023 tar: ./net/netfilter/ipvs.sh: time stamp 2024-08-20 17:52:51 is 17870556.30308653 s in the future
1439 11:04:18.944953 tar: ./net/netfilter/xt_string.sh: time stamp 2024-08-20 17:52:51 is 17870556.162910155 s in the future
1440 11:04:18.991739 tar: ./net/netfilter: time stamp 2024-09-06 10:16:05 is 19311950.114946905 s in the future
1441 11:04:19.228405 tar: ./net/tcp_ao/icmps-discard_ipv4: time stamp 2024-09-06 10:14:48 is 19311872.879329405 s in the future
1442 11:04:19.455911 tar: ./net/tcp_ao/connect-deny_ipv6: time stamp 2024-09-06 10:14:54 is 19311878.652634697 s in the future
1443 11:04:19.680548 tar: ./net/tcp_ao/unsigned-md5_ipv4: time stamp 2024-09-06 10:14:52 is 19311876.427530739 s in the future
1444 11:04:19.853894 tar: ./net/tcp_ao/icmps-discard_ipv6: time stamp 2024-09-06 10:14:55 is 19311879.25399078 s in the future
1445 11:04:20.046424 tar: ./net/tcp_ao/icmps-accept_ipv6: time stamp 2024-09-06 10:14:54 is 19311878.061882364 s in the future
1446 11:04:20.254610 tar: ./net/tcp_ao/rst_ipv4: time stamp 2024-09-06 10:14:50 is 19311873.852438239 s in the future
1447 11:04:20.447204 tar: ./net/tcp_ao/seq-ext_ipv6: time stamp 2024-09-06 10:14:57 is 19311880.660443489 s in the future
1448 11:04:20.645981 tar: ./net/tcp_ao/seq-ext_ipv4: time stamp 2024-09-06 10:14:51 is 19311874.461586572 s in the future
1449 11:04:20.812068 tar: ./net/tcp_ao/icmps-accept_ipv4: time stamp 2024-09-06 10:14:48 is 19311871.295041113 s in the future
1450 11:04:20.989948 tar: ./net/tcp_ao/bench-lookups_ipv4: time stamp 2024-09-06 10:14:47 is 19311870.118590363 s in the future
1451 11:04:21.180135 tar: ./net/tcp_ao/rst_ipv6: time stamp 2024-09-06 10:14:56 is 19311878.926637738 s in the future
1452 11:04:21.379030 tar: ./net/tcp_ao/restore_ipv4: time stamp 2024-09-06 10:14:50 is 19311872.728108947 s in the future
1453 11:04:21.554915 tar: ./net/tcp_ao/connect_ipv6: time stamp 2024-09-06 10:14:53 is 19311875.552639322 s in the future
1454 11:04:21.680896 tar: ./net/tcp_ao/config: time stamp 2024-08-29 07:28:01 is 18610663.426363363 s in the future
1455 11:04:21.898627 tar: ./net/tcp_ao/key-management_ipv4: time stamp 2024-09-06 10:14:49 is 19311871.209516738 s in the future
1456 11:04:22.105944 tar: ./net/tcp_ao/bench-lookups_ipv6: time stamp 2024-09-06 10:14:53 is 19311875.002288822 s in the future
1457 11:04:22.297758 tar: ./net/tcp_ao/setsockopt-closed_ipv6: time stamp 2024-09-06 10:14:58 is 19311879.810833155 s in the future
1458 11:04:22.472222 tar: ./net/tcp_ao/connect_ipv4: time stamp 2024-09-06 10:14:47 is 19311868.634387822 s in the future
1459 11:04:22.597035 tar: ./net/tcp_ao/settings: time stamp 2024-08-20 17:52:51 is 17870552.509299322 s in the future
1460 11:04:22.805381 tar: ./net/tcp_ao/key-management_ipv6: time stamp 2024-09-06 10:14:55 is 19311876.302129113 s in the future
1461 11:04:23.497962 tar: ./net/tcp_ao/connect-deny_ipv4: time stamp 2024-09-06 10:14:48 is 19311868.609913155 s in the future
1462 11:04:23.798037 tar: ./net/tcp_ao/self-connect_ipv6: time stamp 2024-09-06 10:14:57 is 19311877.308983488 s in the future
1463 11:04:24.006430 tar: ./net/tcp_ao/self-connect_ipv4: time stamp 2024-09-06 10:14:51 is 19311871.101339363 s in the future
1464 11:04:24.198945 tar: ./net/tcp_ao/restore_ipv6: time stamp 2024-09-06 10:14:56 is 19311875.909046238 s in the future
1465 11:04:24.398866 tar: ./net/tcp_ao/setsockopt-closed_ipv4: time stamp 2024-09-06 10:14:52 is 19311871.708147446 s in the future
1466 11:04:24.698924 tar: ./net/tcp_ao/unsigned-md5_ipv6: time stamp 2024-09-06 10:14:59 is 19311878.40889403 s in the future
1467 11:04:24.745638 tar: ./net/tcp_ao: time stamp 2024-09-06 10:16:04 is 19311943.360494738 s in the future
1468 11:04:24.907490 tar: ./net/mptcp/mptcp_connect: time stamp 2024-09-06 10:14:43 is 19311862.20008203 s in the future
1469 11:04:25.066030 tar: ./net/mptcp/mptcp_join.sh: time stamp 2024-09-06 09:35:28 is 19309507.040729738 s in the future
1470 11:04:25.228937 tar: ./net/mptcp/mptcp_sockopt: time stamp 2024-09-06 10:14:44 is 19311862.87754603 s in the future
1471 11:04:25.396962 tar: ./net/mptcp/pm_nl_ctl: time stamp 2024-09-06 10:14:44 is 19311862.709724863 s in the future
1472 11:04:25.557793 tar: ./net/mptcp/pm_netlink.sh: time stamp 2024-08-20 17:52:51 is 17870549.54972353 s in the future
1473 11:04:25.691025 tar: ./net/mptcp/config: time stamp 2024-08-20 17:52:51 is 17870549.415381363 s in the future
1474 11:04:25.825525 tar: ./net/mptcp/mptcp_inq: time stamp 2024-09-06 10:14:45 is 19311863.281861071 s in the future
1475 11:04:25.980980 tar: ./net/mptcp/diag.sh: time stamp 2024-08-20 17:52:51 is 17870549.12597628 s in the future
1476 11:04:26.107875 tar: ./net/mptcp/settings: time stamp 2024-08-20 17:52:51 is 17870548.99831653 s in the future
1477 11:04:26.233890 tar: ./net/mptcp/mptcp_lib.sh: time stamp 2024-09-06 09:35:28 is 19309505.873182071 s in the future
1478 11:04:26.358914 tar: ./net/mptcp/mptcp_connect.sh: time stamp 2024-08-20 17:52:51 is 17870548.74812253 s in the future
1479 11:04:26.515651 tar: ./net/mptcp/userspace_pm.sh: time stamp 2024-08-20 17:52:51 is 17870548.592194946 s in the future
1480 11:04:26.643741 tar: ./net/mptcp/mptcp_sockopt.sh: time stamp 2024-08-20 17:52:51 is 17870548.464173696 s in the future
1481 11:04:26.760164 tar: ./net/mptcp/simult_flows.sh: time stamp 2024-08-20 17:52:51 is 17870548.347420029 s in the future
1482 11:04:26.813476 tar: ./net/mptcp: time stamp 2024-09-06 10:16:04 is 19311941.292670696 s in the future
1483 11:04:26.965882 tar: ./net/openvswitch/openvswitch.sh: time stamp 2024-08-20 17:52:51 is 17870548.142008654 s in the future
1484 11:04:27.150869 tar: ./net/openvswitch/ovs-dpctl.py: time stamp 2024-08-20 17:52:51 is 17870547.957090196 s in the future
1485 11:04:27.267662 tar: ./net/openvswitch/settings: time stamp 2024-08-20 17:52:51 is 17870547.839890613 s in the future
1486 11:04:27.317578 tar: ./net/openvswitch: time stamp 2024-09-06 10:16:04 is 19311940.788745946 s in the future
1487 11:04:27.473103 tar: ./net/af_unix/scm_pidfd: time stamp 2024-09-06 10:14:42 is 19311858.633625988 s in the future
1488 11:04:27.609724 tar: ./net/af_unix/msg_oob: time stamp 2024-09-06 10:14:42 is 19311858.497757196 s in the future
1489 11:04:27.743123 tar: ./net/af_unix/scm_rights: time stamp 2024-09-06 10:14:42 is 19311858.364169696 s in the future
1490 11:04:27.863875 tar: ./net/af_unix/unix_connect: time stamp 2024-09-06 10:14:43 is 19311859.243240696 s in the future
1491 11:04:27.993093 tar: ./net/af_unix/config: time stamp 2024-08-20 17:52:51 is 17870547.113175363 s in the future
1492 11:04:28.126469 tar: ./net/af_unix/diag_uid: time stamp 2024-09-06 10:14:42 is 19311857.980628988 s in the future
1493 11:04:28.175419 tar: ./net/af_unix: time stamp 2024-09-06 10:16:03 is 19311938.931190613 s in the future
1494 11:04:28.312014 tar: ./net/forwarding/mirror_gre_bound.sh: time stamp 2024-08-20 17:52:51 is 17870546.796132113 s in the future
1495 11:04:28.435894 tar: ./net/forwarding/mirror_gre_lib.sh: time stamp 2024-08-20 17:52:51 is 17870546.671143571 s in the future
1496 11:04:28.617992 tar: ./net/forwarding/bridge_fdb_learning_limit.sh: time stamp 2024-08-20 17:52:51 is 17870546.490435779 s in the future
1497 11:04:28.752755 tar: ./net/forwarding/vxlan_bridge_1q_ipv6.sh: time stamp 2024-08-20 17:52:51 is 17870546.355940154 s in the future
1498 11:04:28.871717 tar: ./net/forwarding/gre_inner_v6_multipath.sh: time stamp 2024-08-20 17:52:51 is 17870546.237427279 s in the future
1499 11:04:28.995856 tar: ./net/forwarding/mirror_gre_bridge_1d_vlan.sh: time stamp 2024-08-20 17:52:51 is 17870546.112313446 s in the future
1500 11:04:29.126275 tar: ./net/forwarding/fib_offload_lib.sh: time stamp 2024-08-20 17:52:51 is 17870545.981837613 s in the future
1501 11:04:29.245109 tar: ./net/forwarding/router_multipath.sh: time stamp 2024-08-20 17:52:51 is 17870545.863265487 s in the future
1502 11:04:29.362943 tar: ./net/forwarding/router_bridge_pvid_vlan_upper.sh: time stamp 2024-08-20 17:52:51 is 17870545.746170612 s in the future
1503 11:04:29.486874 tar: ./net/forwarding/ip6gre_hier.sh: time stamp 2024-08-20 17:52:51 is 17870545.620204696 s in the future
1504 11:04:29.611983 tar: ./net/forwarding/vxlan_bridge_1d_port_8472_ipv6.sh: time stamp 2024-08-20 17:52:51 is 17870545.496799987 s in the future
1505 11:04:29.728626 tar: ./net/forwarding/sch_tbf_etsprio.sh: time stamp 2024-08-20 17:52:51 is 17870545.379961654 s in the future
1506 11:04:29.854762 tar: ./net/forwarding/bridge_vlan_mcast.sh: time stamp 2024-08-20 17:52:51 is 17870545.254130321 s in the future
1507 11:04:29.995703 tar: ./net/forwarding/lib.sh: time stamp 2024-08-20 17:52:51 is 17870545.111531071 s in the future
1508 11:04:30.120756 tar: ./net/forwarding/ip6_forward_instats_vrf.sh: time stamp 2024-08-20 17:52:51 is 17870544.987063404 s in the future
1509 11:04:30.245812 tar: ./net/forwarding/gre_multipath.sh: time stamp 2024-08-20 17:52:51 is 17870544.862802029 s in the future
1510 11:04:30.403734 tar: ./net/forwarding/skbedit_priority.sh: time stamp 2024-08-20 17:52:51 is 17870544.703514196 s in the future
1511 11:04:30.552077 tar: ./net/forwarding/gre_multipath_nh_res.sh: time stamp 2024-08-20 17:52:51 is 17870544.556108571 s in the future
1512 11:04:30.679128 tar: ./net/forwarding/router.sh: time stamp 2024-08-20 17:52:51 is 17870544.428327071 s in the future
1513 11:04:30.812858 tar: ./net/forwarding/tc_flower_l2_miss.sh: time stamp 2024-08-20 17:52:51 is 17870544.295744154 s in the future
1514 11:04:30.930610 tar: ./net/forwarding/bridge_vlan_unaware.sh: time stamp 2024-08-20 17:52:51 is 17870544.178118487 s in the future
1515 11:04:31.048492 tar: ./net/forwarding/vxlan_bridge_1q_port_8472.sh: time stamp 2024-08-20 17:52:51 is 17870544.060509071 s in the future
1516 11:04:31.190460 tar: ./net/forwarding/tc_flower_port_range.sh: time stamp 2024-08-20 17:52:51 is 17870543.919519904 s in the future
1517 11:04:31.320743 tar: ./net/forwarding/tc_police.sh: time stamp 2024-08-20 17:52:51 is 17870543.786904404 s in the future
1518 11:04:31.429824 tar: ./net/forwarding/sch_ets_core.sh: time stamp 2024-08-20 17:52:51 is 17870543.677555946 s in the future
1519 11:04:31.555888 tar: ./net/forwarding/tc_chains.sh: time stamp 2024-08-20 17:52:51 is 17870543.551225946 s in the future
1520 11:04:31.680879 tar: ./net/forwarding/ipip_flat_gre_keys.sh: time stamp 2024-08-20 17:52:51 is 17870543.427508821 s in the future
1521 11:04:31.803810 tar: ./net/forwarding/tc_vlan_modify.sh: time stamp 2024-08-20 17:52:51 is 17870543.303073654 s in the future
1522 11:04:31.946748 tar: ./net/forwarding/ip6gre_lib.sh: time stamp 2024-08-20 17:52:51 is 17870543.160145071 s in the future
1523 11:04:32.098055 tar: ./net/forwarding/vxlan_bridge_1q.sh: time stamp 2024-08-20 17:52:51 is 17870543.009513862 s in the future
1524 11:04:32.238846 tar: ./net/forwarding/router_mpath_nh.sh: time stamp 2024-08-20 17:52:51 is 17870542.868316987 s in the future
1525 11:04:32.380841 tar: ./net/forwarding/tc_mpls_l2vpn.sh: time stamp 2024-08-20 17:52:51 is 17870542.727601362 s in the future
1526 11:04:32.497417 tar: ./net/forwarding/pedit_ip.sh: time stamp 2024-08-20 17:52:51 is 17870542.609671154 s in the future
1527 11:04:32.615166 tar: ./net/forwarding/sch_tbf_ets.sh: time stamp 2024-08-20 17:52:51 is 17870542.492475612 s in the future
1528 11:04:32.740510 tar: ./net/forwarding/mirror_gre_lag_lacp.sh: time stamp 2024-08-20 17:52:51 is 17870542.367798779 s in the future
1529 11:04:32.871725 tar: ./net/forwarding/mirror_topo_lib.sh: time stamp 2024-08-20 17:52:51 is 17870542.235716154 s in the future
1530 11:04:33.031659 tar: ./net/forwarding/sch_tbf_root.sh: time stamp 2024-08-20 17:52:51 is 17870542.075948987 s in the future
1531 11:04:33.149022 tar: ./net/forwarding/vxlan_symmetric.sh: time stamp 2024-08-20 17:52:51 is 17870541.95864082 s in the future
1532 11:04:33.265845 tar: ./net/forwarding/ip6gre_hier_key.sh: time stamp 2024-08-20 17:52:51 is 17870541.842293987 s in the future
1533 11:04:33.389846 tar: ./net/forwarding/bridge_mdb_host.sh: time stamp 2024-08-20 17:52:51 is 17870541.718198362 s in the future
1534 11:04:34.125006 tar: ./net/forwarding/sch_tbf_prio.sh: time stamp 2024-08-20 17:52:51 is 17870540.982849487 s in the future
1535 11:04:34.250112 tar: ./net/forwarding/ipip_flat_gre_key.sh: time stamp 2024-08-20 17:52:51 is 17870540.857273945 s in the future
1536 11:04:34.362730 tar: ./net/forwarding/bridge_mdb_port_down.sh: time stamp 2024-08-20 17:52:51 is 17870540.746124529 s in the future
1537 11:04:34.501717 tar: ./net/forwarding/dual_vxlan_bridge.sh: time stamp 2024-08-20 17:52:51 is 17870540.60692157 s in the future
1538 11:04:34.634216 tar: ./net/forwarding/gre_multipath_nh.sh: time stamp 2024-08-20 17:52:51 is 17870540.473880362 s in the future
1539 11:04:34.750874 tar: ./net/forwarding/router_mpath_nh_res.sh: time stamp 2024-08-20 17:52:51 is 17870540.356725237 s in the future
1540 11:04:34.887748 tar: ./net/forwarding/mirror_gre_bridge_1d.sh: time stamp 2024-08-20 17:52:51 is 17870540.220596737 s in the future
1541 11:04:35.026589 tar: ./net/forwarding/router_bridge_lag.sh: time stamp 2024-08-20 17:52:51 is 17870540.081308487 s in the future
1542 11:04:35.158992 tar: ./net/forwarding/router_nh.sh: time stamp 2024-08-20 17:52:51 is 17870539.948507278 s in the future
1543 11:04:35.276545 tar: ./net/forwarding/router_vid_1.sh: time stamp 2024-08-20 17:52:51 is 17870539.83109057 s in the future
1544 11:04:35.412023 tar: ./net/forwarding/tc_tunnel_key.sh: time stamp 2024-08-20 17:52:51 is 17870539.69523182 s in the future
1545 11:04:35.536225 tar: ./net/forwarding/router_bridge_vlan_upper.sh: time stamp 2024-08-20 17:52:51 is 17870539.572468153 s in the future
1546 11:04:35.667452 tar: ./net/forwarding/sch_red.sh: time stamp 2024-08-20 17:52:51 is 17870539.439857403 s in the future
1547 11:04:35.785027 tar: ./net/forwarding/min_max_mtu.sh: time stamp 2024-08-20 17:52:51 is 17870539.322229862 s in the future
1548 11:04:35.903401 tar: ./net/forwarding/config: time stamp 2024-08-20 17:52:51 is 17870539.203286403 s in the future
1549 11:04:36.034921 tar: ./net/forwarding/q_in_vni_ipv6.sh: time stamp 2024-08-20 17:52:51 is 17870539.07204582 s in the future
1550 11:04:36.159930 tar: ./net/forwarding/ipip_hier_gre_key.sh: time stamp 2024-08-20 17:52:51 is 17870538.947570903 s in the future
1551 11:04:36.277799 tar: ./net/forwarding/vxlan_bridge_1d_port_8472.sh: time stamp 2024-08-20 17:52:51 is 17870538.830193362 s in the future
1552 11:04:36.396500 tar: ./net/forwarding/ipip_flat_gre.sh: time stamp 2024-08-20 17:52:51 is 17870538.711193862 s in the future
1553 11:04:36.520684 tar: ./net/forwarding/router_mpath_nh_lib.sh: time stamp 2024-08-20 17:52:51 is 17870538.588249778 s in the future
1554 11:04:36.652119 tar: ./net/forwarding/router_bridge.sh: time stamp 2024-08-20 17:52:51 is 17870538.455397862 s in the future
1555 11:04:36.770862 tar: ./net/forwarding/ip6gre_inner_v4_multipath.sh: time stamp 2024-08-20 17:52:51 is 17870538.337969445 s in the future
1556 11:04:36.894830 tar: ./net/forwarding/ip6gre_flat_keys.sh: time stamp 2024-08-20 17:52:51 is 17870538.212911945 s in the future
1557 11:04:37.037900 tar: ./net/forwarding/vxlan_bridge_1d_ipv6.sh: time stamp 2024-08-20 17:52:51 is 17870538.070998153 s in the future
1558 11:04:37.170506 tar: ./net/forwarding/forwarding.config.sample: time stamp 2024-08-20 17:52:51 is 17870537.938179278 s in the future
1559 11:04:37.300861 tar: ./net/forwarding/sch_tbf_core.sh: time stamp 2024-08-20 17:52:51 is 17870537.807056862 s in the future
1560 11:04:37.436423 tar: ./net/forwarding/tc_shblocks.sh: time stamp 2024-08-20 17:52:51 is 17870537.670798653 s in the future
1561 11:04:37.612181 tar: ./net/forwarding/no_forwarding.sh: time stamp 2024-08-29 07:28:01 is 18610647.495648903 s in the future
1562 11:04:37.736089 tar: ./net/forwarding/tc_common.sh: time stamp 2024-08-20 17:52:51 is 17870537.371154486 s in the future
1563 11:04:37.862117 tar: ./net/forwarding/local_termination.sh: time stamp 2024-08-29 07:28:01 is 18610647.245359486 s in the future
1564 11:04:37.980794 tar: ./net/forwarding/router_broadcast.sh: time stamp 2024-08-20 17:52:51 is 17870537.126229736 s in the future
1565 11:04:38.120571 tar: ./net/forwarding/bridge_locked_port.sh: time stamp 2024-08-20 17:52:51 is 17870536.986784028 s in the future
1566 11:04:38.244550 tar: ./net/forwarding/settings: time stamp 2024-08-20 17:52:51 is 17870536.862241236 s in the future
1567 11:04:38.363201 tar: ./net/forwarding/mirror_gre_bridge_1q_lag.sh: time stamp 2024-08-20 17:52:51 is 17870536.744986361 s in the future
1568 11:04:38.497067 tar: ./net/forwarding/ip6gre_inner_v6_multipath.sh: time stamp 2024-08-20 17:52:51 is 17870536.611536903 s in the future
1569 11:04:38.626297 tar: ./net/forwarding/sch_ets.sh: time stamp 2024-08-20 17:52:51 is 17870536.480610111 s in the future
1570 11:04:38.763018 tar: ./net/forwarding/mirror_gre_topo_lib.sh: time stamp 2024-08-20 17:52:51 is 17870536.345166778 s in the future
1571 11:04:39.805417 tar: ./net/forwarding/router_mpath_seed.sh: time stamp 2024-08-20 17:52:51 is 17870535.302910861 s in the future
1572 11:04:39.937782 tar: ./net/forwarding/tc_flower_router.sh: time stamp 2024-08-20 17:52:51 is 17870535.169004486 s in the future
1573 11:04:40.064806 tar: ./net/forwarding/bridge_igmp.sh: time stamp 2024-08-20 17:52:51 is 17870535.041665195 s in the future
1574 11:04:40.213123 tar: ./net/forwarding/mirror_gre.sh: time stamp 2024-08-20 17:52:51 is 17870534.893859736 s in the future
1575 11:04:40.348810 tar: ./net/forwarding/custom_multipath_hash.sh: time stamp 2024-08-29 07:28:01 is 18610644.758352194 s in the future
1576 11:04:40.482396 tar: ./net/forwarding/tc_actions.sh: time stamp 2024-08-29 07:28:01 is 18610644.624741361 s in the future
1577 11:04:40.615879 tar: ./net/forwarding/router_multicast.sh: time stamp 2024-08-20 17:52:51 is 17870534.491311486 s in the future
1578 11:04:40.747134 tar: ./net/forwarding/devlink_lib.sh: time stamp 2024-08-20 17:52:51 is 17870534.360057736 s in the future
1579 11:04:40.862603 tar: ./net/forwarding/q_in_vni.sh: time stamp 2024-08-20 17:52:51 is 17870534.243206736 s in the future
1580 11:04:41.003501 tar: ./net/forwarding/lib_sh_test.sh: time stamp 2024-08-20 17:52:51 is 17870534.107718278 s in the future
1581 11:04:41.164274 tar: ./net/forwarding/mirror_vlan.sh: time stamp 2024-08-20 17:52:51 is 17870533.943121903 s in the future
1582 11:04:41.297806 tar: ./net/forwarding/router_bridge_1d.sh: time stamp 2024-08-20 17:52:51 is 17870533.809639986 s in the future
1583 11:04:41.434526 tar: ./net/forwarding/router_bridge_1d_lag.sh: time stamp 2024-08-20 17:52:51 is 17870533.673977153 s in the future
1584 11:04:41.554396 tar: ./net/forwarding/mirror_gre_vlan.sh: time stamp 2024-08-20 17:52:51 is 17870533.553549611 s in the future
1585 11:04:41.698534 tar: ./net/forwarding/router_bridge_vlan.sh: time stamp 2024-08-20 17:52:51 is 17870533.409345986 s in the future
1586 11:04:41.823631 tar: ./net/forwarding/mirror_gre_changes.sh: time stamp 2024-08-20 17:52:51 is 17870533.283704986 s in the future
1587 11:04:41.935099 tar: ./net/forwarding/vxlan_bridge_1q_port_8472_ipv6.sh: time stamp 2024-08-20 17:52:51 is 17870533.173767903 s in the future
1588 11:04:42.046549 tar: ./net/forwarding/sch_ets_tests.sh: time stamp 2024-08-20 17:52:51 is 17870533.061425319 s in the future
1589 11:04:42.185529 tar: ./net/forwarding/ip6gre_custom_multipath_hash.sh: time stamp 2024-08-29 07:28:01 is 18610642.923565694 s in the future
1590 11:04:42.315929 tar: ./net/forwarding/pedit_dsfield.sh: time stamp 2024-08-20 17:52:51 is 17870532.791443486 s in the future
1591 11:04:42.434632 tar: ./net/forwarding/gre_custom_multipath_hash.sh: time stamp 2024-08-29 07:28:01 is 18610642.673292736 s in the future
1592 11:04:42.559889 tar: ./net/forwarding/vxlan_asymmetric.sh: time stamp 2024-08-20 17:52:51 is 17870532.548128361 s in the future
1593 11:04:42.709252 tar: ./net/forwarding/bridge_mld.sh: time stamp 2024-08-20 17:52:51 is 17870532.398143819 s in the future
1594 11:04:42.841729 tar: ./net/forwarding/vxlan_symmetric_ipv6.sh: time stamp 2024-08-20 17:52:51 is 17870532.266023736 s in the future
1595 11:04:42.966742 tar: ./net/forwarding/mirror_lib.sh: time stamp 2024-08-20 17:52:51 is 17870532.139802861 s in the future
1596 11:04:43.092762 tar: ./net/forwarding/vxlan_bridge_1d.sh: time stamp 2024-08-20 17:52:51 is 17870532.014297819 s in the future
1597 11:04:43.251739 tar: ./net/forwarding/bridge_vlan_aware.sh: time stamp 2024-08-20 17:52:51 is 17870531.856125194 s in the future
1598 11:04:43.374632 tar: ./net/forwarding/bridge_sticky_fdb.sh: time stamp 2024-08-20 17:52:51 is 17870531.732278069 s in the future
1599 11:04:43.500721 tar: ./net/forwarding/ip6gre_flat_key.sh: time stamp 2024-08-20 17:52:51 is 17870531.605902777 s in the future
1600 11:04:43.634268 tar: ./net/forwarding/ipip_lib.sh: time stamp 2024-08-20 17:52:51 is 17870531.472434027 s in the future
1601 11:04:43.767745 tar: ./net/forwarding/ipip_hier_gre_keys.sh: time stamp 2024-08-20 17:52:51 is 17870531.339086027 s in the future
1602 11:04:43.900038 tar: ./net/forwarding/bridge_mdb_max.sh: time stamp 2024-08-20 17:52:51 is 17870531.206789694 s in the future
1603 11:04:44.019024 tar: ./net/forwarding/vxlan_asymmetric_ipv6.sh: time stamp 2024-08-20 17:52:51 is 17870531.088794236 s in the future
1604 11:04:44.135741 tar: ./net/forwarding/gre_inner_v4_multipath.sh: time stamp 2024-08-20 17:52:51 is 17870530.972090861 s in the future
1605 11:04:44.268064 tar: ./net/forwarding/ipip_hier_gre.sh: time stamp 2024-08-20 17:52:51 is 17870530.838698861 s in the future
1606 11:04:44.394512 tar: ./net/forwarding/mirror_gre_vlan_bridge_1q.sh: time stamp 2024-08-20 17:52:51 is 17870530.714678694 s in the future
1607 11:04:44.519634 tar: ./net/forwarding/mirror_gre_bridge_1q.sh: time stamp 2024-08-20 17:52:51 is 17870530.588415319 s in the future
1608 11:04:44.627738 tar: ./net/forwarding/pedit_l4port.sh: time stamp 2024-08-20 17:52:51 is 17870530.480027569 s in the future
1609 11:04:44.744444 tar: ./net/forwarding/mirror_gre_flower.sh: time stamp 2024-08-20 17:52:51 is 17870530.363254777 s in the future
1610 11:04:44.873944 tar: ./net/forwarding/bridge_port_isolation.sh: time stamp 2024-08-20 17:52:51 is 17870530.233748361 s in the future
1611 11:04:45.018907 tar: ./net/forwarding/bridge_mdb.sh: time stamp 2024-08-20 17:52:51 is 17870530.087963861 s in the future
1612 11:04:45.142834 tar: ./net/forwarding/tc_flower.sh: time stamp 2024-08-20 17:52:51 is 17870529.963106236 s in the future
1613 11:04:45.253133 tar: ./net/forwarding/mirror_gre_nh.sh: time stamp 2024-08-20 17:52:51 is 17870529.854359069 s in the future
1614 11:04:45.394059 tar: ./net/forwarding/mirror_gre_neigh.sh: time stamp 2024-08-20 17:52:51 is 17870529.713680819 s in the future
1615 11:04:45.503398 tar: ./net/forwarding/tc_flower_cfm.sh: time stamp 2024-08-20 17:52:51 is 17870529.604190319 s in the future
1616 11:04:45.636910 tar: ./net/forwarding/router_bridge_vlan_upper_pvid.sh: time stamp 2024-08-20 17:52:51 is 17870529.470819986 s in the future
1617 11:04:45.761013 tar: ./net/forwarding/ip6gre_hier_keys.sh: time stamp 2024-08-20 17:52:51 is 17870529.345814527 s in the future
1618 11:04:45.877681 tar: ./net/forwarding/ip6gre_flat.sh: time stamp 2024-08-20 17:52:51 is 17870529.229971361 s in the future
1619 11:04:45.925467 tar: ./net/forwarding: time stamp 2024-09-06 10:16:03 is 19311921.179975152 s in the future
1620 11:04:46.072588 tar: ./net/rds/include.sh: time stamp 2024-09-06 10:16:05 is 19311923.032647777 s in the future
1621 11:04:46.184670 tar: ./net/rds/run.sh: time stamp 2024-08-20 17:52:51 is 17870528.920366027 s in the future
1622 11:04:46.309502 tar: ./net/rds/test.py: time stamp 2024-08-20 17:52:51 is 17870528.796064069 s in the future
1623 11:04:46.359380 tar: ./net/rds: time stamp 2024-09-06 10:16:05 is 19311922.746109235 s in the future
1624 11:04:46.485524 tar: ./net/hsr/hsr_redbox.sh: time stamp 2024-08-20 17:52:51 is 17870528.621125194 s in the future
1625 11:04:46.610487 tar: ./net/hsr/config: time stamp 2024-08-20 17:52:51 is 17870528.495046694 s in the future
1626 11:04:46.743729 tar: ./net/hsr/hsr_ping.sh: time stamp 2024-08-20 17:52:51 is 17870528.361615235 s in the future
1627 11:04:46.861268 tar: ./net/hsr/hsr_common.sh: time stamp 2024-08-20 17:52:51 is 17870528.244888694 s in the future
1628 11:04:46.908786 tar: ./net/hsr: time stamp 2024-09-06 10:16:03 is 19311920.19571686 s in the future
1629 11:04:46.975392 tar: ./net: time stamp 2024-09-06 10:16:05 is 19311922.129193777 s in the future
1630 11:04:47.144349 tar: ./landlock/base_test: time stamp 2024-09-06 10:14:15 is 19311811.961284235 s in the future
1631 11:04:47.401878 tar: ./landlock/fs_test: time stamp 2024-09-06 10:14:21 is 19311817.703092902 s in the future
1632 11:04:47.710660 tar: ./landlock/true: time stamp 2024-09-06 10:14:24 is 19311820.394343735 s in the future
1633 11:04:47.857742 tar: ./landlock/net_test: time stamp 2024-09-06 10:14:22 is 19311818.24792161 s in the future
1634 11:04:47.969747 tar: ./landlock/config: time stamp 2024-08-20 17:52:51 is 17870527.135948235 s in the future
1635 11:04:48.112656 tar: ./landlock/scoped_abstract_unix_test: time stamp 2024-09-06 10:14:24 is 19311819.993811819 s in the future
1636 11:04:48.253531 tar: ./landlock/ptrace_test: time stamp 2024-09-06 10:14:23 is 19311818.85302436 s in the future
1637 11:04:48.310726 tar: ./landlock: time stamp 2024-09-06 10:16:01 is 19311916.794771944 s in the future
1638 11:04:48.445030 tar: ./cpufreq/main.sh: time stamp 2024-08-20 17:52:51 is 17870526.660299444 s in the future
1639 11:04:48.592148 tar: ./cpufreq/cpufreq.sh: time stamp 2024-08-20 17:52:51 is 17870526.513607902 s in the future
1640 11:04:48.720354 tar: ./cpufreq/special-tests.sh: time stamp 2024-08-20 17:52:51 is 17870526.386033569 s in the future
1641 11:04:48.828224 tar: ./cpufreq/config: time stamp 2024-08-20 17:52:51 is 17870526.277575193 s in the future
1642 11:04:48.953209 tar: ./cpufreq/module.sh: time stamp 2024-08-20 17:52:51 is 17870526.152558693 s in the future
1643 11:04:49.071796 tar: ./cpufreq/cpu.sh: time stamp 2024-08-20 17:52:51 is 17870526.03478261 s in the future
1644 11:04:49.194628 tar: ./cpufreq/governor.sh: time stamp 2024-08-20 17:52:51 is 17870525.910620235 s in the future
1645 11:04:49.244455 tar: ./cpufreq: time stamp 2024-09-06 10:15:56 is 19311910.86053636 s in the future
1646 11:04:49.394690 tar: ./tty/tty_tstamp_update: time stamp 2024-09-06 10:15:32 is 19311886.71050661 s in the future
1647 11:04:49.444663 tar: ./tty: time stamp 2024-09-06 10:16:10 is 19311924.66052411 s in the future
1648 11:04:49.612805 tar: ./zram/zram_lib.sh: time stamp 2024-08-20 17:52:51 is 17870525.49271161 s in the future
1649 11:04:49.736767 tar: ./zram/zram02.sh: time stamp 2024-08-20 17:52:51 is 17870525.368361193 s in the future
1650 11:04:49.859438 tar: ./zram/zram.sh: time stamp 2024-08-20 17:52:51 is 17870525.24587711 s in the future
1651 11:04:49.971554 tar: ./zram/config: time stamp 2024-08-20 17:52:51 is 17870525.133958943 s in the future
1652 11:04:50.096322 tar: ./zram/zram01.sh: time stamp 2024-08-20 17:52:51 is 17870525.008964443 s in the future
1653 11:04:50.144930 tar: ./zram: time stamp 2024-09-06 10:16:11 is 19311924.95898711 s in the future
1654 11:04:50.288881 tar: ./static_keys/test_static_keys.sh: time stamp 2024-08-20 17:52:51 is 17870524.81749536 s in the future
1655 11:04:50.412672 tar: ./static_keys/config: time stamp 2024-08-20 17:52:51 is 17870524.692503027 s in the future
1656 11:04:50.470992 tar: ./static_keys: time stamp 2024-09-06 10:16:09 is 19311922.633676818 s in the future
1657 11:04:50.723490 tar: ./dmabuf-heaps/dmabuf-heap: time stamp 2024-09-06 10:12:47 is 19311720.383883068 s in the future
1658 11:04:50.881080 tar: ./dmabuf-heaps/config: time stamp 2024-08-20 17:52:51 is 17870524.225171443 s in the future
1659 11:04:50.928734 tar: ./dmabuf-heaps: time stamp 2024-09-06 10:15:56 is 19311909.175590652 s in the future
1660 11:04:51.079950 tar: ./rtc/rtctest: time stamp 2024-09-06 10:15:21 is 19311874.024945485 s in the future
1661 11:04:51.205458 tar: ./rtc/setdate: time stamp 2024-09-06 10:15:21 is 19311873.899844027 s in the future
1662 11:04:51.330291 tar: ./rtc/settings: time stamp 2024-08-20 17:52:51 is 17870523.775261818 s in the future
1663 11:04:51.378938 tar: ./rtc: time stamp 2024-09-06 10:16:08 is 19311920.72480886 s in the future
1664 11:04:51.539721 tar: ./pid_namespace/regression_enomem: time stamp 2024-09-06 10:15:01 is 19311853.566841943 s in the future
1665 11:04:51.681605 tar: ./pid_namespace/config: time stamp 2024-08-20 17:52:51 is 17870523.424603401 s in the future
1666 11:04:51.731627 tar: ./pid_namespace: time stamp 2024-09-06 10:16:05 is 19311917.374242651 s in the future
1667 11:04:51.880589 tar: ./ir/ir_loopback: time stamp 2024-09-06 10:14:13 is 19311805.224174651 s in the future
1668 11:04:51.998092 tar: ./ir/ir_loopback.sh: time stamp 2024-08-20 17:52:51 is 17870523.107953151 s in the future
1669 11:04:52.045693 tar: ./ir: time stamp 2024-09-06 10:16:00 is 19311912.058248985 s in the future
1670 11:04:52.200379 tar: ./power_supply/test_power_supply_properties.sh: time stamp 2024-08-20 17:52:51 is 17870522.907490651 s in the future
1671 11:04:52.340236 tar: ./power_supply/helpers.sh: time stamp 2024-08-20 17:52:51 is 17870522.766066276 s in the future
1672 11:04:52.388956 tar: ./power_supply: time stamp 2024-09-06 10:16:06 is 19311917.71597686 s in the future
1673 11:04:52.539211 tar: ./memfd/fuse_mnt: time stamp 2024-09-06 10:14:27 is 19311818.565878151 s in the future
1674 11:04:52.672372 tar: ./memfd/fuse_test: time stamp 2024-09-06 10:14:27 is 19311818.432088318 s in the future
1675 11:04:52.788730 tar: ./memfd/config: time stamp 2024-08-20 17:52:51 is 17870522.315540151 s in the future
1676 11:04:52.915826 tar: ./memfd/run_hugetlbfs_test.sh: time stamp 2024-08-20 17:52:51 is 17870522.190493901 s in the future
1677 11:04:53.047921 tar: ./memfd/memfd_test: time stamp 2024-09-06 10:14:26 is 19311817.056941985 s in the future
1678 11:04:53.157155 tar: ./memfd/run_fuse_test.sh: time stamp 2024-08-20 17:52:51 is 17870521.948617693 s in the future
1679 11:04:53.214363 tar: ./memfd: time stamp 2024-09-06 10:16:02 is 19311912.890213735 s in the future
1680 11:04:53.323254 tar: ./run_kselftest.sh: time stamp 2024-09-06 10:15:54 is 19311904.78199186 s in the future
1681 11:04:53.466136 tar: ./connector/proc_filter: time stamp 2024-09-06 10:12:45 is 19311715.639880776 s in the future
1682 11:04:53.514947 tar: ./connector: time stamp 2024-09-06 10:15:56 is 19311906.589871943 s in the future
1683 11:04:53.674851 tar: ./lsm/lsm_get_self_attr_test: time stamp 2024-09-06 10:14:25 is 19311815.431482026 s in the future
1684 11:04:53.790133 tar: ./lsm/config: time stamp 2024-08-20 17:52:51 is 17870521.31476836 s in the future
1685 11:04:53.914201 tar: ./lsm/lsm_set_self_attr_test: time stamp 2024-09-06 10:14:26 is 19311816.192462651 s in the future
1686 11:04:54.049515 tar: ./lsm/lsm_list_modules_test: time stamp 2024-09-06 10:14:25 is 19311815.055928193 s in the future
1687 11:04:54.106597 tar: ./lsm: time stamp 2024-09-06 10:16:02 is 19311911.997575693 s in the future
1688 11:04:54.324205 tar: ./iommu/iommufd: time stamp 2024-09-06 10:14:12 is 19311801.781075984 s in the future
1689 11:04:54.433147 tar: ./iommu/config: time stamp 2024-08-20 17:52:51 is 17870520.672370776 s in the future
1690 11:04:54.559133 tar: ./iommu/iommufd_fail_nth: time stamp 2024-09-06 10:14:13 is 19311802.547107943 s in the future
1691 11:04:54.606714 tar: ./iommu: time stamp 2024-09-06 10:16:00 is 19311909.497312651 s in the future
1692 11:04:54.749965 tar: ./amd-pstate/basic.sh: time stamp 2024-08-20 17:52:51 is 17870520.355548734 s in the future
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1772 11:05:04.026286 tar: ./cgroup/test_kill: time stamp 2024-09-06 10:12:43 is 19311703.079321233 s in the future
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1775 11:05:04.373799 tar: ./splice/short_splice_read.sh: time stamp 2024-08-20 17:52:51 is 17870510.732241483 s in the future
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1817 11:05:09.699712 tar: ./tc-testing/tc-tests/actions/tunnel_key.json: time stamp 2024-08-20 17:52:51 is 17870505.407128858 s in the future
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1822 11:05:10.349985 tar: ./tc-testing/tc-tests/qdiscs/mq.json: time stamp 2024-08-20 17:52:51 is 17870504.756707733 s in the future
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1830 11:05:11.308692 tar: ./tc-testing/tc-tests/qdiscs/fq_pie.json: time stamp 2024-08-20 17:52:51 is 17870503.797355024 s in the future
1831 11:05:11.433794 tar: ./tc-testing/tc-tests/qdiscs/ingress.json: time stamp 2024-08-20 17:52:51 is 17870503.673074691 s in the future
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1837 11:05:12.159724 tar: ./tc-testing/tc-tests/qdiscs/qfq.json: time stamp 2024-08-20 17:52:51 is 17870502.946215691 s in the future
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1842 11:05:12.802074 tar: ./tc-testing/tc-tests/qdiscs/netem.json: time stamp 2024-08-20 17:52:51 is 17870502.304952732 s in the future
1843 11:05:12.942819 tar: ./tc-testing/tc-tests/qdiscs/sfq.json: time stamp 2024-08-20 17:52:51 is 17870502.163165441 s in the future
1844 11:05:13.060481 tar: ./tc-testing/tc-tests/qdiscs/drr.json: time stamp 2024-08-20 17:52:51 is 17870502.045172149 s in the future
1845 11:05:13.178238 tar: ./tc-testing/tc-tests/qdiscs/choke.json: time stamp 2024-08-20 17:52:51 is 17870501.928413274 s in the future
1846 11:05:13.293798 tar: ./tc-testing/tc-tests/qdiscs/ets.json: time stamp 2024-08-20 17:52:51 is 17870501.812785274 s in the future
1847 11:05:13.427323 tar: ./tc-testing/tc-tests/qdiscs/fifo.json: time stamp 2024-08-20 17:52:51 is 17870501.679461524 s in the future
1848 11:05:13.550290 tar: ./tc-testing/tc-tests/qdiscs/htb.json: time stamp 2024-08-20 17:52:51 is 17870501.555241066 s in the future
1849 11:05:13.745320 tar: ./tc-testing/tc-tests/qdiscs/gred.json: time stamp 2024-08-20 17:52:51 is 17870501.361261482 s in the future
1850 11:05:13.877953 tar: ./tc-testing/tc-tests/qdiscs/taprio.json: time stamp 2024-08-20 17:52:51 is 17870501.228280816 s in the future
1851 11:05:14.007338 tar: ./tc-testing/tc-tests/qdiscs/hhf.json: time stamp 2024-08-20 17:52:51 is 17870501.099333857 s in the future
1852 11:05:14.123042 tar: ./tc-testing/tc-tests/qdiscs/skbprio.json: time stamp 2024-08-20 17:52:51 is 17870500.983939107 s in the future
1853 11:05:14.172020 tar: ./tc-testing/tc-tests/qdiscs: time stamp 2024-08-20 17:52:51 is 17870500.933759857 s in the future
1854 11:05:14.323492 tar: ./tc-testing/tc-tests/filters/bpf.json: time stamp 2024-08-20 17:52:51 is 17870500.78348194 s in the future
1855 11:05:14.458180 tar: ./tc-testing/tc-tests/filters/route.json: time stamp 2024-08-20 17:52:51 is 17870500.648841857 s in the future
1856 11:05:14.611679 tar: ./tc-testing/tc-tests/filters/flower.json: time stamp 2024-08-20 17:52:51 is 17870500.494151607 s in the future
1857 11:05:14.746233 tar: ./tc-testing/tc-tests/filters/matchall.json: time stamp 2024-08-20 17:52:51 is 17870500.359553982 s in the future
1858 11:05:14.880668 tar: ./tc-testing/tc-tests/filters/basic.json: time stamp 2024-08-20 17:52:51 is 17870500.22491044 s in the future
1859 11:05:15.100038 tar: ./tc-testing/tc-tests/filters/fw.json: time stamp 2024-08-20 17:52:51 is 17870500.006681357 s in the future
1860 11:05:15.232484 tar: ./tc-testing/tc-tests/filters/cgroup.json: time stamp 2024-08-20 17:52:51 is 17870499.874322399 s in the future
1861 11:05:15.355472 tar: ./tc-testing/tc-tests/filters/flow.json: time stamp 2024-08-20 17:52:51 is 17870499.750779482 s in the future
1862 11:05:15.481531 tar: ./tc-testing/tc-tests/filters/u32.json: time stamp 2024-08-20 17:52:51 is 17870499.624055065 s in the future
1863 11:05:15.531430 tar: ./tc-testing/tc-tests/filters: time stamp 2024-08-20 17:52:51 is 17870499.572993065 s in the future
1864 11:05:15.699707 tar: ./tc-testing/tc-tests/infra/actions.json: time stamp 2024-08-20 17:52:51 is 17870499.40610794 s in the future
1865 11:05:15.806638 tar: ./tc-testing/tc-tests/infra/filter.json: time stamp 2024-08-20 17:52:51 is 17870499.299087107 s in the future
1866 11:05:15.863091 tar: ./tc-testing/tc-tests/infra: time stamp 2024-08-20 17:52:51 is 17870499.241994649 s in the future
1867 11:05:15.915018 tar: ./tc-testing/tc-tests: time stamp 2024-08-20 17:52:51 is 17870499.189311649 s in the future
1868 11:05:16.041098 tar: ./tc-testing/settings: time stamp 2024-08-20 17:52:51 is 17870499.063985899 s in the future
1869 11:05:16.183039 tar: ./tc-testing/tdc_config_local_template.py: time stamp 2024-08-20 17:52:51 is 17870498.92364119 s in the future
1870 11:05:16.305758 tar: ./tc-testing/tdc.py: time stamp 2024-08-20 17:52:51 is 17870498.798402107 s in the future
1871 11:05:16.433048 tar: ./tc-testing/tdc_batch.py: time stamp 2024-08-20 17:52:51 is 17870498.672223899 s in the future
1872 11:05:16.549620 tar: ./tc-testing/plugins/__init__.py: time stamp 2024-08-20 17:52:51 is 17870498.555314107 s in the future
1873 11:05:16.608076 tar: ./tc-testing/plugins: time stamp 2024-08-20 17:52:51 is 17870498.496927024 s in the future
1874 11:05:16.740450 tar: ./tc-testing/tdc_helper.py: time stamp 2024-08-20 17:52:51 is 17870498.364677315 s in the future
1875 11:05:16.871570 tar: ./tc-testing/TdcResults.py: time stamp 2024-08-20 17:52:51 is 17870498.232750607 s in the future
1876 11:05:16.930793 tar: ./tc-testing: time stamp 2024-09-06 10:16:09 is 19311896.172893232 s in the future
1877 11:05:17.084249 tar: ./cachestat/test_cachestat: time stamp 2024-09-06 10:12:41 is 19311688.021410982 s in the future
1878 11:05:17.140350 tar: ./cachestat: time stamp 2024-09-06 10:15:55 is 19311881.963149023 s in the future
1879 11:05:17.290725 tar: ./timens/gettime_perf: time stamp 2024-09-06 10:15:27 is 19311853.813973815 s in the future
1880 11:05:17.415433 tar: ./timens/futex: time stamp 2024-09-06 10:15:27 is 19311853.688977732 s in the future
1881 11:05:17.587678 tar: ./timens/clock_nanosleep: time stamp 2024-09-06 10:15:26 is 19311852.516786898 s in the future
1882 11:05:17.732591 tar: ./timens/timer: time stamp 2024-09-06 10:15:26 is 19311852.370863607 s in the future
1883 11:05:17.881679 tar: ./timens/vfork_exec: time stamp 2024-09-06 10:15:27 is 19311853.222299982 s in the future
1884 11:05:18.013980 tar: ./timens/config: time stamp 2024-08-20 17:52:51 is 17870497.089776523 s in the future
1885 11:05:18.163162 tar: ./timens/exec: time stamp 2024-09-06 10:15:27 is 19311852.941045315 s in the future
1886 11:05:18.316493 tar: ./timens/procfs: time stamp 2024-09-06 10:15:27 is 19311852.78681469 s in the future
1887 11:05:18.424315 tar: ./timens/timens: time stamp 2024-09-06 10:15:26 is 19311851.680086398 s in the future
1888 11:05:18.539700 tar: ./timens/timerfd: time stamp 2024-09-06 10:15:26 is 19311851.564170773 s in the future
1889 11:05:18.608690 tar: ./timens: time stamp 2024-09-06 10:16:10 is 19311895.495002482 s in the future
1890 11:05:18.784357 tar: ./ptrace/get_syscall_info: time stamp 2024-09-06 10:15:05 is 19311830.319962982 s in the future
1891 11:05:18.917597 tar: ./ptrace/peeksiginfo: time stamp 2024-09-06 10:15:05 is 19311830.186283023 s in the future
1892 11:05:19.041475 tar: ./ptrace/get_set_sud: time stamp 2024-09-06 10:15:05 is 19311830.062856357 s in the future
1893 11:05:19.190655 tar: ./ptrace/vmaccess: time stamp 2024-09-06 10:15:05 is 19311829.912889565 s in the future
1894 11:05:19.256499 tar: ./ptrace: time stamp 2024-09-06 10:16:06 is 19311890.846043982 s in the future
1895 11:05:19.402507 tar: ./alsa/global-timer: time stamp 2024-09-06 10:12:38 is 19311682.702500815 s in the future
1896 11:05:19.543299 tar: ./alsa/test-pcmtest-driver: time stamp 2024-09-06 10:12:39 is 19311683.56235469 s in the future
1897 11:05:19.658436 tar: ./alsa/pcm-test.conf: time stamp 2024-08-20 17:52:51 is 17870495.445680356 s in the future
1898 11:05:19.793869 tar: ./alsa/libatest.so: time stamp 2024-09-06 10:12:38 is 19311682.310466148 s in the future
1899 11:05:19.936950 tar: ./alsa/conf.d/Lenovo_ThinkPad_P1_Gen2.conf: time stamp 2024-08-20 17:52:51 is 17870495.168939148 s in the future
1900 11:05:19.983779 tar: ./alsa/conf.d: time stamp 2024-08-20 17:52:51 is 17870495.120382023 s in the future
1901 11:05:20.140254 tar: ./alsa/mixer-test: time stamp 2024-09-06 10:12:38 is 19311681.962897231 s in the future
1902 11:05:20.267143 tar: ./alsa/pcm-test: time stamp 2024-09-06 10:12:39 is 19311682.836755231 s in the future
1903 11:05:20.394064 tar: ./alsa/utimer-test: time stamp 2024-09-06 10:12:40 is 19311683.71011219 s in the future
1904 11:05:20.442658 tar: ./alsa: time stamp 2024-09-06 10:15:55 is 19311878.660100856 s in the future
1905 11:05:20.586597 tar: ./cpu-hotplug/cpu-on-off-test.sh: time stamp 2024-08-20 17:52:51 is 17870494.518162356 s in the future
1906 11:05:20.650363 tar: ./cpu-hotplug: time stamp 2024-09-06 10:15:56 is 19311879.453979273 s in the future
1907 11:05:20.804016 tar: ./timers/nanosleep: time stamp 2024-09-06 10:15:27 is 19311850.301196481 s in the future
1908 11:05:20.932793 tar: ./timers/inconsistency-check: time stamp 2024-09-06 10:15:29 is 19311852.171863648 s in the future
1909 11:05:21.059650 tar: ./timers/valid-adjtimex: time stamp 2024-09-06 10:15:30 is 19311853.044384315 s in the future
1910 11:05:21.194164 tar: ./timers/mqueue-lat: time stamp 2024-09-06 10:15:28 is 19311850.910869523 s in the future
1911 11:05:21.343383 tar: ./timers/freq-step: time stamp 2024-09-06 10:15:31 is 19311853.760546773 s in the future
1912 11:05:21.470274 tar: ./timers/nsleep-lat: time stamp 2024-09-06 10:15:28 is 19311850.63386569 s in the future
1913 11:05:21.594143 tar: ./timers/rtcpie: time stamp 2024-09-06 10:15:29 is 19311851.510512815 s in the future
1914 11:05:21.726453 tar: ./timers/set-timer-lat: time stamp 2024-09-06 10:15:28 is 19311850.377235231 s in the future
1915 11:05:21.863018 tar: ./timers/posix_timers: time stamp 2024-09-06 10:15:27 is 19311849.241888648 s in the future
1916 11:05:21.992298 tar: ./timers/leapcrash: time stamp 2024-09-06 10:15:31 is 19311853.11268844 s in the future
1917 11:05:22.110735 tar: ./timers/adjtick: time stamp 2024-09-06 10:15:30 is 19311851.993404773 s in the future
1918 11:05:22.245167 tar: ./timers/alarmtimer-suspend: time stamp 2024-09-06 10:15:30 is 19311851.860133481 s in the future
1919 11:05:22.379449 tar: ./timers/raw_skew: time stamp 2024-09-06 10:15:29 is 19311850.724710981 s in the future
1920 11:05:22.513923 tar: ./timers/skew_consistency: time stamp 2024-09-06 10:15:30 is 19311851.591015148 s in the future
1921 11:05:22.635631 tar: ./timers/leap-a-day: time stamp 2024-09-06 10:15:31 is 19311852.467963981 s in the future
1922 11:05:22.771231 tar: ./timers/clocksource-switch: time stamp 2024-09-06 10:15:30 is 19311851.334390898 s in the future
1923 11:05:22.897251 tar: ./timers/settings: time stamp 2024-08-20 17:52:51 is 17870492.207677981 s in the future
1924 11:05:23.030632 tar: ./timers/change_skew: time stamp 2024-09-06 10:15:30 is 19311851.073929856 s in the future
1925 11:05:23.178770 tar: ./timers/threadtest: time stamp 2024-09-06 10:15:29 is 19311849.925587523 s in the future
1926 11:05:23.320344 tar: ./timers/set-tai: time stamp 2024-09-06 10:15:31 is 19311851.783675106 s in the future
1927 11:05:23.454544 tar: ./timers/set-tz: time stamp 2024-09-06 10:15:32 is 19311852.648778564 s in the future
1928 11:05:23.576271 tar: ./timers/set-2038: time stamp 2024-09-06 10:15:31 is 19311851.527860398 s in the future
1929 11:05:23.637779 tar: ./timers: time stamp 2024-09-06 10:16:10 is 19311890.465469106 s in the future
1930 11:05:23.778462 tar: ./size/get_size: time stamp 2024-09-06 10:15:24 is 19311844.326214648 s in the future
1931 11:05:23.837531 tar: ./size: time stamp 2024-09-06 10:16:09 is 19311889.265147356 s in the future
1932 11:05:24.537725 tar: ./openat2/openat2_test: time stamp 2024-09-06 10:15:06 is 19311825.567771064 s in the future
1933 11:05:24.987625 tar: ./openat2/resolve_test: time stamp 2024-09-06 10:15:08 is 19311827.116611064 s in the future
1934 11:05:25.315096 tar: ./openat2/rename_attack_test: time stamp 2024-09-06 10:15:09 is 19311827.789723564 s in the future
1935 11:05:25.369071 tar: ./openat2: time stamp 2024-09-06 10:16:06 is 19311884.733907481 s in the future
1936 11:05:25.530737 tar: ./lkdtm/BUG.sh: time stamp 2024-09-06 10:14:25 is 19311783.572848064 s in the future
1937 11:05:25.661040 tar: ./lkdtm/REFCOUNT_TIMING.sh: time stamp 2024-09-06 10:14:25 is 19311783.443796314 s in the future
1938 11:05:25.793368 tar: ./lkdtm/SLAB_LINEAR_OVERFLOW.sh: time stamp 2024-09-06 10:14:25 is 19311783.311846772 s in the future
1939 11:05:25.920574 tar: ./lkdtm/UNALIGNED_LOAD_STORE_WRITE.sh: time stamp 2024-09-06 10:14:25 is 19311783.185271147 s in the future
1940 11:05:26.048806 tar: ./lkdtm/EXEC_DATA.sh: time stamp 2024-09-06 10:14:25 is 19311783.055814856 s in the future
1941 11:05:26.168216 tar: ./lkdtm/LOOP.sh: time stamp 2024-09-06 10:14:25 is 19311782.935017731 s in the future
1942 11:05:26.293306 tar: ./lkdtm/SLAB_FREE_PAGE.sh: time stamp 2024-09-06 10:14:25 is 19311782.811454647 s in the future
1943 11:05:26.411959 tar: ./lkdtm/REFCOUNT_INC_ZERO.sh: time stamp 2024-09-06 10:14:25 is 19311782.693147772 s in the future
1944 11:05:26.550972 tar: ./lkdtm/REFCOUNT_DEC_AND_TEST_SATURATED.sh: time stamp 2024-09-06 10:14:25 is 19311782.555288772 s in the future
1945 11:05:26.672898 tar: ./lkdtm/FORTIFY_STR_MEMBER.sh: time stamp 2024-09-06 10:14:25 is 19311782.431831897 s in the future
1946 11:05:26.797892 tar: ./lkdtm/HUNG_TASK.sh: time stamp 2024-09-06 10:14:25 is 19311782.306722814 s in the future
1947 11:05:26.920621 tar: ./lkdtm/REFCOUNT_ADD_SATURATED.sh: time stamp 2024-09-06 10:14:25 is 19311782.184179981 s in the future
1948 11:05:27.049844 tar: ./lkdtm/FORTIFY_STRSCPY.sh: time stamp 2024-09-06 10:14:25 is 19311782.054856397 s in the future
1949 11:05:27.190550 tar: ./lkdtm/WRITE_RO.sh: time stamp 2024-09-06 10:14:25 is 19311781.912792231 s in the future
1950 11:05:27.318408 tar: ./lkdtm/PANIC_STOP_IRQOFF.sh: time stamp 2024-09-06 10:14:25 is 19311781.785710897 s in the future
1951 11:05:27.446644 tar: ./lkdtm/USERCOPY_STACK_FRAME_TO.sh: time stamp 2024-09-06 10:14:25 is 19311781.658759856 s in the future
1952 11:05:27.584156 tar: ./lkdtm/READ_AFTER_FREE.sh: time stamp 2024-09-06 10:14:25 is 19311781.520766397 s in the future
1953 11:05:27.730427 tar: ./lkdtm/REFCOUNT_INC_NOT_ZERO_SATURATED.sh: time stamp 2024-09-06 10:14:25 is 19311781.375297231 s in the future
1954 11:05:27.874336 tar: ./lkdtm/USERCOPY_KERNEL.sh: time stamp 2024-09-06 10:14:25 is 19311781.230817731 s in the future
1955 11:05:28.014410 tar: ./lkdtm/REFCOUNT_ADD_NOT_ZERO_SATURATED.sh: time stamp 2024-09-06 10:14:25 is 19311781.091464897 s in the future
1956 11:05:28.150981 tar: ./lkdtm/FORTIFY_MEM_MEMBER.sh: time stamp 2024-09-06 10:14:25 is 19311780.953761189 s in the future
1957 11:05:28.280271 tar: ./lkdtm/REFCOUNT_DEC_ZERO.sh: time stamp 2024-09-06 10:14:25 is 19311780.824751522 s in the future
1958 11:05:28.397439 tar: ./lkdtm/PANIC.sh: time stamp 2024-09-06 10:14:25 is 19311780.70539648 s in the future
1959 11:05:28.537208 tar: ./lkdtm/ARRAY_BOUNDS.sh: time stamp 2024-09-06 10:14:25 is 19311780.566107022 s in the future
1960 11:05:28.667310 tar: ./lkdtm/WARNING.sh: time stamp 2024-09-06 10:14:25 is 19311780.436470689 s in the future
1961 11:05:28.797526 tar: ./lkdtm/USERCOPY_SLAB_WHITELIST_TO.sh: time stamp 2024-09-06 10:14:25 is 19311780.307435564 s in the future
1962 11:05:28.916082 tar: ./lkdtm/ACCESS_NULL.sh: time stamp 2024-09-06 10:14:25 is 19311780.18826998 s in the future
1963 11:05:29.055809 tar: ./lkdtm/SMP_CALL_LOCKUP.sh: time stamp 2024-09-06 10:14:25 is 19311780.04886648 s in the future
1964 11:05:29.203116 tar: ./lkdtm/USERCOPY_STACK_FRAME_FROM.sh: time stamp 2024-09-06 10:14:25 is 19311779.90264798 s in the future
1965 11:05:29.321783 tar: ./lkdtm/SOFTLOCKUP.sh: time stamp 2024-09-06 10:14:25 is 19311779.781977689 s in the future
1966 11:05:29.459450 tar: ./lkdtm/REFCOUNT_INC_OVERFLOW.sh: time stamp 2024-09-06 10:14:25 is 19311779.64612673 s in the future
1967 11:05:29.590937 tar: ./lkdtm/REFCOUNT_SUB_AND_TEST_SATURATED.sh: time stamp 2024-09-06 10:14:25 is 19311779.515067355 s in the future
1968 11:05:29.720331 tar: ./lkdtm/REFCOUNT_ADD_OVERFLOW.sh: time stamp 2024-09-06 10:14:25 is 19311779.385528147 s in the future
1969 11:05:29.847375 tar: ./lkdtm/FORTIFY_STR_OBJECT.sh: time stamp 2024-09-06 10:14:25 is 19311779.256499689 s in the future
1970 11:05:29.989333 tar: ./lkdtm/REFCOUNT_DEC_AND_TEST_NEGATIVE.sh: time stamp 2024-09-06 10:14:25 is 19311779.117114147 s in the future
1971 11:05:30.129257 tar: ./lkdtm/EXEC_NULL.sh: time stamp 2024-09-06 10:14:25 is 19311778.975295022 s in the future
1972 11:05:30.261627 tar: ./lkdtm/REPORT_STACK_CANARY.sh: time stamp 2024-09-06 10:14:25 is 19311778.843381105 s in the future
1973 11:05:30.381226 tar: ./lkdtm/SLAB_FREE_CROSS.sh: time stamp 2024-09-06 10:14:25 is 19311778.722714022 s in the future
1974 11:05:30.513602 tar: ./lkdtm/FORTIFY_MEM_OBJECT.sh: time stamp 2024-09-06 10:14:25 is 19311778.591360814 s in the future
1975 11:05:30.688325 tar: ./lkdtm/STACK_GUARD_PAGE_LEADING.sh: time stamp 2024-09-06 10:14:25 is 19311778.416538772 s in the future
1976 11:05:30.816331 tar: ./lkdtm/tests.txt: time stamp 2024-08-20 17:52:51 is 17870484.28676823 s in the future
1977 11:05:30.937236 tar: ./lkdtm/HARDLOCKUP.sh: time stamp 2024-09-06 10:14:25 is 19311778.167729813 s in the future
1978 11:05:31.051679 tar: ./lkdtm/REFCOUNT_DEC_SATURATED.sh: time stamp 2024-09-06 10:14:25 is 19311778.05308073 s in the future
1979 11:05:31.196488 tar: ./lkdtm/UNSET_SMEP.sh: time stamp 2024-09-06 10:14:25 is 19311777.907814105 s in the future
1980 11:05:31.329037 tar: ./lkdtm/stack-entropy.sh: time stamp 2024-08-20 17:52:51 is 17870483.775728772 s in the future
1981 11:05:31.458165 tar: ./lkdtm/CORRUPT_STACK_STRONG.sh: time stamp 2024-09-06 10:14:25 is 19311777.646866272 s in the future
1982 11:05:31.580933 tar: ./lkdtm/WRITE_AFTER_FREE.sh: time stamp 2024-09-06 10:14:25 is 19311777.524013605 s in the future
1983 11:05:31.722922 tar: ./lkdtm/STACK_GUARD_PAGE_TRAILING.sh: time stamp 2024-09-06 10:14:25 is 19311777.382404563 s in the future
1984 11:05:31.844520 tar: ./lkdtm/config: time stamp 2024-08-20 17:52:51 is 17870483.25854298 s in the future
1985 11:05:31.982171 tar: ./lkdtm/CFI_FORWARD_PROTO.sh: time stamp 2024-09-06 10:14:25 is 19311777.121470855 s in the future
1986 11:05:32.105903 tar: ./lkdtm/WARNING_MESSAGE.sh: time stamp 2024-09-06 10:14:25 is 19311776.99889598 s in the future
1987 11:05:32.230849 tar: ./lkdtm/DOUBLE_FAULT.sh: time stamp 2024-09-06 10:14:25 is 19311776.873800313 s in the future
1988 11:05:32.356005 tar: ./lkdtm/WRITE_BUDDY_AFTER_FREE.sh: time stamp 2024-09-06 10:14:25 is 19311776.749753397 s in the future
1989 11:05:32.484116 tar: ./lkdtm/STACKLEAK_ERASING.sh: time stamp 2024-09-06 10:14:25 is 19311776.620838522 s in the future
1990 11:05:32.614367 tar: ./lkdtm/EXEC_KMALLOC.sh: time stamp 2024-09-06 10:14:25 is 19311776.490115938 s in the future
1991 11:05:32.730847 tar: ./lkdtm/CORRUPT_PAC.sh: time stamp 2024-09-06 10:14:25 is 19311776.373419063 s in the future
1992 11:05:32.871691 tar: ./lkdtm/CORRUPT_LIST_DEL.sh: time stamp 2024-09-06 10:14:25 is 19311776.232590063 s in the future
1993 11:05:32.999749 tar: ./lkdtm/EXEC_STACK.sh: time stamp 2024-09-06 10:14:25 is 19311776.103753688 s in the future
1994 11:05:33.123689 tar: ./lkdtm/USERCOPY_SLAB_SIZE_FROM.sh: time stamp 2024-09-06 10:14:25 is 19311775.981436022 s in the future
1995 11:05:33.248564 tar: ./lkdtm/BUDDY_INIT_ON_ALLOC.sh: time stamp 2024-09-06 10:14:25 is 19311775.856318897 s in the future
1996 11:05:33.372576 tar: ./lkdtm/USERCOPY_STACK_BEYOND.sh: time stamp 2024-09-06 10:14:25 is 19311775.73212673 s in the future
1997 11:05:33.518888 tar: ./lkdtm/REFCOUNT_ADD_NOT_ZERO_OVERFLOW.sh: time stamp 2024-09-06 10:14:25 is 19311775.586632313 s in the future
1998 11:05:33.639285 tar: ./lkdtm/ACCESS_USERSPACE.sh: time stamp 2024-09-06 10:14:25 is 19311775.464313188 s in the future
1999 11:05:33.773955 tar: ./lkdtm/REFCOUNT_DEC_NEGATIVE.sh: time stamp 2024-09-06 10:14:25 is 19311775.330879146 s in the future
2000 11:05:33.898047 tar: ./lkdtm/CORRUPT_STACK.sh: time stamp 2024-09-06 10:14:25 is 19311775.206631813 s in the future
2001 11:05:34.026029 tar: ./lkdtm/EXCEPTION.sh: time stamp 2024-09-06 10:14:25 is 19311775.077855813 s in the future
2002 11:05:34.153134 tar: ./lkdtm/ATOMIC_TIMING.sh: time stamp 2024-09-06 10:14:25 is 19311774.950055188 s in the future
2003 11:05:34.283289 tar: ./lkdtm/EXEC_RODATA.sh: time stamp 2024-09-06 10:14:25 is 19311774.821757563 s in the future
2004 11:05:34.406140 tar: ./lkdtm/PPC_SLB_MULTIHIT.sh: time stamp 2024-09-06 10:14:25 is 19311774.69784598 s in the future
2005 11:05:34.549046 tar: ./lkdtm/REFCOUNT_ADD_ZERO.sh: time stamp 2024-09-06 10:14:25 is 19311774.555894938 s in the future
2006 11:05:34.663223 tar: ./lkdtm/EXEC_USERSPACE.sh: time stamp 2024-09-06 10:14:25 is 19311774.441511563 s in the future
2007 11:05:34.800437 tar: ./lkdtm/SPINLOCKUP.sh: time stamp 2024-09-06 10:14:25 is 19311774.304773063 s in the future
2008 11:05:34.948833 tar: ./lkdtm/CORRUPT_LIST_ADD.sh: time stamp 2024-09-06 10:14:25 is 19311774.15564923 s in the future
2009 11:05:35.076948 tar: ./lkdtm/WRITE_OPD.sh: time stamp 2024-09-06 10:14:25 is 19311774.026895188 s in the future
2010 11:05:35.209476 tar: ./lkdtm/SLAB_INIT_ON_ALLOC.sh: time stamp 2024-09-06 10:14:25 is 19311773.89614098 s in the future
2011 11:05:35.334433 tar: ./lkdtm/REFCOUNT_INC_SATURATED.sh: time stamp 2024-09-06 10:14:25 is 19311773.77103898 s in the future
2012 11:05:35.466932 tar: ./lkdtm/REFCOUNT_INC_NOT_ZERO_OVERFLOW.sh: time stamp 2024-09-06 10:14:25 is 19311773.638582063 s in the future
2013 11:05:35.619588 tar: ./lkdtm/USERCOPY_SLAB_SIZE_TO.sh: time stamp 2024-09-06 10:14:25 is 19311773.48478323 s in the future
2014 11:05:35.767652 tar: ./lkdtm/REFCOUNT_SUB_AND_TEST_NEGATIVE.sh: time stamp 2024-09-06 10:14:25 is 19311773.337448813 s in the future
2015 11:05:35.891595 tar: ./lkdtm/WRITE_KERN.sh: time stamp 2024-09-06 10:14:25 is 19311773.212252813 s in the future
2016 11:05:36.016718 tar: ./lkdtm/VMALLOC_LINEAR_OVERFLOW.sh: time stamp 2024-09-06 10:14:25 is 19311773.08774273 s in the future
2017 11:05:36.145194 tar: ./lkdtm/READ_BUDDY_AFTER_FREE.sh: time stamp 2024-09-06 10:14:25 is 19311772.95932848 s in the future
2018 11:05:36.268312 tar: ./lkdtm/SLAB_FREE_DOUBLE.sh: time stamp 2024-09-06 10:14:25 is 19311772.837065521 s in the future
2019 11:05:36.393664 tar: ./lkdtm/USERCOPY_SLAB_WHITELIST_FROM.sh: time stamp 2024-09-06 10:14:25 is 19311772.711912729 s in the future
2020 11:05:36.539724 tar: ./lkdtm/EXHAUST_STACK.sh: time stamp 2024-09-06 10:14:25 is 19311772.564747313 s in the future
2021 11:05:36.671070 tar: ./lkdtm/CFI_BACKWARD.sh: time stamp 2024-09-06 10:14:25 is 19311772.433607438 s in the future
2022 11:05:36.793950 tar: ./lkdtm/WRITE_RO_AFTER_INIT.sh: time stamp 2024-09-06 10:14:25 is 19311772.311670313 s in the future
2023 11:05:36.926332 tar: ./lkdtm/EXEC_VMALLOC.sh: time stamp 2024-09-06 10:14:25 is 19311772.178209021 s in the future
2024 11:05:36.980410 tar: ./lkdtm: time stamp 2024-09-06 10:16:02 is 19311869.122688313 s in the future
2025 11:05:37.143221 tar: ./efivarfs/open-unlink: time stamp 2024-09-06 10:14:02 is 19311748.961631438 s in the future
2026 11:05:37.255670 tar: ./efivarfs/config: time stamp 2024-08-20 17:52:51 is 17870477.847330354 s in the future
2027 11:05:37.390159 tar: ./efivarfs/efivarfs.sh: time stamp 2024-08-20 17:52:51 is 17870477.714159563 s in the future
2028 11:05:37.534097 tar: ./efivarfs/create-read: time stamp 2024-09-06 10:14:02 is 19311748.569367604 s in the future
2029 11:05:37.588284 tar: ./efivarfs: time stamp 2024-09-06 10:15:58 is 19311864.513859729 s in the future
2030 11:05:37.760824 tar: ./breakpoints/step_after_suspend_test: time stamp 2024-09-06 10:12:41 is 19311667.344227396 s in the future
2031 11:05:37.805451 tar: ./breakpoints: time stamp 2024-09-06 10:15:55 is 19311861.296807729 s in the future
2032 11:05:37.969696 tar: ./membarrier/membarrier_test_single_thread: time stamp 2024-09-06 10:14:26 is 19311772.135658354 s in the future
2033 11:05:38.120426 tar: ./membarrier/membarrier_test_multi_thread: time stamp 2024-09-06 10:14:26 is 19311771.985842063 s in the future
2034 11:05:38.175539 tar: ./membarrier: time stamp 2024-09-06 10:16:02 is 19311867.927508771 s in the future
2035 11:05:38.323566 tar: ./mm/madv_populate: time stamp 2024-09-06 10:15:42 is 19311847.779793146 s in the future
2036 11:05:38.459945 tar: ./mm/hugetlb_dio: time stamp 2024-09-06 10:15:53 is 19311858.643575229 s in the future
2037 11:05:38.598454 tar: ./mm/soft-dirty: time stamp 2024-09-06 10:15:53 is 19311858.504267563 s in the future
2038 11:05:38.719269 tar: ./mm/va_high_addr_switch.sh: time stamp 2024-08-20 17:52:51 is 17870476.385297354 s in the future
2039 11:05:38.857972 tar: ./mm/mlock2-tests: time stamp 2024-09-06 10:15:46 is 19311851.245819313 s in the future
2040 11:05:38.990379 tar: ./mm/gup_test: time stamp 2024-09-06 10:15:36 is 19311841.112727479 s in the future
2041 11:05:39.133351 tar: ./mm/run_vmtests.sh: time stamp 2024-08-29 07:28:01 is 18610585.970784437 s in the future
2042 11:05:39.278550 tar: ./mm/map_fixed_noreplace: time stamp 2024-09-06 10:15:42 is 19311846.826373021 s in the future
2043 11:05:39.390545 tar: ./mm/mremap_test: time stamp 2024-09-06 10:15:47 is 19311851.712063479 s in the future
2044 11:05:39.548959 tar: ./mm/hugepage-mmap: time stamp 2024-09-06 10:15:39 is 19311843.554129437 s in the future
2045 11:05:39.700338 tar: ./mm/hugepage-vmemmap: time stamp 2024-09-06 10:15:41 is 19311845.403653521 s in the future
2046 11:05:39.843148 tar: ./mm/hugepage-shm: time stamp 2024-09-06 10:15:40 is 19311844.259203521 s in the future
2047 11:05:39.983870 tar: ./mm/uffd-stress: time stamp 2024-09-06 10:15:50 is 19311854.119793646 s in the future
2048 11:05:40.120400 tar: ./mm/hugetlb_reparenting_test.sh: time stamp 2024-08-20 17:52:51 is 17870474.984028646 s in the future
2049 11:05:40.260256 tar: ./mm/hugetlb_madv_vs_map: time stamp 2024-09-06 10:15:52 is 19311855.844284479 s in the future
2050 11:05:40.392538 tar: ./mm/split_huge_page_test: time stamp 2024-09-06 10:15:51 is 19311854.711232354 s in the future
2051 11:05:40.525646 tar: ./mm/mremap_dontunmap: time stamp 2024-09-06 10:15:46 is 19311849.577698604 s in the future
2052 11:05:40.669666 tar: ./mm/ksm_tests: time stamp 2024-09-06 10:15:51 is 19311854.433753187 s in the future
2053 11:05:40.826240 tar: ./mm/mrelease_test: time stamp 2024-09-06 10:15:46 is 19311849.277711396 s in the future
2054 11:05:40.950954 tar: ./mm/droppable: time stamp 2024-09-06 10:15:53 is 19311856.152129687 s in the future
2055 11:05:41.080084 tar: ./mm/gup_longterm: time stamp 2024-09-06 10:15:36 is 19311839.027290937 s in the future
2056 11:05:41.211421 tar: ./mm/test_vmalloc.sh: time stamp 2024-08-20 17:52:51 is 17870473.891812146 s in the future
2057 11:05:41.342537 tar: ./mm/config: time stamp 2024-08-20 17:52:51 is 17870473.760360812 s in the future
2058 11:05:41.487509 tar: ./mm/seal_elf: time stamp 2024-09-06 10:15:48 is 19311850.616082604 s in the future
2059 11:05:41.625922 tar: ./mm/migration: time stamp 2024-09-06 10:15:44 is 19311846.476827062 s in the future
2060 11:05:41.786038 tar: ./mm/ksm_functional_tests: time stamp 2024-09-06 10:15:51 is 19311853.318379937 s in the future
2061 11:05:41.935042 tar: ./mm/mseal_test: time stamp 2024-09-06 10:15:47 is 19311849.168136187 s in the future
2062 11:05:42.063403 tar: ./mm/transhuge-stress: time stamp 2024-09-06 10:15:49 is 19311851.040865729 s in the future
2063 11:05:42.185101 tar: ./mm/settings: time stamp 2024-08-20 17:52:51 is 17870472.917915645 s in the future
2064 11:05:42.328766 tar: ./mm/on-fault-limit: time stamp 2024-09-06 10:15:48 is 19311849.774227937 s in the future
2065 11:05:42.468582 tar: ./mm/mdwe_test: time stamp 2024-09-06 10:15:52 is 19311853.63421202 s in the future
2066 11:05:42.604966 tar: ./mm/mkdirty: time stamp 2024-09-06 10:15:45 is 19311846.498456062 s in the future
2067 11:05:42.743389 tar: ./mm/map_populate: time stamp 2024-09-06 10:15:43 is 19311844.359049687 s in the future
2068 11:05:42.896953 tar: ./mm/compaction_test: time stamp 2024-09-06 10:15:35 is 19311836.207252937 s in the future
2069 11:05:43.045281 tar: ./mm/hugetlb-madvise: time stamp 2024-09-06 10:15:38 is 19311839.058928395 s in the future
2070 11:05:43.155228 tar: ./mm/write_hugetlb_memory.sh: time stamp 2024-08-20 17:52:51 is 17870471.948210729 s in the future
2071 11:05:43.285400 tar: ./mm/khugepaged: time stamp 2024-09-06 10:15:41 is 19311841.816916062 s in the future
2072 11:05:43.441827 tar: ./mm/pagemap_ioctl: time stamp 2024-09-06 10:15:48 is 19311848.66128302 s in the future
2073 11:05:43.618256 tar: ./mm/hmm-tests: time stamp 2024-09-06 10:15:38 is 19311838.48386002 s in the future
2074 11:05:43.786484 tar: ./mm/uffd-unit-tests: time stamp 2024-09-06 10:15:50 is 19311850.31682052 s in the future
2075 11:05:43.912630 tar: ./mm/charge_reserved_hugetlb.sh: time stamp 2024-08-29 07:28:01 is 18610581.191418937 s in the future
2076 11:05:44.046006 tar: ./mm/hugetlb_fault_after_madv: time stamp 2024-09-06 10:15:52 is 19311852.05843527 s in the future
2077 11:05:44.187771 tar: ./mm/mlock-random-test: time stamp 2024-09-06 10:15:45 is 19311844.916328979 s in the future
2078 11:05:44.324522 tar: ./mm/hugetlb-soft-offline: time stamp 2024-09-06 10:15:39 is 19311838.780121854 s in the future
2079 11:05:44.446226 tar: ./mm/test_hmm.sh: time stamp 2024-08-20 17:52:51 is 17870470.657777479 s in the future
2080 11:05:44.584695 tar: ./mm/map_hugetlb: time stamp 2024-09-06 10:15:43 is 19311842.518578562 s in the future
2081 11:05:44.712869 tar: ./mm/hugepage-mremap: time stamp 2024-09-06 10:15:40 is 19311839.390893145 s in the future
2082 11:05:44.848853 tar: ./mm/hugetlb-read-hwpoison: time stamp 2024-09-06 10:15:38 is 19311837.254656562 s in the future
2083 11:05:44.987248 tar: ./mm/thuge-gen: time stamp 2024-09-06 10:15:49 is 19311848.115565062 s in the future
2084 11:05:45.116323 tar: ./mm/cow: time stamp 2024-09-06 10:15:35 is 19311833.985107687 s in the future
2085 11:05:45.196592 tar: ./mm: time stamp 2024-09-06 10:16:11 is 19311869.905352687 s in the future
2086 11:05:45.358500 tar: ./capabilities/validate_cap: time stamp 2024-09-06 10:12:42 is 19311660.745787728 s in the future
2087 11:05:45.490851 tar: ./capabilities/test_execve: time stamp 2024-09-06 10:12:42 is 19311660.612600937 s in the future
2088 11:05:45.545997 tar: ./capabilities: time stamp 2024-09-06 10:15:55 is 19311853.556835603 s in the future
2089 11:05:45.731118 tar: ./vDSO/vdso_test_abi: time stamp 2024-09-06 10:15:34 is 19311832.371744145 s in the future
2090 11:05:45.873138 tar: ./vDSO/vdso_test_correctness: time stamp 2024-09-06 10:15:34 is 19311832.23162502 s in the future
2091 11:05:46.061438 tar: ./vDSO/vdso_test_clock_getres: time stamp 2024-09-06 10:15:34 is 19311832.04190652 s in the future
2092 11:05:46.190534 tar: ./vDSO/vdso_test_getcpu: time stamp 2024-09-06 10:15:34 is 19311831.913033728 s in the future
2093 11:05:46.332324 tar: ./vDSO/vdso_test_gettimeofday: time stamp 2024-09-06 10:15:34 is 19311831.771203437 s in the future
2094 11:05:46.396008 tar: ./vDSO: time stamp 2024-09-06 10:16:10 is 19311867.70650952 s in the future
2095 11:05:46.550346 tar: ./clone3/clone3_set_tid: time stamp 2024-09-06 10:12:45 is 19311662.553262645 s in the future
2096 11:05:46.686362 tar: ./clone3/clone3_cap_checkpoint_restore: time stamp 2024-09-06 10:12:45 is 19311662.419630395 s in the future
2097 11:05:46.808010 tar: ./clone3/clone3_clear_sighand: time stamp 2024-09-06 10:12:45 is 19311662.29594677 s in the future
2098 11:05:46.956334 tar: ./clone3/clone3: time stamp 2024-09-06 10:12:45 is 19311662.14741852 s in the future
2099 11:05:47.005230 tar: ./clone3: time stamp 2024-09-06 10:15:56 is 19311853.097329853 s in the future
2100 11:05:47.065610 tar: .: time stamp 2024-09-06 10:16:13 is 19311870.036135895 s in the future
2101 11:05:47.287078 skiplist:
2102 11:05:47.287457 ========================================
2103 11:05:47.293921 ========================================
2104 11:05:47.559399 dt:test_unprobed_devices.sh
2105 11:05:47.735309 ============== Tests to run ===============
2106 11:05:47.748082 dt:test_unprobed_devices.sh
2107 11:05:47.751382 ===========End Tests to run ===============
2108 11:05:47.813976 shardfile-dt pass
2109 11:05:48.162171 <12>[ 203.330772] kselftest: Running tests in dt
2110 11:05:48.195238 TAP version 13
2111 11:05:48.218909 1..1
2112 11:05:48.272641 # timeout set to 45
2113 11:05:48.273027 # selftests: dt: test_unprobed_devices.sh
2114 11:05:49.053833 # TAP version 13
2115 11:06:14.513581 # 1..257
2116 11:06:14.690008 # ok 1 / # SKIP
2117 11:06:14.710492 # ok 2 /clk_mcasp0
2118 11:06:14.782096 # ok 3 /clk_mcasp0_fixed # SKIP
2119 11:06:14.853340 # ok 4 /cpus/cpu@0 # SKIP
2120 11:06:14.931317 # ok 5 /cpus/idle-states/mpu_gate # SKIP
2121 11:06:14.948813 # ok 6 /fixedregulator0
2122 11:06:14.970809 # ok 7 /leds
2123 11:06:14.990071 # ok 8 /ocp
2124 11:06:15.019472 # ok 9 /ocp/interconnect@44c00000
2125 11:06:15.039356 # ok 10 /ocp/interconnect@44c00000/segment@0
2126 11:06:15.063951 # ok 11 /ocp/interconnect@44c00000/segment@100000
2127 11:06:15.092885 # ok 12 /ocp/interconnect@44c00000/segment@100000/target-module@0
2128 11:06:15.165175 # not ok 13 /ocp/interconnect@44c00000/segment@100000/target-module@0/cpu@0
2129 11:06:15.187272 # ok 14 /ocp/interconnect@44c00000/segment@200000
2130 11:06:15.207519 # ok 15 /ocp/interconnect@44c00000/segment@200000/target-module@0
2131 11:06:15.316392 # not ok 16 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0
2132 11:06:15.391994 # ok 17 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0 # SKIP
2133 11:06:15.465360 # ok 18 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@0 # SKIP
2134 11:06:15.540106 # ok 19 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@120 # SKIP
2135 11:06:15.616974 # ok 20 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@14c # SKIP
2136 11:06:15.687248 # ok 21 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@18 # SKIP
2137 11:06:15.761968 # ok 22 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@1c # SKIP
2138 11:06:15.835472 # ok 23 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@24 # SKIP
2139 11:06:15.907785 # ok 24 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@38 # SKIP
2140 11:06:15.978392 # ok 25 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@e8 # SKIP
2141 11:06:16.050756 # ok 26 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400 # SKIP
2142 11:06:16.124181 # ok 27 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@0 # SKIP
2143 11:06:16.203301 # ok 28 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@14 # SKIP
2144 11:06:16.274018 # ok 29 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@b0 # SKIP
2145 11:06:16.345222 # ok 30 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600 # SKIP
2146 11:06:16.418837 # ok 31 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600/clock@0 # SKIP
2147 11:06:16.490093 # ok 32 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800 # SKIP
2148 11:06:16.563527 # ok 33 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800/clock@0 # SKIP
2149 11:06:16.635007 # ok 34 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900 # SKIP
2150 11:06:16.710560 # ok 35 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900/clock@0 # SKIP
2151 11:06:16.784028 # ok 36 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00 # SKIP
2152 11:06:16.864042 # ok 37 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00/clock@0 # SKIP
2153 11:06:16.937570 # ok 38 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-24mhz # SKIP
2154 11:06:17.012525 # ok 39 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-32768 # SKIP
2155 11:06:17.083006 # ok 40 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-rc32k # SKIP
2156 11:06:17.155283 # ok 41 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clkdiv32k # SKIP
2157 11:06:17.234154 # ok 42 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-125mhz-gclk # SKIP
2158 11:06:17.308053 # ok 43 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-cpts-rft@520 # SKIP
2159 11:06:17.379523 # ok 44 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4-div2 # SKIP
2160 11:06:17.453170 # ok 45 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4@480 # SKIP
2161 11:06:17.527005 # ok 46 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m5@484 # SKIP
2162 11:06:17.601583 # ok 47 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m6@4d8 # SKIP
2163 11:06:17.677386 # ok 48 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-x2 # SKIP
2164 11:06:17.750054 # ok 49 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2-div2 # SKIP
2165 11:06:17.824649 # ok 50 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2@4a0 # SKIP
2166 11:06:17.900915 # ok 51 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-disp-m2@4a4 # SKIP
2167 11:06:17.971004 # ok 52 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-mpu-m2@4a8 # SKIP
2168 11:06:18.046999 # ok 53 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4 # SKIP
2169 11:06:18.125076 # ok 54 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4-wkupdm # SKIP
2170 11:06:18.197713 # ok 55 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2@4ac # SKIP
2171 11:06:18.269302 # ok 56 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-gpio0-dbclk-mux@53c # SKIP
2172 11:06:18.344029 # ok 57 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-ieee5000-fck-1@e4 # SKIP
2173 11:06:18.416420 # ok 58 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3-gclk # SKIP
2174 11:06:18.490865 # ok 59 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3s-gclk # SKIP
2175 11:06:18.564230 # ok 60 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4-rtc-gclk # SKIP
2176 11:06:18.639415 # ok 61 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4fw-gclk # SKIP
2177 11:06:18.711635 # ok 62 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4hs-gclk # SKIP
2178 11:06:18.786092 # ok 63 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4ls-gclk # SKIP
2179 11:06:18.864089 # ok 64 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-lcd-gclk@534 # SKIP
2180 11:06:18.935509 # ok 65 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmc # SKIP
2181 11:06:19.008182 # ok 66 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmu-fck-1@914 # SKIP
2182 11:06:19.084267 # ok 67 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-pruss-ocp-gclk@530 # SKIP
2183 11:06:19.158045 # ok 68 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-sysclk-div # SKIP
2184 11:06:19.228339 # ok 69 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-tclkin # SKIP
2185 11:06:19.302150 # ok 70 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer1-fck@528 # SKIP
2186 11:06:19.376967 # ok 71 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer2-fck@508 # SKIP
2187 11:06:19.455009 # ok 72 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer3-fck@50c # SKIP
2188 11:06:19.524225 # ok 73 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer4-fck@510 # SKIP
2189 11:06:19.600221 # ok 74 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer5-fck@518 # SKIP
2190 11:06:19.670339 # ok 75 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer6-fck@51c # SKIP
2191 11:06:19.744934 # ok 76 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer7-fck@504 # SKIP
2192 11:06:19.819597 # ok 77 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-usbotg-fck-8@47c # SKIP
2193 11:06:19.893487 # ok 78 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-19200000 # SKIP
2194 11:06:19.965942 # ok 79 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-24000000 # SKIP
2195 11:06:20.040396 # ok 80 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-25000000 # SKIP
2196 11:06:20.117091 # ok 81 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-26000000 # SKIP
2197 11:06:20.190428 # ok 82 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-wdt1-fck@538 # SKIP
2198 11:06:20.263978 # ok 83 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@488 # SKIP
2199 11:06:20.339770 # ok 84 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@48c # SKIP
2200 11:06:20.413105 # ok 85 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@490 # SKIP
2201 11:06:20.487775 # ok 86 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@494 # SKIP
2202 11:06:20.566704 # ok 87 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@498 # SKIP
2203 11:06:20.638172 # ok 88 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c # SKIP
2204 11:06:20.715263 # ok 89 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fck-div@0 # SKIP
2205 11:06:20.790423 # ok 90 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fclk-clksel@1 # SKIP
2206 11:06:20.863864 # ok 91 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700 # SKIP
2207 11:06:20.943854 # ok 92 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2-div@3 # SKIP
2208 11:06:21.015915 # ok 93 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2@7 # SKIP
2209 11:06:21.095309 # ok 94 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-sysclkout-pre@0 # SKIP
2210 11:06:21.115886 # ok 95 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1000
2211 11:06:21.138188 # ok 96 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1100
2212 11:06:21.162982 # ok 97 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1200
2213 11:06:21.187905 # ok 98 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@c00
2214 11:06:21.215791 # ok 99 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@d00
2215 11:06:21.237311 # ok 100 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@e00
2216 11:06:21.261982 # ok 101 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@f00
2217 11:06:21.285761 # ok 102 /ocp/interconnect@44c00000/segment@200000/target-module@10000
2218 11:06:21.394953 # not ok 103 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0
2219 11:06:21.420789 # ok 104 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/control@620
2220 11:06:21.445684 # ok 105 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/dma-router@f90
2221 11:06:21.470542 # ok 106 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800
2222 11:06:21.579538 # not ok 107 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0
2223 11:06:21.656493 # ok 108 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-adc-tsc-fck # SKIP
2224 11:06:21.734841 # ok 109 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-aes0-fck # SKIP
2225 11:06:21.808563 # ok 110 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan0-fck # SKIP
2226 11:06:21.882148 # ok 111 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan1-fck # SKIP
2227 11:06:21.958125 # ok 112 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp0-fck # SKIP
2228 11:06:22.033240 # ok 113 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp1-fck # SKIP
2229 11:06:22.106944 # ok 114 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-rng-fck # SKIP
2230 11:06:22.182989 # ok 115 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sha0-fck # SKIP
2231 11:06:22.257960 # ok 116 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex0-fck # SKIP
2232 11:06:22.332639 # ok 117 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex1-fck # SKIP
2233 11:06:22.408745 # ok 118 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sys-clkin-22@40 # SKIP
2234 11:06:22.486961 # ok 119 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664 # SKIP
2235 11:06:22.563490 # ok 120 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm0-tbclk@0 # SKIP
2236 11:06:22.639467 # ok 121 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm1-tbclk@1 # SKIP
2237 11:06:22.716596 # ok 122 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm2-tbclk@2 # SKIP
2238 11:06:22.737462 # ok 123 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/phy-gmii-sel
2239 11:06:22.809944 # not ok 124 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/wkup_m3_ipc@1324
2240 11:06:22.965993 # not ok 125 /ocp/interconnect@44c00000/segment@200000/target-module@31000
2241 11:06:22.974002 # ok 126 /ocp/interconnect@44c00000/segment@200000/target-module@31000/timer@0 # SKIP
2242 11:06:22.984818 # ok 127 /ocp/interconnect@44c00000/segment@200000/target-module@35000
2243 11:06:23.057066 # not ok 128 /ocp/interconnect@44c00000/segment@200000/target-module@35000/wdt@0
2244 11:06:23.079768 # ok 129 /ocp/interconnect@44c00000/segment@200000/target-module@3e000
2245 11:06:23.155079 # not ok 130 /ocp/interconnect@44c00000/segment@200000/target-module@3e000/rtc@0
2246 11:06:23.182944 # ok 131 /ocp/interconnect@44c00000/segment@200000/target-module@7000
2247 11:06:23.205454 # ok 132 /ocp/interconnect@44c00000/segment@200000/target-module@7000/gpio@0
2248 11:06:23.226814 # ok 133 /ocp/interconnect@44c00000/segment@200000/target-module@9000
2249 11:06:23.251201 # ok 134 /ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0
2250 11:06:23.279257 # ok 135 /ocp/interconnect@44c00000/segment@200000/target-module@b000
2251 11:06:23.304174 # ok 136 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0
2252 11:06:23.331430 # ok 137 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50
2253 11:06:23.407046 # ok 138 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50/nvmem-layout # SKIP
2254 11:06:23.425952 # ok 139 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
2255 11:06:23.449739 # ok 140 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24
2256 11:06:23.525355 # not ok 141 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/charger
2257 11:06:23.598701 # not ok 142 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/pwrbutton
2258 11:06:23.620068 # ok 143 /ocp/interconnect@44c00000/segment@200000/target-module@d000
2259 11:06:23.724006 # not ok 144 /ocp/interconnect@47c00000
2260 11:06:23.797987 # not ok 145 /ocp/interconnect@47c00000/segment@0
2261 11:06:23.821125 # ok 146 /ocp/interconnect@48000000
2262 11:06:23.843468 # ok 147 /ocp/interconnect@48000000/segment@0
2263 11:06:23.868086 # ok 148 /ocp/interconnect@48000000/segment@0/target-module@22000
2264 11:06:23.892703 # ok 149 /ocp/interconnect@48000000/segment@0/target-module@24000
2265 11:06:23.916065 # ok 150 /ocp/interconnect@48000000/segment@0/target-module@2a000
2266 11:06:23.939493 # ok 151 /ocp/interconnect@48000000/segment@0/target-module@30000
2267 11:06:23.964085 # ok 152 /ocp/interconnect@48000000/segment@0/target-module@38000
2268 11:06:23.993951 # ok 153 /ocp/interconnect@48000000/segment@0/target-module@38000/mcasp@0
2269 11:06:24.014347 # ok 154 /ocp/interconnect@48000000/segment@0/target-module@3c000
2270 11:06:24.086683 # not ok 155 /ocp/interconnect@48000000/segment@0/target-module@40000
2271 11:06:24.161944 # ok 156 /ocp/interconnect@48000000/segment@0/target-module@40000/timer@0 # SKIP
2272 11:06:24.187786 # ok 157 /ocp/interconnect@48000000/segment@0/target-module@42000
2273 11:06:24.208960 # ok 158 /ocp/interconnect@48000000/segment@0/target-module@42000/timer@0
2274 11:06:24.232895 # ok 159 /ocp/interconnect@48000000/segment@0/target-module@44000
2275 11:06:24.257060 # ok 160 /ocp/interconnect@48000000/segment@0/target-module@44000/timer@0
2276 11:06:24.280460 # ok 161 /ocp/interconnect@48000000/segment@0/target-module@46000
2277 11:06:24.309565 # ok 162 /ocp/interconnect@48000000/segment@0/target-module@46000/timer@0
2278 11:06:24.327799 # ok 163 /ocp/interconnect@48000000/segment@0/target-module@48000
2279 11:06:24.353361 # ok 164 /ocp/interconnect@48000000/segment@0/target-module@48000/timer@0
2280 11:06:24.376577 # ok 165 /ocp/interconnect@48000000/segment@0/target-module@4a000
2281 11:06:24.401096 # ok 166 /ocp/interconnect@48000000/segment@0/target-module@4a000/timer@0
2282 11:06:24.425922 # ok 167 /ocp/interconnect@48000000/segment@0/target-module@4c000
2283 11:06:24.449468 # ok 168 /ocp/interconnect@48000000/segment@0/target-module@4c000/gpio@0
2284 11:06:24.473112 # ok 169 /ocp/interconnect@48000000/segment@0/target-module@60000
2285 11:06:24.501980 # ok 170 /ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0
2286 11:06:24.524541 # ok 171 /ocp/interconnect@48000000/segment@0/target-module@c8000
2287 11:06:24.548354 # ok 172 /ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0
2288 11:06:24.574091 # ok 173 /ocp/interconnect@48000000/segment@0/target-module@ca000
2289 11:06:24.596579 # ok 174 /ocp/interconnect@48000000/segment@0/target-module@ca000/spinlock@0
2290 11:06:24.616590 # ok 175 /ocp/interconnect@48000000/segment@100000
2291 11:06:24.642374 # ok 176 /ocp/interconnect@48000000/segment@100000/target-module@9c000
2292 11:06:24.672000 # ok 177 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0
2293 11:06:24.742336 # not ok 178 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54
2294 11:06:24.817182 # ok 179 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54/nvmem-layout # SKIP
2295 11:06:24.888993 # not ok 180 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55
2296 11:06:24.967113 # ok 181 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55/nvmem-layout # SKIP
2297 11:06:25.043760 # not ok 182 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56
2298 11:06:25.118624 # ok 183 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56/nvmem-layout # SKIP
2299 11:06:25.187886 # not ok 184 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57
2300 11:06:25.263503 # ok 185 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57/nvmem-layout # SKIP
2301 11:06:25.288389 # ok 186 /ocp/interconnect@48000000/segment@100000/target-module@a0000
2302 11:06:25.312920 # ok 187 /ocp/interconnect@48000000/segment@100000/target-module@a6000
2303 11:06:25.341989 # ok 188 /ocp/interconnect@48000000/segment@100000/target-module@a8000
2304 11:06:25.360054 # ok 189 /ocp/interconnect@48000000/segment@100000/target-module@aa000
2305 11:06:25.384803 # ok 190 /ocp/interconnect@48000000/segment@100000/target-module@ac000
2306 11:06:25.409144 # ok 191 /ocp/interconnect@48000000/segment@100000/target-module@ac000/gpio@0
2307 11:06:25.433836 # ok 192 /ocp/interconnect@48000000/segment@100000/target-module@ae000
2308 11:06:25.458266 # ok 193 /ocp/interconnect@48000000/segment@100000/target-module@ae000/gpio@0
2309 11:06:25.479840 # ok 194 /ocp/interconnect@48000000/segment@100000/target-module@cc000
2310 11:06:25.511271 # ok 195 /ocp/interconnect@48000000/segment@100000/target-module@d0000
2311 11:06:25.533719 # ok 196 /ocp/interconnect@48000000/segment@100000/target-module@d8000
2312 11:06:25.559633 # ok 197 /ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0
2313 11:06:25.580732 # ok 198 /ocp/interconnect@48000000/segment@200000
2314 11:06:25.601961 # ok 199 /ocp/interconnect@48000000/segment@200000/target-module@0
2315 11:06:25.676950 # ok 200 /ocp/interconnect@48000000/segment@200000/target-module@0/mpu@0 # SKIP
2316 11:06:25.703466 # ok 201 /ocp/interconnect@48000000/segment@300000
2317 11:06:25.723836 # ok 202 /ocp/interconnect@48000000/segment@300000/target-module@0
2318 11:06:25.752669 # ok 203 /ocp/interconnect@48000000/segment@300000/target-module@10000
2319 11:06:25.775071 # ok 204 /ocp/interconnect@48000000/segment@300000/target-module@10000/rng@0
2320 11:06:25.801966 # ok 205 /ocp/interconnect@48000000/segment@300000/target-module@2000
2321 11:06:25.824301 # ok 206 /ocp/interconnect@48000000/segment@300000/target-module@4000
2322 11:06:25.845705 # ok 207 /ocp/interconnect@48000000/segment@300000/target-module@e000
2323 11:06:25.919708 # not ok 208 /ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0
2324 11:06:25.940726 # ok 209 /ocp/interconnect@4a000000
2325 11:06:25.962852 # ok 210 /ocp/interconnect@4a000000/segment@0
2326 11:06:25.995087 # ok 211 /ocp/interconnect@4a000000/segment@0/target-module@100000
2327 11:06:26.021012 # ok 212 /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0
2328 11:06:26.040222 # ok 213 /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000
2329 11:06:26.063941 # ok 214 /ocp/interconnect@4a000000/segment@0/target-module@300000
2330 11:06:26.139166 # not ok 215 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0
2331 11:06:26.248499 # ok 216 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000 # SKIP
2332 11:06:26.323141 # not ok 217 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/interrupt-controller@20000
2333 11:06:26.431350 # ok 218 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mii-rt@32000 # SKIP
2334 11:06:26.505800 # not ok 219 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@34000
2335 11:06:26.580159 # not ok 220 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@38000
2336 11:06:26.682727 # not ok 221 /ocp/interconnect@4b140000
2337 11:06:26.759782 # not ok 222 /ocp/interconnect@4b140000/segment@0
2338 11:06:26.832708 # ok 223 /ocp/interrupt-controller@48200000 # SKIP
2339 11:06:26.855865 # ok 224 /ocp/target-module@40300000
2340 11:06:26.874566 # ok 225 /ocp/target-module@40300000/sram@0
2341 11:06:26.954128 # ok 226 /ocp/target-module@40300000/sram@0/pm-code-sram@0 # SKIP
2342 11:06:27.030363 # ok 227 /ocp/target-module@40300000/sram@0/pm-data-sram@1000 # SKIP
2343 11:06:27.051527 # ok 228 /ocp/target-module@47400000
2344 11:06:27.071382 # ok 229 /ocp/target-module@47400000/dma-controller@2000
2345 11:06:27.098599 # ok 230 /ocp/target-module@47400000/usb-phy@1300
2346 11:06:27.121888 # ok 231 /ocp/target-module@47400000/usb-phy@1b00
2347 11:06:27.142081 # ok 232 /ocp/target-module@47400000/usb@1400
2348 11:06:27.168532 # ok 233 /ocp/target-module@47400000/usb@1800
2349 11:06:27.189711 # ok 234 /ocp/target-module@47810000
2350 11:06:27.208280 # ok 235 /ocp/target-module@49000000
2351 11:06:27.235723 # ok 236 /ocp/target-module@49000000/dma@0
2352 11:06:27.257766 # ok 237 /ocp/target-module@49800000
2353 11:06:27.277584 # ok 238 /ocp/target-module@49800000/dma@0
2354 11:06:27.301726 # ok 239 /ocp/target-module@49900000
2355 11:06:27.329478 # ok 240 /ocp/target-module@49900000/dma@0
2356 11:06:27.351579 # ok 241 /ocp/target-module@49a00000
2357 11:06:27.376310 # ok 242 /ocp/target-module@49a00000/dma@0
2358 11:06:27.399493 # ok 243 /ocp/target-module@4c000000
2359 11:06:27.472373 # not ok 244 /ocp/target-module@4c000000/emif@0
2360 11:06:27.491257 # ok 245 /ocp/target-module@50000000
2361 11:06:27.514056 # ok 246 /ocp/target-module@53100000
2362 11:06:27.592146 # not ok 247 /ocp/target-module@53100000/sham@0
2363 11:06:27.609913 # ok 248 /ocp/target-module@53500000
2364 11:06:27.684787 # not ok 249 /ocp/target-module@53500000/aes@0
2365 11:06:27.711116 # ok 250 /ocp/target-module@56000000
2366 11:06:27.817832 # ok 251 /ocp/target-module@56000000/gpu@0 # SKIP
2367 11:06:27.888474 # ok 252 /opp-table # SKIP
2368 11:06:27.965085 # ok 253 /soc # SKIP
2369 11:06:27.988067 # ok 254 /sound
2370 11:06:28.011288 # ok 255 /target-module@4b000000
2371 11:06:28.037885 # ok 256 /target-module@4b000000/target-module@140000
2372 11:06:28.057076 # ok 257 /target-module@4b000000/target-module@140000/pmu@0
2373 11:06:28.065608 # # Totals: pass:117 fail:27 xfail:0 xpass:0 skip:113 error:0
2374 11:06:28.070662 not ok 1 selftests: dt: test_unprobed_devices.sh # exit=1
2375 11:06:30.462996 dt_test_unprobed_devices_sh_ skip
2376 11:06:30.469113 dt_test_unprobed_devices_sh_clk_mcasp0 pass
2377 11:06:30.473983 dt_test_unprobed_devices_sh_clk_mcasp0_fixed skip
2378 11:06:30.474356 dt_test_unprobed_devices_sh_cpus_cpu_0 skip
2379 11:06:30.481493 dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate skip
2380 11:06:30.487739 dt_test_unprobed_devices_sh_fixedregulator0 pass
2381 11:06:30.488111 dt_test_unprobed_devices_sh_leds pass
2382 11:06:30.492734 dt_test_unprobed_devices_sh_ocp pass
2383 11:06:30.498884 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 pass
2384 11:06:30.503764 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 pass
2385 11:06:30.509873 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 pass
2386 11:06:30.519880 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 pass
2387 11:06:30.524736 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 fail
2388 11:06:30.530993 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 pass
2389 11:06:30.540733 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 pass
2390 11:06:30.551821 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 fail
2391 11:06:30.556807 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 skip
2392 11:06:30.572538 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 skip
2393 11:06:30.577560 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 skip
2394 11:06:30.587303 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c skip
2395 11:06:30.598300 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 skip
2396 11:06:30.608272 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c skip
2397 11:06:30.619314 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 skip
2398 11:06:30.629315 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 skip
2399 11:06:30.640529 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 skip
2400 11:06:30.650298 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 skip
2401 11:06:30.661306 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 skip
2402 11:06:30.671041 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 skip
2403 11:06:30.682167 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 skip
2404 11:06:30.687287 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 skip
2405 11:06:30.698554 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 skip
2406 11:06:30.708280 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 skip
2407 11:06:30.719219 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 skip
2408 11:06:30.729019 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 skip
2409 11:06:30.740073 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 skip
2410 11:06:30.745304 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 skip
2411 11:06:30.761180 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 skip
2412 11:06:30.766310 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz skip
2413 11:06:30.782471 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 skip
2414 11:06:30.787544 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k skip
2415 11:06:30.803441 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k skip
2416 11:06:30.813178 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk skip
2417 11:06:30.824426 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 skip
2418 11:06:30.834362 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 skip
2419 11:06:30.845437 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 skip
2420 11:06:30.855281 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 skip
2421 11:06:30.866453 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 skip
2422 11:06:30.881452 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 skip
2423 11:06:30.892450 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 skip
2424 11:06:30.902054 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 skip
2425 11:06:30.913314 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 skip
2426 11:06:30.923291 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 skip
2427 11:06:30.934145 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 skip
2428 11:06:30.944211 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm skip
2429 11:06:30.955261 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac skip
2430 11:06:30.971174 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c skip
2431 11:06:30.981042 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 skip
2432 11:06:30.992248 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk skip
2433 11:06:31.002020 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk skip
2434 11:06:31.013066 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk skip
2435 11:06:31.023028 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk skip
2436 11:06:31.034040 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk skip
2437 11:06:31.044042 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk skip
2438 11:06:31.055029 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 skip
2439 11:06:31.064806 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc skip
2440 11:06:31.075835 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 skip
2441 11:06:31.085781 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 skip
2442 11:06:31.096785 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div skip
2443 11:06:31.106546 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin skip
2444 11:06:31.117553 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 skip
2445 11:06:31.132285 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 skip
2446 11:06:31.143283 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c skip
2447 11:06:31.153286 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 skip
2448 11:06:31.164293 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 skip
2449 11:06:31.174184 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c skip
2450 11:06:31.185174 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 skip
2451 11:06:31.194937 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c skip
2452 11:06:31.205929 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 skip
2453 11:06:31.220650 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 skip
2454 11:06:31.231666 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 skip
2455 11:06:31.242806 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 skip
2456 11:06:31.252504 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 skip
2457 11:06:31.263675 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 skip
2458 11:06:31.268521 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c skip
2459 11:06:31.284779 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 skip
2460 11:06:31.288547 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 skip
2461 11:06:31.299701 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 skip
2462 11:06:31.309554 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c skip
2463 11:06:31.326790 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 skip
2464 11:06:31.336652 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 skip
2465 11:06:31.346539 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 skip
2466 11:06:31.357664 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 skip
2467 11:06:31.368641 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 skip
2468 11:06:31.383272 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 skip
2469 11:06:31.389425 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 pass
2470 11:06:31.399155 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 pass
2471 11:06:31.410146 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 pass
2472 11:06:31.415153 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 pass
2473 11:06:31.424999 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 pass
2474 11:06:31.436211 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 pass
2475 11:06:31.446016 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 pass
2476 11:06:31.452138 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 pass
2477 11:06:31.462284 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 fail
2478 11:06:31.473239 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 pass
2479 11:06:31.482945 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 pass
2480 11:06:31.494293 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 pass
2481 11:06:31.504268 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 fail
2482 11:06:31.515535 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck skip
2483 11:06:31.525409 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck skip
2484 11:06:31.536520 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck skip
2485 11:06:31.551139 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck skip
2486 11:06:31.562403 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck skip
2487 11:06:31.572113 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck skip
2488 11:06:31.583145 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck skip
2489 11:06:31.599158 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck skip
2490 11:06:31.608894 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck skip
2491 11:06:31.619929 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck skip
2492 11:06:31.635004 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 skip
2493 11:06:31.646025 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 skip
2494 11:06:31.655941 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 skip
2495 11:06:31.672109 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 skip
2496 11:06:31.683544 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 skip
2497 11:06:31.698257 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel pass
2498 11:06:31.704524 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 fail
2499 11:06:31.714390 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 fail
2500 11:06:31.725554 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 skip
2501 11:06:31.730453 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 pass
2502 11:06:31.740436 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 fail
2503 11:06:31.750492 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 pass
2504 11:06:31.756653 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 fail
2505 11:06:31.767802 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 pass
2506 11:06:31.771692 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 pass
2507 11:06:31.782544 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 pass
2508 11:06:31.793547 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 pass
2509 11:06:31.798413 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 pass
2510 11:06:31.809786 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 pass
2511 11:06:31.819704 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 pass
2512 11:06:31.830784 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50_nvmem-layout skip
2513 11:06:31.840784 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 pass
2514 11:06:31.851785 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 pass
2515 11:06:31.861795 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger fail
2516 11:06:31.872769 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton fail
2517 11:06:31.877672 dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 pass
2518 11:06:31.882539 dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 fail
2519 11:06:31.893669 dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 fail
2520 11:06:31.894045 dt_test_unprobed_devices_sh_ocp_interconnect_48000000 pass
2521 11:06:31.903527 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 pass
2522 11:06:31.908416 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 pass
2523 11:06:31.919551 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 pass
2524 11:06:31.924405 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 pass
2525 11:06:31.935536 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 pass
2526 11:06:31.940383 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 pass
2527 11:06:31.951679 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 pass
2528 11:06:31.957780 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 pass
2529 11:06:31.962795 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 fail
2530 11:06:31.973776 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 skip
2531 11:06:31.979935 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 pass
2532 11:06:31.990887 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 pass
2533 11:06:31.997295 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 pass
2534 11:06:32.008450 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 pass
2535 11:06:32.013544 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 pass
2536 11:06:32.024803 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 pass
2537 11:06:32.029674 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 pass
2538 11:06:32.041891 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 pass
2539 11:06:32.047017 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 pass
2540 11:06:32.058276 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 pass
2541 11:06:32.064383 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 pass
2542 11:06:32.070551 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 pass
2543 11:06:32.081494 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 pass
2544 11:06:32.086369 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 pass
2545 11:06:32.097543 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 pass
2546 11:06:32.103655 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 pass
2547 11:06:32.114693 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 pass
2548 11:06:32.119708 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 pass
2549 11:06:32.125816 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 pass
2550 11:06:32.136811 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 pass
2551 11:06:32.147687 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 pass
2552 11:06:32.152681 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 fail
2553 11:06:32.165297 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54_nvmem-layout skip
2554 11:06:32.176520 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 fail
2555 11:06:32.187762 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55_nvmem-layout skip
2556 11:06:32.198765 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 fail
2557 11:06:32.208780 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56_nvmem-layout skip
2558 11:06:32.221165 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 fail
2559 11:06:32.232386 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57_nvmem-layout skip
2560 11:06:32.237545 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 pass
2561 11:06:32.249662 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 pass
2562 11:06:32.254639 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 pass
2563 11:06:32.265626 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 pass
2564 11:06:32.271781 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 pass
2565 11:06:32.281652 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 pass
2566 11:06:32.287788 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 pass
2567 11:06:32.299031 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 pass
2568 11:06:32.310042 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 pass
2569 11:06:32.316162 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 pass
2570 11:06:32.327128 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 pass
2571 11:06:32.333423 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 pass
2572 11:06:32.338256 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 pass
2573 11:06:32.350763 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 pass
2574 11:06:32.354496 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 skip
2575 11:06:32.360786 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 pass
2576 11:06:32.371935 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 pass
2577 11:06:32.378010 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 pass
2578 11:06:32.389023 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 pass
2579 11:06:32.395176 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 pass
2580 11:06:32.406284 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 pass
2581 11:06:32.411169 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 pass
2582 11:06:32.423403 dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 fail
2583 11:06:32.428286 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 pass
2584 11:06:32.434381 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 pass
2585 11:06:32.439265 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 pass
2586 11:06:32.451542 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 pass
2587 11:06:32.462540 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 pass
2588 11:06:32.468672 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 pass
2589 11:06:32.479679 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 fail
2590 11:06:32.484540 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 skip
2591 11:06:32.496791 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 fail
2592 11:06:32.507819 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 skip
2593 11:06:32.517746 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 fail
2594 11:06:32.523786 dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 fail
2595 11:06:32.528739 dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 fail
2596 11:06:32.534858 dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 fail
2597 11:06:32.540030 dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 skip
2598 11:06:32.546136 dt_test_unprobed_devices_sh_ocp_target-module_40300000 pass
2599 11:06:32.557156 dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 pass
2600 11:06:32.563468 dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 skip
2601 11:06:32.568515 dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 skip
2602 11:06:32.574661 dt_test_unprobed_devices_sh_ocp_target-module_47400000 pass
2603 11:06:32.579508 dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 pass
2604 11:06:32.591804 dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 pass
2605 11:06:32.595677 dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 pass
2606 11:06:32.601647 dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 pass
2607 11:06:32.608008 dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 pass
2608 11:06:32.612907 dt_test_unprobed_devices_sh_ocp_target-module_47810000 pass
2609 11:06:32.619263 dt_test_unprobed_devices_sh_ocp_target-module_49000000 pass
2610 11:06:32.624105 dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 pass
2611 11:06:32.630233 dt_test_unprobed_devices_sh_ocp_target-module_49800000 pass
2612 11:06:32.636363 dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 pass
2613 11:06:32.641239 dt_test_unprobed_devices_sh_ocp_target-module_49900000 pass
2614 11:06:32.647495 dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 pass
2615 11:06:32.652496 dt_test_unprobed_devices_sh_ocp_target-module_49a00000 pass
2616 11:06:32.657522 dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 pass
2617 11:06:32.663685 dt_test_unprobed_devices_sh_ocp_target-module_4c000000 pass
2618 11:06:32.669762 dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 fail
2619 11:06:32.674600 dt_test_unprobed_devices_sh_ocp_target-module_50000000 pass
2620 11:06:32.680778 dt_test_unprobed_devices_sh_ocp_target-module_53100000 pass
2621 11:06:32.685668 dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 fail
2622 11:06:32.691785 dt_test_unprobed_devices_sh_ocp_target-module_53500000 pass
2623 11:06:32.696781 dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 fail
2624 11:06:32.702890 dt_test_unprobed_devices_sh_ocp_target-module_56000000 pass
2625 11:06:32.707784 dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 skip
2626 11:06:32.708163 dt_test_unprobed_devices_sh_opp-table skip
2627 11:06:32.713978 dt_test_unprobed_devices_sh_soc skip
2628 11:06:32.720075 dt_test_unprobed_devices_sh_sound pass
2629 11:06:32.725279 dt_test_unprobed_devices_sh_target-module_4b000000 pass
2630 11:06:32.731510 dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 pass
2631 11:06:32.736510 dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 pass
2632 11:06:32.744571 dt_test_unprobed_devices_sh fail
2633 11:06:32.744945 + ../../utils/send-to-lava.sh ./output/result.txt
2634 11:06:32.824921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-dt RESULT=pass>
2635 11:06:32.826074 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-dt RESULT=pass
2637 11:06:32.994018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ RESULT=skip>
2638 11:06:32.994630 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ RESULT=skip
2640 11:06:33.310699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0 RESULT=pass>
2641 11:06:33.311305 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0 RESULT=pass
2643 11:06:33.501959 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0_fixed RESULT=skip>
2644 11:06:33.502581 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0_fixed RESULT=skip
2646 11:06:33.686817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_cpu_0 RESULT=skip>
2647 11:06:33.687430 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_cpu_0 RESULT=skip
2649 11:06:33.888819 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate RESULT=skip>
2650 11:06:33.889432 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate RESULT=skip
2652 11:06:34.079336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_fixedregulator0 RESULT=pass>
2653 11:06:34.079976 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_fixedregulator0 RESULT=pass
2655 11:06:34.271274 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_leds RESULT=pass>
2656 11:06:34.271904 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_leds RESULT=pass
2658 11:06:34.437019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp RESULT=pass>
2659 11:06:34.437627 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp RESULT=pass
2661 11:06:34.613703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 RESULT=pass>
2662 11:06:34.614315 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 RESULT=pass
2664 11:06:34.790477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 RESULT=pass>
2665 11:06:34.791087 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 RESULT=pass
2667 11:06:35.007487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 RESULT=pass>
2668 11:06:35.008123 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 RESULT=pass
2670 11:06:35.208948 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 RESULT=pass>
2671 11:06:35.209564 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 RESULT=pass
2673 11:06:35.399985 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 RESULT=fail>
2674 11:06:35.400594 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 RESULT=fail
2676 11:06:35.573870 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 RESULT=pass>
2677 11:06:35.574483 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 RESULT=pass
2679 11:06:35.749865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 RESULT=pass>
2680 11:06:35.750476 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 RESULT=pass
2682 11:06:35.926872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 RESULT=fail>
2683 11:06:35.927228 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 RESULT=fail
2685 11:06:36.108177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 RESULT=skip>
2686 11:06:36.108787 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 RESULT=skip
2688 11:06:36.273356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 RESULT=skip>
2689 11:06:36.273970 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 RESULT=skip
2691 11:06:36.465413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 RESULT=skip>
2692 11:06:36.466025 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 RESULT=skip
2694 11:06:36.657834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c RESULT=skip>
2695 11:06:36.658449 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c RESULT=skip
2697 11:06:36.836023 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 RESULT=skip>
2698 11:06:36.836636 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 RESULT=skip
2700 11:06:37.012271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c RESULT=skip>
2701 11:06:37.012880 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c RESULT=skip
2703 11:06:37.209816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 RESULT=skip>
2704 11:06:37.210442 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 RESULT=skip
2706 11:06:37.384036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 RESULT=skip>
2707 11:06:37.384656 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 RESULT=skip
2709 11:06:37.564401 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 RESULT=skip>
2710 11:06:37.565024 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 RESULT=skip
2712 11:06:37.738928 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 RESULT=skip>
2713 11:06:37.739543 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 RESULT=skip
2715 11:06:37.920439 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 RESULT=skip>
2716 11:06:37.921052 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 RESULT=skip
2718 11:06:38.094710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 RESULT=skip>
2719 11:06:38.095327 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 RESULT=skip
2721 11:06:38.251952 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 RESULT=skip>
2722 11:06:38.252569 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 RESULT=skip
2724 11:06:38.453307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 RESULT=skip>
2725 11:06:38.453930 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 RESULT=skip
2727 11:06:38.636089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 RESULT=skip>
2728 11:06:38.636700 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 RESULT=skip
2730 11:06:38.810258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 RESULT=skip>
2731 11:06:38.810875 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 RESULT=skip
2733 11:06:38.987728 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 RESULT=skip>
2734 11:06:38.988342 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 RESULT=skip
2736 11:06:39.153417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 RESULT=skip>
2737 11:06:39.154025 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 RESULT=skip
2739 11:06:39.340549 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 RESULT=skip>
2740 11:06:39.341162 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 RESULT=skip
2742 11:06:39.548550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 RESULT=skip>
2743 11:06:39.549162 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 RESULT=skip
2745 11:06:39.723815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 RESULT=skip>
2746 11:06:39.724434 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 RESULT=skip
2748 11:06:39.899278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz RESULT=skip>
2749 11:06:39.899913 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz RESULT=skip
2751 11:06:40.116731 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 RESULT=skip>
2752 11:06:40.117344 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 RESULT=skip
2754 11:06:40.297480 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k RESULT=skip>
2755 11:06:40.298091 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k RESULT=skip
2757 11:06:40.487541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k RESULT=skip>
2758 11:06:40.488179 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k RESULT=skip
2760 11:06:40.686191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk RESULT=skip>
2761 11:06:40.686817 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk RESULT=skip
2763 11:06:40.888014 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 RESULT=skip>
2764 11:06:40.888394 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 RESULT=skip
2766 11:06:41.080457 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 RESULT=skip>
2767 11:06:41.081068 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 RESULT=skip
2769 11:06:41.265500 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 RESULT=skip>
2770 11:06:41.266110 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 RESULT=skip
2772 11:06:41.440113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 RESULT=skip>
2773 11:06:41.440724 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 RESULT=skip
2775 11:06:41.648267 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 RESULT=skip>
2776 11:06:41.648881 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 RESULT=skip
2778 11:06:41.820622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 RESULT=skip>
2779 11:06:41.821226 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 RESULT=skip
2781 11:06:42.004498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 RESULT=skip>
2782 11:06:42.005106 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 RESULT=skip
2784 11:06:42.171630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 RESULT=skip>
2785 11:06:42.172030 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 RESULT=skip
2787 11:06:42.339866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 RESULT=skip>
2788 11:06:42.340474 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 RESULT=skip
2790 11:06:42.521710 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 RESULT=skip>
2791 11:06:42.522325 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 RESULT=skip
2793 11:06:42.698025 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 RESULT=skip>
2794 11:06:42.698645 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 RESULT=skip
2796 11:06:42.902293 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm RESULT=skip>
2797 11:06:42.902909 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm RESULT=skip
2799 11:06:43.077685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac RESULT=skip>
2800 11:06:43.078303 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac RESULT=skip
2802 11:06:43.299591 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c RESULT=skip>
2803 11:06:43.300226 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c RESULT=skip
2805 11:06:43.475976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 RESULT=skip>
2806 11:06:43.476596 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 RESULT=skip
2808 11:06:43.647116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk RESULT=skip>
2809 11:06:43.647694 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk RESULT=skip
2811 11:06:43.847886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk RESULT=skip>
2812 11:06:43.848497 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk RESULT=skip
2814 11:06:44.030811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk RESULT=skip>
2815 11:06:44.031425 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk RESULT=skip
2817 11:06:44.239010 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk RESULT=skip>
2818 11:06:44.239648 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk RESULT=skip
2820 11:06:44.431268 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk RESULT=skip>
2821 11:06:44.431902 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk RESULT=skip
2823 11:06:44.633953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk RESULT=skip>
2824 11:06:44.634332 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk RESULT=skip
2826 11:06:44.815715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 RESULT=skip>
2827 11:06:44.816335 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 RESULT=skip
2829 11:06:44.998816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc RESULT=skip>
2830 11:06:44.999437 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc RESULT=skip
2832 11:06:45.200736 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 RESULT=skip>
2833 11:06:45.201352 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 RESULT=skip
2835 11:06:45.398552 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 RESULT=skip>
2836 11:06:45.399160 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 RESULT=skip
2838 11:06:45.583461 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div RESULT=skip>
2839 11:06:45.584103 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div RESULT=skip
2841 11:06:45.758613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin RESULT=skip>
2842 11:06:45.759232 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin RESULT=skip
2844 11:06:45.941628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 RESULT=skip>
2845 11:06:45.942249 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 RESULT=skip
2847 11:06:46.131975 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 RESULT=skip>
2848 11:06:46.132584 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 RESULT=skip
2850 11:06:46.323022 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c RESULT=skip>
2851 11:06:46.323657 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c RESULT=skip
2853 11:06:46.503701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 RESULT=skip>
2854 11:06:46.504310 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 RESULT=skip
2856 11:06:46.695034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 RESULT=skip>
2857 11:06:46.695670 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 RESULT=skip
2859 11:06:46.876888 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c RESULT=skip>
2860 11:06:46.877493 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c RESULT=skip
2862 11:06:47.056411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 RESULT=skip>
2863 11:06:47.057019 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 RESULT=skip
2865 11:06:47.236261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c RESULT=skip>
2866 11:06:47.236892 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c RESULT=skip
2868 11:06:47.420230 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 RESULT=skip>
2869 11:06:47.420839 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 RESULT=skip
2871 11:06:47.594656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 RESULT=skip>
2872 11:06:47.595272 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 RESULT=skip
2874 11:06:47.758721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 RESULT=skip>
2875 11:06:47.759329 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 RESULT=skip
2877 11:06:47.951124 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 RESULT=skip>
2878 11:06:47.951696 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 RESULT=skip
2880 11:06:48.156384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 RESULT=skip>
2881 11:06:48.156990 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 RESULT=skip
2883 11:06:48.336986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 RESULT=skip>
2884 11:06:48.337374 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 RESULT=skip
2886 11:06:48.499698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c RESULT=skip>
2887 11:06:48.500315 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c RESULT=skip
2889 11:06:48.730991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 RESULT=skip>
2890 11:06:48.731632 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 RESULT=skip
2892 11:06:48.949783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 RESULT=skip>
2893 11:06:48.950398 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 RESULT=skip
2895 11:06:49.134680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 RESULT=skip>
2896 11:06:49.135311 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 RESULT=skip
2898 11:06:49.303701 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c RESULT=skip>
2899 11:06:49.304316 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c RESULT=skip
2901 11:06:49.468821 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 RESULT=skip>
2902 11:06:49.469437 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 RESULT=skip
2904 11:06:49.650830 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 RESULT=skip>
2905 11:06:49.651454 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 RESULT=skip
2907 11:06:49.833529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 RESULT=skip>
2908 11:06:49.834147 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 RESULT=skip
2910 11:06:50.038656 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 RESULT=skip>
2911 11:06:50.039271 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 RESULT=skip
2913 11:06:50.231115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 RESULT=skip>
2914 11:06:50.231690 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 RESULT=skip
2916 11:06:50.429881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 RESULT=skip>
2917 11:06:50.430498 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 RESULT=skip
2919 11:06:50.614657 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 RESULT=pass>
2920 11:06:50.615275 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 RESULT=pass
2922 11:06:50.785868 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 RESULT=pass>
2923 11:06:50.786485 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 RESULT=pass
2925 11:06:50.973796 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 RESULT=pass>
2926 11:06:50.974422 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 RESULT=pass
2928 11:06:51.166850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 RESULT=pass>
2929 11:06:51.167459 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 RESULT=pass
2931 11:06:51.359069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 RESULT=pass>
2932 11:06:51.359698 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 RESULT=pass
2934 11:06:51.558495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 RESULT=pass>
2935 11:06:51.559107 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 RESULT=pass
2937 11:06:51.740961 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 RESULT=pass>
2938 11:06:51.741571 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 RESULT=pass
2940 11:06:51.907716 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 RESULT=pass>
2941 11:06:51.908339 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 RESULT=pass
2943 11:06:52.100600 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 RESULT=fail>
2944 11:06:52.101210 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 RESULT=fail
2946 11:06:52.284373 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 RESULT=pass>
2947 11:06:52.284986 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 RESULT=pass
2949 11:06:52.451447 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 RESULT=pass>
2950 11:06:52.452085 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 RESULT=pass
2952 11:06:52.628745 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 RESULT=pass>
2953 11:06:52.629359 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 RESULT=pass
2955 11:06:52.804978 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 RESULT=fail>
2956 11:06:52.805594 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 RESULT=fail
2958 11:06:52.994820 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck RESULT=skip>
2959 11:06:52.995434 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck RESULT=skip
2961 11:06:53.159581 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck RESULT=skip>
2962 11:06:53.160251 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck RESULT=skip
2964 11:06:53.374483 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck RESULT=skip>
2965 11:06:53.374873 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck RESULT=skip
2967 11:06:53.548964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck RESULT=skip>
2968 11:06:53.549582 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck RESULT=skip
2970 11:06:53.756565 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck RESULT=skip>
2971 11:06:53.757186 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck RESULT=skip
2973 11:06:53.960454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck RESULT=skip>
2974 11:06:53.961067 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck RESULT=skip
2976 11:06:54.151905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck RESULT=skip>
2977 11:06:54.152520 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck RESULT=skip
2979 11:06:54.328353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck RESULT=skip>
2980 11:06:54.328967 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck RESULT=skip
2982 11:06:54.547404 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck RESULT=skip>
2983 11:06:54.548045 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck RESULT=skip
2985 11:06:54.721191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck RESULT=skip>
2986 11:06:54.721832 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck RESULT=skip
2988 11:06:54.889502 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 RESULT=skip>
2989 11:06:54.890117 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 RESULT=skip
2991 11:06:55.077498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 RESULT=skip>
2992 11:06:55.078120 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 RESULT=skip
2994 11:06:55.270670 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 RESULT=skip
2996 11:06:55.272577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 RESULT=skip>
2997 11:06:55.454677 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 RESULT=skip
2999 11:06:55.457886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 RESULT=skip>
3000 11:06:55.629776 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 RESULT=skip
3002 11:06:55.631685 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 RESULT=skip>
3003 11:06:55.810060 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel RESULT=pass>
3004 11:06:55.810675 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel RESULT=pass
3006 11:06:56.003429 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 RESULT=fail>
3007 11:06:56.004003 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 RESULT=fail
3009 11:06:56.182675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 RESULT=fail>
3010 11:06:56.183291 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 RESULT=fail
3012 11:06:56.371624 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 RESULT=skip>
3013 11:06:56.372256 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 RESULT=skip
3015 11:06:56.577419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 RESULT=pass>
3016 11:06:56.578028 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 RESULT=pass
3018 11:06:56.759904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 RESULT=fail>
3019 11:06:56.760518 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 RESULT=fail
3021 11:06:56.949779 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 RESULT=pass>
3022 11:06:56.950398 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 RESULT=pass
3024 11:06:57.134236 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 RESULT=fail>
3025 11:06:57.134624 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 RESULT=fail
3027 11:06:57.304109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 RESULT=pass>
3028 11:06:57.304720 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 RESULT=pass
3030 11:06:57.501314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 RESULT=pass>
3031 11:06:57.501924 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 RESULT=pass
3033 11:06:57.682918 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 RESULT=pass>
3034 11:06:57.683528 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 RESULT=pass
3036 11:06:57.862162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 RESULT=pass>
3037 11:06:57.862772 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 RESULT=pass
3039 11:06:58.061474 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 RESULT=pass>
3040 11:06:58.062089 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 RESULT=pass
3042 11:06:58.236678 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 RESULT=pass>
3043 11:06:58.237289 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 RESULT=pass
3045 11:06:58.426650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 RESULT=pass>
3046 11:06:58.427077 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 RESULT=pass
3048 11:06:58.614743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50_nvmem-layout RESULT=skip>
3049 11:06:58.615359 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50_nvmem-layout RESULT=skip
3051 11:06:58.818635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 RESULT=pass>
3052 11:06:58.819254 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 RESULT=pass
3054 11:06:59.000362 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 RESULT=pass>
3055 11:06:59.000972 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 RESULT=pass
3057 11:06:59.205445 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger RESULT=fail>
3058 11:06:59.206059 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger RESULT=fail
3060 11:06:59.431400 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton RESULT=fail>
3061 11:06:59.432044 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton RESULT=fail
3063 11:06:59.621352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 RESULT=pass>
3064 11:06:59.621732 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 RESULT=pass
3066 11:06:59.798834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 RESULT=fail>
3067 11:06:59.799457 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 RESULT=fail
3069 11:06:59.970470 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 RESULT=fail>
3070 11:06:59.971084 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 RESULT=fail
3072 11:07:00.143190 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000 RESULT=pass>
3073 11:07:00.143800 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000 RESULT=pass
3075 11:07:00.324242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 RESULT=pass>
3076 11:07:00.324854 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 RESULT=pass
3078 11:07:00.502635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 RESULT=pass>
3079 11:07:00.503246 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 RESULT=pass
3081 11:07:00.684866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 RESULT=pass>
3082 11:07:00.685482 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 RESULT=pass
3084 11:07:00.861726 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 RESULT=pass>
3085 11:07:00.862116 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 RESULT=pass
3087 11:07:01.058122 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 RESULT=pass>
3088 11:07:01.058741 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 RESULT=pass
3090 11:07:01.244626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 RESULT=pass>
3091 11:07:01.245236 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 RESULT=pass
3093 11:07:01.477507 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 RESULT=pass>
3094 11:07:01.478120 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 RESULT=pass
3096 11:07:01.659841 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 RESULT=pass>
3097 11:07:01.660450 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 RESULT=pass
3099 11:07:01.844689 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 RESULT=fail>
3100 11:07:01.845302 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 RESULT=fail
3102 11:07:02.036576 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 RESULT=skip>
3103 11:07:02.037192 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 RESULT=skip
3105 11:07:02.210677 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 RESULT=pass>
3106 11:07:02.211309 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 RESULT=pass
3108 11:07:02.404617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 RESULT=pass>
3109 11:07:02.405233 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 RESULT=pass
3111 11:07:02.599632 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 RESULT=pass>
3112 11:07:02.600242 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 RESULT=pass
3114 11:07:02.781932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 RESULT=pass>
3115 11:07:02.782544 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 RESULT=pass
3117 11:07:02.971932 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 RESULT=pass>
3118 11:07:02.972546 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 RESULT=pass
3120 11:07:03.154286 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 RESULT=pass>
3121 11:07:03.154898 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 RESULT=pass
3123 11:07:03.325143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 RESULT=pass>
3124 11:07:03.325756 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 RESULT=pass
3126 11:07:03.550680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 RESULT=pass>
3127 11:07:03.551302 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 RESULT=pass
3129 11:07:03.761521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 RESULT=pass>
3130 11:07:03.762135 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 RESULT=pass
3132 11:07:03.946854 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 RESULT=pass>
3133 11:07:03.947469 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 RESULT=pass
3135 11:07:04.131665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 RESULT=pass>
3136 11:07:04.132284 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 RESULT=pass
3138 11:07:04.313775 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 RESULT=pass>
3139 11:07:04.314385 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 RESULT=pass
3141 11:07:04.513314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 RESULT=pass>
3142 11:07:04.513928 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 RESULT=pass
3144 11:07:04.708011 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 RESULT=pass>
3145 11:07:04.708634 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 RESULT=pass
3147 11:07:04.886683 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 RESULT=pass>
3148 11:07:04.887296 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 RESULT=pass
3150 11:07:05.071051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 RESULT=pass>
3151 11:07:05.071682 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 RESULT=pass
3153 11:07:05.257801 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 RESULT=pass>
3154 11:07:05.258415 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 RESULT=pass
3156 11:07:05.439460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 RESULT=pass>
3157 11:07:05.440104 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 RESULT=pass
3159 11:07:05.633311 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 RESULT=pass>
3160 11:07:05.633922 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 RESULT=pass
3162 11:07:05.811695 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 RESULT=pass>
3163 11:07:05.812304 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 RESULT=pass
3165 11:07:06.002642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 RESULT=pass>
3166 11:07:06.003262 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 RESULT=pass
3168 11:07:06.166546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 RESULT=fail>
3169 11:07:06.167160 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 RESULT=fail
3171 11:07:06.354638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54_nvmem-layout RESULT=skip>
3172 11:07:06.355254 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54_nvmem-layout RESULT=skip
3174 11:07:06.542551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 RESULT=fail>
3175 11:07:06.543157 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 RESULT=fail
3177 11:07:06.745399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55_nvmem-layout RESULT=skip>
3178 11:07:06.746010 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55_nvmem-layout RESULT=skip
3180 11:07:06.937858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 RESULT=fail>
3181 11:07:06.938467 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 RESULT=fail
3183 11:07:07.136455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56_nvmem-layout RESULT=skip>
3184 11:07:07.136835 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56_nvmem-layout RESULT=skip
3186 11:07:07.314198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 RESULT=fail>
3187 11:07:07.314808 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 RESULT=fail
3189 11:07:07.507648 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57_nvmem-layout RESULT=skip>
3190 11:07:07.508261 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57_nvmem-layout RESULT=skip
3192 11:07:07.691157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 RESULT=pass>
3193 11:07:07.691770 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 RESULT=pass
3195 11:07:07.873529 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 RESULT=pass>
3196 11:07:07.874141 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 RESULT=pass
3198 11:07:08.058231 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 RESULT=pass>
3199 11:07:08.058842 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 RESULT=pass
3201 11:07:08.263221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 RESULT=pass>
3202 11:07:08.263859 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 RESULT=pass
3204 11:07:08.455423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 RESULT=pass>
3205 11:07:08.456039 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 RESULT=pass
3207 11:07:08.640116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 RESULT=pass>
3208 11:07:08.640730 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 RESULT=pass
3210 11:07:08.807942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 RESULT=pass>
3211 11:07:08.808556 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 RESULT=pass
3213 11:07:08.984321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 RESULT=pass>
3214 11:07:08.984935 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 RESULT=pass
3216 11:07:09.216325 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 RESULT=pass>
3217 11:07:09.216943 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 RESULT=pass
3219 11:07:09.411563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 RESULT=pass>
3220 11:07:09.412207 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 RESULT=pass
3222 11:07:09.603462 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 RESULT=pass>
3223 11:07:09.604000 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 RESULT=pass
3225 11:07:09.783079 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 RESULT=pass>
3226 11:07:09.783671 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 RESULT=pass
3228 11:07:09.947212 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 RESULT=pass>
3229 11:07:09.947827 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 RESULT=pass
3231 11:07:10.124654 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 RESULT=pass>
3232 11:07:10.125267 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 RESULT=pass
3234 11:07:10.309113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 RESULT=skip>
3235 11:07:10.309727 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 RESULT=skip
3237 11:07:10.489097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 RESULT=pass>
3238 11:07:10.489709 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 RESULT=pass
3240 11:07:10.657898 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 RESULT=pass>
3241 11:07:10.658510 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 RESULT=pass
3243 11:07:10.837002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 RESULT=pass>
3244 11:07:10.837391 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 RESULT=pass
3246 11:07:11.006903 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 RESULT=pass>
3247 11:07:11.007522 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 RESULT=pass
3249 11:07:11.180976 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 RESULT=pass>
3250 11:07:11.181587 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 RESULT=pass
3252 11:07:11.380119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 RESULT=pass>
3253 11:07:11.380727 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 RESULT=pass
3255 11:07:11.567727 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 RESULT=pass>
3256 11:07:11.568336 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 RESULT=pass
3258 11:07:11.761717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 RESULT=fail>
3259 11:07:11.762325 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 RESULT=fail
3261 11:07:11.935046 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 RESULT=pass>
3262 11:07:11.935678 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 RESULT=pass
3264 11:07:12.111900 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 RESULT=pass>
3265 11:07:12.112290 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 RESULT=pass
3267 11:07:12.280616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 RESULT=pass>
3268 11:07:12.281229 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 RESULT=pass
3270 11:07:12.472832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 RESULT=pass>
3271 11:07:12.473444 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 RESULT=pass
3273 11:07:12.663739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 RESULT=pass>
3274 11:07:12.664350 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 RESULT=pass
3276 11:07:12.849307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 RESULT=pass>
3277 11:07:12.849917 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 RESULT=pass
3279 11:07:13.030012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 RESULT=fail>
3280 11:07:13.030623 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 RESULT=fail
3282 11:07:13.206560 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 RESULT=skip>
3283 11:07:13.207172 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 RESULT=skip
3285 11:07:13.413505 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 RESULT=fail>
3286 11:07:13.413871 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 RESULT=fail
3288 11:07:13.585675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 RESULT=skip>
3289 11:07:13.586288 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 RESULT=skip
3291 11:07:13.809415 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 RESULT=fail>
3292 11:07:13.810034 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 RESULT=fail
3294 11:07:13.984411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 RESULT=fail>
3295 11:07:13.985028 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 RESULT=fail
3297 11:07:14.157946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 RESULT=fail>
3298 11:07:14.158563 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 RESULT=fail
3300 11:07:14.340201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 RESULT=fail>
3301 11:07:14.340819 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 RESULT=fail
3303 11:07:14.503193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 RESULT=skip>
3304 11:07:14.503803 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 RESULT=skip
3306 11:07:14.673356 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000 RESULT=pass>
3307 11:07:14.673767 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000 RESULT=pass
3309 11:07:14.840782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 RESULT=pass>
3310 11:07:14.841397 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 RESULT=pass
3312 11:07:15.010570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 RESULT=skip>
3313 11:07:15.011188 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 RESULT=skip
3315 11:07:15.174292 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 RESULT=skip
3317 11:07:15.177312 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 RESULT=skip>
3318 11:07:15.341136 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000 RESULT=pass>
3319 11:07:15.341758 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000 RESULT=pass
3321 11:07:15.513998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 RESULT=pass>
3322 11:07:15.514608 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 RESULT=pass
3324 11:07:15.692061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 RESULT=pass>
3325 11:07:15.692670 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 RESULT=pass
3327 11:07:15.851302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 RESULT=pass>
3328 11:07:15.851914 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 RESULT=pass
3330 11:07:16.014258 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 RESULT=pass>
3331 11:07:16.014689 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 RESULT=pass
3333 11:07:16.219593 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 RESULT=pass>
3334 11:07:16.220036 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 RESULT=pass
3336 11:07:16.403676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47810000 RESULT=pass>
3337 11:07:16.404073 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47810000 RESULT=pass
3339 11:07:16.595052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000 RESULT=pass>
3340 11:07:16.595453 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000 RESULT=pass
3342 11:07:16.759218 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 RESULT=pass>
3343 11:07:16.759688 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 RESULT=pass
3345 11:07:16.961139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000 RESULT=pass>
3346 11:07:16.961544 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000 RESULT=pass
3348 11:07:17.165220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 RESULT=pass>
3349 11:07:17.165683 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 RESULT=pass
3351 11:07:17.370609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000 RESULT=pass>
3352 11:07:17.371027 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000 RESULT=pass
3354 11:07:17.548364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 RESULT=pass>
3355 11:07:17.548818 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 RESULT=pass
3357 11:07:17.719783 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000 RESULT=pass>
3358 11:07:17.720405 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000 RESULT=pass
3360 11:07:17.871384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 RESULT=pass>
3361 11:07:17.872011 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 RESULT=pass
3363 11:07:18.056661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000 RESULT=pass>
3364 11:07:18.057237 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000 RESULT=pass
3366 11:07:18.232487 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 RESULT=fail>
3367 11:07:18.233106 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 RESULT=fail
3369 11:07:18.409139 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_50000000 RESULT=pass>
3370 11:07:18.409495 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_50000000 RESULT=pass
3372 11:07:18.583984 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000 RESULT=pass>
3373 11:07:18.584597 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000 RESULT=pass
3375 11:07:18.768336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 RESULT=fail>
3376 11:07:18.768953 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 RESULT=fail
3378 11:07:18.947273 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000 RESULT=pass>
3379 11:07:18.948586 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000 RESULT=pass
3381 11:07:19.168269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 RESULT=fail>
3382 11:07:19.168890 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 RESULT=fail
3384 11:07:19.426272 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000 RESULT=pass>
3385 11:07:19.426891 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000 RESULT=pass
3387 11:07:19.619859 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 RESULT=skip>
3388 11:07:19.620245 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 RESULT=skip
3390 11:07:19.802909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_opp-table RESULT=skip>
3391 11:07:19.803524 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_opp-table RESULT=skip
3393 11:07:19.954175 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_soc RESULT=skip>
3394 11:07:19.954798 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_soc RESULT=skip
3396 11:07:20.173946 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_sound RESULT=pass>
3397 11:07:20.174561 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_sound RESULT=pass
3399 11:07:20.357109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000 RESULT=pass>
3400 11:07:20.357731 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000 RESULT=pass
3402 11:07:20.583553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 RESULT=pass>
3403 11:07:20.584195 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 RESULT=pass
3405 11:07:20.762773 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 RESULT=pass>
3406 11:07:20.763388 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 RESULT=pass
3408 11:07:20.945508 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh RESULT=fail>
3409 11:07:20.945901 + set +x
3410 11:07:20.946445 Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh RESULT=fail
3412 11:07:20.949744 <LAVA_SIGNAL_ENDRUN 1_kselftest-dt 1190077_1.6.2.4.5>
3413 11:07:20.950362 Received signal: <ENDRUN> 1_kselftest-dt 1190077_1.6.2.4.5
3414 11:07:20.950750 Ending use of test pattern.
3415 11:07:20.951065 Ending test lava.1_kselftest-dt (1190077_1.6.2.4.5), duration 240.82
3417 11:07:21.004274 <LAVA_TEST_RUNNER EXIT>
3418 11:07:21.004894 ok: lava_test_shell seems to have completed
3419 11:07:21.012069 dt_test_unprobed_devices_sh: fail
dt_test_unprobed_devices_sh_: skip
dt_test_unprobed_devices_sh_clk_mcasp0: pass
dt_test_unprobed_devices_sh_clk_mcasp0_fixed: skip
dt_test_unprobed_devices_sh_cpus_cpu_0: skip
dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate: skip
dt_test_unprobed_devices_sh_fixedregulator0: pass
dt_test_unprobed_devices_sh_leds: pass
dt_test_unprobed_devices_sh_ocp: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0: fail
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_47c00000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4b140000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0: fail
dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000: skip
dt_test_unprobed_devices_sh_ocp_target-module_40300000: pass
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0: skip
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000: skip
dt_test_unprobed_devices_sh_ocp_target-module_47400000: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800: pass
dt_test_unprobed_devices_sh_ocp_target-module_47810000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49800000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49900000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49a00000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_4c000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_50000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53100000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_53500000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_56000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0: skip
dt_test_unprobed_devices_sh_opp-table: skip
dt_test_unprobed_devices_sh_soc: skip
dt_test_unprobed_devices_sh_sound: pass
dt_test_unprobed_devices_sh_target-module_4b000000: pass
dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000: pass
dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0: pass
shardfile-dt: pass
3420 11:07:21.013651 end: 3.1 lava-test-shell (duration 00:04:03) [common]
3421 11:07:21.014097 end: 3 lava-test-retry (duration 00:04:03) [common]
3422 11:07:21.014523 start: 4 finalize (timeout 00:02:49) [common]
3423 11:07:21.014970 start: 4.1 power-off (timeout 00:00:30) [common]
3424 11:07:21.015539 Calling: 'drpm' 'lf-bbb' 'off'
3425 11:07:21.352291 >> OFF
3426 11:07:21.353718 Returned 0 in 0 seconds
3427 11:07:21.454697 end: 4.1 power-off (duration 00:00:00) [common]
3429 11:07:21.455777 start: 4.2 read-feedback (timeout 00:02:49) [common]
3430 11:07:21.456756 Listened to connection for namespace 'common' for up to 1s
3431 11:07:21.457434 Listened to connection for namespace 'common' for up to 1s
3432 11:07:22.456785 Finalising connection for namespace 'common'
3433 11:07:22.457319 Disconnecting from shell: Finalise
3434 11:07:22.457699 / #
3435 11:07:22.558441 end: 4.2 read-feedback (duration 00:00:01) [common]
3436 11:07:22.558945 end: 4 finalize (duration 00:00:02) [common]
3437 11:07:22.559466 Cleaning after the job
3438 11:07:22.560018 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1190077/tftp-deploy-ekbpqj10/ramdisk
3439 11:07:22.565475 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1190077/tftp-deploy-ekbpqj10/kernel
3440 11:07:22.569912 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1190077/tftp-deploy-ekbpqj10/dtb
3441 11:07:22.570645 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1190077/tftp-deploy-ekbpqj10/nfsrootfs
3442 11:07:22.670270 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1190077/tftp-deploy-ekbpqj10/modules
3443 11:07:22.675312 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/1190077
3444 11:07:23.753591 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/1190077
3445 11:07:23.753943 Job finished correctly