Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
1 11:01:00.920510 lava-dispatcher, installed at version: 2024.01
2 11:01:00.921303 start: 0 validate
3 11:01:00.921806 Start time: 2024-09-06 11:01:00.921775+00:00 (UTC)
4 11:01:00.922360 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 11:01:00.922898 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 11:01:00.959095 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 11:01:00.959684 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240906%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 11:01:00.992692 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 11:01:00.993379 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240906%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 11:01:02.041985 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 11:01:02.042534 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240906%2Farm64%2Fdefconfig%2BCONFIG_ARM64_16K_PAGES%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
12 11:01:02.085209 validate duration: 1.16
14 11:01:02.086064 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:01:02.086405 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:01:02.086709 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:01:02.087367 Not decompressing ramdisk as can be used compressed.
18 11:01:02.088222 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 11:01:02.088744 saving as /var/lib/lava/dispatcher/tmp/715651/tftp-deploy-q9j6voiw/ramdisk/rootfs.cpio.gz
20 11:01:02.089273 total size: 8181887 (7 MB)
21 11:01:02.133112 progress 0 % (0 MB)
22 11:01:02.143942 progress 5 % (0 MB)
23 11:01:02.154286 progress 10 % (0 MB)
24 11:01:02.164531 progress 15 % (1 MB)
25 11:01:02.171454 progress 20 % (1 MB)
26 11:01:02.177103 progress 25 % (1 MB)
27 11:01:02.182289 progress 30 % (2 MB)
28 11:01:02.187933 progress 35 % (2 MB)
29 11:01:02.193216 progress 40 % (3 MB)
30 11:01:02.198962 progress 45 % (3 MB)
31 11:01:02.204234 progress 50 % (3 MB)
32 11:01:02.210035 progress 55 % (4 MB)
33 11:01:02.215336 progress 60 % (4 MB)
34 11:01:02.221024 progress 65 % (5 MB)
35 11:01:02.226248 progress 70 % (5 MB)
36 11:01:02.231815 progress 75 % (5 MB)
37 11:01:02.237034 progress 80 % (6 MB)
38 11:01:02.242626 progress 85 % (6 MB)
39 11:01:02.247856 progress 90 % (7 MB)
40 11:01:02.253601 progress 95 % (7 MB)
41 11:01:02.258572 progress 100 % (7 MB)
42 11:01:02.259241 7 MB downloaded in 0.17 s (45.91 MB/s)
43 11:01:02.259776 end: 1.1.1 http-download (duration 00:00:00) [common]
45 11:01:02.260696 end: 1.1 download-retry (duration 00:00:00) [common]
46 11:01:02.260990 start: 1.2 download-retry (timeout 00:10:00) [common]
47 11:01:02.261259 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 11:01:02.261794 downloading http://storage.kernelci.org/next/master/next-20240906/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/kernel/Image
49 11:01:02.262053 saving as /var/lib/lava/dispatcher/tmp/715651/tftp-deploy-q9j6voiw/kernel/Image
50 11:01:02.262260 total size: 45961728 (43 MB)
51 11:01:02.262474 No compression specified
52 11:01:02.301753 progress 0 % (0 MB)
53 11:01:02.331110 progress 5 % (2 MB)
54 11:01:02.359279 progress 10 % (4 MB)
55 11:01:02.387652 progress 15 % (6 MB)
56 11:01:02.416819 progress 20 % (8 MB)
57 11:01:02.445267 progress 25 % (10 MB)
58 11:01:02.473767 progress 30 % (13 MB)
59 11:01:02.503898 progress 35 % (15 MB)
60 11:01:02.532521 progress 40 % (17 MB)
61 11:01:02.560908 progress 45 % (19 MB)
62 11:01:02.589530 progress 50 % (21 MB)
63 11:01:02.619038 progress 55 % (24 MB)
64 11:01:02.647791 progress 60 % (26 MB)
65 11:01:02.676707 progress 65 % (28 MB)
66 11:01:02.705724 progress 70 % (30 MB)
67 11:01:02.734893 progress 75 % (32 MB)
68 11:01:02.764138 progress 80 % (35 MB)
69 11:01:02.793548 progress 85 % (37 MB)
70 11:01:02.822841 progress 90 % (39 MB)
71 11:01:02.851748 progress 95 % (41 MB)
72 11:01:02.879841 progress 100 % (43 MB)
73 11:01:02.880570 43 MB downloaded in 0.62 s (70.89 MB/s)
74 11:01:02.881060 end: 1.2.1 http-download (duration 00:00:01) [common]
76 11:01:02.881884 end: 1.2 download-retry (duration 00:00:01) [common]
77 11:01:02.882160 start: 1.3 download-retry (timeout 00:09:59) [common]
78 11:01:02.882425 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 11:01:02.882892 downloading http://storage.kernelci.org/next/master/next-20240906/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
80 11:01:02.883175 saving as /var/lib/lava/dispatcher/tmp/715651/tftp-deploy-q9j6voiw/dtb/meson-g12b-a311d-libretech-cc.dtb
81 11:01:02.883386 total size: 54703 (0 MB)
82 11:01:02.883599 No compression specified
83 11:01:02.924470 progress 59 % (0 MB)
84 11:01:02.925312 progress 100 % (0 MB)
85 11:01:02.925866 0 MB downloaded in 0.04 s (1.23 MB/s)
86 11:01:02.926359 end: 1.3.1 http-download (duration 00:00:00) [common]
88 11:01:02.927176 end: 1.3 download-retry (duration 00:00:00) [common]
89 11:01:02.927437 start: 1.4 download-retry (timeout 00:09:59) [common]
90 11:01:02.927702 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 11:01:02.928192 downloading http://storage.kernelci.org/next/master/next-20240906/arm64/defconfig+CONFIG_ARM64_16K_PAGES=y/gcc-12/modules.tar.xz
92 11:01:02.928448 saving as /var/lib/lava/dispatcher/tmp/715651/tftp-deploy-q9j6voiw/modules/modules.tar
93 11:01:02.928656 total size: 11522156 (10 MB)
94 11:01:02.928867 Using unxz to decompress xz
95 11:01:02.968933 progress 0 % (0 MB)
96 11:01:03.046452 progress 5 % (0 MB)
97 11:01:03.146485 progress 10 % (1 MB)
98 11:01:03.241576 progress 15 % (1 MB)
99 11:01:03.343462 progress 20 % (2 MB)
100 11:01:03.431439 progress 25 % (2 MB)
101 11:01:03.523072 progress 30 % (3 MB)
102 11:01:03.610998 progress 35 % (3 MB)
103 11:01:03.686105 progress 40 % (4 MB)
104 11:01:03.768912 progress 45 % (4 MB)
105 11:01:03.844140 progress 50 % (5 MB)
106 11:01:03.928468 progress 55 % (6 MB)
107 11:01:04.002898 progress 60 % (6 MB)
108 11:01:04.086903 progress 65 % (7 MB)
109 11:01:04.167177 progress 70 % (7 MB)
110 11:01:04.245530 progress 75 % (8 MB)
111 11:01:04.342456 progress 80 % (8 MB)
112 11:01:04.436244 progress 85 % (9 MB)
113 11:01:04.511757 progress 90 % (9 MB)
114 11:01:04.589973 progress 95 % (10 MB)
115 11:01:04.661660 progress 100 % (10 MB)
116 11:01:04.674732 10 MB downloaded in 1.75 s (6.29 MB/s)
117 11:01:04.675338 end: 1.4.1 http-download (duration 00:00:02) [common]
119 11:01:04.676431 end: 1.4 download-retry (duration 00:00:02) [common]
120 11:01:04.677018 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 11:01:04.677598 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 11:01:04.678140 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 11:01:04.678692 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 11:01:04.679744 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5
125 11:01:04.680682 makedir: /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin
126 11:01:04.681373 makedir: /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/tests
127 11:01:04.682048 makedir: /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/results
128 11:01:04.682709 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-add-keys
129 11:01:04.683723 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-add-sources
130 11:01:04.684845 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-background-process-start
131 11:01:04.685889 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-background-process-stop
132 11:01:04.686970 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-common-functions
133 11:01:04.688009 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-echo-ipv4
134 11:01:04.689024 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-install-packages
135 11:01:04.690016 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-installed-packages
136 11:01:04.691002 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-os-build
137 11:01:04.692028 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-probe-channel
138 11:01:04.693042 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-probe-ip
139 11:01:04.694121 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-target-ip
140 11:01:04.695181 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-target-mac
141 11:01:04.696189 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-target-storage
142 11:01:04.697245 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-test-case
143 11:01:04.698304 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-test-event
144 11:01:04.699302 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-test-feedback
145 11:01:04.700355 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-test-raise
146 11:01:04.701433 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-test-reference
147 11:01:04.702442 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-test-runner
148 11:01:04.703418 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-test-set
149 11:01:04.704427 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-test-shell
150 11:01:04.705441 Updating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-install-packages (oe)
151 11:01:04.706553 Updating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/bin/lava-installed-packages (oe)
152 11:01:04.707475 Creating /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/environment
153 11:01:04.708276 LAVA metadata
154 11:01:04.708814 - LAVA_JOB_ID=715651
155 11:01:04.709290 - LAVA_DISPATCHER_IP=192.168.6.2
156 11:01:04.710028 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 11:01:04.712066 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 11:01:04.712734 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 11:01:04.713192 skipped lava-vland-overlay
160 11:01:04.713726 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 11:01:04.714282 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 11:01:04.714755 skipped lava-multinode-overlay
163 11:01:04.715283 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 11:01:04.715832 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 11:01:04.716402 Loading test definitions
166 11:01:04.717019 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 11:01:04.717508 Using /lava-715651 at stage 0
168 11:01:04.719936 uuid=715651_1.5.2.4.1 testdef=None
169 11:01:04.720574 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 11:01:04.721093 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 11:01:04.724705 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 11:01:04.726267 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 11:01:04.729492 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 11:01:04.730350 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 11:01:04.732653 runner path: /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/0/tests/0_dmesg test_uuid 715651_1.5.2.4.1
178 11:01:04.733249 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 11:01:04.734023 Creating lava-test-runner.conf files
181 11:01:04.734228 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/715651/lava-overlay-hyszpzi5/lava-715651/0 for stage 0
182 11:01:04.734580 - 0_dmesg
183 11:01:04.734935 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 11:01:04.735220 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 11:01:04.759313 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 11:01:04.759747 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 11:01:04.760035 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 11:01:04.760314 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 11:01:04.760581 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 11:01:05.806828 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 11:01:05.807305 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
192 11:01:05.807554 extracting modules file /var/lib/lava/dispatcher/tmp/715651/tftp-deploy-q9j6voiw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/715651/extract-overlay-ramdisk-p_fonyum/ramdisk
193 11:01:07.191467 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 11:01:07.191959 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 11:01:07.192291 [common] Applying overlay /var/lib/lava/dispatcher/tmp/715651/compress-overlay-vimjgj5_/overlay-1.5.2.5.tar.gz to ramdisk
196 11:01:07.192509 [common] Applying overlay /var/lib/lava/dispatcher/tmp/715651/compress-overlay-vimjgj5_/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/715651/extract-overlay-ramdisk-p_fonyum/ramdisk
197 11:01:07.222672 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 11:01:07.223092 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 11:01:07.223363 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 11:01:07.223593 Converting downloaded kernel to a uImage
201 11:01:07.223899 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/715651/tftp-deploy-q9j6voiw/kernel/Image /var/lib/lava/dispatcher/tmp/715651/tftp-deploy-q9j6voiw/kernel/uImage
202 11:01:07.681229 output: Image Name:
203 11:01:07.681642 output: Created: Fri Sep 6 11:01:07 2024
204 11:01:07.681855 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 11:01:07.682060 output: Data Size: 45961728 Bytes = 44884.50 KiB = 43.83 MiB
206 11:01:07.682263 output: Load Address: 01080000
207 11:01:07.682464 output: Entry Point: 01080000
208 11:01:07.682660 output:
209 11:01:07.682991 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 11:01:07.683261 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 11:01:07.683532 start: 1.5.7 configure-preseed-file (timeout 00:09:54) [common]
212 11:01:07.683786 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 11:01:07.684081 start: 1.5.8 compress-ramdisk (timeout 00:09:54) [common]
214 11:01:07.684347 Building ramdisk /var/lib/lava/dispatcher/tmp/715651/extract-overlay-ramdisk-p_fonyum/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/715651/extract-overlay-ramdisk-p_fonyum/ramdisk
215 11:01:10.126930 >> 180677 blocks
216 11:01:18.565504 Adding RAMdisk u-boot header.
217 11:01:18.565928 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/715651/extract-overlay-ramdisk-p_fonyum/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/715651/extract-overlay-ramdisk-p_fonyum/ramdisk.cpio.gz.uboot
218 11:01:18.904876 output: Image Name:
219 11:01:18.905296 output: Created: Fri Sep 6 11:01:18 2024
220 11:01:18.905507 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 11:01:18.905711 output: Data Size: 25933426 Bytes = 25325.61 KiB = 24.73 MiB
222 11:01:18.905912 output: Load Address: 00000000
223 11:01:18.906112 output: Entry Point: 00000000
224 11:01:18.906308 output:
225 11:01:18.907002 rename /var/lib/lava/dispatcher/tmp/715651/extract-overlay-ramdisk-p_fonyum/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/715651/tftp-deploy-q9j6voiw/ramdisk/ramdisk.cpio.gz.uboot
226 11:01:18.907425 end: 1.5.8 compress-ramdisk (duration 00:00:11) [common]
227 11:01:18.907708 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
228 11:01:18.908022 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
229 11:01:18.908490 No LXC device requested
230 11:01:18.908991 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 11:01:18.909496 start: 1.7 deploy-device-env (timeout 00:09:43) [common]
232 11:01:18.909984 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 11:01:18.910391 Checking files for TFTP limit of 4294967296 bytes.
234 11:01:18.913079 end: 1 tftp-deploy (duration 00:00:17) [common]
235 11:01:18.913643 start: 2 uboot-action (timeout 00:05:00) [common]
236 11:01:18.914160 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 11:01:18.914655 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 11:01:18.915171 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 11:01:18.915697 Using kernel file from prepare-kernel: 715651/tftp-deploy-q9j6voiw/kernel/uImage
240 11:01:18.916328 substitutions:
241 11:01:18.916733 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 11:01:18.917133 - {DTB_ADDR}: 0x01070000
243 11:01:18.917527 - {DTB}: 715651/tftp-deploy-q9j6voiw/dtb/meson-g12b-a311d-libretech-cc.dtb
244 11:01:18.917922 - {INITRD}: 715651/tftp-deploy-q9j6voiw/ramdisk/ramdisk.cpio.gz.uboot
245 11:01:18.918316 - {KERNEL_ADDR}: 0x01080000
246 11:01:18.918702 - {KERNEL}: 715651/tftp-deploy-q9j6voiw/kernel/uImage
247 11:01:18.919094 - {LAVA_MAC}: None
248 11:01:18.919523 - {PRESEED_CONFIG}: None
249 11:01:18.919915 - {PRESEED_LOCAL}: None
250 11:01:18.920333 - {RAMDISK_ADDR}: 0x08000000
251 11:01:18.920721 - {RAMDISK}: 715651/tftp-deploy-q9j6voiw/ramdisk/ramdisk.cpio.gz.uboot
252 11:01:18.921112 - {ROOT_PART}: None
253 11:01:18.921497 - {ROOT}: None
254 11:01:18.921883 - {SERVER_IP}: 192.168.6.2
255 11:01:18.922277 - {TEE_ADDR}: 0x83000000
256 11:01:18.922666 - {TEE}: None
257 11:01:18.923052 Parsed boot commands:
258 11:01:18.923426 - setenv autoload no
259 11:01:18.923807 - setenv initrd_high 0xffffffff
260 11:01:18.924466 - setenv fdt_high 0xffffffff
261 11:01:18.924918 - dhcp
262 11:01:18.925321 - setenv serverip 192.168.6.2
263 11:01:18.925717 - tftpboot 0x01080000 715651/tftp-deploy-q9j6voiw/kernel/uImage
264 11:01:18.926116 - tftpboot 0x08000000 715651/tftp-deploy-q9j6voiw/ramdisk/ramdisk.cpio.gz.uboot
265 11:01:18.926513 - tftpboot 0x01070000 715651/tftp-deploy-q9j6voiw/dtb/meson-g12b-a311d-libretech-cc.dtb
266 11:01:18.926908 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 11:01:18.927304 - bootm 0x01080000 0x08000000 0x01070000
268 11:01:18.927813 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 11:01:18.929407 start: 2.3 connect-device (timeout 00:05:00) [common]
271 11:01:18.929874 [common] connect-device Connecting to device using 'telnet conserv1 3007'
272 11:01:18.944861 Setting prompt string to ['lava-test: # ']
273 11:01:18.946341 end: 2.3 connect-device (duration 00:00:00) [common]
274 11:01:18.946944 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 11:01:18.947519 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 11:01:18.948116 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 11:01:18.949409 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
278 11:01:18.985864 >> OK - accepted request
279 11:01:18.988331 Returned 0 in 0 seconds
280 11:01:19.089540 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 11:01:19.091167 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 11:01:19.091737 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 11:01:19.092317 Setting prompt string to ['Hit any key to stop autoboot']
285 11:01:19.092771 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 11:01:19.094337 Trying 192.168.56.21...
287 11:01:19.094826 Connected to conserv1.
288 11:01:19.095231 Escape character is '^]'.
289 11:01:19.095643
290 11:01:19.096092 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 11:01:19.096528
292 11:01:29.921914 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
293 11:01:29.922563 bl2_stage_init 0x01
294 11:01:29.922990 bl2_stage_init 0x81
295 11:01:29.927323 hw id: 0x0000 - pwm id 0x01
296 11:01:29.927807 bl2_stage_init 0xc1
297 11:01:29.928266 bl2_stage_init 0x02
298 11:01:29.928681
299 11:01:29.932978 L0:00000000
300 11:01:29.933431 L1:20000703
301 11:01:29.933832 L2:00008067
302 11:01:29.934220 L3:14000000
303 11:01:29.938464 B2:00402000
304 11:01:29.938903 B1:e0f83180
305 11:01:29.939296
306 11:01:29.939687 TE: 58124
307 11:01:29.940110
308 11:01:29.944265 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
309 11:01:29.944701
310 11:01:29.945095 Board ID = 1
311 11:01:29.949687 Set A53 clk to 24M
312 11:01:29.950111 Set A73 clk to 24M
313 11:01:29.950497 Set clk81 to 24M
314 11:01:29.955339 A53 clk: 1200 MHz
315 11:01:29.955765 A73 clk: 1200 MHz
316 11:01:29.956191 CLK81: 166.6M
317 11:01:29.956580 smccc: 00012a91
318 11:01:29.960982 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
319 11:01:29.966540 board id: 1
320 11:01:29.971521 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 11:01:29.983177 fw parse done
322 11:01:29.988963 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 11:01:30.031602 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 11:01:30.042457 PIEI prepare done
325 11:01:30.042921 fastboot data load
326 11:01:30.043325 fastboot data verify
327 11:01:30.048180 verify result: 266
328 11:01:30.053730 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
329 11:01:30.054167 LPDDR4 probe
330 11:01:30.054556 ddr clk to 1584MHz
331 11:01:30.061848 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 11:01:30.099129
333 11:01:30.099654 dmc_version 0001
334 11:01:30.105771 Check phy result
335 11:01:30.111636 INFO : End of CA training
336 11:01:30.112106 INFO : End of initialization
337 11:01:30.117144 INFO : Training has run successfully!
338 11:01:30.117574 Check phy result
339 11:01:30.122731 INFO : End of initialization
340 11:01:30.123160 INFO : End of read enable training
341 11:01:30.128393 INFO : End of fine write leveling
342 11:01:30.133978 INFO : End of Write leveling coarse delay
343 11:01:30.134407 INFO : Training has run successfully!
344 11:01:30.134810 Check phy result
345 11:01:30.139528 INFO : End of initialization
346 11:01:30.139957 INFO : End of read dq deskew training
347 11:01:30.145174 INFO : End of MPR read delay center optimization
348 11:01:30.150718 INFO : End of write delay center optimization
349 11:01:30.156414 INFO : End of read delay center optimization
350 11:01:30.156868 INFO : End of max read latency training
351 11:01:30.161981 INFO : Training has run successfully!
352 11:01:30.162407 1D training succeed
353 11:01:30.171217 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 11:01:30.218740 Check phy result
355 11:01:30.219244 INFO : End of initialization
356 11:01:30.240490 INFO : End of 2D read delay Voltage center optimization
357 11:01:30.260716 INFO : End of 2D read delay Voltage center optimization
358 11:01:30.312775 INFO : End of 2D write delay Voltage center optimization
359 11:01:30.362089 INFO : End of 2D write delay Voltage center optimization
360 11:01:30.367737 INFO : Training has run successfully!
361 11:01:30.368227
362 11:01:30.368644 channel==0
363 11:01:30.373319 RxClkDly_Margin_A0==88 ps 9
364 11:01:30.373764 TxDqDly_Margin_A0==98 ps 10
365 11:01:30.376627 RxClkDly_Margin_A1==78 ps 8
366 11:01:30.377087 TxDqDly_Margin_A1==88 ps 9
367 11:01:30.382170 TrainedVREFDQ_A0==74
368 11:01:30.382600 TrainedVREFDQ_A1==74
369 11:01:30.383006 VrefDac_Margin_A0==25
370 11:01:30.387810 DeviceVref_Margin_A0==40
371 11:01:30.388270 VrefDac_Margin_A1==25
372 11:01:30.393374 DeviceVref_Margin_A1==40
373 11:01:30.393800
374 11:01:30.394205
375 11:01:30.394604 channel==1
376 11:01:30.394997 RxClkDly_Margin_A0==98 ps 10
377 11:01:30.396792 TxDqDly_Margin_A0==98 ps 10
378 11:01:30.402463 RxClkDly_Margin_A1==98 ps 10
379 11:01:30.402887 TxDqDly_Margin_A1==88 ps 9
380 11:01:30.403291 TrainedVREFDQ_A0==77
381 11:01:30.408093 TrainedVREFDQ_A1==77
382 11:01:30.408522 VrefDac_Margin_A0==22
383 11:01:30.413652 DeviceVref_Margin_A0==37
384 11:01:30.414078 VrefDac_Margin_A1==22
385 11:01:30.414477 DeviceVref_Margin_A1==37
386 11:01:30.414873
387 11:01:30.419201 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 11:01:30.419697
389 11:01:30.452802 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 0000005f
390 11:01:30.453359 2D training succeed
391 11:01:30.458396 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 11:01:30.464048 auto size-- 65535DDR cs0 size: 2048MB
393 11:01:30.464483 DDR cs1 size: 2048MB
394 11:01:30.469592 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 11:01:30.470025 cs0 DataBus test pass
396 11:01:30.470429 cs1 DataBus test pass
397 11:01:30.475201 cs0 AddrBus test pass
398 11:01:30.475631 cs1 AddrBus test pass
399 11:01:30.476075
400 11:01:30.480812 100bdlr_step_size ps== 420
401 11:01:30.481253 result report
402 11:01:30.481653 boot times 0Enable ddr reg access
403 11:01:30.490609 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 11:01:30.504143 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
405 11:01:31.077310 0.0;M3 CHK:0;cm4_sp_mode 0
406 11:01:31.077910 MVN_1=0x00000000
407 11:01:31.082722 MVN_2=0x00000000
408 11:01:31.088415 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
409 11:01:31.088851 OPS=0x10
410 11:01:31.089259 ring efuse init
411 11:01:31.089654 chipver efuse init
412 11:01:31.096712 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
413 11:01:31.097153 [0.018960 Inits done]
414 11:01:31.097555 secure task start!
415 11:01:31.104261 high task start!
416 11:01:31.104692 low task start!
417 11:01:31.105095 run into bl31
418 11:01:31.110950 NOTICE: BL31: v1.3(release):4fc40b1
419 11:01:31.118726 NOTICE: BL31: Built : 15:58:17, May 22 2019
420 11:01:31.119167 NOTICE: BL31: G12A normal boot!
421 11:01:31.144159 NOTICE: BL31: BL33 decompress pass
422 11:01:31.149752 ERROR: Error initializing runtime service opteed_fast
423 11:01:32.382733
424 11:01:32.383355
425 11:01:32.391164 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
426 11:01:32.391657
427 11:01:32.392112 Model: Libre Computer AML-A311D-CC Alta
428 11:01:32.599630 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
429 11:01:32.622972 DRAM: 2 GiB (effective 3.8 GiB)
430 11:01:32.765779 Core: 408 devices, 31 uclasses, devicetree: separate
431 11:01:32.771757 WDT: Not starting watchdog@f0d0
432 11:01:32.804165 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
433 11:01:32.816408 Loading Environment from FAT... Card did not respond to voltage select! : -110
434 11:01:32.821461 ** Bad device specification mmc 0 **
435 11:01:32.831806 Card did not respond to voltage select! : -110
436 11:01:32.839408 ** Bad device specification mmc 0 **
437 11:01:32.839854 Couldn't find partition mmc 0
438 11:01:32.847711 Card did not respond to voltage select! : -110
439 11:01:32.853339 ** Bad device specification mmc 0 **
440 11:01:32.853787 Couldn't find partition mmc 0
441 11:01:32.858731 Error: could not access storage.
442 11:01:34.122198 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
443 11:01:34.122825 bl2_stage_init 0x01
444 11:01:34.123268 bl2_stage_init 0x81
445 11:01:34.127749 hw id: 0x0000 - pwm id 0x01
446 11:01:34.128300 bl2_stage_init 0xc1
447 11:01:34.128758 bl2_stage_init 0x02
448 11:01:34.129164
449 11:01:34.133404 L0:00000000
450 11:01:34.133918 L1:20000703
451 11:01:34.134335 L2:00008067
452 11:01:34.134736 L3:14000000
453 11:01:34.138835 B2:00402000
454 11:01:34.139291 B1:e0f83180
455 11:01:34.139699
456 11:01:34.140145 TE: 58124
457 11:01:34.140561
458 11:01:34.144564 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
459 11:01:34.145066
460 11:01:34.145482 Board ID = 1
461 11:01:34.150169 Set A53 clk to 24M
462 11:01:34.150657 Set A73 clk to 24M
463 11:01:34.151081 Set clk81 to 24M
464 11:01:34.155775 A53 clk: 1200 MHz
465 11:01:34.156275 A73 clk: 1200 MHz
466 11:01:34.156692 CLK81: 166.6M
467 11:01:34.157096 smccc: 00012a92
468 11:01:34.161254 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
469 11:01:34.166881 board id: 1
470 11:01:34.172782 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
471 11:01:34.183495 fw parse done
472 11:01:34.189315 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
473 11:01:34.232042 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
474 11:01:34.242955 PIEI prepare done
475 11:01:34.243423 fastboot data load
476 11:01:34.243841 fastboot data verify
477 11:01:34.248658 verify result: 266
478 11:01:34.254318 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
479 11:01:34.254803 LPDDR4 probe
480 11:01:34.255225 ddr clk to 1584MHz
481 11:01:34.262461 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
482 11:01:34.299535
483 11:01:34.300172 dmc_version 0001
484 11:01:34.306156 Check phy result
485 11:01:34.312073 INFO : End of CA training
486 11:01:34.312604 INFO : End of initialization
487 11:01:34.317690 INFO : Training has run successfully!
488 11:01:34.318384 Check phy result
489 11:01:34.323214 INFO : End of initialization
490 11:01:34.323754 INFO : End of read enable training
491 11:01:34.328789 INFO : End of fine write leveling
492 11:01:34.334388 INFO : End of Write leveling coarse delay
493 11:01:34.334910 INFO : Training has run successfully!
494 11:01:34.335338 Check phy result
495 11:01:34.340066 INFO : End of initialization
496 11:01:34.340599 INFO : End of read dq deskew training
497 11:01:34.345641 INFO : End of MPR read delay center optimization
498 11:01:34.351223 INFO : End of write delay center optimization
499 11:01:34.356796 INFO : End of read delay center optimization
500 11:01:34.357327 INFO : End of max read latency training
501 11:01:34.362450 INFO : Training has run successfully!
502 11:01:34.363156 1D training succeed
503 11:01:34.371729 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
504 11:01:34.419230 Check phy result
505 11:01:34.419799 INFO : End of initialization
506 11:01:34.440825 INFO : End of 2D read delay Voltage center optimization
507 11:01:34.460996 INFO : End of 2D read delay Voltage center optimization
508 11:01:34.512954 INFO : End of 2D write delay Voltage center optimization
509 11:01:34.562175 INFO : End of 2D write delay Voltage center optimization
510 11:01:34.567819 INFO : Training has run successfully!
511 11:01:34.568415
512 11:01:34.568852 channel==0
513 11:01:34.573391 RxClkDly_Margin_A0==88 ps 9
514 11:01:34.573923 TxDqDly_Margin_A0==98 ps 10
515 11:01:34.578822 RxClkDly_Margin_A1==88 ps 9
516 11:01:34.579358 TxDqDly_Margin_A1==98 ps 10
517 11:01:34.579793 TrainedVREFDQ_A0==74
518 11:01:34.584478 TrainedVREFDQ_A1==74
519 11:01:34.585004 VrefDac_Margin_A0==25
520 11:01:34.585428 DeviceVref_Margin_A0==40
521 11:01:34.590038 VrefDac_Margin_A1==25
522 11:01:34.590543 DeviceVref_Margin_A1==40
523 11:01:34.590994
524 11:01:34.591436
525 11:01:34.595715 channel==1
526 11:01:34.596270 RxClkDly_Margin_A0==98 ps 10
527 11:01:34.596728 TxDqDly_Margin_A0==88 ps 9
528 11:01:34.601210 RxClkDly_Margin_A1==88 ps 9
529 11:01:34.601718 TxDqDly_Margin_A1==88 ps 9
530 11:01:34.606795 TrainedVREFDQ_A0==77
531 11:01:34.607325 TrainedVREFDQ_A1==77
532 11:01:34.607755 VrefDac_Margin_A0==22
533 11:01:34.612582 DeviceVref_Margin_A0==37
534 11:01:34.613097 VrefDac_Margin_A1==24
535 11:01:34.618020 DeviceVref_Margin_A1==37
536 11:01:34.618535
537 11:01:34.618958 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
538 11:01:34.619369
539 11:01:34.651775 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
540 11:01:34.652405 2D training succeed
541 11:01:34.657280 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
542 11:01:34.662687 auto size-- 65535DDR cs0 size: 2048MB
543 11:01:34.663200 DDR cs1 size: 2048MB
544 11:01:34.668383 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
545 11:01:34.668896 cs0 DataBus test pass
546 11:01:34.673890 cs1 DataBus test pass
547 11:01:34.674431 cs0 AddrBus test pass
548 11:01:34.674845 cs1 AddrBus test pass
549 11:01:34.675254
550 11:01:34.679611 100bdlr_step_size ps== 420
551 11:01:34.680153 result report
552 11:01:34.685093 boot times 0Enable ddr reg access
553 11:01:34.690333 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
554 11:01:34.703800 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
555 11:01:35.275844 0.0;M3 CHK:0;cm4_sp_mode 0
556 11:01:35.276565 MVN_1=0x00000000
557 11:01:35.281319 MVN_2=0x00000000
558 11:01:35.287058 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
559 11:01:35.287575 OPS=0x10
560 11:01:35.288023 ring efuse init
561 11:01:35.288451 chipver efuse init
562 11:01:35.292807 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
563 11:01:35.298390 [0.018961 Inits done]
564 11:01:35.298929 secure task start!
565 11:01:35.299371 high task start!
566 11:01:35.302974 low task start!
567 11:01:35.303503 run into bl31
568 11:01:35.309779 NOTICE: BL31: v1.3(release):4fc40b1
569 11:01:35.316464 NOTICE: BL31: Built : 15:58:17, May 22 2019
570 11:01:35.317007 NOTICE: BL31: G12A normal boot!
571 11:01:35.342823 NOTICE: BL31: BL33 decompress pass
572 11:01:35.348450 ERROR: Error initializing runtime service opteed_fast
573 11:01:36.581338
574 11:01:36.581982
575 11:01:36.589794 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
576 11:01:36.590345
577 11:01:36.590807 Model: Libre Computer AML-A311D-CC Alta
578 11:01:36.798160 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
579 11:01:36.821512 DRAM: 2 GiB (effective 3.8 GiB)
580 11:01:36.964528 Core: 408 devices, 31 uclasses, devicetree: separate
581 11:01:36.970379 WDT: Not starting watchdog@f0d0
582 11:01:37.002642 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
583 11:01:37.015056 Loading Environment from FAT... Card did not respond to voltage select! : -110
584 11:01:37.020100 ** Bad device specification mmc 0 **
585 11:01:37.030397 Card did not respond to voltage select! : -110
586 11:01:37.038074 ** Bad device specification mmc 0 **
587 11:01:37.038607 Couldn't find partition mmc 0
588 11:01:37.046386 Card did not respond to voltage select! : -110
589 11:01:37.052015 ** Bad device specification mmc 0 **
590 11:01:37.052553 Couldn't find partition mmc 0
591 11:01:37.057052 Error: could not access storage.
592 11:01:37.400539 Net: eth0: ethernet@ff3f0000
593 11:01:37.401210 starting USB...
594 11:01:37.652321 Bus usb@ff500000: Register 3000140 NbrPorts 3
595 11:01:37.652906 Starting the controller
596 11:01:37.659254 USB XHCI 1.10
597 11:01:39.372201 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
598 11:01:39.372622 bl2_stage_init 0x01
599 11:01:39.372845 bl2_stage_init 0x81
600 11:01:39.377682 hw id: 0x0000 - pwm id 0x01
601 11:01:39.378090 bl2_stage_init 0xc1
602 11:01:39.378406 bl2_stage_init 0x02
603 11:01:39.378715
604 11:01:39.383268 L0:00000000
605 11:01:39.383641 L1:20000703
606 11:01:39.383877 L2:00008067
607 11:01:39.384124 L3:14000000
608 11:01:39.388868 B2:00402000
609 11:01:39.389260 B1:e0f83180
610 11:01:39.389573
611 11:01:39.389882 TE: 58124
612 11:01:39.390187
613 11:01:39.394494 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
614 11:01:39.394874
615 11:01:39.395111 Board ID = 1
616 11:01:39.400145 Set A53 clk to 24M
617 11:01:39.400430 Set A73 clk to 24M
618 11:01:39.400640 Set clk81 to 24M
619 11:01:39.405660 A53 clk: 1200 MHz
620 11:01:39.406035 A73 clk: 1200 MHz
621 11:01:39.406345 CLK81: 166.6M
622 11:01:39.406647 smccc: 00012a91
623 11:01:39.411259 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
624 11:01:39.416924 board id: 1
625 11:01:39.422763 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
626 11:01:39.433460 fw parse done
627 11:01:39.440239 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
628 11:01:39.482200 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
629 11:01:39.493099 PIEI prepare done
630 11:01:39.493605 fastboot data load
631 11:01:39.494062 fastboot data verify
632 11:01:39.499888 verify result: 266
633 11:01:39.504359 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
634 11:01:39.504864 LPDDR4 probe
635 11:01:39.505316 ddr clk to 1584MHz
636 11:01:39.512435 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
637 11:01:39.549582
638 11:01:39.550117 dmc_version 0001
639 11:01:39.556268 Check phy result
640 11:01:39.562084 INFO : End of CA training
641 11:01:39.562589 INFO : End of initialization
642 11:01:39.567685 INFO : Training has run successfully!
643 11:01:39.568233 Check phy result
644 11:01:39.573444 INFO : End of initialization
645 11:01:39.574003 INFO : End of read enable training
646 11:01:39.578988 INFO : End of fine write leveling
647 11:01:39.584559 INFO : End of Write leveling coarse delay
648 11:01:39.585142 INFO : Training has run successfully!
649 11:01:39.585604 Check phy result
650 11:01:39.590422 INFO : End of initialization
651 11:01:39.590987 INFO : End of read dq deskew training
652 11:01:39.596301 INFO : End of MPR read delay center optimization
653 11:01:39.601453 INFO : End of write delay center optimization
654 11:01:39.607026 INFO : End of read delay center optimization
655 11:01:39.607554 INFO : End of max read latency training
656 11:01:39.612543 INFO : Training has run successfully!
657 11:01:39.613049 1D training succeed
658 11:01:39.621649 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
659 11:01:39.669524 Check phy result
660 11:01:39.670057 INFO : End of initialization
661 11:01:39.691194 INFO : End of 2D read delay Voltage center optimization
662 11:01:39.710717 INFO : End of 2D read delay Voltage center optimization
663 11:01:39.762808 INFO : End of 2D write delay Voltage center optimization
664 11:01:39.811956 INFO : End of 2D write delay Voltage center optimization
665 11:01:39.817495 INFO : Training has run successfully!
666 11:01:39.817997
667 11:01:39.818457 channel==0
668 11:01:39.823081 RxClkDly_Margin_A0==88 ps 9
669 11:01:39.823581 TxDqDly_Margin_A0==98 ps 10
670 11:01:39.826568 RxClkDly_Margin_A1==88 ps 9
671 11:01:39.827063 TxDqDly_Margin_A1==98 ps 10
672 11:01:39.832088 TrainedVREFDQ_A0==74
673 11:01:39.832608 TrainedVREFDQ_A1==74
674 11:01:39.833067 VrefDac_Margin_A0==25
675 11:01:39.837716 DeviceVref_Margin_A0==40
676 11:01:39.838218 VrefDac_Margin_A1==25
677 11:01:39.843246 DeviceVref_Margin_A1==40
678 11:01:39.843748
679 11:01:39.844246
680 11:01:39.844693 channel==1
681 11:01:39.845133 RxClkDly_Margin_A0==88 ps 9
682 11:01:39.848846 TxDqDly_Margin_A0==88 ps 9
683 11:01:39.849355 RxClkDly_Margin_A1==98 ps 10
684 11:01:39.854489 TxDqDly_Margin_A1==88 ps 9
685 11:01:39.854990 TrainedVREFDQ_A0==75
686 11:01:39.855441 TrainedVREFDQ_A1==77
687 11:01:39.860089 VrefDac_Margin_A0==23
688 11:01:39.860592 DeviceVref_Margin_A0==39
689 11:01:39.865726 VrefDac_Margin_A1==23
690 11:01:39.866227 DeviceVref_Margin_A1==37
691 11:01:39.866676
692 11:01:39.871191 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
693 11:01:39.871690
694 11:01:39.899155 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000019 00000019 00000019 00000018 00000017 00000019 00000018 00000019 00000018 00000018 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 0000005f
695 11:01:39.904790 2D training succeed
696 11:01:39.910394 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
697 11:01:39.910907 auto size-- 65535DDR cs0 size: 2048MB
698 11:01:39.916014 DDR cs1 size: 2048MB
699 11:01:39.916526 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
700 11:01:39.921584 cs0 DataBus test pass
701 11:01:39.922089 cs1 DataBus test pass
702 11:01:39.922539 cs0 AddrBus test pass
703 11:01:39.927178 cs1 AddrBus test pass
704 11:01:39.927676
705 11:01:39.928161 100bdlr_step_size ps== 420
706 11:01:39.928615 result report
707 11:01:39.932764 boot times 0Enable ddr reg access
708 11:01:39.940267 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
709 11:01:39.953696 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
710 11:01:40.527504 0.0;M3 CHK:0;cm4_sp_mode 0
711 11:01:40.528180 MVN_1=0x00000000
712 11:01:40.532898 MVN_2=0x00000000
713 11:01:40.538680 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
714 11:01:40.539239 OPS=0x10
715 11:01:40.539686 ring efuse init
716 11:01:40.540155 chipver efuse init
717 11:01:40.544243 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
718 11:01:40.549826 [0.018961 Inits done]
719 11:01:40.550330 secure task start!
720 11:01:40.550763 high task start!
721 11:01:40.554475 low task start!
722 11:01:40.554977 run into bl31
723 11:01:40.561121 NOTICE: BL31: v1.3(release):4fc40b1
724 11:01:40.568841 NOTICE: BL31: Built : 15:58:17, May 22 2019
725 11:01:40.569340 NOTICE: BL31: G12A normal boot!
726 11:01:40.594823 NOTICE: BL31: BL33 decompress pass
727 11:01:40.600528 ERROR: Error initializing runtime service opteed_fast
728 11:01:41.833363
729 11:01:41.834029
730 11:01:41.841756 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
731 11:01:41.842284
732 11:01:41.842754 Model: Libre Computer AML-A311D-CC Alta
733 11:01:42.050075 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
734 11:01:42.073647 DRAM: 2 GiB (effective 3.8 GiB)
735 11:01:42.216587 Core: 408 devices, 31 uclasses, devicetree: separate
736 11:01:42.222298 WDT: Not starting watchdog@f0d0
737 11:01:42.254551 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
738 11:01:42.266992 Loading Environment from FAT... Card did not respond to voltage select! : -110
739 11:01:42.271971 ** Bad device specification mmc 0 **
740 11:01:42.282314 Card did not respond to voltage select! : -110
741 11:01:42.289981 ** Bad device specification mmc 0 **
742 11:01:42.290269 Couldn't find partition mmc 0
743 11:01:42.298300 Card did not respond to voltage select! : -110
744 11:01:42.303823 ** Bad device specification mmc 0 **
745 11:01:42.304128 Couldn't find partition mmc 0
746 11:01:42.308958 Error: could not access storage.
747 11:01:42.652612 Net: eth0: ethernet@ff3f0000
748 11:01:42.653280 starting USB...
749 11:01:42.904390 Bus usb@ff500000: Register 3000140 NbrPorts 3
750 11:01:42.905032 Starting the controller
751 11:01:42.911370 USB XHCI 1.10
752 11:01:45.072684 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
753 11:01:45.073360 bl2_stage_init 0x81
754 11:01:45.078329 hw id: 0x0000 - pwm id 0x01
755 11:01:45.078859 bl2_stage_init 0xc1
756 11:01:45.079326 bl2_stage_init 0x02
757 11:01:45.079779
758 11:01:45.083893 L0:00000000
759 11:01:45.084436 L1:20000703
760 11:01:45.084890 L2:00008067
761 11:01:45.085330 L3:14000000
762 11:01:45.085765 B2:00402000
763 11:01:45.086637 B1:e0f83180
764 11:01:45.087160
765 11:01:45.087633 TE: 58150
766 11:01:45.088253
767 11:01:45.097669 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
768 11:01:45.098140
769 11:01:45.098573 Board ID = 1
770 11:01:45.098989 Set A53 clk to 24M
771 11:01:45.099394 Set A73 clk to 24M
772 11:01:45.103323 Set clk81 to 24M
773 11:01:45.103767 A53 clk: 1200 MHz
774 11:01:45.104213 A73 clk: 1200 MHz
775 11:01:45.108901 CLK81: 166.6M
776 11:01:45.109348 smccc: 00012aac
777 11:01:45.114454 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
778 11:01:45.114901 board id: 1
779 11:01:45.123033 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
780 11:01:45.133683 fw parse done
781 11:01:45.139623 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
782 11:01:45.182469 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
783 11:01:45.192988 PIEI prepare done
784 11:01:45.193474 fastboot data load
785 11:01:45.193903 fastboot data verify
786 11:01:45.198617 verify result: 266
787 11:01:45.204279 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
788 11:01:45.204769 LPDDR4 probe
789 11:01:45.205187 ddr clk to 1584MHz
790 11:01:45.212246 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
791 11:01:45.249508
792 11:01:45.250039 dmc_version 0001
793 11:01:45.256226 Check phy result
794 11:01:45.262000 INFO : End of CA training
795 11:01:45.262487 INFO : End of initialization
796 11:01:45.267614 INFO : Training has run successfully!
797 11:01:45.268127 Check phy result
798 11:01:45.273225 INFO : End of initialization
799 11:01:45.273700 INFO : End of read enable training
800 11:01:45.278802 INFO : End of fine write leveling
801 11:01:45.284401 INFO : End of Write leveling coarse delay
802 11:01:45.284871 INFO : Training has run successfully!
803 11:01:45.285283 Check phy result
804 11:01:45.290001 INFO : End of initialization
805 11:01:45.290472 INFO : End of read dq deskew training
806 11:01:45.295617 INFO : End of MPR read delay center optimization
807 11:01:45.301192 INFO : End of write delay center optimization
808 11:01:45.306799 INFO : End of read delay center optimization
809 11:01:45.307273 INFO : End of max read latency training
810 11:01:45.312554 INFO : Training has run successfully!
811 11:01:45.313050 1D training succeed
812 11:01:45.321638 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
813 11:01:45.369183 Check phy result
814 11:01:45.369726 INFO : End of initialization
815 11:01:45.390795 INFO : End of 2D read delay Voltage center optimization
816 11:01:45.410916 INFO : End of 2D read delay Voltage center optimization
817 11:01:45.462812 INFO : End of 2D write delay Voltage center optimization
818 11:01:45.512134 INFO : End of 2D write delay Voltage center optimization
819 11:01:45.517579 INFO : Training has run successfully!
820 11:01:45.518053
821 11:01:45.518478 channel==0
822 11:01:45.523176 RxClkDly_Margin_A0==88 ps 9
823 11:01:45.523649 TxDqDly_Margin_A0==98 ps 10
824 11:01:45.528775 RxClkDly_Margin_A1==88 ps 9
825 11:01:45.529257 TxDqDly_Margin_A1==98 ps 10
826 11:01:45.529698 TrainedVREFDQ_A0==74
827 11:01:45.534436 TrainedVREFDQ_A1==74
828 11:01:45.534988 VrefDac_Margin_A0==25
829 11:01:45.535416 DeviceVref_Margin_A0==40
830 11:01:45.540123 VrefDac_Margin_A1==25
831 11:01:45.540651 DeviceVref_Margin_A1==40
832 11:01:45.541046
833 11:01:45.541434
834 11:01:45.545617 channel==1
835 11:01:45.546066 RxClkDly_Margin_A0==98 ps 10
836 11:01:45.546455 TxDqDly_Margin_A0==98 ps 10
837 11:01:45.551189 RxClkDly_Margin_A1==98 ps 10
838 11:01:45.551640 TxDqDly_Margin_A1==88 ps 9
839 11:01:45.556776 TrainedVREFDQ_A0==77
840 11:01:45.557243 TrainedVREFDQ_A1==77
841 11:01:45.557636 VrefDac_Margin_A0==22
842 11:01:45.562513 DeviceVref_Margin_A0==37
843 11:01:45.562954 VrefDac_Margin_A1==24
844 11:01:45.568075 DeviceVref_Margin_A1==37
845 11:01:45.568524
846 11:01:45.568918 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
847 11:01:45.573567
848 11:01:45.601615 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
849 11:01:45.602130 2D training succeed
850 11:01:45.607177 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
851 11:01:45.612776 auto size-- 65535DDR cs0 size: 2048MB
852 11:01:45.613221 DDR cs1 size: 2048MB
853 11:01:45.618359 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
854 11:01:45.618801 cs0 DataBus test pass
855 11:01:45.624054 cs1 DataBus test pass
856 11:01:45.624515 cs0 AddrBus test pass
857 11:01:45.624946 cs1 AddrBus test pass
858 11:01:45.625357
859 11:01:45.629577 100bdlr_step_size ps== 420
860 11:01:45.630048 result report
861 11:01:45.635158 boot times 0Enable ddr reg access
862 11:01:45.639649 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
863 11:01:45.654090 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
864 11:01:46.226098 0.0;M3 CHK:0;cm4_sp_mode 0
865 11:01:46.226815 MVN_1=0x00000000
866 11:01:46.231601 MVN_2=0x00000000
867 11:01:46.237435 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
868 11:01:46.238057 OPS=0x10
869 11:01:46.238492 ring efuse init
870 11:01:46.238898 chipver efuse init
871 11:01:46.245689 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
872 11:01:46.246211 [0.018961 Inits done]
873 11:01:46.246627 secure task start!
874 11:01:46.252262 high task start!
875 11:01:46.252765 low task start!
876 11:01:46.253180 run into bl31
877 11:01:46.259879 NOTICE: BL31: v1.3(release):4fc40b1
878 11:01:46.267573 NOTICE: BL31: Built : 15:58:17, May 22 2019
879 11:01:46.268079 NOTICE: BL31: G12A normal boot!
880 11:01:46.293151 NOTICE: BL31: BL33 decompress pass
881 11:01:46.298619 ERROR: Error initializing runtime service opteed_fast
882 11:01:47.531688
883 11:01:47.532404
884 11:01:47.540145 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
885 11:01:47.540717
886 11:01:47.541186 Model: Libre Computer AML-A311D-CC Alta
887 11:01:47.748611 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
888 11:01:47.771964 DRAM: 2 GiB (effective 3.8 GiB)
889 11:01:47.914898 Core: 408 devices, 31 uclasses, devicetree: separate
890 11:01:47.920808 WDT: Not starting watchdog@f0d0
891 11:01:47.953025 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
892 11:01:47.965479 Loading Environment from FAT... Card did not respond to voltage select! : -110
893 11:01:47.970531 ** Bad device specification mmc 0 **
894 11:01:47.980868 Card did not respond to voltage select! : -110
895 11:01:47.988615 ** Bad device specification mmc 0 **
896 11:01:47.989174 Couldn't find partition mmc 0
897 11:01:47.996828 Card did not respond to voltage select! : -110
898 11:01:48.002331 ** Bad device specification mmc 0 **
899 11:01:48.002878 Couldn't find partition mmc 0
900 11:01:48.007390 Error: could not access storage.
901 11:01:48.350883 Net: eth0: ethernet@ff3f0000
902 11:01:48.351303 starting USB...
903 11:01:48.602586 Bus usb@ff500000: Register 3000140 NbrPorts 3
904 11:01:48.602968 Starting the controller
905 11:01:48.608681 USB XHCI 1.10
906 11:01:50.163691 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
907 11:01:50.171129 scanning usb for storage devices... 0 Storage Device(s) found
909 11:01:50.222883 Hit any key to stop autoboot: 1
910 11:01:50.224198 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
911 11:01:50.224907 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
912 11:01:50.225443 Setting prompt string to ['=>']
913 11:01:50.225987 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
914 11:01:50.238915 0
915 11:01:50.239910 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
916 11:01:50.240504 Sending with 10 millisecond of delay
918 11:01:51.375806 => setenv autoload no
919 11:01:51.386534 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:28)
920 11:01:51.389562 setenv autoload no
921 11:01:51.390176 Sending with 10 millisecond of delay
923 11:01:53.188209 => setenv initrd_high 0xffffffff
924 11:01:53.198973 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
925 11:01:53.199792 setenv initrd_high 0xffffffff
926 11:01:53.200534 Sending with 10 millisecond of delay
928 11:01:54.817271 => setenv fdt_high 0xffffffff
929 11:01:54.828064 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
930 11:01:54.828886 setenv fdt_high 0xffffffff
931 11:01:54.829590 Sending with 10 millisecond of delay
933 11:01:55.121410 => dhcp
934 11:01:55.132013 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
935 11:01:55.132570 dhcp
936 11:01:55.132819 Speed: 1000, full duplex
937 11:01:55.133024 BOOTP broadcast 1
938 11:01:55.379254 BOOTP broadcast 2
939 11:01:55.523019 DHCP client bound to address 192.168.6.33 (391 ms)
940 11:01:55.523931 Sending with 10 millisecond of delay
942 11:01:57.201340 => setenv serverip 192.168.6.2
943 11:01:57.212512 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
944 11:01:57.213870 setenv serverip 192.168.6.2
945 11:01:57.214847 Sending with 10 millisecond of delay
947 11:02:00.946135 => tftpboot 0x01080000 715651/tftp-deploy-q9j6voiw/kernel/uImage
948 11:02:00.957124 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
949 11:02:00.958169 tftpboot 0x01080000 715651/tftp-deploy-q9j6voiw/kernel/uImage
950 11:02:00.958737 Speed: 1000, full duplex
951 11:02:00.959272 Using ethernet@ff3f0000 device
952 11:02:00.959897 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
953 11:02:00.965454 Filename '715651/tftp-deploy-q9j6voiw/kernel/uImage'.
954 11:02:00.969304 Load address: 0x1080000
955 11:02:03.759166 Loading: *################################################## 43.8 MiB
956 11:02:03.759959 15.7 MiB/s
957 11:02:03.760681 done
958 11:02:03.763610 Bytes transferred = 45961792 (2bd5240 hex)
959 11:02:03.764612 Sending with 10 millisecond of delay
961 11:02:08.452203 => tftpboot 0x08000000 715651/tftp-deploy-q9j6voiw/ramdisk/ramdisk.cpio.gz.uboot
962 11:02:08.463228 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
963 11:02:08.463825 tftpboot 0x08000000 715651/tftp-deploy-q9j6voiw/ramdisk/ramdisk.cpio.gz.uboot
964 11:02:08.464117 Speed: 1000, full duplex
965 11:02:08.464396 Using ethernet@ff3f0000 device
966 11:02:08.465886 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
967 11:02:08.474114 Filename '715651/tftp-deploy-q9j6voiw/ramdisk/ramdisk.cpio.gz.uboot'.
968 11:02:08.474443 Load address: 0x8000000
969 11:02:15.657015 Loading: *###################T ############################### 24.7 MiB
970 11:02:15.657629 3.4 MiB/s
971 11:02:15.658046 done
972 11:02:15.661006 Bytes transferred = 25933490 (18bb6b2 hex)
973 11:02:15.661723 Sending with 10 millisecond of delay
975 11:02:20.829108 => tftpboot 0x01070000 715651/tftp-deploy-q9j6voiw/dtb/meson-g12b-a311d-libretech-cc.dtb
976 11:02:20.839862 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:03:58)
977 11:02:20.840652 tftpboot 0x01070000 715651/tftp-deploy-q9j6voiw/dtb/meson-g12b-a311d-libretech-cc.dtb
978 11:02:20.841099 Speed: 1000, full duplex
979 11:02:20.841503 Using ethernet@ff3f0000 device
980 11:02:20.844867 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
981 11:02:20.852509 Filename '715651/tftp-deploy-q9j6voiw/dtb/meson-g12b-a311d-libretech-cc.dtb'.
982 11:02:20.863687 Load address: 0x1070000
983 11:02:20.875228 Loading: *################################################## 53.4 KiB
984 11:02:20.875660 3.1 MiB/s
985 11:02:20.876096 done
986 11:02:20.879766 Bytes transferred = 54703 (d5af hex)
987 11:02:20.880466 Sending with 10 millisecond of delay
989 11:02:28.517141 => setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
990 11:02:28.527930 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:03:50)
991 11:02:28.528741 setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
992 11:02:28.529441 Sending with 10 millisecond of delay
994 11:02:30.875190 => bootm 0x01080000 0x08000000 0x01070000
995 11:02:30.885934 Setting prompt string to ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
996 11:02:30.886443 bootloader-commands: Wait for prompt ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:03:48)
997 11:02:30.887416 bootm 0x01080000 0x08000000 0x01070000
998 11:02:30.887864 ## Booting kernel from Legacy Image at 01080000 ...
999 11:02:30.890765 Image Name:
1000 11:02:30.896270 Image Type: AArch64 Linux Kernel Image (uncompressed)
1001 11:02:30.896710 Data Size: 45961728 Bytes = 43.8 MiB
1002 11:02:30.898555 Load Address: 01080000
1003 11:02:30.905150 Entry Point: 01080000
1004 11:02:31.098126 Verifying Checksum ... OK
1005 11:02:31.098651 ## Loading init Ramdisk from Legacy Image at 08000000 ...
1006 11:02:31.103561 Image Name:
1007 11:02:31.109282 Image Type: AArch64 Linux RAMDisk Image (uncompressed)
1008 11:02:31.109716 Data Size: 25933426 Bytes = 24.7 MiB
1009 11:02:31.111345 Load Address: 00000000
1010 11:02:31.118562 Entry Point: 00000000
1011 11:02:31.227403 Verifying Checksum ... OK
1012 11:02:31.227864 ## Flattened Device Tree blob at 01070000
1013 11:02:31.232775 Booting using the fdt blob at 0x1070000
1014 11:02:31.233207 Working FDT set to 1070000
1015 11:02:31.237414 Loading Kernel Image
1016 11:02:31.401227 Loading Ramdisk to 7e744000, end 7ffff672 ... OK
1017 11:02:31.409627 Loading Device Tree to 000000007e733000, end 000000007e7435ae ... OK
1018 11:02:31.410077 Working FDT set to 7e733000
1019 11:02:31.410481
1020 11:02:31.411364 end: 2.4.3 bootloader-commands (duration 00:00:41) [common]
1021 11:02:31.411951 start: 2.4.4 auto-login-action (timeout 00:03:48) [common]
1022 11:02:31.412459 Setting prompt string to ['Linux version [0-9]']
1023 11:02:31.412906 Setting prompt string to ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1024 11:02:31.413363 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:05:00)
1025 11:02:31.414337 Starting kernel ...
1026 11:02:31.414761
1028 11:06:19.413012 end: 2.4.4 auto-login-action (duration 00:03:48) [common]
1031 11:06:19.414890 end: 2.4 uboot-commands (duration 00:05:00) [common]
1033 11:06:19.416270 uboot-action failed: 1 of 1 attempts. 'auto-login-action timed out after 228 seconds'
1035 11:06:19.417235 end: 2 uboot-action (duration 00:05:01) [common]
1037 11:06:19.418669 Cleaning after the job
1038 11:06:19.419173 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715651/tftp-deploy-q9j6voiw/ramdisk
1039 11:06:19.430347 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715651/tftp-deploy-q9j6voiw/kernel
1040 11:06:19.445933 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715651/tftp-deploy-q9j6voiw/dtb
1041 11:06:19.447240 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715651/tftp-deploy-q9j6voiw/modules
1042 11:06:19.456508 start: 4.1 power-off (timeout 00:00:30) [common]
1043 11:06:19.457109 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1044 11:06:19.494612 >> OK - accepted request
1045 11:06:19.497034 Returned 0 in 0 seconds
1046 11:06:19.598095 end: 4.1 power-off (duration 00:00:00) [common]
1048 11:06:19.599767 start: 4.2 read-feedback (timeout 00:10:00) [common]
1049 11:06:19.601173 Listened to connection for namespace 'common' for up to 1s
1050 11:06:20.601750 Finalising connection for namespace 'common'
1051 11:06:20.602459 Disconnecting from shell: Finalise
1052 11:06:20.703495 end: 4.2 read-feedback (duration 00:00:01) [common]
1053 11:06:20.704235 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/715651
1054 11:06:21.018350 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/715651
1055 11:06:21.018982 JobError: Your job cannot terminate cleanly.