Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 10:34:59.910884 lava-dispatcher, installed at version: 2024.01
2 10:34:59.911719 start: 0 validate
3 10:34:59.912214 Start time: 2024-09-06 10:34:59.912185+00:00 (UTC)
4 10:34:59.912768 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 10:34:59.913325 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 10:34:59.952511 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 10:34:59.953115 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240906%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-17%2Fkernel%2FImage exists
8 10:34:59.988798 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 10:34:59.989468 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240906%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-17%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 10:35:00.021492 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 10:35:00.022015 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 10:35:00.055496 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 10:35:00.056076 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240906%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-17%2Fmodules.tar.xz exists
14 10:35:00.097655 validate duration: 0.19
16 10:35:00.098628 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 10:35:00.099024 start: 1.1 download-retry (timeout 00:10:00) [common]
18 10:35:00.099434 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 10:35:00.100346 Not decompressing ramdisk as can be used compressed.
20 10:35:00.100851 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 10:35:00.101169 saving as /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/ramdisk/initrd.cpio.gz
22 10:35:00.101477 total size: 5628182 (5 MB)
23 10:35:00.147001 progress 0 % (0 MB)
24 10:35:00.154540 progress 5 % (0 MB)
25 10:35:00.162766 progress 10 % (0 MB)
26 10:35:00.169551 progress 15 % (0 MB)
27 10:35:00.175456 progress 20 % (1 MB)
28 10:35:00.179240 progress 25 % (1 MB)
29 10:35:00.183305 progress 30 % (1 MB)
30 10:35:00.187309 progress 35 % (1 MB)
31 10:35:00.190958 progress 40 % (2 MB)
32 10:35:00.194989 progress 45 % (2 MB)
33 10:35:00.198642 progress 50 % (2 MB)
34 10:35:00.202718 progress 55 % (2 MB)
35 10:35:00.206785 progress 60 % (3 MB)
36 10:35:00.210444 progress 65 % (3 MB)
37 10:35:00.214521 progress 70 % (3 MB)
38 10:35:00.218154 progress 75 % (4 MB)
39 10:35:00.222198 progress 80 % (4 MB)
40 10:35:00.225751 progress 85 % (4 MB)
41 10:35:00.229496 progress 90 % (4 MB)
42 10:35:00.233341 progress 95 % (5 MB)
43 10:35:00.236673 progress 100 % (5 MB)
44 10:35:00.237336 5 MB downloaded in 0.14 s (39.51 MB/s)
45 10:35:00.237896 end: 1.1.1 http-download (duration 00:00:00) [common]
47 10:35:00.238817 end: 1.1 download-retry (duration 00:00:00) [common]
48 10:35:00.239131 start: 1.2 download-retry (timeout 00:10:00) [common]
49 10:35:00.239422 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 10:35:00.239942 downloading http://storage.kernelci.org/next/master/next-20240906/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-17/kernel/Image
51 10:35:00.240221 saving as /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/kernel/Image
52 10:35:00.240444 total size: 39455232 (37 MB)
53 10:35:00.240662 No compression specified
54 10:35:00.282855 progress 0 % (0 MB)
55 10:35:00.308689 progress 5 % (1 MB)
56 10:35:00.334554 progress 10 % (3 MB)
57 10:35:00.359350 progress 15 % (5 MB)
58 10:35:00.384361 progress 20 % (7 MB)
59 10:35:00.409345 progress 25 % (9 MB)
60 10:35:00.434341 progress 30 % (11 MB)
61 10:35:00.459319 progress 35 % (13 MB)
62 10:35:00.484173 progress 40 % (15 MB)
63 10:35:00.509067 progress 45 % (16 MB)
64 10:35:00.534670 progress 50 % (18 MB)
65 10:35:00.559419 progress 55 % (20 MB)
66 10:35:00.584277 progress 60 % (22 MB)
67 10:35:00.609273 progress 65 % (24 MB)
68 10:35:00.634326 progress 70 % (26 MB)
69 10:35:00.660380 progress 75 % (28 MB)
70 10:35:00.685328 progress 80 % (30 MB)
71 10:35:00.710081 progress 85 % (32 MB)
72 10:35:00.734863 progress 90 % (33 MB)
73 10:35:00.760031 progress 95 % (35 MB)
74 10:35:00.784178 progress 100 % (37 MB)
75 10:35:00.784749 37 MB downloaded in 0.54 s (69.13 MB/s)
76 10:35:00.785242 end: 1.2.1 http-download (duration 00:00:01) [common]
78 10:35:00.786090 end: 1.2 download-retry (duration 00:00:01) [common]
79 10:35:00.786384 start: 1.3 download-retry (timeout 00:09:59) [common]
80 10:35:00.786663 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 10:35:00.787166 downloading http://storage.kernelci.org/next/master/next-20240906/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-17/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 10:35:00.787455 saving as /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/dtb/meson-g12b-a311d-libretech-cc.dtb
83 10:35:00.787675 total size: 54703 (0 MB)
84 10:35:00.787896 No compression specified
85 10:35:00.834451 progress 59 % (0 MB)
86 10:35:00.835348 progress 100 % (0 MB)
87 10:35:00.835961 0 MB downloaded in 0.05 s (1.08 MB/s)
88 10:35:00.836501 end: 1.3.1 http-download (duration 00:00:00) [common]
90 10:35:00.837375 end: 1.3 download-retry (duration 00:00:00) [common]
91 10:35:00.837658 start: 1.4 download-retry (timeout 00:09:59) [common]
92 10:35:00.837944 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 10:35:00.838453 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 10:35:00.838720 saving as /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/nfsrootfs/full.rootfs.tar
95 10:35:00.838941 total size: 107552908 (102 MB)
96 10:35:00.839164 Using unxz to decompress xz
97 10:35:00.876228 progress 0 % (0 MB)
98 10:35:01.530546 progress 5 % (5 MB)
99 10:35:02.258649 progress 10 % (10 MB)
100 10:35:02.987242 progress 15 % (15 MB)
101 10:35:03.753713 progress 20 % (20 MB)
102 10:35:04.327169 progress 25 % (25 MB)
103 10:35:04.948272 progress 30 % (30 MB)
104 10:35:05.684828 progress 35 % (35 MB)
105 10:35:06.029987 progress 40 % (41 MB)
106 10:35:06.453015 progress 45 % (46 MB)
107 10:35:07.153265 progress 50 % (51 MB)
108 10:35:07.846793 progress 55 % (56 MB)
109 10:35:08.601937 progress 60 % (61 MB)
110 10:35:09.357560 progress 65 % (66 MB)
111 10:35:10.092365 progress 70 % (71 MB)
112 10:35:10.866543 progress 75 % (76 MB)
113 10:35:11.549493 progress 80 % (82 MB)
114 10:35:12.263064 progress 85 % (87 MB)
115 10:35:13.008805 progress 90 % (92 MB)
116 10:35:13.728995 progress 95 % (97 MB)
117 10:35:14.471757 progress 100 % (102 MB)
118 10:35:14.483898 102 MB downloaded in 13.64 s (7.52 MB/s)
119 10:35:14.485229 end: 1.4.1 http-download (duration 00:00:14) [common]
121 10:35:14.487022 end: 1.4 download-retry (duration 00:00:14) [common]
122 10:35:14.487590 start: 1.5 download-retry (timeout 00:09:46) [common]
123 10:35:14.488193 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 10:35:14.489049 downloading http://storage.kernelci.org/next/master/next-20240906/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-17/modules.tar.xz
125 10:35:14.489554 saving as /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/modules/modules.tar
126 10:35:14.490008 total size: 11688868 (11 MB)
127 10:35:14.490470 Using unxz to decompress xz
128 10:35:14.539291 progress 0 % (0 MB)
129 10:35:14.608777 progress 5 % (0 MB)
130 10:35:14.687554 progress 10 % (1 MB)
131 10:35:14.776614 progress 15 % (1 MB)
132 10:35:14.861697 progress 20 % (2 MB)
133 10:35:14.949908 progress 25 % (2 MB)
134 10:35:15.045097 progress 30 % (3 MB)
135 10:35:15.125767 progress 35 % (3 MB)
136 10:35:15.208701 progress 40 % (4 MB)
137 10:35:15.286128 progress 45 % (5 MB)
138 10:35:15.366705 progress 50 % (5 MB)
139 10:35:15.443899 progress 55 % (6 MB)
140 10:35:15.528530 progress 60 % (6 MB)
141 10:35:15.610501 progress 65 % (7 MB)
142 10:35:15.693719 progress 70 % (7 MB)
143 10:35:15.787848 progress 75 % (8 MB)
144 10:35:15.884042 progress 80 % (8 MB)
145 10:35:15.965425 progress 85 % (9 MB)
146 10:35:16.042533 progress 90 % (10 MB)
147 10:35:16.116718 progress 95 % (10 MB)
148 10:35:16.194418 progress 100 % (11 MB)
149 10:35:16.207243 11 MB downloaded in 1.72 s (6.49 MB/s)
150 10:35:16.208097 end: 1.5.1 http-download (duration 00:00:02) [common]
152 10:35:16.209951 end: 1.5 download-retry (duration 00:00:02) [common]
153 10:35:16.210546 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 10:35:16.211135 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 10:35:25.975379 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/715567/extract-nfsrootfs-rygiccja
156 10:35:25.976005 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 10:35:25.976302 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 10:35:25.977037 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m
159 10:35:25.977526 makedir: /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin
160 10:35:25.977867 makedir: /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/tests
161 10:35:25.978194 makedir: /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/results
162 10:35:25.978543 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-add-keys
163 10:35:25.979070 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-add-sources
164 10:35:25.979585 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-background-process-start
165 10:35:25.980126 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-background-process-stop
166 10:35:25.980687 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-common-functions
167 10:35:25.981207 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-echo-ipv4
168 10:35:25.981720 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-install-packages
169 10:35:25.982239 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-installed-packages
170 10:35:25.982773 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-os-build
171 10:35:25.983294 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-probe-channel
172 10:35:25.983814 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-probe-ip
173 10:35:25.984350 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-target-ip
174 10:35:25.984848 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-target-mac
175 10:35:25.985365 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-target-storage
176 10:35:25.985891 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-test-case
177 10:35:25.986391 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-test-event
178 10:35:25.986873 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-test-feedback
179 10:35:25.987360 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-test-raise
180 10:35:25.987845 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-test-reference
181 10:35:25.988374 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-test-runner
182 10:35:25.988871 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-test-set
183 10:35:25.989375 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-test-shell
184 10:35:25.989905 Updating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-install-packages (oe)
185 10:35:25.990482 Updating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/bin/lava-installed-packages (oe)
186 10:35:25.990941 Creating /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/environment
187 10:35:25.991326 LAVA metadata
188 10:35:25.991594 - LAVA_JOB_ID=715567
189 10:35:25.991814 - LAVA_DISPATCHER_IP=192.168.6.2
190 10:35:25.992206 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 10:35:25.993172 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 10:35:25.993491 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 10:35:25.993706 skipped lava-vland-overlay
194 10:35:25.993956 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 10:35:25.994217 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 10:35:25.994439 skipped lava-multinode-overlay
197 10:35:25.994687 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 10:35:25.994944 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 10:35:25.995198 Loading test definitions
200 10:35:25.995479 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 10:35:25.995705 Using /lava-715567 at stage 0
202 10:35:25.996919 uuid=715567_1.6.2.4.1 testdef=None
203 10:35:25.997234 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 10:35:25.997503 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 10:35:25.999344 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 10:35:26.000184 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 10:35:26.002476 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 10:35:26.003308 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 10:35:26.005507 runner path: /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/0/tests/0_dmesg test_uuid 715567_1.6.2.4.1
212 10:35:26.006067 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 10:35:26.006837 Creating lava-test-runner.conf files
215 10:35:26.007046 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/715567/lava-overlay-f_ezyy7m/lava-715567/0 for stage 0
216 10:35:26.007386 - 0_dmesg
217 10:35:26.007728 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 10:35:26.008033 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 10:35:26.029675 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 10:35:26.030067 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 10:35:26.030333 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 10:35:26.030603 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 10:35:26.030871 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 10:35:26.645228 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 10:35:26.645703 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 10:35:26.645980 extracting modules file /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/715567/extract-nfsrootfs-rygiccja
227 10:35:28.009765 extracting modules file /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/715567/extract-overlay-ramdisk-ujzge4ld/ramdisk
228 10:35:29.412776 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 10:35:29.413258 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 10:35:29.413539 [common] Applying overlay to NFS
231 10:35:29.413753 [common] Applying overlay /var/lib/lava/dispatcher/tmp/715567/compress-overlay-p1w2miw7/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/715567/extract-nfsrootfs-rygiccja
232 10:35:29.443026 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 10:35:29.443446 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 10:35:29.443721 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 10:35:29.443953 Converting downloaded kernel to a uImage
236 10:35:29.444300 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/kernel/Image /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/kernel/uImage
237 10:35:29.841220 output: Image Name:
238 10:35:29.841662 output: Created: Fri Sep 6 10:35:29 2024
239 10:35:29.841877 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 10:35:29.842086 output: Data Size: 39455232 Bytes = 38530.50 KiB = 37.63 MiB
241 10:35:29.842290 output: Load Address: 01080000
242 10:35:29.842493 output: Entry Point: 01080000
243 10:35:29.842694 output:
244 10:35:29.843042 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 10:35:29.843315 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 10:35:29.843585 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 10:35:29.843841 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 10:35:29.844158 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 10:35:29.844431 Building ramdisk /var/lib/lava/dispatcher/tmp/715567/extract-overlay-ramdisk-ujzge4ld/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/715567/extract-overlay-ramdisk-ujzge4ld/ramdisk
250 10:35:32.350123 >> 172709 blocks
251 10:35:40.844196 Adding RAMdisk u-boot header.
252 10:35:40.844924 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/715567/extract-overlay-ramdisk-ujzge4ld/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/715567/extract-overlay-ramdisk-ujzge4ld/ramdisk.cpio.gz.uboot
253 10:35:41.100918 output: Image Name:
254 10:35:41.101605 output: Created: Fri Sep 6 10:35:40 2024
255 10:35:41.102120 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 10:35:41.102611 output: Data Size: 24035875 Bytes = 23472.53 KiB = 22.92 MiB
257 10:35:41.103114 output: Load Address: 00000000
258 10:35:41.103621 output: Entry Point: 00000000
259 10:35:41.104190 output:
260 10:35:41.105562 rename /var/lib/lava/dispatcher/tmp/715567/extract-overlay-ramdisk-ujzge4ld/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/ramdisk/ramdisk.cpio.gz.uboot
261 10:35:41.106403 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 10:35:41.107074 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 10:35:41.107756 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 10:35:41.108843 No LXC device requested
265 10:35:41.109227 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 10:35:41.109605 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 10:35:41.109947 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 10:35:41.110209 Checking files for TFTP limit of 4294967296 bytes.
269 10:35:41.111856 end: 1 tftp-deploy (duration 00:00:41) [common]
270 10:35:41.112299 start: 2 uboot-action (timeout 00:05:00) [common]
271 10:35:41.112667 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 10:35:41.112985 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 10:35:41.113306 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 10:35:41.113647 Using kernel file from prepare-kernel: 715567/tftp-deploy-ui7n468k/kernel/uImage
275 10:35:41.114076 substitutions:
276 10:35:41.114349 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 10:35:41.114577 - {DTB_ADDR}: 0x01070000
278 10:35:41.114822 - {DTB}: 715567/tftp-deploy-ui7n468k/dtb/meson-g12b-a311d-libretech-cc.dtb
279 10:35:41.115213 - {INITRD}: 715567/tftp-deploy-ui7n468k/ramdisk/ramdisk.cpio.gz.uboot
280 10:35:41.115526 - {KERNEL_ADDR}: 0x01080000
281 10:35:41.115767 - {KERNEL}: 715567/tftp-deploy-ui7n468k/kernel/uImage
282 10:35:41.116041 - {LAVA_MAC}: None
283 10:35:41.116325 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/715567/extract-nfsrootfs-rygiccja
284 10:35:41.116592 - {NFS_SERVER_IP}: 192.168.6.2
285 10:35:41.116817 - {PRESEED_CONFIG}: None
286 10:35:41.117077 - {PRESEED_LOCAL}: None
287 10:35:41.117304 - {RAMDISK_ADDR}: 0x08000000
288 10:35:41.117548 - {RAMDISK}: 715567/tftp-deploy-ui7n468k/ramdisk/ramdisk.cpio.gz.uboot
289 10:35:41.117774 - {ROOT_PART}: None
290 10:35:41.117999 - {ROOT}: None
291 10:35:41.118396 - {SERVER_IP}: 192.168.6.2
292 10:35:41.118705 - {TEE_ADDR}: 0x83000000
293 10:35:41.118963 - {TEE}: None
294 10:35:41.119203 Parsed boot commands:
295 10:35:41.119427 - setenv autoload no
296 10:35:41.119689 - setenv initrd_high 0xffffffff
297 10:35:41.119926 - setenv fdt_high 0xffffffff
298 10:35:41.120204 - dhcp
299 10:35:41.120432 - setenv serverip 192.168.6.2
300 10:35:41.120696 - tftpboot 0x01080000 715567/tftp-deploy-ui7n468k/kernel/uImage
301 10:35:41.120923 - tftpboot 0x08000000 715567/tftp-deploy-ui7n468k/ramdisk/ramdisk.cpio.gz.uboot
302 10:35:41.121172 - tftpboot 0x01070000 715567/tftp-deploy-ui7n468k/dtb/meson-g12b-a311d-libretech-cc.dtb
303 10:35:41.121394 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/715567/extract-nfsrootfs-rygiccja,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 10:35:41.121690 - bootm 0x01080000 0x08000000 0x01070000
305 10:35:41.122018 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 10:35:41.122973 start: 2.3 connect-device (timeout 00:05:00) [common]
308 10:35:41.123284 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 10:35:41.136177 Setting prompt string to ['lava-test: # ']
310 10:35:41.137225 end: 2.3 connect-device (duration 00:00:00) [common]
311 10:35:41.137659 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 10:35:41.138064 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 10:35:41.138452 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 10:35:41.139177 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 10:35:41.184123 >> OK - accepted request
316 10:35:41.186905 Returned 0 in 0 seconds
317 10:35:41.288138 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 10:35:41.289555 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 10:35:41.289981 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 10:35:41.290372 Setting prompt string to ['Hit any key to stop autoboot']
322 10:35:41.290721 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 10:35:41.291929 Trying 192.168.56.21...
324 10:35:41.292315 Connected to conserv1.
325 10:35:41.292609 Escape character is '^]'.
326 10:35:41.292909
327 10:35:41.293219 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 10:35:41.293507
329 10:35:52.792249 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 10:35:52.792763 bl2_stage_init 0x01
331 10:35:52.792997 bl2_stage_init 0x81
332 10:35:52.797909 hw id: 0x0000 - pwm id 0x01
333 10:35:52.798381 bl2_stage_init 0xc1
334 10:35:52.798616 bl2_stage_init 0x02
335 10:35:52.798831
336 10:35:52.803592 L0:00000000
337 10:35:52.804027 L1:20000703
338 10:35:52.804260 L2:00008067
339 10:35:52.804478 L3:14000000
340 10:35:52.808806 B2:00402000
341 10:35:52.809218 B1:e0f83180
342 10:35:52.809451
343 10:35:52.809669 TE: 58167
344 10:35:52.809881
345 10:35:52.814332 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 10:35:52.814757
347 10:35:52.814985 Board ID = 1
348 10:35:52.820151 Set A53 clk to 24M
349 10:35:52.820569 Set A73 clk to 24M
350 10:35:52.820793 Set clk81 to 24M
351 10:35:52.825667 A53 clk: 1200 MHz
352 10:35:52.826452 A73 clk: 1200 MHz
353 10:35:52.827035 CLK81: 166.6M
354 10:35:52.827331 smccc: 00012abe
355 10:35:52.831241 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 10:35:52.836736 board id: 1
357 10:35:52.842714 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 10:35:52.853347 fw parse done
359 10:35:52.859824 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 10:35:52.901978 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 10:35:52.912784 PIEI prepare done
362 10:35:52.913197 fastboot data load
363 10:35:52.913417 fastboot data verify
364 10:35:52.918436 verify result: 266
365 10:35:52.924121 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 10:35:52.924508 LPDDR4 probe
367 10:35:52.924727 ddr clk to 1584MHz
368 10:35:52.932054 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 10:35:52.969440
370 10:35:52.970091 dmc_version 0001
371 10:35:52.976065 Check phy result
372 10:35:52.981862 INFO : End of CA training
373 10:35:52.982287 INFO : End of initialization
374 10:35:52.987553 INFO : Training has run successfully!
375 10:35:52.988154 Check phy result
376 10:35:52.993095 INFO : End of initialization
377 10:35:52.993492 INFO : End of read enable training
378 10:35:52.998634 INFO : End of fine write leveling
379 10:35:53.004458 INFO : End of Write leveling coarse delay
380 10:35:53.005055 INFO : Training has run successfully!
381 10:35:53.005329 Check phy result
382 10:35:53.009856 INFO : End of initialization
383 10:35:53.010290 INFO : End of read dq deskew training
384 10:35:53.015466 INFO : End of MPR read delay center optimization
385 10:35:53.021309 INFO : End of write delay center optimization
386 10:35:53.026775 INFO : End of read delay center optimization
387 10:35:53.027180 INFO : End of max read latency training
388 10:35:53.032663 INFO : Training has run successfully!
389 10:35:53.033530 1D training succeed
390 10:35:53.041554 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 10:35:53.089843 Check phy result
392 10:35:53.090334 INFO : End of initialization
393 10:35:53.110945 INFO : End of 2D read delay Voltage center optimization
394 10:35:53.131078 INFO : End of 2D read delay Voltage center optimization
395 10:35:53.184426 INFO : End of 2D write delay Voltage center optimization
396 10:35:53.241438 INFO : End of 2D write delay Voltage center optimization
397 10:35:53.243630 INFO : Training has run successfully!
398 10:35:53.244259
399 10:35:53.244646 channel==0
400 10:35:53.248180 RxClkDly_Margin_A0==88 ps 9
401 10:35:53.248546 TxDqDly_Margin_A0==98 ps 10
402 10:35:53.249821 RxClkDly_Margin_A1==88 ps 9
403 10:35:53.250259 TxDqDly_Margin_A1==98 ps 10
404 10:35:53.250509 TrainedVREFDQ_A0==74
405 10:35:53.254872 TrainedVREFDQ_A1==74
406 10:35:53.255311 VrefDac_Margin_A0==25
407 10:35:53.255534 DeviceVref_Margin_A0==40
408 10:35:53.260394 VrefDac_Margin_A1==23
409 10:35:53.260836 DeviceVref_Margin_A1==40
410 10:35:53.261078
411 10:35:53.261293
412 10:35:53.266042 channel==1
413 10:35:53.266463 RxClkDly_Margin_A0==98 ps 10
414 10:35:53.266680 TxDqDly_Margin_A0==88 ps 9
415 10:35:53.273146 RxClkDly_Margin_A1==88 ps 9
416 10:35:53.273584 TxDqDly_Margin_A1==88 ps 9
417 10:35:53.277142 TrainedVREFDQ_A0==77
418 10:35:53.277578 TrainedVREFDQ_A1==77
419 10:35:53.277798 VrefDac_Margin_A0==22
420 10:35:53.282770 DeviceVref_Margin_A0==37
421 10:35:53.283173 VrefDac_Margin_A1==24
422 10:35:53.288298 DeviceVref_Margin_A1==37
423 10:35:53.288626
424 10:35:53.288854 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 10:35:53.289075
426 10:35:53.322051 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 10:35:53.322779 2D training succeed
428 10:35:53.327420 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 10:35:53.332947 auto size-- 65535DDR cs0 size: 2048MB
430 10:35:53.333309 DDR cs1 size: 2048MB
431 10:35:53.338694 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 10:35:53.339083 cs0 DataBus test pass
433 10:35:53.344168 cs1 DataBus test pass
434 10:35:53.344512 cs0 AddrBus test pass
435 10:35:53.344735 cs1 AddrBus test pass
436 10:35:53.344946
437 10:35:53.349752 100bdlr_step_size ps== 420
438 10:35:53.350083 result report
439 10:35:53.355343 boot times 0Enable ddr reg access
440 10:35:53.360726 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 10:35:53.374219 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 10:35:53.947966 0.0;M3 CHK:0;cm4_sp_mode 0
443 10:35:53.948438 MVN_1=0x00000000
444 10:35:53.953404 MVN_2=0x00000000
445 10:35:53.959133 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 10:35:53.959636 OPS=0x10
447 10:35:53.959918 ring efuse init
448 10:35:53.960189 chipver efuse init
449 10:35:53.964724 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 10:35:53.970377 [0.018961 Inits done]
451 10:35:53.970736 secure task start!
452 10:35:53.970986 high task start!
453 10:35:53.974886 low task start!
454 10:35:53.975218 run into bl31
455 10:35:53.981541 NOTICE: BL31: v1.3(release):4fc40b1
456 10:35:53.989304 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 10:35:53.989678 NOTICE: BL31: G12A normal boot!
458 10:35:54.014802 NOTICE: BL31: BL33 decompress pass
459 10:35:54.020337 ERROR: Error initializing runtime service opteed_fast
460 10:35:55.253260
461 10:35:55.253729
462 10:35:55.261691 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 10:35:55.262073
464 10:35:55.262328 Model: Libre Computer AML-A311D-CC Alta
465 10:35:55.470207 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 10:35:55.493511 DRAM: 2 GiB (effective 3.8 GiB)
467 10:35:55.636495 Core: 408 devices, 31 uclasses, devicetree: separate
468 10:35:55.642285 WDT: Not starting watchdog@f0d0
469 10:35:55.674663 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 10:35:55.687026 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 10:35:55.692087 ** Bad device specification mmc 0 **
472 10:35:55.702335 Card did not respond to voltage select! : -110
473 10:35:55.710100 ** Bad device specification mmc 0 **
474 10:35:55.710464 Couldn't find partition mmc 0
475 10:35:55.718298 Card did not respond to voltage select! : -110
476 10:35:55.723813 ** Bad device specification mmc 0 **
477 10:35:55.724342 Couldn't find partition mmc 0
478 10:35:55.728922 Error: could not access storage.
479 10:35:56.992256 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 10:35:56.992914 bl2_stage_init 0x01
481 10:35:56.993389 bl2_stage_init 0x81
482 10:35:56.997797 hw id: 0x0000 - pwm id 0x01
483 10:35:56.998290 bl2_stage_init 0xc1
484 10:35:56.998752 bl2_stage_init 0x02
485 10:35:56.999200
486 10:35:57.003327 L0:00000000
487 10:35:57.003816 L1:20000703
488 10:35:57.004320 L2:00008067
489 10:35:57.004772 L3:14000000
490 10:35:57.008931 B2:00402000
491 10:35:57.009413 B1:e0f83180
492 10:35:57.009863
493 10:35:57.010312 TE: 58124
494 10:35:57.010759
495 10:35:57.014540 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 10:35:57.015025
497 10:35:57.015484 Board ID = 1
498 10:35:57.020153 Set A53 clk to 24M
499 10:35:57.020640 Set A73 clk to 24M
500 10:35:57.021093 Set clk81 to 24M
501 10:35:57.025769 A53 clk: 1200 MHz
502 10:35:57.026252 A73 clk: 1200 MHz
503 10:35:57.026706 CLK81: 166.6M
504 10:35:57.027158 smccc: 00012a92
505 10:35:57.031325 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 10:35:57.036944 board id: 1
507 10:35:57.042934 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 10:35:57.053504 fw parse done
509 10:35:57.059434 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 10:35:57.102122 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 10:35:57.113106 PIEI prepare done
512 10:35:57.113689 fastboot data load
513 10:35:57.114147 fastboot data verify
514 10:35:57.118616 verify result: 266
515 10:35:57.124205 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 10:35:57.124736 LPDDR4 probe
517 10:35:57.125187 ddr clk to 1584MHz
518 10:35:57.132371 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 10:35:57.169524
520 10:35:57.170156 dmc_version 0001
521 10:35:57.176113 Check phy result
522 10:35:57.181992 INFO : End of CA training
523 10:35:57.182543 INFO : End of initialization
524 10:35:57.187591 INFO : Training has run successfully!
525 10:35:57.188189 Check phy result
526 10:35:57.193205 INFO : End of initialization
527 10:35:57.193734 INFO : End of read enable training
528 10:35:57.198818 INFO : End of fine write leveling
529 10:35:57.204408 INFO : End of Write leveling coarse delay
530 10:35:57.204995 INFO : Training has run successfully!
531 10:35:57.205458 Check phy result
532 10:35:57.209965 INFO : End of initialization
533 10:35:57.210488 INFO : End of read dq deskew training
534 10:35:57.215594 INFO : End of MPR read delay center optimization
535 10:35:57.221201 INFO : End of write delay center optimization
536 10:35:57.226816 INFO : End of read delay center optimization
537 10:35:57.227340 INFO : End of max read latency training
538 10:35:57.232370 INFO : Training has run successfully!
539 10:35:57.232861 1D training succeed
540 10:35:57.241552 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 10:35:57.289193 Check phy result
542 10:35:57.289737 INFO : End of initialization
543 10:35:57.311028 INFO : End of 2D read delay Voltage center optimization
544 10:35:57.330368 INFO : End of 2D read delay Voltage center optimization
545 10:35:57.382391 INFO : End of 2D write delay Voltage center optimization
546 10:35:57.431833 INFO : End of 2D write delay Voltage center optimization
547 10:35:57.437314 INFO : Training has run successfully!
548 10:35:57.437809
549 10:35:57.438272 channel==0
550 10:35:57.442882 RxClkDly_Margin_A0==88 ps 9
551 10:35:57.443371 TxDqDly_Margin_A0==98 ps 10
552 10:35:57.446271 RxClkDly_Margin_A1==88 ps 9
553 10:35:57.446757 TxDqDly_Margin_A1==98 ps 10
554 10:35:57.451879 TrainedVREFDQ_A0==74
555 10:35:57.452422 TrainedVREFDQ_A1==76
556 10:35:57.452889 VrefDac_Margin_A0==25
557 10:35:57.457402 DeviceVref_Margin_A0==40
558 10:35:57.457887 VrefDac_Margin_A1==25
559 10:35:57.463020 DeviceVref_Margin_A1==38
560 10:35:57.463507
561 10:35:57.463968
562 10:35:57.464462 channel==1
563 10:35:57.464908 RxClkDly_Margin_A0==98 ps 10
564 10:35:57.468586 TxDqDly_Margin_A0==98 ps 10
565 10:35:57.469080 RxClkDly_Margin_A1==88 ps 9
566 10:35:57.474245 TxDqDly_Margin_A1==88 ps 9
567 10:35:57.474750 TrainedVREFDQ_A0==77
568 10:35:57.475213 TrainedVREFDQ_A1==77
569 10:35:57.479940 VrefDac_Margin_A0==23
570 10:35:57.480452 DeviceVref_Margin_A0==37
571 10:35:57.485407 VrefDac_Margin_A1==24
572 10:35:57.485895 DeviceVref_Margin_A1==37
573 10:35:57.486348
574 10:35:57.490986 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 10:35:57.491471
576 10:35:57.519036 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000019 0000001a 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
577 10:35:57.524617 2D training succeed
578 10:35:57.530275 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 10:35:57.530775 auto size-- 65535DDR cs0 size: 2048MB
580 10:35:57.535893 DDR cs1 size: 2048MB
581 10:35:57.536429 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 10:35:57.541397 cs0 DataBus test pass
583 10:35:57.541893 cs1 DataBus test pass
584 10:35:57.542346 cs0 AddrBus test pass
585 10:35:57.547011 cs1 AddrBus test pass
586 10:35:57.547506
587 10:35:57.547965 100bdlr_step_size ps== 420
588 10:35:57.548470 result report
589 10:35:57.552613 boot times 0Enable ddr reg access
590 10:35:57.560408 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 10:35:57.573710 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 10:35:58.147653 0.0;M3 CHK:0;cm4_sp_mode 0
593 10:35:58.148359 MVN_1=0x00000000
594 10:35:58.152944 MVN_2=0x00000000
595 10:35:58.158663 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 10:35:58.159237 OPS=0x10
597 10:35:58.159706 ring efuse init
598 10:35:58.160234 chipver efuse init
599 10:35:58.164424 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 10:35:58.169830 [0.018961 Inits done]
601 10:35:58.170316 secure task start!
602 10:35:58.170757 high task start!
603 10:35:58.174406 low task start!
604 10:35:58.174874 run into bl31
605 10:35:58.181079 NOTICE: BL31: v1.3(release):4fc40b1
606 10:35:58.188883 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 10:35:58.189363 NOTICE: BL31: G12A normal boot!
608 10:35:58.214408 NOTICE: BL31: BL33 decompress pass
609 10:35:58.219977 ERROR: Error initializing runtime service opteed_fast
610 10:35:59.452915
611 10:35:59.453385
612 10:35:59.461400 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 10:35:59.461955
614 10:35:59.462318 Model: Libre Computer AML-A311D-CC Alta
615 10:35:59.669021 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 10:35:59.693186 DRAM: 2 GiB (effective 3.8 GiB)
617 10:35:59.836192 Core: 408 devices, 31 uclasses, devicetree: separate
618 10:35:59.841993 WDT: Not starting watchdog@f0d0
619 10:35:59.875193 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 10:35:59.887039 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 10:35:59.891908 ** Bad device specification mmc 0 **
622 10:35:59.902209 Card did not respond to voltage select! : -110
623 10:35:59.909811 ** Bad device specification mmc 0 **
624 10:35:59.910219 Couldn't find partition mmc 0
625 10:35:59.918060 Card did not respond to voltage select! : -110
626 10:35:59.923583 ** Bad device specification mmc 0 **
627 10:35:59.924213 Couldn't find partition mmc 0
628 10:35:59.927677 Error: could not access storage.
629 10:36:00.270301 Net: eth0: ethernet@ff3f0000
630 10:36:00.270733 starting USB...
631 10:36:00.523013 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 10:36:00.523638 Starting the controller
633 10:36:00.529985 USB XHCI 1.10
634 10:36:02.242704 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 10:36:02.243148 bl2_stage_init 0x01
636 10:36:02.243375 bl2_stage_init 0x81
637 10:36:02.248172 hw id: 0x0000 - pwm id 0x01
638 10:36:02.248619 bl2_stage_init 0xc1
639 10:36:02.248966 bl2_stage_init 0x02
640 10:36:02.249301
641 10:36:02.253676 L0:00000000
642 10:36:02.254109 L1:20000703
643 10:36:02.254360 L2:00008067
644 10:36:02.254571 L3:14000000
645 10:36:02.259322 B2:00402000
646 10:36:02.259732 B1:e0f83180
647 10:36:02.260112
648 10:36:02.260449 TE: 58159
649 10:36:02.260778
650 10:36:02.264911 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 10:36:02.265220
652 10:36:02.265452 Board ID = 1
653 10:36:02.270519 Set A53 clk to 24M
654 10:36:02.270829 Set A73 clk to 24M
655 10:36:02.271045 Set clk81 to 24M
656 10:36:02.276162 A53 clk: 1200 MHz
657 10:36:02.276471 A73 clk: 1200 MHz
658 10:36:02.276691 CLK81: 166.6M
659 10:36:02.276895 smccc: 00012ab5
660 10:36:02.281647 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 10:36:02.287303 board id: 1
662 10:36:02.293338 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 10:36:02.303831 fw parse done
664 10:36:02.309708 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 10:36:02.352365 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 10:36:02.363269 PIEI prepare done
667 10:36:02.363769 fastboot data load
668 10:36:02.364046 fastboot data verify
669 10:36:02.368920 verify result: 266
670 10:36:02.374470 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 10:36:02.374793 LPDDR4 probe
672 10:36:02.375015 ddr clk to 1584MHz
673 10:36:02.382456 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 10:36:02.419800
675 10:36:02.420381 dmc_version 0001
676 10:36:02.426476 Check phy result
677 10:36:02.432250 INFO : End of CA training
678 10:36:02.432587 INFO : End of initialization
679 10:36:02.438724 INFO : Training has run successfully!
680 10:36:02.439194 Check phy result
681 10:36:02.443586 INFO : End of initialization
682 10:36:02.443924 INFO : End of read enable training
683 10:36:02.447001 INFO : End of fine write leveling
684 10:36:02.452489 INFO : End of Write leveling coarse delay
685 10:36:02.458103 INFO : Training has run successfully!
686 10:36:02.458446 Check phy result
687 10:36:02.458669 INFO : End of initialization
688 10:36:02.463650 INFO : End of read dq deskew training
689 10:36:02.469248 INFO : End of MPR read delay center optimization
690 10:36:02.469598 INFO : End of write delay center optimization
691 10:36:02.474918 INFO : End of read delay center optimization
692 10:36:02.480490 INFO : End of max read latency training
693 10:36:02.480974 INFO : Training has run successfully!
694 10:36:02.486077 1D training succeed
695 10:36:02.492082 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 10:36:02.539541 Check phy result
697 10:36:02.539949 INFO : End of initialization
698 10:36:02.561263 INFO : End of 2D read delay Voltage center optimization
699 10:36:02.580634 INFO : End of 2D read delay Voltage center optimization
700 10:36:02.632746 INFO : End of 2D write delay Voltage center optimization
701 10:36:02.682088 INFO : End of 2D write delay Voltage center optimization
702 10:36:02.687700 INFO : Training has run successfully!
703 10:36:02.688087
704 10:36:02.688335 channel==0
705 10:36:02.693235 RxClkDly_Margin_A0==88 ps 9
706 10:36:02.693590 TxDqDly_Margin_A0==98 ps 10
707 10:36:02.698762 RxClkDly_Margin_A1==88 ps 9
708 10:36:02.699260 TxDqDly_Margin_A1==88 ps 9
709 10:36:02.699645 TrainedVREFDQ_A0==74
710 10:36:02.704373 TrainedVREFDQ_A1==74
711 10:36:02.704726 VrefDac_Margin_A0==25
712 10:36:02.704957 DeviceVref_Margin_A0==40
713 10:36:02.710031 VrefDac_Margin_A1==25
714 10:36:02.710385 DeviceVref_Margin_A1==40
715 10:36:02.710615
716 10:36:02.710828
717 10:36:02.711042 channel==1
718 10:36:02.715594 RxClkDly_Margin_A0==88 ps 9
719 10:36:02.715946 TxDqDly_Margin_A0==98 ps 10
720 10:36:02.721262 RxClkDly_Margin_A1==88 ps 9
721 10:36:02.721620 TxDqDly_Margin_A1==88 ps 9
722 10:36:02.726780 TrainedVREFDQ_A0==77
723 10:36:02.727136 TrainedVREFDQ_A1==77
724 10:36:02.727360 VrefDac_Margin_A0==23
725 10:36:02.732475 DeviceVref_Margin_A0==37
726 10:36:02.732969 VrefDac_Margin_A1==24
727 10:36:02.737908 DeviceVref_Margin_A1==37
728 10:36:02.738391
729 10:36:02.738771 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 10:36:02.739045
731 10:36:02.771499 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000019 00000018 00000019 00000018 00000018 00000019 00000019 00000019 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 10:36:02.771911 2D training succeed
733 10:36:02.777114 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 10:36:02.782712 auto size-- 65535DDR cs0 size: 2048MB
735 10:36:02.783068 DDR cs1 size: 2048MB
736 10:36:02.788299 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 10:36:02.788793 cs0 DataBus test pass
738 10:36:02.793936 cs1 DataBus test pass
739 10:36:02.794305 cs0 AddrBus test pass
740 10:36:02.794548 cs1 AddrBus test pass
741 10:36:02.794773
742 10:36:02.799512 100bdlr_step_size ps== 420
743 10:36:02.800026 result report
744 10:36:02.805101 boot times 0Enable ddr reg access
745 10:36:02.810350 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 10:36:02.823765 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 10:36:03.397441 0.0;M3 CHK:0;cm4_sp_mode 0
748 10:36:03.397889 MVN_1=0x00000000
749 10:36:03.402946 MVN_2=0x00000000
750 10:36:03.408701 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 10:36:03.409046 OPS=0x10
752 10:36:03.409266 ring efuse init
753 10:36:03.409467 chipver efuse init
754 10:36:03.414298 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 10:36:03.419964 [0.018961 Inits done]
756 10:36:03.420502 secure task start!
757 10:36:03.420724 high task start!
758 10:36:03.424459 low task start!
759 10:36:03.424776 run into bl31
760 10:36:03.431130 NOTICE: BL31: v1.3(release):4fc40b1
761 10:36:03.439032 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 10:36:03.439373 NOTICE: BL31: G12A normal boot!
763 10:36:03.464349 NOTICE: BL31: BL33 decompress pass
764 10:36:03.470024 ERROR: Error initializing runtime service opteed_fast
765 10:36:04.702891
766 10:36:04.703317
767 10:36:04.711253 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 10:36:04.711598
769 10:36:04.711830 Model: Libre Computer AML-A311D-CC Alta
770 10:36:04.919677 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 10:36:04.943127 DRAM: 2 GiB (effective 3.8 GiB)
772 10:36:05.086065 Core: 408 devices, 31 uclasses, devicetree: separate
773 10:36:05.091939 WDT: Not starting watchdog@f0d0
774 10:36:05.124291 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 10:36:05.136653 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 10:36:05.141639 ** Bad device specification mmc 0 **
777 10:36:05.151966 Card did not respond to voltage select! : -110
778 10:36:05.159603 ** Bad device specification mmc 0 **
779 10:36:05.160004 Couldn't find partition mmc 0
780 10:36:05.167965 Card did not respond to voltage select! : -110
781 10:36:05.173451 ** Bad device specification mmc 0 **
782 10:36:05.173817 Couldn't find partition mmc 0
783 10:36:05.178532 Error: could not access storage.
784 10:36:05.520980 Net: eth0: ethernet@ff3f0000
785 10:36:05.521392 starting USB...
786 10:36:05.772832 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 10:36:05.773268 Starting the controller
788 10:36:05.779752 USB XHCI 1.10
789 10:36:07.942572 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 10:36:07.942997 bl2_stage_init 0x01
791 10:36:07.943216 bl2_stage_init 0x81
792 10:36:07.948207 hw id: 0x0000 - pwm id 0x01
793 10:36:07.948519 bl2_stage_init 0xc1
794 10:36:07.948736 bl2_stage_init 0x02
795 10:36:07.948955
796 10:36:07.953836 L0:00000000
797 10:36:07.954144 L1:20000703
798 10:36:07.954364 L2:00008067
799 10:36:07.954569 L3:14000000
800 10:36:07.956815 B2:00402000
801 10:36:07.957111 B1:e0f83180
802 10:36:07.957322
803 10:36:07.957534 TE: 58124
804 10:36:07.957741
805 10:36:07.968150 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 10:36:07.968785
807 10:36:07.969272 Board ID = 1
808 10:36:07.969756 Set A53 clk to 24M
809 10:36:07.970240 Set A73 clk to 24M
810 10:36:07.973747 Set clk81 to 24M
811 10:36:07.974083 A53 clk: 1200 MHz
812 10:36:07.974297 A73 clk: 1200 MHz
813 10:36:07.979094 CLK81: 166.6M
814 10:36:07.979414 smccc: 00012a92
815 10:36:07.984771 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 10:36:07.985111 board id: 1
817 10:36:07.993290 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 10:36:08.003865 fw parse done
819 10:36:08.009889 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 10:36:08.052371 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 10:36:08.063223 PIEI prepare done
822 10:36:08.063630 fastboot data load
823 10:36:08.063887 fastboot data verify
824 10:36:08.068854 verify result: 266
825 10:36:08.074418 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 10:36:08.074777 LPDDR4 probe
827 10:36:08.074991 ddr clk to 1584MHz
828 10:36:08.082439 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 10:36:08.119773
830 10:36:08.120384 dmc_version 0001
831 10:36:08.126361 Check phy result
832 10:36:08.132293 INFO : End of CA training
833 10:36:08.132655 INFO : End of initialization
834 10:36:08.137878 INFO : Training has run successfully!
835 10:36:08.138387 Check phy result
836 10:36:08.143486 INFO : End of initialization
837 10:36:08.143863 INFO : End of read enable training
838 10:36:08.149087 INFO : End of fine write leveling
839 10:36:08.154670 INFO : End of Write leveling coarse delay
840 10:36:08.155185 INFO : Training has run successfully!
841 10:36:08.155574 Check phy result
842 10:36:08.160307 INFO : End of initialization
843 10:36:08.160686 INFO : End of read dq deskew training
844 10:36:08.165891 INFO : End of MPR read delay center optimization
845 10:36:08.171481 INFO : End of write delay center optimization
846 10:36:08.177115 INFO : End of read delay center optimization
847 10:36:08.177648 INFO : End of max read latency training
848 10:36:08.182706 INFO : Training has run successfully!
849 10:36:08.183083 1D training succeed
850 10:36:08.191890 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 10:36:08.239493 Check phy result
852 10:36:08.239924 INFO : End of initialization
853 10:36:08.261077 INFO : End of 2D read delay Voltage center optimization
854 10:36:08.281174 INFO : End of 2D read delay Voltage center optimization
855 10:36:08.333068 INFO : End of 2D write delay Voltage center optimization
856 10:36:08.382293 INFO : End of 2D write delay Voltage center optimization
857 10:36:08.387803 INFO : Training has run successfully!
858 10:36:08.388201
859 10:36:08.388446 channel==0
860 10:36:08.393486 RxClkDly_Margin_A0==88 ps 9
861 10:36:08.393847 TxDqDly_Margin_A0==98 ps 10
862 10:36:08.399027 RxClkDly_Margin_A1==88 ps 9
863 10:36:08.400072 TxDqDly_Margin_A1==98 ps 10
864 10:36:08.400444 TrainedVREFDQ_A0==74
865 10:36:08.404723 TrainedVREFDQ_A1==74
866 10:36:08.405108 VrefDac_Margin_A0==25
867 10:36:08.405348 DeviceVref_Margin_A0==40
868 10:36:08.410229 VrefDac_Margin_A1==25
869 10:36:08.410584 DeviceVref_Margin_A1==40
870 10:36:08.410808
871 10:36:08.411024
872 10:36:08.415861 channel==1
873 10:36:08.416242 RxClkDly_Margin_A0==98 ps 10
874 10:36:08.416474 TxDqDly_Margin_A0==98 ps 10
875 10:36:08.421480 RxClkDly_Margin_A1==98 ps 10
876 10:36:08.421845 TxDqDly_Margin_A1==98 ps 10
877 10:36:08.427021 TrainedVREFDQ_A0==77
878 10:36:08.427372 TrainedVREFDQ_A1==77
879 10:36:08.427609 VrefDac_Margin_A0==22
880 10:36:08.432735 DeviceVref_Margin_A0==37
881 10:36:08.433091 VrefDac_Margin_A1==24
882 10:36:08.438226 DeviceVref_Margin_A1==37
883 10:36:08.438580
884 10:36:08.438808 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 10:36:08.443862
886 10:36:08.471852 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
887 10:36:08.472359 2D training succeed
888 10:36:08.477456 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 10:36:08.483073 auto size-- 65535DDR cs0 size: 2048MB
890 10:36:08.483438 DDR cs1 size: 2048MB
891 10:36:08.488721 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 10:36:08.489085 cs0 DataBus test pass
893 10:36:08.494227 cs1 DataBus test pass
894 10:36:08.494585 cs0 AddrBus test pass
895 10:36:08.494802 cs1 AddrBus test pass
896 10:36:08.495014
897 10:36:08.499851 100bdlr_step_size ps== 420
898 10:36:08.500251 result report
899 10:36:08.505499 boot times 0Enable ddr reg access
900 10:36:08.511001 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 10:36:08.525053 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 10:36:09.096411 0.0;M3 CHK:0;cm4_sp_mode 0
903 10:36:09.096840 MVN_1=0x00000000
904 10:36:09.101867 MVN_2=0x00000000
905 10:36:09.107713 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 10:36:09.108212 OPS=0x10
907 10:36:09.108481 ring efuse init
908 10:36:09.108705 chipver efuse init
909 10:36:09.113245 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 10:36:09.118831 [0.018961 Inits done]
911 10:36:09.119302 secure task start!
912 10:36:09.119644 high task start!
913 10:36:09.123398 low task start!
914 10:36:09.123729 run into bl31
915 10:36:09.130130 NOTICE: BL31: v1.3(release):4fc40b1
916 10:36:09.137930 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 10:36:09.138334 NOTICE: BL31: G12A normal boot!
918 10:36:09.163273 NOTICE: BL31: BL33 decompress pass
919 10:36:09.168963 ERROR: Error initializing runtime service opteed_fast
920 10:36:10.401921
921 10:36:10.402972
922 10:36:10.410237 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 10:36:10.410817
924 10:36:10.411250 Model: Libre Computer AML-A311D-CC Alta
925 10:36:10.618701 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 10:36:10.642097 DRAM: 2 GiB (effective 3.8 GiB)
927 10:36:10.785942 Core: 408 devices, 31 uclasses, devicetree: separate
928 10:36:10.791095 WDT: Not starting watchdog@f0d0
929 10:36:10.823383 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 10:36:10.835937 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 10:36:10.840711 ** Bad device specification mmc 0 **
932 10:36:10.851017 Card did not respond to voltage select! : -110
933 10:36:10.858580 ** Bad device specification mmc 0 **
934 10:36:10.858995 Couldn't find partition mmc 0
935 10:36:10.866998 Card did not respond to voltage select! : -110
936 10:36:10.872429 ** Bad device specification mmc 0 **
937 10:36:10.872833 Couldn't find partition mmc 0
938 10:36:10.877478 Error: could not access storage.
939 10:36:11.220124 Net: eth0: ethernet@ff3f0000
940 10:36:11.220561 starting USB...
941 10:36:11.471885 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 10:36:11.472526 Starting the controller
943 10:36:11.478758 USB XHCI 1.10
944 10:36:13.032959 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 10:36:13.041448 scanning usb for storage devices... 0 Storage Device(s) found
947 10:36:13.093215 Hit any key to stop autoboot: 1
948 10:36:13.094213 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 10:36:13.094949 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 10:36:13.095504 Setting prompt string to ['=>']
951 10:36:13.096110 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 10:36:13.108984 0
953 10:36:13.110048 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 10:36:13.110653 Sending with 10 millisecond of delay
956 10:36:14.246210 => setenv autoload no
957 10:36:14.257728 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 10:36:14.260472 setenv autoload no
959 10:36:14.261007 Sending with 10 millisecond of delay
961 10:36:16.059623 => setenv initrd_high 0xffffffff
962 10:36:16.070268 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 10:36:16.070864 setenv initrd_high 0xffffffff
964 10:36:16.071351 Sending with 10 millisecond of delay
966 10:36:17.688639 => setenv fdt_high 0xffffffff
967 10:36:17.699240 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 10:36:17.699865 setenv fdt_high 0xffffffff
969 10:36:17.700823 Sending with 10 millisecond of delay
971 10:36:17.992890 => dhcp
972 10:36:18.003468 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 10:36:18.004069 dhcp
974 10:36:18.004329 Speed: 1000, full duplex
975 10:36:18.004549 BOOTP broadcast 1
976 10:36:18.251797 BOOTP broadcast 2
977 10:36:18.412901 DHCP client bound to address 192.168.6.33 (409 ms)
978 10:36:18.413564 Sending with 10 millisecond of delay
980 10:36:20.090676 => setenv serverip 192.168.6.2
981 10:36:20.101347 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
982 10:36:20.102077 setenv serverip 192.168.6.2
983 10:36:20.102641 Sending with 10 millisecond of delay
985 10:36:23.829106 => tftpboot 0x01080000 715567/tftp-deploy-ui7n468k/kernel/uImage
986 10:36:23.840015 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
987 10:36:23.840974 tftpboot 0x01080000 715567/tftp-deploy-ui7n468k/kernel/uImage
988 10:36:23.841477 Speed: 1000, full duplex
989 10:36:23.841950 Using ethernet@ff3f0000 device
990 10:36:23.842747 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
991 10:36:23.848225 Filename '715567/tftp-deploy-ui7n468k/kernel/uImage'.
992 10:36:23.852056 Load address: 0x1080000
993 10:36:26.321864 Loading: *################################################## 37.6 MiB
994 10:36:26.322289 15.2 MiB/s
995 10:36:26.322506 done
996 10:36:26.326289 Bytes transferred = 39455296 (25a0a40 hex)
997 10:36:26.326810 Sending with 10 millisecond of delay
999 10:36:31.017629 => tftpboot 0x08000000 715567/tftp-deploy-ui7n468k/ramdisk/ramdisk.cpio.gz.uboot
1000 10:36:31.028248 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1001 10:36:31.028912 tftpboot 0x08000000 715567/tftp-deploy-ui7n468k/ramdisk/ramdisk.cpio.gz.uboot
1002 10:36:31.029193 Speed: 1000, full duplex
1003 10:36:31.029434 Using ethernet@ff3f0000 device
1004 10:36:31.030908 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1005 10:36:31.042467 Filename '715567/tftp-deploy-ui7n468k/ramdisk/ramdisk.cpio.gz.uboot'.
1006 10:36:31.042883 Load address: 0x8000000
1007 10:36:37.502871 Loading: *T ################################################# UDP wrong checksum 00000005 0000fd91
1008 10:36:42.505342 T UDP wrong checksum 00000005 0000fd91
1009 10:36:52.506810 T T UDP wrong checksum 00000005 0000fd91
1010 10:37:02.407504 T UDP wrong checksum 000000ff 00001360
1011 10:37:02.419539 UDP wrong checksum 000000ff 00009752
1012 10:37:07.898358 T T UDP wrong checksum 000000ff 000042e8
1013 10:37:07.922588 UDP wrong checksum 000000ff 0000d3da
1014 10:37:12.508197 UDP wrong checksum 00000005 0000fd91
1015 10:37:17.238157 T UDP wrong checksum 000000ff 00002c2a
1016 10:37:17.273712 UDP wrong checksum 000000ff 0000c41c
1017 10:37:21.979018 T UDP wrong checksum 000000ff 00005c36
1018 10:37:22.000255 UDP wrong checksum 000000ff 0000f628
1019 10:37:27.515146 T
1020 10:37:27.515963 Retry count exceeded; starting again
1022 10:37:27.517817 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1025 10:37:27.520219 end: 2.4 uboot-commands (duration 00:01:46) [common]
1027 10:37:27.522064 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1029 10:37:27.523561 end: 2 uboot-action (duration 00:01:46) [common]
1031 10:37:27.525616 Cleaning after the job
1032 10:37:27.526363 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/ramdisk
1033 10:37:27.527959 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/kernel
1034 10:37:27.535948 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/dtb
1035 10:37:27.537476 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/nfsrootfs
1036 10:37:27.580186 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715567/tftp-deploy-ui7n468k/modules
1037 10:37:27.588686 start: 4.1 power-off (timeout 00:00:30) [common]
1038 10:37:27.590227 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1039 10:37:27.640004 >> OK - accepted request
1040 10:37:27.642132 Returned 0 in 0 seconds
1041 10:37:27.743560 end: 4.1 power-off (duration 00:00:00) [common]
1043 10:37:27.745845 start: 4.2 read-feedback (timeout 00:10:00) [common]
1044 10:37:27.747275 Listened to connection for namespace 'common' for up to 1s
1045 10:37:28.748098 Finalising connection for namespace 'common'
1046 10:37:28.749041 Disconnecting from shell: Finalise
1047 10:37:28.749781 =>
1048 10:37:28.851033 end: 4.2 read-feedback (duration 00:00:01) [common]
1049 10:37:28.851827 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/715567
1050 10:37:30.546403 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/715567
1051 10:37:30.547160 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.