Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 11:22:41.626130 lava-dispatcher, installed at version: 2024.01
2 11:22:41.626879 start: 0 validate
3 11:22:41.627345 Start time: 2024-09-06 11:22:41.627316+00:00 (UTC)
4 11:22:41.627874 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 11:22:41.628429 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 11:22:41.670351 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 11:22:41.671010 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240906%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 11:22:41.701936 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 11:22:41.702663 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240906%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 11:22:41.733682 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 11:22:41.734266 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 11:22:41.765025 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 11:22:41.765582 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20240906%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 11:22:41.803233 validate duration: 0.18
16 11:22:41.804265 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 11:22:41.804668 start: 1.1 download-retry (timeout 00:10:00) [common]
18 11:22:41.805055 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 11:22:41.805734 Not decompressing ramdisk as can be used compressed.
20 11:22:41.806256 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 11:22:41.806592 saving as /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/ramdisk/initrd.cpio.gz
22 11:22:41.806921 total size: 5628169 (5 MB)
23 11:22:41.842583 progress 0 % (0 MB)
24 11:22:41.847665 progress 5 % (0 MB)
25 11:22:41.852875 progress 10 % (0 MB)
26 11:22:41.857437 progress 15 % (0 MB)
27 11:22:41.862395 progress 20 % (1 MB)
28 11:22:41.866896 progress 25 % (1 MB)
29 11:22:41.871723 progress 30 % (1 MB)
30 11:22:41.876683 progress 35 % (1 MB)
31 11:22:41.881093 progress 40 % (2 MB)
32 11:22:41.885964 progress 45 % (2 MB)
33 11:22:41.890324 progress 50 % (2 MB)
34 11:22:41.895161 progress 55 % (2 MB)
35 11:22:41.900030 progress 60 % (3 MB)
36 11:22:41.904409 progress 65 % (3 MB)
37 11:22:41.909228 progress 70 % (3 MB)
38 11:22:41.913561 progress 75 % (4 MB)
39 11:22:41.918376 progress 80 % (4 MB)
40 11:22:41.922677 progress 85 % (4 MB)
41 11:22:41.927480 progress 90 % (4 MB)
42 11:22:41.932130 progress 95 % (5 MB)
43 11:22:41.936027 progress 100 % (5 MB)
44 11:22:41.936794 5 MB downloaded in 0.13 s (41.33 MB/s)
45 11:22:41.937445 end: 1.1.1 http-download (duration 00:00:00) [common]
47 11:22:41.938569 end: 1.1 download-retry (duration 00:00:00) [common]
48 11:22:41.938942 start: 1.2 download-retry (timeout 00:10:00) [common]
49 11:22:41.939281 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 11:22:41.939858 downloading http://storage.kernelci.org/next/master/next-20240906/arm64/defconfig/gcc-12/kernel/Image
51 11:22:41.940169 saving as /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/kernel/Image
52 11:22:41.940440 total size: 45742592 (43 MB)
53 11:22:41.940701 No compression specified
54 11:22:41.976538 progress 0 % (0 MB)
55 11:22:42.005094 progress 5 % (2 MB)
56 11:22:42.033389 progress 10 % (4 MB)
57 11:22:42.062183 progress 15 % (6 MB)
58 11:22:42.090475 progress 20 % (8 MB)
59 11:22:42.118687 progress 25 % (10 MB)
60 11:22:42.146894 progress 30 % (13 MB)
61 11:22:42.174953 progress 35 % (15 MB)
62 11:22:42.203636 progress 40 % (17 MB)
63 11:22:42.231504 progress 45 % (19 MB)
64 11:22:42.259526 progress 50 % (21 MB)
65 11:22:42.287512 progress 55 % (24 MB)
66 11:22:42.315603 progress 60 % (26 MB)
67 11:22:42.344051 progress 65 % (28 MB)
68 11:22:42.372109 progress 70 % (30 MB)
69 11:22:42.400144 progress 75 % (32 MB)
70 11:22:42.428127 progress 80 % (34 MB)
71 11:22:42.456261 progress 85 % (37 MB)
72 11:22:42.484425 progress 90 % (39 MB)
73 11:22:42.512568 progress 95 % (41 MB)
74 11:22:42.540209 progress 100 % (43 MB)
75 11:22:42.540952 43 MB downloaded in 0.60 s (72.65 MB/s)
76 11:22:42.541430 end: 1.2.1 http-download (duration 00:00:01) [common]
78 11:22:42.542238 end: 1.2 download-retry (duration 00:00:01) [common]
79 11:22:42.542515 start: 1.3 download-retry (timeout 00:09:59) [common]
80 11:22:42.542781 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 11:22:42.543249 downloading http://storage.kernelci.org/next/master/next-20240906/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 11:22:42.543492 saving as /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/dtb/meson-g12b-a311d-libretech-cc.dtb
83 11:22:42.543697 total size: 54703 (0 MB)
84 11:22:42.543903 No compression specified
85 11:22:42.576989 progress 59 % (0 MB)
86 11:22:42.577985 progress 100 % (0 MB)
87 11:22:42.578538 0 MB downloaded in 0.03 s (1.50 MB/s)
88 11:22:42.578995 end: 1.3.1 http-download (duration 00:00:00) [common]
90 11:22:42.579808 end: 1.3 download-retry (duration 00:00:00) [common]
91 11:22:42.580117 start: 1.4 download-retry (timeout 00:09:59) [common]
92 11:22:42.580385 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 11:22:42.580841 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 11:22:42.581080 saving as /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/nfsrootfs/full.rootfs.tar
95 11:22:42.581283 total size: 120894716 (115 MB)
96 11:22:42.581491 Using unxz to decompress xz
97 11:22:42.616483 progress 0 % (0 MB)
98 11:22:43.403197 progress 5 % (5 MB)
99 11:22:44.243798 progress 10 % (11 MB)
100 11:22:45.037322 progress 15 % (17 MB)
101 11:22:45.784435 progress 20 % (23 MB)
102 11:22:46.377842 progress 25 % (28 MB)
103 11:22:47.206651 progress 30 % (34 MB)
104 11:22:48.010552 progress 35 % (40 MB)
105 11:22:48.380424 progress 40 % (46 MB)
106 11:22:48.774251 progress 45 % (51 MB)
107 11:22:49.499375 progress 50 % (57 MB)
108 11:22:50.410983 progress 55 % (63 MB)
109 11:22:51.194931 progress 60 % (69 MB)
110 11:22:51.962360 progress 65 % (74 MB)
111 11:22:52.780909 progress 70 % (80 MB)
112 11:22:53.647226 progress 75 % (86 MB)
113 11:22:54.507270 progress 80 % (92 MB)
114 11:22:55.279628 progress 85 % (98 MB)
115 11:22:56.142597 progress 90 % (103 MB)
116 11:22:56.935416 progress 95 % (109 MB)
117 11:22:57.786842 progress 100 % (115 MB)
118 11:22:57.799243 115 MB downloaded in 15.22 s (7.58 MB/s)
119 11:22:57.800203 end: 1.4.1 http-download (duration 00:00:15) [common]
121 11:22:57.801937 end: 1.4 download-retry (duration 00:00:15) [common]
122 11:22:57.802496 start: 1.5 download-retry (timeout 00:09:44) [common]
123 11:22:57.803049 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 11:22:57.803897 downloading http://storage.kernelci.org/next/master/next-20240906/arm64/defconfig/gcc-12/modules.tar.xz
125 11:22:57.804423 saving as /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/modules/modules.tar
126 11:22:57.804863 total size: 11545064 (11 MB)
127 11:22:57.805313 Using unxz to decompress xz
128 11:22:57.852379 progress 0 % (0 MB)
129 11:22:57.922781 progress 5 % (0 MB)
130 11:22:58.001204 progress 10 % (1 MB)
131 11:22:58.085255 progress 15 % (1 MB)
132 11:22:58.165388 progress 20 % (2 MB)
133 11:22:58.247590 progress 25 % (2 MB)
134 11:22:58.323052 progress 30 % (3 MB)
135 11:22:58.402307 progress 35 % (3 MB)
136 11:22:58.475840 progress 40 % (4 MB)
137 11:22:58.551718 progress 45 % (4 MB)
138 11:22:58.629720 progress 50 % (5 MB)
139 11:22:58.701583 progress 55 % (6 MB)
140 11:22:58.785286 progress 60 % (6 MB)
141 11:22:58.873013 progress 65 % (7 MB)
142 11:22:58.949498 progress 70 % (7 MB)
143 11:22:59.046920 progress 75 % (8 MB)
144 11:22:59.136742 progress 80 % (8 MB)
145 11:22:59.217868 progress 85 % (9 MB)
146 11:22:59.292116 progress 90 % (9 MB)
147 11:22:59.363255 progress 95 % (10 MB)
148 11:22:59.438676 progress 100 % (11 MB)
149 11:22:59.450079 11 MB downloaded in 1.65 s (6.69 MB/s)
150 11:22:59.451028 end: 1.5.1 http-download (duration 00:00:02) [common]
152 11:22:59.452869 end: 1.5 download-retry (duration 00:00:02) [common]
153 11:22:59.453461 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 11:22:59.454050 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 11:23:16.155687 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/715457/extract-nfsrootfs-csbrjjce
156 11:23:16.156315 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 11:23:16.156603 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 11:23:16.157215 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8
159 11:23:16.157646 makedir: /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin
160 11:23:16.157966 makedir: /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/tests
161 11:23:16.158276 makedir: /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/results
162 11:23:16.158607 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-add-keys
163 11:23:16.159136 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-add-sources
164 11:23:16.159671 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-background-process-start
165 11:23:16.160214 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-background-process-stop
166 11:23:16.160743 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-common-functions
167 11:23:16.161227 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-echo-ipv4
168 11:23:16.161697 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-install-packages
169 11:23:16.162165 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-installed-packages
170 11:23:16.162629 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-os-build
171 11:23:16.163096 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-probe-channel
172 11:23:16.163595 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-probe-ip
173 11:23:16.164118 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-target-ip
174 11:23:16.164597 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-target-mac
175 11:23:16.165073 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-target-storage
176 11:23:16.165554 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-test-case
177 11:23:16.166027 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-test-event
178 11:23:16.166486 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-test-feedback
179 11:23:16.166952 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-test-raise
180 11:23:16.167441 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-test-reference
181 11:23:16.167926 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-test-runner
182 11:23:16.168438 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-test-set
183 11:23:16.168915 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-test-shell
184 11:23:16.169391 Updating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-add-keys (debian)
185 11:23:16.169914 Updating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-add-sources (debian)
186 11:23:16.170450 Updating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-install-packages (debian)
187 11:23:16.170951 Updating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-installed-packages (debian)
188 11:23:16.171435 Updating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/bin/lava-os-build (debian)
189 11:23:16.171859 Creating /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/environment
190 11:23:16.172244 LAVA metadata
191 11:23:16.172503 - LAVA_JOB_ID=715457
192 11:23:16.172715 - LAVA_DISPATCHER_IP=192.168.6.2
193 11:23:16.173070 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 11:23:16.174014 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 11:23:16.174315 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 11:23:16.174520 skipped lava-vland-overlay
197 11:23:16.174759 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 11:23:16.175011 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 11:23:16.175227 skipped lava-multinode-overlay
200 11:23:16.175466 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 11:23:16.175712 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 11:23:16.175954 Loading test definitions
203 11:23:16.176252 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 11:23:16.176470 Using /lava-715457 at stage 0
205 11:23:16.177549 uuid=715457_1.6.2.4.1 testdef=None
206 11:23:16.177854 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 11:23:16.178114 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 11:23:16.179656 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 11:23:16.180506 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 11:23:16.182427 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 11:23:16.183245 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 11:23:16.185093 runner path: /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/0/tests/0_timesync-off test_uuid 715457_1.6.2.4.1
215 11:23:16.185633 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 11:23:16.186439 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 11:23:16.186663 Using /lava-715457 at stage 0
219 11:23:16.187012 Fetching tests from https://github.com/kernelci/test-definitions.git
220 11:23:16.187299 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/0/tests/1_kselftest-dt'
221 11:23:19.569664 Running '/usr/bin/git checkout kernelci.org
222 11:23:19.990364 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 11:23:19.991839 uuid=715457_1.6.2.4.5 testdef=None
224 11:23:19.992230 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 11:23:19.993011 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 11:23:19.995931 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 11:23:19.996805 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 11:23:20.000675 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 11:23:20.001565 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 11:23:20.005307 runner path: /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/0/tests/1_kselftest-dt test_uuid 715457_1.6.2.4.5
234 11:23:20.005609 BOARD='meson-g12b-a311d-libretech-cc'
235 11:23:20.005830 BRANCH='next'
236 11:23:20.006036 SKIPFILE='/dev/null'
237 11:23:20.006242 SKIP_INSTALL='True'
238 11:23:20.006445 TESTPROG_URL='http://storage.kernelci.org/next/master/next-20240906/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 11:23:20.006653 TST_CASENAME=''
240 11:23:20.006853 TST_CMDFILES='dt'
241 11:23:20.007463 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 11:23:20.008314 Creating lava-test-runner.conf files
244 11:23:20.008538 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/715457/lava-overlay-t62ea2s8/lava-715457/0 for stage 0
245 11:23:20.008934 - 0_timesync-off
246 11:23:20.009198 - 1_kselftest-dt
247 11:23:20.009562 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 11:23:20.009862 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 11:23:43.482332 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 11:23:43.482797 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 11:23:43.483067 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 11:23:43.483341 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 11:23:43.483607 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 11:23:44.104283 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 11:23:44.104743 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 11:23:44.104999 extracting modules file /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/modules/modules.tar to /var/lib/lava/dispatcher/tmp/715457/extract-nfsrootfs-csbrjjce
257 11:23:45.474323 extracting modules file /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/modules/modules.tar to /var/lib/lava/dispatcher/tmp/715457/extract-overlay-ramdisk-gbd4ta15/ramdisk
258 11:23:46.880387 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 11:23:46.880862 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 11:23:46.881138 [common] Applying overlay to NFS
261 11:23:46.881353 [common] Applying overlay /var/lib/lava/dispatcher/tmp/715457/compress-overlay-myivcb64/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/715457/extract-nfsrootfs-csbrjjce
262 11:23:49.668767 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 11:23:49.669240 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 11:23:49.669512 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 11:23:49.669742 Converting downloaded kernel to a uImage
266 11:23:49.670052 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/kernel/Image /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/kernel/uImage
267 11:23:50.137184 output: Image Name:
268 11:23:50.137606 output: Created: Fri Sep 6 11:23:49 2024
269 11:23:50.137817 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 11:23:50.138021 output: Data Size: 45742592 Bytes = 44670.50 KiB = 43.62 MiB
271 11:23:50.138223 output: Load Address: 01080000
272 11:23:50.138423 output: Entry Point: 01080000
273 11:23:50.138622 output:
274 11:23:50.138956 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 11:23:50.139226 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 11:23:50.139497 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 11:23:50.139752 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 11:23:50.140043 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 11:23:50.140307 Building ramdisk /var/lib/lava/dispatcher/tmp/715457/extract-overlay-ramdisk-gbd4ta15/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/715457/extract-overlay-ramdisk-gbd4ta15/ramdisk
280 11:23:52.368583 >> 165950 blocks
281 11:24:00.056199 Adding RAMdisk u-boot header.
282 11:24:00.056637 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/715457/extract-overlay-ramdisk-gbd4ta15/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/715457/extract-overlay-ramdisk-gbd4ta15/ramdisk.cpio.gz.uboot
283 11:24:00.350232 output: Image Name:
284 11:24:00.350704 output: Created: Fri Sep 6 11:24:00 2024
285 11:24:00.350946 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 11:24:00.351169 output: Data Size: 23317709 Bytes = 22771.20 KiB = 22.24 MiB
287 11:24:00.351389 output: Load Address: 00000000
288 11:24:00.351596 output: Entry Point: 00000000
289 11:24:00.351808 output:
290 11:24:00.352613 rename /var/lib/lava/dispatcher/tmp/715457/extract-overlay-ramdisk-gbd4ta15/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/ramdisk/ramdisk.cpio.gz.uboot
291 11:24:00.353189 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 11:24:00.353535 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 11:24:00.353865 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 11:24:00.354154 No LXC device requested
295 11:24:00.354449 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 11:24:00.354756 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 11:24:00.355034 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 11:24:00.355250 Checking files for TFTP limit of 4294967296 bytes.
299 11:24:00.356932 end: 1 tftp-deploy (duration 00:01:19) [common]
300 11:24:00.357391 start: 2 uboot-action (timeout 00:05:00) [common]
301 11:24:00.357707 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 11:24:00.357990 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 11:24:00.358284 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 11:24:00.358602 Using kernel file from prepare-kernel: 715457/tftp-deploy-sxq4ws79/kernel/uImage
305 11:24:00.358975 substitutions:
306 11:24:00.359219 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 11:24:00.359437 - {DTB_ADDR}: 0x01070000
308 11:24:00.359645 - {DTB}: 715457/tftp-deploy-sxq4ws79/dtb/meson-g12b-a311d-libretech-cc.dtb
309 11:24:00.359860 - {INITRD}: 715457/tftp-deploy-sxq4ws79/ramdisk/ramdisk.cpio.gz.uboot
310 11:24:00.360085 - {KERNEL_ADDR}: 0x01080000
311 11:24:00.360290 - {KERNEL}: 715457/tftp-deploy-sxq4ws79/kernel/uImage
312 11:24:00.360502 - {LAVA_MAC}: None
313 11:24:00.360742 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/715457/extract-nfsrootfs-csbrjjce
314 11:24:00.360959 - {NFS_SERVER_IP}: 192.168.6.2
315 11:24:00.361176 - {PRESEED_CONFIG}: None
316 11:24:00.361391 - {PRESEED_LOCAL}: None
317 11:24:00.361604 - {RAMDISK_ADDR}: 0x08000000
318 11:24:00.361813 - {RAMDISK}: 715457/tftp-deploy-sxq4ws79/ramdisk/ramdisk.cpio.gz.uboot
319 11:24:00.362020 - {ROOT_PART}: None
320 11:24:00.362374 - {ROOT}: None
321 11:24:00.362621 - {SERVER_IP}: 192.168.6.2
322 11:24:00.362827 - {TEE_ADDR}: 0x83000000
323 11:24:00.363027 - {TEE}: None
324 11:24:00.363230 Parsed boot commands:
325 11:24:00.363443 - setenv autoload no
326 11:24:00.363660 - setenv initrd_high 0xffffffff
327 11:24:00.363868 - setenv fdt_high 0xffffffff
328 11:24:00.364089 - dhcp
329 11:24:00.364296 - setenv serverip 192.168.6.2
330 11:24:00.364499 - tftpboot 0x01080000 715457/tftp-deploy-sxq4ws79/kernel/uImage
331 11:24:00.364714 - tftpboot 0x08000000 715457/tftp-deploy-sxq4ws79/ramdisk/ramdisk.cpio.gz.uboot
332 11:24:00.364917 - tftpboot 0x01070000 715457/tftp-deploy-sxq4ws79/dtb/meson-g12b-a311d-libretech-cc.dtb
333 11:24:00.365114 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/715457/extract-nfsrootfs-csbrjjce,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 11:24:00.365319 - bootm 0x01080000 0x08000000 0x01070000
335 11:24:00.365632 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 11:24:00.366481 start: 2.3 connect-device (timeout 00:05:00) [common]
338 11:24:00.366722 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 11:24:00.378952 Setting prompt string to ['lava-test: # ']
340 11:24:00.380015 end: 2.3 connect-device (duration 00:00:00) [common]
341 11:24:00.380410 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 11:24:00.380740 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 11:24:00.381025 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 11:24:00.381711 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 11:24:00.416668 >> OK - accepted request
346 11:24:00.418881 Returned 0 in 0 seconds
347 11:24:00.519931 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 11:24:00.521052 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 11:24:00.521395 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 11:24:00.521703 Setting prompt string to ['Hit any key to stop autoboot']
352 11:24:00.521962 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 11:24:00.522910 Trying 192.168.56.21...
354 11:24:00.523341 Connected to conserv1.
355 11:24:00.523593 Escape character is '^]'.
356 11:24:00.523822
357 11:24:00.524064 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 11:24:00.524307
359 11:24:11.700022 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 11:24:11.700661 bl2_stage_init 0x01
361 11:24:11.701120 bl2_stage_init 0x81
362 11:24:11.705571 hw id: 0x0000 - pwm id 0x01
363 11:24:11.706065 bl2_stage_init 0xc1
364 11:24:11.706513 bl2_stage_init 0x02
365 11:24:11.706952
366 11:24:11.711145 L0:00000000
367 11:24:11.711643 L1:20000703
368 11:24:11.712128 L2:00008067
369 11:24:11.712585 L3:14000000
370 11:24:11.716589 B2:00402000
371 11:24:11.717058 B1:e0f83180
372 11:24:11.717510
373 11:24:11.717939 TE: 58159
374 11:24:11.718370
375 11:24:11.722396 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 11:24:11.722858
377 11:24:11.723291 Board ID = 1
378 11:24:11.727899 Set A53 clk to 24M
379 11:24:11.728383 Set A73 clk to 24M
380 11:24:11.728810 Set clk81 to 24M
381 11:24:11.733490 A53 clk: 1200 MHz
382 11:24:11.733944 A73 clk: 1200 MHz
383 11:24:11.734370 CLK81: 166.6M
384 11:24:11.734794 smccc: 00012ab4
385 11:24:11.739121 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 11:24:11.744580 board id: 1
387 11:24:11.750591 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 11:24:11.761187 fw parse done
389 11:24:11.767250 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 11:24:11.809658 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 11:24:11.820509 PIEI prepare done
392 11:24:11.820959 fastboot data load
393 11:24:11.821390 fastboot data verify
394 11:24:11.826253 verify result: 266
395 11:24:11.831833 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 11:24:11.832327 LPDDR4 probe
397 11:24:11.832755 ddr clk to 1584MHz
398 11:24:11.839790 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 11:24:11.876996
400 11:24:11.877455 dmc_version 0001
401 11:24:11.883701 Check phy result
402 11:24:11.889582 INFO : End of CA training
403 11:24:11.890033 INFO : End of initialization
404 11:24:11.895164 INFO : Training has run successfully!
405 11:24:11.895614 Check phy result
406 11:24:11.900823 INFO : End of initialization
407 11:24:11.901290 INFO : End of read enable training
408 11:24:11.906356 INFO : End of fine write leveling
409 11:24:11.912104 INFO : End of Write leveling coarse delay
410 11:24:11.912559 INFO : Training has run successfully!
411 11:24:11.912991 Check phy result
412 11:24:11.917563 INFO : End of initialization
413 11:24:11.918028 INFO : End of read dq deskew training
414 11:24:11.923168 INFO : End of MPR read delay center optimization
415 11:24:11.928838 INFO : End of write delay center optimization
416 11:24:11.934387 INFO : End of read delay center optimization
417 11:24:11.934863 INFO : End of max read latency training
418 11:24:11.940100 INFO : Training has run successfully!
419 11:24:11.940553 1D training succeed
420 11:24:11.949205 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 11:24:11.996744 Check phy result
422 11:24:11.997214 INFO : End of initialization
423 11:24:12.018439 INFO : End of 2D read delay Voltage center optimization
424 11:24:12.038459 INFO : End of 2D read delay Voltage center optimization
425 11:24:12.090352 INFO : End of 2D write delay Voltage center optimization
426 11:24:12.139613 INFO : End of 2D write delay Voltage center optimization
427 11:24:12.145170 INFO : Training has run successfully!
428 11:24:12.145630
429 11:24:12.146065 channel==0
430 11:24:12.150760 RxClkDly_Margin_A0==88 ps 9
431 11:24:12.151217 TxDqDly_Margin_A0==98 ps 10
432 11:24:12.154125 RxClkDly_Margin_A1==88 ps 9
433 11:24:12.154576 TxDqDly_Margin_A1==98 ps 10
434 11:24:12.159695 TrainedVREFDQ_A0==74
435 11:24:12.160182 TrainedVREFDQ_A1==74
436 11:24:12.160617 VrefDac_Margin_A0==25
437 11:24:12.165302 DeviceVref_Margin_A0==40
438 11:24:12.165753 VrefDac_Margin_A1==25
439 11:24:12.170914 DeviceVref_Margin_A1==40
440 11:24:12.171367
441 11:24:12.171798
442 11:24:12.172271 channel==1
443 11:24:12.172700 RxClkDly_Margin_A0==98 ps 10
444 11:24:12.176504 TxDqDly_Margin_A0==98 ps 10
445 11:24:12.176960 RxClkDly_Margin_A1==88 ps 9
446 11:24:12.182104 TxDqDly_Margin_A1==88 ps 9
447 11:24:12.182620 TrainedVREFDQ_A0==77
448 11:24:12.183060 TrainedVREFDQ_A1==77
449 11:24:12.187703 VrefDac_Margin_A0==22
450 11:24:12.188188 DeviceVref_Margin_A0==37
451 11:24:12.193308 VrefDac_Margin_A1==24
452 11:24:12.193764 DeviceVref_Margin_A1==37
453 11:24:12.194194
454 11:24:12.198879 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 11:24:12.199334
456 11:24:12.226950 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 11:24:12.232509 2D training succeed
458 11:24:12.238146 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 11:24:12.238612 auto size-- 65535DDR cs0 size: 2048MB
460 11:24:12.243698 DDR cs1 size: 2048MB
461 11:24:12.244190 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 11:24:12.249292 cs0 DataBus test pass
463 11:24:12.249744 cs1 DataBus test pass
464 11:24:12.250177 cs0 AddrBus test pass
465 11:24:12.254894 cs1 AddrBus test pass
466 11:24:12.255344
467 11:24:12.255781 100bdlr_step_size ps== 420
468 11:24:12.256253 result report
469 11:24:12.260497 boot times 0Enable ddr reg access
470 11:24:12.268210 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 11:24:12.281591 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 11:24:12.853653 0.0;M3 CHK:0;cm4_sp_mode 0
473 11:24:12.854189 MVN_1=0x00000000
474 11:24:12.859170 MVN_2=0x00000000
475 11:24:12.864833 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 11:24:12.865301 OPS=0x10
477 11:24:12.865747 ring efuse init
478 11:24:12.866183 chipver efuse init
479 11:24:12.870421 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 11:24:12.876176 [0.018961 Inits done]
481 11:24:12.876633 secure task start!
482 11:24:12.877078 high task start!
483 11:24:12.880631 low task start!
484 11:24:12.881092 run into bl31
485 11:24:12.887257 NOTICE: BL31: v1.3(release):4fc40b1
486 11:24:12.895078 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 11:24:12.895548 NOTICE: BL31: G12A normal boot!
488 11:24:12.920423 NOTICE: BL31: BL33 decompress pass
489 11:24:12.925367 ERROR: Error initializing runtime service opteed_fast
490 11:24:14.159061
491 11:24:14.159709
492 11:24:14.167435 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 11:24:14.167941
494 11:24:14.168433 Model: Libre Computer AML-A311D-CC Alta
495 11:24:14.375759 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 11:24:14.399205 DRAM: 2 GiB (effective 3.8 GiB)
497 11:24:14.542172 Core: 408 devices, 31 uclasses, devicetree: separate
498 11:24:14.548051 WDT: Not starting watchdog@f0d0
499 11:24:14.580417 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 11:24:14.592748 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 11:24:14.597721 ** Bad device specification mmc 0 **
502 11:24:14.608066 Card did not respond to voltage select! : -110
503 11:24:14.615715 ** Bad device specification mmc 0 **
504 11:24:14.616229 Couldn't find partition mmc 0
505 11:24:14.624065 Card did not respond to voltage select! : -110
506 11:24:14.629539 ** Bad device specification mmc 0 **
507 11:24:14.630011 Couldn't find partition mmc 0
508 11:24:14.634623 Error: could not access storage.
509 11:24:15.890313 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 11:24:15.890919 bl2_stage_init 0x01
511 11:24:15.891384 bl2_stage_init 0x81
512 11:24:15.895701 hw id: 0x0000 - pwm id 0x01
513 11:24:15.896215 bl2_stage_init 0xc1
514 11:24:15.896664 bl2_stage_init 0x02
515 11:24:15.897104
516 11:24:15.901428 L0:00000000
517 11:24:15.901893 L1:20000703
518 11:24:15.902334 L2:00008067
519 11:24:15.902772 L3:14000000
520 11:24:15.906905 B2:00402000
521 11:24:15.907368 B1:e0f83180
522 11:24:15.907808
523 11:24:15.908286 TE: 58167
524 11:24:15.908731
525 11:24:15.912573 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 11:24:15.913043
527 11:24:15.913491 Board ID = 1
528 11:24:15.918121 Set A53 clk to 24M
529 11:24:15.918589 Set A73 clk to 24M
530 11:24:15.919034 Set clk81 to 24M
531 11:24:15.923726 A53 clk: 1200 MHz
532 11:24:15.924216 A73 clk: 1200 MHz
533 11:24:15.924657 CLK81: 166.6M
534 11:24:15.925094 smccc: 00012abe
535 11:24:15.929390 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 11:24:15.934974 board id: 1
537 11:24:15.939867 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 11:24:15.951426 fw parse done
539 11:24:15.956716 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 11:24:15.999572 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 11:24:16.010962 PIEI prepare done
542 11:24:16.011511 fastboot data load
543 11:24:16.012165 fastboot data verify
544 11:24:16.016664 verify result: 266
545 11:24:16.022182 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 11:24:16.022648 LPDDR4 probe
547 11:24:16.023091 ddr clk to 1584MHz
548 11:24:16.029770 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 11:24:16.067158
550 11:24:16.067650 dmc_version 0001
551 11:24:16.073532 Check phy result
552 11:24:16.079960 INFO : End of CA training
553 11:24:16.080449 INFO : End of initialization
554 11:24:16.085689 INFO : Training has run successfully!
555 11:24:16.086155 Check phy result
556 11:24:16.091154 INFO : End of initialization
557 11:24:16.091618 INFO : End of read enable training
558 11:24:16.096767 INFO : End of fine write leveling
559 11:24:16.102407 INFO : End of Write leveling coarse delay
560 11:24:16.102869 INFO : Training has run successfully!
561 11:24:16.103309 Check phy result
562 11:24:16.108019 INFO : End of initialization
563 11:24:16.108488 INFO : End of read dq deskew training
564 11:24:16.113637 INFO : End of MPR read delay center optimization
565 11:24:16.119138 INFO : End of write delay center optimization
566 11:24:16.124840 INFO : End of read delay center optimization
567 11:24:16.125301 INFO : End of max read latency training
568 11:24:16.130631 INFO : Training has run successfully!
569 11:24:16.131094 1D training succeed
570 11:24:16.139367 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 11:24:16.186261 Check phy result
572 11:24:16.186744 INFO : End of initialization
573 11:24:16.207912 INFO : End of 2D read delay Voltage center optimization
574 11:24:16.228200 INFO : End of 2D read delay Voltage center optimization
575 11:24:16.280806 INFO : End of 2D write delay Voltage center optimization
576 11:24:16.330509 INFO : End of 2D write delay Voltage center optimization
577 11:24:16.336082 INFO : Training has run successfully!
578 11:24:16.336550
579 11:24:16.336998 channel==0
580 11:24:16.341671 RxClkDly_Margin_A0==88 ps 9
581 11:24:16.342133 TxDqDly_Margin_A0==98 ps 10
582 11:24:16.347288 RxClkDly_Margin_A1==88 ps 9
583 11:24:16.347754 TxDqDly_Margin_A1==88 ps 9
584 11:24:16.348237 TrainedVREFDQ_A0==74
585 11:24:16.352906 TrainedVREFDQ_A1==74
586 11:24:16.353376 VrefDac_Margin_A0==25
587 11:24:16.353816 DeviceVref_Margin_A0==40
588 11:24:16.358473 VrefDac_Margin_A1==25
589 11:24:16.358934 DeviceVref_Margin_A1==40
590 11:24:16.359374
591 11:24:16.359816
592 11:24:16.360294 channel==1
593 11:24:16.364156 RxClkDly_Margin_A0==98 ps 10
594 11:24:16.364622 TxDqDly_Margin_A0==88 ps 9
595 11:24:16.369660 RxClkDly_Margin_A1==88 ps 9
596 11:24:16.370126 TxDqDly_Margin_A1==88 ps 9
597 11:24:16.375274 TrainedVREFDQ_A0==77
598 11:24:16.375741 TrainedVREFDQ_A1==77
599 11:24:16.376224 VrefDac_Margin_A0==22
600 11:24:16.380915 DeviceVref_Margin_A0==37
601 11:24:16.381372 VrefDac_Margin_A1==24
602 11:24:16.386504 DeviceVref_Margin_A1==37
603 11:24:16.386982
604 11:24:16.387425 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 11:24:16.387866
606 11:24:16.420143 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
607 11:24:16.420654 2D training succeed
608 11:24:16.425686 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 11:24:16.431256 auto size-- 65535DDR cs0 size: 2048MB
610 11:24:16.431729 DDR cs1 size: 2048MB
611 11:24:16.436861 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 11:24:16.437335 cs0 DataBus test pass
613 11:24:16.442492 cs1 DataBus test pass
614 11:24:16.442976 cs0 AddrBus test pass
615 11:24:16.443423 cs1 AddrBus test pass
616 11:24:16.443857
617 11:24:16.448077 100bdlr_step_size ps== 420
618 11:24:16.448555 result report
619 11:24:16.453745 boot times 0Enable ddr reg access
620 11:24:16.458855 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 11:24:16.472107 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 11:24:17.045943 0.0;M3 CHK:0;cm4_sp_mode 0
623 11:24:17.046493 MVN_1=0x00000000
624 11:24:17.051533 MVN_2=0x00000000
625 11:24:17.057258 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 11:24:17.057771 OPS=0x10
627 11:24:17.058245 ring efuse init
628 11:24:17.058705 chipver efuse init
629 11:24:17.062815 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 11:24:17.068421 [0.018960 Inits done]
631 11:24:17.068886 secure task start!
632 11:24:17.069315 high task start!
633 11:24:17.072253 low task start!
634 11:24:17.072709 run into bl31
635 11:24:17.079805 NOTICE: BL31: v1.3(release):4fc40b1
636 11:24:17.086624 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 11:24:17.087089 NOTICE: BL31: G12A normal boot!
638 11:24:17.112781 NOTICE: BL31: BL33 decompress pass
639 11:24:17.117777 ERROR: Error initializing runtime service opteed_fast
640 11:24:18.351330
641 11:24:18.351936
642 11:24:18.359490 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 11:24:18.359970
644 11:24:18.360452 Model: Libre Computer AML-A311D-CC Alta
645 11:24:18.567574 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 11:24:18.591540 DRAM: 2 GiB (effective 3.8 GiB)
647 11:24:18.734505 Core: 408 devices, 31 uclasses, devicetree: separate
648 11:24:18.739908 WDT: Not starting watchdog@f0d0
649 11:24:18.772632 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 11:24:18.785131 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 11:24:18.789844 ** Bad device specification mmc 0 **
652 11:24:18.800447 Card did not respond to voltage select! : -110
653 11:24:18.807700 ** Bad device specification mmc 0 **
654 11:24:18.808205 Couldn't find partition mmc 0
655 11:24:18.816422 Card did not respond to voltage select! : -110
656 11:24:18.821954 ** Bad device specification mmc 0 **
657 11:24:18.822424 Couldn't find partition mmc 0
658 11:24:18.826086 Error: could not access storage.
659 11:24:19.169555 Net: eth0: ethernet@ff3f0000
660 11:24:19.170061 starting USB...
661 11:24:19.422329 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 11:24:19.422808 Starting the controller
663 11:24:19.428712 USB XHCI 1.10
664 11:24:21.140375 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
665 11:24:21.141041 bl2_stage_init 0x81
666 11:24:21.145951 hw id: 0x0000 - pwm id 0x01
667 11:24:21.146440 bl2_stage_init 0xc1
668 11:24:21.146898 bl2_stage_init 0x02
669 11:24:21.147345
670 11:24:21.151565 L0:00000000
671 11:24:21.152072 L1:20000703
672 11:24:21.152529 L2:00008067
673 11:24:21.152974 L3:14000000
674 11:24:21.153413 B2:00402000
675 11:24:21.157163 B1:e0f83180
676 11:24:21.157643
677 11:24:21.158092 TE: 58150
678 11:24:21.158535
679 11:24:21.162753 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
680 11:24:21.163229
681 11:24:21.163673 Board ID = 1
682 11:24:21.168336 Set A53 clk to 24M
683 11:24:21.168813 Set A73 clk to 24M
684 11:24:21.169254 Set clk81 to 24M
685 11:24:21.173930 A53 clk: 1200 MHz
686 11:24:21.174400 A73 clk: 1200 MHz
687 11:24:21.174841 CLK81: 166.6M
688 11:24:21.175277 smccc: 00012aac
689 11:24:21.179537 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
690 11:24:21.185104 board id: 1
691 11:24:21.190833 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
692 11:24:21.201583 fw parse done
693 11:24:21.206597 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 11:24:21.249255 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
695 11:24:21.261099 PIEI prepare done
696 11:24:21.261566 fastboot data load
697 11:24:21.262014 fastboot data verify
698 11:24:21.266764 verify result: 266
699 11:24:21.272384 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
700 11:24:21.272852 LPDDR4 probe
701 11:24:21.273293 ddr clk to 1584MHz
702 11:24:21.279776 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
703 11:24:21.316625
704 11:24:21.317147 dmc_version 0001
705 11:24:21.323478 Check phy result
706 11:24:21.330133 INFO : End of CA training
707 11:24:21.330623 INFO : End of initialization
708 11:24:21.335742 INFO : Training has run successfully!
709 11:24:21.336251 Check phy result
710 11:24:21.341401 INFO : End of initialization
711 11:24:21.341875 INFO : End of read enable training
712 11:24:21.346940 INFO : End of fine write leveling
713 11:24:21.352534 INFO : End of Write leveling coarse delay
714 11:24:21.353004 INFO : Training has run successfully!
715 11:24:21.353447 Check phy result
716 11:24:21.358122 INFO : End of initialization
717 11:24:21.358590 INFO : End of read dq deskew training
718 11:24:21.363719 INFO : End of MPR read delay center optimization
719 11:24:21.369377 INFO : End of write delay center optimization
720 11:24:21.374929 INFO : End of read delay center optimization
721 11:24:21.375395 INFO : End of max read latency training
722 11:24:21.380530 INFO : Training has run successfully!
723 11:24:21.380994 1D training succeed
724 11:24:21.389343 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
725 11:24:21.436430 Check phy result
726 11:24:21.436915 INFO : End of initialization
727 11:24:21.458466 INFO : End of 2D read delay Voltage center optimization
728 11:24:21.478336 INFO : End of 2D read delay Voltage center optimization
729 11:24:21.530363 INFO : End of 2D write delay Voltage center optimization
730 11:24:21.580643 INFO : End of 2D write delay Voltage center optimization
731 11:24:21.586242 INFO : Training has run successfully!
732 11:24:21.586708
733 11:24:21.587156 channel==0
734 11:24:21.591918 RxClkDly_Margin_A0==88 ps 9
735 11:24:21.592428 TxDqDly_Margin_A0==98 ps 10
736 11:24:21.597460 RxClkDly_Margin_A1==88 ps 9
737 11:24:21.597947 TxDqDly_Margin_A1==98 ps 10
738 11:24:21.598399 TrainedVREFDQ_A0==74
739 11:24:21.603059 TrainedVREFDQ_A1==74
740 11:24:21.603552 VrefDac_Margin_A0==25
741 11:24:21.604022 DeviceVref_Margin_A0==40
742 11:24:21.608691 VrefDac_Margin_A1==25
743 11:24:21.609170 DeviceVref_Margin_A1==40
744 11:24:21.609613
745 11:24:21.610058
746 11:24:21.614223 channel==1
747 11:24:21.614718 RxClkDly_Margin_A0==98 ps 10
748 11:24:21.615166 TxDqDly_Margin_A0==98 ps 10
749 11:24:21.619850 RxClkDly_Margin_A1==88 ps 9
750 11:24:21.620388 TxDqDly_Margin_A1==88 ps 9
751 11:24:21.625467 TrainedVREFDQ_A0==77
752 11:24:21.625959 TrainedVREFDQ_A1==77
753 11:24:21.626415 VrefDac_Margin_A0==22
754 11:24:21.631036 DeviceVref_Margin_A0==37
755 11:24:21.631517 VrefDac_Margin_A1==24
756 11:24:21.636640 DeviceVref_Margin_A1==37
757 11:24:21.637127
758 11:24:21.637575 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
759 11:24:21.638018
760 11:24:21.670235 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 0000005f
761 11:24:21.670772 2D training succeed
762 11:24:21.675788 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
763 11:24:21.681421 auto size-- 65535DDR cs0 size: 2048MB
764 11:24:21.681924 DDR cs1 size: 2048MB
765 11:24:21.687079 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
766 11:24:21.687581 cs0 DataBus test pass
767 11:24:21.692659 cs1 DataBus test pass
768 11:24:21.693159 cs0 AddrBus test pass
769 11:24:21.693611 cs1 AddrBus test pass
770 11:24:21.694052
771 11:24:21.698232 100bdlr_step_size ps== 420
772 11:24:21.698719 result report
773 11:24:21.703841 boot times 0Enable ddr reg access
774 11:24:21.708380 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
775 11:24:21.722398 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
776 11:24:22.295760 0.0;M3 CHK:0;cm4_sp_mode 0
777 11:24:22.296392 MVN_1=0x00000000
778 11:24:22.301301 MVN_2=0x00000000
779 11:24:22.307039 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
780 11:24:22.307574 OPS=0x10
781 11:24:22.308049 ring efuse init
782 11:24:22.308491 chipver efuse init
783 11:24:22.312588 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
784 11:24:22.318203 [0.018961 Inits done]
785 11:24:22.318661 secure task start!
786 11:24:22.319094 high task start!
787 11:24:22.321842 low task start!
788 11:24:22.322303 run into bl31
789 11:24:22.329469 NOTICE: BL31: v1.3(release):4fc40b1
790 11:24:22.337364 NOTICE: BL31: Built : 15:58:17, May 22 2019
791 11:24:22.337836 NOTICE: BL31: G12A normal boot!
792 11:24:22.362668 NOTICE: BL31: BL33 decompress pass
793 11:24:22.368276 ERROR: Error initializing runtime service opteed_fast
794 11:24:23.601264
795 11:24:23.601875
796 11:24:23.609655 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
797 11:24:23.610145
798 11:24:23.610594 Model: Libre Computer AML-A311D-CC Alta
799 11:24:23.818140 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
800 11:24:23.840657 DRAM: 2 GiB (effective 3.8 GiB)
801 11:24:23.984405 Core: 408 devices, 31 uclasses, devicetree: separate
802 11:24:23.989274 WDT: Not starting watchdog@f0d0
803 11:24:24.022476 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
804 11:24:24.034943 Loading Environment from FAT... Card did not respond to voltage select! : -110
805 11:24:24.039014 ** Bad device specification mmc 0 **
806 11:24:24.050364 Card did not respond to voltage select! : -110
807 11:24:24.057137 ** Bad device specification mmc 0 **
808 11:24:24.057613 Couldn't find partition mmc 0
809 11:24:24.066254 Card did not respond to voltage select! : -110
810 11:24:24.071833 ** Bad device specification mmc 0 **
811 11:24:24.072365 Couldn't find partition mmc 0
812 11:24:24.076590 Error: could not access storage.
813 11:24:24.418843 Net: eth0: ethernet@ff3f0000
814 11:24:24.419413 starting USB...
815 11:24:24.671094 Bus usb@ff500000: Register 3000140 NbrPorts 3
816 11:24:24.671619 Starting the controller
817 11:24:24.677126 USB XHCI 1.10
818 11:24:26.840406 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
819 11:24:26.841029 bl2_stage_init 0x01
820 11:24:26.841489 bl2_stage_init 0x81
821 11:24:26.846093 hw id: 0x0000 - pwm id 0x01
822 11:24:26.846574 bl2_stage_init 0xc1
823 11:24:26.847023 bl2_stage_init 0x02
824 11:24:26.847467
825 11:24:26.851576 L0:00000000
826 11:24:26.852080 L1:20000703
827 11:24:26.852531 L2:00008067
828 11:24:26.852968 L3:14000000
829 11:24:26.857212 B2:00402000
830 11:24:26.857688 B1:e0f83180
831 11:24:26.858136
832 11:24:26.858577 TE: 58159
833 11:24:26.859015
834 11:24:26.862848 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 11:24:26.863326
836 11:24:26.863777 Board ID = 1
837 11:24:26.868369 Set A53 clk to 24M
838 11:24:26.868839 Set A73 clk to 24M
839 11:24:26.869280 Set clk81 to 24M
840 11:24:26.874103 A53 clk: 1200 MHz
841 11:24:26.874572 A73 clk: 1200 MHz
842 11:24:26.875015 CLK81: 166.6M
843 11:24:26.875453 smccc: 00012ab5
844 11:24:26.879570 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 11:24:26.885162 board id: 1
846 11:24:26.891153 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 11:24:26.901733 fw parse done
848 11:24:26.907687 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 11:24:26.950317 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 11:24:26.961236 PIEI prepare done
851 11:24:26.961702 fastboot data load
852 11:24:26.962149 fastboot data verify
853 11:24:26.966916 verify result: 266
854 11:24:26.972465 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 11:24:26.972935 LPDDR4 probe
856 11:24:26.973381 ddr clk to 1584MHz
857 11:24:26.980456 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 11:24:27.017692
859 11:24:27.018158 dmc_version 0001
860 11:24:27.024368 Check phy result
861 11:24:27.030255 INFO : End of CA training
862 11:24:27.030732 INFO : End of initialization
863 11:24:27.035910 INFO : Training has run successfully!
864 11:24:27.036416 Check phy result
865 11:24:27.041471 INFO : End of initialization
866 11:24:27.041939 INFO : End of read enable training
867 11:24:27.047159 INFO : End of fine write leveling
868 11:24:27.052650 INFO : End of Write leveling coarse delay
869 11:24:27.053116 INFO : Training has run successfully!
870 11:24:27.053559 Check phy result
871 11:24:27.058248 INFO : End of initialization
872 11:24:27.058714 INFO : End of read dq deskew training
873 11:24:27.063911 INFO : End of MPR read delay center optimization
874 11:24:27.069493 INFO : End of write delay center optimization
875 11:24:27.075168 INFO : End of read delay center optimization
876 11:24:27.075632 INFO : End of max read latency training
877 11:24:27.080664 INFO : Training has run successfully!
878 11:24:27.081131 1D training succeed
879 11:24:27.089870 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 11:24:27.137413 Check phy result
881 11:24:27.137876 INFO : End of initialization
882 11:24:27.159257 INFO : End of 2D read delay Voltage center optimization
883 11:24:27.178591 INFO : End of 2D read delay Voltage center optimization
884 11:24:27.230669 INFO : End of 2D write delay Voltage center optimization
885 11:24:27.280041 INFO : End of 2D write delay Voltage center optimization
886 11:24:27.285590 INFO : Training has run successfully!
887 11:24:27.286054
888 11:24:27.286500 channel==0
889 11:24:27.291194 RxClkDly_Margin_A0==88 ps 9
890 11:24:27.291657 TxDqDly_Margin_A0==98 ps 10
891 11:24:27.296782 RxClkDly_Margin_A1==88 ps 9
892 11:24:27.297247 TxDqDly_Margin_A1==98 ps 10
893 11:24:27.297712 TrainedVREFDQ_A0==74
894 11:24:27.302408 TrainedVREFDQ_A1==74
895 11:24:27.302924 VrefDac_Margin_A0==25
896 11:24:27.303371 DeviceVref_Margin_A0==40
897 11:24:27.308043 VrefDac_Margin_A1==25
898 11:24:27.308539 DeviceVref_Margin_A1==40
899 11:24:27.308970
900 11:24:27.309395
901 11:24:27.313596 channel==1
902 11:24:27.314071 RxClkDly_Margin_A0==88 ps 9
903 11:24:27.314501 TxDqDly_Margin_A0==88 ps 9
904 11:24:27.319185 RxClkDly_Margin_A1==88 ps 9
905 11:24:27.319640 TxDqDly_Margin_A1==88 ps 9
906 11:24:27.324823 TrainedVREFDQ_A0==77
907 11:24:27.325295 TrainedVREFDQ_A1==77
908 11:24:27.325726 VrefDac_Margin_A0==23
909 11:24:27.330387 DeviceVref_Margin_A0==37
910 11:24:27.330838 VrefDac_Margin_A1==24
911 11:24:27.336039 DeviceVref_Margin_A1==37
912 11:24:27.336492
913 11:24:27.336920 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 11:24:27.337347
915 11:24:27.369594 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
916 11:24:27.370104 2D training succeed
917 11:24:27.375193 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 11:24:27.380795 auto size-- 65535DDR cs0 size: 2048MB
919 11:24:27.381251 DDR cs1 size: 2048MB
920 11:24:27.386376 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 11:24:27.386824 cs0 DataBus test pass
922 11:24:27.392033 cs1 DataBus test pass
923 11:24:27.392503 cs0 AddrBus test pass
924 11:24:27.392926 cs1 AddrBus test pass
925 11:24:27.393349
926 11:24:27.397588 100bdlr_step_size ps== 420
927 11:24:27.398173 result report
928 11:24:27.403208 boot times 0Enable ddr reg access
929 11:24:27.408371 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 11:24:27.421871 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 11:24:27.995453 0.0;M3 CHK:0;cm4_sp_mode 0
932 11:24:27.996085 MVN_1=0x00000000
933 11:24:28.000976 MVN_2=0x00000000
934 11:24:28.006735 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 11:24:28.007211 OPS=0x10
936 11:24:28.007660 ring efuse init
937 11:24:28.008143 chipver efuse init
938 11:24:28.012317 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 11:24:28.017997 [0.018961 Inits done]
940 11:24:28.018474 secure task start!
941 11:24:28.018920 high task start!
942 11:24:28.022489 low task start!
943 11:24:28.022952 run into bl31
944 11:24:28.029241 NOTICE: BL31: v1.3(release):4fc40b1
945 11:24:28.036967 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 11:24:28.037441 NOTICE: BL31: G12A normal boot!
947 11:24:28.062298 NOTICE: BL31: BL33 decompress pass
948 11:24:28.068005 ERROR: Error initializing runtime service opteed_fast
949 11:24:29.301016
950 11:24:29.301634
951 11:24:29.309534 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 11:24:29.310015
953 11:24:29.310463 Model: Libre Computer AML-A311D-CC Alta
954 11:24:29.517909 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 11:24:29.541260 DRAM: 2 GiB (effective 3.8 GiB)
956 11:24:29.684168 Core: 408 devices, 31 uclasses, devicetree: separate
957 11:24:29.690049 WDT: Not starting watchdog@f0d0
958 11:24:29.722403 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 11:24:29.734735 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 11:24:29.739785 ** Bad device specification mmc 0 **
961 11:24:29.750096 Card did not respond to voltage select! : -110
962 11:24:29.757702 ** Bad device specification mmc 0 **
963 11:24:29.758177 Couldn't find partition mmc 0
964 11:24:29.766113 Card did not respond to voltage select! : -110
965 11:24:29.771624 ** Bad device specification mmc 0 **
966 11:24:29.772120 Couldn't find partition mmc 0
967 11:24:29.776702 Error: could not access storage.
968 11:24:30.120234 Net: eth0: ethernet@ff3f0000
969 11:24:30.120810 starting USB...
970 11:24:30.372094 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 11:24:30.372621 Starting the controller
972 11:24:30.379025 USB XHCI 1.10
973 11:24:32.240265 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
974 11:24:32.240915 bl2_stage_init 0x01
975 11:24:32.241399 bl2_stage_init 0x81
976 11:24:32.245766 hw id: 0x0000 - pwm id 0x01
977 11:24:32.246302 bl2_stage_init 0xc1
978 11:24:32.246784 bl2_stage_init 0x02
979 11:24:32.247246
980 11:24:32.251276 L0:00000000
981 11:24:32.251788 L1:20000703
982 11:24:32.252282 L2:00008067
983 11:24:32.252732 L3:14000000
984 11:24:32.254409 B2:00402000
985 11:24:32.254876 B1:e0f83180
986 11:24:32.255324
987 11:24:32.255767 TE: 58124
988 11:24:32.256243
989 11:24:32.265440 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
990 11:24:32.265921
991 11:24:32.266367 Board ID = 1
992 11:24:32.266805 Set A53 clk to 24M
993 11:24:32.267235 Set A73 clk to 24M
994 11:24:32.271122 Set clk81 to 24M
995 11:24:32.271581 A53 clk: 1200 MHz
996 11:24:32.272077 A73 clk: 1200 MHz
997 11:24:32.276708 CLK81: 166.6M
998 11:24:32.277189 smccc: 00012a92
999 11:24:32.282243 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
1000 11:24:32.282722 board id: 1
1001 11:24:32.290807 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
1002 11:24:32.301443 fw parse done
1003 11:24:32.307439 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
1004 11:24:32.349987 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
1005 11:24:32.360844 PIEI prepare done
1006 11:24:32.361310 fastboot data load
1007 11:24:32.362123 fastboot data verify
1008 11:24:32.366528 verify result: 266
1009 11:24:32.372161 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
1010 11:24:32.372654 LPDDR4 probe
1011 11:24:32.373100 ddr clk to 1584MHz
1012 11:24:32.380103 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
1013 11:24:32.416530
1014 11:24:32.417027 dmc_version 0001
1015 11:24:32.424052 Check phy result
1016 11:24:32.429890 INFO : End of CA training
1017 11:24:32.430354 INFO : End of initialization
1018 11:24:32.435477 INFO : Training has run successfully!
1019 11:24:32.435939 Check phy result
1020 11:24:32.441108 INFO : End of initialization
1021 11:24:32.441571 INFO : End of read enable training
1022 11:24:32.444371 INFO : End of fine write leveling
1023 11:24:32.449905 INFO : End of Write leveling coarse delay
1024 11:24:32.455538 INFO : Training has run successfully!
1025 11:24:32.456101 Check phy result
1026 11:24:32.456563 INFO : End of initialization
1027 11:24:32.461126 INFO : End of read dq deskew training
1028 11:24:32.466683 INFO : End of MPR read delay center optimization
1029 11:24:32.467161 INFO : End of write delay center optimization
1030 11:24:32.472318 INFO : End of read delay center optimization
1031 11:24:32.477920 INFO : End of max read latency training
1032 11:24:32.478391 INFO : Training has run successfully!
1033 11:24:32.483570 1D training succeed
1034 11:24:32.489522 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1035 11:24:32.537091 Check phy result
1036 11:24:32.537580 INFO : End of initialization
1037 11:24:32.557903 INFO : End of 2D read delay Voltage center optimization
1038 11:24:32.578291 INFO : End of 2D read delay Voltage center optimization
1039 11:24:32.630288 INFO : End of 2D write delay Voltage center optimization
1040 11:24:32.679667 INFO : End of 2D write delay Voltage center optimization
1041 11:24:32.685273 INFO : Training has run successfully!
1042 11:24:32.685750
1043 11:24:32.686204 channel==0
1044 11:24:32.690738 RxClkDly_Margin_A0==88 ps 9
1045 11:24:32.691233 TxDqDly_Margin_A0==98 ps 10
1046 11:24:32.694222 RxClkDly_Margin_A1==88 ps 9
1047 11:24:32.694697 TxDqDly_Margin_A1==88 ps 9
1048 11:24:32.699763 TrainedVREFDQ_A0==74
1049 11:24:32.700279 TrainedVREFDQ_A1==74
1050 11:24:32.700729 VrefDac_Margin_A0==25
1051 11:24:32.705403 DeviceVref_Margin_A0==40
1052 11:24:32.705881 VrefDac_Margin_A1==25
1053 11:24:32.710980 DeviceVref_Margin_A1==40
1054 11:24:32.711453
1055 11:24:32.711901
1056 11:24:32.712381 channel==1
1057 11:24:32.712816 RxClkDly_Margin_A0==88 ps 9
1058 11:24:32.716488 TxDqDly_Margin_A0==98 ps 10
1059 11:24:32.716962 RxClkDly_Margin_A1==88 ps 9
1060 11:24:32.722133 TxDqDly_Margin_A1==88 ps 9
1061 11:24:32.722609 TrainedVREFDQ_A0==77
1062 11:24:32.723054 TrainedVREFDQ_A1==77
1063 11:24:32.727752 VrefDac_Margin_A0==23
1064 11:24:32.728256 DeviceVref_Margin_A0==37
1065 11:24:32.733369 VrefDac_Margin_A1==24
1066 11:24:32.733834 DeviceVref_Margin_A1==37
1067 11:24:32.734278
1068 11:24:32.738979 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1069 11:24:32.739451
1070 11:24:32.766980 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000018 00000018 00000019 0000001a 00000018 00000017 00000019 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
1071 11:24:32.772512 2D training succeed
1072 11:24:32.778013 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1073 11:24:32.778490 auto size-- 65535DDR cs0 size: 2048MB
1074 11:24:32.783615 DDR cs1 size: 2048MB
1075 11:24:32.784120 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1076 11:24:32.789260 cs0 DataBus test pass
1077 11:24:32.789731 cs1 DataBus test pass
1078 11:24:32.790172 cs0 AddrBus test pass
1079 11:24:32.794890 cs1 AddrBus test pass
1080 11:24:32.795359
1081 11:24:32.795801 100bdlr_step_size ps== 420
1082 11:24:32.796290 result report
1083 11:24:32.800428 boot times 0Enable ddr reg access
1084 11:24:32.807973 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1085 11:24:32.821375 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1086 11:24:33.395149 0.0;M3 CHK:0;cm4_sp_mode 0
1087 11:24:33.395706 MVN_1=0x00000000
1088 11:24:33.400657 MVN_2=0x00000000
1089 11:24:33.406381 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1090 11:24:33.406861 OPS=0x10
1091 11:24:33.407309 ring efuse init
1092 11:24:33.407744 chipver efuse init
1093 11:24:33.412078 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1094 11:24:33.417613 [0.018961 Inits done]
1095 11:24:33.418091 secure task start!
1096 11:24:33.418534 high task start!
1097 11:24:33.422185 low task start!
1098 11:24:33.422653 run into bl31
1099 11:24:33.428812 NOTICE: BL31: v1.3(release):4fc40b1
1100 11:24:33.436643 NOTICE: BL31: Built : 15:58:17, May 22 2019
1101 11:24:33.437123 NOTICE: BL31: G12A normal boot!
1102 11:24:33.462145 NOTICE: BL31: BL33 decompress pass
1103 11:24:33.467758 ERROR: Error initializing runtime service opteed_fast
1104 11:24:34.700685
1105 11:24:34.701362
1106 11:24:34.709211 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1107 11:24:34.709779
1108 11:24:34.710244 Model: Libre Computer AML-A311D-CC Alta
1109 11:24:34.916553 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1110 11:24:34.940822 DRAM: 2 GiB (effective 3.8 GiB)
1111 11:24:35.083863 Core: 408 devices, 31 uclasses, devicetree: separate
1112 11:24:35.089655 WDT: Not starting watchdog@f0d0
1113 11:24:35.121953 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1114 11:24:35.134379 Loading Environment from FAT... Card did not respond to voltage select! : -110
1115 11:24:35.139342 ** Bad device specification mmc 0 **
1116 11:24:35.149699 Card did not respond to voltage select! : -110
1117 11:24:35.157369 ** Bad device specification mmc 0 **
1118 11:24:35.157848 Couldn't find partition mmc 0
1119 11:24:35.165750 Card did not respond to voltage select! : -110
1120 11:24:35.171334 ** Bad device specification mmc 0 **
1121 11:24:35.171809 Couldn't find partition mmc 0
1122 11:24:35.176316 Error: could not access storage.
1123 11:24:35.519767 Net: eth0: ethernet@ff3f0000
1124 11:24:35.520381 starting USB...
1125 11:24:35.771617 Bus usb@ff500000: Register 3000140 NbrPorts 3
1126 11:24:35.772215 Starting the controller
1127 11:24:35.778514 USB XHCI 1.10
1128 11:24:37.332768 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1129 11:24:37.340937 scanning usb for storage devices... 0 Storage Device(s) found
1131 11:24:37.392643 Hit any key to stop autoboot: 1
1132 11:24:37.393433 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1133 11:24:37.394057 start: 2.4.3 bootloader-commands (timeout 00:04:23) [common]
1134 11:24:37.394597 Setting prompt string to ['=>']
1135 11:24:37.395114 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:23)
1136 11:24:37.408341 0
1137 11:24:37.409237 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1138 11:24:37.409765 Sending with 10 millisecond of delay
1140 11:24:38.544477 => setenv autoload no
1141 11:24:38.555240 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1142 11:24:38.560557 setenv autoload no
1143 11:24:38.561334 Sending with 10 millisecond of delay
1145 11:24:40.358100 => setenv initrd_high 0xffffffff
1146 11:24:40.368868 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:20)
1147 11:24:40.369739 setenv initrd_high 0xffffffff
1148 11:24:40.370489 Sending with 10 millisecond of delay
1150 11:24:41.986721 => setenv fdt_high 0xffffffff
1151 11:24:41.997536 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1152 11:24:41.998398 setenv fdt_high 0xffffffff
1153 11:24:41.999152 Sending with 10 millisecond of delay
1155 11:24:42.291070 => dhcp
1156 11:24:42.301847 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1157 11:24:42.302746 dhcp
1158 11:24:42.303220 Speed: 1000, full duplex
1159 11:24:42.303670 BOOTP broadcast 1
1160 11:24:42.550121 BOOTP broadcast 2
1161 11:24:42.564435 DHCP client bound to address 192.168.6.33 (263 ms)
1162 11:24:42.565273 Sending with 10 millisecond of delay
1164 11:24:44.241723 => setenv serverip 192.168.6.2
1165 11:24:44.252538 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1166 11:24:44.253432 setenv serverip 192.168.6.2
1167 11:24:44.254182 Sending with 10 millisecond of delay
1169 11:24:47.977646 => tftpboot 0x01080000 715457/tftp-deploy-sxq4ws79/kernel/uImage
1170 11:24:47.988469 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1171 11:24:47.989392 tftpboot 0x01080000 715457/tftp-deploy-sxq4ws79/kernel/uImage
1172 11:24:47.989859 Speed: 1000, full duplex
1173 11:24:47.990298 Using ethernet@ff3f0000 device
1174 11:24:47.991334 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1175 11:24:47.996705 Filename '715457/tftp-deploy-sxq4ws79/kernel/uImage'.
1176 11:24:48.000690 Load address: 0x1080000
1177 11:24:50.946313 Loading: *################################################## 43.6 MiB
1178 11:24:50.946935 14.8 MiB/s
1179 11:24:50.947409 done
1180 11:24:50.950571 Bytes transferred = 45742656 (2b9fa40 hex)
1181 11:24:50.951342 Sending with 10 millisecond of delay
1183 11:24:55.637569 => tftpboot 0x08000000 715457/tftp-deploy-sxq4ws79/ramdisk/ramdisk.cpio.gz.uboot
1184 11:24:55.648419 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:05)
1185 11:24:55.649328 tftpboot 0x08000000 715457/tftp-deploy-sxq4ws79/ramdisk/ramdisk.cpio.gz.uboot
1186 11:24:55.649798 Speed: 1000, full duplex
1187 11:24:55.650237 Using ethernet@ff3f0000 device
1188 11:24:55.651239 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1189 11:24:55.663162 Filename '715457/tftp-deploy-sxq4ws79/ramdisk/ramdisk.cpio.gz.uboot'.
1190 11:24:55.663674 Load address: 0x8000000
1191 11:24:57.197912 Loading: *############# UDP wrong checksum 000000ff 0000becc
1192 11:24:57.215363 UDP wrong checksum 000000ff 000048bf
1193 11:25:02.839428 T #################################### UDP wrong checksum 00000005 000012a6
1194 11:25:07.840601 T UDP wrong checksum 00000005 000012a6
1195 11:25:17.842687 T T UDP wrong checksum 00000005 000012a6
1196 11:25:37.846790 T T T T UDP wrong checksum 00000005 000012a6
1197 11:25:52.850928 T T
1198 11:25:52.851569 Retry count exceeded; starting again
1200 11:25:52.853079 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1203 11:25:52.854969 end: 2.4 uboot-commands (duration 00:01:52) [common]
1205 11:25:52.856490 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1207 11:25:52.857517 end: 2 uboot-action (duration 00:01:52) [common]
1209 11:25:52.859046 Cleaning after the job
1210 11:25:52.859582 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/ramdisk
1211 11:25:52.860885 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/kernel
1212 11:25:52.906514 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/dtb
1213 11:25:52.907313 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/nfsrootfs
1214 11:25:53.078299 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/715457/tftp-deploy-sxq4ws79/modules
1215 11:25:53.098630 start: 4.1 power-off (timeout 00:00:30) [common]
1216 11:25:53.099281 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1217 11:25:53.135168 >> OK - accepted request
1218 11:25:53.137311 Returned 0 in 0 seconds
1219 11:25:53.238044 end: 4.1 power-off (duration 00:00:00) [common]
1221 11:25:53.239039 start: 4.2 read-feedback (timeout 00:10:00) [common]
1222 11:25:53.239691 Listened to connection for namespace 'common' for up to 1s
1223 11:25:54.240654 Finalising connection for namespace 'common'
1224 11:25:54.241137 Disconnecting from shell: Finalise
1225 11:25:54.241429 =>
1226 11:25:54.342141 end: 4.2 read-feedback (duration 00:00:01) [common]
1227 11:25:54.342796 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/715457
1228 11:25:57.337555 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/715457
1229 11:25:57.338178 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.