Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 05:43:34.642772 lava-dispatcher, installed at version: 2024.01
2 05:43:34.643555 start: 0 validate
3 05:43:34.644051 Start time: 2024-10-03 05:43:34.644021+00:00 (UTC)
4 05:43:34.644603 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 05:43:34.645119 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 05:43:34.683202 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 05:43:34.683784 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241003%2Farm64%2Fdefconfig%2BCONFIG_RANDOMIZE_BASE%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 05:43:35.739201 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 05:43:35.739864 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241003%2Farm64%2Fdefconfig%2BCONFIG_RANDOMIZE_BASE%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 05:43:40.812266 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 05:43:40.812746 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241003%2Farm64%2Fdefconfig%2BCONFIG_RANDOMIZE_BASE%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
12 05:43:41.878178 validate duration: 7.23
14 05:43:41.879595 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 05:43:41.880085 start: 1.1 download-retry (timeout 00:10:00) [common]
16 05:43:41.880741 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 05:43:41.881871 Not decompressing ramdisk as can be used compressed.
18 05:43:41.882909 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 05:43:41.883437 saving as /var/lib/lava/dispatcher/tmp/796784/tftp-deploy-l9py_ek8/ramdisk/rootfs.cpio.gz
20 05:43:41.884101 total size: 8181887 (7 MB)
21 05:43:41.932934 progress 0 % (0 MB)
22 05:43:41.944236 progress 5 % (0 MB)
23 05:43:41.954975 progress 10 % (0 MB)
24 05:43:41.966395 progress 15 % (1 MB)
25 05:43:41.974621 progress 20 % (1 MB)
26 05:43:41.980579 progress 25 % (1 MB)
27 05:43:41.986008 progress 30 % (2 MB)
28 05:43:41.991823 progress 35 % (2 MB)
29 05:43:41.997269 progress 40 % (3 MB)
30 05:43:42.003197 progress 45 % (3 MB)
31 05:43:42.008936 progress 50 % (3 MB)
32 05:43:42.014720 progress 55 % (4 MB)
33 05:43:42.019969 progress 60 % (4 MB)
34 05:43:42.025721 progress 65 % (5 MB)
35 05:43:42.031074 progress 70 % (5 MB)
36 05:43:42.036719 progress 75 % (5 MB)
37 05:43:42.042082 progress 80 % (6 MB)
38 05:43:42.047788 progress 85 % (6 MB)
39 05:43:42.053095 progress 90 % (7 MB)
40 05:43:42.059029 progress 95 % (7 MB)
41 05:43:42.064399 progress 100 % (7 MB)
42 05:43:42.065059 7 MB downloaded in 0.18 s (43.12 MB/s)
43 05:43:42.065619 end: 1.1.1 http-download (duration 00:00:00) [common]
45 05:43:42.066568 end: 1.1 download-retry (duration 00:00:00) [common]
46 05:43:42.066893 start: 1.2 download-retry (timeout 00:10:00) [common]
47 05:43:42.067195 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 05:43:42.067703 downloading http://storage.kernelci.org/next/master/next-20241003/arm64/defconfig+CONFIG_RANDOMIZE_BASE=y/gcc-12/kernel/Image
49 05:43:42.067946 saving as /var/lib/lava/dispatcher/tmp/796784/tftp-deploy-l9py_ek8/kernel/Image
50 05:43:42.068217 total size: 45713920 (43 MB)
51 05:43:42.068447 No compression specified
52 05:43:42.107089 progress 0 % (0 MB)
53 05:43:42.136317 progress 5 % (2 MB)
54 05:43:42.166202 progress 10 % (4 MB)
55 05:43:42.196003 progress 15 % (6 MB)
56 05:43:42.226111 progress 20 % (8 MB)
57 05:43:42.255600 progress 25 % (10 MB)
58 05:43:42.288258 progress 30 % (13 MB)
59 05:43:42.320579 progress 35 % (15 MB)
60 05:43:42.350572 progress 40 % (17 MB)
61 05:43:42.379341 progress 45 % (19 MB)
62 05:43:42.408843 progress 50 % (21 MB)
63 05:43:42.440949 progress 55 % (24 MB)
64 05:43:42.471823 progress 60 % (26 MB)
65 05:43:42.503145 progress 65 % (28 MB)
66 05:43:42.532331 progress 70 % (30 MB)
67 05:43:42.562365 progress 75 % (32 MB)
68 05:43:42.593526 progress 80 % (34 MB)
69 05:43:42.622216 progress 85 % (37 MB)
70 05:43:42.651124 progress 90 % (39 MB)
71 05:43:42.680352 progress 95 % (41 MB)
72 05:43:42.708791 progress 100 % (43 MB)
73 05:43:42.709327 43 MB downloaded in 0.64 s (68.00 MB/s)
74 05:43:42.709811 end: 1.2.1 http-download (duration 00:00:01) [common]
76 05:43:42.710623 end: 1.2 download-retry (duration 00:00:01) [common]
77 05:43:42.710895 start: 1.3 download-retry (timeout 00:09:59) [common]
78 05:43:42.711157 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 05:43:42.711627 downloading http://storage.kernelci.org/next/master/next-20241003/arm64/defconfig+CONFIG_RANDOMIZE_BASE=y/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 05:43:42.711897 saving as /var/lib/lava/dispatcher/tmp/796784/tftp-deploy-l9py_ek8/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 05:43:42.712133 total size: 53209 (0 MB)
82 05:43:42.712344 No compression specified
83 05:43:42.754827 progress 61 % (0 MB)
84 05:43:42.755676 progress 100 % (0 MB)
85 05:43:42.756245 0 MB downloaded in 0.04 s (1.15 MB/s)
86 05:43:42.756740 end: 1.3.1 http-download (duration 00:00:00) [common]
88 05:43:42.757574 end: 1.3 download-retry (duration 00:00:00) [common]
89 05:43:42.757838 start: 1.4 download-retry (timeout 00:09:59) [common]
90 05:43:42.758102 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 05:43:42.758571 downloading http://storage.kernelci.org/next/master/next-20241003/arm64/defconfig+CONFIG_RANDOMIZE_BASE=y/gcc-12/modules.tar.xz
92 05:43:42.758813 saving as /var/lib/lava/dispatcher/tmp/796784/tftp-deploy-l9py_ek8/modules/modules.tar
93 05:43:42.759016 total size: 11621592 (11 MB)
94 05:43:42.759229 Using unxz to decompress xz
95 05:43:42.799146 progress 0 % (0 MB)
96 05:43:42.874608 progress 5 % (0 MB)
97 05:43:42.955435 progress 10 % (1 MB)
98 05:43:43.044326 progress 15 % (1 MB)
99 05:43:43.122116 progress 20 % (2 MB)
100 05:43:43.206056 progress 25 % (2 MB)
101 05:43:43.286786 progress 30 % (3 MB)
102 05:43:43.368305 progress 35 % (3 MB)
103 05:43:43.444316 progress 40 % (4 MB)
104 05:43:43.522631 progress 45 % (5 MB)
105 05:43:43.600738 progress 50 % (5 MB)
106 05:43:43.677578 progress 55 % (6 MB)
107 05:43:43.759184 progress 60 % (6 MB)
108 05:43:43.846586 progress 65 % (7 MB)
109 05:43:43.930478 progress 70 % (7 MB)
110 05:43:44.023342 progress 75 % (8 MB)
111 05:43:44.119707 progress 80 % (8 MB)
112 05:43:44.201793 progress 85 % (9 MB)
113 05:43:44.277936 progress 90 % (10 MB)
114 05:43:44.351318 progress 95 % (10 MB)
115 05:43:44.428008 progress 100 % (11 MB)
116 05:43:44.441398 11 MB downloaded in 1.68 s (6.59 MB/s)
117 05:43:44.441981 end: 1.4.1 http-download (duration 00:00:02) [common]
119 05:43:44.442796 end: 1.4 download-retry (duration 00:00:02) [common]
120 05:43:44.443065 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 05:43:44.443332 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 05:43:44.443581 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 05:43:44.443836 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 05:43:44.444851 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p
125 05:43:44.445758 makedir: /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin
126 05:43:44.446447 makedir: /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/tests
127 05:43:44.447116 makedir: /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/results
128 05:43:44.447771 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-add-keys
129 05:43:44.448842 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-add-sources
130 05:43:44.449855 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-background-process-start
131 05:43:44.450875 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-background-process-stop
132 05:43:44.451972 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-common-functions
133 05:43:44.453055 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-echo-ipv4
134 05:43:44.454033 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-install-packages
135 05:43:44.455007 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-installed-packages
136 05:43:44.455973 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-os-build
137 05:43:44.456999 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-probe-channel
138 05:43:44.457985 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-probe-ip
139 05:43:44.458957 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-target-ip
140 05:43:44.459955 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-target-mac
141 05:43:44.460999 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-target-storage
142 05:43:44.461998 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-test-case
143 05:43:44.462977 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-test-event
144 05:43:44.463933 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-test-feedback
145 05:43:44.464957 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-test-raise
146 05:43:44.465932 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-test-reference
147 05:43:44.466907 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-test-runner
148 05:43:44.467895 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-test-set
149 05:43:44.468918 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-test-shell
150 05:43:44.469900 Updating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-install-packages (oe)
151 05:43:44.470956 Updating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/bin/lava-installed-packages (oe)
152 05:43:44.471857 Creating /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/environment
153 05:43:44.472680 LAVA metadata
154 05:43:44.473212 - LAVA_JOB_ID=796784
155 05:43:44.473682 - LAVA_DISPATCHER_IP=192.168.6.2
156 05:43:44.474416 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 05:43:44.476427 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 05:43:44.477021 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 05:43:44.477434 skipped lava-vland-overlay
160 05:43:44.477915 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 05:43:44.478419 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 05:43:44.478847 skipped lava-multinode-overlay
163 05:43:44.479327 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 05:43:44.479826 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 05:43:44.480380 Loading test definitions
166 05:43:44.480939 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 05:43:44.481375 Using /lava-796784 at stage 0
168 05:43:44.483289 uuid=796784_1.5.2.4.1 testdef=None
169 05:43:44.483620 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 05:43:44.483894 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 05:43:44.487221 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 05:43:44.488795 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 05:43:44.493068 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 05:43:44.494734 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 05:43:44.498929 runner path: /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/0/tests/0_dmesg test_uuid 796784_1.5.2.4.1
178 05:43:44.499922 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 05:43:44.501467 Creating lava-test-runner.conf files
181 05:43:44.501867 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/796784/lava-overlay-4vpn9d3p/lava-796784/0 for stage 0
182 05:43:44.502494 - 0_dmesg
183 05:43:44.503135 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 05:43:44.503667 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 05:43:44.527846 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 05:43:44.528287 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 05:43:44.528556 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 05:43:44.528824 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 05:43:44.529089 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 05:43:45.508983 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 05:43:45.509444 start: 1.5.4 extract-modules (timeout 00:09:56) [common]
192 05:43:45.509692 extracting modules file /var/lib/lava/dispatcher/tmp/796784/tftp-deploy-l9py_ek8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/796784/extract-overlay-ramdisk-jlwqhl5o/ramdisk
193 05:43:46.968192 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 05:43:46.968774 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 05:43:46.969111 [common] Applying overlay /var/lib/lava/dispatcher/tmp/796784/compress-overlay-0y3g_fwu/overlay-1.5.2.5.tar.gz to ramdisk
196 05:43:46.969375 [common] Applying overlay /var/lib/lava/dispatcher/tmp/796784/compress-overlay-0y3g_fwu/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/796784/extract-overlay-ramdisk-jlwqhl5o/ramdisk
197 05:43:47.007353 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 05:43:47.007876 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 05:43:47.008255 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 05:43:47.008527 Converting downloaded kernel to a uImage
201 05:43:47.008898 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/796784/tftp-deploy-l9py_ek8/kernel/Image /var/lib/lava/dispatcher/tmp/796784/tftp-deploy-l9py_ek8/kernel/uImage
202 05:43:47.457800 output: Image Name:
203 05:43:47.458213 output: Created: Thu Oct 3 05:43:47 2024
204 05:43:47.458494 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 05:43:47.458764 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 05:43:47.458995 output: Load Address: 01080000
207 05:43:47.459197 output: Entry Point: 01080000
208 05:43:47.459396 output:
209 05:43:47.459729 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 05:43:47.460051 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 05:43:47.460340 start: 1.5.7 configure-preseed-file (timeout 00:09:54) [common]
212 05:43:47.460597 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 05:43:47.460856 start: 1.5.8 compress-ramdisk (timeout 00:09:54) [common]
214 05:43:47.461108 Building ramdisk /var/lib/lava/dispatcher/tmp/796784/extract-overlay-ramdisk-jlwqhl5o/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/796784/extract-overlay-ramdisk-jlwqhl5o/ramdisk
215 05:43:49.941005 >> 181716 blocks
216 05:43:58.521847 Adding RAMdisk u-boot header.
217 05:43:58.522379 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/796784/extract-overlay-ramdisk-jlwqhl5o/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/796784/extract-overlay-ramdisk-jlwqhl5o/ramdisk.cpio.gz.uboot
218 05:43:58.797409 output: Image Name:
219 05:43:58.797835 output: Created: Thu Oct 3 05:43:58 2024
220 05:43:58.798044 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 05:43:58.798260 output: Data Size: 26070031 Bytes = 25459.01 KiB = 24.86 MiB
222 05:43:58.798618 output: Load Address: 00000000
223 05:43:58.799021 output: Entry Point: 00000000
224 05:43:58.799410 output:
225 05:43:58.800520 rename /var/lib/lava/dispatcher/tmp/796784/extract-overlay-ramdisk-jlwqhl5o/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/796784/tftp-deploy-l9py_ek8/ramdisk/ramdisk.cpio.gz.uboot
226 05:43:58.801235 end: 1.5.8 compress-ramdisk (duration 00:00:11) [common]
227 05:43:58.801774 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
228 05:43:58.802294 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
229 05:43:58.802744 No LXC device requested
230 05:43:58.803243 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 05:43:58.803743 start: 1.7 deploy-device-env (timeout 00:09:43) [common]
232 05:43:58.804269 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 05:43:58.804681 Checking files for TFTP limit of 4294967296 bytes.
234 05:43:58.807391 end: 1 tftp-deploy (duration 00:00:17) [common]
235 05:43:58.808021 start: 2 uboot-action (timeout 00:05:00) [common]
236 05:43:58.808558 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 05:43:58.809054 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 05:43:58.809570 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 05:43:58.810095 Using kernel file from prepare-kernel: 796784/tftp-deploy-l9py_ek8/kernel/uImage
240 05:43:58.810694 substitutions:
241 05:43:58.811097 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 05:43:58.811493 - {DTB_ADDR}: 0x01070000
243 05:43:58.811886 - {DTB}: 796784/tftp-deploy-l9py_ek8/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 05:43:58.812338 - {INITRD}: 796784/tftp-deploy-l9py_ek8/ramdisk/ramdisk.cpio.gz.uboot
245 05:43:58.812768 - {KERNEL_ADDR}: 0x01080000
246 05:43:58.813165 - {KERNEL}: 796784/tftp-deploy-l9py_ek8/kernel/uImage
247 05:43:58.813553 - {LAVA_MAC}: None
248 05:43:58.813988 - {PRESEED_CONFIG}: None
249 05:43:58.814382 - {PRESEED_LOCAL}: None
250 05:43:58.814767 - {RAMDISK_ADDR}: 0x08000000
251 05:43:58.815151 - {RAMDISK}: 796784/tftp-deploy-l9py_ek8/ramdisk/ramdisk.cpio.gz.uboot
252 05:43:58.815541 - {ROOT_PART}: None
253 05:43:58.815924 - {ROOT}: None
254 05:43:58.816355 - {SERVER_IP}: 192.168.6.2
255 05:43:58.816772 - {TEE_ADDR}: 0x83000000
256 05:43:58.817160 - {TEE}: None
257 05:43:58.817547 Parsed boot commands:
258 05:43:58.817921 - setenv autoload no
259 05:43:58.818305 - setenv initrd_high 0xffffffff
260 05:43:58.818733 - setenv fdt_high 0xffffffff
261 05:43:58.819139 - dhcp
262 05:43:58.819522 - setenv serverip 192.168.6.2
263 05:43:58.819906 - tftpboot 0x01080000 796784/tftp-deploy-l9py_ek8/kernel/uImage
264 05:43:58.820323 - tftpboot 0x08000000 796784/tftp-deploy-l9py_ek8/ramdisk/ramdisk.cpio.gz.uboot
265 05:43:58.820710 - tftpboot 0x01070000 796784/tftp-deploy-l9py_ek8/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 05:43:58.821093 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 05:43:58.821480 - bootm 0x01080000 0x08000000 0x01070000
268 05:43:58.821982 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 05:43:58.823526 start: 2.3 connect-device (timeout 00:05:00) [common]
271 05:43:58.824021 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 05:43:58.838629 Setting prompt string to ['lava-test: # ']
273 05:43:58.840180 end: 2.3 connect-device (duration 00:00:00) [common]
274 05:43:58.840790 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 05:43:58.841330 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 05:43:58.841864 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 05:43:58.842676 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 05:43:58.888847 >> OK - accepted request
279 05:43:58.890896 Returned 0 in 0 seconds
280 05:43:58.992086 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 05:43:58.993811 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 05:43:58.994404 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 05:43:58.994918 Setting prompt string to ['Hit any key to stop autoboot']
285 05:43:58.995365 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 05:43:58.996974 Trying 192.168.56.21...
287 05:43:58.997457 Connected to conserv1.
288 05:43:58.997878 Escape character is '^]'.
289 05:43:58.998282
290 05:43:58.998702 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 05:43:58.999120
292 05:44:05.662139 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 05:44:05.662791 bl2_stage_init 0x01
294 05:44:05.663226 bl2_stage_init 0x81
295 05:44:05.667727 hw id: 0x0000 - pwm id 0x01
296 05:44:05.668264 bl2_stage_init 0xc1
297 05:44:05.672459 bl2_stage_init 0x02
298 05:44:05.672936
299 05:44:05.673355 L0:00000000
300 05:44:05.673762 L1:00000703
301 05:44:05.674163 L2:00008067
302 05:44:05.678014 L3:15000000
303 05:44:05.678476 S1:00000000
304 05:44:05.678876 B2:20282000
305 05:44:05.679266 B1:a0f83180
306 05:44:05.679654
307 05:44:05.680076 TE: 68988
308 05:44:05.680475
309 05:44:05.689198 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 05:44:05.689655
311 05:44:05.690055 Board ID = 1
312 05:44:05.690447 Set cpu clk to 24M
313 05:44:05.690833 Set clk81 to 24M
314 05:44:05.692729 Use GP1_pll as DSU clk.
315 05:44:05.693167 DSU clk: 1200 Mhz
316 05:44:05.698433 CPU clk: 1200 MHz
317 05:44:05.698905 Set clk81 to 166.6M
318 05:44:05.703940 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 05:44:05.704442 board id: 1
320 05:44:05.713115 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 05:44:05.724853 fw parse done
322 05:44:05.730831 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 05:44:05.772597 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 05:44:05.784419 PIEI prepare done
325 05:44:05.784889 fastboot data load
326 05:44:05.785293 fastboot data verify
327 05:44:05.789912 verify result: 266
328 05:44:05.795529 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 05:44:05.796028 LPDDR4 probe
330 05:44:05.796433 ddr clk to 1584MHz
331 05:44:05.803495 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 05:44:05.840868
333 05:44:05.841353 dmc_version 0001
334 05:44:05.847604 Check phy result
335 05:44:05.853410 INFO : End of CA training
336 05:44:05.853875 INFO : End of initialization
337 05:44:05.858957 INFO : Training has run successfully!
338 05:44:05.859419 Check phy result
339 05:44:05.864578 INFO : End of initialization
340 05:44:05.865037 INFO : End of read enable training
341 05:44:05.867881 INFO : End of fine write leveling
342 05:44:05.873408 INFO : End of Write leveling coarse delay
343 05:44:05.879080 INFO : Training has run successfully!
344 05:44:05.879545 Check phy result
345 05:44:05.879941 INFO : End of initialization
346 05:44:05.884674 INFO : End of read dq deskew training
347 05:44:05.890175 INFO : End of MPR read delay center optimization
348 05:44:05.890640 INFO : End of write delay center optimization
349 05:44:05.895775 INFO : End of read delay center optimization
350 05:44:05.901472 INFO : End of max read latency training
351 05:44:05.901931 INFO : Training has run successfully!
352 05:44:05.907008 1D training succeed
353 05:44:05.913008 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 05:44:05.960548 Check phy result
355 05:44:05.961045 INFO : End of initialization
356 05:44:05.982921 INFO : End of 2D read delay Voltage center optimization
357 05:44:06.002089 INFO : End of 2D read delay Voltage center optimization
358 05:44:06.053981 INFO : End of 2D write delay Voltage center optimization
359 05:44:06.103219 INFO : End of 2D write delay Voltage center optimization
360 05:44:06.108753 INFO : Training has run successfully!
361 05:44:06.109221
362 05:44:06.109618 channel==0
363 05:44:06.114313 RxClkDly_Margin_A0==78 ps 8
364 05:44:06.114772 TxDqDly_Margin_A0==88 ps 9
365 05:44:06.117616 RxClkDly_Margin_A1==88 ps 9
366 05:44:06.118060 TxDqDly_Margin_A1==98 ps 10
367 05:44:06.123246 TrainedVREFDQ_A0==74
368 05:44:06.123710 TrainedVREFDQ_A1==74
369 05:44:06.124143 VrefDac_Margin_A0==24
370 05:44:06.128885 DeviceVref_Margin_A0==40
371 05:44:06.129339 VrefDac_Margin_A1==23
372 05:44:06.134455 DeviceVref_Margin_A1==40
373 05:44:06.134949
374 05:44:06.135344
375 05:44:06.135733 channel==1
376 05:44:06.136158 RxClkDly_Margin_A0==78 ps 8
377 05:44:06.137763 TxDqDly_Margin_A0==88 ps 9
378 05:44:06.143329 RxClkDly_Margin_A1==78 ps 8
379 05:44:06.143620 TxDqDly_Margin_A1==88 ps 9
380 05:44:06.143859 TrainedVREFDQ_A0==75
381 05:44:06.148887 TrainedVREFDQ_A1==75
382 05:44:06.149178 VrefDac_Margin_A0==22
383 05:44:06.154463 DeviceVref_Margin_A0==39
384 05:44:06.154784 VrefDac_Margin_A1==22
385 05:44:06.155025 DeviceVref_Margin_A1==39
386 05:44:06.155260
387 05:44:06.160075 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 05:44:06.160370
389 05:44:06.193595 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
390 05:44:06.194011 2D training succeed
391 05:44:06.199377 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 05:44:06.204817 auto size-- 65535DDR cs0 size: 2048MB
393 05:44:06.205106 DDR cs1 size: 2048MB
394 05:44:06.210456 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 05:44:06.210763 cs0 DataBus test pass
396 05:44:06.211004 cs1 DataBus test pass
397 05:44:06.216128 cs0 AddrBus test pass
398 05:44:06.216408 cs1 AddrBus test pass
399 05:44:06.216639
400 05:44:06.221616 100bdlr_step_size ps== 478
401 05:44:06.221915 result report
402 05:44:06.222147 boot times 0Enable ddr reg access
403 05:44:06.231229 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 05:44:06.245217 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 05:44:06.900409 bl2z: ptr: 05129330, size: 00001e40
406 05:44:06.907755 0.0;M3 CHK:0;cm4_sp_mode 0
407 05:44:06.908292 MVN_1=0x00000000
408 05:44:06.908713 MVN_2=0x00000000
409 05:44:06.919245 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 05:44:06.919707 OPS=0x04
411 05:44:06.920150 ring efuse init
412 05:44:06.924913 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 05:44:06.925360 [0.017310 Inits done]
414 05:44:06.925764 secure task start!
415 05:44:06.932354 high task start!
416 05:44:06.932818 low task start!
417 05:44:06.933221 run into bl31
418 05:44:06.940989 NOTICE: BL31: v1.3(release):4fc40b1
419 05:44:06.948745 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 05:44:06.949219 NOTICE: BL31: G12A normal boot!
421 05:44:06.964242 NOTICE: BL31: BL33 decompress pass
422 05:44:06.969908 ERROR: Error initializing runtime service opteed_fast
423 05:44:09.714071 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 05:44:09.714508 bl2_stage_init 0x01
425 05:44:09.714791 bl2_stage_init 0x81
426 05:44:09.719591 hw id: 0x0000 - pwm id 0x01
427 05:44:09.719902 bl2_stage_init 0xc1
428 05:44:09.725145 bl2_stage_init 0x02
429 05:44:09.725428
430 05:44:09.725643 L0:00000000
431 05:44:09.725852 L1:00000703
432 05:44:09.726058 L2:00008067
433 05:44:09.726261 L3:15000000
434 05:44:09.730776 S1:00000000
435 05:44:09.731046 B2:20282000
436 05:44:09.731259 B1:a0f83180
437 05:44:09.731464
438 05:44:09.731679 TE: 71009
439 05:44:09.731885
440 05:44:09.736414 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 05:44:09.736685
442 05:44:09.741935 Board ID = 1
443 05:44:09.742203 Set cpu clk to 24M
444 05:44:09.742412 Set clk81 to 24M
445 05:44:09.747616 Use GP1_pll as DSU clk.
446 05:44:09.747886 DSU clk: 1200 Mhz
447 05:44:09.748120 CPU clk: 1200 MHz
448 05:44:09.753210 Set clk81 to 166.6M
449 05:44:09.758678 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 05:44:09.758947 board id: 1
451 05:44:09.766010 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 05:44:09.776898 fw parse done
453 05:44:09.782800 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 05:44:09.825844 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 05:44:09.837021 PIEI prepare done
456 05:44:09.837576 fastboot data load
457 05:44:09.837980 fastboot data verify
458 05:44:09.842645 verify result: 266
459 05:44:09.848211 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 05:44:09.848712 LPDDR4 probe
461 05:44:09.849115 ddr clk to 1584MHz
462 05:44:09.856232 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 05:44:09.894085
464 05:44:09.894669 dmc_version 0001
465 05:44:09.901036 Check phy result
466 05:44:09.907001 INFO : End of CA training
467 05:44:09.907494 INFO : End of initialization
468 05:44:09.912595 INFO : Training has run successfully!
469 05:44:09.913109 Check phy result
470 05:44:09.918197 INFO : End of initialization
471 05:44:09.918708 INFO : End of read enable training
472 05:44:09.923798 INFO : End of fine write leveling
473 05:44:09.929251 INFO : End of Write leveling coarse delay
474 05:44:09.929547 INFO : Training has run successfully!
475 05:44:09.929781 Check phy result
476 05:44:09.935005 INFO : End of initialization
477 05:44:09.935300 INFO : End of read dq deskew training
478 05:44:09.940519 INFO : End of MPR read delay center optimization
479 05:44:09.946111 INFO : End of write delay center optimization
480 05:44:09.951686 INFO : End of read delay center optimization
481 05:44:09.951977 INFO : End of max read latency training
482 05:44:09.957306 INFO : Training has run successfully!
483 05:44:09.957622 1D training succeed
484 05:44:09.966450 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 05:44:10.014887 Check phy result
486 05:44:10.015318 INFO : End of initialization
487 05:44:10.042161 INFO : End of 2D read delay Voltage center optimization
488 05:44:10.066328 INFO : End of 2D read delay Voltage center optimization
489 05:44:10.123645 INFO : End of 2D write delay Voltage center optimization
490 05:44:10.177002 INFO : End of 2D write delay Voltage center optimization
491 05:44:10.182612 INFO : Training has run successfully!
492 05:44:10.182989
493 05:44:10.183213 channel==0
494 05:44:10.188156 RxClkDly_Margin_A0==78 ps 8
495 05:44:10.188489 TxDqDly_Margin_A0==98 ps 10
496 05:44:10.193724 RxClkDly_Margin_A1==78 ps 8
497 05:44:10.194065 TxDqDly_Margin_A1==98 ps 10
498 05:44:10.194304 TrainedVREFDQ_A0==74
499 05:44:10.199272 TrainedVREFDQ_A1==74
500 05:44:10.199575 VrefDac_Margin_A0==24
501 05:44:10.199813 DeviceVref_Margin_A0==40
502 05:44:10.204864 VrefDac_Margin_A1==23
503 05:44:10.205157 DeviceVref_Margin_A1==40
504 05:44:10.205367
505 05:44:10.205570
506 05:44:10.210515 channel==1
507 05:44:10.210827 RxClkDly_Margin_A0==78 ps 8
508 05:44:10.211076 TxDqDly_Margin_A0==88 ps 9
509 05:44:10.216224 RxClkDly_Margin_A1==78 ps 8
510 05:44:10.216826 TxDqDly_Margin_A1==78 ps 8
511 05:44:10.221709 TrainedVREFDQ_A0==77
512 05:44:10.222207 TrainedVREFDQ_A1==75
513 05:44:10.222658 VrefDac_Margin_A0==22
514 05:44:10.227303 DeviceVref_Margin_A0==37
515 05:44:10.227790 VrefDac_Margin_A1==22
516 05:44:10.232877 DeviceVref_Margin_A1==39
517 05:44:10.233371
518 05:44:10.233815 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 05:44:10.234259
520 05:44:10.266537 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
521 05:44:10.267200 2D training succeed
522 05:44:10.272099 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 05:44:10.277701 auto size-- 65535DDR cs0 size: 2048MB
524 05:44:10.278242 DDR cs1 size: 2048MB
525 05:44:10.283285 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 05:44:10.283799 cs0 DataBus test pass
527 05:44:10.288889 cs1 DataBus test pass
528 05:44:10.289394 cs0 AddrBus test pass
529 05:44:10.289838 cs1 AddrBus test pass
530 05:44:10.290280
531 05:44:10.294579 100bdlr_step_size ps== 471
532 05:44:10.295190 result report
533 05:44:10.300083 boot times 0Enable ddr reg access
534 05:44:10.305268 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 05:44:10.319110 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 05:44:10.978075 bl2z: ptr: 05129330, size: 00001e40
537 05:44:10.986069 0.0;M3 CHK:0;cm4_sp_mode 0
538 05:44:10.986497 MVN_1=0x00000000
539 05:44:10.986729 MVN_2=0x00000000
540 05:44:10.997582 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 05:44:10.998178 OPS=0x04
542 05:44:10.998674 ring efuse init
543 05:44:11.003161 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 05:44:11.003559 [0.017354 Inits done]
545 05:44:11.003774 secure task start!
546 05:44:11.011160 high task start!
547 05:44:11.011499 low task start!
548 05:44:11.011722 run into bl31
549 05:44:11.019892 NOTICE: BL31: v1.3(release):4fc40b1
550 05:44:11.026698 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 05:44:11.026992 NOTICE: BL31: G12A normal boot!
552 05:44:11.043153 NOTICE: BL31: BL33 decompress pass
553 05:44:11.048797 ERROR: Error initializing runtime service opteed_fast
554 05:44:12.417798 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 05:44:12.418533 bl2_stage_init 0x01
556 05:44:12.419012 bl2_stage_init 0x81
557 05:44:12.422084 hw id: 0x0000 - pwm id 0x01
558 05:44:12.422459 bl2_stage_init 0xc1
559 05:44:12.422673 bl2_stage_init 0x02
560 05:44:12.422894
561 05:44:12.427300 L0:00000000
562 05:44:12.427649 L1:00000703
563 05:44:12.427878 L2:00008067
564 05:44:12.428173 L3:15000000
565 05:44:12.428398 S1:00000000
566 05:44:12.433175 B2:20282000
567 05:44:12.433715 B1:a0f83180
568 05:44:12.434000
569 05:44:12.434235 TE: 72122
570 05:44:12.434525
571 05:44:12.438944 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 05:44:12.439604
573 05:44:12.440127 Board ID = 1
574 05:44:12.444740 Set cpu clk to 24M
575 05:44:12.445373 Set clk81 to 24M
576 05:44:12.445848 Use GP1_pll as DSU clk.
577 05:44:12.449949 DSU clk: 1200 Mhz
578 05:44:12.450477 CPU clk: 1200 MHz
579 05:44:12.450940 Set clk81 to 166.6M
580 05:44:12.461225 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 05:44:12.461855 board id: 1
582 05:44:12.467275 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 05:44:12.478467 fw parse done
584 05:44:12.483971 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 05:44:12.525744 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 05:44:12.537542 PIEI prepare done
587 05:44:12.538082 fastboot data load
588 05:44:12.538402 fastboot data verify
589 05:44:12.543060 verify result: 266
590 05:44:12.552191 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 05:44:12.552709 LPDDR4 probe
592 05:44:12.552978 ddr clk to 1584MHz
593 05:44:12.556671 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 05:44:12.594005
595 05:44:12.594627 dmc_version 0001
596 05:44:12.600511 Check phy result
597 05:44:12.606486 INFO : End of CA training
598 05:44:12.607175 INFO : End of initialization
599 05:44:12.612297 INFO : Training has run successfully!
600 05:44:12.612813 Check phy result
601 05:44:12.617627 INFO : End of initialization
602 05:44:12.618020 INFO : End of read enable training
603 05:44:12.620853 INFO : End of fine write leveling
604 05:44:12.626415 INFO : End of Write leveling coarse delay
605 05:44:12.632198 INFO : Training has run successfully!
606 05:44:12.632750 Check phy result
607 05:44:12.633030 INFO : End of initialization
608 05:44:12.637789 INFO : End of read dq deskew training
609 05:44:12.641011 INFO : End of MPR read delay center optimization
610 05:44:12.646648 INFO : End of write delay center optimization
611 05:44:12.652572 INFO : End of read delay center optimization
612 05:44:12.652993 INFO : End of max read latency training
613 05:44:12.657922 INFO : Training has run successfully!
614 05:44:12.658311 1D training succeed
615 05:44:12.666143 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 05:44:12.713792 Check phy result
617 05:44:12.714268 INFO : End of initialization
618 05:44:12.736179 INFO : End of 2D read delay Voltage center optimization
619 05:44:12.755130 INFO : End of 2D read delay Voltage center optimization
620 05:44:12.807156 INFO : End of 2D write delay Voltage center optimization
621 05:44:12.856337 INFO : End of 2D write delay Voltage center optimization
622 05:44:12.861701 INFO : Training has run successfully!
623 05:44:12.862210
624 05:44:12.862662 channel==0
625 05:44:12.867330 RxClkDly_Margin_A0==78 ps 8
626 05:44:12.867813 TxDqDly_Margin_A0==98 ps 10
627 05:44:12.872943 RxClkDly_Margin_A1==88 ps 9
628 05:44:12.873424 TxDqDly_Margin_A1==88 ps 9
629 05:44:12.873872 TrainedVREFDQ_A0==74
630 05:44:12.878513 TrainedVREFDQ_A1==74
631 05:44:12.878991 VrefDac_Margin_A0==24
632 05:44:12.879433 DeviceVref_Margin_A0==40
633 05:44:12.884235 VrefDac_Margin_A1==23
634 05:44:12.884707 DeviceVref_Margin_A1==40
635 05:44:12.885144
636 05:44:12.885580
637 05:44:12.886011 channel==1
638 05:44:12.889741 RxClkDly_Margin_A0==78 ps 8
639 05:44:12.890219 TxDqDly_Margin_A0==98 ps 10
640 05:44:12.895375 RxClkDly_Margin_A1==78 ps 8
641 05:44:12.895848 TxDqDly_Margin_A1==88 ps 9
642 05:44:12.900948 TrainedVREFDQ_A0==78
643 05:44:12.901436 TrainedVREFDQ_A1==75
644 05:44:12.901879 VrefDac_Margin_A0==22
645 05:44:12.906547 DeviceVref_Margin_A0==36
646 05:44:12.907033 VrefDac_Margin_A1==22
647 05:44:12.912247 DeviceVref_Margin_A1==39
648 05:44:12.912735
649 05:44:12.913174 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 05:44:12.913608
651 05:44:12.945779 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
652 05:44:12.946346 2D training succeed
653 05:44:12.951460 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 05:44:12.957559 auto size-- 65535DDR cs0 size: 2048MB
655 05:44:12.958280 DDR cs1 size: 2048MB
656 05:44:12.962584 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 05:44:12.963201 cs0 DataBus test pass
658 05:44:12.968281 cs1 DataBus test pass
659 05:44:12.968884 cs0 AddrBus test pass
660 05:44:12.969418 cs1 AddrBus test pass
661 05:44:12.969941
662 05:44:12.973788 100bdlr_step_size ps== 478
663 05:44:12.974398 result report
664 05:44:12.979408 boot times 0Enable ddr reg access
665 05:44:12.984542 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 05:44:12.998419 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 05:44:13.653369 bl2z: ptr: 05129330, size: 00001e40
668 05:44:13.660291 0.0;M3 CHK:0;cm4_sp_mode 0
669 05:44:13.660947 MVN_1=0x00000000
670 05:44:13.661385 MVN_2=0x00000000
671 05:44:13.671713 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 05:44:13.672438 OPS=0x04
673 05:44:13.672869 ring efuse init
674 05:44:13.677340 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 05:44:13.677849 [0.017320 Inits done]
676 05:44:13.678338 secure task start!
677 05:44:13.684500 high task start!
678 05:44:13.684981 low task start!
679 05:44:13.685395 run into bl31
680 05:44:13.693149 NOTICE: BL31: v1.3(release):4fc40b1
681 05:44:13.700929 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 05:44:13.701527 NOTICE: BL31: G12A normal boot!
683 05:44:13.716452 NOTICE: BL31: BL33 decompress pass
684 05:44:13.722953 ERROR: Error initializing runtime service opteed_fast
685 05:44:14.517739
686 05:44:14.518428
687 05:44:14.523087 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 05:44:14.523564
689 05:44:14.525476 Model: Libre Computer AML-S905D3-CC Solitude
690 05:44:14.673631 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 05:44:14.688896 DRAM: 2 GiB (effective 3.8 GiB)
692 05:44:14.789913 Core: 406 devices, 33 uclasses, devicetree: separate
693 05:44:14.796739 WDT: Not starting watchdog@f0d0
694 05:44:14.821008 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 05:44:14.833246 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 05:44:14.838240 ** Bad device specification mmc 0 **
697 05:44:14.849017 Card did not respond to voltage select! : -110
698 05:44:14.855958 ** Bad device specification mmc 0 **
699 05:44:14.856469 Couldn't find partition mmc 0
700 05:44:14.866401 Card did not respond to voltage select! : -110
701 05:44:14.869602 ** Bad device specification mmc 0 **
702 05:44:14.870287 Couldn't find partition mmc 0
703 05:44:14.874778 Error: could not access storage.
704 05:44:15.172304 Net: eth0: ethernet@ff3f0000
705 05:44:15.172918 starting USB...
706 05:44:15.417021 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 05:44:15.417628 Starting the controller
708 05:44:15.423910 USB XHCI 1.10
709 05:44:16.980330 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 05:44:16.988573 scanning usb for storage devices... 0 Storage Device(s) found
712 05:44:17.040490 Hit any key to stop autoboot: 1
713 05:44:17.041651 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
714 05:44:17.042419 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
715 05:44:17.043064 Setting prompt string to ['=>']
716 05:44:17.043696 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
717 05:44:17.054585 0
718 05:44:17.055700 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 05:44:17.157250 => setenv autoload no
721 05:44:17.158136 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
722 05:44:17.164423 setenv autoload no
724 05:44:17.266254 => setenv initrd_high 0xffffffff
725 05:44:17.267186 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
726 05:44:17.271813 setenv initrd_high 0xffffffff
728 05:44:17.373634 => setenv fdt_high 0xffffffff
729 05:44:17.374486 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 05:44:17.379094 setenv fdt_high 0xffffffff
732 05:44:17.480912 => dhcp
733 05:44:17.481778 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 05:44:17.485154 dhcp
735 05:44:18.341901 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
736 05:44:18.342704 Speed: 1000, full duplex
737 05:44:18.343268 BOOTP broadcast 1
738 05:44:18.590605 BOOTP broadcast 2
739 05:44:19.090941 BOOTP broadcast 3
740 05:44:20.092823 BOOTP broadcast 4
741 05:44:22.093921 BOOTP broadcast 5
742 05:44:22.105580 DHCP client bound to address 192.168.6.12 (3763 ms)
744 05:44:22.207356 => setenv serverip 192.168.6.2
745 05:44:22.208206 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
746 05:44:22.212956 setenv serverip 192.168.6.2
748 05:44:22.314657 => tftpboot 0x01080000 796784/tftp-deploy-l9py_ek8/kernel/uImage
749 05:44:22.315739 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
750 05:44:22.322440 tftpboot 0x01080000 796784/tftp-deploy-l9py_ek8/kernel/uImage
751 05:44:22.323090 Speed: 1000, full duplex
752 05:44:22.323637 Using ethernet@ff3f0000 device
753 05:44:22.327826 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
754 05:44:22.333436 Filename '796784/tftp-deploy-l9py_ek8/kernel/uImage'.
755 05:44:22.337256 Load address: 0x1080000
756 05:44:23.392914 Loading: *############### UDP wrong checksum 000000ff 000015f2
757 05:44:23.407912 UDP wrong checksum 000000ff 00009ae4
758 05:44:25.869230 ################################### 43.6 MiB
759 05:44:25.870006 12.3 MiB/s
760 05:44:25.870578 done
761 05:44:25.873542 Bytes transferred = 45713984 (2b98a40 hex)
763 05:44:25.975445 => tftpboot 0x08000000 796784/tftp-deploy-l9py_ek8/ramdisk/ramdisk.cpio.gz.uboot
764 05:44:25.976329 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:33)
765 05:44:25.983182 tftpboot 0x08000000 796784/tftp-deploy-l9py_ek8/ramdisk/ramdisk.cpio.gz.uboot
766 05:44:25.983779 Speed: 1000, full duplex
767 05:44:25.984345 Using ethernet@ff3f0000 device
768 05:44:25.988676 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
769 05:44:25.998438 Filename '796784/tftp-deploy-l9py_ek8/ramdisk/ramdisk.cpio.gz.uboot'.
770 05:44:25.998923 Load address: 0x8000000
771 05:44:33.153596 Loading: *#######################################T ########## UDP wrong checksum 00000005 0000627f
772 05:44:38.153378 T UDP wrong checksum 00000005 0000627f
773 05:44:48.154498 T T UDP wrong checksum 00000005 0000627f
774 05:45:08.159743 T T T T UDP wrong checksum 00000005 0000627f
775 05:45:23.163350 T T
776 05:45:23.163760 Retry count exceeded; starting again
778 05:45:23.164684 end: 2.4.3 bootloader-commands (duration 00:01:06) [common]
781 05:45:23.165627 end: 2.4 uboot-commands (duration 00:01:24) [common]
783 05:45:23.166344 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
785 05:45:23.166873 end: 2 uboot-action (duration 00:01:24) [common]
787 05:45:23.167705 Cleaning after the job
788 05:45:23.168055 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796784/tftp-deploy-l9py_ek8/ramdisk
789 05:45:23.168947 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796784/tftp-deploy-l9py_ek8/kernel
790 05:45:23.173211 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796784/tftp-deploy-l9py_ek8/dtb
791 05:45:23.173865 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796784/tftp-deploy-l9py_ek8/modules
792 05:45:23.179078 start: 4.1 power-off (timeout 00:00:30) [common]
793 05:45:23.179656 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
794 05:45:23.212055 >> OK - accepted request
795 05:45:23.213814 Returned 0 in 0 seconds
796 05:45:23.314514 end: 4.1 power-off (duration 00:00:00) [common]
798 05:45:23.315438 start: 4.2 read-feedback (timeout 00:10:00) [common]
799 05:45:23.316108 Listened to connection for namespace 'common' for up to 1s
800 05:45:24.316989 Finalising connection for namespace 'common'
801 05:45:24.317481 Disconnecting from shell: Finalise
802 05:45:24.317759 =>
803 05:45:24.418381 end: 4.2 read-feedback (duration 00:00:01) [common]
804 05:45:24.418947 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/796784
805 05:45:24.663229 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/796784
806 05:45:24.663841 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.