Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 05:16:53.615221 lava-dispatcher, installed at version: 2024.01
2 05:16:53.616033 start: 0 validate
3 05:16:53.616518 Start time: 2024-10-03 05:16:53.616487+00:00 (UTC)
4 05:16:53.617069 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 05:16:53.617615 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 05:16:53.654821 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 05:16:53.655794 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241003%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fkernel%2FImage exists
8 05:16:53.686858 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 05:16:53.687489 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241003%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 05:16:53.721735 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 05:16:53.722251 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 05:16:53.759574 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 05:16:53.760099 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241003%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fmodules.tar.xz exists
14 05:16:53.799811 validate duration: 0.18
16 05:16:53.800677 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 05:16:53.800997 start: 1.1 download-retry (timeout 00:10:00) [common]
18 05:16:53.801301 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 05:16:53.801879 Not decompressing ramdisk as can be used compressed.
20 05:16:53.802320 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 05:16:53.802592 saving as /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/ramdisk/initrd.cpio.gz
22 05:16:53.802857 total size: 5628182 (5 MB)
23 05:16:53.844686 progress 0 % (0 MB)
24 05:16:53.852124 progress 5 % (0 MB)
25 05:16:53.859775 progress 10 % (0 MB)
26 05:16:53.866558 progress 15 % (0 MB)
27 05:16:53.871238 progress 20 % (1 MB)
28 05:16:53.874832 progress 25 % (1 MB)
29 05:16:53.878704 progress 30 % (1 MB)
30 05:16:53.882625 progress 35 % (1 MB)
31 05:16:53.886198 progress 40 % (2 MB)
32 05:16:53.890160 progress 45 % (2 MB)
33 05:16:53.893687 progress 50 % (2 MB)
34 05:16:53.897563 progress 55 % (2 MB)
35 05:16:53.901473 progress 60 % (3 MB)
36 05:16:53.904967 progress 65 % (3 MB)
37 05:16:53.908826 progress 70 % (3 MB)
38 05:16:53.912339 progress 75 % (4 MB)
39 05:16:53.916334 progress 80 % (4 MB)
40 05:16:53.919793 progress 85 % (4 MB)
41 05:16:53.923589 progress 90 % (4 MB)
42 05:16:53.927182 progress 95 % (5 MB)
43 05:16:53.930376 progress 100 % (5 MB)
44 05:16:53.931018 5 MB downloaded in 0.13 s (41.89 MB/s)
45 05:16:53.931566 end: 1.1.1 http-download (duration 00:00:00) [common]
47 05:16:53.932503 end: 1.1 download-retry (duration 00:00:00) [common]
48 05:16:53.932798 start: 1.2 download-retry (timeout 00:10:00) [common]
49 05:16:53.933070 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 05:16:53.933555 downloading http://storage.kernelci.org/next/master/next-20241003/arm64/defconfig+kselftest/gcc-12/kernel/Image
51 05:16:53.933801 saving as /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/kernel/Image
52 05:16:53.934011 total size: 66101760 (63 MB)
53 05:16:53.934221 No compression specified
54 05:16:53.967696 progress 0 % (0 MB)
55 05:16:54.007889 progress 5 % (3 MB)
56 05:16:54.047114 progress 10 % (6 MB)
57 05:16:54.086285 progress 15 % (9 MB)
58 05:16:54.125637 progress 20 % (12 MB)
59 05:16:54.165022 progress 25 % (15 MB)
60 05:16:54.204376 progress 30 % (18 MB)
61 05:16:54.243740 progress 35 % (22 MB)
62 05:16:54.282831 progress 40 % (25 MB)
63 05:16:54.322122 progress 45 % (28 MB)
64 05:16:54.362213 progress 50 % (31 MB)
65 05:16:54.404215 progress 55 % (34 MB)
66 05:16:54.443360 progress 60 % (37 MB)
67 05:16:54.482769 progress 65 % (41 MB)
68 05:16:54.523266 progress 70 % (44 MB)
69 05:16:54.563580 progress 75 % (47 MB)
70 05:16:54.604244 progress 80 % (50 MB)
71 05:16:54.644819 progress 85 % (53 MB)
72 05:16:54.684517 progress 90 % (56 MB)
73 05:16:54.726539 progress 95 % (59 MB)
74 05:16:54.766797 progress 100 % (63 MB)
75 05:16:54.767389 63 MB downloaded in 0.83 s (75.64 MB/s)
76 05:16:54.767884 end: 1.2.1 http-download (duration 00:00:01) [common]
78 05:16:54.768798 end: 1.2 download-retry (duration 00:00:01) [common]
79 05:16:54.769130 start: 1.3 download-retry (timeout 00:09:59) [common]
80 05:16:54.769408 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 05:16:54.769902 downloading http://storage.kernelci.org/next/master/next-20241003/arm64/defconfig+kselftest/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 05:16:54.770196 saving as /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/dtb/meson-g12b-a311d-libretech-cc.dtb
83 05:16:54.770418 total size: 54703 (0 MB)
84 05:16:54.770633 No compression specified
85 05:16:54.811208 progress 59 % (0 MB)
86 05:16:54.812048 progress 100 % (0 MB)
87 05:16:54.812597 0 MB downloaded in 0.04 s (1.24 MB/s)
88 05:16:54.813085 end: 1.3.1 http-download (duration 00:00:00) [common]
90 05:16:54.813904 end: 1.3 download-retry (duration 00:00:00) [common]
91 05:16:54.814198 start: 1.4 download-retry (timeout 00:09:59) [common]
92 05:16:54.814478 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 05:16:54.814961 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 05:16:54.815220 saving as /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/nfsrootfs/full.rootfs.tar
95 05:16:54.815446 total size: 107552908 (102 MB)
96 05:16:54.815661 Using unxz to decompress xz
97 05:16:54.848688 progress 0 % (0 MB)
98 05:16:55.508984 progress 5 % (5 MB)
99 05:16:56.237280 progress 10 % (10 MB)
100 05:16:56.965278 progress 15 % (15 MB)
101 05:16:57.730630 progress 20 % (20 MB)
102 05:16:58.303679 progress 25 % (25 MB)
103 05:16:58.930774 progress 30 % (30 MB)
104 05:16:59.710535 progress 35 % (35 MB)
105 05:17:00.080799 progress 40 % (41 MB)
106 05:17:00.559133 progress 45 % (46 MB)
107 05:17:01.281524 progress 50 % (51 MB)
108 05:17:01.978190 progress 55 % (56 MB)
109 05:17:02.740701 progress 60 % (61 MB)
110 05:17:03.496549 progress 65 % (66 MB)
111 05:17:04.228382 progress 70 % (71 MB)
112 05:17:05.008186 progress 75 % (76 MB)
113 05:17:05.684058 progress 80 % (82 MB)
114 05:17:06.392267 progress 85 % (87 MB)
115 05:17:07.130190 progress 90 % (92 MB)
116 05:17:07.848367 progress 95 % (97 MB)
117 05:17:08.592481 progress 100 % (102 MB)
118 05:17:08.605443 102 MB downloaded in 13.79 s (7.44 MB/s)
119 05:17:08.606386 end: 1.4.1 http-download (duration 00:00:14) [common]
121 05:17:08.608222 end: 1.4 download-retry (duration 00:00:14) [common]
122 05:17:08.608799 start: 1.5 download-retry (timeout 00:09:45) [common]
123 05:17:08.609368 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 05:17:08.610231 downloading http://storage.kernelci.org/next/master/next-20241003/arm64/defconfig+kselftest/gcc-12/modules.tar.xz
125 05:17:08.610727 saving as /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/modules/modules.tar
126 05:17:08.611173 total size: 16285276 (15 MB)
127 05:17:08.611634 Using unxz to decompress xz
128 05:17:08.654379 progress 0 % (0 MB)
129 05:17:08.757537 progress 5 % (0 MB)
130 05:17:08.878283 progress 10 % (1 MB)
131 05:17:08.994665 progress 15 % (2 MB)
132 05:17:09.112791 progress 20 % (3 MB)
133 05:17:09.227180 progress 25 % (3 MB)
134 05:17:09.341421 progress 30 % (4 MB)
135 05:17:09.450614 progress 35 % (5 MB)
136 05:17:09.561136 progress 40 % (6 MB)
137 05:17:09.677167 progress 45 % (7 MB)
138 05:17:09.787576 progress 50 % (7 MB)
139 05:17:09.902428 progress 55 % (8 MB)
140 05:17:10.019950 progress 60 % (9 MB)
141 05:17:10.136553 progress 65 % (10 MB)
142 05:17:10.249618 progress 70 % (10 MB)
143 05:17:10.389971 progress 75 % (11 MB)
144 05:17:10.526346 progress 80 % (12 MB)
145 05:17:10.636313 progress 85 % (13 MB)
146 05:17:10.753244 progress 90 % (14 MB)
147 05:17:10.858477 progress 95 % (14 MB)
148 05:17:10.970903 progress 100 % (15 MB)
149 05:17:10.986170 15 MB downloaded in 2.37 s (6.54 MB/s)
150 05:17:10.987164 end: 1.5.1 http-download (duration 00:00:02) [common]
152 05:17:10.989018 end: 1.5 download-retry (duration 00:00:02) [common]
153 05:17:10.989598 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 05:17:10.990170 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 05:17:20.784096 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/796480/extract-nfsrootfs-kj9q9gdb
156 05:17:20.784667 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 05:17:20.784959 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 05:17:20.785681 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq
159 05:17:20.786133 makedir: /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin
160 05:17:20.786464 makedir: /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/tests
161 05:17:20.786787 makedir: /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/results
162 05:17:20.787132 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-add-keys
163 05:17:20.787665 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-add-sources
164 05:17:20.788191 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-background-process-start
165 05:17:20.788730 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-background-process-stop
166 05:17:20.789271 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-common-functions
167 05:17:20.789765 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-echo-ipv4
168 05:17:20.790384 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-install-packages
169 05:17:20.790924 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-installed-packages
170 05:17:20.791412 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-os-build
171 05:17:20.791893 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-probe-channel
172 05:17:20.792431 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-probe-ip
173 05:17:20.792920 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-target-ip
174 05:17:20.793405 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-target-mac
175 05:17:20.793883 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-target-storage
176 05:17:20.794492 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-test-case
177 05:17:20.795014 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-test-event
178 05:17:20.795499 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-test-feedback
179 05:17:20.795999 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-test-raise
180 05:17:20.796500 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-test-reference
181 05:17:20.796992 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-test-runner
182 05:17:20.797498 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-test-set
183 05:17:20.798007 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-test-shell
184 05:17:20.798530 Updating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-install-packages (oe)
185 05:17:20.799112 Updating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/bin/lava-installed-packages (oe)
186 05:17:20.799574 Creating /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/environment
187 05:17:20.799966 LAVA metadata
188 05:17:20.800266 - LAVA_JOB_ID=796480
189 05:17:20.800486 - LAVA_DISPATCHER_IP=192.168.6.2
190 05:17:20.800860 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 05:17:20.801898 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 05:17:20.802228 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 05:17:20.802439 skipped lava-vland-overlay
194 05:17:20.802685 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 05:17:20.802944 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 05:17:20.803166 skipped lava-multinode-overlay
197 05:17:20.803412 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 05:17:20.803665 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 05:17:20.803916 Loading test definitions
200 05:17:20.804223 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 05:17:20.804452 Using /lava-796480 at stage 0
202 05:17:20.805629 uuid=796480_1.6.2.4.1 testdef=None
203 05:17:20.805936 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 05:17:20.806204 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 05:17:20.808028 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 05:17:20.808830 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 05:17:20.811113 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 05:17:20.811941 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 05:17:20.814140 runner path: /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/0/tests/0_dmesg test_uuid 796480_1.6.2.4.1
212 05:17:20.814698 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 05:17:20.815462 Creating lava-test-runner.conf files
215 05:17:20.815670 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/796480/lava-overlay-gvmyffwq/lava-796480/0 for stage 0
216 05:17:20.816028 - 0_dmesg
217 05:17:20.816378 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 05:17:20.816658 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 05:17:20.838645 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 05:17:20.839041 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 05:17:20.839310 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 05:17:20.839584 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 05:17:20.839853 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 05:17:21.488341 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 05:17:21.488812 start: 1.6.4 extract-modules (timeout 00:09:32) [common]
226 05:17:21.489089 extracting modules file /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/modules/modules.tar to /var/lib/lava/dispatcher/tmp/796480/extract-nfsrootfs-kj9q9gdb
227 05:17:23.160882 extracting modules file /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/modules/modules.tar to /var/lib/lava/dispatcher/tmp/796480/extract-overlay-ramdisk-ytuz7cra/ramdisk
228 05:17:24.805658 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 05:17:24.806146 start: 1.6.5 apply-overlay-tftp (timeout 00:09:29) [common]
230 05:17:24.806424 [common] Applying overlay to NFS
231 05:17:24.806638 [common] Applying overlay /var/lib/lava/dispatcher/tmp/796480/compress-overlay-wywm_jzq/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/796480/extract-nfsrootfs-kj9q9gdb
232 05:17:24.836123 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 05:17:24.836524 start: 1.6.6 prepare-kernel (timeout 00:09:29) [common]
234 05:17:24.836823 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:29) [common]
235 05:17:24.837059 Converting downloaded kernel to a uImage
236 05:17:24.837373 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/kernel/Image /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/kernel/uImage
237 05:17:25.621129 output: Image Name:
238 05:17:25.621557 output: Created: Thu Oct 3 05:17:24 2024
239 05:17:25.621768 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 05:17:25.621975 output: Data Size: 66101760 Bytes = 64552.50 KiB = 63.04 MiB
241 05:17:25.622180 output: Load Address: 01080000
242 05:17:25.622383 output: Entry Point: 01080000
243 05:17:25.622582 output:
244 05:17:25.622922 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 05:17:25.623188 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 05:17:25.623456 start: 1.6.7 configure-preseed-file (timeout 00:09:28) [common]
247 05:17:25.623713 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 05:17:25.623971 start: 1.6.8 compress-ramdisk (timeout 00:09:28) [common]
249 05:17:25.624272 Building ramdisk /var/lib/lava/dispatcher/tmp/796480/extract-overlay-ramdisk-ytuz7cra/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/796480/extract-overlay-ramdisk-ytuz7cra/ramdisk
250 05:17:28.880074 >> 241393 blocks
251 05:17:39.253472 Adding RAMdisk u-boot header.
252 05:17:39.253916 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/796480/extract-overlay-ramdisk-ytuz7cra/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/796480/extract-overlay-ramdisk-ytuz7cra/ramdisk.cpio.gz.uboot
253 05:17:39.619468 output: Image Name:
254 05:17:39.619851 output: Created: Thu Oct 3 05:17:39 2024
255 05:17:39.620123 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 05:17:39.620420 output: Data Size: 31199981 Bytes = 30468.73 KiB = 29.75 MiB
257 05:17:39.620634 output: Load Address: 00000000
258 05:17:39.620889 output: Entry Point: 00000000
259 05:17:39.621195 output:
260 05:17:39.621863 rename /var/lib/lava/dispatcher/tmp/796480/extract-overlay-ramdisk-ytuz7cra/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/ramdisk/ramdisk.cpio.gz.uboot
261 05:17:39.622388 end: 1.6.8 compress-ramdisk (duration 00:00:14) [common]
262 05:17:39.622835 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 05:17:39.623231 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:14) [common]
264 05:17:39.623609 No LXC device requested
265 05:17:39.624044 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 05:17:39.624442 start: 1.8 deploy-device-env (timeout 00:09:14) [common]
267 05:17:39.624835 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 05:17:39.625177 Checking files for TFTP limit of 4294967296 bytes.
269 05:17:39.627337 end: 1 tftp-deploy (duration 00:00:46) [common]
270 05:17:39.627804 start: 2 uboot-action (timeout 00:05:00) [common]
271 05:17:39.628268 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 05:17:39.628655 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 05:17:39.629052 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 05:17:39.629488 Using kernel file from prepare-kernel: 796480/tftp-deploy-9i2ngc3b/kernel/uImage
275 05:17:39.630007 substitutions:
276 05:17:39.630323 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 05:17:39.630676 - {DTB_ADDR}: 0x01070000
278 05:17:39.631039 - {DTB}: 796480/tftp-deploy-9i2ngc3b/dtb/meson-g12b-a311d-libretech-cc.dtb
279 05:17:39.631352 - {INITRD}: 796480/tftp-deploy-9i2ngc3b/ramdisk/ramdisk.cpio.gz.uboot
280 05:17:39.631686 - {KERNEL_ADDR}: 0x01080000
281 05:17:39.631997 - {KERNEL}: 796480/tftp-deploy-9i2ngc3b/kernel/uImage
282 05:17:39.632328 - {LAVA_MAC}: None
283 05:17:39.632683 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/796480/extract-nfsrootfs-kj9q9gdb
284 05:17:39.632979 - {NFS_SERVER_IP}: 192.168.6.2
285 05:17:39.633279 - {PRESEED_CONFIG}: None
286 05:17:39.633607 - {PRESEED_LOCAL}: None
287 05:17:39.633966 - {RAMDISK_ADDR}: 0x08000000
288 05:17:39.634303 - {RAMDISK}: 796480/tftp-deploy-9i2ngc3b/ramdisk/ramdisk.cpio.gz.uboot
289 05:17:39.634660 - {ROOT_PART}: None
290 05:17:39.635019 - {ROOT}: None
291 05:17:39.635368 - {SERVER_IP}: 192.168.6.2
292 05:17:39.635675 - {TEE_ADDR}: 0x83000000
293 05:17:39.635969 - {TEE}: None
294 05:17:39.636327 Parsed boot commands:
295 05:17:39.636620 - setenv autoload no
296 05:17:39.636928 - setenv initrd_high 0xffffffff
297 05:17:39.637238 - setenv fdt_high 0xffffffff
298 05:17:39.637538 - dhcp
299 05:17:39.637831 - setenv serverip 192.168.6.2
300 05:17:39.638140 - tftpboot 0x01080000 796480/tftp-deploy-9i2ngc3b/kernel/uImage
301 05:17:39.638444 - tftpboot 0x08000000 796480/tftp-deploy-9i2ngc3b/ramdisk/ramdisk.cpio.gz.uboot
302 05:17:39.638737 - tftpboot 0x01070000 796480/tftp-deploy-9i2ngc3b/dtb/meson-g12b-a311d-libretech-cc.dtb
303 05:17:39.639049 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/796480/extract-nfsrootfs-kj9q9gdb,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 05:17:39.639359 - bootm 0x01080000 0x08000000 0x01070000
305 05:17:39.639779 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 05:17:39.640986 start: 2.3 connect-device (timeout 00:05:00) [common]
308 05:17:39.641360 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 05:17:39.655146 Setting prompt string to ['lava-test: # ']
310 05:17:39.656741 end: 2.3 connect-device (duration 00:00:00) [common]
311 05:17:39.657436 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 05:17:39.658015 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 05:17:39.658411 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 05:17:39.659133 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 05:17:39.691907 >> OK - accepted request
316 05:17:39.693936 Returned 0 in 0 seconds
317 05:17:39.794892 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 05:17:39.796680 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 05:17:39.797261 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 05:17:39.797791 Setting prompt string to ['Hit any key to stop autoboot']
322 05:17:39.798263 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 05:17:39.799837 Trying 192.168.56.21...
324 05:17:39.800370 Connected to conserv1.
325 05:17:39.800790 Escape character is '^]'.
326 05:17:39.801212
327 05:17:39.801636 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 05:17:39.802062
329 05:17:51.249709 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 05:17:51.250337 bl2_stage_init 0x01
331 05:17:51.250756 bl2_stage_init 0x81
332 05:17:51.255279 hw id: 0x0000 - pwm id 0x01
333 05:17:51.255728 bl2_stage_init 0xc1
334 05:17:51.256214 bl2_stage_init 0x02
335 05:17:51.256616
336 05:17:51.260670 L0:00000000
337 05:17:51.261105 L1:20000703
338 05:17:51.261500 L2:00008067
339 05:17:51.261889 L3:14000000
340 05:17:51.266362 B2:00402000
341 05:17:51.266812 B1:e0f83180
342 05:17:51.267205
343 05:17:51.267597 TE: 58124
344 05:17:51.268019
345 05:17:51.271966 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 05:17:51.272427
347 05:17:51.272824 Board ID = 1
348 05:17:51.277573 Set A53 clk to 24M
349 05:17:51.278006 Set A73 clk to 24M
350 05:17:51.278404 Set clk81 to 24M
351 05:17:51.283224 A53 clk: 1200 MHz
352 05:17:51.283653 A73 clk: 1200 MHz
353 05:17:51.284078 CLK81: 166.6M
354 05:17:51.284469 smccc: 00012a92
355 05:17:51.288823 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 05:17:51.294281 board id: 1
357 05:17:51.300283 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 05:17:51.310921 fw parse done
359 05:17:51.316856 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 05:17:51.359396 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 05:17:51.370279 PIEI prepare done
362 05:17:51.370710 fastboot data load
363 05:17:51.371112 fastboot data verify
364 05:17:51.375864 verify result: 266
365 05:17:51.381519 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 05:17:51.381962 LPDDR4 probe
367 05:17:51.382359 ddr clk to 1584MHz
368 05:17:51.389494 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 05:17:51.426809
370 05:17:51.427375 dmc_version 0001
371 05:17:51.433470 Check phy result
372 05:17:51.439231 INFO : End of CA training
373 05:17:51.439675 INFO : End of initialization
374 05:17:51.444845 INFO : Training has run successfully!
375 05:17:51.445330 Check phy result
376 05:17:51.450497 INFO : End of initialization
377 05:17:51.450943 INFO : End of read enable training
378 05:17:51.453875 INFO : End of fine write leveling
379 05:17:51.459458 INFO : End of Write leveling coarse delay
380 05:17:51.465127 INFO : Training has run successfully!
381 05:17:51.465572 Check phy result
382 05:17:51.465988 INFO : End of initialization
383 05:17:51.470699 INFO : End of read dq deskew training
384 05:17:51.476290 INFO : End of MPR read delay center optimization
385 05:17:51.476730 INFO : End of write delay center optimization
386 05:17:51.481846 INFO : End of read delay center optimization
387 05:17:51.487454 INFO : End of max read latency training
388 05:17:51.487901 INFO : Training has run successfully!
389 05:17:51.493138 1D training succeed
390 05:17:51.498942 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 05:17:51.546512 Check phy result
392 05:17:51.547063 INFO : End of initialization
393 05:17:51.568200 INFO : End of 2D read delay Voltage center optimization
394 05:17:51.588468 INFO : End of 2D read delay Voltage center optimization
395 05:17:51.640710 INFO : End of 2D write delay Voltage center optimization
396 05:17:51.690026 INFO : End of 2D write delay Voltage center optimization
397 05:17:51.695516 INFO : Training has run successfully!
398 05:17:51.695953
399 05:17:51.696413 channel==0
400 05:17:51.701109 RxClkDly_Margin_A0==88 ps 9
401 05:17:51.701560 TxDqDly_Margin_A0==98 ps 10
402 05:17:51.704402 RxClkDly_Margin_A1==88 ps 9
403 05:17:51.704872 TxDqDly_Margin_A1==98 ps 10
404 05:17:51.709936 TrainedVREFDQ_A0==74
405 05:17:51.710384 TrainedVREFDQ_A1==74
406 05:17:51.715552 VrefDac_Margin_A0==25
407 05:17:51.716011 DeviceVref_Margin_A0==40
408 05:17:51.716429 VrefDac_Margin_A1==25
409 05:17:51.721166 DeviceVref_Margin_A1==40
410 05:17:51.721594
411 05:17:51.722004
412 05:17:51.722411 channel==1
413 05:17:51.722810 RxClkDly_Margin_A0==98 ps 10
414 05:17:51.724636 TxDqDly_Margin_A0==98 ps 10
415 05:17:51.730252 RxClkDly_Margin_A1==88 ps 9
416 05:17:51.730684 TxDqDly_Margin_A1==88 ps 9
417 05:17:51.731099 TrainedVREFDQ_A0==77
418 05:17:51.735907 TrainedVREFDQ_A1==77
419 05:17:51.736371 VrefDac_Margin_A0==22
420 05:17:51.741336 DeviceVref_Margin_A0==37
421 05:17:51.741771 VrefDac_Margin_A1==24
422 05:17:51.742179 DeviceVref_Margin_A1==37
423 05:17:51.742580
424 05:17:51.746930 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 05:17:51.747362
426 05:17:51.780538 soc_vref_reg_value 0x 00000019 00000019 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 05:17:51.781077 2D training succeed
428 05:17:51.786148 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 05:17:51.791881 auto size-- 65535DDR cs0 size: 2048MB
430 05:17:51.792347 DDR cs1 size: 2048MB
431 05:17:51.797345 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 05:17:51.797776 cs0 DataBus test pass
433 05:17:51.798183 cs1 DataBus test pass
434 05:17:51.802937 cs0 AddrBus test pass
435 05:17:51.803415 cs1 AddrBus test pass
436 05:17:51.803827
437 05:17:51.808688 100bdlr_step_size ps== 420
438 05:17:51.809134 result report
439 05:17:51.809542 boot times 0Enable ddr reg access
440 05:17:51.818374 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 05:17:51.832011 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 05:17:52.405504 0.0;M3 CHK:0;cm4_sp_mode 0
443 05:17:52.406119 MVN_1=0x00000000
444 05:17:52.410915 MVN_2=0x00000000
445 05:17:52.416667 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 05:17:52.417113 OPS=0x10
447 05:17:52.417530 ring efuse init
448 05:17:52.417950 chipver efuse init
449 05:17:52.422244 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 05:17:52.427876 [0.018961 Inits done]
451 05:17:52.428351 secure task start!
452 05:17:52.428762 high task start!
453 05:17:52.432456 low task start!
454 05:17:52.432884 run into bl31
455 05:17:52.439157 NOTICE: BL31: v1.3(release):4fc40b1
456 05:17:52.447022 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 05:17:52.447473 NOTICE: BL31: G12A normal boot!
458 05:17:52.472309 NOTICE: BL31: BL33 decompress pass
459 05:17:52.477997 ERROR: Error initializing runtime service opteed_fast
460 05:17:53.710839
461 05:17:53.711438
462 05:17:53.719267 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 05:17:53.719763
464 05:17:53.720252 Model: Libre Computer AML-A311D-CC Alta
465 05:17:53.927710 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 05:17:53.951199 DRAM: 2 GiB (effective 3.8 GiB)
467 05:17:54.094188 Core: 408 devices, 31 uclasses, devicetree: separate
468 05:17:54.099947 WDT: Not starting watchdog@f0d0
469 05:17:54.132289 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 05:17:54.144704 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 05:17:54.148820 ** Bad device specification mmc 0 **
472 05:17:54.160078 Card did not respond to voltage select! : -110
473 05:17:54.167605 ** Bad device specification mmc 0 **
474 05:17:54.168078 Couldn't find partition mmc 0
475 05:17:54.176078 Card did not respond to voltage select! : -110
476 05:17:54.181458 ** Bad device specification mmc 0 **
477 05:17:54.181906 Couldn't find partition mmc 0
478 05:17:54.185566 Error: could not access storage.
479 05:17:55.448982 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 05:17:55.449636 bl2_stage_init 0x01
481 05:17:55.450088 bl2_stage_init 0x81
482 05:17:55.454408 hw id: 0x0000 - pwm id 0x01
483 05:17:55.454879 bl2_stage_init 0xc1
484 05:17:55.455302 bl2_stage_init 0x02
485 05:17:55.455713
486 05:17:55.460088 L0:00000000
487 05:17:55.460601 L1:20000703
488 05:17:55.461017 L2:00008067
489 05:17:55.461425 L3:14000000
490 05:17:55.462938 B2:00402000
491 05:17:55.463406 B1:e0f83180
492 05:17:55.463817
493 05:17:55.464275 TE: 58167
494 05:17:55.464694
495 05:17:55.474072 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 05:17:55.474605
497 05:17:55.475023 Board ID = 1
498 05:17:55.475422 Set A53 clk to 24M
499 05:17:55.475833 Set A73 clk to 24M
500 05:17:55.479781 Set clk81 to 24M
501 05:17:55.480317 A53 clk: 1200 MHz
502 05:17:55.480733 A73 clk: 1200 MHz
503 05:17:55.485387 CLK81: 166.6M
504 05:17:55.485868 smccc: 00012abe
505 05:17:55.490888 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 05:17:55.491382 board id: 1
507 05:17:55.496566 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 05:17:55.510435 fw parse done
509 05:17:55.516221 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 05:17:55.558796 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 05:17:55.569761 PIEI prepare done
512 05:17:55.570368 fastboot data load
513 05:17:55.570826 fastboot data verify
514 05:17:55.575297 verify result: 266
515 05:17:55.580967 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 05:17:55.581504 LPDDR4 probe
517 05:17:55.581930 ddr clk to 1584MHz
518 05:17:55.588891 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 05:17:55.626206
520 05:17:55.626598 dmc_version 0001
521 05:17:55.632927 Check phy result
522 05:17:55.638903 INFO : End of CA training
523 05:17:55.639294 INFO : End of initialization
524 05:17:55.644605 INFO : Training has run successfully!
525 05:17:55.645794 Check phy result
526 05:17:55.650147 INFO : End of initialization
527 05:17:55.651291 INFO : End of read enable training
528 05:17:55.655694 INFO : End of fine write leveling
529 05:17:55.661253 INFO : End of Write leveling coarse delay
530 05:17:55.661799 INFO : Training has run successfully!
531 05:17:55.662235 Check phy result
532 05:17:55.666817 INFO : End of initialization
533 05:17:55.667313 INFO : End of read dq deskew training
534 05:17:55.672404 INFO : End of MPR read delay center optimization
535 05:17:55.678040 INFO : End of write delay center optimization
536 05:17:55.683627 INFO : End of read delay center optimization
537 05:17:55.684211 INFO : End of max read latency training
538 05:17:55.689242 INFO : Training has run successfully!
539 05:17:55.689753 1D training succeed
540 05:17:55.698528 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 05:17:55.745994 Check phy result
542 05:17:55.746571 INFO : End of initialization
543 05:17:55.767641 INFO : End of 2D read delay Voltage center optimization
544 05:17:55.787880 INFO : End of 2D read delay Voltage center optimization
545 05:17:55.838893 INFO : End of 2D write delay Voltage center optimization
546 05:17:55.888871 INFO : End of 2D write delay Voltage center optimization
547 05:17:55.894402 INFO : Training has run successfully!
548 05:17:55.895147
549 05:17:55.895634 channel==0
550 05:17:55.899924 RxClkDly_Margin_A0==88 ps 9
551 05:17:55.900496 TxDqDly_Margin_A0==98 ps 10
552 05:17:55.905551 RxClkDly_Margin_A1==88 ps 9
553 05:17:55.906050 TxDqDly_Margin_A1==98 ps 10
554 05:17:55.906483 TrainedVREFDQ_A0==74
555 05:17:55.911103 TrainedVREFDQ_A1==74
556 05:17:55.911615 VrefDac_Margin_A0==25
557 05:17:55.912133 DeviceVref_Margin_A0==40
558 05:17:55.916705 VrefDac_Margin_A1==25
559 05:17:55.917189 DeviceVref_Margin_A1==40
560 05:17:55.917597
561 05:17:55.918002
562 05:17:55.922336 channel==1
563 05:17:55.922795 RxClkDly_Margin_A0==98 ps 10
564 05:17:55.923198 TxDqDly_Margin_A0==88 ps 9
565 05:17:55.927858 RxClkDly_Margin_A1==98 ps 10
566 05:17:55.928344 TxDqDly_Margin_A1==88 ps 9
567 05:17:55.933542 TrainedVREFDQ_A0==77
568 05:17:55.934070 TrainedVREFDQ_A1==77
569 05:17:55.934520 VrefDac_Margin_A0==22
570 05:17:55.939170 DeviceVref_Margin_A0==37
571 05:17:55.939673 VrefDac_Margin_A1==22
572 05:17:55.944688 DeviceVref_Margin_A1==37
573 05:17:55.945136
574 05:17:55.945540 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 05:17:55.945937
576 05:17:55.978459 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
577 05:17:55.979072 2D training succeed
578 05:17:55.983880 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 05:17:55.989467 auto size-- 65535DDR cs0 size: 2048MB
580 05:17:55.989949 DDR cs1 size: 2048MB
581 05:17:55.995082 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 05:17:55.995553 cs0 DataBus test pass
583 05:17:56.000681 cs1 DataBus test pass
584 05:17:56.001149 cs0 AddrBus test pass
585 05:17:56.001555 cs1 AddrBus test pass
586 05:17:56.001955
587 05:17:56.006392 100bdlr_step_size ps== 420
588 05:17:56.006903 result report
589 05:17:56.011928 boot times 0Enable ddr reg access
590 05:17:56.017256 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 05:17:56.030717 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 05:17:56.602843 0.0;M3 CHK:0;cm4_sp_mode 0
593 05:17:56.603512 MVN_1=0x00000000
594 05:17:56.608358 MVN_2=0x00000000
595 05:17:56.614221 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 05:17:56.614799 OPS=0x10
597 05:17:56.615287 ring efuse init
598 05:17:56.615751 chipver efuse init
599 05:17:56.619830 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 05:17:56.625291 [0.018961 Inits done]
601 05:17:56.625885 secure task start!
602 05:17:56.626386 high task start!
603 05:17:56.629360 low task start!
604 05:17:56.629929 run into bl31
605 05:17:56.636785 NOTICE: BL31: v1.3(release):4fc40b1
606 05:17:56.644368 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 05:17:56.644943 NOTICE: BL31: G12A normal boot!
608 05:17:56.669790 NOTICE: BL31: BL33 decompress pass
609 05:17:56.675366 ERROR: Error initializing runtime service opteed_fast
610 05:17:57.908394
611 05:17:57.909070
612 05:17:57.916880 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 05:17:57.917401
614 05:17:57.917874 Model: Libre Computer AML-A311D-CC Alta
615 05:17:58.125290 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 05:17:58.148781 DRAM: 2 GiB (effective 3.8 GiB)
617 05:17:58.291602 Core: 408 devices, 31 uclasses, devicetree: separate
618 05:17:58.297443 WDT: Not starting watchdog@f0d0
619 05:17:58.329723 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 05:17:58.342324 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 05:17:58.347308 ** Bad device specification mmc 0 **
622 05:17:58.357594 Card did not respond to voltage select! : -110
623 05:17:58.365130 ** Bad device specification mmc 0 **
624 05:17:58.365475 Couldn't find partition mmc 0
625 05:17:58.373460 Card did not respond to voltage select! : -110
626 05:17:58.379032 ** Bad device specification mmc 0 **
627 05:17:58.379371 Couldn't find partition mmc 0
628 05:17:58.384080 Error: could not access storage.
629 05:17:58.726571 Net: eth0: ethernet@ff3f0000
630 05:17:58.727227 starting USB...
631 05:17:58.978462 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 05:17:58.978901 Starting the controller
633 05:17:58.985310 USB XHCI 1.10
634 05:18:00.701055 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
635 05:18:00.701756 bl2_stage_init 0x81
636 05:18:00.706433 hw id: 0x0000 - pwm id 0x01
637 05:18:00.706947 bl2_stage_init 0xc1
638 05:18:00.707409 bl2_stage_init 0x02
639 05:18:00.707861
640 05:18:00.712049 L0:00000000
641 05:18:00.712550 L1:20000703
642 05:18:00.713007 L2:00008067
643 05:18:00.713456 L3:14000000
644 05:18:00.713904 B2:00402000
645 05:18:00.717705 B1:e0f83180
646 05:18:00.718200
647 05:18:00.718657 TE: 58150
648 05:18:00.719109
649 05:18:00.723278 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 05:18:00.723777
651 05:18:00.724268 Board ID = 1
652 05:18:00.728905 Set A53 clk to 24M
653 05:18:00.729397 Set A73 clk to 24M
654 05:18:00.729849 Set clk81 to 24M
655 05:18:00.734371 A53 clk: 1200 MHz
656 05:18:00.734863 A73 clk: 1200 MHz
657 05:18:00.735313 CLK81: 166.6M
658 05:18:00.735759 smccc: 00012aac
659 05:18:00.739972 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 05:18:00.745514 board id: 1
661 05:18:00.751225 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 05:18:00.761812 fw parse done
663 05:18:00.767717 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 05:18:00.810494 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 05:18:00.821312 PIEI prepare done
666 05:18:00.821825 fastboot data load
667 05:18:00.822283 fastboot data verify
668 05:18:00.827106 verify result: 266
669 05:18:00.832536 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 05:18:00.833041 LPDDR4 probe
671 05:18:00.833495 ddr clk to 1584MHz
672 05:18:00.840485 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 05:18:00.877878
674 05:18:00.878412 dmc_version 0001
675 05:18:00.884445 Check phy result
676 05:18:00.890483 INFO : End of CA training
677 05:18:00.890981 INFO : End of initialization
678 05:18:00.896075 INFO : Training has run successfully!
679 05:18:00.896578 Check phy result
680 05:18:00.901607 INFO : End of initialization
681 05:18:00.902093 INFO : End of read enable training
682 05:18:00.907156 INFO : End of fine write leveling
683 05:18:00.912761 INFO : End of Write leveling coarse delay
684 05:18:00.913250 INFO : Training has run successfully!
685 05:18:00.913711 Check phy result
686 05:18:00.918336 INFO : End of initialization
687 05:18:00.918818 INFO : End of read dq deskew training
688 05:18:00.924083 INFO : End of MPR read delay center optimization
689 05:18:00.929528 INFO : End of write delay center optimization
690 05:18:00.935131 INFO : End of read delay center optimization
691 05:18:00.935621 INFO : End of max read latency training
692 05:18:00.940770 INFO : Training has run successfully!
693 05:18:00.941254 1D training succeed
694 05:18:00.950012 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 05:18:00.997673 Check phy result
696 05:18:00.998232 INFO : End of initialization
697 05:18:01.020278 INFO : End of 2D read delay Voltage center optimization
698 05:18:01.040389 INFO : End of 2D read delay Voltage center optimization
699 05:18:01.091576 INFO : End of 2D write delay Voltage center optimization
700 05:18:01.141855 INFO : End of 2D write delay Voltage center optimization
701 05:18:01.147439 INFO : Training has run successfully!
702 05:18:01.147749
703 05:18:01.148016 channel==0
704 05:18:01.152989 RxClkDly_Margin_A0==88 ps 9
705 05:18:01.153354 TxDqDly_Margin_A0==98 ps 10
706 05:18:01.158682 RxClkDly_Margin_A1==88 ps 9
707 05:18:01.159059 TxDqDly_Margin_A1==98 ps 10
708 05:18:01.159299 TrainedVREFDQ_A0==74
709 05:18:01.164430 TrainedVREFDQ_A1==74
710 05:18:01.164801 VrefDac_Margin_A0==25
711 05:18:01.165040 DeviceVref_Margin_A0==40
712 05:18:01.169808 VrefDac_Margin_A1==25
713 05:18:01.170160 DeviceVref_Margin_A1==40
714 05:18:01.170400
715 05:18:01.170626
716 05:18:01.175462 channel==1
717 05:18:01.175827 RxClkDly_Margin_A0==98 ps 10
718 05:18:01.176093 TxDqDly_Margin_A0==98 ps 10
719 05:18:01.181083 RxClkDly_Margin_A1==88 ps 9
720 05:18:01.181453 TxDqDly_Margin_A1==88 ps 9
721 05:18:01.186595 TrainedVREFDQ_A0==77
722 05:18:01.186965 TrainedVREFDQ_A1==77
723 05:18:01.187209 VrefDac_Margin_A0==22
724 05:18:01.192252 DeviceVref_Margin_A0==37
725 05:18:01.192620 VrefDac_Margin_A1==24
726 05:18:01.197865 DeviceVref_Margin_A1==37
727 05:18:01.198229
728 05:18:01.198471 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 05:18:01.198711
730 05:18:01.231453 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000016 00000017 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
731 05:18:01.231897 2D training succeed
732 05:18:01.237041 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 05:18:01.242631 auto size-- 65535DDR cs0 size: 2048MB
734 05:18:01.243006 DDR cs1 size: 2048MB
735 05:18:01.248299 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 05:18:01.248672 cs0 DataBus test pass
737 05:18:01.253885 cs1 DataBus test pass
738 05:18:01.254255 cs0 AddrBus test pass
739 05:18:01.254497 cs1 AddrBus test pass
740 05:18:01.254723
741 05:18:01.259420 100bdlr_step_size ps== 420
742 05:18:01.259799 result report
743 05:18:01.265024 boot times 0Enable ddr reg access
744 05:18:01.270248 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 05:18:01.283997 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 05:18:01.857418 0.0;M3 CHK:0;cm4_sp_mode 0
747 05:18:01.858106 MVN_1=0x00000000
748 05:18:01.862923 MVN_2=0x00000000
749 05:18:01.868678 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 05:18:01.869251 OPS=0x10
751 05:18:01.869700 ring efuse init
752 05:18:01.870141 chipver efuse init
753 05:18:01.874315 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 05:18:01.879863 [0.018961 Inits done]
755 05:18:01.880382 secure task start!
756 05:18:01.880830 high task start!
757 05:18:01.884458 low task start!
758 05:18:01.884929 run into bl31
759 05:18:01.891127 NOTICE: BL31: v1.3(release):4fc40b1
760 05:18:01.898925 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 05:18:01.899402 NOTICE: BL31: G12A normal boot!
762 05:18:01.924420 NOTICE: BL31: BL33 decompress pass
763 05:18:01.930006 ERROR: Error initializing runtime service opteed_fast
764 05:18:03.162918
765 05:18:03.163601
766 05:18:03.171256 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 05:18:03.171786
768 05:18:03.172304 Model: Libre Computer AML-A311D-CC Alta
769 05:18:03.379256 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 05:18:03.403290 DRAM: 2 GiB (effective 3.8 GiB)
771 05:18:03.546224 Core: 408 devices, 31 uclasses, devicetree: separate
772 05:18:03.552113 WDT: Not starting watchdog@f0d0
773 05:18:03.584340 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 05:18:03.596777 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 05:18:03.601792 ** Bad device specification mmc 0 **
776 05:18:03.612125 Card did not respond to voltage select! : -110
777 05:18:03.619741 ** Bad device specification mmc 0 **
778 05:18:03.620286 Couldn't find partition mmc 0
779 05:18:03.628048 Card did not respond to voltage select! : -110
780 05:18:03.633594 ** Bad device specification mmc 0 **
781 05:18:03.633940 Couldn't find partition mmc 0
782 05:18:03.638622 Error: could not access storage.
783 05:18:03.981123 Net: eth0: ethernet@ff3f0000
784 05:18:03.981614 starting USB...
785 05:18:04.232883 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 05:18:04.233409 Starting the controller
787 05:18:04.239800 USB XHCI 1.10
788 05:18:06.430623 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 05:18:06.431309 bl2_stage_init 0x01
790 05:18:06.431791 bl2_stage_init 0x81
791 05:18:06.432326 hw id: 0x0000 - pwm id 0x01
792 05:18:06.432791 bl2_stage_init 0xc1
793 05:18:06.433246 bl2_stage_init 0x02
794 05:18:06.433700
795 05:18:06.434151 L0:00000000
796 05:18:06.434597 L1:20000703
797 05:18:06.435040 L2:00008067
798 05:18:06.435483 L3:14000000
799 05:18:06.435922 B2:00402000
800 05:18:06.436435 B1:e0f83180
801 05:18:06.436879
802 05:18:06.437319 TE: 58124
803 05:18:06.437766
804 05:18:06.438206 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 05:18:06.438646
806 05:18:06.439083 Board ID = 1
807 05:18:06.439518 Set A53 clk to 24M
808 05:18:06.439950 Set A73 clk to 24M
809 05:18:06.440413 Set clk81 to 24M
810 05:18:06.440848 A53 clk: 1200 MHz
811 05:18:06.441702 A73 clk: 1200 MHz
812 05:18:06.442183 CLK81: 166.6M
813 05:18:06.442628 smccc: 00012a92
814 05:18:06.443064 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 05:18:06.444710 board id: 1
816 05:18:06.449794 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 05:18:06.460477 fw parse done
818 05:18:06.466537 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 05:18:06.509145 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 05:18:06.519906 PIEI prepare done
821 05:18:06.520451 fastboot data load
822 05:18:06.520916 fastboot data verify
823 05:18:06.525621 verify result: 266
824 05:18:06.531147 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 05:18:06.531647 LPDDR4 probe
826 05:18:06.532150 ddr clk to 1584MHz
827 05:18:06.539082 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 05:18:06.576441
829 05:18:06.576962 dmc_version 0001
830 05:18:06.583076 Check phy result
831 05:18:06.588913 INFO : End of CA training
832 05:18:06.589403 INFO : End of initialization
833 05:18:06.594565 INFO : Training has run successfully!
834 05:18:06.595047 Check phy result
835 05:18:06.600189 INFO : End of initialization
836 05:18:06.600670 INFO : End of read enable training
837 05:18:06.605740 INFO : End of fine write leveling
838 05:18:06.611334 INFO : End of Write leveling coarse delay
839 05:18:06.611865 INFO : Training has run successfully!
840 05:18:06.612378 Check phy result
841 05:18:06.616927 INFO : End of initialization
842 05:18:06.617425 INFO : End of read dq deskew training
843 05:18:06.622516 INFO : End of MPR read delay center optimization
844 05:18:06.628198 INFO : End of write delay center optimization
845 05:18:06.633786 INFO : End of read delay center optimization
846 05:18:06.634269 INFO : End of max read latency training
847 05:18:06.639298 INFO : Training has run successfully!
848 05:18:06.639782 1D training succeed
849 05:18:06.648517 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 05:18:06.696164 Check phy result
851 05:18:06.696674 INFO : End of initialization
852 05:18:06.718645 INFO : End of 2D read delay Voltage center optimization
853 05:18:06.737941 INFO : End of 2D read delay Voltage center optimization
854 05:18:06.790733 INFO : End of 2D write delay Voltage center optimization
855 05:18:06.839895 INFO : End of 2D write delay Voltage center optimization
856 05:18:06.845459 INFO : Training has run successfully!
857 05:18:06.845993
858 05:18:06.846441 channel==0
859 05:18:06.850964 RxClkDly_Margin_A0==88 ps 9
860 05:18:06.851458 TxDqDly_Margin_A0==98 ps 10
861 05:18:06.854395 RxClkDly_Margin_A1==88 ps 9
862 05:18:06.854878 TxDqDly_Margin_A1==88 ps 9
863 05:18:06.860037 TrainedVREFDQ_A0==74
864 05:18:06.860559 TrainedVREFDQ_A1==74
865 05:18:06.861004 VrefDac_Margin_A0==24
866 05:18:06.865561 DeviceVref_Margin_A0==40
867 05:18:06.866069 VrefDac_Margin_A1==24
868 05:18:06.871152 DeviceVref_Margin_A1==40
869 05:18:06.871661
870 05:18:06.872123
871 05:18:06.872527 channel==1
872 05:18:06.872919 RxClkDly_Margin_A0==98 ps 10
873 05:18:06.874465 TxDqDly_Margin_A0==88 ps 9
874 05:18:06.880148 RxClkDly_Margin_A1==98 ps 10
875 05:18:06.880587 TxDqDly_Margin_A1==88 ps 9
876 05:18:06.880992 TrainedVREFDQ_A0==76
877 05:18:06.885746 TrainedVREFDQ_A1==77
878 05:18:06.886186 VrefDac_Margin_A0==22
879 05:18:06.891198 DeviceVref_Margin_A0==38
880 05:18:06.891661 VrefDac_Margin_A1==22
881 05:18:06.892091 DeviceVref_Margin_A1==37
882 05:18:06.892488
883 05:18:06.896882 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 05:18:06.897322
885 05:18:06.930639 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000017 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
886 05:18:06.931117 2D training succeed
887 05:18:06.936076 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 05:18:06.941685 auto size-- 65535DDR cs0 size: 2048MB
889 05:18:06.942120 DDR cs1 size: 2048MB
890 05:18:06.947322 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 05:18:06.947761 cs0 DataBus test pass
892 05:18:06.948202 cs1 DataBus test pass
893 05:18:06.952882 cs0 AddrBus test pass
894 05:18:06.953312 cs1 AddrBus test pass
895 05:18:06.953704
896 05:18:06.958424 100bdlr_step_size ps== 420
897 05:18:06.958864 result report
898 05:18:06.959252 boot times 0Enable ddr reg access
899 05:18:06.968121 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 05:18:06.980769 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 05:18:07.553848 0.0;M3 CHK:0;cm4_sp_mode 0
902 05:18:07.554485 MVN_1=0x00000000
903 05:18:07.559285 MVN_2=0x00000000
904 05:18:07.565038 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 05:18:07.565498 OPS=0x10
906 05:18:07.565920 ring efuse init
907 05:18:07.566328 chipver efuse init
908 05:18:07.570534 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 05:18:07.576145 [0.018961 Inits done]
910 05:18:07.576591 secure task start!
911 05:18:07.577006 high task start!
912 05:18:07.579730 low task start!
913 05:18:07.580200 run into bl31
914 05:18:07.587414 NOTICE: BL31: v1.3(release):4fc40b1
915 05:18:07.594245 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 05:18:07.594695 NOTICE: BL31: G12A normal boot!
917 05:18:07.620615 NOTICE: BL31: BL33 decompress pass
918 05:18:07.625372 ERROR: Error initializing runtime service opteed_fast
919 05:18:08.859271
920 05:18:08.859666
921 05:18:08.866753 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 05:18:08.867054
923 05:18:08.867270 Model: Libre Computer AML-A311D-CC Alta
924 05:18:09.075249 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 05:18:09.099509 DRAM: 2 GiB (effective 3.8 GiB)
926 05:18:09.242531 Core: 408 devices, 31 uclasses, devicetree: separate
927 05:18:09.248302 WDT: Not starting watchdog@f0d0
928 05:18:09.280729 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 05:18:09.292980 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 05:18:09.297944 ** Bad device specification mmc 0 **
931 05:18:09.308633 Card did not respond to voltage select! : -110
932 05:18:09.315976 ** Bad device specification mmc 0 **
933 05:18:09.316328 Couldn't find partition mmc 0
934 05:18:09.324255 Card did not respond to voltage select! : -110
935 05:18:09.329920 ** Bad device specification mmc 0 **
936 05:18:09.330206 Couldn't find partition mmc 0
937 05:18:09.334961 Error: could not access storage.
938 05:18:09.676391 Net: eth0: ethernet@ff3f0000
939 05:18:09.676930 starting USB...
940 05:18:09.929225 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 05:18:09.929629 Starting the controller
942 05:18:09.935113 USB XHCI 1.10
943 05:18:11.490457 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 05:18:11.497564 scanning usb for storage devices... 0 Storage Device(s) found
946 05:18:11.548766 Hit any key to stop autoboot: 1
947 05:18:11.549516 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 05:18:11.549869 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 05:18:11.550129 Setting prompt string to ['=>']
950 05:18:11.550388 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 05:18:11.556043 0
952 05:18:11.556657 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 05:18:11.556963 Sending with 10 millisecond of delay
955 05:18:12.691281 => setenv autoload no
956 05:18:12.702806 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 05:18:12.708292 setenv autoload no
958 05:18:12.709174 Sending with 10 millisecond of delay
960 05:18:14.506997 => setenv initrd_high 0xffffffff
961 05:18:14.517841 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 05:18:14.518742 setenv initrd_high 0xffffffff
963 05:18:14.519506 Sending with 10 millisecond of delay
965 05:18:16.137306 => setenv fdt_high 0xffffffff
966 05:18:16.147865 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
967 05:18:16.148411 setenv fdt_high 0xffffffff
968 05:18:16.148885 Sending with 10 millisecond of delay
970 05:18:16.440375 => dhcp
971 05:18:16.450958 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 05:18:16.451508 dhcp
973 05:18:16.451758 Speed: 1000, full duplex
974 05:18:16.451974 BOOTP broadcast 1
975 05:18:16.698906 BOOTP broadcast 2
976 05:18:16.857489 DHCP client bound to address 192.168.6.33 (406 ms)
977 05:18:16.858150 Sending with 10 millisecond of delay
979 05:18:18.534408 => setenv serverip 192.168.6.2
980 05:18:18.544959 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 05:18:18.545481 setenv serverip 192.168.6.2
982 05:18:18.545939 Sending with 10 millisecond of delay
984 05:18:22.269434 => tftpboot 0x01080000 796480/tftp-deploy-9i2ngc3b/kernel/uImage
985 05:18:22.280261 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
986 05:18:22.281158 tftpboot 0x01080000 796480/tftp-deploy-9i2ngc3b/kernel/uImage
987 05:18:22.281657 Speed: 1000, full duplex
988 05:18:22.282122 Using ethernet@ff3f0000 device
989 05:18:22.282909 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
990 05:18:22.288586 Filename '796480/tftp-deploy-9i2ngc3b/kernel/uImage'.
991 05:18:22.292452 Load address: 0x1080000
992 05:18:34.625427 Loading: *###################################T ############### 63 MiB
993 05:18:34.626023 5.1 MiB/s
994 05:18:34.626457 done
995 05:18:34.629546 Bytes transferred = 66101824 (3f0a240 hex)
996 05:18:34.630325 Sending with 10 millisecond of delay
998 05:18:39.317036 => tftpboot 0x08000000 796480/tftp-deploy-9i2ngc3b/ramdisk/ramdisk.cpio.gz.uboot
999 05:18:39.327857 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:00)
1000 05:18:39.328756 tftpboot 0x08000000 796480/tftp-deploy-9i2ngc3b/ramdisk/ramdisk.cpio.gz.uboot
1001 05:18:39.329240 Speed: 1000, full duplex
1002 05:18:39.329669 Using ethernet@ff3f0000 device
1003 05:18:39.330409 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1004 05:18:39.339011 Filename '796480/tftp-deploy-9i2ngc3b/ramdisk/ramdisk.cpio.gz.uboot'.
1005 05:18:39.339562 Load address: 0x8000000
1006 05:18:40.150715 Loading: *################ UDP wrong checksum 000000ff 0000f90a
1007 05:18:40.159046 UDP wrong checksum 000000ff 00008ffd
1008 05:18:42.108288 ################################# UDP wrong checksum 00000007 0000d602
1009 05:18:47.109359 T UDP wrong checksum 00000007 0000d602
1010 05:18:48.105195 UDP wrong checksum 000000ff 00005bba
1011 05:18:48.114443 UDP wrong checksum 000000ff 0000f4ac
1012 05:18:57.111241 T T UDP wrong checksum 00000007 0000d602
1013 05:19:09.018322 T T UDP wrong checksum 000000ff 00000e9e
1014 05:19:09.038088 UDP wrong checksum 000000ff 0000ab90
1015 05:19:17.112487 T UDP wrong checksum 00000007 0000d602
1016 05:19:37.120559 T T T T
1017 05:19:37.121387 Retry count exceeded; starting again
1019 05:19:37.123271 end: 2.4.3 bootloader-commands (duration 00:01:26) [common]
1022 05:19:37.125863 end: 2.4 uboot-commands (duration 00:01:57) [common]
1024 05:19:37.127682 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1026 05:19:37.129073 end: 2 uboot-action (duration 00:01:58) [common]
1028 05:19:37.131026 Cleaning after the job
1029 05:19:37.131739 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/ramdisk
1030 05:19:37.133680 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/kernel
1031 05:19:37.148092 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/dtb
1032 05:19:37.149791 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/nfsrootfs
1033 05:19:37.188012 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796480/tftp-deploy-9i2ngc3b/modules
1034 05:19:37.197247 start: 4.1 power-off (timeout 00:00:30) [common]
1035 05:19:37.198036 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1036 05:19:37.233384 >> OK - accepted request
1037 05:19:37.235506 Returned 0 in 0 seconds
1038 05:19:37.336629 end: 4.1 power-off (duration 00:00:00) [common]
1040 05:19:37.338191 start: 4.2 read-feedback (timeout 00:10:00) [common]
1041 05:19:37.338993 Listened to connection for namespace 'common' for up to 1s
1042 05:19:38.339888 Finalising connection for namespace 'common'
1043 05:19:38.340442 Disconnecting from shell: Finalise
1044 05:19:38.340720 =>
1045 05:19:38.441389 end: 4.2 read-feedback (duration 00:00:01) [common]
1046 05:19:38.441852 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/796480
1047 05:19:40.201033 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/796480
1048 05:19:40.201755 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.