Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 08:52:50.674140 lava-dispatcher, installed at version: 2024.01
2 08:52:50.674993 start: 0 validate
3 08:52:50.675508 Start time: 2024-10-08 08:52:50.675478+00:00 (UTC)
4 08:52:50.676264 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 08:52:50.677174 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 08:52:50.715581 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 08:52:50.716178 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241008%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 08:52:50.747036 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 08:52:50.747672 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241008%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 08:52:50.776514 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 08:52:50.776993 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241008%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 08:52:50.814603 validate duration: 0.14
14 08:52:50.815482 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 08:52:50.815820 start: 1.1 download-retry (timeout 00:10:00) [common]
16 08:52:50.816160 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 08:52:50.816779 Not decompressing ramdisk as can be used compressed.
18 08:52:50.817219 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 08:52:50.817502 saving as /var/lib/lava/dispatcher/tmp/819493/tftp-deploy-n0mm_gqo/ramdisk/rootfs.cpio.gz
20 08:52:50.817784 total size: 8181887 (7 MB)
21 08:52:50.853801 progress 0 % (0 MB)
22 08:52:50.859675 progress 5 % (0 MB)
23 08:52:50.865298 progress 10 % (0 MB)
24 08:52:50.871297 progress 15 % (1 MB)
25 08:52:50.876693 progress 20 % (1 MB)
26 08:52:50.882434 progress 25 % (1 MB)
27 08:52:50.887898 progress 30 % (2 MB)
28 08:52:50.893690 progress 35 % (2 MB)
29 08:52:50.899008 progress 40 % (3 MB)
30 08:52:50.904742 progress 45 % (3 MB)
31 08:52:50.910118 progress 50 % (3 MB)
32 08:52:50.916065 progress 55 % (4 MB)
33 08:52:50.921363 progress 60 % (4 MB)
34 08:52:50.927039 progress 65 % (5 MB)
35 08:52:50.932430 progress 70 % (5 MB)
36 08:52:50.938233 progress 75 % (5 MB)
37 08:52:50.943490 progress 80 % (6 MB)
38 08:52:50.949196 progress 85 % (6 MB)
39 08:52:50.954506 progress 90 % (7 MB)
40 08:52:50.960221 progress 95 % (7 MB)
41 08:52:50.965157 progress 100 % (7 MB)
42 08:52:50.965808 7 MB downloaded in 0.15 s (52.72 MB/s)
43 08:52:50.966365 end: 1.1.1 http-download (duration 00:00:00) [common]
45 08:52:50.967272 end: 1.1 download-retry (duration 00:00:00) [common]
46 08:52:50.967581 start: 1.2 download-retry (timeout 00:10:00) [common]
47 08:52:50.967865 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 08:52:50.968425 downloading http://storage.kernelci.org/next/master/next-20241008/arm64/defconfig/gcc-12/kernel/Image
49 08:52:50.968692 saving as /var/lib/lava/dispatcher/tmp/819493/tftp-deploy-n0mm_gqo/kernel/Image
50 08:52:50.968916 total size: 45713920 (43 MB)
51 08:52:50.969135 No compression specified
52 08:52:51.001721 progress 0 % (0 MB)
53 08:52:51.030027 progress 5 % (2 MB)
54 08:52:51.058151 progress 10 % (4 MB)
55 08:52:51.086145 progress 15 % (6 MB)
56 08:52:51.114218 progress 20 % (8 MB)
57 08:52:51.141535 progress 25 % (10 MB)
58 08:52:51.169129 progress 30 % (13 MB)
59 08:52:51.196867 progress 35 % (15 MB)
60 08:52:51.224865 progress 40 % (17 MB)
61 08:52:51.252526 progress 45 % (19 MB)
62 08:52:51.280240 progress 50 % (21 MB)
63 08:52:51.308364 progress 55 % (24 MB)
64 08:52:51.336034 progress 60 % (26 MB)
65 08:52:51.363184 progress 65 % (28 MB)
66 08:52:51.390967 progress 70 % (30 MB)
67 08:52:51.418829 progress 75 % (32 MB)
68 08:52:51.446758 progress 80 % (34 MB)
69 08:52:51.474436 progress 85 % (37 MB)
70 08:52:51.502340 progress 90 % (39 MB)
71 08:52:51.530245 progress 95 % (41 MB)
72 08:52:51.557381 progress 100 % (43 MB)
73 08:52:51.557880 43 MB downloaded in 0.59 s (74.02 MB/s)
74 08:52:51.558355 end: 1.2.1 http-download (duration 00:00:01) [common]
76 08:52:51.559165 end: 1.2 download-retry (duration 00:00:01) [common]
77 08:52:51.559440 start: 1.3 download-retry (timeout 00:09:59) [common]
78 08:52:51.559703 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 08:52:51.560197 downloading http://storage.kernelci.org/next/master/next-20241008/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 08:52:51.560447 saving as /var/lib/lava/dispatcher/tmp/819493/tftp-deploy-n0mm_gqo/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 08:52:51.560654 total size: 53209 (0 MB)
82 08:52:51.560861 No compression specified
83 08:52:51.593993 progress 61 % (0 MB)
84 08:52:51.594816 progress 100 % (0 MB)
85 08:52:51.595339 0 MB downloaded in 0.03 s (1.46 MB/s)
86 08:52:51.595787 end: 1.3.1 http-download (duration 00:00:00) [common]
88 08:52:51.596633 end: 1.3 download-retry (duration 00:00:00) [common]
89 08:52:51.596892 start: 1.4 download-retry (timeout 00:09:59) [common]
90 08:52:51.597151 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 08:52:51.597607 downloading http://storage.kernelci.org/next/master/next-20241008/arm64/defconfig/gcc-12/modules.tar.xz
92 08:52:51.597845 saving as /var/lib/lava/dispatcher/tmp/819493/tftp-deploy-n0mm_gqo/modules/modules.tar
93 08:52:51.598050 total size: 11607224 (11 MB)
94 08:52:51.598258 Using unxz to decompress xz
95 08:52:51.629160 progress 0 % (0 MB)
96 08:52:51.695683 progress 5 % (0 MB)
97 08:52:51.769348 progress 10 % (1 MB)
98 08:52:51.848255 progress 15 % (1 MB)
99 08:52:51.924843 progress 20 % (2 MB)
100 08:52:52.001321 progress 25 % (2 MB)
101 08:52:52.080685 progress 30 % (3 MB)
102 08:52:52.153175 progress 35 % (3 MB)
103 08:52:52.232956 progress 40 % (4 MB)
104 08:52:52.318609 progress 45 % (5 MB)
105 08:52:52.399824 progress 50 % (5 MB)
106 08:52:52.478493 progress 55 % (6 MB)
107 08:52:52.558910 progress 60 % (6 MB)
108 08:52:52.642451 progress 65 % (7 MB)
109 08:52:52.717727 progress 70 % (7 MB)
110 08:52:52.799136 progress 75 % (8 MB)
111 08:52:52.880890 progress 80 % (8 MB)
112 08:52:52.960160 progress 85 % (9 MB)
113 08:52:53.027809 progress 90 % (9 MB)
114 08:52:53.125709 progress 95 % (10 MB)
115 08:52:53.222376 progress 100 % (11 MB)
116 08:52:53.233640 11 MB downloaded in 1.64 s (6.77 MB/s)
117 08:52:53.234216 end: 1.4.1 http-download (duration 00:00:02) [common]
119 08:52:53.235031 end: 1.4 download-retry (duration 00:00:02) [common]
120 08:52:53.235303 start: 1.5 prepare-tftp-overlay (timeout 00:09:58) [common]
121 08:52:53.235570 start: 1.5.1 extract-nfsrootfs (timeout 00:09:58) [common]
122 08:52:53.235818 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 08:52:53.236201 start: 1.5.2 lava-overlay (timeout 00:09:58) [common]
124 08:52:53.237213 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3
125 08:52:53.238047 makedir: /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin
126 08:52:53.238678 makedir: /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/tests
127 08:52:53.239290 makedir: /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/results
128 08:52:53.239898 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-add-keys
129 08:52:53.240925 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-add-sources
130 08:52:53.241840 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-background-process-start
131 08:52:53.242763 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-background-process-stop
132 08:52:53.243757 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-common-functions
133 08:52:53.244722 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-echo-ipv4
134 08:52:53.245636 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-install-packages
135 08:52:53.246520 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-installed-packages
136 08:52:53.247397 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-os-build
137 08:52:53.248317 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-probe-channel
138 08:52:53.249211 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-probe-ip
139 08:52:53.250089 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-target-ip
140 08:52:53.250999 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-target-mac
141 08:52:53.251886 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-target-storage
142 08:52:53.252833 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-test-case
143 08:52:53.253751 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-test-event
144 08:52:53.254629 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-test-feedback
145 08:52:53.255507 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-test-raise
146 08:52:53.256449 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-test-reference
147 08:52:53.257339 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-test-runner
148 08:52:53.258236 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-test-set
149 08:52:53.259119 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-test-shell
150 08:52:53.260030 Updating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-install-packages (oe)
151 08:52:53.261011 Updating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/bin/lava-installed-packages (oe)
152 08:52:53.261841 Creating /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/environment
153 08:52:53.262558 LAVA metadata
154 08:52:53.263053 - LAVA_JOB_ID=819493
155 08:52:53.263478 - LAVA_DISPATCHER_IP=192.168.6.2
156 08:52:53.264194 start: 1.5.2.1 ssh-authorize (timeout 00:09:58) [common]
157 08:52:53.266033 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 08:52:53.266640 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:58) [common]
159 08:52:53.267049 skipped lava-vland-overlay
160 08:52:53.267530 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 08:52:53.268067 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:58) [common]
162 08:52:53.268311 skipped lava-multinode-overlay
163 08:52:53.268562 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 08:52:53.268818 start: 1.5.2.4 test-definition (timeout 00:09:58) [common]
165 08:52:53.269075 Loading test definitions
166 08:52:53.269367 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:58) [common]
167 08:52:53.269595 Using /lava-819493 at stage 0
168 08:52:53.270819 uuid=819493_1.5.2.4.1 testdef=None
169 08:52:53.271145 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 08:52:53.271417 start: 1.5.2.4.2 test-overlay (timeout 00:09:58) [common]
171 08:52:53.273309 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 08:52:53.274162 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:58) [common]
174 08:52:53.276608 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 08:52:53.277453 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:58) [common]
177 08:52:53.279692 runner path: /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/0/tests/0_dmesg test_uuid 819493_1.5.2.4.1
178 08:52:53.280340 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 08:52:53.281129 Creating lava-test-runner.conf files
181 08:52:53.281331 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/819493/lava-overlay-rliwc0k3/lava-819493/0 for stage 0
182 08:52:53.281759 - 0_dmesg
183 08:52:53.282138 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 08:52:53.282428 start: 1.5.2.5 compress-overlay (timeout 00:09:58) [common]
185 08:52:53.307015 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 08:52:53.307443 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:58) [common]
187 08:52:53.307709 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 08:52:53.307999 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 08:52:53.308273 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
190 08:52:54.228046 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 08:52:54.228622 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
192 08:52:54.228935 extracting modules file /var/lib/lava/dispatcher/tmp/819493/tftp-deploy-n0mm_gqo/modules/modules.tar to /var/lib/lava/dispatcher/tmp/819493/extract-overlay-ramdisk-6m8ikpuw/ramdisk
193 08:52:55.723168 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 08:52:55.723650 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 08:52:55.723948 [common] Applying overlay /var/lib/lava/dispatcher/tmp/819493/compress-overlay-hubqrul1/overlay-1.5.2.5.tar.gz to ramdisk
196 08:52:55.724212 [common] Applying overlay /var/lib/lava/dispatcher/tmp/819493/compress-overlay-hubqrul1/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/819493/extract-overlay-ramdisk-6m8ikpuw/ramdisk
197 08:52:55.754523 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 08:52:55.754930 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 08:52:55.755198 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 08:52:55.755422 Converting downloaded kernel to a uImage
201 08:52:55.755741 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/819493/tftp-deploy-n0mm_gqo/kernel/Image /var/lib/lava/dispatcher/tmp/819493/tftp-deploy-n0mm_gqo/kernel/uImage
202 08:52:56.240600 output: Image Name:
203 08:52:56.241016 output: Created: Tue Oct 8 08:52:55 2024
204 08:52:56.241243 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 08:52:56.241454 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 08:52:56.241658 output: Load Address: 01080000
207 08:52:56.241859 output: Entry Point: 01080000
208 08:52:56.242061 output:
209 08:52:56.242396 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 08:52:56.242673 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 08:52:56.242954 start: 1.5.7 configure-preseed-file (timeout 00:09:55) [common]
212 08:52:56.243218 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 08:52:56.243482 start: 1.5.8 compress-ramdisk (timeout 00:09:55) [common]
214 08:52:56.243744 Building ramdisk /var/lib/lava/dispatcher/tmp/819493/extract-overlay-ramdisk-6m8ikpuw/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/819493/extract-overlay-ramdisk-6m8ikpuw/ramdisk
215 08:52:58.642435 >> 181745 blocks
216 08:53:07.098226 Adding RAMdisk u-boot header.
217 08:53:07.098671 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/819493/extract-overlay-ramdisk-6m8ikpuw/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/819493/extract-overlay-ramdisk-6m8ikpuw/ramdisk.cpio.gz.uboot
218 08:53:07.425780 output: Image Name:
219 08:53:07.426401 output: Created: Tue Oct 8 08:53:07 2024
220 08:53:07.426823 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 08:53:07.427235 output: Data Size: 26076123 Bytes = 25464.96 KiB = 24.87 MiB
222 08:53:07.427641 output: Load Address: 00000000
223 08:53:07.428092 output: Entry Point: 00000000
224 08:53:07.428499 output:
225 08:53:07.429551 rename /var/lib/lava/dispatcher/tmp/819493/extract-overlay-ramdisk-6m8ikpuw/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/819493/tftp-deploy-n0mm_gqo/ramdisk/ramdisk.cpio.gz.uboot
226 08:53:07.430275 end: 1.5.8 compress-ramdisk (duration 00:00:11) [common]
227 08:53:07.430827 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
228 08:53:07.431360 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:43) [common]
229 08:53:07.431825 No LXC device requested
230 08:53:07.432380 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 08:53:07.432905 start: 1.7 deploy-device-env (timeout 00:09:43) [common]
232 08:53:07.433410 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 08:53:07.433830 Checking files for TFTP limit of 4294967296 bytes.
234 08:53:07.436522 end: 1 tftp-deploy (duration 00:00:17) [common]
235 08:53:07.437099 start: 2 uboot-action (timeout 00:05:00) [common]
236 08:53:07.437640 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 08:53:07.438150 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 08:53:07.438682 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 08:53:07.439212 Using kernel file from prepare-kernel: 819493/tftp-deploy-n0mm_gqo/kernel/uImage
240 08:53:07.439823 substitutions:
241 08:53:07.440265 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 08:53:07.440677 - {DTB_ADDR}: 0x01070000
243 08:53:07.441076 - {DTB}: 819493/tftp-deploy-n0mm_gqo/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 08:53:07.441482 - {INITRD}: 819493/tftp-deploy-n0mm_gqo/ramdisk/ramdisk.cpio.gz.uboot
245 08:53:07.441883 - {KERNEL_ADDR}: 0x01080000
246 08:53:07.442278 - {KERNEL}: 819493/tftp-deploy-n0mm_gqo/kernel/uImage
247 08:53:07.442672 - {LAVA_MAC}: None
248 08:53:07.443107 - {PRESEED_CONFIG}: None
249 08:53:07.443504 - {PRESEED_LOCAL}: None
250 08:53:07.443894 - {RAMDISK_ADDR}: 0x08000000
251 08:53:07.444312 - {RAMDISK}: 819493/tftp-deploy-n0mm_gqo/ramdisk/ramdisk.cpio.gz.uboot
252 08:53:07.444710 - {ROOT_PART}: None
253 08:53:07.445104 - {ROOT}: None
254 08:53:07.445496 - {SERVER_IP}: 192.168.6.2
255 08:53:07.445890 - {TEE_ADDR}: 0x83000000
256 08:53:07.446278 - {TEE}: None
257 08:53:07.446669 Parsed boot commands:
258 08:53:07.447045 - setenv autoload no
259 08:53:07.447432 - setenv initrd_high 0xffffffff
260 08:53:07.447819 - setenv fdt_high 0xffffffff
261 08:53:07.448237 - dhcp
262 08:53:07.448625 - setenv serverip 192.168.6.2
263 08:53:07.449015 - tftpboot 0x01080000 819493/tftp-deploy-n0mm_gqo/kernel/uImage
264 08:53:07.449404 - tftpboot 0x08000000 819493/tftp-deploy-n0mm_gqo/ramdisk/ramdisk.cpio.gz.uboot
265 08:53:07.449791 - tftpboot 0x01070000 819493/tftp-deploy-n0mm_gqo/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 08:53:07.450178 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 08:53:07.450570 - bootm 0x01080000 0x08000000 0x01070000
268 08:53:07.451065 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 08:53:07.452580 start: 2.3 connect-device (timeout 00:05:00) [common]
271 08:53:07.453026 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 08:53:07.467971 Setting prompt string to ['lava-test: # ']
273 08:53:07.469472 end: 2.3 connect-device (duration 00:00:00) [common]
274 08:53:07.470090 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 08:53:07.470650 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 08:53:07.471207 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 08:53:07.472396 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 08:53:07.513178 >> OK - accepted request
279 08:53:07.515253 Returned 0 in 0 seconds
280 08:53:07.616393 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 08:53:07.617993 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 08:53:07.618568 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 08:53:07.619086 Setting prompt string to ['Hit any key to stop autoboot']
285 08:53:07.619541 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 08:53:07.621160 Trying 192.168.56.21...
287 08:53:07.621643 Connected to conserv1.
288 08:53:07.622073 Escape character is '^]'.
289 08:53:07.622501
290 08:53:07.622922 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
291 08:53:07.623356
292 08:53:15.087004 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 08:53:15.087411 bl2_stage_init 0x01
294 08:53:15.087660 bl2_stage_init 0x81
295 08:53:15.092483 hw id: 0x0000 - pwm id 0x01
296 08:53:15.092948 bl2_stage_init 0xc1
297 08:53:15.098086 bl2_stage_init 0x02
298 08:53:15.098512
299 08:53:15.098859 L0:00000000
300 08:53:15.099186 L1:00000703
301 08:53:15.099451 L2:00008067
302 08:53:15.099668 L3:15000000
303 08:53:15.104063 S1:00000000
304 08:53:15.104376 B2:20282000
305 08:53:15.104602 B1:a0f83180
306 08:53:15.104809
307 08:53:15.105022 TE: 69064
308 08:53:15.105229
309 08:53:15.109623 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 08:53:15.109925
311 08:53:15.115398 Board ID = 1
312 08:53:15.115696 Set cpu clk to 24M
313 08:53:15.115925 Set clk81 to 24M
314 08:53:15.120836 Use GP1_pll as DSU clk.
315 08:53:15.121130 DSU clk: 1200 Mhz
316 08:53:15.121349 CPU clk: 1200 MHz
317 08:53:15.126476 Set clk81 to 166.6M
318 08:53:15.132068 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 08:53:15.132509 board id: 1
320 08:53:15.137990 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 08:53:15.149869 fw parse done
322 08:53:15.155849 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 08:53:15.199095 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 08:53:15.212465 PIEI prepare done
325 08:53:15.212952 fastboot data load
326 08:53:15.213367 fastboot data verify
327 08:53:15.215564 verify result: 266
328 08:53:15.221240 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 08:53:15.221681 LPDDR4 probe
330 08:53:15.222086 ddr clk to 1584MHz
331 08:53:15.229261 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 08:53:15.267068
333 08:53:15.267619 dmc_version 0001
334 08:53:15.273975 Check phy result
335 08:53:15.280019 INFO : End of CA training
336 08:53:15.280470 INFO : End of initialization
337 08:53:15.285514 INFO : Training has run successfully!
338 08:53:15.285946 Check phy result
339 08:53:15.291112 INFO : End of initialization
340 08:53:15.291544 INFO : End of read enable training
341 08:53:15.294461 INFO : End of fine write leveling
342 08:53:15.300076 INFO : End of Write leveling coarse delay
343 08:53:15.305640 INFO : Training has run successfully!
344 08:53:15.306074 Check phy result
345 08:53:15.306483 INFO : End of initialization
346 08:53:15.311206 INFO : End of read dq deskew training
347 08:53:15.316809 INFO : End of MPR read delay center optimization
348 08:53:15.317270 INFO : End of write delay center optimization
349 08:53:15.322410 INFO : End of read delay center optimization
350 08:53:15.328080 INFO : End of max read latency training
351 08:53:15.328556 INFO : Training has run successfully!
352 08:53:15.333594 1D training succeed
353 08:53:15.339583 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 08:53:15.387757 Check phy result
355 08:53:15.388190 INFO : End of initialization
356 08:53:15.415433 INFO : End of 2D read delay Voltage center optimization
357 08:53:15.439657 INFO : End of 2D read delay Voltage center optimization
358 08:53:15.496266 INFO : End of 2D write delay Voltage center optimization
359 08:53:15.550320 INFO : End of 2D write delay Voltage center optimization
360 08:53:15.555792 INFO : Training has run successfully!
361 08:53:15.556382
362 08:53:15.556855 channel==0
363 08:53:15.561378 RxClkDly_Margin_A0==88 ps 9
364 08:53:15.561893 TxDqDly_Margin_A0==88 ps 9
365 08:53:15.566946 RxClkDly_Margin_A1==78 ps 8
366 08:53:15.567456 TxDqDly_Margin_A1==88 ps 9
367 08:53:15.567914 TrainedVREFDQ_A0==75
368 08:53:15.572677 TrainedVREFDQ_A1==74
369 08:53:15.573190 VrefDac_Margin_A0==22
370 08:53:15.573639 DeviceVref_Margin_A0==39
371 08:53:15.578218 VrefDac_Margin_A1==23
372 08:53:15.578720 DeviceVref_Margin_A1==40
373 08:53:15.579174
374 08:53:15.579618
375 08:53:15.580098 channel==1
376 08:53:15.583745 RxClkDly_Margin_A0==88 ps 9
377 08:53:15.584284 TxDqDly_Margin_A0==98 ps 10
378 08:53:15.589357 RxClkDly_Margin_A1==88 ps 9
379 08:53:15.589867 TxDqDly_Margin_A1==88 ps 9
380 08:53:15.594953 TrainedVREFDQ_A0==78
381 08:53:15.595494 TrainedVREFDQ_A1==75
382 08:53:15.595961 VrefDac_Margin_A0==22
383 08:53:15.600622 DeviceVref_Margin_A0==36
384 08:53:15.601136 VrefDac_Margin_A1==22
385 08:53:15.601589 DeviceVref_Margin_A1==39
386 08:53:15.606239
387 08:53:15.606757 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 08:53:15.607215
389 08:53:15.639627 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000015 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000015 00000017 dram_vref_reg_value 0x 00000061
390 08:53:15.640330 2D training succeed
391 08:53:15.645283 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 08:53:15.650880 auto size-- 65535DDR cs0 size: 2048MB
393 08:53:15.651411 DDR cs1 size: 2048MB
394 08:53:15.656505 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 08:53:15.657032 cs0 DataBus test pass
396 08:53:15.662059 cs1 DataBus test pass
397 08:53:15.662574 cs0 AddrBus test pass
398 08:53:15.663021 cs1 AddrBus test pass
399 08:53:15.663456
400 08:53:15.667671 100bdlr_step_size ps== 471
401 08:53:15.668258 result report
402 08:53:15.673295 boot times 0Enable ddr reg access
403 08:53:15.678361 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 08:53:15.692229 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 08:53:16.351557 bl2z: ptr: 05129330, size: 00001e40
406 08:53:16.359632 0.0;M3 CHK:0;cm4_sp_mode 0
407 08:53:16.360194 MVN_1=0x00000000
408 08:53:16.360660 MVN_2=0x00000000
409 08:53:16.371142 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 08:53:16.371664 OPS=0x04
411 08:53:16.372158 ring efuse init
412 08:53:16.376750 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 08:53:16.377260 [0.017354 Inits done]
414 08:53:16.377717 secure task start!
415 08:53:16.384785 high task start!
416 08:53:16.385288 low task start!
417 08:53:16.385740 run into bl31
418 08:53:16.393441 NOTICE: BL31: v1.3(release):4fc40b1
419 08:53:16.401169 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 08:53:16.401690 NOTICE: BL31: G12A normal boot!
421 08:53:16.416720 NOTICE: BL31: BL33 decompress pass
422 08:53:16.422538 ERROR: Error initializing runtime service opteed_fast
423 08:53:19.137693 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 08:53:19.138371 bl2_stage_init 0x01
425 08:53:19.138848 bl2_stage_init 0x81
426 08:53:19.143303 hw id: 0x0000 - pwm id 0x01
427 08:53:19.143832 bl2_stage_init 0xc1
428 08:53:19.149029 bl2_stage_init 0x02
429 08:53:19.149608
430 08:53:19.150058 L0:00000000
431 08:53:19.150493 L1:00000703
432 08:53:19.150925 L2:00008067
433 08:53:19.151356 L3:15000000
434 08:53:19.154593 S1:00000000
435 08:53:19.155100 B2:20282000
436 08:53:19.155537 B1:a0f83180
437 08:53:19.155967
438 08:53:19.156448 TE: 68504
439 08:53:19.156878
440 08:53:19.160225 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 08:53:19.160764
442 08:53:19.165792 Board ID = 1
443 08:53:19.166314 Set cpu clk to 24M
444 08:53:19.166748 Set clk81 to 24M
445 08:53:19.171374 Use GP1_pll as DSU clk.
446 08:53:19.171888 DSU clk: 1200 Mhz
447 08:53:19.172366 CPU clk: 1200 MHz
448 08:53:19.176990 Set clk81 to 166.6M
449 08:53:19.182594 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 08:53:19.183116 board id: 1
451 08:53:19.189817 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 08:53:19.200449 fw parse done
453 08:53:19.206433 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 08:53:19.249003 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 08:53:19.260035 PIEI prepare done
456 08:53:19.260584 fastboot data load
457 08:53:19.261035 fastboot data verify
458 08:53:19.265549 verify result: 266
459 08:53:19.271185 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 08:53:19.271704 LPDDR4 probe
461 08:53:19.272197 ddr clk to 1584MHz
462 08:53:19.279154 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 08:53:19.316349
464 08:53:19.316909 dmc_version 0001
465 08:53:19.323061 Check phy result
466 08:53:19.328980 INFO : End of CA training
467 08:53:19.329502 INFO : End of initialization
468 08:53:19.334551 INFO : Training has run successfully!
469 08:53:19.335091 Check phy result
470 08:53:19.340249 INFO : End of initialization
471 08:53:19.340804 INFO : End of read enable training
472 08:53:19.345847 INFO : End of fine write leveling
473 08:53:19.351412 INFO : End of Write leveling coarse delay
474 08:53:19.351958 INFO : Training has run successfully!
475 08:53:19.352461 Check phy result
476 08:53:19.357036 INFO : End of initialization
477 08:53:19.357602 INFO : End of read dq deskew training
478 08:53:19.362624 INFO : End of MPR read delay center optimization
479 08:53:19.368244 INFO : End of write delay center optimization
480 08:53:19.373811 INFO : End of read delay center optimization
481 08:53:19.374355 INFO : End of max read latency training
482 08:53:19.379374 INFO : Training has run successfully!
483 08:53:19.379913 1D training succeed
484 08:53:19.388570 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 08:53:19.436214 Check phy result
486 08:53:19.436792 INFO : End of initialization
487 08:53:19.458505 INFO : End of 2D read delay Voltage center optimization
488 08:53:19.477677 INFO : End of 2D read delay Voltage center optimization
489 08:53:19.529527 INFO : End of 2D write delay Voltage center optimization
490 08:53:19.578726 INFO : End of 2D write delay Voltage center optimization
491 08:53:19.584299 INFO : Training has run successfully!
492 08:53:19.584841
493 08:53:19.585311 channel==0
494 08:53:19.589914 RxClkDly_Margin_A0==78 ps 8
495 08:53:19.590458 TxDqDly_Margin_A0==98 ps 10
496 08:53:19.595490 RxClkDly_Margin_A1==88 ps 9
497 08:53:19.596079 TxDqDly_Margin_A1==98 ps 10
498 08:53:19.596554 TrainedVREFDQ_A0==74
499 08:53:19.601177 TrainedVREFDQ_A1==74
500 08:53:19.601722 VrefDac_Margin_A0==24
501 08:53:19.602174 DeviceVref_Margin_A0==40
502 08:53:19.606754 VrefDac_Margin_A1==23
503 08:53:19.607292 DeviceVref_Margin_A1==40
504 08:53:19.607757
505 08:53:19.608267
506 08:53:19.612368 channel==1
507 08:53:19.612908 RxClkDly_Margin_A0==88 ps 9
508 08:53:19.613363 TxDqDly_Margin_A0==98 ps 10
509 08:53:19.618053 RxClkDly_Margin_A1==78 ps 8
510 08:53:19.618600 TxDqDly_Margin_A1==88 ps 9
511 08:53:19.623620 TrainedVREFDQ_A0==78
512 08:53:19.624188 TrainedVREFDQ_A1==78
513 08:53:19.624652 VrefDac_Margin_A0==23
514 08:53:19.629274 DeviceVref_Margin_A0==36
515 08:53:19.629807 VrefDac_Margin_A1==22
516 08:53:19.634908 DeviceVref_Margin_A1==36
517 08:53:19.635439
518 08:53:19.635894 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 08:53:19.636382
520 08:53:19.668125 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000062
521 08:53:19.668502 2D training succeed
522 08:53:19.673914 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 08:53:19.679604 auto size-- 65535DDR cs0 size: 2048MB
524 08:53:19.680265 DDR cs1 size: 2048MB
525 08:53:19.685215 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 08:53:19.685803 cs0 DataBus test pass
527 08:53:19.690833 cs1 DataBus test pass
528 08:53:19.691548 cs0 AddrBus test pass
529 08:53:19.692071 cs1 AddrBus test pass
530 08:53:19.692538
531 08:53:19.696367 100bdlr_step_size ps== 478
532 08:53:19.696970 result report
533 08:53:19.701929 boot times 0Enable ddr reg access
534 08:53:19.707193 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 08:53:19.720879 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 08:53:20.375730 bl2z: ptr: 05129330, size: 00001e40
537 08:53:20.381803 0.0;M3 CHK:0;cm4_sp_mode 0
538 08:53:20.382115 MVN_1=0x00000000
539 08:53:20.382334 MVN_2=0x00000000
540 08:53:20.393283 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 08:53:20.393610 OPS=0x04
542 08:53:20.393825 ring efuse init
543 08:53:20.399030 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 08:53:20.399476 [0.017310 Inits done]
545 08:53:20.399802 secure task start!
546 08:53:20.407067 high task start!
547 08:53:20.407495 low task start!
548 08:53:20.407731 run into bl31
549 08:53:20.415810 NOTICE: BL31: v1.3(release):4fc40b1
550 08:53:20.423578 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 08:53:20.424151 NOTICE: BL31: G12A normal boot!
552 08:53:20.439172 NOTICE: BL31: BL33 decompress pass
553 08:53:20.444621 ERROR: Error initializing runtime service opteed_fast
554 08:53:21.835269 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0
555 08:53:21.835926 bl2_stage_init 0x01
556 08:53:21.836450 bl2_stage_init 0x81
557 08:53:21.840922 hw id: 0x0000 - pwm id 0x01
558 08:53:21.841471 bl2_stage_init 0xc1
559 08:53:21.846533 bl2_stage_init 0x02
560 08:53:21.847226
561 08:53:21.847697 L0:00000000
562 08:53:21.848188 L1:00000703
563 08:53:21.848638 L2:00008067
564 08:53:21.849083 L3:15000000
565 08:53:21.852398 S1:00000000
566 08:53:21.852948 B2:20282000
567 08:53:21.853419 B1:a0f83180
568 08:53:21.853883
569 08:53:21.854340 TE: 66939
570 08:53:21.854791
571 08:53:21.857960 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 08:53:21.858497
573 08:53:21.863475 Board ID = 1
574 08:53:21.864038 Set cpu clk to 24M
575 08:53:21.864507 Set clk81 to 24M
576 08:53:21.867134 Use GP1_pll as DSU clk.
577 08:53:21.867662 DSU clk: 1200 Mhz
578 08:53:21.872690 CPU clk: 1200 MHz
579 08:53:21.873226 Set clk81 to 166.6M
580 08:53:21.878445 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 08:53:21.878978 board id: 1
582 08:53:21.887119 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 08:53:21.897781 fw parse done
584 08:53:21.903692 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 08:53:21.946442 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 08:53:21.957259 PIEI prepare done
587 08:53:21.957805 fastboot data load
588 08:53:21.958275 fastboot data verify
589 08:53:21.962856 verify result: 266
590 08:53:21.968442 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 08:53:21.968975 LPDDR4 probe
592 08:53:21.969434 ddr clk to 1584MHz
593 08:53:21.975496 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 08:53:22.013657
595 08:53:22.014253 dmc_version 0001
596 08:53:22.020513 Check phy result
597 08:53:22.026432 INFO : End of CA training
598 08:53:22.026963 INFO : End of initialization
599 08:53:22.031733 INFO : Training has run successfully!
600 08:53:22.032073 Check phy result
601 08:53:22.037390 INFO : End of initialization
602 08:53:22.037830 INFO : End of read enable training
603 08:53:22.043012 INFO : End of fine write leveling
604 08:53:22.048620 INFO : End of Write leveling coarse delay
605 08:53:22.048944 INFO : Training has run successfully!
606 08:53:22.049159 Check phy result
607 08:53:22.054281 INFO : End of initialization
608 08:53:22.054728 INFO : End of read dq deskew training
609 08:53:22.059755 INFO : End of MPR read delay center optimization
610 08:53:22.065768 INFO : End of write delay center optimization
611 08:53:22.071026 INFO : End of read delay center optimization
612 08:53:22.071342 INFO : End of max read latency training
613 08:53:22.076680 INFO : Training has run successfully!
614 08:53:22.077149 1D training succeed
615 08:53:22.085873 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 08:53:22.133565 Check phy result
617 08:53:22.133946 INFO : End of initialization
618 08:53:22.155826 INFO : End of 2D read delay Voltage center optimization
619 08:53:22.174981 INFO : End of 2D read delay Voltage center optimization
620 08:53:22.226866 INFO : End of 2D write delay Voltage center optimization
621 08:53:22.276338 INFO : End of 2D write delay Voltage center optimization
622 08:53:22.281725 INFO : Training has run successfully!
623 08:53:22.282281
624 08:53:22.282747 channel==0
625 08:53:22.287265 RxClkDly_Margin_A0==78 ps 8
626 08:53:22.287809 TxDqDly_Margin_A0==88 ps 9
627 08:53:22.292829 RxClkDly_Margin_A1==88 ps 9
628 08:53:22.293407 TxDqDly_Margin_A1==88 ps 9
629 08:53:22.293884 TrainedVREFDQ_A0==74
630 08:53:22.298565 TrainedVREFDQ_A1==74
631 08:53:22.299113 VrefDac_Margin_A0==23
632 08:53:22.299577 DeviceVref_Margin_A0==40
633 08:53:22.304067 VrefDac_Margin_A1==23
634 08:53:22.304601 DeviceVref_Margin_A1==40
635 08:53:22.305059
636 08:53:22.305511
637 08:53:22.305960 channel==1
638 08:53:22.309682 RxClkDly_Margin_A0==78 ps 8
639 08:53:22.310218 TxDqDly_Margin_A0==98 ps 10
640 08:53:22.315271 RxClkDly_Margin_A1==78 ps 8
641 08:53:22.315807 TxDqDly_Margin_A1==88 ps 9
642 08:53:22.320745 TrainedVREFDQ_A0==78
643 08:53:22.321291 TrainedVREFDQ_A1==75
644 08:53:22.321753 VrefDac_Margin_A0==22
645 08:53:22.326651 DeviceVref_Margin_A0==36
646 08:53:22.327211 VrefDac_Margin_A1==22
647 08:53:22.327677 DeviceVref_Margin_A1==39
648 08:53:22.332080
649 08:53:22.332637 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 08:53:22.333103
651 08:53:22.365480 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001b 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
652 08:53:22.366137 2D training succeed
653 08:53:22.371262 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 08:53:22.376710 auto size-- 65535DDR cs0 size: 2048MB
655 08:53:22.377260 DDR cs1 size: 2048MB
656 08:53:22.382368 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 08:53:22.382916 cs0 DataBus test pass
658 08:53:22.387912 cs1 DataBus test pass
659 08:53:22.388514 cs0 AddrBus test pass
660 08:53:22.388980 cs1 AddrBus test pass
661 08:53:22.389649
662 08:53:22.393521 100bdlr_step_size ps== 464
663 08:53:22.394047 result report
664 08:53:22.399130 boot times 0Enable ddr reg access
665 08:53:22.404233 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 08:53:22.418017 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 08:53:23.073593 bl2z: ptr: 05129330, size: 00001e40
668 08:53:23.080924 0.0;M3 CHK:0;cm4_sp_mode 0
669 08:53:23.081498 MVN_1=0x00000000
670 08:53:23.081958 MVN_2=0x00000000
671 08:53:23.092357 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 08:53:23.092880 OPS=0x04
673 08:53:23.093339 ring efuse init
674 08:53:23.095364 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 08:53:23.101770 [0.017319 Inits done]
676 08:53:23.102261 secure task start!
677 08:53:23.102716 high task start!
678 08:53:23.103165 low task start!
679 08:53:23.106034 run into bl31
680 08:53:23.114695 NOTICE: BL31: v1.3(release):4fc40b1
681 08:53:23.122466 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 08:53:23.122978 NOTICE: BL31: G12A normal boot!
683 08:53:23.138087 NOTICE: BL31: BL33 decompress pass
684 08:53:23.143698 ERROR: Error initializing runtime service opteed_fast
685 08:53:23.939440
686 08:53:23.940229
687 08:53:23.944546 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 08:53:23.944809
689 08:53:23.948151 Model: Libre Computer AML-S905D3-CC Solitude
690 08:53:24.095126 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 08:53:24.110673 DRAM: 2 GiB (effective 3.8 GiB)
692 08:53:24.211620 Core: 406 devices, 33 uclasses, devicetree: separate
693 08:53:24.217416 WDT: Not starting watchdog@f0d0
694 08:53:24.242428 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 08:53:24.254717 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 08:53:24.259643 ** Bad device specification mmc 0 **
697 08:53:24.269702 Card did not respond to voltage select! : -110
698 08:53:24.277385 ** Bad device specification mmc 0 **
699 08:53:24.277856 Couldn't find partition mmc 0
700 08:53:24.285687 Card did not respond to voltage select! : -110
701 08:53:24.291228 ** Bad device specification mmc 0 **
702 08:53:24.291748 Couldn't find partition mmc 0
703 08:53:24.296254 Error: could not access storage.
704 08:53:24.592865 Net: eth0: ethernet@ff3f0000
705 08:53:24.593506 starting USB...
706 08:53:24.838179 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 08:53:24.838834 Starting the controller
708 08:53:24.845170 USB XHCI 1.10
709 08:53:26.400954 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 08:53:26.409160 scanning usb for storage devices... 0 Storage Device(s) found
712 08:53:26.460367 Hit any key to stop autoboot: 1
713 08:53:26.461048 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 08:53:26.461517 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 08:53:26.461791 Setting prompt string to ['=>']
716 08:53:26.462075 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 08:53:26.475186 0
718 08:53:26.475881 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 08:53:26.576808 => setenv autoload no
721 08:53:26.577683 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 08:53:26.583348 setenv autoload no
724 08:53:26.684960 => setenv initrd_high 0xffffffff
725 08:53:26.685769 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 08:53:26.690209 setenv initrd_high 0xffffffff
728 08:53:26.791810 => setenv fdt_high 0xffffffff
729 08:53:26.792667 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 08:53:26.797089 setenv fdt_high 0xffffffff
732 08:53:26.898727 => dhcp
733 08:53:26.899532 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 08:53:26.903732 dhcp
735 08:53:27.859915 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
736 08:53:27.860634 Speed: 1000, full duplex
737 08:53:27.861113 BOOTP broadcast 1
738 08:53:28.108432 BOOTP broadcast 2
739 08:53:28.609324 BOOTP broadcast 3
740 08:53:29.610406 BOOTP broadcast 4
741 08:53:31.611233 BOOTP broadcast 5
742 08:53:31.623256 DHCP client bound to address 192.168.6.12 (3763 ms)
744 08:53:31.724386 => setenv serverip 192.168.6.2
745 08:53:31.725226 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
746 08:53:31.729473 setenv serverip 192.168.6.2
748 08:53:31.830585 => tftpboot 0x01080000 819493/tftp-deploy-n0mm_gqo/kernel/uImage
749 08:53:31.831428 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
750 08:53:31.837816 tftpboot 0x01080000 819493/tftp-deploy-n0mm_gqo/kernel/uImage
751 08:53:31.838147 Speed: 1000, full duplex
752 08:53:31.838369 Using ethernet@ff3f0000 device
753 08:53:31.843341 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
754 08:53:31.848793 Filename '819493/tftp-deploy-n0mm_gqo/kernel/uImage'.
755 08:53:31.852746 Load address: 0x1080000
756 08:53:35.795108 Loading: *################################################## 43.6 MiB
757 08:53:35.795908 11.1 MiB/s
758 08:53:35.796518 done
759 08:53:35.799557 Bytes transferred = 45713984 (2b98a40 hex)
761 08:53:35.901414 => tftpboot 0x08000000 819493/tftp-deploy-n0mm_gqo/ramdisk/ramdisk.cpio.gz.uboot
762 08:53:35.902397 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:32)
763 08:53:35.908957 tftpboot 0x08000000 819493/tftp-deploy-n0mm_gqo/ramdisk/ramdisk.cpio.gz.uboot
764 08:53:35.909578 Speed: 1000, full duplex
765 08:53:35.910114 Using ethernet@ff3f0000 device
766 08:53:35.914500 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
767 08:53:35.924455 Filename '819493/tftp-deploy-n0mm_gqo/ramdisk/ramdisk.cpio.gz.uboot'.
768 08:53:35.925154 Load address: 0x8000000
769 08:53:43.321437 Loading: *############################T ##################### UDP wrong checksum 00000005 00001041
770 08:53:47.198175 UDP wrong checksum 000000ff 0000aff9
771 08:53:47.228841 UDP wrong checksum 000000ff 000045ec
772 08:53:48.321370 T UDP wrong checksum 00000005 00001041
773 08:53:58.323421 T T UDP wrong checksum 00000005 00001041
774 08:54:18.327591 T T T T UDP wrong checksum 00000005 00001041
775 08:54:33.331026 T T
776 08:54:33.331450 Retry count exceeded; starting again
778 08:54:33.332421 end: 2.4.3 bootloader-commands (duration 00:01:07) [common]
781 08:54:33.333472 end: 2.4 uboot-commands (duration 00:01:26) [common]
783 08:54:33.334875 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
785 08:54:33.335474 end: 2 uboot-action (duration 00:01:26) [common]
787 08:54:33.336398 Cleaning after the job
788 08:54:33.336720 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/819493/tftp-deploy-n0mm_gqo/ramdisk
789 08:54:33.337532 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/819493/tftp-deploy-n0mm_gqo/kernel
790 08:54:33.374637 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/819493/tftp-deploy-n0mm_gqo/dtb
791 08:54:33.375543 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/819493/tftp-deploy-n0mm_gqo/modules
792 08:54:33.396758 start: 4.1 power-off (timeout 00:00:30) [common]
793 08:54:33.397415 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
794 08:54:33.430077 >> OK - accepted request
795 08:54:33.432132 Returned 0 in 0 seconds
796 08:54:33.532980 end: 4.1 power-off (duration 00:00:00) [common]
798 08:54:33.534215 start: 4.2 read-feedback (timeout 00:10:00) [common]
799 08:54:33.534879 Listened to connection for namespace 'common' for up to 1s
800 08:54:34.534949 Finalising connection for namespace 'common'
801 08:54:34.535420 Disconnecting from shell: Finalise
802 08:54:34.535708 =>
803 08:54:34.636374 end: 4.2 read-feedback (duration 00:00:01) [common]
804 08:54:34.636857 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/819493
805 08:54:34.913532 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/819493
806 08:54:34.914146 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.