Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:08:31.212043 lava-dispatcher, installed at version: 2024.01
2 09:08:31.212855 start: 0 validate
3 09:08:31.213324 Start time: 2024-10-08 09:08:31.213293+00:00 (UTC)
4 09:08:31.213876 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:08:31.214414 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:08:31.253848 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:08:31.254375 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241008%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 09:08:31.286748 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:08:31.287363 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241008%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 09:08:31.323490 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:08:31.324247 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:08:31.360342 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 09:08:31.360860 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241008%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 09:08:31.400154 validate duration: 0.19
16 09:08:31.401057 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:08:31.401407 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:08:31.401730 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:08:31.402314 Not decompressing ramdisk as can be used compressed.
20 09:08:31.402763 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 09:08:31.403045 saving as /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/ramdisk/initrd.cpio.gz
22 09:08:31.403315 total size: 5628169 (5 MB)
23 09:08:31.445564 progress 0 % (0 MB)
24 09:08:31.452350 progress 5 % (0 MB)
25 09:08:31.460766 progress 10 % (0 MB)
26 09:08:31.465842 progress 15 % (0 MB)
27 09:08:31.471140 progress 20 % (1 MB)
28 09:08:31.475177 progress 25 % (1 MB)
29 09:08:31.479549 progress 30 % (1 MB)
30 09:08:31.483894 progress 35 % (1 MB)
31 09:08:31.487724 progress 40 % (2 MB)
32 09:08:31.492080 progress 45 % (2 MB)
33 09:08:31.495954 progress 50 % (2 MB)
34 09:08:31.500198 progress 55 % (2 MB)
35 09:08:31.504455 progress 60 % (3 MB)
36 09:08:31.508096 progress 65 % (3 MB)
37 09:08:31.512124 progress 70 % (3 MB)
38 09:08:31.515728 progress 75 % (4 MB)
39 09:08:31.519689 progress 80 % (4 MB)
40 09:08:31.523413 progress 85 % (4 MB)
41 09:08:31.527417 progress 90 % (4 MB)
42 09:08:31.531295 progress 95 % (5 MB)
43 09:08:31.534609 progress 100 % (5 MB)
44 09:08:31.535353 5 MB downloaded in 0.13 s (40.66 MB/s)
45 09:08:31.536038 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:08:31.537022 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:08:31.537359 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:08:31.537640 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:08:31.538119 downloading http://storage.kernelci.org/next/master/next-20241008/arm64/defconfig/gcc-12/kernel/Image
51 09:08:31.538379 saving as /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/kernel/Image
52 09:08:31.538593 total size: 45713920 (43 MB)
53 09:08:31.538805 No compression specified
54 09:08:31.585177 progress 0 % (0 MB)
55 09:08:31.629169 progress 5 % (2 MB)
56 09:08:31.664331 progress 10 % (4 MB)
57 09:08:31.695505 progress 15 % (6 MB)
58 09:08:31.726559 progress 20 % (8 MB)
59 09:08:31.754716 progress 25 % (10 MB)
60 09:08:31.783171 progress 30 % (13 MB)
61 09:08:31.813021 progress 35 % (15 MB)
62 09:08:31.842088 progress 40 % (17 MB)
63 09:08:31.871662 progress 45 % (19 MB)
64 09:08:31.900820 progress 50 % (21 MB)
65 09:08:31.930801 progress 55 % (24 MB)
66 09:08:31.961229 progress 60 % (26 MB)
67 09:08:31.989690 progress 65 % (28 MB)
68 09:08:32.019713 progress 70 % (30 MB)
69 09:08:32.048813 progress 75 % (32 MB)
70 09:08:32.079092 progress 80 % (34 MB)
71 09:08:32.109627 progress 85 % (37 MB)
72 09:08:32.139475 progress 90 % (39 MB)
73 09:08:32.168357 progress 95 % (41 MB)
74 09:08:32.197096 progress 100 % (43 MB)
75 09:08:32.197657 43 MB downloaded in 0.66 s (66.15 MB/s)
76 09:08:32.198134 end: 1.2.1 http-download (duration 00:00:01) [common]
78 09:08:32.198963 end: 1.2 download-retry (duration 00:00:01) [common]
79 09:08:32.199249 start: 1.3 download-retry (timeout 00:09:59) [common]
80 09:08:32.199522 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 09:08:32.200021 downloading http://storage.kernelci.org/next/master/next-20241008/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 09:08:32.200287 saving as /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/dtb/meson-g12b-a311d-libretech-cc.dtb
83 09:08:32.200497 total size: 54703 (0 MB)
84 09:08:32.200709 No compression specified
85 09:08:32.241397 progress 59 % (0 MB)
86 09:08:32.242255 progress 100 % (0 MB)
87 09:08:32.242798 0 MB downloaded in 0.04 s (1.23 MB/s)
88 09:08:32.243259 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:08:32.244135 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:08:32.244409 start: 1.4 download-retry (timeout 00:09:59) [common]
92 09:08:32.244751 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 09:08:32.245221 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 09:08:32.245459 saving as /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/nfsrootfs/full.rootfs.tar
95 09:08:32.245664 total size: 120894716 (115 MB)
96 09:08:32.245873 Using unxz to decompress xz
97 09:08:32.283640 progress 0 % (0 MB)
98 09:08:33.081119 progress 5 % (5 MB)
99 09:08:33.929826 progress 10 % (11 MB)
100 09:08:34.730640 progress 15 % (17 MB)
101 09:08:35.480139 progress 20 % (23 MB)
102 09:08:36.073844 progress 25 % (28 MB)
103 09:08:36.909174 progress 30 % (34 MB)
104 09:08:37.716105 progress 35 % (40 MB)
105 09:08:38.070097 progress 40 % (46 MB)
106 09:08:38.446918 progress 45 % (51 MB)
107 09:08:39.175226 progress 50 % (57 MB)
108 09:08:40.313871 progress 55 % (63 MB)
109 09:08:41.335335 progress 60 % (69 MB)
110 09:08:42.316631 progress 65 % (74 MB)
111 09:08:43.100624 progress 70 % (80 MB)
112 09:08:43.925737 progress 75 % (86 MB)
113 09:08:44.716913 progress 80 % (92 MB)
114 09:08:45.482120 progress 85 % (98 MB)
115 09:08:46.338344 progress 90 % (103 MB)
116 09:08:47.122245 progress 95 % (109 MB)
117 09:08:47.960472 progress 100 % (115 MB)
118 09:08:47.972961 115 MB downloaded in 15.73 s (7.33 MB/s)
119 09:08:47.973545 end: 1.4.1 http-download (duration 00:00:16) [common]
121 09:08:47.974357 end: 1.4 download-retry (duration 00:00:16) [common]
122 09:08:47.974620 start: 1.5 download-retry (timeout 00:09:43) [common]
123 09:08:47.974877 start: 1.5.1 http-download (timeout 00:09:43) [common]
124 09:08:47.975346 downloading http://storage.kernelci.org/next/master/next-20241008/arm64/defconfig/gcc-12/modules.tar.xz
125 09:08:47.975588 saving as /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/modules/modules.tar
126 09:08:47.975792 total size: 11607224 (11 MB)
127 09:08:47.976100 Using unxz to decompress xz
128 09:08:48.020398 progress 0 % (0 MB)
129 09:08:48.087919 progress 5 % (0 MB)
130 09:08:48.163046 progress 10 % (1 MB)
131 09:08:48.242616 progress 15 % (1 MB)
132 09:08:48.318422 progress 20 % (2 MB)
133 09:08:48.393869 progress 25 % (2 MB)
134 09:08:48.472263 progress 30 % (3 MB)
135 09:08:48.544255 progress 35 % (3 MB)
136 09:08:48.623290 progress 40 % (4 MB)
137 09:08:48.707687 progress 45 % (5 MB)
138 09:08:48.787833 progress 50 % (5 MB)
139 09:08:48.865604 progress 55 % (6 MB)
140 09:08:48.945450 progress 60 % (6 MB)
141 09:08:49.028881 progress 65 % (7 MB)
142 09:08:49.104729 progress 70 % (7 MB)
143 09:08:49.186572 progress 75 % (8 MB)
144 09:08:49.269571 progress 80 % (8 MB)
145 09:08:49.350050 progress 85 % (9 MB)
146 09:08:49.419445 progress 90 % (9 MB)
147 09:08:49.521901 progress 95 % (10 MB)
148 09:08:49.621432 progress 100 % (11 MB)
149 09:08:49.632634 11 MB downloaded in 1.66 s (6.68 MB/s)
150 09:08:49.633578 end: 1.5.1 http-download (duration 00:00:02) [common]
152 09:08:49.635264 end: 1.5 download-retry (duration 00:00:02) [common]
153 09:08:49.635835 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 09:08:49.636448 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 09:09:06.751048 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/819480/extract-nfsrootfs-suwh5izb
156 09:09:06.751650 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 09:09:06.751945 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 09:09:06.752596 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr
159 09:09:06.753076 makedir: /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin
160 09:09:06.753442 makedir: /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/tests
161 09:09:06.753782 makedir: /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/results
162 09:09:06.754130 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-add-keys
163 09:09:06.754674 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-add-sources
164 09:09:06.755208 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-background-process-start
165 09:09:06.755833 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-background-process-stop
166 09:09:06.756480 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-common-functions
167 09:09:06.757021 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-echo-ipv4
168 09:09:06.757527 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-install-packages
169 09:09:06.758017 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-installed-packages
170 09:09:06.758510 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-os-build
171 09:09:06.758996 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-probe-channel
172 09:09:06.759513 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-probe-ip
173 09:09:06.760047 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-target-ip
174 09:09:06.760554 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-target-mac
175 09:09:06.761052 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-target-storage
176 09:09:06.761552 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-test-case
177 09:09:06.762051 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-test-event
178 09:09:06.762540 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-test-feedback
179 09:09:06.763035 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-test-raise
180 09:09:06.763547 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-test-reference
181 09:09:06.764078 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-test-runner
182 09:09:06.764601 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-test-set
183 09:09:06.765179 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-test-shell
184 09:09:06.765708 Updating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-add-keys (debian)
185 09:09:06.766253 Updating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-add-sources (debian)
186 09:09:06.766772 Updating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-install-packages (debian)
187 09:09:06.767293 Updating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-installed-packages (debian)
188 09:09:06.767806 Updating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/bin/lava-os-build (debian)
189 09:09:06.768287 Creating /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/environment
190 09:09:06.768674 LAVA metadata
191 09:09:06.768944 - LAVA_JOB_ID=819480
192 09:09:06.769166 - LAVA_DISPATCHER_IP=192.168.6.2
193 09:09:06.769531 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 09:09:06.770503 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 09:09:06.770818 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 09:09:06.771027 skipped lava-vland-overlay
197 09:09:06.771273 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 09:09:06.771530 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 09:09:06.771747 skipped lava-multinode-overlay
200 09:09:06.772038 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 09:09:06.772302 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 09:09:06.772552 Loading test definitions
203 09:09:06.772837 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 09:09:06.773062 Using /lava-819480 at stage 0
205 09:09:06.774157 uuid=819480_1.6.2.4.1 testdef=None
206 09:09:06.774467 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 09:09:06.774732 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 09:09:06.776291 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 09:09:06.777083 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 09:09:06.779004 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 09:09:06.779822 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 09:09:06.781656 runner path: /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/0/tests/0_timesync-off test_uuid 819480_1.6.2.4.1
215 09:09:06.782197 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 09:09:06.783013 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 09:09:06.783238 Using /lava-819480 at stage 0
219 09:09:06.783589 Fetching tests from https://github.com/kernelci/test-definitions.git
220 09:09:06.783877 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/0/tests/1_kselftest-dt'
221 09:09:10.144780 Running '/usr/bin/git checkout kernelci.org
222 09:09:10.386756 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 09:09:10.388678 uuid=819480_1.6.2.4.5 testdef=None
224 09:09:10.389374 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 09:09:10.391027 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 09:09:10.397065 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 09:09:10.398827 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 09:09:10.406786 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 09:09:10.408678 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 09:09:10.416426 runner path: /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/0/tests/1_kselftest-dt test_uuid 819480_1.6.2.4.5
234 09:09:10.417015 BOARD='meson-g12b-a311d-libretech-cc'
235 09:09:10.417469 BRANCH='next'
236 09:09:10.417908 SKIPFILE='/dev/null'
237 09:09:10.418345 SKIP_INSTALL='True'
238 09:09:10.418779 TESTPROG_URL='http://storage.kernelci.org/next/master/next-20241008/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 09:09:10.419224 TST_CASENAME=''
240 09:09:10.419662 TST_CMDFILES='dt'
241 09:09:10.420883 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 09:09:10.422640 Creating lava-test-runner.conf files
244 09:09:10.423107 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/819480/lava-overlay-pcnbrngr/lava-819480/0 for stage 0
245 09:09:10.423846 - 0_timesync-off
246 09:09:10.424445 - 1_kselftest-dt
247 09:09:10.425166 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 09:09:10.425777 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 09:09:33.870010 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 09:09:33.870456 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 09:09:33.870750 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 09:09:33.871058 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 09:09:33.871351 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 09:09:34.513249 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 09:09:34.513901 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 09:09:34.514293 extracting modules file /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/819480/extract-nfsrootfs-suwh5izb
257 09:09:35.948891 extracting modules file /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/819480/extract-overlay-ramdisk-vqitu_xk/ramdisk
258 09:09:37.362705 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 09:09:37.363165 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 09:09:37.363459 [common] Applying overlay to NFS
261 09:09:37.363687 [common] Applying overlay /var/lib/lava/dispatcher/tmp/819480/compress-overlay-_v3dgs15/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/819480/extract-nfsrootfs-suwh5izb
262 09:09:40.156888 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 09:09:40.157366 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 09:09:40.157665 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 09:09:40.157928 Converting downloaded kernel to a uImage
266 09:09:40.158257 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/kernel/Image /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/kernel/uImage
267 09:09:40.736887 output: Image Name:
268 09:09:40.737315 output: Created: Tue Oct 8 09:09:40 2024
269 09:09:40.737546 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 09:09:40.737776 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 09:09:40.738002 output: Load Address: 01080000
272 09:09:40.738225 output: Entry Point: 01080000
273 09:09:40.738444 output:
274 09:09:40.738800 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
275 09:09:40.739102 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
276 09:09:40.739402 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 09:09:40.739687 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 09:09:40.740009 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 09:09:40.740307 Building ramdisk /var/lib/lava/dispatcher/tmp/819480/extract-overlay-ramdisk-vqitu_xk/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/819480/extract-overlay-ramdisk-vqitu_xk/ramdisk
280 09:09:43.117153 >> 166961 blocks
281 09:09:53.703510 Adding RAMdisk u-boot header.
282 09:09:53.704233 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/819480/extract-overlay-ramdisk-vqitu_xk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/819480/extract-overlay-ramdisk-vqitu_xk/ramdisk.cpio.gz.uboot
283 09:09:53.953706 output: Image Name:
284 09:09:53.954101 output: Created: Tue Oct 8 09:09:53 2024
285 09:09:53.954315 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 09:09:53.954524 output: Data Size: 23450861 Bytes = 22901.23 KiB = 22.36 MiB
287 09:09:53.954728 output: Load Address: 00000000
288 09:09:53.954931 output: Entry Point: 00000000
289 09:09:53.955136 output:
290 09:09:53.955767 rename /var/lib/lava/dispatcher/tmp/819480/extract-overlay-ramdisk-vqitu_xk/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/ramdisk/ramdisk.cpio.gz.uboot
291 09:09:53.956362 end: 1.6.8 compress-ramdisk (duration 00:00:13) [common]
292 09:09:53.956980 end: 1.6 prepare-tftp-overlay (duration 00:01:04) [common]
293 09:09:53.957601 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:37) [common]
294 09:09:53.958103 No LXC device requested
295 09:09:53.958654 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 09:09:53.959216 start: 1.8 deploy-device-env (timeout 00:08:37) [common]
297 09:09:53.959766 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 09:09:53.960261 Checking files for TFTP limit of 4294967296 bytes.
299 09:09:53.963189 end: 1 tftp-deploy (duration 00:01:23) [common]
300 09:09:53.963823 start: 2 uboot-action (timeout 00:05:00) [common]
301 09:09:53.964443 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 09:09:53.964996 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 09:09:53.965552 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 09:09:53.966129 Using kernel file from prepare-kernel: 819480/tftp-deploy-c1y47sd_/kernel/uImage
305 09:09:53.966824 substitutions:
306 09:09:53.967276 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 09:09:53.967726 - {DTB_ADDR}: 0x01070000
308 09:09:53.968201 - {DTB}: 819480/tftp-deploy-c1y47sd_/dtb/meson-g12b-a311d-libretech-cc.dtb
309 09:09:53.968655 - {INITRD}: 819480/tftp-deploy-c1y47sd_/ramdisk/ramdisk.cpio.gz.uboot
310 09:09:53.969100 - {KERNEL_ADDR}: 0x01080000
311 09:09:53.969539 - {KERNEL}: 819480/tftp-deploy-c1y47sd_/kernel/uImage
312 09:09:53.969976 - {LAVA_MAC}: None
313 09:09:53.970456 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/819480/extract-nfsrootfs-suwh5izb
314 09:09:53.970897 - {NFS_SERVER_IP}: 192.168.6.2
315 09:09:53.971329 - {PRESEED_CONFIG}: None
316 09:09:53.971761 - {PRESEED_LOCAL}: None
317 09:09:53.972235 - {RAMDISK_ADDR}: 0x08000000
318 09:09:53.972675 - {RAMDISK}: 819480/tftp-deploy-c1y47sd_/ramdisk/ramdisk.cpio.gz.uboot
319 09:09:53.973115 - {ROOT_PART}: None
320 09:09:53.973554 - {ROOT}: None
321 09:09:53.973987 - {SERVER_IP}: 192.168.6.2
322 09:09:53.974416 - {TEE_ADDR}: 0x83000000
323 09:09:53.974843 - {TEE}: None
324 09:09:53.975276 Parsed boot commands:
325 09:09:53.975695 - setenv autoload no
326 09:09:53.976153 - setenv initrd_high 0xffffffff
327 09:09:53.976587 - setenv fdt_high 0xffffffff
328 09:09:53.977014 - dhcp
329 09:09:53.977442 - setenv serverip 192.168.6.2
330 09:09:53.977874 - tftpboot 0x01080000 819480/tftp-deploy-c1y47sd_/kernel/uImage
331 09:09:53.978308 - tftpboot 0x08000000 819480/tftp-deploy-c1y47sd_/ramdisk/ramdisk.cpio.gz.uboot
332 09:09:53.978738 - tftpboot 0x01070000 819480/tftp-deploy-c1y47sd_/dtb/meson-g12b-a311d-libretech-cc.dtb
333 09:09:53.979174 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/819480/extract-nfsrootfs-suwh5izb,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 09:09:53.979617 - bootm 0x01080000 0x08000000 0x01070000
335 09:09:53.980200 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 09:09:53.981864 start: 2.3 connect-device (timeout 00:05:00) [common]
338 09:09:53.982330 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 09:09:53.997911 Setting prompt string to ['lava-test: # ']
340 09:09:53.999544 end: 2.3 connect-device (duration 00:00:00) [common]
341 09:09:54.000249 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 09:09:54.000891 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 09:09:54.001528 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 09:09:54.002759 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 09:09:54.040343 >> OK - accepted request
346 09:09:54.042442 Returned 0 in 0 seconds
347 09:09:54.143635 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 09:09:54.145491 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 09:09:54.146090 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 09:09:54.146652 Setting prompt string to ['Hit any key to stop autoboot']
352 09:09:54.147154 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 09:09:54.148894 Trying 192.168.56.21...
354 09:09:54.149424 Connected to conserv1.
355 09:09:54.149875 Escape character is '^]'.
356 09:09:54.150338
357 09:09:54.150791 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 09:09:54.151244
359 09:10:05.698454 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 09:10:05.699133 bl2_stage_init 0x01
361 09:10:05.699605 bl2_stage_init 0x81
362 09:10:05.703935 hw id: 0x0000 - pwm id 0x01
363 09:10:05.704566 bl2_stage_init 0xc1
364 09:10:05.705038 bl2_stage_init 0x02
365 09:10:05.705490
366 09:10:05.709306 L0:00000000
367 09:10:05.709804 L1:20000703
368 09:10:05.710264 L2:00008067
369 09:10:05.710708 L3:14000000
370 09:10:05.712192 B2:00402000
371 09:10:05.712692 B1:e0f83180
372 09:10:05.713143
373 09:10:05.713578 TE: 58159
374 09:10:05.714015
375 09:10:05.723552 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 09:10:05.724063
377 09:10:05.724503 Board ID = 1
378 09:10:05.724931 Set A53 clk to 24M
379 09:10:05.725355 Set A73 clk to 24M
380 09:10:05.729538 Set clk81 to 24M
381 09:10:05.730008 A53 clk: 1200 MHz
382 09:10:05.730438 A73 clk: 1200 MHz
383 09:10:05.733206 CLK81: 166.6M
384 09:10:05.733669 smccc: 00012ab5
385 09:10:05.739104 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 09:10:05.743937 board id: 1
387 09:10:05.749677 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 09:10:05.760720 fw parse done
389 09:10:05.765936 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 09:10:05.808456 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 09:10:05.819088 PIEI prepare done
392 09:10:05.819555 fastboot data load
393 09:10:05.820026 fastboot data verify
394 09:10:05.825000 verify result: 266
395 09:10:05.830405 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 09:10:05.830887 LPDDR4 probe
397 09:10:05.831328 ddr clk to 1584MHz
398 09:10:05.837340 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 09:10:05.875854
400 09:10:05.876362 dmc_version 0001
401 09:10:05.882182 Check phy result
402 09:10:05.888036 INFO : End of CA training
403 09:10:05.888504 INFO : End of initialization
404 09:10:05.894536 INFO : Training has run successfully!
405 09:10:05.894997 Check phy result
406 09:10:05.900313 INFO : End of initialization
407 09:10:05.900774 INFO : End of read enable training
408 09:10:05.903783 INFO : End of fine write leveling
409 09:10:05.909291 INFO : End of Write leveling coarse delay
410 09:10:05.914987 INFO : Training has run successfully!
411 09:10:05.915452 Check phy result
412 09:10:05.915887 INFO : End of initialization
413 09:10:05.920405 INFO : End of read dq deskew training
414 09:10:05.926150 INFO : End of MPR read delay center optimization
415 09:10:05.926635 INFO : End of write delay center optimization
416 09:10:05.931437 INFO : End of read delay center optimization
417 09:10:05.936902 INFO : End of max read latency training
418 09:10:05.937369 INFO : Training has run successfully!
419 09:10:05.943047 1D training succeed
420 09:10:05.949262 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 09:10:05.994438 Check phy result
422 09:10:05.994946 INFO : End of initialization
423 09:10:06.016793 INFO : End of 2D read delay Voltage center optimization
424 09:10:06.037071 INFO : End of 2D read delay Voltage center optimization
425 09:10:06.089148 INFO : End of 2D write delay Voltage center optimization
426 09:10:06.138402 INFO : End of 2D write delay Voltage center optimization
427 09:10:06.144076 INFO : Training has run successfully!
428 09:10:06.144568
429 09:10:06.145012 channel==0
430 09:10:06.150100 RxClkDly_Margin_A0==88 ps 9
431 09:10:06.150598 TxDqDly_Margin_A0==98 ps 10
432 09:10:06.154739 RxClkDly_Margin_A1==88 ps 9
433 09:10:06.155203 TxDqDly_Margin_A1==98 ps 10
434 09:10:06.155641 TrainedVREFDQ_A0==74
435 09:10:06.160558 TrainedVREFDQ_A1==74
436 09:10:06.161041 VrefDac_Margin_A0==25
437 09:10:06.161476 DeviceVref_Margin_A0==40
438 09:10:06.166445 VrefDac_Margin_A1==25
439 09:10:06.166907 DeviceVref_Margin_A1==40
440 09:10:06.167342
441 09:10:06.167777
442 09:10:06.172347 channel==1
443 09:10:06.172819 RxClkDly_Margin_A0==98 ps 10
444 09:10:06.173254 TxDqDly_Margin_A0==88 ps 9
445 09:10:06.178537 RxClkDly_Margin_A1==88 ps 9
446 09:10:06.179005 TxDqDly_Margin_A1==88 ps 9
447 09:10:06.184842 TrainedVREFDQ_A0==77
448 09:10:06.185311 TrainedVREFDQ_A1==77
449 09:10:06.185746 VrefDac_Margin_A0==22
450 09:10:06.189890 DeviceVref_Margin_A0==37
451 09:10:06.190357 VrefDac_Margin_A1==24
452 09:10:06.194759 DeviceVref_Margin_A1==37
453 09:10:06.195219
454 09:10:06.195658 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 09:10:06.196118
456 09:10:06.228273 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
457 09:10:06.228837 2D training succeed
458 09:10:06.233889 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 09:10:06.239408 auto size-- 65535DDR cs0 size: 2048MB
460 09:10:06.239872 DDR cs1 size: 2048MB
461 09:10:06.244310 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 09:10:06.244772 cs0 DataBus test pass
463 09:10:06.250614 cs1 DataBus test pass
464 09:10:06.250871 cs0 AddrBus test pass
465 09:10:06.251080 cs1 AddrBus test pass
466 09:10:06.251312
467 09:10:06.255671 100bdlr_step_size ps== 420
468 09:10:06.255912 result report
469 09:10:06.261245 boot times 0Enable ddr reg access
470 09:10:06.266481 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 09:10:06.279768 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 09:10:06.851853 0.0;M3 CHK:0;cm4_sp_mode 0
473 09:10:06.852528 MVN_1=0x00000000
474 09:10:06.857383 MVN_2=0x00000000
475 09:10:06.863100 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 09:10:06.863590 OPS=0x10
477 09:10:06.864080 ring efuse init
478 09:10:06.864540 chipver efuse init
479 09:10:06.868720 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 09:10:06.874802 [0.018960 Inits done]
481 09:10:06.875284 secure task start!
482 09:10:06.875741 high task start!
483 09:10:06.878868 low task start!
484 09:10:06.879348 run into bl31
485 09:10:06.885577 NOTICE: BL31: v1.3(release):4fc40b1
486 09:10:06.893403 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 09:10:06.893897 NOTICE: BL31: G12A normal boot!
488 09:10:06.919318 NOTICE: BL31: BL33 decompress pass
489 09:10:06.925007 ERROR: Error initializing runtime service opteed_fast
490 09:10:08.158123
491 09:10:08.158780
492 09:10:08.165439 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 09:10:08.165939
494 09:10:08.166399 Model: Libre Computer AML-A311D-CC Alta
495 09:10:08.375868 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 09:10:08.398495 DRAM: 2 GiB (effective 3.8 GiB)
497 09:10:08.541252 Core: 408 devices, 31 uclasses, devicetree: separate
498 09:10:08.547014 WDT: Not starting watchdog@f0d0
499 09:10:08.579273 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 09:10:08.591850 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 09:10:08.596721 ** Bad device specification mmc 0 **
502 09:10:08.607124 Card did not respond to voltage select! : -110
503 09:10:08.614693 ** Bad device specification mmc 0 **
504 09:10:08.615203 Couldn't find partition mmc 0
505 09:10:08.623099 Card did not respond to voltage select! : -110
506 09:10:08.628593 ** Bad device specification mmc 0 **
507 09:10:08.629090 Couldn't find partition mmc 0
508 09:10:08.633682 Error: could not access storage.
509 09:10:09.899438 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 09:10:09.900141 bl2_stage_init 0x01
511 09:10:09.900586 bl2_stage_init 0x81
512 09:10:09.904869 hw id: 0x0000 - pwm id 0x01
513 09:10:09.905354 bl2_stage_init 0xc1
514 09:10:09.905775 bl2_stage_init 0x02
515 09:10:09.906184
516 09:10:09.910568 L0:00000000
517 09:10:09.911039 L1:20000703
518 09:10:09.911452 L2:00008067
519 09:10:09.911861 L3:14000000
520 09:10:09.916143 B2:00402000
521 09:10:09.916598 B1:e0f83180
522 09:10:09.917010
523 09:10:09.917422 TE: 58124
524 09:10:09.917833
525 09:10:09.920927 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 09:10:09.921391
527 09:10:09.921806 Board ID = 1
528 09:10:09.926392 Set A53 clk to 24M
529 09:10:09.926846 Set A73 clk to 24M
530 09:10:09.927263 Set clk81 to 24M
531 09:10:09.932082 A53 clk: 1200 MHz
532 09:10:09.932537 A73 clk: 1200 MHz
533 09:10:09.932949 CLK81: 166.6M
534 09:10:09.933357 smccc: 00012a92
535 09:10:09.937851 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 09:10:09.944020 board id: 1
537 09:10:09.950481 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 09:10:09.961554 fw parse done
539 09:10:09.967541 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 09:10:10.009902 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 09:10:10.019188 PIEI prepare done
542 09:10:10.019678 fastboot data load
543 09:10:10.020147 fastboot data verify
544 09:10:10.024867 verify result: 266
545 09:10:10.030424 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 09:10:10.030895 LPDDR4 probe
547 09:10:10.031312 ddr clk to 1584MHz
548 09:10:10.038394 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 09:10:10.075919
550 09:10:10.076465 dmc_version 0001
551 09:10:10.081985 Check phy result
552 09:10:10.088250 INFO : End of CA training
553 09:10:10.088712 INFO : End of initialization
554 09:10:10.093821 INFO : Training has run successfully!
555 09:10:10.094284 Check phy result
556 09:10:10.099466 INFO : End of initialization
557 09:10:10.099926 INFO : End of read enable training
558 09:10:10.105065 INFO : End of fine write leveling
559 09:10:10.111263 INFO : End of Write leveling coarse delay
560 09:10:10.111725 INFO : Training has run successfully!
561 09:10:10.112167 Check phy result
562 09:10:10.116850 INFO : End of initialization
563 09:10:10.117307 INFO : End of read dq deskew training
564 09:10:10.122448 INFO : End of MPR read delay center optimization
565 09:10:10.128119 INFO : End of write delay center optimization
566 09:10:10.134238 INFO : End of read delay center optimization
567 09:10:10.134697 INFO : End of max read latency training
568 09:10:10.139829 INFO : Training has run successfully!
569 09:10:10.140324 1D training succeed
570 09:10:10.149474 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 09:10:10.196240 Check phy result
572 09:10:10.196791 INFO : End of initialization
573 09:10:10.218016 INFO : End of 2D read delay Voltage center optimization
574 09:10:10.238557 INFO : End of 2D read delay Voltage center optimization
575 09:10:10.289496 INFO : End of 2D write delay Voltage center optimization
576 09:10:10.340440 INFO : End of 2D write delay Voltage center optimization
577 09:10:10.346074 INFO : Training has run successfully!
578 09:10:10.346549
579 09:10:10.347025 channel==0
580 09:10:10.351875 RxClkDly_Margin_A0==88 ps 9
581 09:10:10.352516 TxDqDly_Margin_A0==98 ps 10
582 09:10:10.356109 RxClkDly_Margin_A1==88 ps 9
583 09:10:10.356639 TxDqDly_Margin_A1==98 ps 10
584 09:10:10.357068 TrainedVREFDQ_A0==74
585 09:10:10.362268 TrainedVREFDQ_A1==74
586 09:10:10.362746 VrefDac_Margin_A0==25
587 09:10:10.363163 DeviceVref_Margin_A0==40
588 09:10:10.368452 VrefDac_Margin_A1==25
589 09:10:10.368919 DeviceVref_Margin_A1==40
590 09:10:10.369335
591 09:10:10.369748
592 09:10:10.373262 channel==1
593 09:10:10.373716 RxClkDly_Margin_A0==98 ps 10
594 09:10:10.374153 TxDqDly_Margin_A0==98 ps 10
595 09:10:10.379587 RxClkDly_Margin_A1==98 ps 10
596 09:10:10.380103 TxDqDly_Margin_A1==88 ps 9
597 09:10:10.383752 TrainedVREFDQ_A0==77
598 09:10:10.384251 TrainedVREFDQ_A1==77
599 09:10:10.384673 VrefDac_Margin_A0==22
600 09:10:10.390023 DeviceVref_Margin_A0==37
601 09:10:10.390499 VrefDac_Margin_A1==22
602 09:10:10.395538 DeviceVref_Margin_A1==37
603 09:10:10.396164
604 09:10:10.396592 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 09:10:10.400466
606 09:10:10.429018 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
607 09:10:10.429659 2D training succeed
608 09:10:10.435237 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 09:10:10.439553 auto size-- 65535DDR cs0 size: 2048MB
610 09:10:10.440060 DDR cs1 size: 2048MB
611 09:10:10.445160 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 09:10:10.445628 cs0 DataBus test pass
613 09:10:10.450904 cs1 DataBus test pass
614 09:10:10.451395 cs0 AddrBus test pass
615 09:10:10.451818 cs1 AddrBus test pass
616 09:10:10.452276
617 09:10:10.456572 100bdlr_step_size ps== 420
618 09:10:10.457035 result report
619 09:10:10.462058 boot times 0Enable ddr reg access
620 09:10:10.467406 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 09:10:10.480881 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 09:10:11.054660 0.0;M3 CHK:0;cm4_sp_mode 0
623 09:10:11.055103 MVN_1=0x00000000
624 09:10:11.060265 MVN_2=0x00000000
625 09:10:11.066086 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 09:10:11.066663 OPS=0x10
627 09:10:11.067130 ring efuse init
628 09:10:11.067574 chipver efuse init
629 09:10:11.071821 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 09:10:11.077201 [0.018961 Inits done]
631 09:10:11.077758 secure task start!
632 09:10:11.078202 high task start!
633 09:10:11.081806 low task start!
634 09:10:11.082352 run into bl31
635 09:10:11.088451 NOTICE: BL31: v1.3(release):4fc40b1
636 09:10:11.096467 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 09:10:11.097017 NOTICE: BL31: G12A normal boot!
638 09:10:11.122284 NOTICE: BL31: BL33 decompress pass
639 09:10:11.128099 ERROR: Error initializing runtime service opteed_fast
640 09:10:12.360292
641 09:10:12.361007
642 09:10:12.368812 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 09:10:12.369377
644 09:10:12.369849 Model: Libre Computer AML-A311D-CC Alta
645 09:10:12.577034 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 09:10:12.600389 DRAM: 2 GiB (effective 3.8 GiB)
647 09:10:12.743245 Core: 408 devices, 31 uclasses, devicetree: separate
648 09:10:12.749323 WDT: Not starting watchdog@f0d0
649 09:10:12.781409 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 09:10:12.793825 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 09:10:12.798849 ** Bad device specification mmc 0 **
652 09:10:12.809220 Card did not respond to voltage select! : -110
653 09:10:12.816811 ** Bad device specification mmc 0 **
654 09:10:12.817379 Couldn't find partition mmc 0
655 09:10:12.825172 Card did not respond to voltage select! : -110
656 09:10:12.830706 ** Bad device specification mmc 0 **
657 09:10:12.831298 Couldn't find partition mmc 0
658 09:10:12.835707 Error: could not access storage.
659 09:10:13.178280 Net: eth0: ethernet@ff3f0000
660 09:10:13.178952 starting USB...
661 09:10:13.430074 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 09:10:13.430616 Starting the controller
663 09:10:13.437035 USB XHCI 1.10
664 09:10:15.148961 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 09:10:15.149672 bl2_stage_init 0x01
666 09:10:15.150208 bl2_stage_init 0x81
667 09:10:15.155104 hw id: 0x0000 - pwm id 0x01
668 09:10:15.155716 bl2_stage_init 0xc1
669 09:10:15.156311 bl2_stage_init 0x02
670 09:10:15.156827
671 09:10:15.160125 L0:00000000
672 09:10:15.160697 L1:20000703
673 09:10:15.161193 L2:00008067
674 09:10:15.161678 L3:14000000
675 09:10:15.165544 B2:00402000
676 09:10:15.165901 B1:e0f83180
677 09:10:15.166126
678 09:10:15.166376 TE: 58124
679 09:10:15.166590
680 09:10:15.171181 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 09:10:15.171545
682 09:10:15.171760 Board ID = 1
683 09:10:15.176751 Set A53 clk to 24M
684 09:10:15.177106 Set A73 clk to 24M
685 09:10:15.177332 Set clk81 to 24M
686 09:10:15.182395 A53 clk: 1200 MHz
687 09:10:15.182747 A73 clk: 1200 MHz
688 09:10:15.182963 CLK81: 166.6M
689 09:10:15.183170 smccc: 00012a92
690 09:10:15.187927 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 09:10:15.193531 board id: 1
692 09:10:15.199498 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 09:10:15.210182 fw parse done
694 09:10:15.216160 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 09:10:15.258776 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 09:10:15.269634 PIEI prepare done
697 09:10:15.270025 fastboot data load
698 09:10:15.270296 fastboot data verify
699 09:10:15.275169 verify result: 266
700 09:10:15.280938 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 09:10:15.281312 LPDDR4 probe
702 09:10:15.281567 ddr clk to 1584MHz
703 09:10:15.288779 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 09:10:15.326081
705 09:10:15.326503 dmc_version 0001
706 09:10:15.333573 Check phy result
707 09:10:15.338634 INFO : End of CA training
708 09:10:15.339034 INFO : End of initialization
709 09:10:15.344280 INFO : Training has run successfully!
710 09:10:15.344678 Check phy result
711 09:10:15.350004 INFO : End of initialization
712 09:10:15.350367 INFO : End of read enable training
713 09:10:15.353074 INFO : End of fine write leveling
714 09:10:15.358650 INFO : End of Write leveling coarse delay
715 09:10:15.364308 INFO : Training has run successfully!
716 09:10:15.364705 Check phy result
717 09:10:15.364957 INFO : End of initialization
718 09:10:15.370119 INFO : End of read dq deskew training
719 09:10:15.375400 INFO : End of MPR read delay center optimization
720 09:10:15.375782 INFO : End of write delay center optimization
721 09:10:15.381003 INFO : End of read delay center optimization
722 09:10:15.386837 INFO : End of max read latency training
723 09:10:15.387218 INFO : Training has run successfully!
724 09:10:15.392238 1D training succeed
725 09:10:15.398177 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 09:10:15.445833 Check phy result
727 09:10:15.446255 INFO : End of initialization
728 09:10:15.467710 INFO : End of 2D read delay Voltage center optimization
729 09:10:15.487857 INFO : End of 2D read delay Voltage center optimization
730 09:10:15.541015 INFO : End of 2D write delay Voltage center optimization
731 09:10:15.589420 INFO : End of 2D write delay Voltage center optimization
732 09:10:15.594919 INFO : Training has run successfully!
733 09:10:15.595497
734 09:10:15.595975 channel==0
735 09:10:15.600591 RxClkDly_Margin_A0==88 ps 9
736 09:10:15.601165 TxDqDly_Margin_A0==98 ps 10
737 09:10:15.606362 RxClkDly_Margin_A1==88 ps 9
738 09:10:15.606892 TxDqDly_Margin_A1==98 ps 10
739 09:10:15.607357 TrainedVREFDQ_A0==74
740 09:10:15.611729 TrainedVREFDQ_A1==74
741 09:10:15.612302 VrefDac_Margin_A0==25
742 09:10:15.612738 DeviceVref_Margin_A0==40
743 09:10:15.617264 VrefDac_Margin_A1==25
744 09:10:15.617609 DeviceVref_Margin_A1==40
745 09:10:15.617827
746 09:10:15.618060
747 09:10:15.622800 channel==1
748 09:10:15.623112 RxClkDly_Margin_A0==98 ps 10
749 09:10:15.623324 TxDqDly_Margin_A0==98 ps 10
750 09:10:15.628435 RxClkDly_Margin_A1==88 ps 9
751 09:10:15.628819 TxDqDly_Margin_A1==88 ps 9
752 09:10:15.634072 TrainedVREFDQ_A0==77
753 09:10:15.634431 TrainedVREFDQ_A1==77
754 09:10:15.634687 VrefDac_Margin_A0==22
755 09:10:15.639537 DeviceVref_Margin_A0==37
756 09:10:15.639905 VrefDac_Margin_A1==24
757 09:10:15.645194 DeviceVref_Margin_A1==37
758 09:10:15.645573
759 09:10:15.645831 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 09:10:15.646074
761 09:10:15.678808 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
762 09:10:15.679224 2D training succeed
763 09:10:15.684380 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 09:10:15.690381 auto size-- 65535DDR cs0 size: 2048MB
765 09:10:15.690774 DDR cs1 size: 2048MB
766 09:10:15.695633 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 09:10:15.696047 cs0 DataBus test pass
768 09:10:15.705933 cs1 DataBus test pass
769 09:10:15.706323 cs0 AddrBus test pass
770 09:10:15.706684 cs1 AddrBus test pass
771 09:10:15.707157
772 09:10:15.708027 100bdlr_step_size ps== 420
773 09:10:15.708543 result report
774 09:10:15.712347 boot times 0Enable ddr reg access
775 09:10:15.717690 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 09:10:15.731108 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 09:10:16.304717 0.0;M3 CHK:0;cm4_sp_mode 0
778 09:10:16.305144 MVN_1=0x00000000
779 09:10:16.310163 MVN_2=0x00000000
780 09:10:16.316005 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 09:10:16.316396 OPS=0x10
782 09:10:16.316659 ring efuse init
783 09:10:16.316912 chipver efuse init
784 09:10:16.321546 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 09:10:16.327171 [0.018961 Inits done]
786 09:10:16.327621 secure task start!
787 09:10:16.327915 high task start!
788 09:10:16.330770 low task start!
789 09:10:16.331179 run into bl31
790 09:10:16.338410 NOTICE: BL31: v1.3(release):4fc40b1
791 09:10:16.346221 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 09:10:16.346595 NOTICE: BL31: G12A normal boot!
793 09:10:16.371649 NOTICE: BL31: BL33 decompress pass
794 09:10:16.377347 ERROR: Error initializing runtime service opteed_fast
795 09:10:17.610322
796 09:10:17.610944
797 09:10:17.618607 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 09:10:17.618983
799 09:10:17.619263 Model: Libre Computer AML-A311D-CC Alta
800 09:10:17.827064 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 09:10:17.850664 DRAM: 2 GiB (effective 3.8 GiB)
802 09:10:17.993565 Core: 408 devices, 31 uclasses, devicetree: separate
803 09:10:17.999662 WDT: Not starting watchdog@f0d0
804 09:10:18.031828 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 09:10:18.043949 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 09:10:18.048890 ** Bad device specification mmc 0 **
807 09:10:18.059233 Card did not respond to voltage select! : -110
808 09:10:18.066909 ** Bad device specification mmc 0 **
809 09:10:18.067486 Couldn't find partition mmc 0
810 09:10:18.075260 Card did not respond to voltage select! : -110
811 09:10:18.080763 ** Bad device specification mmc 0 **
812 09:10:18.081319 Couldn't find partition mmc 0
813 09:10:18.085738 Error: could not access storage.
814 09:10:18.427732 Net: eth0: ethernet@ff3f0000
815 09:10:18.428707 starting USB...
816 09:10:18.680178 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 09:10:18.680832 Starting the controller
818 09:10:18.686193 USB XHCI 1.10
819 09:10:20.850385 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 09:10:20.850833 bl2_stage_init 0x01
821 09:10:20.851085 bl2_stage_init 0x81
822 09:10:20.855827 hw id: 0x0000 - pwm id 0x01
823 09:10:20.856208 bl2_stage_init 0xc1
824 09:10:20.856613 bl2_stage_init 0x02
825 09:10:20.856850
826 09:10:20.861414 L0:00000000
827 09:10:20.861776 L1:20000703
828 09:10:20.862014 L2:00008067
829 09:10:20.862264 L3:14000000
830 09:10:20.864316 B2:00402000
831 09:10:20.864635 B1:e0f83180
832 09:10:20.864889
833 09:10:20.865124 TE: 58124
834 09:10:20.865355
835 09:10:20.875445 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 09:10:20.875805
837 09:10:20.876072 Board ID = 1
838 09:10:20.876314 Set A53 clk to 24M
839 09:10:20.876556 Set A73 clk to 24M
840 09:10:20.880980 Set clk81 to 24M
841 09:10:20.881307 A53 clk: 1200 MHz
842 09:10:20.881546 A73 clk: 1200 MHz
843 09:10:20.886698 CLK81: 166.6M
844 09:10:20.887027 smccc: 00012a92
845 09:10:20.892292 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 09:10:20.892763 board id: 1
847 09:10:20.900902 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 09:10:20.911512 fw parse done
849 09:10:20.917532 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 09:10:20.960233 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 09:10:20.971016 PIEI prepare done
852 09:10:20.971591 fastboot data load
853 09:10:20.972079 fastboot data verify
854 09:10:20.976632 verify result: 266
855 09:10:20.982191 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 09:10:20.982764 LPDDR4 probe
857 09:10:20.983196 ddr clk to 1584MHz
858 09:10:20.990153 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 09:10:21.026561
860 09:10:21.027213 dmc_version 0001
861 09:10:21.034123 Check phy result
862 09:10:21.039948 INFO : End of CA training
863 09:10:21.040517 INFO : End of initialization
864 09:10:21.045528 INFO : Training has run successfully!
865 09:10:21.046087 Check phy result
866 09:10:21.051132 INFO : End of initialization
867 09:10:21.051663 INFO : End of read enable training
868 09:10:21.056761 INFO : End of fine write leveling
869 09:10:21.062457 INFO : End of Write leveling coarse delay
870 09:10:21.063026 INFO : Training has run successfully!
871 09:10:21.063508 Check phy result
872 09:10:21.068108 INFO : End of initialization
873 09:10:21.068494 INFO : End of read dq deskew training
874 09:10:21.073819 INFO : End of MPR read delay center optimization
875 09:10:21.079179 INFO : End of write delay center optimization
876 09:10:21.085273 INFO : End of read delay center optimization
877 09:10:21.085801 INFO : End of max read latency training
878 09:10:21.090345 INFO : Training has run successfully!
879 09:10:21.090778 1D training succeed
880 09:10:21.099574 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 09:10:21.147149 Check phy result
882 09:10:21.147745 INFO : End of initialization
883 09:10:21.168938 INFO : End of 2D read delay Voltage center optimization
884 09:10:21.189160 INFO : End of 2D read delay Voltage center optimization
885 09:10:21.241262 INFO : End of 2D write delay Voltage center optimization
886 09:10:21.290631 INFO : End of 2D write delay Voltage center optimization
887 09:10:21.296612 INFO : Training has run successfully!
888 09:10:21.297101
889 09:10:21.297359 channel==0
890 09:10:21.302022 RxClkDly_Margin_A0==88 ps 9
891 09:10:21.302644 TxDqDly_Margin_A0==98 ps 10
892 09:10:21.305220 RxClkDly_Margin_A1==88 ps 9
893 09:10:21.305828 TxDqDly_Margin_A1==98 ps 10
894 09:10:21.310935 TrainedVREFDQ_A0==74
895 09:10:21.311531 TrainedVREFDQ_A1==75
896 09:10:21.312068 VrefDac_Margin_A0==25
897 09:10:21.316379 DeviceVref_Margin_A0==40
898 09:10:21.316971 VrefDac_Margin_A1==25
899 09:10:21.321993 DeviceVref_Margin_A1==39
900 09:10:21.322508
901 09:10:21.322953
902 09:10:21.323392 channel==1
903 09:10:21.323824 RxClkDly_Margin_A0==98 ps 10
904 09:10:21.327566 TxDqDly_Margin_A0==98 ps 10
905 09:10:21.328106 RxClkDly_Margin_A1==98 ps 10
906 09:10:21.333150 TxDqDly_Margin_A1==88 ps 9
907 09:10:21.333695 TrainedVREFDQ_A0==77
908 09:10:21.334149 TrainedVREFDQ_A1==77
909 09:10:21.338943 VrefDac_Margin_A0==22
910 09:10:21.339454 DeviceVref_Margin_A0==37
911 09:10:21.344363 VrefDac_Margin_A1==22
912 09:10:21.344699 DeviceVref_Margin_A1==37
913 09:10:21.344914
914 09:10:21.349998 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 09:10:21.350355
916 09:10:21.378015 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
917 09:10:21.383460 2D training succeed
918 09:10:21.388992 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 09:10:21.389369 auto size-- 65535DDR cs0 size: 2048MB
920 09:10:21.394738 DDR cs1 size: 2048MB
921 09:10:21.395075 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 09:10:21.400239 cs0 DataBus test pass
923 09:10:21.400785 cs1 DataBus test pass
924 09:10:21.401194 cs0 AddrBus test pass
925 09:10:21.405770 cs1 AddrBus test pass
926 09:10:21.406276
927 09:10:21.406688 100bdlr_step_size ps== 420
928 09:10:21.407099 result report
929 09:10:21.411415 boot times 0Enable ddr reg access
930 09:10:21.419102 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 09:10:21.432514 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 09:10:22.005648 0.0;M3 CHK:0;cm4_sp_mode 0
933 09:10:22.006295 MVN_1=0x00000000
934 09:10:22.011038 MVN_2=0x00000000
935 09:10:22.016831 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 09:10:22.017167 OPS=0x10
937 09:10:22.017640 ring efuse init
938 09:10:22.018127 chipver efuse init
939 09:10:22.022427 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 09:10:22.028052 [0.018961 Inits done]
941 09:10:22.028585 secure task start!
942 09:10:22.029006 high task start!
943 09:10:22.032604 low task start!
944 09:10:22.033073 run into bl31
945 09:10:22.039383 NOTICE: BL31: v1.3(release):4fc40b1
946 09:10:22.047055 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 09:10:22.047420 NOTICE: BL31: G12A normal boot!
948 09:10:22.072536 NOTICE: BL31: BL33 decompress pass
949 09:10:22.078204 ERROR: Error initializing runtime service opteed_fast
950 09:10:23.311004
951 09:10:23.311447
952 09:10:23.319450 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 09:10:23.319893
954 09:10:23.320263 Model: Libre Computer AML-A311D-CC Alta
955 09:10:23.527837 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 09:10:23.551256 DRAM: 2 GiB (effective 3.8 GiB)
957 09:10:23.694232 Core: 408 devices, 31 uclasses, devicetree: separate
958 09:10:23.700293 WDT: Not starting watchdog@f0d0
959 09:10:23.732402 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 09:10:23.744839 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 09:10:23.749778 ** Bad device specification mmc 0 **
962 09:10:23.760168 Card did not respond to voltage select! : -110
963 09:10:23.767761 ** Bad device specification mmc 0 **
964 09:10:23.768297 Couldn't find partition mmc 0
965 09:10:23.776123 Card did not respond to voltage select! : -110
966 09:10:23.781627 ** Bad device specification mmc 0 **
967 09:10:23.782117 Couldn't find partition mmc 0
968 09:10:23.786735 Error: could not access storage.
969 09:10:24.129281 Net: eth0: ethernet@ff3f0000
970 09:10:24.129899 starting USB...
971 09:10:24.380945 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 09:10:24.381358 Starting the controller
973 09:10:24.389065 USB XHCI 1.10
974 09:10:25.942171 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 09:10:25.950432 scanning usb for storage devices... 0 Storage Device(s) found
977 09:10:26.002262 Hit any key to stop autoboot: 1
978 09:10:26.003119 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 09:10:26.003607 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 09:10:26.003952 Setting prompt string to ['=>']
981 09:10:26.004329 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 09:10:26.017253 0
983 09:10:26.018140 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 09:10:26.018642 Sending with 10 millisecond of delay
986 09:10:27.153940 => setenv autoload no
987 09:10:27.164736 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 09:10:27.167818 setenv autoload no
989 09:10:27.168489 Sending with 10 millisecond of delay
991 09:10:28.967414 => setenv initrd_high 0xffffffff
992 09:10:28.978302 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 09:10:28.978919 setenv initrd_high 0xffffffff
994 09:10:28.979589 Sending with 10 millisecond of delay
996 09:10:30.596270 => setenv fdt_high 0xffffffff
997 09:10:30.607010 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 09:10:30.607629 setenv fdt_high 0xffffffff
999 09:10:30.608107 Sending with 10 millisecond of delay
1001 09:10:30.899451 => dhcp
1002 09:10:30.909983 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 09:10:30.910503 dhcp
1004 09:10:30.910745 Speed: 1000, full duplex
1005 09:10:30.910963 BOOTP broadcast 1
1006 09:10:31.158667 BOOTP broadcast 2
1007 09:10:31.658663 BOOTP broadcast 3
1008 09:10:31.675635 DHCP client bound to address 192.168.6.33 (765 ms)
1009 09:10:31.676194 Sending with 10 millisecond of delay
1011 09:10:33.352066 => setenv serverip 192.168.6.2
1012 09:10:33.363583 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1013 09:10:33.364203 setenv serverip 192.168.6.2
1014 09:10:33.364696 Sending with 10 millisecond of delay
1016 09:10:37.092573 => tftpboot 0x01080000 819480/tftp-deploy-c1y47sd_/kernel/uImage
1017 09:10:37.103294 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1018 09:10:37.103969 tftpboot 0x01080000 819480/tftp-deploy-c1y47sd_/kernel/uImage
1019 09:10:37.104291 Speed: 1000, full duplex
1020 09:10:37.104544 Using ethernet@ff3f0000 device
1021 09:10:37.105984 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1022 09:10:37.111626 Filename '819480/tftp-deploy-c1y47sd_/kernel/uImage'.
1023 09:10:37.115524 Load address: 0x1080000
1024 09:10:41.131923 Loading: *################################################## 43.6 MiB
1025 09:10:41.132363 10.8 MiB/s
1026 09:10:41.132580 done
1027 09:10:41.136301 Bytes transferred = 45713984 (2b98a40 hex)
1028 09:10:41.137632 Sending with 10 millisecond of delay
1030 09:10:45.828550 => tftpboot 0x08000000 819480/tftp-deploy-c1y47sd_/ramdisk/ramdisk.cpio.gz.uboot
1031 09:10:45.839380 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:08)
1032 09:10:45.839884 tftpboot 0x08000000 819480/tftp-deploy-c1y47sd_/ramdisk/ramdisk.cpio.gz.uboot
1033 09:10:45.840347 Speed: 1000, full duplex
1034 09:10:45.840812 Using ethernet@ff3f0000 device
1035 09:10:45.842345 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1036 09:10:45.851025 Filename '819480/tftp-deploy-c1y47sd_/ramdisk/ramdisk.cpio.gz.uboot'.
1037 09:10:45.851570 Load address: 0x8000000
1038 09:10:48.049473 Loading: *################################################# UDP wrong checksum 00000005 0000bc10
1039 09:10:53.050325 T UDP wrong checksum 00000005 0000bc10
1040 09:11:03.051320 T T UDP wrong checksum 00000005 0000bc10
1041 09:11:23.055775 T T T T UDP wrong checksum 00000005 0000bc10
1042 09:11:26.254796 UDP wrong checksum 000000ff 00005ea5
1043 09:11:26.284866 UDP wrong checksum 000000ff 0000f397
1044 09:11:43.061346 T T T
1045 09:11:43.061992 Retry count exceeded; starting again
1047 09:11:43.063543 end: 2.4.3 bootloader-commands (duration 00:01:17) [common]
1050 09:11:43.065713 end: 2.4 uboot-commands (duration 00:01:49) [common]
1052 09:11:43.067257 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1054 09:11:43.068425 end: 2 uboot-action (duration 00:01:49) [common]
1056 09:11:43.070092 Cleaning after the job
1057 09:11:43.070687 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/ramdisk
1058 09:11:43.072107 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/kernel
1059 09:11:43.108248 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/dtb
1060 09:11:43.109721 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/nfsrootfs
1061 09:11:43.221455 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/819480/tftp-deploy-c1y47sd_/modules
1062 09:11:43.231387 start: 4.1 power-off (timeout 00:00:30) [common]
1063 09:11:43.232005 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1064 09:11:43.265293 >> OK - accepted request
1065 09:11:43.267305 Returned 0 in 0 seconds
1066 09:11:43.368112 end: 4.1 power-off (duration 00:00:00) [common]
1068 09:11:43.369149 start: 4.2 read-feedback (timeout 00:10:00) [common]
1069 09:11:43.369802 Listened to connection for namespace 'common' for up to 1s
1070 09:11:44.371190 Finalising connection for namespace 'common'
1071 09:11:44.371672 Disconnecting from shell: Finalise
1072 09:11:44.371975 =>
1073 09:11:44.472760 end: 4.2 read-feedback (duration 00:00:01) [common]
1074 09:11:44.473402 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/819480
1075 09:11:47.653227 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/819480
1076 09:11:47.653841 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.