Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 07:20:56.926622 lava-dispatcher, installed at version: 2024.01
2 07:20:56.927393 start: 0 validate
3 07:20:56.927844 Start time: 2024-10-10 07:20:56.927813+00:00 (UTC)
4 07:20:56.928462 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 07:20:56.928988 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 07:20:56.969245 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 07:20:56.969817 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241010%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 07:20:56.997724 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 07:20:56.998358 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241010%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 07:20:57.048416 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 07:20:57.048936 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 07:20:57.078828 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 07:20:57.079341 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fnext%2Fmaster%2Fnext-20241010%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
14 07:20:57.120045 validate duration: 0.19
16 07:20:57.121620 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 07:20:57.122251 start: 1.1 download-retry (timeout 00:10:00) [common]
18 07:20:57.122824 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 07:20:57.123796 Not decompressing ramdisk as can be used compressed.
20 07:20:57.124587 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 07:20:57.124895 saving as /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/ramdisk/initrd.cpio.gz
22 07:20:57.125163 total size: 5628182 (5 MB)
23 07:20:57.166323 progress 0 % (0 MB)
24 07:20:57.174311 progress 5 % (0 MB)
25 07:20:57.182399 progress 10 % (0 MB)
26 07:20:57.189870 progress 15 % (0 MB)
27 07:20:57.195424 progress 20 % (1 MB)
28 07:20:57.199530 progress 25 % (1 MB)
29 07:20:57.204124 progress 30 % (1 MB)
30 07:20:57.208577 progress 35 % (1 MB)
31 07:20:57.212666 progress 40 % (2 MB)
32 07:20:57.217613 progress 45 % (2 MB)
33 07:20:57.221425 progress 50 % (2 MB)
34 07:20:57.225519 progress 55 % (2 MB)
35 07:20:57.229538 progress 60 % (3 MB)
36 07:20:57.233080 progress 65 % (3 MB)
37 07:20:57.237085 progress 70 % (3 MB)
38 07:20:57.240680 progress 75 % (4 MB)
39 07:20:57.244636 progress 80 % (4 MB)
40 07:20:57.248250 progress 85 % (4 MB)
41 07:20:57.252275 progress 90 % (4 MB)
42 07:20:57.256076 progress 95 % (5 MB)
43 07:20:57.259325 progress 100 % (5 MB)
44 07:20:57.259960 5 MB downloaded in 0.13 s (39.83 MB/s)
45 07:20:57.260549 end: 1.1.1 http-download (duration 00:00:00) [common]
47 07:20:57.261451 end: 1.1 download-retry (duration 00:00:00) [common]
48 07:20:57.261746 start: 1.2 download-retry (timeout 00:10:00) [common]
49 07:20:57.262016 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 07:20:57.262487 downloading http://storage.kernelci.org/next/master/next-20241010/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/kernel/Image
51 07:20:57.262735 saving as /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/kernel/Image
52 07:20:57.262944 total size: 44204040 (42 MB)
53 07:20:57.263155 No compression specified
54 07:20:57.295478 progress 0 % (0 MB)
55 07:20:57.324362 progress 5 % (2 MB)
56 07:20:57.353250 progress 10 % (4 MB)
57 07:20:57.381146 progress 15 % (6 MB)
58 07:20:57.409007 progress 20 % (8 MB)
59 07:20:57.437221 progress 25 % (10 MB)
60 07:20:57.465350 progress 30 % (12 MB)
61 07:20:57.493368 progress 35 % (14 MB)
62 07:20:57.521058 progress 40 % (16 MB)
63 07:20:57.549125 progress 45 % (19 MB)
64 07:20:57.578261 progress 50 % (21 MB)
65 07:20:57.606239 progress 55 % (23 MB)
66 07:20:57.635008 progress 60 % (25 MB)
67 07:20:57.662813 progress 65 % (27 MB)
68 07:20:57.691056 progress 70 % (29 MB)
69 07:20:57.719312 progress 75 % (31 MB)
70 07:20:57.747629 progress 80 % (33 MB)
71 07:20:57.775814 progress 85 % (35 MB)
72 07:20:57.804781 progress 90 % (37 MB)
73 07:20:57.832803 progress 95 % (40 MB)
74 07:20:57.860706 progress 100 % (42 MB)
75 07:20:57.861214 42 MB downloaded in 0.60 s (70.47 MB/s)
76 07:20:57.861680 end: 1.2.1 http-download (duration 00:00:01) [common]
78 07:20:57.862516 end: 1.2 download-retry (duration 00:00:01) [common]
79 07:20:57.862788 start: 1.3 download-retry (timeout 00:09:59) [common]
80 07:20:57.863054 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 07:20:57.863529 downloading http://storage.kernelci.org/next/master/next-20241010/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 07:20:57.863798 saving as /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 07:20:57.864031 total size: 53209 (0 MB)
84 07:20:57.864242 No compression specified
85 07:20:57.903562 progress 61 % (0 MB)
86 07:20:57.904461 progress 100 % (0 MB)
87 07:20:57.905070 0 MB downloaded in 0.04 s (1.24 MB/s)
88 07:20:57.905612 end: 1.3.1 http-download (duration 00:00:00) [common]
90 07:20:57.906522 end: 1.3 download-retry (duration 00:00:00) [common]
91 07:20:57.906833 start: 1.4 download-retry (timeout 00:09:59) [common]
92 07:20:57.907156 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 07:20:57.907654 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 07:20:57.907934 saving as /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/nfsrootfs/full.rootfs.tar
95 07:20:57.908202 total size: 107552908 (102 MB)
96 07:20:57.908448 Using unxz to decompress xz
97 07:20:57.947394 progress 0 % (0 MB)
98 07:20:58.672621 progress 5 % (5 MB)
99 07:20:59.486154 progress 10 % (10 MB)
100 07:21:00.310857 progress 15 % (15 MB)
101 07:21:01.100012 progress 20 % (20 MB)
102 07:21:01.667096 progress 25 % (25 MB)
103 07:21:02.284866 progress 30 % (30 MB)
104 07:21:03.017200 progress 35 % (35 MB)
105 07:21:03.382962 progress 40 % (41 MB)
106 07:21:03.813384 progress 45 % (46 MB)
107 07:21:04.515250 progress 50 % (51 MB)
108 07:21:05.203087 progress 55 % (56 MB)
109 07:21:05.960840 progress 60 % (61 MB)
110 07:21:06.718652 progress 65 % (66 MB)
111 07:21:07.453239 progress 70 % (71 MB)
112 07:21:08.219241 progress 75 % (76 MB)
113 07:21:08.902965 progress 80 % (82 MB)
114 07:21:09.612086 progress 85 % (87 MB)
115 07:21:10.359466 progress 90 % (92 MB)
116 07:21:11.139897 progress 95 % (97 MB)
117 07:21:11.904698 progress 100 % (102 MB)
118 07:21:11.917513 102 MB downloaded in 14.01 s (7.32 MB/s)
119 07:21:11.918443 end: 1.4.1 http-download (duration 00:00:14) [common]
121 07:21:11.920249 end: 1.4 download-retry (duration 00:00:14) [common]
122 07:21:11.920821 start: 1.5 download-retry (timeout 00:09:45) [common]
123 07:21:11.921379 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 07:21:11.922227 downloading http://storage.kernelci.org/next/master/next-20241010/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/modules.tar.xz
125 07:21:11.922727 saving as /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/modules/modules.tar
126 07:21:11.923168 total size: 11457276 (10 MB)
127 07:21:11.923623 Using unxz to decompress xz
128 07:21:11.974586 progress 0 % (0 MB)
129 07:21:12.047768 progress 5 % (0 MB)
130 07:21:12.135031 progress 10 % (1 MB)
131 07:21:12.234773 progress 15 % (1 MB)
132 07:21:12.326635 progress 20 % (2 MB)
133 07:21:12.413000 progress 25 % (2 MB)
134 07:21:12.489791 progress 30 % (3 MB)
135 07:21:12.568978 progress 35 % (3 MB)
136 07:21:12.645191 progress 40 % (4 MB)
137 07:21:12.733218 progress 45 % (4 MB)
138 07:21:12.811444 progress 50 % (5 MB)
139 07:21:12.895674 progress 55 % (6 MB)
140 07:21:12.974200 progress 60 % (6 MB)
141 07:21:13.059482 progress 65 % (7 MB)
142 07:21:13.139269 progress 70 % (7 MB)
143 07:21:13.222362 progress 75 % (8 MB)
144 07:21:13.302987 progress 80 % (8 MB)
145 07:21:13.383613 progress 85 % (9 MB)
146 07:21:13.453349 progress 90 % (9 MB)
147 07:21:13.558574 progress 95 % (10 MB)
148 07:21:13.654102 progress 100 % (10 MB)
149 07:21:13.668311 10 MB downloaded in 1.75 s (6.26 MB/s)
150 07:21:13.668994 end: 1.5.1 http-download (duration 00:00:02) [common]
152 07:21:13.669905 end: 1.5 download-retry (duration 00:00:02) [common]
153 07:21:13.670211 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 07:21:13.670509 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 07:21:23.781058 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/831785/extract-nfsrootfs-5d53qlsq
156 07:21:23.781798 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 07:21:23.782132 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 07:21:23.782779 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a
159 07:21:23.783265 makedir: /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin
160 07:21:23.783654 makedir: /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/tests
161 07:21:23.784205 makedir: /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/results
162 07:21:23.784567 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-add-keys
163 07:21:23.785094 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-add-sources
164 07:21:23.785587 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-background-process-start
165 07:21:23.786069 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-background-process-stop
166 07:21:23.786575 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-common-functions
167 07:21:23.787070 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-echo-ipv4
168 07:21:23.787614 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-install-packages
169 07:21:23.788175 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-installed-packages
170 07:21:23.788662 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-os-build
171 07:21:23.789135 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-probe-channel
172 07:21:23.789638 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-probe-ip
173 07:21:23.790109 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-target-ip
174 07:21:23.790573 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-target-mac
175 07:21:23.791042 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-target-storage
176 07:21:23.791518 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-test-case
177 07:21:23.792029 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-test-event
178 07:21:23.792528 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-test-feedback
179 07:21:23.793075 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-test-raise
180 07:21:23.793587 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-test-reference
181 07:21:23.794061 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-test-runner
182 07:21:23.794534 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-test-set
183 07:21:23.795000 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-test-shell
184 07:21:23.795477 Updating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-install-packages (oe)
185 07:21:23.796044 Updating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/bin/lava-installed-packages (oe)
186 07:21:23.796535 Creating /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/environment
187 07:21:23.796935 LAVA metadata
188 07:21:23.797191 - LAVA_JOB_ID=831785
189 07:21:23.797404 - LAVA_DISPATCHER_IP=192.168.6.2
190 07:21:23.797759 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 07:21:23.798694 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 07:21:23.799002 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 07:21:23.799208 skipped lava-vland-overlay
194 07:21:23.799445 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 07:21:23.799696 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 07:21:23.799911 skipped lava-multinode-overlay
197 07:21:23.800183 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 07:21:23.800436 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 07:21:23.800681 Loading test definitions
200 07:21:23.800952 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 07:21:23.801166 Using /lava-831785 at stage 0
202 07:21:23.802427 uuid=831785_1.6.2.4.1 testdef=None
203 07:21:23.802731 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 07:21:23.802989 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 07:21:23.804941 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 07:21:23.805719 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 07:21:23.807925 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 07:21:23.808749 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 07:21:23.810881 runner path: /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/0/tests/0_dmesg test_uuid 831785_1.6.2.4.1
212 07:21:23.811460 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 07:21:23.812229 Creating lava-test-runner.conf files
215 07:21:23.812430 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/831785/lava-overlay-9bp8j83a/lava-831785/0 for stage 0
216 07:21:23.812780 - 0_dmesg
217 07:21:23.813131 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 07:21:23.813413 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 07:21:23.835641 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 07:21:23.836047 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 07:21:23.836330 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 07:21:23.836607 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 07:21:23.836877 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 07:21:24.456521 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 07:21:24.456976 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 07:21:24.457224 extracting modules file /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/modules/modules.tar to /var/lib/lava/dispatcher/tmp/831785/extract-nfsrootfs-5d53qlsq
227 07:21:25.822175 extracting modules file /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/modules/modules.tar to /var/lib/lava/dispatcher/tmp/831785/extract-overlay-ramdisk-bxdjzz_w/ramdisk
228 07:21:27.210419 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 07:21:27.210874 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 07:21:27.211156 [common] Applying overlay to NFS
231 07:21:27.211369 [common] Applying overlay /var/lib/lava/dispatcher/tmp/831785/compress-overlay-zpwnh_q6/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/831785/extract-nfsrootfs-5d53qlsq
232 07:21:27.240440 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 07:21:27.240834 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 07:21:27.241108 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 07:21:27.241336 Converting downloaded kernel to a uImage
236 07:21:27.241642 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/kernel/Image /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/kernel/uImage
237 07:21:27.911950 output: Image Name:
238 07:21:27.912390 output: Created: Thu Oct 10 07:21:27 2024
239 07:21:27.912605 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 07:21:27.912812 output: Data Size: 44204040 Bytes = 43168.01 KiB = 42.16 MiB
241 07:21:27.913015 output: Load Address: 01080000
242 07:21:27.913216 output: Entry Point: 01080000
243 07:21:27.913414 output:
244 07:21:27.913750 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 07:21:27.914020 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 07:21:27.914294 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 07:21:27.914552 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 07:21:27.914815 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 07:21:27.915075 Building ramdisk /var/lib/lava/dispatcher/tmp/831785/extract-overlay-ramdisk-bxdjzz_w/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/831785/extract-overlay-ramdisk-bxdjzz_w/ramdisk
250 07:21:30.132187 >> 165504 blocks
251 07:21:38.741685 Adding RAMdisk u-boot header.
252 07:21:38.742138 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/831785/extract-overlay-ramdisk-bxdjzz_w/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/831785/extract-overlay-ramdisk-bxdjzz_w/ramdisk.cpio.gz.uboot
253 07:21:38.989845 output: Image Name:
254 07:21:38.990268 output: Created: Thu Oct 10 07:21:38 2024
255 07:21:38.990481 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 07:21:38.990685 output: Data Size: 23601027 Bytes = 23047.88 KiB = 22.51 MiB
257 07:21:38.990886 output: Load Address: 00000000
258 07:21:38.991083 output: Entry Point: 00000000
259 07:21:38.991278 output:
260 07:21:38.991920 rename /var/lib/lava/dispatcher/tmp/831785/extract-overlay-ramdisk-bxdjzz_w/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/ramdisk/ramdisk.cpio.gz.uboot
261 07:21:38.992675 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 07:21:38.993276 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 07:21:38.993856 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:18) [common]
264 07:21:38.994359 No LXC device requested
265 07:21:38.994905 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 07:21:38.995464 start: 1.8 deploy-device-env (timeout 00:09:18) [common]
267 07:21:38.996059 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 07:21:38.996521 Checking files for TFTP limit of 4294967296 bytes.
269 07:21:38.999412 end: 1 tftp-deploy (duration 00:00:42) [common]
270 07:21:39.000063 start: 2 uboot-action (timeout 00:05:00) [common]
271 07:21:39.000641 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 07:21:39.001191 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 07:21:39.001739 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 07:21:39.002309 Using kernel file from prepare-kernel: 831785/tftp-deploy-g5mpi358/kernel/uImage
275 07:21:39.002993 substitutions:
276 07:21:39.003440 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 07:21:39.003883 - {DTB_ADDR}: 0x01070000
278 07:21:39.004358 - {DTB}: 831785/tftp-deploy-g5mpi358/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 07:21:39.004801 - {INITRD}: 831785/tftp-deploy-g5mpi358/ramdisk/ramdisk.cpio.gz.uboot
280 07:21:39.005237 - {KERNEL_ADDR}: 0x01080000
281 07:21:39.005669 - {KERNEL}: 831785/tftp-deploy-g5mpi358/kernel/uImage
282 07:21:39.006102 - {LAVA_MAC}: None
283 07:21:39.006579 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/831785/extract-nfsrootfs-5d53qlsq
284 07:21:39.007016 - {NFS_SERVER_IP}: 192.168.6.2
285 07:21:39.007446 - {PRESEED_CONFIG}: None
286 07:21:39.007874 - {PRESEED_LOCAL}: None
287 07:21:39.008330 - {RAMDISK_ADDR}: 0x08000000
288 07:21:39.008757 - {RAMDISK}: 831785/tftp-deploy-g5mpi358/ramdisk/ramdisk.cpio.gz.uboot
289 07:21:39.009185 - {ROOT_PART}: None
290 07:21:39.009613 - {ROOT}: None
291 07:21:39.010040 - {SERVER_IP}: 192.168.6.2
292 07:21:39.010466 - {TEE_ADDR}: 0x83000000
293 07:21:39.010890 - {TEE}: None
294 07:21:39.011317 Parsed boot commands:
295 07:21:39.011730 - setenv autoload no
296 07:21:39.012184 - setenv initrd_high 0xffffffff
297 07:21:39.012609 - setenv fdt_high 0xffffffff
298 07:21:39.013033 - dhcp
299 07:21:39.013456 - setenv serverip 192.168.6.2
300 07:21:39.013880 - tftpboot 0x01080000 831785/tftp-deploy-g5mpi358/kernel/uImage
301 07:21:39.014307 - tftpboot 0x08000000 831785/tftp-deploy-g5mpi358/ramdisk/ramdisk.cpio.gz.uboot
302 07:21:39.014733 - tftpboot 0x01070000 831785/tftp-deploy-g5mpi358/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 07:21:39.015160 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/831785/extract-nfsrootfs-5d53qlsq,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 07:21:39.015596 - bootm 0x01080000 0x08000000 0x01070000
305 07:21:39.016162 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 07:21:39.017796 start: 2.3 connect-device (timeout 00:05:00) [common]
308 07:21:39.018259 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 07:21:39.033515 Setting prompt string to ['lava-test: # ']
310 07:21:39.035121 end: 2.3 connect-device (duration 00:00:00) [common]
311 07:21:39.035767 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 07:21:39.036435 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 07:21:39.037090 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 07:21:39.038351 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 07:21:39.075264 >> OK - accepted request
316 07:21:39.077663 Returned 0 in 0 seconds
317 07:21:39.178572 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 07:21:39.180480 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 07:21:39.181134 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 07:21:39.181727 Setting prompt string to ['Hit any key to stop autoboot']
322 07:21:39.182245 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 07:21:39.184006 Trying 192.168.56.21...
324 07:21:39.184551 Connected to conserv1.
325 07:21:39.185014 Escape character is '^]'.
326 07:21:39.185477
327 07:21:39.185942 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 07:21:39.186406
329 07:21:47.374564 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 07:21:47.375002 bl2_stage_init 0x01
331 07:21:47.375214 bl2_stage_init 0x81
332 07:21:47.379428 hw id: 0x0000 - pwm id 0x01
333 07:21:47.379868 bl2_stage_init 0xc1
334 07:21:47.384598 bl2_stage_init 0x02
335 07:21:47.385010
336 07:21:47.385327 L0:00000000
337 07:21:47.385640 L1:00000703
338 07:21:47.385859 L2:00008067
339 07:21:47.386058 L3:15000000
340 07:21:47.390177 S1:00000000
341 07:21:47.390478 B2:20282000
342 07:21:47.390693 B1:a0f83180
343 07:21:47.390891
344 07:21:47.391090 TE: 71726
345 07:21:47.391286
346 07:21:47.395721 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 07:21:47.396075
348 07:21:47.401344 Board ID = 1
349 07:21:47.401781 Set cpu clk to 24M
350 07:21:47.402090 Set clk81 to 24M
351 07:21:47.407081 Use GP1_pll as DSU clk.
352 07:21:47.407458 DSU clk: 1200 Mhz
353 07:21:47.407670 CPU clk: 1200 MHz
354 07:21:47.412775 Set clk81 to 166.6M
355 07:21:47.418197 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 07:21:47.418727 board id: 1
357 07:21:47.425298 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 07:21:47.435943 fw parse done
359 07:21:47.441934 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 07:21:47.484510 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 07:21:47.495512 PIEI prepare done
362 07:21:47.496192 fastboot data load
363 07:21:47.496655 fastboot data verify
364 07:21:47.501173 verify result: 266
365 07:21:47.506747 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 07:21:47.507241 LPDDR4 probe
367 07:21:47.507681 ddr clk to 1584MHz
368 07:21:47.514637 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 07:21:47.552132
370 07:21:47.552752 dmc_version 0001
371 07:21:47.558694 Check phy result
372 07:21:47.564540 INFO : End of CA training
373 07:21:47.565044 INFO : End of initialization
374 07:21:47.570273 INFO : Training has run successfully!
375 07:21:47.570759 Check phy result
376 07:21:47.575805 INFO : End of initialization
377 07:21:47.576327 INFO : End of read enable training
378 07:21:47.581342 INFO : End of fine write leveling
379 07:21:47.586954 INFO : End of Write leveling coarse delay
380 07:21:47.587449 INFO : Training has run successfully!
381 07:21:47.587890 Check phy result
382 07:21:47.592618 INFO : End of initialization
383 07:21:47.593145 INFO : End of read dq deskew training
384 07:21:47.598176 INFO : End of MPR read delay center optimization
385 07:21:47.603799 INFO : End of write delay center optimization
386 07:21:47.609400 INFO : End of read delay center optimization
387 07:21:47.609937 INFO : End of max read latency training
388 07:21:47.614922 INFO : Training has run successfully!
389 07:21:47.615417 1D training succeed
390 07:21:47.624150 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 07:21:47.671686 Check phy result
392 07:21:47.672291 INFO : End of initialization
393 07:21:47.694018 INFO : End of 2D read delay Voltage center optimization
394 07:21:47.713206 INFO : End of 2D read delay Voltage center optimization
395 07:21:47.765111 INFO : End of 2D write delay Voltage center optimization
396 07:21:47.814275 INFO : End of 2D write delay Voltage center optimization
397 07:21:47.820043 INFO : Training has run successfully!
398 07:21:47.820597
399 07:21:47.821069 channel==0
400 07:21:47.825521 RxClkDly_Margin_A0==78 ps 8
401 07:21:47.826042 TxDqDly_Margin_A0==98 ps 10
402 07:21:47.828765 RxClkDly_Margin_A1==88 ps 9
403 07:21:47.829264 TxDqDly_Margin_A1==88 ps 9
404 07:21:47.834199 TrainedVREFDQ_A0==77
405 07:21:47.834707 TrainedVREFDQ_A1==74
406 07:21:47.835151 VrefDac_Margin_A0==23
407 07:21:47.840035 DeviceVref_Margin_A0==37
408 07:21:47.840506 VrefDac_Margin_A1==22
409 07:21:47.845433 DeviceVref_Margin_A1==40
410 07:21:47.845889
411 07:21:47.846329
412 07:21:47.846761 channel==1
413 07:21:47.847185 RxClkDly_Margin_A0==88 ps 9
414 07:21:47.849000 TxDqDly_Margin_A0==98 ps 10
415 07:21:47.854604 RxClkDly_Margin_A1==78 ps 8
416 07:21:47.855060 TxDqDly_Margin_A1==78 ps 8
417 07:21:47.855499 TrainedVREFDQ_A0==78
418 07:21:47.860162 TrainedVREFDQ_A1==75
419 07:21:47.860619 VrefDac_Margin_A0==22
420 07:21:47.865778 DeviceVref_Margin_A0==36
421 07:21:47.866225 VrefDac_Margin_A1==22
422 07:21:47.866653 DeviceVref_Margin_A1==39
423 07:21:47.867077
424 07:21:47.871311 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 07:21:47.871770
426 07:21:47.904944 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
427 07:21:47.905577 2D training succeed
428 07:21:47.910588 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 07:21:47.916143 auto size-- 65535DDR cs0 size: 2048MB
430 07:21:47.916640 DDR cs1 size: 2048MB
431 07:21:47.921713 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 07:21:47.922234 cs0 DataBus test pass
433 07:21:47.922691 cs1 DataBus test pass
434 07:21:47.927363 cs0 AddrBus test pass
435 07:21:47.927852 cs1 AddrBus test pass
436 07:21:47.928335
437 07:21:47.932864 100bdlr_step_size ps== 478
438 07:21:47.933353 result report
439 07:21:47.933790 boot times 0Enable ddr reg access
440 07:21:47.942506 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 07:21:47.956355 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 07:21:48.611325 bl2z: ptr: 05129330, size: 00001e40
443 07:21:48.617916 0.0;M3 CHK:0;cm4_sp_mode 0
444 07:21:48.618432 MVN_1=0x00000000
445 07:21:48.618888 MVN_2=0x00000000
446 07:21:48.629619 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 07:21:48.630174 OPS=0x04
448 07:21:48.630661 ring efuse init
449 07:21:48.635025 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 07:21:48.635550 [0.017319 Inits done]
451 07:21:48.636029 secure task start!
452 07:21:48.642419 high task start!
453 07:21:48.642923 low task start!
454 07:21:48.643369 run into bl31
455 07:21:48.651092 NOTICE: BL31: v1.3(release):4fc40b1
456 07:21:48.658943 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 07:21:48.659431 NOTICE: BL31: G12A normal boot!
458 07:21:48.674450 NOTICE: BL31: BL33 decompress pass
459 07:21:48.680140 ERROR: Error initializing runtime service opteed_fast
460 07:21:51.424669 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 07:21:51.425092 bl2_stage_init 0x01
462 07:21:51.425307 bl2_stage_init 0x81
463 07:21:51.430402 hw id: 0x0000 - pwm id 0x01
464 07:21:51.430801 bl2_stage_init 0xc1
465 07:21:51.433662 bl2_stage_init 0x02
466 07:21:51.433929
467 07:21:51.434145 L0:00000000
468 07:21:51.434379 L1:00000703
469 07:21:51.439240 L2:00008067
470 07:21:51.439492 L3:15000000
471 07:21:51.439692 S1:00000000
472 07:21:51.439887 B2:20282000
473 07:21:51.441247 B1:a0f83180
474 07:21:51.441463
475 07:21:51.444748 TE: 71881
476 07:21:51.444985
477 07:21:51.450351 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 07:21:51.450576
479 07:21:51.450775 Board ID = 1
480 07:21:51.450968 Set cpu clk to 24M
481 07:21:51.455969 Set clk81 to 24M
482 07:21:51.456214 Use GP1_pll as DSU clk.
483 07:21:51.456415 DSU clk: 1200 Mhz
484 07:21:51.461570 CPU clk: 1200 MHz
485 07:21:51.461797 Set clk81 to 166.6M
486 07:21:51.467214 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 07:21:51.467443 board id: 1
488 07:21:51.476525 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 07:21:51.487240 fw parse done
490 07:21:51.493309 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 07:21:51.535892 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 07:21:51.546773 PIEI prepare done
493 07:21:51.547005 fastboot data load
494 07:21:51.547208 fastboot data verify
495 07:21:51.552435 verify result: 266
496 07:21:51.558017 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 07:21:51.558334 LPDDR4 probe
498 07:21:51.558560 ddr clk to 1584MHz
499 07:21:51.565959 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 07:21:51.603340
501 07:21:51.603668 dmc_version 0001
502 07:21:51.609958 Check phy result
503 07:21:51.615847 INFO : End of CA training
504 07:21:51.616213 INFO : End of initialization
505 07:21:51.621463 INFO : Training has run successfully!
506 07:21:51.621902 Check phy result
507 07:21:51.627063 INFO : End of initialization
508 07:21:51.627496 INFO : End of read enable training
509 07:21:51.632656 INFO : End of fine write leveling
510 07:21:51.638359 INFO : End of Write leveling coarse delay
511 07:21:51.638695 INFO : Training has run successfully!
512 07:21:51.638922 Check phy result
513 07:21:51.643859 INFO : End of initialization
514 07:21:51.644333 INFO : End of read dq deskew training
515 07:21:51.649475 INFO : End of MPR read delay center optimization
516 07:21:51.655044 INFO : End of write delay center optimization
517 07:21:51.660666 INFO : End of read delay center optimization
518 07:21:51.660988 INFO : End of max read latency training
519 07:21:51.666355 INFO : Training has run successfully!
520 07:21:51.666810 1D training succeed
521 07:21:51.675458 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 07:21:51.723220 Check phy result
523 07:21:51.723840 INFO : End of initialization
524 07:21:51.745644 INFO : End of 2D read delay Voltage center optimization
525 07:21:51.764689 INFO : End of 2D read delay Voltage center optimization
526 07:21:51.816630 INFO : End of 2D write delay Voltage center optimization
527 07:21:51.865728 INFO : End of 2D write delay Voltage center optimization
528 07:21:51.871322 INFO : Training has run successfully!
529 07:21:51.871858
530 07:21:51.872373 channel==0
531 07:21:51.876922 RxClkDly_Margin_A0==78 ps 8
532 07:21:51.877452 TxDqDly_Margin_A0==98 ps 10
533 07:21:51.882505 RxClkDly_Margin_A1==78 ps 8
534 07:21:51.883048 TxDqDly_Margin_A1==88 ps 9
535 07:21:51.883506 TrainedVREFDQ_A0==74
536 07:21:51.888104 TrainedVREFDQ_A1==74
537 07:21:51.888630 VrefDac_Margin_A0==24
538 07:21:51.889084 DeviceVref_Margin_A0==40
539 07:21:51.893751 VrefDac_Margin_A1==23
540 07:21:51.894307 DeviceVref_Margin_A1==40
541 07:21:51.894774
542 07:21:51.895225
543 07:21:51.895670 channel==1
544 07:21:51.899282 RxClkDly_Margin_A0==78 ps 8
545 07:21:51.899814 TxDqDly_Margin_A0==98 ps 10
546 07:21:51.904898 RxClkDly_Margin_A1==78 ps 8
547 07:21:51.905422 TxDqDly_Margin_A1==78 ps 8
548 07:21:51.910547 TrainedVREFDQ_A0==78
549 07:21:51.911078 TrainedVREFDQ_A1==75
550 07:21:51.911531 VrefDac_Margin_A0==22
551 07:21:51.916095 DeviceVref_Margin_A0==36
552 07:21:51.916618 VrefDac_Margin_A1==22
553 07:21:51.921693 DeviceVref_Margin_A1==39
554 07:21:51.922219
555 07:21:51.922672 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 07:21:51.923118
557 07:21:51.955247 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 07:21:51.955842 2D training succeed
559 07:21:51.960948 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 07:21:51.966552 auto size-- 65535DDR cs0 size: 2048MB
561 07:21:51.967071 DDR cs1 size: 2048MB
562 07:21:51.972113 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 07:21:51.972647 cs0 DataBus test pass
564 07:21:51.977682 cs1 DataBus test pass
565 07:21:51.978209 cs0 AddrBus test pass
566 07:21:51.978659 cs1 AddrBus test pass
567 07:21:51.979099
568 07:21:51.983334 100bdlr_step_size ps== 478
569 07:21:51.983865 result report
570 07:21:51.988898 boot times 0Enable ddr reg access
571 07:21:51.994107 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 07:21:52.007859 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 07:21:52.663693 bl2z: ptr: 05129330, size: 00001e40
574 07:21:52.671659 0.0;M3 CHK:0;cm4_sp_mode 0
575 07:21:52.672232 MVN_1=0x00000000
576 07:21:52.672689 MVN_2=0x00000000
577 07:21:52.683108 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 07:21:52.683640 OPS=0x04
579 07:21:52.684134 ring efuse init
580 07:21:52.688782 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 07:21:52.689305 [0.017319 Inits done]
582 07:21:52.689755 secure task start!
583 07:21:52.696134 high task start!
584 07:21:52.696667 low task start!
585 07:21:52.697117 run into bl31
586 07:21:52.704684 NOTICE: BL31: v1.3(release):4fc40b1
587 07:21:52.712570 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 07:21:52.713105 NOTICE: BL31: G12A normal boot!
589 07:21:52.728028 NOTICE: BL31: BL33 decompress pass
590 07:21:52.733703 ERROR: Error initializing runtime service opteed_fast
591 07:21:54.121067 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 07:21:54.121471 bl2_stage_init 0x01
593 07:21:54.121686 bl2_stage_init 0x81
594 07:21:54.126507 hw id: 0x0000 - pwm id 0x01
595 07:21:54.126872 bl2_stage_init 0xc1
596 07:21:54.131630 bl2_stage_init 0x02
597 07:21:54.132005
598 07:21:54.132327 L0:00000000
599 07:21:54.132626 L1:00000703
600 07:21:54.132845 L2:00008067
601 07:21:54.137260 L3:15000000
602 07:21:54.137519 S1:00000000
603 07:21:54.137723 B2:20282000
604 07:21:54.137921 B1:a0f83180
605 07:21:54.138117
606 07:21:54.138311 TE: 69202
607 07:21:54.138511
608 07:21:54.148339 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 07:21:54.148722
610 07:21:54.149036 Board ID = 1
611 07:21:54.149352 Set cpu clk to 24M
612 07:21:54.149648 Set clk81 to 24M
613 07:21:54.152110 Use GP1_pll as DSU clk.
614 07:21:54.152456 DSU clk: 1200 Mhz
615 07:21:54.157566 CPU clk: 1200 MHz
616 07:21:54.157920 Set clk81 to 166.6M
617 07:21:54.163238 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 07:21:54.163592 board id: 1
619 07:21:54.172955 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 07:21:54.183871 fw parse done
621 07:21:54.189853 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 07:21:54.232759 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 07:21:54.243851 PIEI prepare done
624 07:21:54.244149 fastboot data load
625 07:21:54.244363 fastboot data verify
626 07:21:54.249461 verify result: 266
627 07:21:54.255062 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 07:21:54.255323 LPDDR4 probe
629 07:21:54.255529 ddr clk to 1584MHz
630 07:21:54.263051 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 07:21:54.300841
632 07:21:54.301142 dmc_version 0001
633 07:21:54.307797 Check phy result
634 07:21:54.313790 INFO : End of CA training
635 07:21:54.314177 INFO : End of initialization
636 07:21:54.319383 INFO : Training has run successfully!
637 07:21:54.319640 Check phy result
638 07:21:54.324973 INFO : End of initialization
639 07:21:54.325335 INFO : End of read enable training
640 07:21:54.330628 INFO : End of fine write leveling
641 07:21:54.336204 INFO : End of Write leveling coarse delay
642 07:21:54.336461 INFO : Training has run successfully!
643 07:21:54.336669 Check phy result
644 07:21:54.341760 INFO : End of initialization
645 07:21:54.342017 INFO : End of read dq deskew training
646 07:21:54.347383 INFO : End of MPR read delay center optimization
647 07:21:54.352976 INFO : End of write delay center optimization
648 07:21:54.358597 INFO : End of read delay center optimization
649 07:21:54.358876 INFO : End of max read latency training
650 07:21:54.364229 INFO : Training has run successfully!
651 07:21:54.364613 1D training succeed
652 07:21:54.373363 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 07:21:54.421700 Check phy result
654 07:21:54.422012 INFO : End of initialization
655 07:21:54.449007 INFO : End of 2D read delay Voltage center optimization
656 07:21:54.473137 INFO : End of 2D read delay Voltage center optimization
657 07:21:54.529871 INFO : End of 2D write delay Voltage center optimization
658 07:21:54.583800 INFO : End of 2D write delay Voltage center optimization
659 07:21:54.589307 INFO : Training has run successfully!
660 07:21:54.589573
661 07:21:54.589784 channel==0
662 07:21:54.594922 RxClkDly_Margin_A0==78 ps 8
663 07:21:54.595308 TxDqDly_Margin_A0==98 ps 10
664 07:21:54.600520 RxClkDly_Margin_A1==88 ps 9
665 07:21:54.600889 TxDqDly_Margin_A1==88 ps 9
666 07:21:54.601207 TrainedVREFDQ_A0==74
667 07:21:54.606208 TrainedVREFDQ_A1==75
668 07:21:54.606486 VrefDac_Margin_A0==23
669 07:21:54.606695 DeviceVref_Margin_A0==40
670 07:21:54.611778 VrefDac_Margin_A1==23
671 07:21:54.612168 DeviceVref_Margin_A1==39
672 07:21:54.612489
673 07:21:54.612803
674 07:21:54.613111 channel==1
675 07:21:54.617315 RxClkDly_Margin_A0==88 ps 9
676 07:21:54.617569 TxDqDly_Margin_A0==98 ps 10
677 07:21:54.622900 RxClkDly_Margin_A1==78 ps 8
678 07:21:54.623280 TxDqDly_Margin_A1==78 ps 8
679 07:21:54.628552 TrainedVREFDQ_A0==78
680 07:21:54.628836 TrainedVREFDQ_A1==75
681 07:21:54.629049 VrefDac_Margin_A0==22
682 07:21:54.634156 DeviceVref_Margin_A0==36
683 07:21:54.634537 VrefDac_Margin_A1==22
684 07:21:54.639847 DeviceVref_Margin_A1==39
685 07:21:54.640255
686 07:21:54.640581 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 07:21:54.640809
688 07:21:54.673337 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 07:21:54.673668 2D training succeed
690 07:21:54.678920 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 07:21:54.684521 auto size-- 65535DDR cs0 size: 2048MB
692 07:21:54.684906 DDR cs1 size: 2048MB
693 07:21:54.690106 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 07:21:54.690371 cs0 DataBus test pass
695 07:21:54.695743 cs1 DataBus test pass
696 07:21:54.696138 cs0 AddrBus test pass
697 07:21:54.696464 cs1 AddrBus test pass
698 07:21:54.696795
699 07:21:54.701328 100bdlr_step_size ps== 471
700 07:21:54.701592 result report
701 07:21:54.706952 boot times 0Enable ddr reg access
702 07:21:54.712154 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 07:21:54.725951 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 07:21:55.385208 bl2z: ptr: 05129330, size: 00001e40
705 07:21:55.393588 0.0;M3 CHK:0;cm4_sp_mode 0
706 07:21:55.393869 MVN_1=0x00000000
707 07:21:55.394077 MVN_2=0x00000000
708 07:21:55.405007 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 07:21:55.405399 OPS=0x04
710 07:21:55.405716 ring efuse init
711 07:21:55.410771 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 07:21:55.411147 [0.017354 Inits done]
713 07:21:55.411463 secure task start!
714 07:21:55.417830 high task start!
715 07:21:55.418091 low task start!
716 07:21:55.418299 run into bl31
717 07:21:55.426458 NOTICE: BL31: v1.3(release):4fc40b1
718 07:21:55.434272 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 07:21:55.434549 NOTICE: BL31: G12A normal boot!
720 07:21:55.449767 NOTICE: BL31: BL33 decompress pass
721 07:21:55.455453 ERROR: Error initializing runtime service opteed_fast
722 07:21:56.249738
723 07:21:56.250141
724 07:21:56.255005 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 07:21:56.255413
726 07:21:56.258599 Model: Libre Computer AML-S905D3-CC Solitude
727 07:21:56.405495 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 07:21:56.420859 DRAM: 2 GiB (effective 3.8 GiB)
729 07:21:56.521794 Core: 406 devices, 33 uclasses, devicetree: separate
730 07:21:56.527697 WDT: Not starting watchdog@f0d0
731 07:21:56.552836 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 07:21:56.565060 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 07:21:56.570156 ** Bad device specification mmc 0 **
734 07:21:56.580095 Card did not respond to voltage select! : -110
735 07:21:56.587757 ** Bad device specification mmc 0 **
736 07:21:56.588332 Couldn't find partition mmc 0
737 07:21:56.596105 Card did not respond to voltage select! : -110
738 07:21:56.601609 ** Bad device specification mmc 0 **
739 07:21:56.602149 Couldn't find partition mmc 0
740 07:21:56.606620 Error: could not access storage.
741 07:21:56.904109 Net: eth0: ethernet@ff3f0000
742 07:21:56.904761 starting USB...
743 07:21:57.148750 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 07:21:57.149404 Starting the controller
745 07:21:57.155770 USB XHCI 1.10
746 07:21:58.709448 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 07:21:58.717745 scanning usb for storage devices... 0 Storage Device(s) found
749 07:21:58.770546 Hit any key to stop autoboot: 1
750 07:21:58.771372 end: 2.4.2 bootloader-interrupt (duration 00:00:20) [common]
751 07:21:58.771904 start: 2.4.3 bootloader-commands (timeout 00:04:40) [common]
752 07:21:58.772252 Setting prompt string to ['=>']
753 07:21:58.772527 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:40)
754 07:21:58.783770 0
755 07:21:58.784937 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 07:21:58.886437 => setenv autoload no
758 07:21:58.887159 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
759 07:21:58.891723 setenv autoload no
761 07:21:58.993174 => setenv initrd_high 0xffffffff
762 07:21:58.994377 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
763 07:21:58.998538 setenv initrd_high 0xffffffff
765 07:21:59.100145 => setenv fdt_high 0xffffffff
766 07:21:59.101205 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 07:21:59.105345 setenv fdt_high 0xffffffff
769 07:21:59.206975 => dhcp
770 07:21:59.207835 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 07:21:59.212227 dhcp
772 07:22:00.218285 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 07:22:00.218943 Speed: 1000, full duplex
774 07:22:00.219405 BOOTP broadcast 1
775 07:22:00.467032 BOOTP broadcast 2
776 07:22:00.968144 BOOTP broadcast 3
777 07:22:01.969039 BOOTP broadcast 4
778 07:22:03.970864 BOOTP broadcast 5
779 07:22:03.982016 DHCP client bound to address 192.168.6.12 (3763 ms)
781 07:22:04.083576 => setenv serverip 192.168.6.2
782 07:22:04.084478 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
783 07:22:04.090183 setenv serverip 192.168.6.2
785 07:22:04.191797 => tftpboot 0x01080000 831785/tftp-deploy-g5mpi358/kernel/uImage
786 07:22:04.192989 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
787 07:22:04.199578 tftpboot 0x01080000 831785/tftp-deploy-g5mpi358/kernel/uImage
788 07:22:04.200131 Speed: 1000, full duplex
789 07:22:04.200596 Using ethernet@ff3f0000 device
790 07:22:04.205054 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
791 07:22:04.210649 Filename '831785/tftp-deploy-g5mpi358/kernel/uImage'.
792 07:22:04.214508 Load address: 0x1080000
793 07:22:07.824680 Loading: *################################################## 42.2 MiB
794 07:22:07.825090 11.7 MiB/s
795 07:22:07.825305 done
796 07:22:07.829141 Bytes transferred = 44204104 (2a28048 hex)
798 07:22:07.930200 => tftpboot 0x08000000 831785/tftp-deploy-g5mpi358/ramdisk/ramdisk.cpio.gz.uboot
799 07:22:07.930697 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:31)
800 07:22:07.937436 tftpboot 0x08000000 831785/tftp-deploy-g5mpi358/ramdisk/ramdisk.cpio.gz.uboot
801 07:22:07.937760 Speed: 1000, full duplex
802 07:22:07.937969 Using ethernet@ff3f0000 device
803 07:22:07.942925 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
804 07:22:07.951671 Filename '831785/tftp-deploy-g5mpi358/ramdisk/ramdisk.cpio.gz.uboot'.
805 07:22:07.952044 Load address: 0x8000000
806 07:22:10.744200 Loading: *########################################## UDP wrong checksum 00000005 0000a7f9
807 07:22:14.825358 T ####### UDP wrong checksum 00000005 0000e1c6
808 07:22:19.825744 T UDP wrong checksum 00000005 0000e1c6
809 07:22:29.828065 T T UDP wrong checksum 00000005 0000e1c6
810 07:22:49.832903 T T T T UDP wrong checksum 00000005 0000e1c6
811 07:22:51.121521 UDP wrong checksum 000000ff 000071fd
812 07:22:51.140923 UDP wrong checksum 000000ff 00000ef0
813 07:23:04.835921 T T
814 07:23:04.836615 Retry count exceeded; starting again
816 07:23:04.838176 end: 2.4.3 bootloader-commands (duration 00:01:06) [common]
819 07:23:04.840275 end: 2.4 uboot-commands (duration 00:01:26) [common]
821 07:23:04.841877 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
823 07:23:04.843029 end: 2 uboot-action (duration 00:01:26) [common]
825 07:23:04.844779 Cleaning after the job
826 07:23:04.845375 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/ramdisk
827 07:23:04.846563 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/kernel
828 07:23:04.875796 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/dtb
829 07:23:04.877261 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/nfsrootfs
830 07:23:04.930856 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/831785/tftp-deploy-g5mpi358/modules
831 07:23:04.952623 start: 4.1 power-off (timeout 00:00:30) [common]
832 07:23:04.953256 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
833 07:23:04.986272 >> OK - accepted request
834 07:23:04.988387 Returned 0 in 0 seconds
835 07:23:05.089143 end: 4.1 power-off (duration 00:00:00) [common]
837 07:23:05.090107 start: 4.2 read-feedback (timeout 00:10:00) [common]
838 07:23:05.090752 Listened to connection for namespace 'common' for up to 1s
839 07:23:06.091158 Finalising connection for namespace 'common'
840 07:23:06.091606 Disconnecting from shell: Finalise
841 07:23:06.091879 =>
842 07:23:06.192505 end: 4.2 read-feedback (duration 00:00:01) [common]
843 07:23:06.192896 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/831785
844 07:23:08.019916 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/831785
845 07:23:08.020788 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.